Commit | Line | Data |
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36764631 | 1 | /* sunzilog.c: Zilog serial driver for Sparc systems. |
1da177e4 LT |
2 | * |
3 | * Driver for Zilog serial chips found on Sun workstations and | |
4 | * servers. This driver could actually be made more generic. | |
5 | * | |
6 | * This is based on the old drivers/sbus/char/zs.c code. A lot | |
7 | * of code has been simply moved over directly from there but | |
8 | * much has been rewritten. Credits therefore go out to Eddie | |
9 | * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their | |
10 | * work there. | |
11 | * | |
36764631 | 12 | * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
13 | */ |
14 | ||
15 | #include <linux/config.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/tty.h> | |
22 | #include <linux/tty_flip.h> | |
23 | #include <linux/major.h> | |
24 | #include <linux/string.h> | |
25 | #include <linux/ptrace.h> | |
26 | #include <linux/ioport.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/circ_buf.h> | |
29 | #include <linux/serial.h> | |
30 | #include <linux/sysrq.h> | |
31 | #include <linux/console.h> | |
32 | #include <linux/spinlock.h> | |
33 | #ifdef CONFIG_SERIO | |
34 | #include <linux/serio.h> | |
35 | #endif | |
36 | #include <linux/init.h> | |
37 | ||
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> | |
36764631 DM |
40 | #include <asm/prom.h> |
41 | #include <asm/of_device.h> | |
1da177e4 LT |
42 | |
43 | #if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
44 | #define SUPPORT_SYSRQ | |
45 | #endif | |
46 | ||
47 | #include <linux/serial_core.h> | |
48 | ||
49 | #include "suncore.h" | |
50 | #include "sunzilog.h" | |
51 | ||
52 | /* On 32-bit sparcs we need to delay after register accesses | |
53 | * to accommodate sun4 systems, but we do not need to flush writes. | |
54 | * On 64-bit sparc we only need to flush single writes to ensure | |
55 | * completion. | |
56 | */ | |
57 | #ifndef CONFIG_SPARC64 | |
58 | #define ZSDELAY() udelay(5) | |
59 | #define ZSDELAY_LONG() udelay(20) | |
60 | #define ZS_WSYNC(channel) do { } while (0) | |
61 | #else | |
62 | #define ZSDELAY() | |
63 | #define ZSDELAY_LONG() | |
64 | #define ZS_WSYNC(__channel) \ | |
36764631 | 65 | readb(&((__channel)->control)) |
1da177e4 LT |
66 | #endif |
67 | ||
68 | static int num_sunzilog; | |
69 | #define NUM_SUNZILOG num_sunzilog | |
70 | #define NUM_CHANNELS (NUM_SUNZILOG * 2) | |
71 | ||
72 | #define KEYBOARD_LINE 0x2 | |
73 | #define MOUSE_LINE 0x3 | |
74 | ||
75 | #define ZS_CLOCK 4915200 /* Zilog input clock rate. */ | |
76 | #define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */ | |
77 | ||
78 | /* | |
79 | * We wrap our port structure around the generic uart_port. | |
80 | */ | |
81 | struct uart_sunzilog_port { | |
82 | struct uart_port port; | |
83 | ||
84 | /* IRQ servicing chain. */ | |
85 | struct uart_sunzilog_port *next; | |
86 | ||
87 | /* Current values of Zilog write registers. */ | |
88 | unsigned char curregs[NUM_ZSREGS]; | |
89 | ||
90 | unsigned int flags; | |
91 | #define SUNZILOG_FLAG_CONS_KEYB 0x00000001 | |
92 | #define SUNZILOG_FLAG_CONS_MOUSE 0x00000002 | |
93 | #define SUNZILOG_FLAG_IS_CONS 0x00000004 | |
94 | #define SUNZILOG_FLAG_IS_KGDB 0x00000008 | |
95 | #define SUNZILOG_FLAG_MODEM_STATUS 0x00000010 | |
96 | #define SUNZILOG_FLAG_IS_CHANNEL_A 0x00000020 | |
97 | #define SUNZILOG_FLAG_REGS_HELD 0x00000040 | |
98 | #define SUNZILOG_FLAG_TX_STOPPED 0x00000080 | |
99 | #define SUNZILOG_FLAG_TX_ACTIVE 0x00000100 | |
100 | ||
101 | unsigned int cflag; | |
102 | ||
103 | unsigned char parity_mask; | |
104 | unsigned char prev_status; | |
105 | ||
106 | #ifdef CONFIG_SERIO | |
36764631 | 107 | struct serio serio; |
1da177e4 LT |
108 | int serio_open; |
109 | #endif | |
110 | }; | |
111 | ||
112 | #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase)) | |
113 | #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT)) | |
114 | ||
115 | #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB) | |
116 | #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE) | |
117 | #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS) | |
118 | #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB) | |
119 | #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS) | |
120 | #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CHANNEL_A) | |
121 | #define ZS_REGS_HELD(UP) ((UP)->flags & SUNZILOG_FLAG_REGS_HELD) | |
122 | #define ZS_TX_STOPPED(UP) ((UP)->flags & SUNZILOG_FLAG_TX_STOPPED) | |
123 | #define ZS_TX_ACTIVE(UP) ((UP)->flags & SUNZILOG_FLAG_TX_ACTIVE) | |
124 | ||
125 | /* Reading and writing Zilog8530 registers. The delays are to make this | |
126 | * driver work on the Sun4 which needs a settling delay after each chip | |
127 | * register access, other machines handle this in hardware via auxiliary | |
128 | * flip-flops which implement the settle time we do in software. | |
129 | * | |
130 | * The port lock must be held and local IRQs must be disabled | |
131 | * when {read,write}_zsreg is invoked. | |
132 | */ | |
133 | static unsigned char read_zsreg(struct zilog_channel __iomem *channel, | |
134 | unsigned char reg) | |
135 | { | |
136 | unsigned char retval; | |
137 | ||
36764631 | 138 | writeb(reg, &channel->control); |
1da177e4 | 139 | ZSDELAY(); |
36764631 | 140 | retval = readb(&channel->control); |
1da177e4 LT |
141 | ZSDELAY(); |
142 | ||
143 | return retval; | |
144 | } | |
145 | ||
146 | static void write_zsreg(struct zilog_channel __iomem *channel, | |
147 | unsigned char reg, unsigned char value) | |
148 | { | |
36764631 | 149 | writeb(reg, &channel->control); |
1da177e4 | 150 | ZSDELAY(); |
36764631 | 151 | writeb(value, &channel->control); |
1da177e4 LT |
152 | ZSDELAY(); |
153 | } | |
154 | ||
155 | static void sunzilog_clear_fifo(struct zilog_channel __iomem *channel) | |
156 | { | |
157 | int i; | |
158 | ||
159 | for (i = 0; i < 32; i++) { | |
160 | unsigned char regval; | |
161 | ||
36764631 | 162 | regval = readb(&channel->control); |
1da177e4 LT |
163 | ZSDELAY(); |
164 | if (regval & Rx_CH_AV) | |
165 | break; | |
166 | ||
167 | regval = read_zsreg(channel, R1); | |
36764631 | 168 | readb(&channel->data); |
1da177e4 LT |
169 | ZSDELAY(); |
170 | ||
171 | if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { | |
36764631 | 172 | writeb(ERR_RES, &channel->control); |
1da177e4 LT |
173 | ZSDELAY(); |
174 | ZS_WSYNC(channel); | |
175 | } | |
176 | } | |
177 | } | |
178 | ||
179 | /* This function must only be called when the TX is not busy. The UART | |
180 | * port lock must be held and local interrupts disabled. | |
181 | */ | |
182 | static void __load_zsregs(struct zilog_channel __iomem *channel, unsigned char *regs) | |
183 | { | |
184 | int i; | |
185 | ||
186 | /* Let pending transmits finish. */ | |
187 | for (i = 0; i < 1000; i++) { | |
188 | unsigned char stat = read_zsreg(channel, R1); | |
189 | if (stat & ALL_SNT) | |
190 | break; | |
191 | udelay(100); | |
192 | } | |
193 | ||
36764631 | 194 | writeb(ERR_RES, &channel->control); |
1da177e4 LT |
195 | ZSDELAY(); |
196 | ZS_WSYNC(channel); | |
197 | ||
198 | sunzilog_clear_fifo(channel); | |
199 | ||
200 | /* Disable all interrupts. */ | |
201 | write_zsreg(channel, R1, | |
202 | regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); | |
203 | ||
204 | /* Set parity, sync config, stop bits, and clock divisor. */ | |
205 | write_zsreg(channel, R4, regs[R4]); | |
206 | ||
207 | /* Set misc. TX/RX control bits. */ | |
208 | write_zsreg(channel, R10, regs[R10]); | |
209 | ||
210 | /* Set TX/RX controls sans the enable bits. */ | |
211 | write_zsreg(channel, R3, regs[R3] & ~RxENAB); | |
212 | write_zsreg(channel, R5, regs[R5] & ~TxENAB); | |
213 | ||
214 | /* Synchronous mode config. */ | |
215 | write_zsreg(channel, R6, regs[R6]); | |
216 | write_zsreg(channel, R7, regs[R7]); | |
217 | ||
218 | /* Don't mess with the interrupt vector (R2, unused by us) and | |
219 | * master interrupt control (R9). We make sure this is setup | |
220 | * properly at probe time then never touch it again. | |
221 | */ | |
222 | ||
223 | /* Disable baud generator. */ | |
224 | write_zsreg(channel, R14, regs[R14] & ~BRENAB); | |
225 | ||
226 | /* Clock mode control. */ | |
227 | write_zsreg(channel, R11, regs[R11]); | |
228 | ||
229 | /* Lower and upper byte of baud rate generator divisor. */ | |
230 | write_zsreg(channel, R12, regs[R12]); | |
231 | write_zsreg(channel, R13, regs[R13]); | |
232 | ||
233 | /* Now rewrite R14, with BRENAB (if set). */ | |
234 | write_zsreg(channel, R14, regs[R14]); | |
235 | ||
236 | /* External status interrupt control. */ | |
237 | write_zsreg(channel, R15, regs[R15]); | |
238 | ||
239 | /* Reset external status interrupts. */ | |
240 | write_zsreg(channel, R0, RES_EXT_INT); | |
241 | write_zsreg(channel, R0, RES_EXT_INT); | |
242 | ||
243 | /* Rewrite R3/R5, this time without enables masked. */ | |
244 | write_zsreg(channel, R3, regs[R3]); | |
245 | write_zsreg(channel, R5, regs[R5]); | |
246 | ||
247 | /* Rewrite R1, this time without IRQ enabled masked. */ | |
248 | write_zsreg(channel, R1, regs[R1]); | |
249 | } | |
250 | ||
251 | /* Reprogram the Zilog channel HW registers with the copies found in the | |
252 | * software state struct. If the transmitter is busy, we defer this update | |
253 | * until the next TX complete interrupt. Else, we do it right now. | |
254 | * | |
255 | * The UART port lock must be held and local interrupts disabled. | |
256 | */ | |
257 | static void sunzilog_maybe_update_regs(struct uart_sunzilog_port *up, | |
258 | struct zilog_channel __iomem *channel) | |
259 | { | |
260 | if (!ZS_REGS_HELD(up)) { | |
261 | if (ZS_TX_ACTIVE(up)) { | |
262 | up->flags |= SUNZILOG_FLAG_REGS_HELD; | |
263 | } else { | |
264 | __load_zsregs(channel, up->curregs); | |
265 | } | |
266 | } | |
267 | } | |
268 | ||
269 | static void sunzilog_change_mouse_baud(struct uart_sunzilog_port *up) | |
270 | { | |
271 | unsigned int cur_cflag = up->cflag; | |
272 | int brg, new_baud; | |
273 | ||
274 | up->cflag &= ~CBAUD; | |
275 | up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); | |
276 | ||
277 | brg = BPS_TO_BRG(new_baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
278 | up->curregs[R12] = (brg & 0xff); | |
279 | up->curregs[R13] = (brg >> 8) & 0xff; | |
280 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(&up->port)); | |
281 | } | |
282 | ||
283 | static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up, | |
284 | unsigned char ch, int is_break, | |
285 | struct pt_regs *regs) | |
286 | { | |
287 | if (ZS_IS_KEYB(up)) { | |
288 | /* Stop-A is handled by drivers/char/keyboard.c now. */ | |
289 | #ifdef CONFIG_SERIO | |
290 | if (up->serio_open) | |
36764631 | 291 | serio_interrupt(&up->serio, ch, 0, regs); |
1da177e4 LT |
292 | #endif |
293 | } else if (ZS_IS_MOUSE(up)) { | |
294 | int ret = suncore_mouse_baud_detection(ch, is_break); | |
295 | ||
296 | switch (ret) { | |
297 | case 2: | |
298 | sunzilog_change_mouse_baud(up); | |
299 | /* fallthru */ | |
300 | case 1: | |
301 | break; | |
302 | ||
303 | case 0: | |
304 | #ifdef CONFIG_SERIO | |
305 | if (up->serio_open) | |
36764631 | 306 | serio_interrupt(&up->serio, ch, 0, regs); |
1da177e4 LT |
307 | #endif |
308 | break; | |
309 | }; | |
310 | } | |
311 | } | |
312 | ||
313 | static struct tty_struct * | |
314 | sunzilog_receive_chars(struct uart_sunzilog_port *up, | |
315 | struct zilog_channel __iomem *channel, | |
316 | struct pt_regs *regs) | |
317 | { | |
318 | struct tty_struct *tty; | |
33f0f88f | 319 | unsigned char ch, r1, flag; |
1da177e4 LT |
320 | |
321 | tty = NULL; | |
322 | if (up->port.info != NULL && /* Unopened serial console */ | |
323 | up->port.info->tty != NULL) /* Keyboard || mouse */ | |
324 | tty = up->port.info->tty; | |
325 | ||
326 | for (;;) { | |
327 | ||
328 | r1 = read_zsreg(channel, R1); | |
329 | if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) { | |
36764631 | 330 | writeb(ERR_RES, &channel->control); |
1da177e4 LT |
331 | ZSDELAY(); |
332 | ZS_WSYNC(channel); | |
333 | } | |
334 | ||
36764631 | 335 | ch = readb(&channel->control); |
1da177e4 LT |
336 | ZSDELAY(); |
337 | ||
338 | /* This funny hack depends upon BRK_ABRT not interfering | |
339 | * with the other bits we care about in R1. | |
340 | */ | |
341 | if (ch & BRK_ABRT) | |
342 | r1 |= BRK_ABRT; | |
343 | ||
344 | if (!(ch & Rx_CH_AV)) | |
345 | break; | |
346 | ||
36764631 | 347 | ch = readb(&channel->data); |
1da177e4 LT |
348 | ZSDELAY(); |
349 | ||
350 | ch &= up->parity_mask; | |
351 | ||
352 | if (unlikely(ZS_IS_KEYB(up)) || unlikely(ZS_IS_MOUSE(up))) { | |
353 | sunzilog_kbdms_receive_chars(up, ch, 0, regs); | |
354 | continue; | |
355 | } | |
356 | ||
357 | if (tty == NULL) { | |
358 | uart_handle_sysrq_char(&up->port, ch, regs); | |
359 | continue; | |
360 | } | |
361 | ||
1da177e4 | 362 | /* A real serial line, record the character and status. */ |
33f0f88f | 363 | flag = TTY_NORMAL; |
1da177e4 LT |
364 | up->port.icount.rx++; |
365 | if (r1 & (BRK_ABRT | PAR_ERR | Rx_OVR | CRC_ERR)) { | |
366 | if (r1 & BRK_ABRT) { | |
367 | r1 &= ~(PAR_ERR | CRC_ERR); | |
368 | up->port.icount.brk++; | |
369 | if (uart_handle_break(&up->port)) | |
370 | continue; | |
371 | } | |
372 | else if (r1 & PAR_ERR) | |
373 | up->port.icount.parity++; | |
374 | else if (r1 & CRC_ERR) | |
375 | up->port.icount.frame++; | |
376 | if (r1 & Rx_OVR) | |
377 | up->port.icount.overrun++; | |
378 | r1 &= up->port.read_status_mask; | |
379 | if (r1 & BRK_ABRT) | |
33f0f88f | 380 | flag = TTY_BREAK; |
1da177e4 | 381 | else if (r1 & PAR_ERR) |
33f0f88f | 382 | flag = TTY_PARITY; |
1da177e4 | 383 | else if (r1 & CRC_ERR) |
33f0f88f | 384 | flag = TTY_FRAME; |
1da177e4 LT |
385 | } |
386 | if (uart_handle_sysrq_char(&up->port, ch, regs)) | |
387 | continue; | |
388 | ||
389 | if (up->port.ignore_status_mask == 0xff || | |
390 | (r1 & up->port.ignore_status_mask) == 0) { | |
33f0f88f | 391 | tty_insert_flip_char(tty, ch, flag); |
1da177e4 | 392 | } |
33f0f88f AC |
393 | if (r1 & Rx_OVR) |
394 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
1da177e4 LT |
395 | } |
396 | ||
397 | return tty; | |
398 | } | |
399 | ||
400 | static void sunzilog_status_handle(struct uart_sunzilog_port *up, | |
401 | struct zilog_channel __iomem *channel, | |
402 | struct pt_regs *regs) | |
403 | { | |
404 | unsigned char status; | |
405 | ||
36764631 | 406 | status = readb(&channel->control); |
1da177e4 LT |
407 | ZSDELAY(); |
408 | ||
36764631 | 409 | writeb(RES_EXT_INT, &channel->control); |
1da177e4 LT |
410 | ZSDELAY(); |
411 | ZS_WSYNC(channel); | |
412 | ||
413 | if (status & BRK_ABRT) { | |
414 | if (ZS_IS_MOUSE(up)) | |
415 | sunzilog_kbdms_receive_chars(up, 0, 1, regs); | |
416 | if (ZS_IS_CONS(up)) { | |
417 | /* Wait for BREAK to deassert to avoid potentially | |
418 | * confusing the PROM. | |
419 | */ | |
420 | while (1) { | |
36764631 | 421 | status = readb(&channel->control); |
1da177e4 LT |
422 | ZSDELAY(); |
423 | if (!(status & BRK_ABRT)) | |
424 | break; | |
425 | } | |
426 | sun_do_break(); | |
427 | return; | |
428 | } | |
429 | } | |
430 | ||
431 | if (ZS_WANTS_MODEM_STATUS(up)) { | |
432 | if (status & SYNC) | |
433 | up->port.icount.dsr++; | |
434 | ||
435 | /* The Zilog just gives us an interrupt when DCD/CTS/etc. change. | |
436 | * But it does not tell us which bit has changed, we have to keep | |
437 | * track of this ourselves. | |
438 | */ | |
439 | if ((status ^ up->prev_status) ^ DCD) | |
440 | uart_handle_dcd_change(&up->port, | |
441 | (status & DCD)); | |
442 | if ((status ^ up->prev_status) ^ CTS) | |
443 | uart_handle_cts_change(&up->port, | |
444 | (status & CTS)); | |
445 | ||
446 | wake_up_interruptible(&up->port.info->delta_msr_wait); | |
447 | } | |
448 | ||
449 | up->prev_status = status; | |
450 | } | |
451 | ||
452 | static void sunzilog_transmit_chars(struct uart_sunzilog_port *up, | |
453 | struct zilog_channel __iomem *channel) | |
454 | { | |
455 | struct circ_buf *xmit; | |
456 | ||
457 | if (ZS_IS_CONS(up)) { | |
36764631 | 458 | unsigned char status = readb(&channel->control); |
1da177e4 LT |
459 | ZSDELAY(); |
460 | ||
461 | /* TX still busy? Just wait for the next TX done interrupt. | |
462 | * | |
463 | * It can occur because of how we do serial console writes. It would | |
464 | * be nice to transmit console writes just like we normally would for | |
465 | * a TTY line. (ie. buffered and TX interrupt driven). That is not | |
466 | * easy because console writes cannot sleep. One solution might be | |
467 | * to poll on enough port->xmit space becomming free. -DaveM | |
468 | */ | |
469 | if (!(status & Tx_BUF_EMP)) | |
470 | return; | |
471 | } | |
472 | ||
473 | up->flags &= ~SUNZILOG_FLAG_TX_ACTIVE; | |
474 | ||
475 | if (ZS_REGS_HELD(up)) { | |
476 | __load_zsregs(channel, up->curregs); | |
477 | up->flags &= ~SUNZILOG_FLAG_REGS_HELD; | |
478 | } | |
479 | ||
480 | if (ZS_TX_STOPPED(up)) { | |
481 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; | |
482 | goto ack_tx_int; | |
483 | } | |
484 | ||
485 | if (up->port.x_char) { | |
486 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
36764631 | 487 | writeb(up->port.x_char, &channel->data); |
1da177e4 LT |
488 | ZSDELAY(); |
489 | ZS_WSYNC(channel); | |
490 | ||
491 | up->port.icount.tx++; | |
492 | up->port.x_char = 0; | |
493 | return; | |
494 | } | |
495 | ||
496 | if (up->port.info == NULL) | |
497 | goto ack_tx_int; | |
498 | xmit = &up->port.info->xmit; | |
b8df110f | 499 | if (uart_circ_empty(xmit)) |
1da177e4 | 500 | goto ack_tx_int; |
b8df110f | 501 | |
1da177e4 LT |
502 | if (uart_tx_stopped(&up->port)) |
503 | goto ack_tx_int; | |
504 | ||
505 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
36764631 | 506 | writeb(xmit->buf[xmit->tail], &channel->data); |
1da177e4 LT |
507 | ZSDELAY(); |
508 | ZS_WSYNC(channel); | |
509 | ||
510 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
511 | up->port.icount.tx++; | |
512 | ||
513 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
514 | uart_write_wakeup(&up->port); | |
515 | ||
516 | return; | |
517 | ||
518 | ack_tx_int: | |
36764631 | 519 | writeb(RES_Tx_P, &channel->control); |
1da177e4 LT |
520 | ZSDELAY(); |
521 | ZS_WSYNC(channel); | |
522 | } | |
523 | ||
524 | static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
525 | { | |
526 | struct uart_sunzilog_port *up = dev_id; | |
527 | ||
528 | while (up) { | |
529 | struct zilog_channel __iomem *channel | |
530 | = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
531 | struct tty_struct *tty; | |
532 | unsigned char r3; | |
533 | ||
534 | spin_lock(&up->port.lock); | |
535 | r3 = read_zsreg(channel, R3); | |
536 | ||
537 | /* Channel A */ | |
538 | tty = NULL; | |
539 | if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { | |
36764631 | 540 | writeb(RES_H_IUS, &channel->control); |
1da177e4 LT |
541 | ZSDELAY(); |
542 | ZS_WSYNC(channel); | |
543 | ||
544 | if (r3 & CHARxIP) | |
545 | tty = sunzilog_receive_chars(up, channel, regs); | |
546 | if (r3 & CHAEXT) | |
547 | sunzilog_status_handle(up, channel, regs); | |
548 | if (r3 & CHATxIP) | |
549 | sunzilog_transmit_chars(up, channel); | |
550 | } | |
551 | spin_unlock(&up->port.lock); | |
552 | ||
553 | if (tty) | |
554 | tty_flip_buffer_push(tty); | |
555 | ||
556 | /* Channel B */ | |
557 | up = up->next; | |
558 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
559 | ||
560 | spin_lock(&up->port.lock); | |
561 | tty = NULL; | |
562 | if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { | |
36764631 | 563 | writeb(RES_H_IUS, &channel->control); |
1da177e4 LT |
564 | ZSDELAY(); |
565 | ZS_WSYNC(channel); | |
566 | ||
567 | if (r3 & CHBRxIP) | |
568 | tty = sunzilog_receive_chars(up, channel, regs); | |
569 | if (r3 & CHBEXT) | |
570 | sunzilog_status_handle(up, channel, regs); | |
571 | if (r3 & CHBTxIP) | |
572 | sunzilog_transmit_chars(up, channel); | |
573 | } | |
574 | spin_unlock(&up->port.lock); | |
575 | ||
576 | if (tty) | |
577 | tty_flip_buffer_push(tty); | |
578 | ||
579 | up = up->next; | |
580 | } | |
581 | ||
582 | return IRQ_HANDLED; | |
583 | } | |
584 | ||
585 | /* A convenient way to quickly get R0 status. The caller must _not_ hold the | |
586 | * port lock, it is acquired here. | |
587 | */ | |
588 | static __inline__ unsigned char sunzilog_read_channel_status(struct uart_port *port) | |
589 | { | |
590 | struct zilog_channel __iomem *channel; | |
1da177e4 LT |
591 | unsigned char status; |
592 | ||
1da177e4 | 593 | channel = ZILOG_CHANNEL_FROM_PORT(port); |
36764631 | 594 | status = readb(&channel->control); |
1da177e4 LT |
595 | ZSDELAY(); |
596 | ||
1da177e4 LT |
597 | return status; |
598 | } | |
599 | ||
600 | /* The port lock is not held. */ | |
601 | static unsigned int sunzilog_tx_empty(struct uart_port *port) | |
602 | { | |
c5f4644e | 603 | unsigned long flags; |
1da177e4 LT |
604 | unsigned char status; |
605 | unsigned int ret; | |
606 | ||
c5f4644e RK |
607 | spin_lock_irqsave(&port->lock, flags); |
608 | ||
1da177e4 | 609 | status = sunzilog_read_channel_status(port); |
c5f4644e RK |
610 | |
611 | spin_unlock_irqrestore(&port->lock, flags); | |
612 | ||
1da177e4 LT |
613 | if (status & Tx_BUF_EMP) |
614 | ret = TIOCSER_TEMT; | |
615 | else | |
616 | ret = 0; | |
617 | ||
618 | return ret; | |
619 | } | |
620 | ||
c5f4644e | 621 | /* The port lock is held and interrupts are disabled. */ |
1da177e4 LT |
622 | static unsigned int sunzilog_get_mctrl(struct uart_port *port) |
623 | { | |
624 | unsigned char status; | |
625 | unsigned int ret; | |
626 | ||
627 | status = sunzilog_read_channel_status(port); | |
628 | ||
629 | ret = 0; | |
630 | if (status & DCD) | |
631 | ret |= TIOCM_CAR; | |
632 | if (status & SYNC) | |
633 | ret |= TIOCM_DSR; | |
634 | if (status & CTS) | |
635 | ret |= TIOCM_CTS; | |
636 | ||
637 | return ret; | |
638 | } | |
639 | ||
640 | /* The port lock is held and interrupts are disabled. */ | |
641 | static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
642 | { | |
643 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
644 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
645 | unsigned char set_bits, clear_bits; | |
646 | ||
647 | set_bits = clear_bits = 0; | |
648 | ||
649 | if (mctrl & TIOCM_RTS) | |
650 | set_bits |= RTS; | |
651 | else | |
652 | clear_bits |= RTS; | |
653 | if (mctrl & TIOCM_DTR) | |
654 | set_bits |= DTR; | |
655 | else | |
656 | clear_bits |= DTR; | |
657 | ||
658 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
659 | up->curregs[R5] |= set_bits; | |
660 | up->curregs[R5] &= ~clear_bits; | |
661 | write_zsreg(channel, R5, up->curregs[R5]); | |
662 | } | |
663 | ||
664 | /* The port lock is held and interrupts are disabled. */ | |
b129a8cc | 665 | static void sunzilog_stop_tx(struct uart_port *port) |
1da177e4 LT |
666 | { |
667 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
668 | ||
669 | up->flags |= SUNZILOG_FLAG_TX_STOPPED; | |
670 | } | |
671 | ||
672 | /* The port lock is held and interrupts are disabled. */ | |
b129a8cc | 673 | static void sunzilog_start_tx(struct uart_port *port) |
1da177e4 LT |
674 | { |
675 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
676 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
677 | unsigned char status; | |
678 | ||
679 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
680 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; | |
681 | ||
36764631 | 682 | status = readb(&channel->control); |
1da177e4 LT |
683 | ZSDELAY(); |
684 | ||
685 | /* TX busy? Just wait for the TX done interrupt. */ | |
686 | if (!(status & Tx_BUF_EMP)) | |
687 | return; | |
688 | ||
689 | /* Send the first character to jump-start the TX done | |
690 | * IRQ sending engine. | |
691 | */ | |
692 | if (port->x_char) { | |
36764631 | 693 | writeb(port->x_char, &channel->data); |
1da177e4 LT |
694 | ZSDELAY(); |
695 | ZS_WSYNC(channel); | |
696 | ||
697 | port->icount.tx++; | |
698 | port->x_char = 0; | |
699 | } else { | |
700 | struct circ_buf *xmit = &port->info->xmit; | |
701 | ||
36764631 | 702 | writeb(xmit->buf[xmit->tail], &channel->data); |
1da177e4 LT |
703 | ZSDELAY(); |
704 | ZS_WSYNC(channel); | |
705 | ||
706 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
707 | port->icount.tx++; | |
708 | ||
709 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
710 | uart_write_wakeup(&up->port); | |
711 | } | |
712 | } | |
713 | ||
714 | /* The port lock is held. */ | |
715 | static void sunzilog_stop_rx(struct uart_port *port) | |
716 | { | |
717 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
718 | struct zilog_channel __iomem *channel; | |
719 | ||
720 | if (ZS_IS_CONS(up)) | |
721 | return; | |
722 | ||
723 | channel = ZILOG_CHANNEL_FROM_PORT(port); | |
724 | ||
725 | /* Disable all RX interrupts. */ | |
726 | up->curregs[R1] &= ~RxINT_MASK; | |
727 | sunzilog_maybe_update_regs(up, channel); | |
728 | } | |
729 | ||
730 | /* The port lock is held. */ | |
731 | static void sunzilog_enable_ms(struct uart_port *port) | |
732 | { | |
733 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
734 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
735 | unsigned char new_reg; | |
736 | ||
737 | new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); | |
738 | if (new_reg != up->curregs[R15]) { | |
739 | up->curregs[R15] = new_reg; | |
740 | ||
741 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
742 | write_zsreg(channel, R15, up->curregs[R15]); | |
743 | } | |
744 | } | |
745 | ||
746 | /* The port lock is not held. */ | |
747 | static void sunzilog_break_ctl(struct uart_port *port, int break_state) | |
748 | { | |
749 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
750 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
751 | unsigned char set_bits, clear_bits, new_reg; | |
752 | unsigned long flags; | |
753 | ||
754 | set_bits = clear_bits = 0; | |
755 | ||
756 | if (break_state) | |
757 | set_bits |= SND_BRK; | |
758 | else | |
759 | clear_bits |= SND_BRK; | |
760 | ||
761 | spin_lock_irqsave(&port->lock, flags); | |
762 | ||
763 | new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; | |
764 | if (new_reg != up->curregs[R5]) { | |
765 | up->curregs[R5] = new_reg; | |
766 | ||
767 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
768 | write_zsreg(channel, R5, up->curregs[R5]); | |
769 | } | |
770 | ||
771 | spin_unlock_irqrestore(&port->lock, flags); | |
772 | } | |
773 | ||
774 | static void __sunzilog_startup(struct uart_sunzilog_port *up) | |
775 | { | |
776 | struct zilog_channel __iomem *channel; | |
777 | ||
778 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
36764631 | 779 | up->prev_status = readb(&channel->control); |
1da177e4 LT |
780 | |
781 | /* Enable receiver and transmitter. */ | |
782 | up->curregs[R3] |= RxENAB; | |
783 | up->curregs[R5] |= TxENAB; | |
784 | ||
785 | up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; | |
786 | sunzilog_maybe_update_regs(up, channel); | |
787 | } | |
788 | ||
789 | static int sunzilog_startup(struct uart_port *port) | |
790 | { | |
791 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
792 | unsigned long flags; | |
793 | ||
794 | if (ZS_IS_CONS(up)) | |
795 | return 0; | |
796 | ||
797 | spin_lock_irqsave(&port->lock, flags); | |
798 | __sunzilog_startup(up); | |
799 | spin_unlock_irqrestore(&port->lock, flags); | |
800 | return 0; | |
801 | } | |
802 | ||
803 | /* | |
804 | * The test for ZS_IS_CONS is explained by the following e-mail: | |
805 | ***** | |
806 | * From: Russell King <rmk@arm.linux.org.uk> | |
807 | * Date: Sun, 8 Dec 2002 10:18:38 +0000 | |
808 | * | |
809 | * On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote: | |
810 | * > I boot my 2.5 boxes using "console=ttyS0,9600" argument, | |
811 | * > and I noticed that something is not right with reference | |
812 | * > counting in this case. It seems that when the console | |
813 | * > is open by kernel initially, this is not accounted | |
814 | * > as an open, and uart_startup is not called. | |
815 | * | |
816 | * That is correct. We are unable to call uart_startup when the serial | |
817 | * console is initialised because it may need to allocate memory (as | |
818 | * request_irq does) and the memory allocators may not have been | |
819 | * initialised. | |
820 | * | |
821 | * 1. initialise the port into a state where it can send characters in the | |
822 | * console write method. | |
823 | * | |
824 | * 2. don't do the actual hardware shutdown in your shutdown() method (but | |
825 | * do the normal software shutdown - ie, free irqs etc) | |
826 | ***** | |
827 | */ | |
828 | static void sunzilog_shutdown(struct uart_port *port) | |
829 | { | |
830 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
831 | struct zilog_channel __iomem *channel; | |
832 | unsigned long flags; | |
833 | ||
834 | if (ZS_IS_CONS(up)) | |
835 | return; | |
836 | ||
837 | spin_lock_irqsave(&port->lock, flags); | |
838 | ||
839 | channel = ZILOG_CHANNEL_FROM_PORT(port); | |
840 | ||
841 | /* Disable receiver and transmitter. */ | |
842 | up->curregs[R3] &= ~RxENAB; | |
843 | up->curregs[R5] &= ~TxENAB; | |
844 | ||
845 | /* Disable all interrupts and BRK assertion. */ | |
846 | up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); | |
847 | up->curregs[R5] &= ~SND_BRK; | |
848 | sunzilog_maybe_update_regs(up, channel); | |
849 | ||
850 | spin_unlock_irqrestore(&port->lock, flags); | |
851 | } | |
852 | ||
853 | /* Shared by TTY driver and serial console setup. The port lock is held | |
854 | * and local interrupts are disabled. | |
855 | */ | |
856 | static void | |
857 | sunzilog_convert_to_zs(struct uart_sunzilog_port *up, unsigned int cflag, | |
858 | unsigned int iflag, int brg) | |
859 | { | |
860 | ||
861 | up->curregs[R10] = NRZ; | |
862 | up->curregs[R11] = TCBR | RCBR; | |
863 | ||
864 | /* Program BAUD and clock source. */ | |
865 | up->curregs[R4] &= ~XCLK_MASK; | |
866 | up->curregs[R4] |= X16CLK; | |
867 | up->curregs[R12] = brg & 0xff; | |
868 | up->curregs[R13] = (brg >> 8) & 0xff; | |
869 | up->curregs[R14] = BRSRC | BRENAB; | |
870 | ||
871 | /* Character size, stop bits, and parity. */ | |
872 | up->curregs[3] &= ~RxN_MASK; | |
873 | up->curregs[5] &= ~TxN_MASK; | |
874 | switch (cflag & CSIZE) { | |
875 | case CS5: | |
876 | up->curregs[3] |= Rx5; | |
877 | up->curregs[5] |= Tx5; | |
878 | up->parity_mask = 0x1f; | |
879 | break; | |
880 | case CS6: | |
881 | up->curregs[3] |= Rx6; | |
882 | up->curregs[5] |= Tx6; | |
883 | up->parity_mask = 0x3f; | |
884 | break; | |
885 | case CS7: | |
886 | up->curregs[3] |= Rx7; | |
887 | up->curregs[5] |= Tx7; | |
888 | up->parity_mask = 0x7f; | |
889 | break; | |
890 | case CS8: | |
891 | default: | |
892 | up->curregs[3] |= Rx8; | |
893 | up->curregs[5] |= Tx8; | |
894 | up->parity_mask = 0xff; | |
895 | break; | |
896 | }; | |
897 | up->curregs[4] &= ~0x0c; | |
898 | if (cflag & CSTOPB) | |
899 | up->curregs[4] |= SB2; | |
900 | else | |
901 | up->curregs[4] |= SB1; | |
902 | if (cflag & PARENB) | |
903 | up->curregs[4] |= PAR_ENAB; | |
904 | else | |
905 | up->curregs[4] &= ~PAR_ENAB; | |
906 | if (!(cflag & PARODD)) | |
907 | up->curregs[4] |= PAR_EVEN; | |
908 | else | |
909 | up->curregs[4] &= ~PAR_EVEN; | |
910 | ||
911 | up->port.read_status_mask = Rx_OVR; | |
912 | if (iflag & INPCK) | |
913 | up->port.read_status_mask |= CRC_ERR | PAR_ERR; | |
914 | if (iflag & (BRKINT | PARMRK)) | |
915 | up->port.read_status_mask |= BRK_ABRT; | |
916 | ||
917 | up->port.ignore_status_mask = 0; | |
918 | if (iflag & IGNPAR) | |
919 | up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; | |
920 | if (iflag & IGNBRK) { | |
921 | up->port.ignore_status_mask |= BRK_ABRT; | |
922 | if (iflag & IGNPAR) | |
923 | up->port.ignore_status_mask |= Rx_OVR; | |
924 | } | |
925 | ||
926 | if ((cflag & CREAD) == 0) | |
927 | up->port.ignore_status_mask = 0xff; | |
928 | } | |
929 | ||
930 | /* The port lock is not held. */ | |
931 | static void | |
932 | sunzilog_set_termios(struct uart_port *port, struct termios *termios, | |
933 | struct termios *old) | |
934 | { | |
935 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
936 | unsigned long flags; | |
937 | int baud, brg; | |
938 | ||
939 | baud = uart_get_baud_rate(port, termios, old, 1200, 76800); | |
940 | ||
941 | spin_lock_irqsave(&up->port.lock, flags); | |
942 | ||
943 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
944 | ||
945 | sunzilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); | |
946 | ||
947 | if (UART_ENABLE_MS(&up->port, termios->c_cflag)) | |
948 | up->flags |= SUNZILOG_FLAG_MODEM_STATUS; | |
949 | else | |
950 | up->flags &= ~SUNZILOG_FLAG_MODEM_STATUS; | |
951 | ||
952 | up->cflag = termios->c_cflag; | |
953 | ||
954 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); | |
955 | ||
956 | uart_update_timeout(port, termios->c_cflag, baud); | |
957 | ||
958 | spin_unlock_irqrestore(&up->port.lock, flags); | |
959 | } | |
960 | ||
961 | static const char *sunzilog_type(struct uart_port *port) | |
962 | { | |
36764631 | 963 | return "zs"; |
1da177e4 LT |
964 | } |
965 | ||
966 | /* We do not request/release mappings of the registers here, this | |
967 | * happens at early serial probe time. | |
968 | */ | |
969 | static void sunzilog_release_port(struct uart_port *port) | |
970 | { | |
971 | } | |
972 | ||
973 | static int sunzilog_request_port(struct uart_port *port) | |
974 | { | |
975 | return 0; | |
976 | } | |
977 | ||
978 | /* These do not need to do anything interesting either. */ | |
979 | static void sunzilog_config_port(struct uart_port *port, int flags) | |
980 | { | |
981 | } | |
982 | ||
983 | /* We do not support letting the user mess with the divisor, IRQ, etc. */ | |
984 | static int sunzilog_verify_port(struct uart_port *port, struct serial_struct *ser) | |
985 | { | |
986 | return -EINVAL; | |
987 | } | |
988 | ||
989 | static struct uart_ops sunzilog_pops = { | |
990 | .tx_empty = sunzilog_tx_empty, | |
991 | .set_mctrl = sunzilog_set_mctrl, | |
992 | .get_mctrl = sunzilog_get_mctrl, | |
993 | .stop_tx = sunzilog_stop_tx, | |
994 | .start_tx = sunzilog_start_tx, | |
995 | .stop_rx = sunzilog_stop_rx, | |
996 | .enable_ms = sunzilog_enable_ms, | |
997 | .break_ctl = sunzilog_break_ctl, | |
998 | .startup = sunzilog_startup, | |
999 | .shutdown = sunzilog_shutdown, | |
1000 | .set_termios = sunzilog_set_termios, | |
1001 | .type = sunzilog_type, | |
1002 | .release_port = sunzilog_release_port, | |
1003 | .request_port = sunzilog_request_port, | |
1004 | .config_port = sunzilog_config_port, | |
1005 | .verify_port = sunzilog_verify_port, | |
1006 | }; | |
1007 | ||
1008 | static struct uart_sunzilog_port *sunzilog_port_table; | |
1009 | static struct zilog_layout __iomem **sunzilog_chip_regs; | |
1010 | ||
1011 | static struct uart_sunzilog_port *sunzilog_irq_chain; | |
1da177e4 LT |
1012 | |
1013 | static struct uart_driver sunzilog_reg = { | |
1014 | .owner = THIS_MODULE, | |
1015 | .driver_name = "ttyS", | |
1da177e4 LT |
1016 | .dev_name = "ttyS", |
1017 | .major = TTY_MAJOR, | |
1018 | }; | |
1019 | ||
36764631 | 1020 | static int __init sunzilog_alloc_tables(void) |
1da177e4 | 1021 | { |
36764631 DM |
1022 | struct uart_sunzilog_port *up; |
1023 | unsigned long size; | |
1024 | int i; | |
1da177e4 | 1025 | |
36764631 DM |
1026 | size = NUM_CHANNELS * sizeof(struct uart_sunzilog_port); |
1027 | sunzilog_port_table = kzalloc(size, GFP_KERNEL); | |
1028 | if (!sunzilog_port_table) | |
1029 | return -ENOMEM; | |
1da177e4 | 1030 | |
36764631 DM |
1031 | for (i = 0; i < NUM_CHANNELS; i++) { |
1032 | up = &sunzilog_port_table[i]; | |
1da177e4 | 1033 | |
36764631 | 1034 | spin_lock_init(&up->port.lock); |
1da177e4 | 1035 | |
36764631 DM |
1036 | if (i == 0) |
1037 | sunzilog_irq_chain = up; | |
1da177e4 | 1038 | |
36764631 DM |
1039 | if (i < NUM_CHANNELS - 1) |
1040 | up->next = up + 1; | |
1041 | else | |
1042 | up->next = NULL; | |
1da177e4 LT |
1043 | } |
1044 | ||
36764631 DM |
1045 | size = NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *); |
1046 | sunzilog_chip_regs = kzalloc(size, GFP_KERNEL); | |
1047 | if (!sunzilog_chip_regs) { | |
1048 | kfree(sunzilog_port_table); | |
1049 | sunzilog_irq_chain = NULL; | |
1050 | return -ENOMEM; | |
1da177e4 LT |
1051 | } |
1052 | ||
36764631 | 1053 | return 0; |
1da177e4 | 1054 | } |
1da177e4 | 1055 | |
36764631 | 1056 | static void sunzilog_free_tables(void) |
1da177e4 | 1057 | { |
36764631 DM |
1058 | kfree(sunzilog_port_table); |
1059 | sunzilog_irq_chain = NULL; | |
1060 | kfree(sunzilog_chip_regs); | |
1da177e4 LT |
1061 | } |
1062 | ||
1063 | #define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */ | |
1064 | ||
d358788f | 1065 | static void sunzilog_putchar(struct uart_port *port, int ch) |
1da177e4 | 1066 | { |
d358788f | 1067 | struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); |
1da177e4 LT |
1068 | int loops = ZS_PUT_CHAR_MAX_DELAY; |
1069 | ||
1070 | /* This is a timed polling loop so do not switch the explicit | |
1071 | * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM | |
1072 | */ | |
1073 | do { | |
36764631 | 1074 | unsigned char val = readb(&channel->control); |
1da177e4 LT |
1075 | if (val & Tx_BUF_EMP) { |
1076 | ZSDELAY(); | |
1077 | break; | |
1078 | } | |
1079 | udelay(5); | |
1080 | } while (--loops); | |
1081 | ||
36764631 | 1082 | writeb(ch, &channel->data); |
1da177e4 LT |
1083 | ZSDELAY(); |
1084 | ZS_WSYNC(channel); | |
1085 | } | |
1086 | ||
1087 | #ifdef CONFIG_SERIO | |
1088 | ||
1089 | static DEFINE_SPINLOCK(sunzilog_serio_lock); | |
1090 | ||
1091 | static int sunzilog_serio_write(struct serio *serio, unsigned char ch) | |
1092 | { | |
1093 | struct uart_sunzilog_port *up = serio->port_data; | |
1094 | unsigned long flags; | |
1095 | ||
1096 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1097 | ||
d358788f | 1098 | sunzilog_putchar(&up->port, ch); |
1da177e4 LT |
1099 | |
1100 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1101 | ||
1102 | return 0; | |
1103 | } | |
1104 | ||
1105 | static int sunzilog_serio_open(struct serio *serio) | |
1106 | { | |
1107 | struct uart_sunzilog_port *up = serio->port_data; | |
1108 | unsigned long flags; | |
1109 | int ret; | |
1110 | ||
1111 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1112 | if (!up->serio_open) { | |
1113 | up->serio_open = 1; | |
1114 | ret = 0; | |
1115 | } else | |
1116 | ret = -EBUSY; | |
1117 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1118 | ||
1119 | return ret; | |
1120 | } | |
1121 | ||
1122 | static void sunzilog_serio_close(struct serio *serio) | |
1123 | { | |
1124 | struct uart_sunzilog_port *up = serio->port_data; | |
1125 | unsigned long flags; | |
1126 | ||
1127 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1128 | up->serio_open = 0; | |
1129 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1130 | } | |
1131 | ||
1132 | #endif /* CONFIG_SERIO */ | |
1133 | ||
1134 | #ifdef CONFIG_SERIAL_SUNZILOG_CONSOLE | |
1135 | static void | |
1136 | sunzilog_console_write(struct console *con, const char *s, unsigned int count) | |
1137 | { | |
1138 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; | |
1da177e4 | 1139 | unsigned long flags; |
1da177e4 LT |
1140 | |
1141 | spin_lock_irqsave(&up->port.lock, flags); | |
d358788f | 1142 | uart_console_write(&up->port, s, count, sunzilog_putchar); |
1da177e4 LT |
1143 | udelay(2); |
1144 | spin_unlock_irqrestore(&up->port.lock, flags); | |
1145 | } | |
1146 | ||
1147 | static int __init sunzilog_console_setup(struct console *con, char *options) | |
1148 | { | |
1149 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; | |
1150 | unsigned long flags; | |
1151 | int baud, brg; | |
1152 | ||
1153 | printk(KERN_INFO "Console: ttyS%d (SunZilog zs%d)\n", | |
1154 | (sunzilog_reg.minor - 64) + con->index, con->index); | |
1155 | ||
1156 | /* Get firmware console settings. */ | |
1157 | sunserial_console_termios(con); | |
1158 | ||
1159 | /* Firmware console speed is limited to 150-->38400 baud so | |
1160 | * this hackish cflag thing is OK. | |
1161 | */ | |
1162 | switch (con->cflag & CBAUD) { | |
1163 | case B150: baud = 150; break; | |
1164 | case B300: baud = 300; break; | |
1165 | case B600: baud = 600; break; | |
1166 | case B1200: baud = 1200; break; | |
1167 | case B2400: baud = 2400; break; | |
1168 | case B4800: baud = 4800; break; | |
1169 | default: case B9600: baud = 9600; break; | |
1170 | case B19200: baud = 19200; break; | |
1171 | case B38400: baud = 38400; break; | |
1172 | }; | |
1173 | ||
1174 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1175 | ||
1176 | spin_lock_irqsave(&up->port.lock, flags); | |
1177 | ||
1178 | up->curregs[R15] = BRKIE; | |
1179 | sunzilog_convert_to_zs(up, con->cflag, 0, brg); | |
1180 | ||
1181 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); | |
1182 | __sunzilog_startup(up); | |
1183 | ||
1184 | spin_unlock_irqrestore(&up->port.lock, flags); | |
1185 | ||
1186 | return 0; | |
1187 | } | |
1188 | ||
1189 | static struct console sunzilog_console = { | |
1190 | .name = "ttyS", | |
1191 | .write = sunzilog_console_write, | |
1192 | .device = uart_console_device, | |
1193 | .setup = sunzilog_console_setup, | |
1194 | .flags = CON_PRINTBUFFER, | |
1195 | .index = -1, | |
1196 | .data = &sunzilog_reg, | |
1197 | }; | |
1da177e4 | 1198 | |
1ddb7c98 DM |
1199 | static inline struct console *SUNZILOG_CONSOLE(void) |
1200 | { | |
1201 | int i; | |
1202 | ||
1203 | if (con_is_present()) | |
1204 | return NULL; | |
1205 | ||
1206 | for (i = 0; i < NUM_CHANNELS; i++) { | |
1207 | int this_minor = sunzilog_reg.minor + i; | |
1208 | ||
1209 | if ((this_minor - 64) == (serial_console - 1)) | |
1210 | break; | |
1211 | } | |
1212 | if (i == NUM_CHANNELS) | |
1213 | return NULL; | |
1214 | ||
1215 | sunzilog_console.index = i; | |
1216 | sunzilog_port_table[i].flags |= SUNZILOG_FLAG_IS_CONS; | |
1217 | ||
1218 | return &sunzilog_console; | |
1219 | } | |
1220 | ||
1da177e4 | 1221 | #else |
1ddb7c98 | 1222 | #define SUNZILOG_CONSOLE() (NULL) |
1da177e4 LT |
1223 | #endif |
1224 | ||
1da177e4 LT |
1225 | static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel) |
1226 | { | |
1227 | int baud, brg; | |
1228 | ||
1229 | if (channel == KEYBOARD_LINE) { | |
1230 | up->flags |= SUNZILOG_FLAG_CONS_KEYB; | |
1231 | up->cflag = B1200 | CS8 | CLOCAL | CREAD; | |
1232 | baud = 1200; | |
1233 | } else { | |
1234 | up->flags |= SUNZILOG_FLAG_CONS_MOUSE; | |
1235 | up->cflag = B4800 | CS8 | CLOCAL | CREAD; | |
1236 | baud = 4800; | |
1237 | } | |
1da177e4 LT |
1238 | |
1239 | up->curregs[R15] = BRKIE; | |
1240 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1241 | sunzilog_convert_to_zs(up, up->cflag, 0, brg); | |
1242 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); | |
1243 | __sunzilog_startup(up); | |
1244 | } | |
1245 | ||
1246 | #ifdef CONFIG_SERIO | |
1247 | static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel) | |
1248 | { | |
36764631 | 1249 | struct serio *serio = &up->serio; |
1da177e4 | 1250 | |
36764631 | 1251 | serio->port_data = up; |
1da177e4 | 1252 | |
36764631 DM |
1253 | serio->id.type = SERIO_RS232; |
1254 | if (channel == KEYBOARD_LINE) { | |
1255 | serio->id.proto = SERIO_SUNKBD; | |
1256 | strlcpy(serio->name, "zskbd", sizeof(serio->name)); | |
1da177e4 | 1257 | } else { |
36764631 DM |
1258 | serio->id.proto = SERIO_SUN; |
1259 | serio->id.extra = 1; | |
1260 | strlcpy(serio->name, "zsms", sizeof(serio->name)); | |
1da177e4 | 1261 | } |
36764631 DM |
1262 | strlcpy(serio->phys, |
1263 | (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"), | |
1264 | sizeof(serio->phys)); | |
1265 | ||
1266 | serio->write = sunzilog_serio_write; | |
1267 | serio->open = sunzilog_serio_open; | |
1268 | serio->close = sunzilog_serio_close; | |
1269 | serio->dev.parent = up->port.dev; | |
1270 | ||
1271 | serio_register_port(serio); | |
1da177e4 LT |
1272 | } |
1273 | #endif | |
1274 | ||
36764631 | 1275 | static void __init sunzilog_init_hw(struct uart_sunzilog_port *up) |
1da177e4 | 1276 | { |
36764631 DM |
1277 | struct zilog_channel __iomem *channel; |
1278 | unsigned long flags; | |
1279 | int baud, brg; | |
1da177e4 | 1280 | |
36764631 | 1281 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); |
1da177e4 | 1282 | |
36764631 DM |
1283 | spin_lock_irqsave(&up->port.lock, flags); |
1284 | if (ZS_IS_CHANNEL_A(up)) { | |
1285 | write_zsreg(channel, R9, FHWRES); | |
1286 | ZSDELAY_LONG(); | |
1287 | (void) read_zsreg(channel, R0); | |
1288 | } | |
1da177e4 | 1289 | |
36764631 DM |
1290 | if (up->port.line == KEYBOARD_LINE || |
1291 | up->port.line == MOUSE_LINE) { | |
1292 | sunzilog_init_kbdms(up, up->port.line); | |
1293 | up->curregs[R9] |= (NV | MIE); | |
1294 | write_zsreg(channel, R9, up->curregs[R9]); | |
1295 | } else { | |
1296 | /* Normal serial TTY. */ | |
1297 | up->parity_mask = 0xff; | |
1298 | up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; | |
1299 | up->curregs[R4] = PAR_EVEN | X16CLK | SB1; | |
1300 | up->curregs[R3] = RxENAB | Rx8; | |
1301 | up->curregs[R5] = TxENAB | Tx8; | |
1302 | up->curregs[R9] = NV | MIE; | |
1303 | up->curregs[R10] = NRZ; | |
1304 | up->curregs[R11] = TCBR | RCBR; | |
1305 | baud = 9600; | |
1306 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1307 | up->curregs[R12] = (brg & 0xff); | |
1308 | up->curregs[R13] = (brg >> 8) & 0xff; | |
1309 | up->curregs[R14] = BRSRC | BRENAB; | |
1310 | __load_zsregs(channel, up->curregs); | |
1311 | write_zsreg(channel, R9, up->curregs[R9]); | |
1312 | } | |
1da177e4 | 1313 | |
36764631 | 1314 | spin_unlock_irqrestore(&up->port.lock, flags); |
1da177e4 LT |
1315 | |
1316 | #ifdef CONFIG_SERIO | |
36764631 DM |
1317 | if (up->port.line == KEYBOARD_LINE || up->port.line == MOUSE_LINE) |
1318 | sunzilog_register_serio(up, up->port.line); | |
1da177e4 | 1319 | #endif |
1da177e4 LT |
1320 | } |
1321 | ||
36764631 | 1322 | static int __devinit zs_get_instance(struct device_node *dp) |
1da177e4 | 1323 | { |
1da177e4 | 1324 | int ret; |
1da177e4 | 1325 | |
36764631 DM |
1326 | ret = of_getintprop_default(dp, "slave", -1); |
1327 | if (ret != -1) | |
1328 | return ret; | |
1da177e4 | 1329 | |
36764631 DM |
1330 | if (of_find_property(dp, "keyboard", NULL)) |
1331 | ret = 1; | |
1332 | else | |
1333 | ret = 0; | |
1da177e4 | 1334 | |
36764631 DM |
1335 | return ret; |
1336 | } | |
1da177e4 | 1337 | |
36764631 DM |
1338 | static int __devinit zs_probe(struct of_device *dev, const struct of_device_id *match) |
1339 | { | |
1340 | static int zilog_irq = -1; | |
1341 | struct of_device *op = to_of_device(&dev->dev); | |
1342 | struct uart_sunzilog_port *up; | |
1343 | struct zilog_layout __iomem *rp; | |
1344 | int inst = zs_get_instance(dev->node); | |
1345 | int err; | |
1da177e4 | 1346 | |
36764631 DM |
1347 | sunzilog_chip_regs[inst] = of_ioremap(&op->resource[0], 0, |
1348 | sizeof(struct zilog_layout), | |
1349 | "zs"); | |
1350 | if (!sunzilog_chip_regs[inst]) | |
1351 | return -ENOMEM; | |
1da177e4 | 1352 | |
36764631 | 1353 | rp = sunzilog_chip_regs[inst]; |
1da177e4 | 1354 | |
36764631 DM |
1355 | if (zilog_irq == -1) { |
1356 | zilog_irq = op->irqs[0]; | |
1357 | err = request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ, | |
1358 | "zs", sunzilog_irq_chain); | |
1359 | if (err) { | |
1360 | of_iounmap(rp, sizeof(struct zilog_layout)); | |
1da177e4 | 1361 | |
36764631 DM |
1362 | return err; |
1363 | } | |
1da177e4 | 1364 | } |
1ddb7c98 | 1365 | |
36764631 DM |
1366 | up = &sunzilog_port_table[inst * 2]; |
1367 | ||
1368 | /* Channel A */ | |
1369 | up[0].port.mapbase = op->resource[0].start + 0x00; | |
1370 | up[0].port.membase = (void __iomem *) &rp->channelA; | |
1371 | up[0].port.iotype = UPIO_MEM; | |
1372 | up[0].port.irq = op->irqs[0]; | |
1373 | up[0].port.uartclk = ZS_CLOCK; | |
1374 | up[0].port.fifosize = 1; | |
1375 | up[0].port.ops = &sunzilog_pops; | |
1376 | up[0].port.type = PORT_SUNZILOG; | |
1377 | up[0].port.flags = 0; | |
1378 | up[0].port.line = (inst * 2) + 0; | |
1379 | up[0].port.dev = &op->dev; | |
1380 | up[0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A; | |
1381 | if (inst == 1) | |
1382 | up[0].flags |= SUNZILOG_FLAG_CONS_KEYB; | |
1383 | sunzilog_init_hw(&up[0]); | |
1384 | ||
1385 | /* Channel B */ | |
1386 | up[1].port.mapbase = op->resource[0].start + 0x04; | |
1387 | up[1].port.membase = (void __iomem *) &rp->channelB; | |
1388 | up[1].port.iotype = UPIO_MEM; | |
1389 | up[1].port.irq = op->irqs[0]; | |
1390 | up[1].port.uartclk = ZS_CLOCK; | |
1391 | up[1].port.fifosize = 1; | |
1392 | up[1].port.ops = &sunzilog_pops; | |
1393 | up[1].port.type = PORT_SUNZILOG; | |
1394 | up[1].port.flags = 0; | |
1395 | up[1].port.line = (inst * 2) + 1; | |
1396 | up[1].port.dev = &op->dev; | |
1397 | up[1].flags |= 0; | |
1398 | if (inst == 1) | |
1399 | up[1].flags |= SUNZILOG_FLAG_CONS_MOUSE; | |
1400 | sunzilog_init_hw(&up[1]); | |
1401 | ||
1402 | if (inst != 1) { | |
1403 | err = uart_add_one_port(&sunzilog_reg, &up[0].port); | |
1404 | if (err) { | |
1405 | of_iounmap(rp, sizeof(struct zilog_layout)); | |
1406 | return err; | |
1407 | } | |
1408 | err = uart_add_one_port(&sunzilog_reg, &up[1].port); | |
1409 | if (err) { | |
1410 | uart_remove_one_port(&sunzilog_reg, &up[0].port); | |
1411 | of_iounmap(rp, sizeof(struct zilog_layout)); | |
1412 | return err; | |
1da177e4 LT |
1413 | } |
1414 | } | |
1415 | ||
36764631 | 1416 | return 0; |
1da177e4 LT |
1417 | } |
1418 | ||
36764631 | 1419 | static int __devexit zs_remove(struct of_device *dev) |
1da177e4 | 1420 | { |
36764631 DM |
1421 | struct uart_sunzilog_port *up = dev_get_drvdata(&dev->dev); |
1422 | struct zilog_channel __iomem *channel; | |
1da177e4 | 1423 | |
36764631 DM |
1424 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) { |
1425 | #ifdef CONFIG_SERIO | |
1426 | serio_unregister_port(&up->serio); | |
1427 | #endif | |
1428 | } else | |
1429 | uart_remove_one_port(&sunzilog_reg, &up->port); | |
1da177e4 | 1430 | |
36764631 | 1431 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); |
1da177e4 | 1432 | |
36764631 | 1433 | of_iounmap(channel, sizeof(struct zilog_channel)); |
1da177e4 | 1434 | |
36764631 | 1435 | return 0; |
1da177e4 LT |
1436 | } |
1437 | ||
36764631 DM |
1438 | static struct of_device_id zs_match[] = { |
1439 | { | |
1440 | .name = "zs", | |
1441 | }, | |
1442 | {}, | |
1443 | }; | |
1444 | MODULE_DEVICE_TABLE(of, zs_match); | |
1445 | ||
1446 | static struct of_platform_driver zs_driver = { | |
1447 | .name = "zs", | |
1448 | .match_table = zs_match, | |
1449 | .probe = zs_probe, | |
1450 | .remove = __devexit_p(zs_remove), | |
1451 | }; | |
1452 | ||
1da177e4 LT |
1453 | static int __init sunzilog_init(void) |
1454 | { | |
36764631 DM |
1455 | struct device_node *dp; |
1456 | int err; | |
1da177e4 | 1457 | |
36764631 DM |
1458 | NUM_SUNZILOG = 0; |
1459 | for_each_node_by_name(dp, "zs") | |
1460 | NUM_SUNZILOG++; | |
1da177e4 | 1461 | |
36764631 DM |
1462 | if (NUM_SUNZILOG) { |
1463 | int uart_count; | |
1da177e4 | 1464 | |
36764631 DM |
1465 | err = sunzilog_alloc_tables(); |
1466 | if (err) | |
1467 | return err; | |
1da177e4 | 1468 | |
36764631 DM |
1469 | /* Subtract 1 for keyboard, 1 for mouse. */ |
1470 | uart_count = (NUM_SUNZILOG * 2) - 2; | |
1471 | ||
1472 | sunzilog_reg.nr = uart_count; | |
1473 | sunzilog_reg.minor = sunserial_current_minor; | |
1474 | err = uart_register_driver(&sunzilog_reg); | |
1475 | if (err) { | |
1476 | sunzilog_free_tables(); | |
1477 | return err; | |
1478 | } | |
1479 | sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64; | |
1480 | sunzilog_reg.cons = SUNZILOG_CONSOLE(); | |
1481 | ||
1482 | sunserial_current_minor += uart_count; | |
1483 | } | |
1484 | ||
1485 | return of_register_driver(&zs_driver, &of_bus_type); | |
1da177e4 LT |
1486 | } |
1487 | ||
1488 | static void __exit sunzilog_exit(void) | |
1489 | { | |
36764631 | 1490 | of_unregister_driver(&zs_driver); |
1da177e4 | 1491 | |
36764631 DM |
1492 | if (NUM_SUNZILOG) { |
1493 | uart_unregister_driver(&sunzilog_reg); | |
1494 | sunzilog_free_tables(); | |
1da177e4 | 1495 | } |
1da177e4 LT |
1496 | } |
1497 | ||
1498 | module_init(sunzilog_init); | |
1499 | module_exit(sunzilog_exit); | |
1500 | ||
1501 | MODULE_AUTHOR("David S. Miller"); | |
1502 | MODULE_DESCRIPTION("Sun Zilog serial port driver"); | |
1503 | MODULE_LICENSE("GPL"); |