Commit | Line | Data |
---|---|---|
36764631 | 1 | /* sunzilog.c: Zilog serial driver for Sparc systems. |
1da177e4 LT |
2 | * |
3 | * Driver for Zilog serial chips found on Sun workstations and | |
4 | * servers. This driver could actually be made more generic. | |
5 | * | |
6 | * This is based on the old drivers/sbus/char/zs.c code. A lot | |
7 | * of code has been simply moved over directly from there but | |
8 | * much has been rewritten. Credits therefore go out to Eddie | |
9 | * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their | |
10 | * work there. | |
11 | * | |
36764631 | 12 | * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
13 | */ |
14 | ||
1da177e4 LT |
15 | #include <linux/module.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/tty.h> | |
21 | #include <linux/tty_flip.h> | |
22 | #include <linux/major.h> | |
23 | #include <linux/string.h> | |
24 | #include <linux/ptrace.h> | |
25 | #include <linux/ioport.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/circ_buf.h> | |
28 | #include <linux/serial.h> | |
29 | #include <linux/sysrq.h> | |
30 | #include <linux/console.h> | |
31 | #include <linux/spinlock.h> | |
32 | #ifdef CONFIG_SERIO | |
33 | #include <linux/serio.h> | |
34 | #endif | |
35 | #include <linux/init.h> | |
36 | ||
37 | #include <asm/io.h> | |
38 | #include <asm/irq.h> | |
36764631 DM |
39 | #include <asm/prom.h> |
40 | #include <asm/of_device.h> | |
1da177e4 LT |
41 | |
42 | #if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
43 | #define SUPPORT_SYSRQ | |
44 | #endif | |
45 | ||
46 | #include <linux/serial_core.h> | |
47 | ||
48 | #include "suncore.h" | |
49 | #include "sunzilog.h" | |
50 | ||
51 | /* On 32-bit sparcs we need to delay after register accesses | |
52 | * to accommodate sun4 systems, but we do not need to flush writes. | |
53 | * On 64-bit sparc we only need to flush single writes to ensure | |
54 | * completion. | |
55 | */ | |
56 | #ifndef CONFIG_SPARC64 | |
57 | #define ZSDELAY() udelay(5) | |
58 | #define ZSDELAY_LONG() udelay(20) | |
59 | #define ZS_WSYNC(channel) do { } while (0) | |
60 | #else | |
61 | #define ZSDELAY() | |
62 | #define ZSDELAY_LONG() | |
63 | #define ZS_WSYNC(__channel) \ | |
36764631 | 64 | readb(&((__channel)->control)) |
1da177e4 LT |
65 | #endif |
66 | ||
67 | static int num_sunzilog; | |
68 | #define NUM_SUNZILOG num_sunzilog | |
69 | #define NUM_CHANNELS (NUM_SUNZILOG * 2) | |
70 | ||
71 | #define KEYBOARD_LINE 0x2 | |
72 | #define MOUSE_LINE 0x3 | |
73 | ||
74 | #define ZS_CLOCK 4915200 /* Zilog input clock rate. */ | |
75 | #define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */ | |
76 | ||
77 | /* | |
78 | * We wrap our port structure around the generic uart_port. | |
79 | */ | |
80 | struct uart_sunzilog_port { | |
81 | struct uart_port port; | |
82 | ||
83 | /* IRQ servicing chain. */ | |
84 | struct uart_sunzilog_port *next; | |
85 | ||
86 | /* Current values of Zilog write registers. */ | |
87 | unsigned char curregs[NUM_ZSREGS]; | |
88 | ||
89 | unsigned int flags; | |
90 | #define SUNZILOG_FLAG_CONS_KEYB 0x00000001 | |
91 | #define SUNZILOG_FLAG_CONS_MOUSE 0x00000002 | |
92 | #define SUNZILOG_FLAG_IS_CONS 0x00000004 | |
93 | #define SUNZILOG_FLAG_IS_KGDB 0x00000008 | |
94 | #define SUNZILOG_FLAG_MODEM_STATUS 0x00000010 | |
95 | #define SUNZILOG_FLAG_IS_CHANNEL_A 0x00000020 | |
96 | #define SUNZILOG_FLAG_REGS_HELD 0x00000040 | |
97 | #define SUNZILOG_FLAG_TX_STOPPED 0x00000080 | |
98 | #define SUNZILOG_FLAG_TX_ACTIVE 0x00000100 | |
99 | ||
100 | unsigned int cflag; | |
101 | ||
102 | unsigned char parity_mask; | |
103 | unsigned char prev_status; | |
104 | ||
105 | #ifdef CONFIG_SERIO | |
36764631 | 106 | struct serio serio; |
1da177e4 LT |
107 | int serio_open; |
108 | #endif | |
109 | }; | |
110 | ||
111 | #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase)) | |
112 | #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT)) | |
113 | ||
114 | #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB) | |
115 | #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE) | |
116 | #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS) | |
117 | #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB) | |
118 | #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS) | |
119 | #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CHANNEL_A) | |
120 | #define ZS_REGS_HELD(UP) ((UP)->flags & SUNZILOG_FLAG_REGS_HELD) | |
121 | #define ZS_TX_STOPPED(UP) ((UP)->flags & SUNZILOG_FLAG_TX_STOPPED) | |
122 | #define ZS_TX_ACTIVE(UP) ((UP)->flags & SUNZILOG_FLAG_TX_ACTIVE) | |
123 | ||
124 | /* Reading and writing Zilog8530 registers. The delays are to make this | |
125 | * driver work on the Sun4 which needs a settling delay after each chip | |
126 | * register access, other machines handle this in hardware via auxiliary | |
127 | * flip-flops which implement the settle time we do in software. | |
128 | * | |
129 | * The port lock must be held and local IRQs must be disabled | |
130 | * when {read,write}_zsreg is invoked. | |
131 | */ | |
132 | static unsigned char read_zsreg(struct zilog_channel __iomem *channel, | |
133 | unsigned char reg) | |
134 | { | |
135 | unsigned char retval; | |
136 | ||
36764631 | 137 | writeb(reg, &channel->control); |
1da177e4 | 138 | ZSDELAY(); |
36764631 | 139 | retval = readb(&channel->control); |
1da177e4 LT |
140 | ZSDELAY(); |
141 | ||
142 | return retval; | |
143 | } | |
144 | ||
145 | static void write_zsreg(struct zilog_channel __iomem *channel, | |
146 | unsigned char reg, unsigned char value) | |
147 | { | |
36764631 | 148 | writeb(reg, &channel->control); |
1da177e4 | 149 | ZSDELAY(); |
36764631 | 150 | writeb(value, &channel->control); |
1da177e4 LT |
151 | ZSDELAY(); |
152 | } | |
153 | ||
154 | static void sunzilog_clear_fifo(struct zilog_channel __iomem *channel) | |
155 | { | |
156 | int i; | |
157 | ||
158 | for (i = 0; i < 32; i++) { | |
159 | unsigned char regval; | |
160 | ||
36764631 | 161 | regval = readb(&channel->control); |
1da177e4 LT |
162 | ZSDELAY(); |
163 | if (regval & Rx_CH_AV) | |
164 | break; | |
165 | ||
166 | regval = read_zsreg(channel, R1); | |
36764631 | 167 | readb(&channel->data); |
1da177e4 LT |
168 | ZSDELAY(); |
169 | ||
170 | if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { | |
36764631 | 171 | writeb(ERR_RES, &channel->control); |
1da177e4 LT |
172 | ZSDELAY(); |
173 | ZS_WSYNC(channel); | |
174 | } | |
175 | } | |
176 | } | |
177 | ||
178 | /* This function must only be called when the TX is not busy. The UART | |
179 | * port lock must be held and local interrupts disabled. | |
180 | */ | |
181 | static void __load_zsregs(struct zilog_channel __iomem *channel, unsigned char *regs) | |
182 | { | |
183 | int i; | |
184 | ||
185 | /* Let pending transmits finish. */ | |
186 | for (i = 0; i < 1000; i++) { | |
187 | unsigned char stat = read_zsreg(channel, R1); | |
188 | if (stat & ALL_SNT) | |
189 | break; | |
190 | udelay(100); | |
191 | } | |
192 | ||
36764631 | 193 | writeb(ERR_RES, &channel->control); |
1da177e4 LT |
194 | ZSDELAY(); |
195 | ZS_WSYNC(channel); | |
196 | ||
197 | sunzilog_clear_fifo(channel); | |
198 | ||
199 | /* Disable all interrupts. */ | |
200 | write_zsreg(channel, R1, | |
201 | regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); | |
202 | ||
203 | /* Set parity, sync config, stop bits, and clock divisor. */ | |
204 | write_zsreg(channel, R4, regs[R4]); | |
205 | ||
206 | /* Set misc. TX/RX control bits. */ | |
207 | write_zsreg(channel, R10, regs[R10]); | |
208 | ||
209 | /* Set TX/RX controls sans the enable bits. */ | |
210 | write_zsreg(channel, R3, regs[R3] & ~RxENAB); | |
211 | write_zsreg(channel, R5, regs[R5] & ~TxENAB); | |
212 | ||
213 | /* Synchronous mode config. */ | |
214 | write_zsreg(channel, R6, regs[R6]); | |
215 | write_zsreg(channel, R7, regs[R7]); | |
216 | ||
217 | /* Don't mess with the interrupt vector (R2, unused by us) and | |
218 | * master interrupt control (R9). We make sure this is setup | |
219 | * properly at probe time then never touch it again. | |
220 | */ | |
221 | ||
222 | /* Disable baud generator. */ | |
223 | write_zsreg(channel, R14, regs[R14] & ~BRENAB); | |
224 | ||
225 | /* Clock mode control. */ | |
226 | write_zsreg(channel, R11, regs[R11]); | |
227 | ||
228 | /* Lower and upper byte of baud rate generator divisor. */ | |
229 | write_zsreg(channel, R12, regs[R12]); | |
230 | write_zsreg(channel, R13, regs[R13]); | |
231 | ||
232 | /* Now rewrite R14, with BRENAB (if set). */ | |
233 | write_zsreg(channel, R14, regs[R14]); | |
234 | ||
235 | /* External status interrupt control. */ | |
236 | write_zsreg(channel, R15, regs[R15]); | |
237 | ||
238 | /* Reset external status interrupts. */ | |
239 | write_zsreg(channel, R0, RES_EXT_INT); | |
240 | write_zsreg(channel, R0, RES_EXT_INT); | |
241 | ||
242 | /* Rewrite R3/R5, this time without enables masked. */ | |
243 | write_zsreg(channel, R3, regs[R3]); | |
244 | write_zsreg(channel, R5, regs[R5]); | |
245 | ||
246 | /* Rewrite R1, this time without IRQ enabled masked. */ | |
247 | write_zsreg(channel, R1, regs[R1]); | |
248 | } | |
249 | ||
250 | /* Reprogram the Zilog channel HW registers with the copies found in the | |
251 | * software state struct. If the transmitter is busy, we defer this update | |
252 | * until the next TX complete interrupt. Else, we do it right now. | |
253 | * | |
254 | * The UART port lock must be held and local interrupts disabled. | |
255 | */ | |
256 | static void sunzilog_maybe_update_regs(struct uart_sunzilog_port *up, | |
257 | struct zilog_channel __iomem *channel) | |
258 | { | |
259 | if (!ZS_REGS_HELD(up)) { | |
260 | if (ZS_TX_ACTIVE(up)) { | |
261 | up->flags |= SUNZILOG_FLAG_REGS_HELD; | |
262 | } else { | |
263 | __load_zsregs(channel, up->curregs); | |
264 | } | |
265 | } | |
266 | } | |
267 | ||
268 | static void sunzilog_change_mouse_baud(struct uart_sunzilog_port *up) | |
269 | { | |
270 | unsigned int cur_cflag = up->cflag; | |
271 | int brg, new_baud; | |
272 | ||
273 | up->cflag &= ~CBAUD; | |
274 | up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); | |
275 | ||
276 | brg = BPS_TO_BRG(new_baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
277 | up->curregs[R12] = (brg & 0xff); | |
278 | up->curregs[R13] = (brg >> 8) & 0xff; | |
279 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(&up->port)); | |
280 | } | |
281 | ||
282 | static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up, | |
283 | unsigned char ch, int is_break, | |
284 | struct pt_regs *regs) | |
285 | { | |
286 | if (ZS_IS_KEYB(up)) { | |
287 | /* Stop-A is handled by drivers/char/keyboard.c now. */ | |
288 | #ifdef CONFIG_SERIO | |
289 | if (up->serio_open) | |
36764631 | 290 | serio_interrupt(&up->serio, ch, 0, regs); |
1da177e4 LT |
291 | #endif |
292 | } else if (ZS_IS_MOUSE(up)) { | |
293 | int ret = suncore_mouse_baud_detection(ch, is_break); | |
294 | ||
295 | switch (ret) { | |
296 | case 2: | |
297 | sunzilog_change_mouse_baud(up); | |
298 | /* fallthru */ | |
299 | case 1: | |
300 | break; | |
301 | ||
302 | case 0: | |
303 | #ifdef CONFIG_SERIO | |
304 | if (up->serio_open) | |
36764631 | 305 | serio_interrupt(&up->serio, ch, 0, regs); |
1da177e4 LT |
306 | #endif |
307 | break; | |
308 | }; | |
309 | } | |
310 | } | |
311 | ||
312 | static struct tty_struct * | |
313 | sunzilog_receive_chars(struct uart_sunzilog_port *up, | |
314 | struct zilog_channel __iomem *channel, | |
315 | struct pt_regs *regs) | |
316 | { | |
317 | struct tty_struct *tty; | |
33f0f88f | 318 | unsigned char ch, r1, flag; |
1da177e4 LT |
319 | |
320 | tty = NULL; | |
321 | if (up->port.info != NULL && /* Unopened serial console */ | |
322 | up->port.info->tty != NULL) /* Keyboard || mouse */ | |
323 | tty = up->port.info->tty; | |
324 | ||
325 | for (;;) { | |
326 | ||
327 | r1 = read_zsreg(channel, R1); | |
328 | if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) { | |
36764631 | 329 | writeb(ERR_RES, &channel->control); |
1da177e4 LT |
330 | ZSDELAY(); |
331 | ZS_WSYNC(channel); | |
332 | } | |
333 | ||
36764631 | 334 | ch = readb(&channel->control); |
1da177e4 LT |
335 | ZSDELAY(); |
336 | ||
337 | /* This funny hack depends upon BRK_ABRT not interfering | |
338 | * with the other bits we care about in R1. | |
339 | */ | |
340 | if (ch & BRK_ABRT) | |
341 | r1 |= BRK_ABRT; | |
342 | ||
343 | if (!(ch & Rx_CH_AV)) | |
344 | break; | |
345 | ||
36764631 | 346 | ch = readb(&channel->data); |
1da177e4 LT |
347 | ZSDELAY(); |
348 | ||
349 | ch &= up->parity_mask; | |
350 | ||
351 | if (unlikely(ZS_IS_KEYB(up)) || unlikely(ZS_IS_MOUSE(up))) { | |
352 | sunzilog_kbdms_receive_chars(up, ch, 0, regs); | |
353 | continue; | |
354 | } | |
355 | ||
356 | if (tty == NULL) { | |
357 | uart_handle_sysrq_char(&up->port, ch, regs); | |
358 | continue; | |
359 | } | |
360 | ||
1da177e4 | 361 | /* A real serial line, record the character and status. */ |
33f0f88f | 362 | flag = TTY_NORMAL; |
1da177e4 LT |
363 | up->port.icount.rx++; |
364 | if (r1 & (BRK_ABRT | PAR_ERR | Rx_OVR | CRC_ERR)) { | |
365 | if (r1 & BRK_ABRT) { | |
366 | r1 &= ~(PAR_ERR | CRC_ERR); | |
367 | up->port.icount.brk++; | |
368 | if (uart_handle_break(&up->port)) | |
369 | continue; | |
370 | } | |
371 | else if (r1 & PAR_ERR) | |
372 | up->port.icount.parity++; | |
373 | else if (r1 & CRC_ERR) | |
374 | up->port.icount.frame++; | |
375 | if (r1 & Rx_OVR) | |
376 | up->port.icount.overrun++; | |
377 | r1 &= up->port.read_status_mask; | |
378 | if (r1 & BRK_ABRT) | |
33f0f88f | 379 | flag = TTY_BREAK; |
1da177e4 | 380 | else if (r1 & PAR_ERR) |
33f0f88f | 381 | flag = TTY_PARITY; |
1da177e4 | 382 | else if (r1 & CRC_ERR) |
33f0f88f | 383 | flag = TTY_FRAME; |
1da177e4 LT |
384 | } |
385 | if (uart_handle_sysrq_char(&up->port, ch, regs)) | |
386 | continue; | |
387 | ||
388 | if (up->port.ignore_status_mask == 0xff || | |
389 | (r1 & up->port.ignore_status_mask) == 0) { | |
33f0f88f | 390 | tty_insert_flip_char(tty, ch, flag); |
1da177e4 | 391 | } |
33f0f88f AC |
392 | if (r1 & Rx_OVR) |
393 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
1da177e4 LT |
394 | } |
395 | ||
396 | return tty; | |
397 | } | |
398 | ||
399 | static void sunzilog_status_handle(struct uart_sunzilog_port *up, | |
400 | struct zilog_channel __iomem *channel, | |
401 | struct pt_regs *regs) | |
402 | { | |
403 | unsigned char status; | |
404 | ||
36764631 | 405 | status = readb(&channel->control); |
1da177e4 LT |
406 | ZSDELAY(); |
407 | ||
36764631 | 408 | writeb(RES_EXT_INT, &channel->control); |
1da177e4 LT |
409 | ZSDELAY(); |
410 | ZS_WSYNC(channel); | |
411 | ||
412 | if (status & BRK_ABRT) { | |
413 | if (ZS_IS_MOUSE(up)) | |
414 | sunzilog_kbdms_receive_chars(up, 0, 1, regs); | |
415 | if (ZS_IS_CONS(up)) { | |
416 | /* Wait for BREAK to deassert to avoid potentially | |
417 | * confusing the PROM. | |
418 | */ | |
419 | while (1) { | |
36764631 | 420 | status = readb(&channel->control); |
1da177e4 LT |
421 | ZSDELAY(); |
422 | if (!(status & BRK_ABRT)) | |
423 | break; | |
424 | } | |
425 | sun_do_break(); | |
426 | return; | |
427 | } | |
428 | } | |
429 | ||
430 | if (ZS_WANTS_MODEM_STATUS(up)) { | |
431 | if (status & SYNC) | |
432 | up->port.icount.dsr++; | |
433 | ||
434 | /* The Zilog just gives us an interrupt when DCD/CTS/etc. change. | |
435 | * But it does not tell us which bit has changed, we have to keep | |
436 | * track of this ourselves. | |
437 | */ | |
438 | if ((status ^ up->prev_status) ^ DCD) | |
439 | uart_handle_dcd_change(&up->port, | |
440 | (status & DCD)); | |
441 | if ((status ^ up->prev_status) ^ CTS) | |
442 | uart_handle_cts_change(&up->port, | |
443 | (status & CTS)); | |
444 | ||
445 | wake_up_interruptible(&up->port.info->delta_msr_wait); | |
446 | } | |
447 | ||
448 | up->prev_status = status; | |
449 | } | |
450 | ||
451 | static void sunzilog_transmit_chars(struct uart_sunzilog_port *up, | |
452 | struct zilog_channel __iomem *channel) | |
453 | { | |
454 | struct circ_buf *xmit; | |
455 | ||
456 | if (ZS_IS_CONS(up)) { | |
36764631 | 457 | unsigned char status = readb(&channel->control); |
1da177e4 LT |
458 | ZSDELAY(); |
459 | ||
460 | /* TX still busy? Just wait for the next TX done interrupt. | |
461 | * | |
462 | * It can occur because of how we do serial console writes. It would | |
463 | * be nice to transmit console writes just like we normally would for | |
464 | * a TTY line. (ie. buffered and TX interrupt driven). That is not | |
465 | * easy because console writes cannot sleep. One solution might be | |
466 | * to poll on enough port->xmit space becomming free. -DaveM | |
467 | */ | |
468 | if (!(status & Tx_BUF_EMP)) | |
469 | return; | |
470 | } | |
471 | ||
472 | up->flags &= ~SUNZILOG_FLAG_TX_ACTIVE; | |
473 | ||
474 | if (ZS_REGS_HELD(up)) { | |
475 | __load_zsregs(channel, up->curregs); | |
476 | up->flags &= ~SUNZILOG_FLAG_REGS_HELD; | |
477 | } | |
478 | ||
479 | if (ZS_TX_STOPPED(up)) { | |
480 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; | |
481 | goto ack_tx_int; | |
482 | } | |
483 | ||
484 | if (up->port.x_char) { | |
485 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
36764631 | 486 | writeb(up->port.x_char, &channel->data); |
1da177e4 LT |
487 | ZSDELAY(); |
488 | ZS_WSYNC(channel); | |
489 | ||
490 | up->port.icount.tx++; | |
491 | up->port.x_char = 0; | |
492 | return; | |
493 | } | |
494 | ||
495 | if (up->port.info == NULL) | |
496 | goto ack_tx_int; | |
497 | xmit = &up->port.info->xmit; | |
b8df110f | 498 | if (uart_circ_empty(xmit)) |
1da177e4 | 499 | goto ack_tx_int; |
b8df110f | 500 | |
1da177e4 LT |
501 | if (uart_tx_stopped(&up->port)) |
502 | goto ack_tx_int; | |
503 | ||
504 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
36764631 | 505 | writeb(xmit->buf[xmit->tail], &channel->data); |
1da177e4 LT |
506 | ZSDELAY(); |
507 | ZS_WSYNC(channel); | |
508 | ||
509 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
510 | up->port.icount.tx++; | |
511 | ||
512 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
513 | uart_write_wakeup(&up->port); | |
514 | ||
515 | return; | |
516 | ||
517 | ack_tx_int: | |
36764631 | 518 | writeb(RES_Tx_P, &channel->control); |
1da177e4 LT |
519 | ZSDELAY(); |
520 | ZS_WSYNC(channel); | |
521 | } | |
522 | ||
523 | static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
524 | { | |
525 | struct uart_sunzilog_port *up = dev_id; | |
526 | ||
527 | while (up) { | |
528 | struct zilog_channel __iomem *channel | |
529 | = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
530 | struct tty_struct *tty; | |
531 | unsigned char r3; | |
532 | ||
533 | spin_lock(&up->port.lock); | |
534 | r3 = read_zsreg(channel, R3); | |
535 | ||
536 | /* Channel A */ | |
537 | tty = NULL; | |
538 | if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { | |
36764631 | 539 | writeb(RES_H_IUS, &channel->control); |
1da177e4 LT |
540 | ZSDELAY(); |
541 | ZS_WSYNC(channel); | |
542 | ||
543 | if (r3 & CHARxIP) | |
544 | tty = sunzilog_receive_chars(up, channel, regs); | |
545 | if (r3 & CHAEXT) | |
546 | sunzilog_status_handle(up, channel, regs); | |
547 | if (r3 & CHATxIP) | |
548 | sunzilog_transmit_chars(up, channel); | |
549 | } | |
550 | spin_unlock(&up->port.lock); | |
551 | ||
552 | if (tty) | |
553 | tty_flip_buffer_push(tty); | |
554 | ||
555 | /* Channel B */ | |
556 | up = up->next; | |
557 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
558 | ||
559 | spin_lock(&up->port.lock); | |
560 | tty = NULL; | |
561 | if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { | |
36764631 | 562 | writeb(RES_H_IUS, &channel->control); |
1da177e4 LT |
563 | ZSDELAY(); |
564 | ZS_WSYNC(channel); | |
565 | ||
566 | if (r3 & CHBRxIP) | |
567 | tty = sunzilog_receive_chars(up, channel, regs); | |
568 | if (r3 & CHBEXT) | |
569 | sunzilog_status_handle(up, channel, regs); | |
570 | if (r3 & CHBTxIP) | |
571 | sunzilog_transmit_chars(up, channel); | |
572 | } | |
573 | spin_unlock(&up->port.lock); | |
574 | ||
575 | if (tty) | |
576 | tty_flip_buffer_push(tty); | |
577 | ||
578 | up = up->next; | |
579 | } | |
580 | ||
581 | return IRQ_HANDLED; | |
582 | } | |
583 | ||
584 | /* A convenient way to quickly get R0 status. The caller must _not_ hold the | |
585 | * port lock, it is acquired here. | |
586 | */ | |
587 | static __inline__ unsigned char sunzilog_read_channel_status(struct uart_port *port) | |
588 | { | |
589 | struct zilog_channel __iomem *channel; | |
1da177e4 LT |
590 | unsigned char status; |
591 | ||
1da177e4 | 592 | channel = ZILOG_CHANNEL_FROM_PORT(port); |
36764631 | 593 | status = readb(&channel->control); |
1da177e4 LT |
594 | ZSDELAY(); |
595 | ||
1da177e4 LT |
596 | return status; |
597 | } | |
598 | ||
599 | /* The port lock is not held. */ | |
600 | static unsigned int sunzilog_tx_empty(struct uart_port *port) | |
601 | { | |
c5f4644e | 602 | unsigned long flags; |
1da177e4 LT |
603 | unsigned char status; |
604 | unsigned int ret; | |
605 | ||
c5f4644e RK |
606 | spin_lock_irqsave(&port->lock, flags); |
607 | ||
1da177e4 | 608 | status = sunzilog_read_channel_status(port); |
c5f4644e RK |
609 | |
610 | spin_unlock_irqrestore(&port->lock, flags); | |
611 | ||
1da177e4 LT |
612 | if (status & Tx_BUF_EMP) |
613 | ret = TIOCSER_TEMT; | |
614 | else | |
615 | ret = 0; | |
616 | ||
617 | return ret; | |
618 | } | |
619 | ||
c5f4644e | 620 | /* The port lock is held and interrupts are disabled. */ |
1da177e4 LT |
621 | static unsigned int sunzilog_get_mctrl(struct uart_port *port) |
622 | { | |
623 | unsigned char status; | |
624 | unsigned int ret; | |
625 | ||
626 | status = sunzilog_read_channel_status(port); | |
627 | ||
628 | ret = 0; | |
629 | if (status & DCD) | |
630 | ret |= TIOCM_CAR; | |
631 | if (status & SYNC) | |
632 | ret |= TIOCM_DSR; | |
633 | if (status & CTS) | |
634 | ret |= TIOCM_CTS; | |
635 | ||
636 | return ret; | |
637 | } | |
638 | ||
639 | /* The port lock is held and interrupts are disabled. */ | |
640 | static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
641 | { | |
642 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
643 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
644 | unsigned char set_bits, clear_bits; | |
645 | ||
646 | set_bits = clear_bits = 0; | |
647 | ||
648 | if (mctrl & TIOCM_RTS) | |
649 | set_bits |= RTS; | |
650 | else | |
651 | clear_bits |= RTS; | |
652 | if (mctrl & TIOCM_DTR) | |
653 | set_bits |= DTR; | |
654 | else | |
655 | clear_bits |= DTR; | |
656 | ||
657 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
658 | up->curregs[R5] |= set_bits; | |
659 | up->curregs[R5] &= ~clear_bits; | |
660 | write_zsreg(channel, R5, up->curregs[R5]); | |
661 | } | |
662 | ||
663 | /* The port lock is held and interrupts are disabled. */ | |
b129a8cc | 664 | static void sunzilog_stop_tx(struct uart_port *port) |
1da177e4 LT |
665 | { |
666 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
667 | ||
668 | up->flags |= SUNZILOG_FLAG_TX_STOPPED; | |
669 | } | |
670 | ||
671 | /* The port lock is held and interrupts are disabled. */ | |
b129a8cc | 672 | static void sunzilog_start_tx(struct uart_port *port) |
1da177e4 LT |
673 | { |
674 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
675 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
676 | unsigned char status; | |
677 | ||
678 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
679 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; | |
680 | ||
36764631 | 681 | status = readb(&channel->control); |
1da177e4 LT |
682 | ZSDELAY(); |
683 | ||
684 | /* TX busy? Just wait for the TX done interrupt. */ | |
685 | if (!(status & Tx_BUF_EMP)) | |
686 | return; | |
687 | ||
688 | /* Send the first character to jump-start the TX done | |
689 | * IRQ sending engine. | |
690 | */ | |
691 | if (port->x_char) { | |
36764631 | 692 | writeb(port->x_char, &channel->data); |
1da177e4 LT |
693 | ZSDELAY(); |
694 | ZS_WSYNC(channel); | |
695 | ||
696 | port->icount.tx++; | |
697 | port->x_char = 0; | |
698 | } else { | |
699 | struct circ_buf *xmit = &port->info->xmit; | |
700 | ||
36764631 | 701 | writeb(xmit->buf[xmit->tail], &channel->data); |
1da177e4 LT |
702 | ZSDELAY(); |
703 | ZS_WSYNC(channel); | |
704 | ||
705 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
706 | port->icount.tx++; | |
707 | ||
708 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
709 | uart_write_wakeup(&up->port); | |
710 | } | |
711 | } | |
712 | ||
713 | /* The port lock is held. */ | |
714 | static void sunzilog_stop_rx(struct uart_port *port) | |
715 | { | |
716 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
717 | struct zilog_channel __iomem *channel; | |
718 | ||
719 | if (ZS_IS_CONS(up)) | |
720 | return; | |
721 | ||
722 | channel = ZILOG_CHANNEL_FROM_PORT(port); | |
723 | ||
724 | /* Disable all RX interrupts. */ | |
725 | up->curregs[R1] &= ~RxINT_MASK; | |
726 | sunzilog_maybe_update_regs(up, channel); | |
727 | } | |
728 | ||
729 | /* The port lock is held. */ | |
730 | static void sunzilog_enable_ms(struct uart_port *port) | |
731 | { | |
732 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
733 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
734 | unsigned char new_reg; | |
735 | ||
736 | new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); | |
737 | if (new_reg != up->curregs[R15]) { | |
738 | up->curregs[R15] = new_reg; | |
739 | ||
740 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
741 | write_zsreg(channel, R15, up->curregs[R15]); | |
742 | } | |
743 | } | |
744 | ||
745 | /* The port lock is not held. */ | |
746 | static void sunzilog_break_ctl(struct uart_port *port, int break_state) | |
747 | { | |
748 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
749 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
750 | unsigned char set_bits, clear_bits, new_reg; | |
751 | unsigned long flags; | |
752 | ||
753 | set_bits = clear_bits = 0; | |
754 | ||
755 | if (break_state) | |
756 | set_bits |= SND_BRK; | |
757 | else | |
758 | clear_bits |= SND_BRK; | |
759 | ||
760 | spin_lock_irqsave(&port->lock, flags); | |
761 | ||
762 | new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; | |
763 | if (new_reg != up->curregs[R5]) { | |
764 | up->curregs[R5] = new_reg; | |
765 | ||
766 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
767 | write_zsreg(channel, R5, up->curregs[R5]); | |
768 | } | |
769 | ||
770 | spin_unlock_irqrestore(&port->lock, flags); | |
771 | } | |
772 | ||
773 | static void __sunzilog_startup(struct uart_sunzilog_port *up) | |
774 | { | |
775 | struct zilog_channel __iomem *channel; | |
776 | ||
777 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
36764631 | 778 | up->prev_status = readb(&channel->control); |
1da177e4 LT |
779 | |
780 | /* Enable receiver and transmitter. */ | |
781 | up->curregs[R3] |= RxENAB; | |
782 | up->curregs[R5] |= TxENAB; | |
783 | ||
784 | up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; | |
785 | sunzilog_maybe_update_regs(up, channel); | |
786 | } | |
787 | ||
788 | static int sunzilog_startup(struct uart_port *port) | |
789 | { | |
790 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
791 | unsigned long flags; | |
792 | ||
793 | if (ZS_IS_CONS(up)) | |
794 | return 0; | |
795 | ||
796 | spin_lock_irqsave(&port->lock, flags); | |
797 | __sunzilog_startup(up); | |
798 | spin_unlock_irqrestore(&port->lock, flags); | |
799 | return 0; | |
800 | } | |
801 | ||
802 | /* | |
803 | * The test for ZS_IS_CONS is explained by the following e-mail: | |
804 | ***** | |
805 | * From: Russell King <rmk@arm.linux.org.uk> | |
806 | * Date: Sun, 8 Dec 2002 10:18:38 +0000 | |
807 | * | |
808 | * On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote: | |
809 | * > I boot my 2.5 boxes using "console=ttyS0,9600" argument, | |
810 | * > and I noticed that something is not right with reference | |
811 | * > counting in this case. It seems that when the console | |
812 | * > is open by kernel initially, this is not accounted | |
813 | * > as an open, and uart_startup is not called. | |
814 | * | |
815 | * That is correct. We are unable to call uart_startup when the serial | |
816 | * console is initialised because it may need to allocate memory (as | |
817 | * request_irq does) and the memory allocators may not have been | |
818 | * initialised. | |
819 | * | |
820 | * 1. initialise the port into a state where it can send characters in the | |
821 | * console write method. | |
822 | * | |
823 | * 2. don't do the actual hardware shutdown in your shutdown() method (but | |
824 | * do the normal software shutdown - ie, free irqs etc) | |
825 | ***** | |
826 | */ | |
827 | static void sunzilog_shutdown(struct uart_port *port) | |
828 | { | |
829 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
830 | struct zilog_channel __iomem *channel; | |
831 | unsigned long flags; | |
832 | ||
833 | if (ZS_IS_CONS(up)) | |
834 | return; | |
835 | ||
836 | spin_lock_irqsave(&port->lock, flags); | |
837 | ||
838 | channel = ZILOG_CHANNEL_FROM_PORT(port); | |
839 | ||
840 | /* Disable receiver and transmitter. */ | |
841 | up->curregs[R3] &= ~RxENAB; | |
842 | up->curregs[R5] &= ~TxENAB; | |
843 | ||
844 | /* Disable all interrupts and BRK assertion. */ | |
845 | up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); | |
846 | up->curregs[R5] &= ~SND_BRK; | |
847 | sunzilog_maybe_update_regs(up, channel); | |
848 | ||
849 | spin_unlock_irqrestore(&port->lock, flags); | |
850 | } | |
851 | ||
852 | /* Shared by TTY driver and serial console setup. The port lock is held | |
853 | * and local interrupts are disabled. | |
854 | */ | |
855 | static void | |
856 | sunzilog_convert_to_zs(struct uart_sunzilog_port *up, unsigned int cflag, | |
857 | unsigned int iflag, int brg) | |
858 | { | |
859 | ||
860 | up->curregs[R10] = NRZ; | |
861 | up->curregs[R11] = TCBR | RCBR; | |
862 | ||
863 | /* Program BAUD and clock source. */ | |
864 | up->curregs[R4] &= ~XCLK_MASK; | |
865 | up->curregs[R4] |= X16CLK; | |
866 | up->curregs[R12] = brg & 0xff; | |
867 | up->curregs[R13] = (brg >> 8) & 0xff; | |
868 | up->curregs[R14] = BRSRC | BRENAB; | |
869 | ||
870 | /* Character size, stop bits, and parity. */ | |
871 | up->curregs[3] &= ~RxN_MASK; | |
872 | up->curregs[5] &= ~TxN_MASK; | |
873 | switch (cflag & CSIZE) { | |
874 | case CS5: | |
875 | up->curregs[3] |= Rx5; | |
876 | up->curregs[5] |= Tx5; | |
877 | up->parity_mask = 0x1f; | |
878 | break; | |
879 | case CS6: | |
880 | up->curregs[3] |= Rx6; | |
881 | up->curregs[5] |= Tx6; | |
882 | up->parity_mask = 0x3f; | |
883 | break; | |
884 | case CS7: | |
885 | up->curregs[3] |= Rx7; | |
886 | up->curregs[5] |= Tx7; | |
887 | up->parity_mask = 0x7f; | |
888 | break; | |
889 | case CS8: | |
890 | default: | |
891 | up->curregs[3] |= Rx8; | |
892 | up->curregs[5] |= Tx8; | |
893 | up->parity_mask = 0xff; | |
894 | break; | |
895 | }; | |
896 | up->curregs[4] &= ~0x0c; | |
897 | if (cflag & CSTOPB) | |
898 | up->curregs[4] |= SB2; | |
899 | else | |
900 | up->curregs[4] |= SB1; | |
901 | if (cflag & PARENB) | |
902 | up->curregs[4] |= PAR_ENAB; | |
903 | else | |
904 | up->curregs[4] &= ~PAR_ENAB; | |
905 | if (!(cflag & PARODD)) | |
906 | up->curregs[4] |= PAR_EVEN; | |
907 | else | |
908 | up->curregs[4] &= ~PAR_EVEN; | |
909 | ||
910 | up->port.read_status_mask = Rx_OVR; | |
911 | if (iflag & INPCK) | |
912 | up->port.read_status_mask |= CRC_ERR | PAR_ERR; | |
913 | if (iflag & (BRKINT | PARMRK)) | |
914 | up->port.read_status_mask |= BRK_ABRT; | |
915 | ||
916 | up->port.ignore_status_mask = 0; | |
917 | if (iflag & IGNPAR) | |
918 | up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; | |
919 | if (iflag & IGNBRK) { | |
920 | up->port.ignore_status_mask |= BRK_ABRT; | |
921 | if (iflag & IGNPAR) | |
922 | up->port.ignore_status_mask |= Rx_OVR; | |
923 | } | |
924 | ||
925 | if ((cflag & CREAD) == 0) | |
926 | up->port.ignore_status_mask = 0xff; | |
927 | } | |
928 | ||
929 | /* The port lock is not held. */ | |
930 | static void | |
931 | sunzilog_set_termios(struct uart_port *port, struct termios *termios, | |
932 | struct termios *old) | |
933 | { | |
934 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
935 | unsigned long flags; | |
936 | int baud, brg; | |
937 | ||
938 | baud = uart_get_baud_rate(port, termios, old, 1200, 76800); | |
939 | ||
940 | spin_lock_irqsave(&up->port.lock, flags); | |
941 | ||
942 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
943 | ||
944 | sunzilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); | |
945 | ||
946 | if (UART_ENABLE_MS(&up->port, termios->c_cflag)) | |
947 | up->flags |= SUNZILOG_FLAG_MODEM_STATUS; | |
948 | else | |
949 | up->flags &= ~SUNZILOG_FLAG_MODEM_STATUS; | |
950 | ||
951 | up->cflag = termios->c_cflag; | |
952 | ||
953 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); | |
954 | ||
955 | uart_update_timeout(port, termios->c_cflag, baud); | |
956 | ||
957 | spin_unlock_irqrestore(&up->port.lock, flags); | |
958 | } | |
959 | ||
960 | static const char *sunzilog_type(struct uart_port *port) | |
961 | { | |
36764631 | 962 | return "zs"; |
1da177e4 LT |
963 | } |
964 | ||
965 | /* We do not request/release mappings of the registers here, this | |
966 | * happens at early serial probe time. | |
967 | */ | |
968 | static void sunzilog_release_port(struct uart_port *port) | |
969 | { | |
970 | } | |
971 | ||
972 | static int sunzilog_request_port(struct uart_port *port) | |
973 | { | |
974 | return 0; | |
975 | } | |
976 | ||
977 | /* These do not need to do anything interesting either. */ | |
978 | static void sunzilog_config_port(struct uart_port *port, int flags) | |
979 | { | |
980 | } | |
981 | ||
982 | /* We do not support letting the user mess with the divisor, IRQ, etc. */ | |
983 | static int sunzilog_verify_port(struct uart_port *port, struct serial_struct *ser) | |
984 | { | |
985 | return -EINVAL; | |
986 | } | |
987 | ||
988 | static struct uart_ops sunzilog_pops = { | |
989 | .tx_empty = sunzilog_tx_empty, | |
990 | .set_mctrl = sunzilog_set_mctrl, | |
991 | .get_mctrl = sunzilog_get_mctrl, | |
992 | .stop_tx = sunzilog_stop_tx, | |
993 | .start_tx = sunzilog_start_tx, | |
994 | .stop_rx = sunzilog_stop_rx, | |
995 | .enable_ms = sunzilog_enable_ms, | |
996 | .break_ctl = sunzilog_break_ctl, | |
997 | .startup = sunzilog_startup, | |
998 | .shutdown = sunzilog_shutdown, | |
999 | .set_termios = sunzilog_set_termios, | |
1000 | .type = sunzilog_type, | |
1001 | .release_port = sunzilog_release_port, | |
1002 | .request_port = sunzilog_request_port, | |
1003 | .config_port = sunzilog_config_port, | |
1004 | .verify_port = sunzilog_verify_port, | |
1005 | }; | |
1006 | ||
1007 | static struct uart_sunzilog_port *sunzilog_port_table; | |
1008 | static struct zilog_layout __iomem **sunzilog_chip_regs; | |
1009 | ||
1010 | static struct uart_sunzilog_port *sunzilog_irq_chain; | |
1da177e4 LT |
1011 | |
1012 | static struct uart_driver sunzilog_reg = { | |
1013 | .owner = THIS_MODULE, | |
1014 | .driver_name = "ttyS", | |
1da177e4 LT |
1015 | .dev_name = "ttyS", |
1016 | .major = TTY_MAJOR, | |
1017 | }; | |
1018 | ||
36764631 | 1019 | static int __init sunzilog_alloc_tables(void) |
1da177e4 | 1020 | { |
36764631 DM |
1021 | struct uart_sunzilog_port *up; |
1022 | unsigned long size; | |
1023 | int i; | |
1da177e4 | 1024 | |
36764631 DM |
1025 | size = NUM_CHANNELS * sizeof(struct uart_sunzilog_port); |
1026 | sunzilog_port_table = kzalloc(size, GFP_KERNEL); | |
1027 | if (!sunzilog_port_table) | |
1028 | return -ENOMEM; | |
1da177e4 | 1029 | |
36764631 DM |
1030 | for (i = 0; i < NUM_CHANNELS; i++) { |
1031 | up = &sunzilog_port_table[i]; | |
1da177e4 | 1032 | |
36764631 | 1033 | spin_lock_init(&up->port.lock); |
1da177e4 | 1034 | |
36764631 DM |
1035 | if (i == 0) |
1036 | sunzilog_irq_chain = up; | |
1da177e4 | 1037 | |
36764631 DM |
1038 | if (i < NUM_CHANNELS - 1) |
1039 | up->next = up + 1; | |
1040 | else | |
1041 | up->next = NULL; | |
1da177e4 LT |
1042 | } |
1043 | ||
36764631 DM |
1044 | size = NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *); |
1045 | sunzilog_chip_regs = kzalloc(size, GFP_KERNEL); | |
1046 | if (!sunzilog_chip_regs) { | |
1047 | kfree(sunzilog_port_table); | |
1048 | sunzilog_irq_chain = NULL; | |
1049 | return -ENOMEM; | |
1da177e4 LT |
1050 | } |
1051 | ||
36764631 | 1052 | return 0; |
1da177e4 | 1053 | } |
1da177e4 | 1054 | |
36764631 | 1055 | static void sunzilog_free_tables(void) |
1da177e4 | 1056 | { |
36764631 DM |
1057 | kfree(sunzilog_port_table); |
1058 | sunzilog_irq_chain = NULL; | |
1059 | kfree(sunzilog_chip_regs); | |
1da177e4 LT |
1060 | } |
1061 | ||
1062 | #define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */ | |
1063 | ||
d358788f | 1064 | static void sunzilog_putchar(struct uart_port *port, int ch) |
1da177e4 | 1065 | { |
d358788f | 1066 | struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); |
1da177e4 LT |
1067 | int loops = ZS_PUT_CHAR_MAX_DELAY; |
1068 | ||
1069 | /* This is a timed polling loop so do not switch the explicit | |
1070 | * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM | |
1071 | */ | |
1072 | do { | |
36764631 | 1073 | unsigned char val = readb(&channel->control); |
1da177e4 LT |
1074 | if (val & Tx_BUF_EMP) { |
1075 | ZSDELAY(); | |
1076 | break; | |
1077 | } | |
1078 | udelay(5); | |
1079 | } while (--loops); | |
1080 | ||
36764631 | 1081 | writeb(ch, &channel->data); |
1da177e4 LT |
1082 | ZSDELAY(); |
1083 | ZS_WSYNC(channel); | |
1084 | } | |
1085 | ||
1086 | #ifdef CONFIG_SERIO | |
1087 | ||
1088 | static DEFINE_SPINLOCK(sunzilog_serio_lock); | |
1089 | ||
1090 | static int sunzilog_serio_write(struct serio *serio, unsigned char ch) | |
1091 | { | |
1092 | struct uart_sunzilog_port *up = serio->port_data; | |
1093 | unsigned long flags; | |
1094 | ||
1095 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1096 | ||
d358788f | 1097 | sunzilog_putchar(&up->port, ch); |
1da177e4 LT |
1098 | |
1099 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1100 | ||
1101 | return 0; | |
1102 | } | |
1103 | ||
1104 | static int sunzilog_serio_open(struct serio *serio) | |
1105 | { | |
1106 | struct uart_sunzilog_port *up = serio->port_data; | |
1107 | unsigned long flags; | |
1108 | int ret; | |
1109 | ||
1110 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1111 | if (!up->serio_open) { | |
1112 | up->serio_open = 1; | |
1113 | ret = 0; | |
1114 | } else | |
1115 | ret = -EBUSY; | |
1116 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1117 | ||
1118 | return ret; | |
1119 | } | |
1120 | ||
1121 | static void sunzilog_serio_close(struct serio *serio) | |
1122 | { | |
1123 | struct uart_sunzilog_port *up = serio->port_data; | |
1124 | unsigned long flags; | |
1125 | ||
1126 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1127 | up->serio_open = 0; | |
1128 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1129 | } | |
1130 | ||
1131 | #endif /* CONFIG_SERIO */ | |
1132 | ||
1133 | #ifdef CONFIG_SERIAL_SUNZILOG_CONSOLE | |
1134 | static void | |
1135 | sunzilog_console_write(struct console *con, const char *s, unsigned int count) | |
1136 | { | |
1137 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; | |
1da177e4 | 1138 | unsigned long flags; |
1da177e4 LT |
1139 | |
1140 | spin_lock_irqsave(&up->port.lock, flags); | |
d358788f | 1141 | uart_console_write(&up->port, s, count, sunzilog_putchar); |
1da177e4 LT |
1142 | udelay(2); |
1143 | spin_unlock_irqrestore(&up->port.lock, flags); | |
1144 | } | |
1145 | ||
1146 | static int __init sunzilog_console_setup(struct console *con, char *options) | |
1147 | { | |
1148 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; | |
1149 | unsigned long flags; | |
1150 | int baud, brg; | |
1151 | ||
1152 | printk(KERN_INFO "Console: ttyS%d (SunZilog zs%d)\n", | |
1153 | (sunzilog_reg.minor - 64) + con->index, con->index); | |
1154 | ||
1155 | /* Get firmware console settings. */ | |
1156 | sunserial_console_termios(con); | |
1157 | ||
1158 | /* Firmware console speed is limited to 150-->38400 baud so | |
1159 | * this hackish cflag thing is OK. | |
1160 | */ | |
1161 | switch (con->cflag & CBAUD) { | |
1162 | case B150: baud = 150; break; | |
1163 | case B300: baud = 300; break; | |
1164 | case B600: baud = 600; break; | |
1165 | case B1200: baud = 1200; break; | |
1166 | case B2400: baud = 2400; break; | |
1167 | case B4800: baud = 4800; break; | |
1168 | default: case B9600: baud = 9600; break; | |
1169 | case B19200: baud = 19200; break; | |
1170 | case B38400: baud = 38400; break; | |
1171 | }; | |
1172 | ||
1173 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1174 | ||
1175 | spin_lock_irqsave(&up->port.lock, flags); | |
1176 | ||
1177 | up->curregs[R15] = BRKIE; | |
1178 | sunzilog_convert_to_zs(up, con->cflag, 0, brg); | |
1179 | ||
1180 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); | |
1181 | __sunzilog_startup(up); | |
1182 | ||
1183 | spin_unlock_irqrestore(&up->port.lock, flags); | |
1184 | ||
1185 | return 0; | |
1186 | } | |
1187 | ||
1188 | static struct console sunzilog_console = { | |
1189 | .name = "ttyS", | |
1190 | .write = sunzilog_console_write, | |
1191 | .device = uart_console_device, | |
1192 | .setup = sunzilog_console_setup, | |
1193 | .flags = CON_PRINTBUFFER, | |
1194 | .index = -1, | |
1195 | .data = &sunzilog_reg, | |
1196 | }; | |
1da177e4 | 1197 | |
1ddb7c98 DM |
1198 | static inline struct console *SUNZILOG_CONSOLE(void) |
1199 | { | |
1200 | int i; | |
1201 | ||
1202 | if (con_is_present()) | |
1203 | return NULL; | |
1204 | ||
1205 | for (i = 0; i < NUM_CHANNELS; i++) { | |
1206 | int this_minor = sunzilog_reg.minor + i; | |
1207 | ||
1208 | if ((this_minor - 64) == (serial_console - 1)) | |
1209 | break; | |
1210 | } | |
1211 | if (i == NUM_CHANNELS) | |
1212 | return NULL; | |
1213 | ||
1214 | sunzilog_console.index = i; | |
1215 | sunzilog_port_table[i].flags |= SUNZILOG_FLAG_IS_CONS; | |
1216 | ||
1217 | return &sunzilog_console; | |
1218 | } | |
1219 | ||
1da177e4 | 1220 | #else |
1ddb7c98 | 1221 | #define SUNZILOG_CONSOLE() (NULL) |
1da177e4 LT |
1222 | #endif |
1223 | ||
1da177e4 LT |
1224 | static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel) |
1225 | { | |
1226 | int baud, brg; | |
1227 | ||
1228 | if (channel == KEYBOARD_LINE) { | |
1229 | up->flags |= SUNZILOG_FLAG_CONS_KEYB; | |
1230 | up->cflag = B1200 | CS8 | CLOCAL | CREAD; | |
1231 | baud = 1200; | |
1232 | } else { | |
1233 | up->flags |= SUNZILOG_FLAG_CONS_MOUSE; | |
1234 | up->cflag = B4800 | CS8 | CLOCAL | CREAD; | |
1235 | baud = 4800; | |
1236 | } | |
1da177e4 LT |
1237 | |
1238 | up->curregs[R15] = BRKIE; | |
1239 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1240 | sunzilog_convert_to_zs(up, up->cflag, 0, brg); | |
1241 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); | |
1242 | __sunzilog_startup(up); | |
1243 | } | |
1244 | ||
1245 | #ifdef CONFIG_SERIO | |
1246 | static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel) | |
1247 | { | |
36764631 | 1248 | struct serio *serio = &up->serio; |
1da177e4 | 1249 | |
36764631 | 1250 | serio->port_data = up; |
1da177e4 | 1251 | |
36764631 DM |
1252 | serio->id.type = SERIO_RS232; |
1253 | if (channel == KEYBOARD_LINE) { | |
1254 | serio->id.proto = SERIO_SUNKBD; | |
1255 | strlcpy(serio->name, "zskbd", sizeof(serio->name)); | |
1da177e4 | 1256 | } else { |
36764631 DM |
1257 | serio->id.proto = SERIO_SUN; |
1258 | serio->id.extra = 1; | |
1259 | strlcpy(serio->name, "zsms", sizeof(serio->name)); | |
1da177e4 | 1260 | } |
36764631 DM |
1261 | strlcpy(serio->phys, |
1262 | (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"), | |
1263 | sizeof(serio->phys)); | |
1264 | ||
1265 | serio->write = sunzilog_serio_write; | |
1266 | serio->open = sunzilog_serio_open; | |
1267 | serio->close = sunzilog_serio_close; | |
1268 | serio->dev.parent = up->port.dev; | |
1269 | ||
1270 | serio_register_port(serio); | |
1da177e4 LT |
1271 | } |
1272 | #endif | |
1273 | ||
36764631 | 1274 | static void __init sunzilog_init_hw(struct uart_sunzilog_port *up) |
1da177e4 | 1275 | { |
36764631 DM |
1276 | struct zilog_channel __iomem *channel; |
1277 | unsigned long flags; | |
1278 | int baud, brg; | |
1da177e4 | 1279 | |
36764631 | 1280 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); |
1da177e4 | 1281 | |
36764631 DM |
1282 | spin_lock_irqsave(&up->port.lock, flags); |
1283 | if (ZS_IS_CHANNEL_A(up)) { | |
1284 | write_zsreg(channel, R9, FHWRES); | |
1285 | ZSDELAY_LONG(); | |
1286 | (void) read_zsreg(channel, R0); | |
1287 | } | |
1da177e4 | 1288 | |
36764631 DM |
1289 | if (up->port.line == KEYBOARD_LINE || |
1290 | up->port.line == MOUSE_LINE) { | |
1291 | sunzilog_init_kbdms(up, up->port.line); | |
1292 | up->curregs[R9] |= (NV | MIE); | |
1293 | write_zsreg(channel, R9, up->curregs[R9]); | |
1294 | } else { | |
1295 | /* Normal serial TTY. */ | |
1296 | up->parity_mask = 0xff; | |
1297 | up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; | |
1298 | up->curregs[R4] = PAR_EVEN | X16CLK | SB1; | |
1299 | up->curregs[R3] = RxENAB | Rx8; | |
1300 | up->curregs[R5] = TxENAB | Tx8; | |
1301 | up->curregs[R9] = NV | MIE; | |
1302 | up->curregs[R10] = NRZ; | |
1303 | up->curregs[R11] = TCBR | RCBR; | |
1304 | baud = 9600; | |
1305 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1306 | up->curregs[R12] = (brg & 0xff); | |
1307 | up->curregs[R13] = (brg >> 8) & 0xff; | |
1308 | up->curregs[R14] = BRSRC | BRENAB; | |
1309 | __load_zsregs(channel, up->curregs); | |
1310 | write_zsreg(channel, R9, up->curregs[R9]); | |
1311 | } | |
1da177e4 | 1312 | |
36764631 | 1313 | spin_unlock_irqrestore(&up->port.lock, flags); |
1da177e4 LT |
1314 | |
1315 | #ifdef CONFIG_SERIO | |
36764631 DM |
1316 | if (up->port.line == KEYBOARD_LINE || up->port.line == MOUSE_LINE) |
1317 | sunzilog_register_serio(up, up->port.line); | |
1da177e4 | 1318 | #endif |
1da177e4 LT |
1319 | } |
1320 | ||
36764631 | 1321 | static int __devinit zs_get_instance(struct device_node *dp) |
1da177e4 | 1322 | { |
1da177e4 | 1323 | int ret; |
1da177e4 | 1324 | |
36764631 DM |
1325 | ret = of_getintprop_default(dp, "slave", -1); |
1326 | if (ret != -1) | |
1327 | return ret; | |
1da177e4 | 1328 | |
36764631 DM |
1329 | if (of_find_property(dp, "keyboard", NULL)) |
1330 | ret = 1; | |
1331 | else | |
1332 | ret = 0; | |
1da177e4 | 1333 | |
36764631 DM |
1334 | return ret; |
1335 | } | |
1da177e4 | 1336 | |
4fa97dcf DM |
1337 | static int zilog_irq = -1; |
1338 | ||
67e23a1e | 1339 | static int __devinit zs_probe(struct of_device *op, const struct of_device_id *match) |
36764631 | 1340 | { |
36764631 DM |
1341 | struct uart_sunzilog_port *up; |
1342 | struct zilog_layout __iomem *rp; | |
67e23a1e | 1343 | int inst = zs_get_instance(op->node); |
36764631 | 1344 | int err; |
1da177e4 | 1345 | |
36764631 DM |
1346 | sunzilog_chip_regs[inst] = of_ioremap(&op->resource[0], 0, |
1347 | sizeof(struct zilog_layout), | |
1348 | "zs"); | |
1349 | if (!sunzilog_chip_regs[inst]) | |
1350 | return -ENOMEM; | |
1da177e4 | 1351 | |
36764631 | 1352 | rp = sunzilog_chip_regs[inst]; |
1da177e4 | 1353 | |
b77d35b7 | 1354 | if (zilog_irq == -1) |
36764631 | 1355 | zilog_irq = op->irqs[0]; |
1ddb7c98 | 1356 | |
36764631 DM |
1357 | up = &sunzilog_port_table[inst * 2]; |
1358 | ||
1359 | /* Channel A */ | |
1360 | up[0].port.mapbase = op->resource[0].start + 0x00; | |
1361 | up[0].port.membase = (void __iomem *) &rp->channelA; | |
1362 | up[0].port.iotype = UPIO_MEM; | |
1363 | up[0].port.irq = op->irqs[0]; | |
1364 | up[0].port.uartclk = ZS_CLOCK; | |
1365 | up[0].port.fifosize = 1; | |
1366 | up[0].port.ops = &sunzilog_pops; | |
1367 | up[0].port.type = PORT_SUNZILOG; | |
1368 | up[0].port.flags = 0; | |
1369 | up[0].port.line = (inst * 2) + 0; | |
1370 | up[0].port.dev = &op->dev; | |
1371 | up[0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A; | |
1372 | if (inst == 1) | |
1373 | up[0].flags |= SUNZILOG_FLAG_CONS_KEYB; | |
1374 | sunzilog_init_hw(&up[0]); | |
1375 | ||
1376 | /* Channel B */ | |
1377 | up[1].port.mapbase = op->resource[0].start + 0x04; | |
1378 | up[1].port.membase = (void __iomem *) &rp->channelB; | |
1379 | up[1].port.iotype = UPIO_MEM; | |
1380 | up[1].port.irq = op->irqs[0]; | |
1381 | up[1].port.uartclk = ZS_CLOCK; | |
1382 | up[1].port.fifosize = 1; | |
1383 | up[1].port.ops = &sunzilog_pops; | |
1384 | up[1].port.type = PORT_SUNZILOG; | |
1385 | up[1].port.flags = 0; | |
1386 | up[1].port.line = (inst * 2) + 1; | |
1387 | up[1].port.dev = &op->dev; | |
1388 | up[1].flags |= 0; | |
1389 | if (inst == 1) | |
1390 | up[1].flags |= SUNZILOG_FLAG_CONS_MOUSE; | |
1391 | sunzilog_init_hw(&up[1]); | |
1392 | ||
1393 | if (inst != 1) { | |
1394 | err = uart_add_one_port(&sunzilog_reg, &up[0].port); | |
1395 | if (err) { | |
1396 | of_iounmap(rp, sizeof(struct zilog_layout)); | |
1397 | return err; | |
1398 | } | |
1399 | err = uart_add_one_port(&sunzilog_reg, &up[1].port); | |
1400 | if (err) { | |
1401 | uart_remove_one_port(&sunzilog_reg, &up[0].port); | |
1402 | of_iounmap(rp, sizeof(struct zilog_layout)); | |
1403 | return err; | |
1da177e4 LT |
1404 | } |
1405 | } | |
1406 | ||
67e23a1e | 1407 | dev_set_drvdata(&op->dev, &up[0]); |
4fa97dcf | 1408 | |
36764631 | 1409 | return 0; |
1da177e4 LT |
1410 | } |
1411 | ||
4fa97dcf | 1412 | static void __devexit zs_remove_one(struct uart_sunzilog_port *up) |
1da177e4 | 1413 | { |
36764631 DM |
1414 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) { |
1415 | #ifdef CONFIG_SERIO | |
1416 | serio_unregister_port(&up->serio); | |
1417 | #endif | |
1418 | } else | |
1419 | uart_remove_one_port(&sunzilog_reg, &up->port); | |
4fa97dcf | 1420 | } |
1da177e4 | 1421 | |
4fa97dcf DM |
1422 | static int __devexit zs_remove(struct of_device *dev) |
1423 | { | |
1424 | struct uart_sunzilog_port *up = dev_get_drvdata(&dev->dev); | |
1425 | struct zilog_layout __iomem *regs; | |
1426 | ||
1427 | zs_remove_one(&up[0]); | |
1428 | zs_remove_one(&up[1]); | |
1da177e4 | 1429 | |
4fa97dcf DM |
1430 | regs = sunzilog_chip_regs[up[0].port.line / 2]; |
1431 | of_iounmap(regs, sizeof(struct zilog_layout)); | |
1432 | ||
1433 | dev_set_drvdata(&dev->dev, NULL); | |
1da177e4 | 1434 | |
36764631 | 1435 | return 0; |
1da177e4 LT |
1436 | } |
1437 | ||
36764631 DM |
1438 | static struct of_device_id zs_match[] = { |
1439 | { | |
1440 | .name = "zs", | |
1441 | }, | |
1442 | {}, | |
1443 | }; | |
1444 | MODULE_DEVICE_TABLE(of, zs_match); | |
1445 | ||
1446 | static struct of_platform_driver zs_driver = { | |
1447 | .name = "zs", | |
1448 | .match_table = zs_match, | |
1449 | .probe = zs_probe, | |
1450 | .remove = __devexit_p(zs_remove), | |
1451 | }; | |
1452 | ||
1da177e4 LT |
1453 | static int __init sunzilog_init(void) |
1454 | { | |
36764631 | 1455 | struct device_node *dp; |
67e23a1e | 1456 | int err, uart_count; |
1da177e4 | 1457 | |
36764631 DM |
1458 | NUM_SUNZILOG = 0; |
1459 | for_each_node_by_name(dp, "zs") | |
1460 | NUM_SUNZILOG++; | |
1da177e4 | 1461 | |
67e23a1e | 1462 | uart_count = 0; |
36764631 DM |
1463 | if (NUM_SUNZILOG) { |
1464 | int uart_count; | |
1da177e4 | 1465 | |
36764631 DM |
1466 | err = sunzilog_alloc_tables(); |
1467 | if (err) | |
67e23a1e | 1468 | goto out; |
1da177e4 | 1469 | |
36764631 DM |
1470 | /* Subtract 1 for keyboard, 1 for mouse. */ |
1471 | uart_count = (NUM_SUNZILOG * 2) - 2; | |
1472 | ||
1473 | sunzilog_reg.nr = uart_count; | |
1474 | sunzilog_reg.minor = sunserial_current_minor; | |
1475 | err = uart_register_driver(&sunzilog_reg); | |
67e23a1e DM |
1476 | if (err) |
1477 | goto out_free_tables; | |
1478 | ||
36764631 DM |
1479 | sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64; |
1480 | sunzilog_reg.cons = SUNZILOG_CONSOLE(); | |
1481 | ||
1482 | sunserial_current_minor += uart_count; | |
1483 | } | |
1484 | ||
67e23a1e DM |
1485 | err = of_register_driver(&zs_driver, &of_bus_type); |
1486 | if (err) | |
1487 | goto out_unregister_uart; | |
1488 | ||
1489 | if (zilog_irq != -1) { | |
1490 | err = request_irq(zilog_irq, sunzilog_interrupt, IRQF_SHARED, | |
1491 | "zs", sunzilog_irq_chain); | |
1492 | if (err) | |
1493 | goto out_unregister_driver; | |
1494 | } | |
1495 | ||
1496 | out: | |
1497 | return err; | |
1498 | ||
1499 | out_unregister_driver: | |
1500 | of_unregister_driver(&zs_driver); | |
1501 | ||
1502 | out_unregister_uart: | |
1503 | if (NUM_SUNZILOG) { | |
1504 | uart_unregister_driver(&sunzilog_reg); | |
1505 | sunzilog_reg.cons = NULL; | |
1506 | } | |
1507 | ||
1508 | out_free_tables: | |
1509 | sunzilog_free_tables(); | |
1510 | goto out; | |
1da177e4 LT |
1511 | } |
1512 | ||
1513 | static void __exit sunzilog_exit(void) | |
1514 | { | |
36764631 | 1515 | of_unregister_driver(&zs_driver); |
1da177e4 | 1516 | |
4fa97dcf DM |
1517 | if (zilog_irq != -1) { |
1518 | free_irq(zilog_irq, sunzilog_irq_chain); | |
1519 | zilog_irq = -1; | |
1520 | } | |
1521 | ||
36764631 DM |
1522 | if (NUM_SUNZILOG) { |
1523 | uart_unregister_driver(&sunzilog_reg); | |
1524 | sunzilog_free_tables(); | |
1da177e4 | 1525 | } |
1da177e4 LT |
1526 | } |
1527 | ||
1528 | module_init(sunzilog_init); | |
1529 | module_exit(sunzilog_exit); | |
1530 | ||
1531 | MODULE_AUTHOR("David S. Miller"); | |
1532 | MODULE_DESCRIPTION("Sun Zilog serial port driver"); | |
9efc3715 | 1533 | MODULE_VERSION("2.0"); |
1da177e4 | 1534 | MODULE_LICENSE("GPL"); |