SIGIO-driven I/O with inotify queues
[deliverable/linux.git] / drivers / serial / uartlite.c
CommitLineData
238b8721
PK
1/*
2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
3 *
852e1ea7
GL
4 * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
5 * Copyright (C) 2007 Secret Lab Technologies Ltd.
238b8721
PK
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <linux/platform_device.h>
13#include <linux/module.h>
14#include <linux/console.h>
15#include <linux/serial.h>
16#include <linux/serial_core.h>
17#include <linux/tty.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <asm/io.h>
852e1ea7
GL
21#if defined(CONFIG_OF)
22#include <linux/of_device.h>
23#include <linux/of_platform.h>
24#endif
238b8721 25
00775828 26#define ULITE_NAME "ttyUL"
238b8721
PK
27#define ULITE_MAJOR 204
28#define ULITE_MINOR 187
29#define ULITE_NR_UARTS 4
30
435706b3
GL
31/* ---------------------------------------------------------------------
32 * Register definitions
33 *
34 * For register details see datasheet:
35 * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
36 */
37
238b8721
PK
38#define ULITE_RX 0x00
39#define ULITE_TX 0x04
40#define ULITE_STATUS 0x08
41#define ULITE_CONTROL 0x0c
42
43#define ULITE_REGION 16
44
45#define ULITE_STATUS_RXVALID 0x01
46#define ULITE_STATUS_RXFULL 0x02
47#define ULITE_STATUS_TXEMPTY 0x04
48#define ULITE_STATUS_TXFULL 0x08
49#define ULITE_STATUS_IE 0x10
50#define ULITE_STATUS_OVERRUN 0x20
51#define ULITE_STATUS_FRAME 0x40
52#define ULITE_STATUS_PARITY 0x80
53
54#define ULITE_CONTROL_RST_TX 0x01
55#define ULITE_CONTROL_RST_RX 0x02
56#define ULITE_CONTROL_IE 0x10
57
58
483c79db 59static struct uart_port ulite_ports[ULITE_NR_UARTS];
238b8721 60
435706b3
GL
61/* ---------------------------------------------------------------------
62 * Core UART driver operations
63 */
64
238b8721
PK
65static int ulite_receive(struct uart_port *port, int stat)
66{
67 struct tty_struct *tty = port->info->tty;
68 unsigned char ch = 0;
69 char flag = TTY_NORMAL;
70
71 if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
72 | ULITE_STATUS_FRAME)) == 0)
73 return 0;
74
75 /* stats */
76 if (stat & ULITE_STATUS_RXVALID) {
77 port->icount.rx++;
e077b50c 78 ch = readb(port->membase + ULITE_RX);
238b8721
PK
79
80 if (stat & ULITE_STATUS_PARITY)
81 port->icount.parity++;
82 }
83
84 if (stat & ULITE_STATUS_OVERRUN)
85 port->icount.overrun++;
86
87 if (stat & ULITE_STATUS_FRAME)
88 port->icount.frame++;
89
90
91 /* drop byte with parity error if IGNPAR specificed */
92 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
93 stat &= ~ULITE_STATUS_RXVALID;
94
95 stat &= port->read_status_mask;
96
97 if (stat & ULITE_STATUS_PARITY)
98 flag = TTY_PARITY;
99
100
101 stat &= ~port->ignore_status_mask;
102
103 if (stat & ULITE_STATUS_RXVALID)
104 tty_insert_flip_char(tty, ch, flag);
105
106 if (stat & ULITE_STATUS_FRAME)
107 tty_insert_flip_char(tty, 0, TTY_FRAME);
108
109 if (stat & ULITE_STATUS_OVERRUN)
110 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
111
112 return 1;
113}
114
115static int ulite_transmit(struct uart_port *port, int stat)
116{
117 struct circ_buf *xmit = &port->info->xmit;
118
119 if (stat & ULITE_STATUS_TXFULL)
120 return 0;
121
122 if (port->x_char) {
e077b50c 123 writeb(port->x_char, port->membase + ULITE_TX);
238b8721
PK
124 port->x_char = 0;
125 port->icount.tx++;
126 return 1;
127 }
128
129 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
130 return 0;
131
e077b50c 132 writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
238b8721
PK
133 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
134 port->icount.tx++;
135
136 /* wake up */
137 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
138 uart_write_wakeup(port);
139
140 return 1;
141}
142
143static irqreturn_t ulite_isr(int irq, void *dev_id)
144{
145 struct uart_port *port = (struct uart_port *)dev_id;
146 int busy;
147
148 do {
e077b50c 149 int stat = readb(port->membase + ULITE_STATUS);
238b8721
PK
150 busy = ulite_receive(port, stat);
151 busy |= ulite_transmit(port, stat);
152 } while (busy);
153
154 tty_flip_buffer_push(port->info->tty);
155
156 return IRQ_HANDLED;
157}
158
159static unsigned int ulite_tx_empty(struct uart_port *port)
160{
161 unsigned long flags;
162 unsigned int ret;
163
164 spin_lock_irqsave(&port->lock, flags);
e077b50c 165 ret = readb(port->membase + ULITE_STATUS);
238b8721
PK
166 spin_unlock_irqrestore(&port->lock, flags);
167
168 return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
169}
170
171static unsigned int ulite_get_mctrl(struct uart_port *port)
172{
173 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
174}
175
176static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
177{
178 /* N/A */
179}
180
181static void ulite_stop_tx(struct uart_port *port)
182{
183 /* N/A */
184}
185
186static void ulite_start_tx(struct uart_port *port)
187{
e077b50c 188 ulite_transmit(port, readb(port->membase + ULITE_STATUS));
238b8721
PK
189}
190
191static void ulite_stop_rx(struct uart_port *port)
192{
193 /* don't forward any more data (like !CREAD) */
194 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
195 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
196}
197
198static void ulite_enable_ms(struct uart_port *port)
199{
200 /* N/A */
201}
202
203static void ulite_break_ctl(struct uart_port *port, int ctl)
204{
205 /* N/A */
206}
207
208static int ulite_startup(struct uart_port *port)
209{
210 int ret;
211
212 ret = request_irq(port->irq, ulite_isr,
213 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
214 if (ret)
215 return ret;
216
e077b50c
GL
217 writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
218 port->membase + ULITE_CONTROL);
219 writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
238b8721
PK
220
221 return 0;
222}
223
224static void ulite_shutdown(struct uart_port *port)
225{
e077b50c
GL
226 writeb(0, port->membase + ULITE_CONTROL);
227 readb(port->membase + ULITE_CONTROL); /* dummy */
238b8721
PK
228 free_irq(port->irq, port);
229}
230
606d099c
AC
231static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
232 struct ktermios *old)
238b8721
PK
233{
234 unsigned long flags;
235 unsigned int baud;
236
237 spin_lock_irqsave(&port->lock, flags);
238
239 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
240 | ULITE_STATUS_TXFULL;
241
242 if (termios->c_iflag & INPCK)
243 port->read_status_mask |=
244 ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
245
246 port->ignore_status_mask = 0;
247 if (termios->c_iflag & IGNPAR)
248 port->ignore_status_mask |= ULITE_STATUS_PARITY
249 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
250
251 /* ignore all characters if CREAD is not set */
252 if ((termios->c_cflag & CREAD) == 0)
253 port->ignore_status_mask |=
254 ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
255 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
256
257 /* update timeout */
258 baud = uart_get_baud_rate(port, termios, old, 0, 460800);
259 uart_update_timeout(port, termios->c_cflag, baud);
260
261 spin_unlock_irqrestore(&port->lock, flags);
262}
263
264static const char *ulite_type(struct uart_port *port)
265{
266 return port->type == PORT_UARTLITE ? "uartlite" : NULL;
267}
268
269static void ulite_release_port(struct uart_port *port)
270{
271 release_mem_region(port->mapbase, ULITE_REGION);
272 iounmap(port->membase);
b81831c6 273 port->membase = NULL;
238b8721
PK
274}
275
276static int ulite_request_port(struct uart_port *port)
277{
278 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
279 dev_err(port->dev, "Memory region busy\n");
280 return -EBUSY;
281 }
282
283 port->membase = ioremap(port->mapbase, ULITE_REGION);
284 if (!port->membase) {
285 dev_err(port->dev, "Unable to map registers\n");
286 release_mem_region(port->mapbase, ULITE_REGION);
287 return -EBUSY;
288 }
289
290 return 0;
291}
292
293static void ulite_config_port(struct uart_port *port, int flags)
294{
e21654a7
PK
295 if (!ulite_request_port(port))
296 port->type = PORT_UARTLITE;
238b8721
PK
297}
298
299static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
300{
301 /* we don't want the core code to modify any port params */
302 return -EINVAL;
303}
304
305static struct uart_ops ulite_ops = {
306 .tx_empty = ulite_tx_empty,
307 .set_mctrl = ulite_set_mctrl,
308 .get_mctrl = ulite_get_mctrl,
309 .stop_tx = ulite_stop_tx,
310 .start_tx = ulite_start_tx,
311 .stop_rx = ulite_stop_rx,
312 .enable_ms = ulite_enable_ms,
313 .break_ctl = ulite_break_ctl,
314 .startup = ulite_startup,
315 .shutdown = ulite_shutdown,
316 .set_termios = ulite_set_termios,
317 .type = ulite_type,
318 .release_port = ulite_release_port,
319 .request_port = ulite_request_port,
320 .config_port = ulite_config_port,
321 .verify_port = ulite_verify_port
322};
323
435706b3
GL
324/* ---------------------------------------------------------------------
325 * Console driver operations
326 */
327
238b8721
PK
328#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
329static void ulite_console_wait_tx(struct uart_port *port)
330{
331 int i;
1d6b6987 332 u8 val;
238b8721 333
1d6b6987
GL
334 /* Spin waiting for TX fifo to have space available */
335 for (i = 0; i < 100000; i++) {
336 val = readb(port->membase + ULITE_STATUS);
337 if ((val & ULITE_STATUS_TXFULL) == 0)
238b8721 338 break;
1d6b6987 339 cpu_relax();
238b8721
PK
340 }
341}
342
343static void ulite_console_putchar(struct uart_port *port, int ch)
344{
345 ulite_console_wait_tx(port);
e077b50c 346 writeb(ch, port->membase + ULITE_TX);
238b8721
PK
347}
348
349static void ulite_console_write(struct console *co, const char *s,
350 unsigned int count)
351{
483c79db 352 struct uart_port *port = &ulite_ports[co->index];
238b8721
PK
353 unsigned long flags;
354 unsigned int ier;
355 int locked = 1;
356
357 if (oops_in_progress) {
358 locked = spin_trylock_irqsave(&port->lock, flags);
359 } else
360 spin_lock_irqsave(&port->lock, flags);
361
362 /* save and disable interrupt */
e077b50c
GL
363 ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
364 writeb(0, port->membase + ULITE_CONTROL);
238b8721
PK
365
366 uart_console_write(port, s, count, ulite_console_putchar);
367
368 ulite_console_wait_tx(port);
369
370 /* restore interrupt state */
371 if (ier)
e077b50c 372 writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
238b8721
PK
373
374 if (locked)
375 spin_unlock_irqrestore(&port->lock, flags);
376}
377
fb4e6e66
GL
378#if defined(CONFIG_OF)
379static inline void __init ulite_console_of_find_device(int id)
380{
381 struct device_node *np;
382 struct resource res;
383 const unsigned int *of_id;
384 int rc;
385
386 for_each_compatible_node(np, NULL, "xilinx,uartlite") {
387 of_id = of_get_property(np, "port-number", NULL);
388 if ((!of_id) || (*of_id != id))
389 continue;
390
391 rc = of_address_to_resource(np, 0, &res);
392 if (rc)
393 continue;
394
395 ulite_ports[id].mapbase = res.start;
76832d84 396 of_node_put(np);
fb4e6e66
GL
397 return;
398 }
399}
400#else /* CONFIG_OF */
401static inline void __init ulite_console_of_find_device(int id) { /* do nothing */ }
402#endif /* CONFIG_OF */
403
238b8721
PK
404static int __init ulite_console_setup(struct console *co, char *options)
405{
406 struct uart_port *port;
407 int baud = 9600;
408 int bits = 8;
409 int parity = 'n';
410 int flow = 'n';
411
412 if (co->index < 0 || co->index >= ULITE_NR_UARTS)
413 return -EINVAL;
414
483c79db 415 port = &ulite_ports[co->index];
238b8721 416
fb4e6e66
GL
417 /* Check if it is an OF device */
418 if (!port->mapbase)
419 ulite_console_of_find_device(co->index);
420
421 /* Do we have a device now? */
422 if (!port->mapbase) {
423 pr_debug("console on ttyUL%i not present\n", co->index);
424 return -ENODEV;
425 }
426
238b8721 427 /* not initialized yet? */
852e1ea7 428 if (!port->membase) {
fb4e6e66
GL
429 if (ulite_request_port(port))
430 return -ENODEV;
852e1ea7 431 }
238b8721
PK
432
433 if (options)
434 uart_parse_options(options, &baud, &parity, &bits, &flow);
435
436 return uart_set_options(port, co, baud, parity, bits, flow);
437}
438
439static struct uart_driver ulite_uart_driver;
440
441static struct console ulite_console = {
00775828 442 .name = ULITE_NAME,
238b8721
PK
443 .write = ulite_console_write,
444 .device = uart_console_device,
445 .setup = ulite_console_setup,
446 .flags = CON_PRINTBUFFER,
447 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
448 .data = &ulite_uart_driver,
449};
450
451static int __init ulite_console_init(void)
452{
453 register_console(&ulite_console);
454 return 0;
455}
456
457console_initcall(ulite_console_init);
458
459#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
460
461static struct uart_driver ulite_uart_driver = {
462 .owner = THIS_MODULE,
463 .driver_name = "uartlite",
00775828 464 .dev_name = ULITE_NAME,
238b8721
PK
465 .major = ULITE_MAJOR,
466 .minor = ULITE_MINOR,
467 .nr = ULITE_NR_UARTS,
468#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
469 .cons = &ulite_console,
470#endif
471};
472
435706b3
GL
473/* ---------------------------------------------------------------------
474 * Port assignment functions (mapping devices to uart_port structures)
475 */
476
477/** ulite_assign: register a uartlite device with the driver
478 *
479 * @dev: pointer to device structure
480 * @id: requested id number. Pass -1 for automatic port assignment
481 * @base: base address of uartlite registers
482 * @irq: irq number for uartlite
483 *
484 * Returns: 0 on success, <0 otherwise
485 */
8fa7b610 486static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
238b8721 487{
238b8721 488 struct uart_port *port;
8fa7b610 489 int rc;
238b8721 490
8fa7b610
GL
491 /* if id = -1; then scan for a free id and use that */
492 if (id < 0) {
493 for (id = 0; id < ULITE_NR_UARTS; id++)
494 if (ulite_ports[id].mapbase == 0)
495 break;
496 }
497 if (id < 0 || id >= ULITE_NR_UARTS) {
498 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
238b8721 499 return -EINVAL;
8fa7b610 500 }
238b8721 501
fb4e6e66 502 if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
8fa7b610
GL
503 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
504 ULITE_NAME, id);
238b8721 505 return -EBUSY;
8fa7b610 506 }
238b8721 507
8fa7b610 508 port = &ulite_ports[id];
238b8721 509
8fa7b610
GL
510 spin_lock_init(&port->lock);
511 port->fifosize = 16;
512 port->regshift = 2;
513 port->iotype = UPIO_MEM;
514 port->iobase = 1; /* mark port in use */
515 port->mapbase = base;
516 port->membase = NULL;
517 port->ops = &ulite_ops;
518 port->irq = irq;
519 port->flags = UPF_BOOT_AUTOCONF;
520 port->dev = dev;
521 port->type = PORT_UNKNOWN;
522 port->line = id;
523
524 dev_set_drvdata(dev, port);
525
526 /* Register the port */
527 rc = uart_add_one_port(&ulite_uart_driver, port);
528 if (rc) {
529 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
530 port->mapbase = 0;
531 dev_set_drvdata(dev, NULL);
532 return rc;
533 }
238b8721 534
8fa7b610
GL
535 return 0;
536}
238b8721 537
435706b3
GL
538/** ulite_release: register a uartlite device with the driver
539 *
540 * @dev: pointer to device structure
541 */
f67702a3 542static int __devexit ulite_release(struct device *dev)
8fa7b610
GL
543{
544 struct uart_port *port = dev_get_drvdata(dev);
545 int rc = 0;
238b8721 546
8fa7b610
GL
547 if (port) {
548 rc = uart_remove_one_port(&ulite_uart_driver, port);
549 dev_set_drvdata(dev, NULL);
550 port->mapbase = 0;
551 }
238b8721 552
8fa7b610 553 return rc;
238b8721
PK
554}
555
435706b3
GL
556/* ---------------------------------------------------------------------
557 * Platform bus binding
558 */
559
8fa7b610 560static int __devinit ulite_probe(struct platform_device *pdev)
238b8721 561{
8fa7b610 562 struct resource *res, *res2;
238b8721 563
8fa7b610
GL
564 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
565 if (!res)
566 return -ENODEV;
238b8721 567
8fa7b610
GL
568 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
569 if (!res2)
570 return -ENODEV;
238b8721 571
8fa7b610
GL
572 return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
573}
238b8721 574
f67702a3 575static int __devexit ulite_remove(struct platform_device *pdev)
8fa7b610
GL
576{
577 return ulite_release(&pdev->dev);
238b8721
PK
578}
579
580static struct platform_driver ulite_platform_driver = {
581 .probe = ulite_probe,
f67702a3 582 .remove = __devexit_p(ulite_remove),
238b8721
PK
583 .driver = {
584 .owner = THIS_MODULE,
585 .name = "uartlite",
586 },
587};
588
852e1ea7
GL
589/* ---------------------------------------------------------------------
590 * OF bus bindings
591 */
592#if defined(CONFIG_OF)
593static int __devinit
594ulite_of_probe(struct of_device *op, const struct of_device_id *match)
595{
596 struct resource res;
597 const unsigned int *id;
598 int irq, rc;
599
600 dev_dbg(&op->dev, "%s(%p, %p)\n", __FUNCTION__, op, match);
601
602 rc = of_address_to_resource(op->node, 0, &res);
603 if (rc) {
e077b50c 604 dev_err(&op->dev, "invalid address\n");
852e1ea7
GL
605 return rc;
606 }
607
608 irq = irq_of_parse_and_map(op->node, 0);
609
610 id = of_get_property(op->node, "port-number", NULL);
611
e077b50c 612 return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
852e1ea7
GL
613}
614
615static int __devexit ulite_of_remove(struct of_device *op)
616{
617 return ulite_release(&op->dev);
618}
619
620/* Match table for of_platform binding */
621static struct of_device_id __devinit ulite_of_match[] = {
622 { .type = "serial", .compatible = "xilinx,uartlite", },
623 {},
624};
625MODULE_DEVICE_TABLE(of, ulite_of_match);
626
627static struct of_platform_driver ulite_of_driver = {
628 .owner = THIS_MODULE,
629 .name = "uartlite",
630 .match_table = ulite_of_match,
631 .probe = ulite_of_probe,
632 .remove = __devexit_p(ulite_of_remove),
633 .driver = {
634 .name = "uartlite",
635 },
636};
637
638/* Registration helpers to keep the number of #ifdefs to a minimum */
639static inline int __init ulite_of_register(void)
640{
641 pr_debug("uartlite: calling of_register_platform_driver()\n");
642 return of_register_platform_driver(&ulite_of_driver);
643}
644
645static inline void __exit ulite_of_unregister(void)
646{
647 of_unregister_platform_driver(&ulite_of_driver);
648}
649#else /* CONFIG_OF */
650/* CONFIG_OF not enabled; do nothing helpers */
651static inline int __init ulite_of_register(void) { return 0; }
652static inline void __exit ulite_of_unregister(void) { }
653#endif /* CONFIG_OF */
654
435706b3
GL
655/* ---------------------------------------------------------------------
656 * Module setup/teardown
657 */
658
238b8721
PK
659int __init ulite_init(void)
660{
661 int ret;
662
852e1ea7 663 pr_debug("uartlite: calling uart_register_driver()\n");
238b8721
PK
664 ret = uart_register_driver(&ulite_uart_driver);
665 if (ret)
852e1ea7
GL
666 goto err_uart;
667
668 ret = ulite_of_register();
669 if (ret)
670 goto err_of;
238b8721 671
852e1ea7 672 pr_debug("uartlite: calling platform_driver_register()\n");
238b8721
PK
673 ret = platform_driver_register(&ulite_platform_driver);
674 if (ret)
852e1ea7
GL
675 goto err_plat;
676
677 return 0;
238b8721 678
852e1ea7
GL
679err_plat:
680 ulite_of_unregister();
681err_of:
682 uart_unregister_driver(&ulite_uart_driver);
683err_uart:
684 printk(KERN_ERR "registering uartlite driver failed: err=%i", ret);
238b8721
PK
685 return ret;
686}
687
688void __exit ulite_exit(void)
689{
690 platform_driver_unregister(&ulite_platform_driver);
852e1ea7 691 ulite_of_unregister();
238b8721
PK
692 uart_unregister_driver(&ulite_uart_driver);
693}
694
695module_init(ulite_init);
696module_exit(ulite_exit);
697
698MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
699MODULE_DESCRIPTION("Xilinx uartlite serial driver");
700MODULE_LICENSE("GPL");
This page took 0.19693 seconds and 5 git commands to generate.