Commit | Line | Data |
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b3c185a7 PM |
1 | /* |
2 | * SuperH Pin Function Controller GPIO driver. | |
3 | * | |
4 | * Copyright (C) 2008 Magnus Damm | |
5 | * Copyright (C) 2009 - 2012 Paul Mundt | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
10 | */ | |
a2d3afff | 11 | #define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt |
b3c185a7 PM |
12 | |
13 | #include <linux/init.h> | |
14 | #include <linux/gpio.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/platform_device.h> | |
ca5481c6 | 19 | #include <linux/pinctrl/consumer.h> |
66791859 | 20 | #include <linux/sh_pfc.h> |
b3c185a7 | 21 | |
f9165132 LP |
22 | #include "core.h" |
23 | ||
b3c185a7 PM |
24 | struct sh_pfc_chip { |
25 | struct sh_pfc *pfc; | |
26 | struct gpio_chip gpio_chip; | |
27 | }; | |
28 | ||
29 | static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc) | |
30 | { | |
31 | return container_of(gc, struct sh_pfc_chip, gpio_chip); | |
32 | } | |
33 | ||
34 | static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) | |
35 | { | |
36 | return gpio_to_pfc_chip(gc)->pfc; | |
37 | } | |
38 | ||
39 | static int sh_gpio_request(struct gpio_chip *gc, unsigned offset) | |
40 | { | |
ca5481c6 | 41 | return pinctrl_request_gpio(offset); |
b3c185a7 PM |
42 | } |
43 | ||
44 | static void sh_gpio_free(struct gpio_chip *gc, unsigned offset) | |
45 | { | |
ca5481c6 | 46 | pinctrl_free_gpio(offset); |
b3c185a7 PM |
47 | } |
48 | ||
49 | static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value) | |
50 | { | |
51 | struct pinmux_data_reg *dr = NULL; | |
52 | int bit = 0; | |
53 | ||
54 | if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) | |
55 | BUG(); | |
56 | else | |
57 | sh_pfc_write_bit(dr, bit, value); | |
58 | } | |
59 | ||
b3c185a7 PM |
60 | static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio) |
61 | { | |
62 | struct pinmux_data_reg *dr = NULL; | |
63 | int bit = 0; | |
64 | ||
65 | if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) | |
66 | return -EINVAL; | |
67 | ||
68 | return sh_pfc_read_bit(dr, bit); | |
69 | } | |
70 | ||
ca5481c6 PM |
71 | static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
72 | { | |
73 | return pinctrl_gpio_direction_input(offset); | |
74 | } | |
75 | ||
76 | static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |
77 | int value) | |
78 | { | |
79 | sh_gpio_set_value(gpio_to_pfc(gc), offset, value); | |
80 | ||
81 | return pinctrl_gpio_direction_output(offset); | |
82 | } | |
83 | ||
b3c185a7 PM |
84 | static int sh_gpio_get(struct gpio_chip *gc, unsigned offset) |
85 | { | |
86 | return sh_gpio_get_value(gpio_to_pfc(gc), offset); | |
87 | } | |
88 | ||
89 | static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
90 | { | |
91 | sh_gpio_set_value(gpio_to_pfc(gc), offset, value); | |
92 | } | |
93 | ||
94 | static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
95 | { | |
96 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
97 | pinmux_enum_t enum_id; | |
98 | pinmux_enum_t *enum_ids; | |
99 | int i, k, pos; | |
100 | ||
101 | pos = 0; | |
102 | enum_id = 0; | |
103 | while (1) { | |
104 | pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id); | |
105 | if (pos <= 0 || !enum_id) | |
106 | break; | |
107 | ||
d4e62d00 LP |
108 | for (i = 0; i < pfc->pdata->gpio_irq_size; i++) { |
109 | enum_ids = pfc->pdata->gpio_irq[i].enum_ids; | |
b3c185a7 PM |
110 | for (k = 0; enum_ids[k]; k++) { |
111 | if (enum_ids[k] == enum_id) | |
d4e62d00 | 112 | return pfc->pdata->gpio_irq[i].irq; |
b3c185a7 PM |
113 | } |
114 | } | |
115 | } | |
116 | ||
117 | return -ENOSYS; | |
118 | } | |
119 | ||
120 | static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip) | |
121 | { | |
122 | struct sh_pfc *pfc = chip->pfc; | |
123 | struct gpio_chip *gc = &chip->gpio_chip; | |
124 | ||
125 | gc->request = sh_gpio_request; | |
126 | gc->free = sh_gpio_free; | |
127 | gc->direction_input = sh_gpio_direction_input; | |
128 | gc->get = sh_gpio_get; | |
129 | gc->direction_output = sh_gpio_direction_output; | |
130 | gc->set = sh_gpio_set; | |
131 | gc->to_irq = sh_gpio_to_irq; | |
132 | ||
d4e62d00 | 133 | WARN_ON(pfc->pdata->first_gpio != 0); /* needs testing */ |
b3c185a7 | 134 | |
d4e62d00 | 135 | gc->label = pfc->pdata->name; |
b3c185a7 | 136 | gc->owner = THIS_MODULE; |
d4e62d00 LP |
137 | gc->base = pfc->pdata->first_gpio; |
138 | gc->ngpio = (pfc->pdata->last_gpio - pfc->pdata->first_gpio) + 1; | |
b3c185a7 PM |
139 | } |
140 | ||
141 | int sh_pfc_register_gpiochip(struct sh_pfc *pfc) | |
142 | { | |
143 | struct sh_pfc_chip *chip; | |
144 | int ret; | |
145 | ||
146 | chip = kzalloc(sizeof(struct sh_pfc_chip), GFP_KERNEL); | |
147 | if (unlikely(!chip)) | |
148 | return -ENOMEM; | |
149 | ||
150 | chip->pfc = pfc; | |
151 | ||
152 | sh_pfc_gpio_setup(chip); | |
153 | ||
154 | ret = gpiochip_add(&chip->gpio_chip); | |
155 | if (unlikely(ret < 0)) | |
156 | kfree(chip); | |
157 | ||
158 | pr_info("%s handling gpio %d -> %d\n", | |
d4e62d00 LP |
159 | pfc->pdata->name, pfc->pdata->first_gpio, |
160 | pfc->pdata->last_gpio); | |
b3c185a7 PM |
161 | |
162 | return ret; | |
163 | } | |
164 | EXPORT_SYMBOL_GPL(sh_pfc_register_gpiochip); | |
165 | ||
166 | static int sh_pfc_gpio_match(struct gpio_chip *gc, void *data) | |
167 | { | |
168 | return !!strstr(gc->label, data); | |
169 | } | |
170 | ||
0fe763c5 | 171 | static int sh_pfc_gpio_probe(struct platform_device *pdev) |
b3c185a7 PM |
172 | { |
173 | struct sh_pfc_chip *chip; | |
174 | struct gpio_chip *gc; | |
175 | ||
176 | gc = gpiochip_find("_pfc", sh_pfc_gpio_match); | |
177 | if (unlikely(!gc)) { | |
178 | pr_err("Cant find gpio chip\n"); | |
179 | return -ENODEV; | |
180 | } | |
181 | ||
182 | chip = gpio_to_pfc_chip(gc); | |
183 | platform_set_drvdata(pdev, chip); | |
184 | ||
d4e62d00 | 185 | pr_info("attaching to GPIO chip %s\n", chip->pfc->pdata->name); |
b3c185a7 PM |
186 | |
187 | return 0; | |
188 | } | |
189 | ||
0fe763c5 | 190 | static int sh_pfc_gpio_remove(struct platform_device *pdev) |
b3c185a7 PM |
191 | { |
192 | struct sh_pfc_chip *chip = platform_get_drvdata(pdev); | |
193 | int ret; | |
194 | ||
195 | ret = gpiochip_remove(&chip->gpio_chip); | |
196 | if (unlikely(ret < 0)) | |
197 | return ret; | |
198 | ||
199 | kfree(chip); | |
200 | return 0; | |
201 | } | |
202 | ||
203 | static struct platform_driver sh_pfc_gpio_driver = { | |
204 | .probe = sh_pfc_gpio_probe, | |
0fe763c5 | 205 | .remove = sh_pfc_gpio_remove, |
b3c185a7 PM |
206 | .driver = { |
207 | .name = KBUILD_MODNAME, | |
208 | .owner = THIS_MODULE, | |
209 | }, | |
210 | }; | |
211 | ||
212 | static struct platform_device sh_pfc_gpio_device = { | |
213 | .name = KBUILD_MODNAME, | |
214 | .id = -1, | |
215 | }; | |
216 | ||
217 | static int __init sh_pfc_gpio_init(void) | |
218 | { | |
219 | int rc; | |
220 | ||
221 | rc = platform_driver_register(&sh_pfc_gpio_driver); | |
222 | if (likely(!rc)) { | |
223 | rc = platform_device_register(&sh_pfc_gpio_device); | |
224 | if (unlikely(rc)) | |
225 | platform_driver_unregister(&sh_pfc_gpio_driver); | |
226 | } | |
227 | ||
228 | return rc; | |
229 | } | |
230 | ||
231 | static void __exit sh_pfc_gpio_exit(void) | |
232 | { | |
233 | platform_device_unregister(&sh_pfc_gpio_device); | |
234 | platform_driver_unregister(&sh_pfc_gpio_driver); | |
235 | } | |
236 | ||
237 | module_init(sh_pfc_gpio_init); | |
238 | module_exit(sh_pfc_gpio_exit); | |
239 | ||
240 | MODULE_AUTHOR("Magnus Damm, Paul Mundt"); | |
241 | MODULE_DESCRIPTION("GPIO driver for SuperH pin function controller"); | |
242 | MODULE_LICENSE("GPL v2"); | |
243 | MODULE_ALIAS("platform:pfc-gpio"); |