[deliverable/linux.git] / drivers / sh / pfc / pinctrl.c

/*
 * SuperH Pin Function Controller pinmux support.
 *
 * Copyright (C) 2012  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#define DRV_NAME "pinctrl-sh_pfc"

#define pr_fmt(fmt) DRV_NAME " " KBUILD_MODNAME ": " fmt

#include <linux/init.h>
#include <linux/module.h>
#include <linux/sh_pfc.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/pinctrl/pinconf-generic.h>

#include "core.h"

struct sh_pfc_pinctrl {
	struct pinctrl_dev *pctl;
	struct sh_pfc *pfc;

	struct pinmux_gpio **functions;
	unsigned int nr_functions;

	struct pinctrl_pin_desc *pads;
	unsigned int nr_pads;

	spinlock_t lock;
};

static struct sh_pfc_pinctrl *sh_pfc_pmx;

static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->nr_pads;
}

static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
					 unsigned selector)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->pads[selector].name;
}

static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
				 const unsigned **pins, unsigned *num_pins)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);

	*pins = &pmx->pads[group].number;
	*num_pins = 1;

	return 0;
}

static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
				unsigned offset)
{
	seq_printf(s, "%s", DRV_NAME);
}

static struct pinctrl_ops sh_pfc_pinctrl_ops = {
	.get_groups_count	= sh_pfc_get_groups_count,
	.get_group_name		= sh_pfc_get_group_name,
	.get_group_pins		= sh_pfc_get_group_pins,
	.pin_dbg_show		= sh_pfc_pin_dbg_show,
};

static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->nr_functions;
}

static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
					    unsigned selector)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->functions[selector]->name;
}

static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
				      const char * const **groups,
				      unsigned * const num_groups)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);

	*groups = &pmx->functions[func]->name;
	*num_groups = 1;

	return 0;
}

static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
			      unsigned group)
{
	return 0;
}

static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
				unsigned group)
{
}

static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
{
	if (sh_pfc_config_gpio(pfc, offset,
			       PINMUX_TYPE_FUNCTION,
			       GPIO_CFG_DRYRUN) != 0)
		return -EINVAL;

	if (sh_pfc_config_gpio(pfc, offset,
			       PINMUX_TYPE_FUNCTION,
			       GPIO_CFG_REQ) != 0)
		return -EINVAL;

	return 0;
}

static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
			       int new_type)
{
	unsigned long flags;
	int pinmux_type;
	int ret = -EINVAL;

	spin_lock_irqsave(&pfc->lock, flags);

	pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;

	/*
	 * See if the present config needs to first be de-configured.
	 */
	switch (pinmux_type) {
	case PINMUX_TYPE_GPIO:
		break;
	case PINMUX_TYPE_OUTPUT:
	case PINMUX_TYPE_INPUT:
	case PINMUX_TYPE_INPUT_PULLUP:
	case PINMUX_TYPE_INPUT_PULLDOWN:
		sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
		break;
	default:
		goto err;
	}

	/*
	 * Dry run
	 */
	if (sh_pfc_config_gpio(pfc, offset, new_type,
			       GPIO_CFG_DRYRUN) != 0)
		goto err;

	/*
	 * Request
	 */
	if (sh_pfc_config_gpio(pfc, offset, new_type,
			       GPIO_CFG_REQ) != 0)
		goto err;

	pfc->pdata->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
	pfc->pdata->gpios[offset].flags |= new_type;

	ret = 0;

err:
	spin_unlock_irqrestore(&pfc->lock, flags);

	return ret;
}


static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
				      struct pinctrl_gpio_range *range,
				      unsigned offset)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	struct sh_pfc *pfc = pmx->pfc;
	unsigned long flags;
	int ret, pinmux_type;

	spin_lock_irqsave(&pfc->lock, flags);

	pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;

	switch (pinmux_type) {
	case PINMUX_TYPE_FUNCTION:
		pr_notice_once("Use of GPIO API for function requests is "
			       "deprecated, convert to pinctrl\n");
		/* handle for now */
		ret = sh_pfc_config_function(pfc, offset);
		if (unlikely(ret < 0))
			goto err;

		break;
	case PINMUX_TYPE_GPIO:
	case PINMUX_TYPE_INPUT:
	case PINMUX_TYPE_OUTPUT:
		break;
	default:
		pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
		ret = -ENOTSUPP;
		goto err;
	}

	ret = 0;

err:
	spin_unlock_irqrestore(&pfc->lock, flags);

	return ret;
}

static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
				     struct pinctrl_gpio_range *range,
				     unsigned offset)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	struct sh_pfc *pfc = pmx->pfc;
	unsigned long flags;
	int pinmux_type;

	spin_lock_irqsave(&pfc->lock, flags);

	pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;

	sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);

	spin_unlock_irqrestore(&pfc->lock, flags);
}

static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
				     struct pinctrl_gpio_range *range,
				     unsigned offset, bool input)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;

	return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
}

static struct pinmux_ops sh_pfc_pinmux_ops = {
	.get_functions_count	= sh_pfc_get_functions_count,
	.get_function_name	= sh_pfc_get_function_name,
	.get_function_groups	= sh_pfc_get_function_groups,
	.enable			= sh_pfc_noop_enable,
	.disable		= sh_pfc_noop_disable,
	.gpio_request_enable	= sh_pfc_gpio_request_enable,
	.gpio_disable_free	= sh_pfc_gpio_disable_free,
	.gpio_set_direction	= sh_pfc_gpio_set_direction,
};

static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
			      unsigned long *config)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	struct sh_pfc *pfc = pmx->pfc;

	*config = pfc->pdata->gpios[pin].flags & PINMUX_FLAG_TYPE;

	return 0;
}

static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
			      unsigned long config)
{
	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);

	/* Validate the new type */
	if (config >= PINMUX_FLAG_TYPE)
		return -EINVAL;

	return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
}

static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
				    struct seq_file *s, unsigned pin)
{
	const char *pinmux_type_str[] = {
		[PINMUX_TYPE_NONE]		= "none",
		[PINMUX_TYPE_FUNCTION]		= "function",
		[PINMUX_TYPE_GPIO]		= "gpio",
		[PINMUX_TYPE_OUTPUT]		= "output",
		[PINMUX_TYPE_INPUT]		= "input",
		[PINMUX_TYPE_INPUT_PULLUP]	= "input bias pull up",
		[PINMUX_TYPE_INPUT_PULLDOWN]	= "input bias pull down",
	};
	unsigned long config;
	int rc;

	rc = sh_pfc_pinconf_get(pctldev, pin, &config);
	if (unlikely(rc != 0))
		return;

	seq_printf(s, " %s", pinmux_type_str[config]);
}

static struct pinconf_ops sh_pfc_pinconf_ops = {
	.pin_config_get		= sh_pfc_pinconf_get,
	.pin_config_set		= sh_pfc_pinconf_set,
	.pin_config_dbg_show	= sh_pfc_pinconf_dbg_show,
};

static struct pinctrl_gpio_range sh_pfc_gpio_range = {
	.name		= DRV_NAME,
	.id		= 0,
};

static struct pinctrl_desc sh_pfc_pinctrl_desc = {
	.name		= DRV_NAME,
	.owner		= THIS_MODULE,
	.pctlops	= &sh_pfc_pinctrl_ops,
	.pmxops		= &sh_pfc_pinmux_ops,
	.confops	= &sh_pfc_pinconf_ops,
};

static inline void sh_pfc_map_one_gpio(struct sh_pfc *pfc,
				       struct sh_pfc_pinctrl *pmx,
				       struct pinmux_gpio *gpio,
				       unsigned offset)
{
	struct pinmux_data_reg *dummy;
	unsigned long flags;
	int bit;

	gpio->flags &= ~PINMUX_FLAG_TYPE;

	if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
		gpio->flags |= PINMUX_TYPE_GPIO;
	else {
		gpio->flags |= PINMUX_TYPE_FUNCTION;

		spin_lock_irqsave(&pmx->lock, flags);
		pmx->nr_functions++;
		spin_unlock_irqrestore(&pmx->lock, flags);
	}
}

/* pinmux ranges -> pinctrl pin descs */
static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
{
	unsigned long flags;
	int i;

	pmx->nr_pads = pfc->pdata->last_gpio - pfc->pdata->first_gpio + 1;

	pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
			    GFP_KERNEL);
	if (unlikely(!pmx->pads)) {
		pmx->nr_pads = 0;
		return -ENOMEM;
	}

	spin_lock_irqsave(&pfc->lock, flags);

	/*
	 * We don't necessarily have a 1:1 mapping between pin and linux
	 * GPIO number, as the latter maps to the associated enum_id.
	 * Care needs to be taken to translate back to pin space when
	 * dealing with any pin configurations.
	 */
	for (i = 0; i < pmx->nr_pads; i++) {
		struct pinctrl_pin_desc *pin = pmx->pads + i;
		struct pinmux_gpio *gpio = pfc->pdata->gpios + i;

		pin->number = pfc->pdata->first_gpio + i;
		pin->name = gpio->name;

		/* XXX */
		if (unlikely(!gpio->enum_id))
			continue;

		sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
	}

	spin_unlock_irqrestore(&pfc->lock, flags);

	sh_pfc_pinctrl_desc.pins = pmx->pads;
	sh_pfc_pinctrl_desc.npins = pmx->nr_pads;

	return 0;
}

static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
{
	unsigned long flags;
	int i, fn;

	pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *),
				 GFP_KERNEL);
	if (unlikely(!pmx->functions))
		return -ENOMEM;

	spin_lock_irqsave(&pmx->lock, flags);

	for (i = fn = 0; i < pmx->nr_pads; i++) {
		struct pinmux_gpio *gpio = pfc->pdata->gpios + i;

		if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
			pmx->functions[fn++] = gpio;
	}

	spin_unlock_irqrestore(&pmx->lock, flags);

	return 0;
}

static int sh_pfc_pinctrl_probe(struct platform_device *pdev)
{
	struct sh_pfc *pfc;
	int ret;

	if (unlikely(!sh_pfc_pmx))
		return -ENODEV;

	pfc = sh_pfc_pmx->pfc;

	ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx);
	if (unlikely(ret != 0))
		return ret;

	ret = sh_pfc_map_functions(pfc, sh_pfc_pmx);
	if (unlikely(ret != 0))
		goto free_pads;

	sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
					    sh_pfc_pmx);
	if (IS_ERR(sh_pfc_pmx->pctl)) {
		ret = PTR_ERR(sh_pfc_pmx->pctl);
		goto free_functions;
	}

	sh_pfc_gpio_range.npins = pfc->pdata->last_gpio
				- pfc->pdata->first_gpio + 1;
	sh_pfc_gpio_range.base = pfc->pdata->first_gpio;
	sh_pfc_gpio_range.pin_base = pfc->pdata->first_gpio;

	pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);

	platform_set_drvdata(pdev, sh_pfc_pmx);

	return 0;

free_functions:
	kfree(sh_pfc_pmx->functions);
free_pads:
	kfree(sh_pfc_pmx->pads);
	kfree(sh_pfc_pmx);

	return ret;
}

static int sh_pfc_pinctrl_remove(struct platform_device *pdev)
{
	struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev);

	pinctrl_unregister(pmx->pctl);

	platform_set_drvdata(pdev, NULL);

	kfree(sh_pfc_pmx->functions);
	kfree(sh_pfc_pmx->pads);
	kfree(sh_pfc_pmx);

	return 0;
}

static struct platform_driver sh_pfc_pinctrl_driver = {
	.probe		= sh_pfc_pinctrl_probe,
	.remove		= sh_pfc_pinctrl_remove,
	.driver		= {
		.name	= DRV_NAME,
		.owner	= THIS_MODULE,
	},
};

static struct platform_device sh_pfc_pinctrl_device = {
	.name		= DRV_NAME,
	.id		= -1,
};

static int sh_pfc_pinctrl_init(void)
{
	int rc;

	rc = platform_driver_register(&sh_pfc_pinctrl_driver);
	if (likely(!rc)) {
		rc = platform_device_register(&sh_pfc_pinctrl_device);
		if (unlikely(rc))
			platform_driver_unregister(&sh_pfc_pinctrl_driver);
	}

	return rc;
}

int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
{
	sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
	if (unlikely(!sh_pfc_pmx))
		return -ENOMEM;

	spin_lock_init(&sh_pfc_pmx->lock);

	sh_pfc_pmx->pfc = pfc;

	return sh_pfc_pinctrl_init();
}
EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl);

static void __exit sh_pfc_pinctrl_exit(void)
{
	platform_driver_unregister(&sh_pfc_pinctrl_driver);
}
module_exit(sh_pfc_pinctrl_exit);
Commit	Line	Data
ca5481c6 PM	1	/*
	2	* SuperH Pin Function Controller pinmux support.
	3	*
	4	* Copyright (C) 2012 Paul Mundt
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
54407110 PM	10	#define DRV_NAME "pinctrl-sh_pfc"
	11
	12	#define pr_fmt(fmt) DRV_NAME " " KBUILD_MODNAME ": " fmt
ca5481c6 PM	13
	14	#include <linux/init.h>
	15	#include <linux/module.h>
	16	#include <linux/sh_pfc.h>
	17	#include <linux/err.h>
	18	#include <linux/slab.h>
d93a891f	19	#include <linux/spinlock.h>
ca5481c6 PM	20	#include <linux/platform_device.h>
	21	#include <linux/pinctrl/consumer.h>
	22	#include <linux/pinctrl/pinctrl.h>
	23	#include <linux/pinctrl/pinconf.h>
	24	#include <linux/pinctrl/pinmux.h>
	25	#include <linux/pinctrl/pinconf-generic.h>
	26
f9165132 LP	27	#include "core.h"
f9165132 LP	28
ca5481c6 PM	29	struct sh_pfc_pinctrl {
	30	struct pinctrl_dev *pctl;
	31	struct sh_pfc *pfc;
	32
d93a891f PM	33	struct pinmux_gpio **functions;
	34	unsigned int nr_functions;
	35
ca5481c6 PM	36	struct pinctrl_pin_desc *pads;
ca5481c6 PM	37	unsigned int nr_pads;
d93a891f PM	38
d93a891f PM	39	spinlock_t lock;
ca5481c6 PM	40	};
	41
	42	static struct sh_pfc_pinctrl *sh_pfc_pmx;
	43
e3f805e8	44	static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
ca5481c6	45	{
e3f805e8 PM	46	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	47
	48	return pmx->nr_pads;
ca5481c6 PM	49	}
ca5481c6 PM	50
e3f805e8	51	static const char sh_pfc_get_group_name(struct pinctrl_dev pctldev,
ca5481c6 PM	52	unsigned selector)
ca5481c6 PM	53	{
e3f805e8 PM	54	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	55
	56	return pmx->pads[selector].name;
ca5481c6 PM	57	}
	58
	59	static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
	60	const unsigned *pins, unsigned num_pins)
	61	{
e3f805e8 PM	62	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	63
	64	*pins = &pmx->pads[group].number;
	65	*num_pins = 1;
	66
	67	return 0;
ca5481c6 PM	68	}
ca5481c6 PM	69
fdd85ec3 PM	70	static void sh_pfc_pin_dbg_show(struct pinctrl_dev pctldev, struct seq_file s,
	71	unsigned offset)
	72	{
	73	seq_printf(s, "%s", DRV_NAME);
	74	}
	75
ca5481c6	76	static struct pinctrl_ops sh_pfc_pinctrl_ops = {
e3f805e8 PM	77	.get_groups_count = sh_pfc_get_groups_count,
e3f805e8 PM	78	.get_group_name = sh_pfc_get_group_name,
ca5481c6	79	.get_group_pins = sh_pfc_get_group_pins,
fdd85ec3	80	.pin_dbg_show = sh_pfc_pin_dbg_show,
ca5481c6 PM	81	};
ca5481c6 PM	82
d93a891f PM	83	static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
	84	{
	85	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	86
	87	return pmx->nr_functions;
	88	}
	89
	90	static const char sh_pfc_get_function_name(struct pinctrl_dev pctldev,
	91	unsigned selector)
	92	{
	93	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	94
	95	return pmx->functions[selector]->name;
	96	}
ca5481c6	97
ca5481c6 PM	98	static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
	99	const char * const **groups,
	100	unsigned * const num_groups)
	101	{
d93a891f PM	102	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	103
	104	*groups = &pmx->functions[func]->name;
	105	*num_groups = 1;
	106
ca5481c6 PM	107	return 0;
	108	}
	109
	110	static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
	111	unsigned group)
	112	{
	113	return 0;
	114	}
	115
	116	static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
	117	unsigned group)
	118	{
	119	}
	120
d93a891f PM	121	static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
	122	{
	123	if (sh_pfc_config_gpio(pfc, offset,
	124	PINMUX_TYPE_FUNCTION,
	125	GPIO_CFG_DRYRUN) != 0)
	126	return -EINVAL;
	127
	128	if (sh_pfc_config_gpio(pfc, offset,
	129	PINMUX_TYPE_FUNCTION,
	130	GPIO_CFG_REQ) != 0)
	131	return -EINVAL;
	132
	133	return 0;
	134	}
	135
fdd85ec3 PM	136	static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
	137	int new_type)
	138	{
	139	unsigned long flags;
	140	int pinmux_type;
	141	int ret = -EINVAL;
	142
	143	spin_lock_irqsave(&pfc->lock, flags);
	144
d4e62d00	145	pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
fdd85ec3 PM	146
	147	/*
	148	* See if the present config needs to first be de-configured.
	149	*/
	150	switch (pinmux_type) {
	151	case PINMUX_TYPE_GPIO:
	152	break;
	153	case PINMUX_TYPE_OUTPUT:
	154	case PINMUX_TYPE_INPUT:
	155	case PINMUX_TYPE_INPUT_PULLUP:
	156	case PINMUX_TYPE_INPUT_PULLDOWN:
	157	sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
	158	break;
	159	default:
	160	goto err;
	161	}
	162
	163	/*
	164	* Dry run
	165	*/
	166	if (sh_pfc_config_gpio(pfc, offset, new_type,
	167	GPIO_CFG_DRYRUN) != 0)
	168	goto err;
	169
	170	/*
	171	* Request
	172	*/
	173	if (sh_pfc_config_gpio(pfc, offset, new_type,
	174	GPIO_CFG_REQ) != 0)
	175	goto err;
	176
d4e62d00 LP	177	pfc->pdata->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
d4e62d00 LP	178	pfc->pdata->gpios[offset].flags \|= new_type;
fdd85ec3 PM	179
	180	ret = 0;
	181
	182	err:
	183	spin_unlock_irqrestore(&pfc->lock, flags);
	184
	185	return ret;
	186	}
	187
	188
ca5481c6 PM	189	static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
	190	struct pinctrl_gpio_range *range,
	191	unsigned offset)
	192	{
	193	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	194	struct sh_pfc *pfc = pmx->pfc;
ca5481c6	195	unsigned long flags;
d93a891f	196	int ret, pinmux_type;
ca5481c6 PM	197
	198	spin_lock_irqsave(&pfc->lock, flags);
	199
d4e62d00	200	pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
ca5481c6	201
d93a891f PM	202	switch (pinmux_type) {
	203	case PINMUX_TYPE_FUNCTION:
	204	pr_notice_once("Use of GPIO API for function requests is "
	205	"deprecated, convert to pinctrl\n");
	206	/* handle for now */
	207	ret = sh_pfc_config_function(pfc, offset);
	208	if (unlikely(ret < 0))
ca5481c6	209	goto err;
ca5481c6	210
d93a891f PM	211	break;
d93a891f PM	212	case PINMUX_TYPE_GPIO:
16d74ebe PM	213	case PINMUX_TYPE_INPUT:
16d74ebe PM	214	case PINMUX_TYPE_OUTPUT:
d93a891f PM	215	break;
	216	default:
	217	pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
077664a2 LP	218	ret = -ENOTSUPP;
077664a2 LP	219	goto err;
d93a891f	220	}
ca5481c6 PM	221
	222	ret = 0;
	223
	224	err:
	225	spin_unlock_irqrestore(&pfc->lock, flags);
	226
	227	return ret;
	228	}
	229
	230	static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
	231	struct pinctrl_gpio_range *range,
	232	unsigned offset)
	233	{
	234	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
	235	struct sh_pfc *pfc = pmx->pfc;
	236	unsigned long flags;
	237	int pinmux_type;
	238
	239	spin_lock_irqsave(&pfc->lock, flags);
	240
d4e62d00	241	pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
ca5481c6 PM	242
	243	sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
	244
ca5481c6 PM	245	spin_unlock_irqrestore(&pfc->lock, flags);
	246	}
	247
	248	static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
	249	struct pinctrl_gpio_range *range,
	250	unsigned offset, bool input)
	251	{
	252	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
fdd85ec3	253	int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
ca5481c6	254
fdd85ec3	255	return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
ca5481c6 PM	256	}
	257
	258	static struct pinmux_ops sh_pfc_pinmux_ops = {
d93a891f PM	259	.get_functions_count = sh_pfc_get_functions_count,
d93a891f PM	260	.get_function_name = sh_pfc_get_function_name,
ca5481c6 PM	261	.get_function_groups = sh_pfc_get_function_groups,
	262	.enable = sh_pfc_noop_enable,
	263	.disable = sh_pfc_noop_disable,
	264	.gpio_request_enable = sh_pfc_gpio_request_enable,
	265	.gpio_disable_free = sh_pfc_gpio_disable_free,
	266	.gpio_set_direction = sh_pfc_gpio_set_direction,
	267	};
	268
	269	static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
	270	unsigned long *config)
	271	{
fdd85ec3 PM	272	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
fdd85ec3 PM	273	struct sh_pfc *pfc = pmx->pfc;
d93a891f	274
d4e62d00	275	*config = pfc->pdata->gpios[pin].flags & PINMUX_FLAG_TYPE;
d93a891f	276
fdd85ec3	277	return 0;
ca5481c6 PM	278	}
	279
	280	static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
	281	unsigned long config)
	282	{
fdd85ec3	283	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
fdd85ec3 PM	284
	285	/* Validate the new type */
	286	if (config >= PINMUX_FLAG_TYPE)
	287	return -EINVAL;
	288
	289	return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
	290	}
	291
	292	static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
	293	struct seq_file *s, unsigned pin)
	294	{
	295	const char *pinmux_type_str[] = {
	296	[PINMUX_TYPE_NONE] = "none",
	297	[PINMUX_TYPE_FUNCTION] = "function",
	298	[PINMUX_TYPE_GPIO] = "gpio",
	299	[PINMUX_TYPE_OUTPUT] = "output",
	300	[PINMUX_TYPE_INPUT] = "input",
	301	[PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
	302	[PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
	303	};
	304	unsigned long config;
	305	int rc;
	306
	307	rc = sh_pfc_pinconf_get(pctldev, pin, &config);
	308	if (unlikely(rc != 0))
	309	return;
	310
	311	seq_printf(s, " %s", pinmux_type_str[config]);
ca5481c6 PM	312	}
	313
	314	static struct pinconf_ops sh_pfc_pinconf_ops = {
ca5481c6 PM	315	.pin_config_get = sh_pfc_pinconf_get,
ca5481c6 PM	316	.pin_config_set = sh_pfc_pinconf_set,
fdd85ec3	317	.pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
ca5481c6 PM	318	};
	319
	320	static struct pinctrl_gpio_range sh_pfc_gpio_range = {
54407110	321	.name = DRV_NAME,
ca5481c6 PM	322	.id = 0,
	323	};
	324
	325	static struct pinctrl_desc sh_pfc_pinctrl_desc = {
54407110	326	.name = DRV_NAME,
ca5481c6 PM	327	.owner = THIS_MODULE,
	328	.pctlops = &sh_pfc_pinctrl_ops,
	329	.pmxops = &sh_pfc_pinmux_ops,
	330	.confops = &sh_pfc_pinconf_ops,
	331	};
	332
0fe763c5 GKH	333	static inline void sh_pfc_map_one_gpio(struct sh_pfc *pfc,
	334	struct sh_pfc_pinctrl *pmx,
	335	struct pinmux_gpio *gpio,
	336	unsigned offset)
d93a891f PM	337	{
	338	struct pinmux_data_reg *dummy;
	339	unsigned long flags;
	340	int bit;
	341
	342	gpio->flags &= ~PINMUX_FLAG_TYPE;
	343
	344	if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
	345	gpio->flags \|= PINMUX_TYPE_GPIO;
	346	else {
	347	gpio->flags \|= PINMUX_TYPE_FUNCTION;
	348
	349	spin_lock_irqsave(&pmx->lock, flags);
	350	pmx->nr_functions++;
	351	spin_unlock_irqrestore(&pmx->lock, flags);
	352	}
	353	}
	354
ca5481c6	355	/* pinmux ranges -> pinctrl pin descs */
0fe763c5	356	static int sh_pfc_map_gpios(struct sh_pfc pfc, struct sh_pfc_pinctrl pmx)
ca5481c6	357	{
d93a891f	358	unsigned long flags;
ca5481c6 PM	359	int i;
ca5481c6 PM	360
d4e62d00	361	pmx->nr_pads = pfc->pdata->last_gpio - pfc->pdata->first_gpio + 1;
ca5481c6 PM	362
	363	pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
	364	GFP_KERNEL);
	365	if (unlikely(!pmx->pads)) {
	366	pmx->nr_pads = 0;
	367	return -ENOMEM;
	368	}
	369
d93a891f PM	370	spin_lock_irqsave(&pfc->lock, flags);
d93a891f PM	371
ca5481c6 PM	372	/*
	373	* We don't necessarily have a 1:1 mapping between pin and linux
	374	* GPIO number, as the latter maps to the associated enum_id.
	375	* Care needs to be taken to translate back to pin space when
	376	* dealing with any pin configurations.
	377	*/
	378	for (i = 0; i < pmx->nr_pads; i++) {
	379	struct pinctrl_pin_desc *pin = pmx->pads + i;
d4e62d00	380	struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
ca5481c6	381
d4e62d00	382	pin->number = pfc->pdata->first_gpio + i;
ca5481c6	383	pin->name = gpio->name;
d93a891f	384
e3e79454 PM	385	/* XXX */
	386	if (unlikely(!gpio->enum_id))
	387	continue;
	388
d93a891f	389	sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
ca5481c6 PM	390	}
ca5481c6 PM	391
d93a891f PM	392	spin_unlock_irqrestore(&pfc->lock, flags);
d93a891f PM	393
ca5481c6 PM	394	sh_pfc_pinctrl_desc.pins = pmx->pads;
	395	sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
	396
	397	return 0;
	398	}
	399
0fe763c5	400	static int sh_pfc_map_functions(struct sh_pfc pfc, struct sh_pfc_pinctrl pmx)
d93a891f PM	401	{
	402	unsigned long flags;
	403	int i, fn;
	404
	405	pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *),
	406	GFP_KERNEL);
	407	if (unlikely(!pmx->functions))
	408	return -ENOMEM;
	409
	410	spin_lock_irqsave(&pmx->lock, flags);
	411
	412	for (i = fn = 0; i < pmx->nr_pads; i++) {
d4e62d00	413	struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
d93a891f PM	414
	415	if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
	416	pmx->functions[fn++] = gpio;
	417	}
	418
	419	spin_unlock_irqrestore(&pmx->lock, flags);
	420
	421	return 0;
	422	}
	423
0fe763c5	424	static int sh_pfc_pinctrl_probe(struct platform_device *pdev)
ca5481c6 PM	425	{
	426	struct sh_pfc *pfc;
	427	int ret;
	428
	429	if (unlikely(!sh_pfc_pmx))
	430	return -ENODEV;
	431
	432	pfc = sh_pfc_pmx->pfc;
	433
	434	ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx);
	435	if (unlikely(ret != 0))
	436	return ret;
	437
d93a891f PM	438	ret = sh_pfc_map_functions(pfc, sh_pfc_pmx);
	439	if (unlikely(ret != 0))
	440	goto free_pads;
	441
ca5481c6 PM	442	sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
	443	sh_pfc_pmx);
	444	if (IS_ERR(sh_pfc_pmx->pctl)) {
	445	ret = PTR_ERR(sh_pfc_pmx->pctl);
d93a891f	446	goto free_functions;
ca5481c6 PM	447	}
ca5481c6 PM	448
d4e62d00 LP	449	sh_pfc_gpio_range.npins = pfc->pdata->last_gpio
	450	- pfc->pdata->first_gpio + 1;
	451	sh_pfc_gpio_range.base = pfc->pdata->first_gpio;
	452	sh_pfc_gpio_range.pin_base = pfc->pdata->first_gpio;
ca5481c6 PM	453
	454	pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);
	455
	456	platform_set_drvdata(pdev, sh_pfc_pmx);
	457
	458	return 0;
	459
d93a891f PM	460	free_functions:
	461	kfree(sh_pfc_pmx->functions);
	462	free_pads:
ca5481c6 PM	463	kfree(sh_pfc_pmx->pads);
ca5481c6 PM	464	kfree(sh_pfc_pmx);
d93a891f	465
ca5481c6 PM	466	return ret;
	467	}
	468
0fe763c5	469	static int sh_pfc_pinctrl_remove(struct platform_device *pdev)
ca5481c6 PM	470	{
	471	struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev);
	472
ca5481c6 PM	473	pinctrl_unregister(pmx->pctl);
	474
	475	platform_set_drvdata(pdev, NULL);
	476
d93a891f	477	kfree(sh_pfc_pmx->functions);
ca5481c6 PM	478	kfree(sh_pfc_pmx->pads);
	479	kfree(sh_pfc_pmx);
	480
	481	return 0;
	482	}
	483
	484	static struct platform_driver sh_pfc_pinctrl_driver = {
	485	.probe = sh_pfc_pinctrl_probe,
0fe763c5	486	.remove = sh_pfc_pinctrl_remove,
ca5481c6	487	.driver = {
54407110	488	.name = DRV_NAME,
ca5481c6 PM	489	.owner = THIS_MODULE,
	490	},
	491	};
	492
	493	static struct platform_device sh_pfc_pinctrl_device = {
54407110	494	.name = DRV_NAME,
ca5481c6 PM	495	.id = -1,
	496	};
	497
1e32dfe3	498	static int sh_pfc_pinctrl_init(void)
ca5481c6 PM	499	{
	500	int rc;
	501
	502	rc = platform_driver_register(&sh_pfc_pinctrl_driver);
	503	if (likely(!rc)) {
	504	rc = platform_device_register(&sh_pfc_pinctrl_device);
	505	if (unlikely(rc))
	506	platform_driver_unregister(&sh_pfc_pinctrl_driver);
	507	}
	508
	509	return rc;
	510	}
	511
1e32dfe3 PM	512	int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
	513	{
	514	sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
	515	if (unlikely(!sh_pfc_pmx))
	516	return -ENOMEM;
	517
	518	spin_lock_init(&sh_pfc_pmx->lock);
	519
	520	sh_pfc_pmx->pfc = pfc;
	521
	522	return sh_pfc_pinctrl_init();
	523	}
	524	EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl);
	525
ca5481c6 PM	526	static void __exit sh_pfc_pinctrl_exit(void)
	527	{
	528	platform_driver_unregister(&sh_pfc_pinctrl_driver);
	529	}
ca5481c6	530	module_exit(sh_pfc_pinctrl_exit);