[deliverable/linux.git] / drivers / soc / ti / knav_qmss.h

/*
 * Keystone Navigator QMSS driver internal header
 *
 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
 * Author:	Sandeep Nair <sandeep_n@ti.com>
 *		Cyril Chemparathy <cyril@ti.com>
 *		Santosh Shilimkar <santosh.shilimkar@ti.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 */

#ifndef __KNAV_QMSS_H__
#define __KNAV_QMSS_H__

#define THRESH_GTE	BIT(7)
#define THRESH_LT	0

#define PDSP_CTRL_PC_MASK	0xffff0000
#define PDSP_CTRL_SOFT_RESET	BIT(0)
#define PDSP_CTRL_ENABLE	BIT(1)
#define PDSP_CTRL_RUNNING	BIT(15)

#define ACC_MAX_CHANNEL		48
#define ACC_DEFAULT_PERIOD	25 /* usecs */

#define ACC_CHANNEL_INT_BASE		2

#define ACC_LIST_ENTRY_TYPE		1
#define ACC_LIST_ENTRY_WORDS		(1 << ACC_LIST_ENTRY_TYPE)
#define ACC_LIST_ENTRY_QUEUE_IDX	0
#define ACC_LIST_ENTRY_DESC_IDX	(ACC_LIST_ENTRY_WORDS - 1)

#define ACC_CMD_DISABLE_CHANNEL	0x80
#define ACC_CMD_ENABLE_CHANNEL	0x81
#define ACC_CFG_MULTI_QUEUE		BIT(21)

#define ACC_INTD_OFFSET_EOI		(0x0010)
#define ACC_INTD_OFFSET_COUNT(ch)	(0x0300 + 4 * (ch))
#define ACC_INTD_OFFSET_STATUS(ch)	(0x0200 + 4 * ((ch) / 32))

#define RANGE_MAX_IRQS			64

#define ACC_DESCS_MAX		SZ_1K
#define ACC_DESCS_MASK		(ACC_DESCS_MAX - 1)
#define DESC_SIZE_MASK		0xful
#define DESC_PTR_MASK		(~DESC_SIZE_MASK)

#define KNAV_NAME_SIZE			32

enum knav_acc_result {
	ACC_RET_IDLE,
	ACC_RET_SUCCESS,
	ACC_RET_INVALID_COMMAND,
	ACC_RET_INVALID_CHANNEL,
	ACC_RET_INACTIVE_CHANNEL,
	ACC_RET_ACTIVE_CHANNEL,
	ACC_RET_INVALID_QUEUE,
	ACC_RET_INVALID_RET,
};

struct knav_reg_config {
	u32		revision;
	u32		__pad1;
	u32		divert;
	u32		link_ram_base0;
	u32		link_ram_size0;
	u32		link_ram_base1;
	u32		__pad2[2];
	u32		starvation[0];
};

struct knav_reg_region {
	u32		base;
	u32		start_index;
	u32		size_count;
	u32		__pad;
};

struct knav_reg_pdsp_regs {
	u32		control;
	u32		status;
	u32		cycle_count;
	u32		stall_count;
};

struct knav_reg_acc_command {
	u32		command;
	u32		queue_mask;
	u32		list_phys;
	u32		queue_num;
	u32		timer_config;
};

struct knav_link_ram_block {
	dma_addr_t	 phys;
	void		*virt;
	size_t		 size;
};

struct knav_acc_info {
	u32			 pdsp_id;
	u32			 start_channel;
	u32			 list_entries;
	u32			 pacing_mode;
	u32			 timer_count;
	int			 mem_size;
	int			 list_size;
	struct knav_pdsp_info	*pdsp;
};

struct knav_acc_channel {
	u32			channel;
	u32			list_index;
	u32			open_mask;
	u32			*list_cpu[2];
	dma_addr_t		list_dma[2];
	char			name[KNAV_NAME_SIZE];
	atomic_t		retrigger_count;
};

struct knav_pdsp_info {
	const char					*name;
	struct knav_reg_pdsp_regs  __iomem		*regs;
	union {
		void __iomem				*command;
		struct knav_reg_acc_command __iomem	*acc_command;
		u32 __iomem				*qos_command;
	};
	void __iomem					*intd;
	u32 __iomem					*iram;
	u32						id;
	struct list_head				list;
};

struct knav_qmgr_info {
	unsigned			start_queue;
	unsigned			num_queues;
	struct knav_reg_config __iomem	*reg_config;
	struct knav_reg_region __iomem	*reg_region;
	struct knav_reg_queue __iomem	*reg_push, *reg_pop, *reg_peek;
	void __iomem			*reg_status;
	struct list_head		list;
};

#define KNAV_NUM_LINKRAM	2

/**
 * struct knav_queue_stats:	queue statistics
 * pushes:			number of push operations
 * pops:			number of pop operations
 * push_errors:			number of push errors
 * pop_errors:			number of pop errors
 * notifies:			notifier counts
 */
struct knav_queue_stats {
	atomic_t	 pushes;
	atomic_t	 pops;
	atomic_t	 push_errors;
	atomic_t	 pop_errors;
	atomic_t	 notifies;
};

/**
 * struct knav_reg_queue:	queue registers
 * @entry_count:		valid entries in the queue
 * @byte_count:			total byte count in thhe queue
 * @packet_size:		packet size for the queue
 * @ptr_size_thresh:		packet pointer size threshold
 */
struct knav_reg_queue {
	u32		entry_count;
	u32		byte_count;
	u32		packet_size;
	u32		ptr_size_thresh;
};

/**
 * struct knav_region:		qmss region info
 * @dma_start, dma_end:		start and end dma address
 * @virt_start, virt_end:	start and end virtual address
 * @desc_size:			descriptor size
 * @used_desc:			consumed descriptors
 * @id:				region number
 * @num_desc:			total descriptors
 * @link_index:			index of the first descriptor
 * @name:			region name
 * @list:			instance in the device's region list
 * @pools:			list of descriptor pools in the region
 */
struct knav_region {
	dma_addr_t		dma_start, dma_end;
	void			*virt_start, *virt_end;
	unsigned		desc_size;
	unsigned		used_desc;
	unsigned		id;
	unsigned		num_desc;
	unsigned		link_index;
	const char		*name;
	struct list_head	list;
	struct list_head	pools;
};

/**
 * struct knav_pool:		qmss pools
 * @dev:			device pointer
 * @region:			qmss region info
 * @queue:			queue registers
 * @kdev:			qmss device pointer
 * @region_offset:		offset from the base
 * @num_desc:			total descriptors
 * @desc_size:			descriptor size
 * @region_id:			region number
 * @name:			pool name
 * @list:			list head
 * @region_inst:		instance in the region's pool list
 */
struct knav_pool {
	struct device			*dev;
	struct knav_region		*region;
	struct knav_queue		*queue;
	struct knav_device		*kdev;
	int				region_offset;
	int				num_desc;
	int				desc_size;
	int				region_id;
	const char			*name;
	struct list_head		list;
	struct list_head		region_inst;
};

/**
 * struct knav_queue_inst:		qmss queue instace properties
 * @descs:				descriptor pointer
 * @desc_head, desc_tail, desc_count:	descriptor counters
 * @acc:				accumulator channel pointer
 * @kdev:				qmss device pointer
 * @range:				range info
 * @qmgr:				queue manager info
 * @id:					queue instace id
 * @irq_num:				irq line number
 * @notify_needed:			notifier needed based on queue type
 * @num_notifiers:			total notifiers
 * @handles:				list head
 * @name:				queue instance name
 * @irq_name:				irq line name
 */
struct knav_queue_inst {
	u32				*descs;
	atomic_t			desc_head, desc_tail, desc_count;
	struct knav_acc_channel	*acc;
	struct knav_device		*kdev;
	struct knav_range_info		*range;
	struct knav_qmgr_info		*qmgr;
	u32				id;
	int				irq_num;
	int				notify_needed;
	atomic_t			num_notifiers;
	struct list_head		handles;
	const char			*name;
	const char			*irq_name;
};

/**
 * struct knav_queue:			qmss queue properties
 * @reg_push, reg_pop, reg_peek:	push, pop queue registers
 * @inst:				qmss queue instace properties
 * @notifier_fn:			notifier function
 * @notifier_fn_arg:			notifier function argument
 * @notifier_enabled:			notier enabled for a give queue
 * @rcu:				rcu head
 * @flags:				queue flags
 * @list:				list head
 */
struct knav_queue {
	struct knav_reg_queue __iomem	*reg_push, *reg_pop, *reg_peek;
	struct knav_queue_inst		*inst;
	struct knav_queue_stats	stats;
	knav_queue_notify_fn		notifier_fn;
	void				*notifier_fn_arg;
	atomic_t			notifier_enabled;
	struct rcu_head			rcu;
	unsigned			flags;
	struct list_head		list;
};

struct knav_device {
	struct device				*dev;
	unsigned				base_id;
	unsigned				num_queues;
	unsigned				num_queues_in_use;
	unsigned				inst_shift;
	struct knav_link_ram_block		link_rams[KNAV_NUM_LINKRAM];
	void					*instances;
	struct list_head			regions;
	struct list_head			queue_ranges;
	struct list_head			pools;
	struct list_head			pdsps;
	struct list_head			qmgrs;
};

struct knav_range_ops {
	int	(*init_range)(struct knav_range_info *range);
	int	(*free_range)(struct knav_range_info *range);
	int	(*init_queue)(struct knav_range_info *range,
			      struct knav_queue_inst *inst);
	int	(*open_queue)(struct knav_range_info *range,
			      struct knav_queue_inst *inst, unsigned flags);
	int	(*close_queue)(struct knav_range_info *range,
			       struct knav_queue_inst *inst);
	int	(*set_notify)(struct knav_range_info *range,
			      struct knav_queue_inst *inst, bool enabled);
};

struct knav_irq_info {
	int	irq;
	u32	cpu_map;
};

struct knav_range_info {
	const char			*name;
	struct knav_device		*kdev;
	unsigned			queue_base;
	unsigned			num_queues;
	void				*queue_base_inst;
	unsigned			flags;
	struct list_head		list;
	struct knav_range_ops		*ops;
	struct knav_acc_info		acc_info;
	struct knav_acc_channel	*acc;
	unsigned			num_irqs;
	struct knav_irq_info		irqs[RANGE_MAX_IRQS];
};

#define RANGE_RESERVED		BIT(0)
#define RANGE_HAS_IRQ		BIT(1)
#define RANGE_HAS_ACCUMULATOR	BIT(2)
#define RANGE_MULTI_QUEUE	BIT(3)

#define for_each_region(kdev, region)				\
	list_for_each_entry(region, &kdev->regions, list)

#define first_region(kdev)					\
	list_first_entry_or_null(&kdev->regions, \
				 struct knav_region, list)

#define for_each_queue_range(kdev, range)			\
	list_for_each_entry(range, &kdev->queue_ranges, list)

#define first_queue_range(kdev)					\
	list_first_entry_or_null(&kdev->queue_ranges, \
				 struct knav_range_info, list)

#define for_each_pool(kdev, pool)				\
	list_for_each_entry(pool, &kdev->pools, list)

#define for_each_pdsp(kdev, pdsp)				\
	list_for_each_entry(pdsp, &kdev->pdsps, list)

#define for_each_qmgr(kdev, qmgr)				\
	list_for_each_entry(qmgr, &kdev->qmgrs, list)

static inline struct knav_pdsp_info *
knav_find_pdsp(struct knav_device *kdev, unsigned pdsp_id)
{
	struct knav_pdsp_info *pdsp;

	for_each_pdsp(kdev, pdsp)
		if (pdsp_id == pdsp->id)
			return pdsp;
	return NULL;
}

extern int knav_init_acc_range(struct knav_device *kdev,
					struct device_node *node,
					struct knav_range_info *range);
extern void knav_queue_notify(struct knav_queue_inst *inst);

#endif /* __KNAV_QMSS_H__ */
Commit	Line	Data
41f93af9 SN	1	/*
	2	* Keystone Navigator QMSS driver internal header
	3	*
	4	* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
	5	* Author: Sandeep Nair <sandeep_n@ti.com>
	6	* Cyril Chemparathy <cyril@ti.com>
	7	* Santosh Shilimkar <santosh.shilimkar@ti.com>
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*/
	18
	19	#ifndef __KNAV_QMSS_H__
	20	#define __KNAV_QMSS_H__
	21
	22	#define THRESH_GTE BIT(7)
	23	#define THRESH_LT 0
	24
	25	#define PDSP_CTRL_PC_MASK 0xffff0000
	26	#define PDSP_CTRL_SOFT_RESET BIT(0)
	27	#define PDSP_CTRL_ENABLE BIT(1)
	28	#define PDSP_CTRL_RUNNING BIT(15)
	29
	30	#define ACC_MAX_CHANNEL 48
	31	#define ACC_DEFAULT_PERIOD 25 /* usecs */
	32
	33	#define ACC_CHANNEL_INT_BASE 2
	34
	35	#define ACC_LIST_ENTRY_TYPE 1
	36	#define ACC_LIST_ENTRY_WORDS (1 << ACC_LIST_ENTRY_TYPE)
	37	#define ACC_LIST_ENTRY_QUEUE_IDX 0
	38	#define ACC_LIST_ENTRY_DESC_IDX (ACC_LIST_ENTRY_WORDS - 1)
	39
	40	#define ACC_CMD_DISABLE_CHANNEL 0x80
	41	#define ACC_CMD_ENABLE_CHANNEL 0x81
	42	#define ACC_CFG_MULTI_QUEUE BIT(21)
	43
	44	#define ACC_INTD_OFFSET_EOI (0x0010)
	45	#define ACC_INTD_OFFSET_COUNT(ch) (0x0300 + 4 * (ch))
	46	#define ACC_INTD_OFFSET_STATUS(ch) (0x0200 + 4 * ((ch) / 32))
	47
	48	#define RANGE_MAX_IRQS 64
	49
	50	#define ACC_DESCS_MAX SZ_1K
	51	#define ACC_DESCS_MASK (ACC_DESCS_MAX - 1)
	52	#define DESC_SIZE_MASK 0xful
	53	#define DESC_PTR_MASK (~DESC_SIZE_MASK)
	54
	55	#define KNAV_NAME_SIZE 32
	56
	57	enum knav_acc_result {
	58	ACC_RET_IDLE,
	59	ACC_RET_SUCCESS,
	60	ACC_RET_INVALID_COMMAND,
	61	ACC_RET_INVALID_CHANNEL,
	62	ACC_RET_INACTIVE_CHANNEL,
	63	ACC_RET_ACTIVE_CHANNEL,
	64	ACC_RET_INVALID_QUEUE,
65	ACC_RET_INVALID_RET,
66	};
67
68	struct knav_reg_config {
69	u32 revision;
70	u32 __pad1;
71	u32 divert;
72	u32 link_ram_base0;
73	u32 link_ram_size0;
74	u32 link_ram_base1;
75	u32 __pad2[2];
76	u32 starvation[0];
77	};
78
79	struct knav_reg_region {
80	u32 base;
81	u32 start_index;
82	u32 size_count;
83	u32 __pad;
84	};
85
86	struct knav_reg_pdsp_regs {
87	u32 control;
88	u32 status;
89	u32 cycle_count;
90	u32 stall_count;
91	};
92
93	struct knav_reg_acc_command {
94	u32 command;
95	u32 queue_mask;
96	u32 list_phys;
97	u32 queue_num;
98	u32 timer_config;
99	};
100
101	struct knav_link_ram_block {
102	dma_addr_t phys;
103	void *virt;
104	size_t size;
105	};
106
107	struct knav_acc_info {
108	u32 pdsp_id;
109	u32 start_channel;
110	u32 list_entries;
111	u32 pacing_mode;
112	u32 timer_count;
113	int mem_size;
114	int list_size;
115	struct knav_pdsp_info *pdsp;
116	};
117
118	struct knav_acc_channel {
119	u32 channel;
120	u32 list_index;
121	u32 open_mask;
122	u32 *list_cpu[2];
123	dma_addr_t list_dma[2];
124	char name[KNAV_NAME_SIZE];
125	atomic_t retrigger_count;
126	};
127
128	struct knav_pdsp_info {
129	const char *name;
130	struct knav_reg_pdsp_regs __iomem *regs;
131	union {
132	void __iomem *command;
133	struct knav_reg_acc_command __iomem *acc_command;
134	u32 __iomem *qos_command;
135	};
136	void __iomem *intd;
137	u32 __iomem *iram;
41f93af9 SN	138	u32 id;
	139	struct list_head list;
	140	};
	141
	142	struct knav_qmgr_info {
	143	unsigned start_queue;
	144	unsigned num_queues;
	145	struct knav_reg_config __iomem *reg_config;
	146	struct knav_reg_region __iomem *reg_region;
	147	struct knav_reg_queue __iomem reg_push, reg_pop, *reg_peek;
	148	void __iomem *reg_status;
	149	struct list_head list;
	150	};
	151
	152	#define KNAV_NUM_LINKRAM 2
	153
	154	/**
	155	* struct knav_queue_stats: queue statistics
	156	* pushes: number of push operations
	157	* pops: number of pop operations
	158	* push_errors: number of push errors
	159	* pop_errors: number of pop errors
	160	* notifies: notifier counts
	161	*/
	162	struct knav_queue_stats {
	163	atomic_t pushes;
	164	atomic_t pops;
	165	atomic_t push_errors;
	166	atomic_t pop_errors;
	167	atomic_t notifies;
	168	};
	169
	170	/**
	171	* struct knav_reg_queue: queue registers
	172	* @entry_count: valid entries in the queue
	173	* @byte_count: total byte count in thhe queue
	174	* @packet_size: packet size for the queue
	175	* @ptr_size_thresh: packet pointer size threshold
	176	*/
	177	struct knav_reg_queue {
	178	u32 entry_count;
	179	u32 byte_count;
	180	u32 packet_size;
	181	u32 ptr_size_thresh;
	182	};
	183
	184	/**
	185	* struct knav_region: qmss region info
	186	* @dma_start, dma_end: start and end dma address
	187	* @virt_start, virt_end: start and end virtual address
	188	* @desc_size: descriptor size
	189	* @used_desc: consumed descriptors
	190	* @id: region number
	191	* @num_desc: total descriptors
	192	* @link_index: index of the first descriptor
	193	* @name: region name
	194	* @list: instance in the device's region list
	195	* @pools: list of descriptor pools in the region
	196	*/
	197	struct knav_region {
	198	dma_addr_t dma_start, dma_end;
	199	void virt_start, virt_end;
	200	unsigned desc_size;
	201	unsigned used_desc;
202	unsigned id;
203	unsigned num_desc;
204	unsigned link_index;
205	const char *name;
206	struct list_head list;
207	struct list_head pools;
208	};
209
210	/**
211	* struct knav_pool: qmss pools
212	* @dev: device pointer
213	* @region: qmss region info
214	* @queue: queue registers
215	* @kdev: qmss device pointer
216	* @region_offset: offset from the base
217	* @num_desc: total descriptors
218	* @desc_size: descriptor size
219	* @region_id: region number
220	* @name: pool name
221	* @list: list head
222	* @region_inst: instance in the region's pool list
223	*/
224	struct knav_pool {
225	struct device *dev;
226	struct knav_region *region;
227	struct knav_queue *queue;
228	struct knav_device *kdev;
229	int region_offset;
230	int num_desc;
231	int desc_size;
232	int region_id;
233	const char *name;
234	struct list_head list;
235	struct list_head region_inst;
236	};
237
238	/**
239	* struct knav_queue_inst: qmss queue instace properties
240	* @descs: descriptor pointer
241	* @desc_head, desc_tail, desc_count: descriptor counters
242	* @acc: accumulator channel pointer
243	* @kdev: qmss device pointer
244	* @range: range info
245	* @qmgr: queue manager info
246	* @id: queue instace id
247	* @irq_num: irq line number
248	* @notify_needed: notifier needed based on queue type
249	* @num_notifiers: total notifiers
250	* @handles: list head
251	* @name: queue instance name
252	* @irq_name: irq line name
253	*/
254	struct knav_queue_inst {
255	u32 *descs;
256	atomic_t desc_head, desc_tail, desc_count;
257	struct knav_acc_channel *acc;
258	struct knav_device *kdev;
259	struct knav_range_info *range;
260	struct knav_qmgr_info *qmgr;
261	u32 id;
262	int irq_num;
263	int notify_needed;
264	atomic_t num_notifiers;
265	struct list_head handles;
266	const char *name;
267	const char *irq_name;
268	};
269
270	/**
271	* struct knav_queue: qmss queue properties
272	* @reg_push, reg_pop, reg_peek: push, pop queue registers
273	* @inst: qmss queue instace properties
274	* @notifier_fn: notifier function
275	* @notifier_fn_arg: notifier function argument
276	* @notifier_enabled: notier enabled for a give queue
277	* @rcu: rcu head
278	* @flags: queue flags
279	* @list: list head
280	*/
281	struct knav_queue {
282	struct knav_reg_queue __iomem reg_push, reg_pop, *reg_peek;
283	struct knav_queue_inst *inst;
284	struct knav_queue_stats stats;
285	knav_queue_notify_fn notifier_fn;
286	void *notifier_fn_arg;
287	atomic_t notifier_enabled;
288	struct rcu_head rcu;
289	unsigned flags;
290	struct list_head list;
291	};
292
293	struct knav_device {
294	struct device *dev;
295	unsigned base_id;
296	unsigned num_queues;
297	unsigned num_queues_in_use;
298	unsigned inst_shift;
299	struct knav_link_ram_block link_rams[KNAV_NUM_LINKRAM];
300	void *instances;
301	struct list_head regions;
302	struct list_head queue_ranges;
303	struct list_head pools;
304	struct list_head pdsps;
305	struct list_head qmgrs;
306	};
307
308	struct knav_range_ops {
309	int (init_range)(struct knav_range_info range);
310	int (free_range)(struct knav_range_info range);
311	int (init_queue)(struct knav_range_info range,
312	struct knav_queue_inst *inst);
313	int (open_queue)(struct knav_range_info range,
314	struct knav_queue_inst *inst, unsigned flags);
315	int (close_queue)(struct knav_range_info range,
316	struct knav_queue_inst *inst);
317	int (set_notify)(struct knav_range_info range,
318	struct knav_queue_inst *inst, bool enabled);
319	};
320
321	struct knav_irq_info {
322	int irq;
323	u32 cpu_map;
324	};
325
326	struct knav_range_info {
327	const char *name;
328	struct knav_device *kdev;
329	unsigned queue_base;
330	unsigned num_queues;
331	void *queue_base_inst;
332	unsigned flags;
333	struct list_head list;
334	struct knav_range_ops *ops;
335	struct knav_acc_info acc_info;
336	struct knav_acc_channel *acc;
337	unsigned num_irqs;
338	struct knav_irq_info irqs[RANGE_MAX_IRQS];
339	};
340
341	#define RANGE_RESERVED BIT(0)
342	#define RANGE_HAS_IRQ BIT(1)
343	#define RANGE_HAS_ACCUMULATOR BIT(2)
344	#define RANGE_MULTI_QUEUE BIT(3)
345
346	#define for_each_region(kdev, region) \
347	list_for_each_entry(region, &kdev->regions, list)
348
349	#define first_region(kdev) \
42813295 AL	350	list_first_entry_or_null(&kdev->regions, \
42813295 AL	351	struct knav_region, list)
41f93af9 SN	352
	353	#define for_each_queue_range(kdev, range) \
	354	list_for_each_entry(range, &kdev->queue_ranges, list)
	355
	356	#define first_queue_range(kdev) \
42813295 AL	357	list_first_entry_or_null(&kdev->queue_ranges, \
42813295 AL	358	struct knav_range_info, list)
41f93af9 SN	359
	360	#define for_each_pool(kdev, pool) \
	361	list_for_each_entry(pool, &kdev->pools, list)
	362
	363	#define for_each_pdsp(kdev, pdsp) \
	364	list_for_each_entry(pdsp, &kdev->pdsps, list)
	365
	366	#define for_each_qmgr(kdev, qmgr) \
	367	list_for_each_entry(qmgr, &kdev->qmgrs, list)
	368
	369	static inline struct knav_pdsp_info *
	370	knav_find_pdsp(struct knav_device *kdev, unsigned pdsp_id)
	371	{
	372	struct knav_pdsp_info *pdsp;
	373
	374	for_each_pdsp(kdev, pdsp)
	375	if (pdsp_id == pdsp->id)
	376	return pdsp;
	377	return NULL;
	378	}
	379
	380	extern int knav_init_acc_range(struct knav_device *kdev,
	381	struct device_node *node,
	382	struct knav_range_info *range);
	383	extern void knav_queue_notify(struct knav_queue_inst *inst);
	384
	385	#endif /* __KNAV_QMSS_H__ */