Commit | Line | Data |
---|---|---|
8ae12a0d DB |
1 | # |
2 | # SPI driver configuration | |
3 | # | |
4 | # NOTE: the reason this doesn't show SPI slave support is mostly that | |
5 | # nobody's needed a slave side API yet. The master-role API is not | |
6 | # fully appropriate there, so it'd need some thought to do well. | |
7 | # | |
79d8c7a8 | 8 | menuconfig SPI |
8ae12a0d | 9 | bool "SPI support" |
79d8c7a8 | 10 | depends on HAS_IOMEM |
8ae12a0d DB |
11 | help |
12 | The "Serial Peripheral Interface" is a low level synchronous | |
13 | protocol. Chips that support SPI can have data transfer rates | |
14 | up to several tens of Mbit/sec. Chips are addressed with a | |
15 | controller and a chipselect. Most SPI slaves don't support | |
16 | dynamic device discovery; some are even write-only or read-only. | |
17 | ||
3cb2fccc | 18 | SPI is widely used by microcontrollers to talk with sensors, |
8ae12a0d DB |
19 | eeprom and flash memory, codecs and various other controller |
20 | chips, analog to digital (and d-to-a) converters, and more. | |
21 | MMC and SD cards can be accessed using SPI protocol; and for | |
22 | DataFlash cards used in MMC sockets, SPI must always be used. | |
23 | ||
24 | SPI is one of a family of similar protocols using a four wire | |
25 | interface (select, clock, data in, data out) including Microwire | |
26 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
27 | work with most such devices and controllers. | |
28 | ||
79d8c7a8 AG |
29 | if SPI |
30 | ||
8ae12a0d DB |
31 | config SPI_DEBUG |
32 | boolean "Debug support for SPI drivers" | |
79d8c7a8 | 33 | depends on DEBUG_KERNEL |
8ae12a0d DB |
34 | help |
35 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | |
36 | sysfs, and debugfs support in SPI controller and protocol drivers. | |
37 | ||
38 | # | |
39 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | |
40 | # | |
41 | ||
42 | config SPI_MASTER | |
43 | # boolean "SPI Master Support" | |
44 | boolean | |
45 | default SPI | |
46 | help | |
47 | If your system has an master-capable SPI controller (which | |
48 | provides the clock and chipselect), you can enable that | |
49 | controller and the protocol drivers for the SPI slave chips | |
50 | that are connected. | |
51 | ||
6291fe2a RD |
52 | if SPI_MASTER |
53 | ||
8ae12a0d | 54 | comment "SPI Master Controller Drivers" |
8ae12a0d | 55 | |
0b782531 TC |
56 | config SPI_ALTERA |
57 | tristate "Altera SPI Controller" | |
58 | select SPI_BITBANG | |
59 | help | |
60 | This is the driver for the Altera SPI Controller. | |
61 | ||
8efaef4d GJ |
62 | config SPI_ATH79 |
63 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" | |
76ec9d18 | 64 | depends on ATH79 && GPIOLIB |
8efaef4d GJ |
65 | select SPI_BITBANG |
66 | help | |
67 | This enables support for the SPI controller present on the | |
68 | Atheros AR71XX/AR724X/AR913X SoCs. | |
69 | ||
754ce4f2 HS |
70 | config SPI_ATMEL |
71 | tristate "Atmel SPI Controller" | |
f59838a0 | 72 | depends on HAS_DMA |
dd1053a9 | 73 | depends on (ARCH_AT91 || AVR32 || COMPILE_TEST) |
754ce4f2 HS |
74 | help |
75 | This selects a driver for the Atmel SPI Controller, present on | |
76 | many AT32 (AVR32) and AT91 (ARM) chips. | |
77 | ||
f8043872 CB |
78 | config SPI_BCM2835 |
79 | tristate "BCM2835 SPI controller" | |
dd1053a9 | 80 | depends on ARCH_BCM2835 || COMPILE_TEST |
f8043872 CB |
81 | help |
82 | This selects a driver for the Broadcom BCM2835 SPI master. | |
83 | ||
84 | The BCM2835 contains two types of SPI master controller; the | |
85 | "universal SPI master", and the regular SPI controller. This driver | |
86 | is for the regular SPI controller. Slave mode operation is not also | |
87 | not supported. | |
88 | ||
22ac3e82 | 89 | config SPI_BFIN5XX |
a5f6abd4 | 90 | tristate "SPI controller driver for ADI Blackfin5xx" |
fa4bd4f1 | 91 | depends on BLACKFIN && !BF60x |
a5f6abd4 WB |
92 | help |
93 | This is the SPI controller master driver for Blackfin 5xx processor. | |
94 | ||
766e3721 SJ |
95 | config SPI_ADI_V3 |
96 | tristate "SPI controller v3 for ADI" | |
fa4bd4f1 SJ |
97 | depends on BF60x |
98 | help | |
99 | This is the SPI controller v3 master driver | |
100 | found on Blackfin 60x processor. | |
101 | ||
9c3e7375 CC |
102 | config SPI_BFIN_SPORT |
103 | tristate "SPI bus via Blackfin SPORT" | |
104 | depends on BLACKFIN | |
105 | help | |
106 | Enable support for a SPI bus via the Blackfin SPORT peripheral. | |
107 | ||
63bd2359 | 108 | config SPI_AU1550 |
809f36c6 | 109 | tristate "Au1550/Au1200/Au1300 SPI Controller" |
6d1f56aa | 110 | depends on MIPS_ALCHEMY |
63bd2359 JN |
111 | select SPI_BITBANG |
112 | help | |
113 | If you say yes to this option, support will be included for the | |
809f36c6 | 114 | PSC SPI controller found on Au1550, Au1200 and Au1300 series. |
63bd2359 | 115 | |
0fc6a323 RM |
116 | config SPI_BCM53XX |
117 | tristate "Broadcom BCM53xx SPI controller" | |
118 | depends on ARCH_BCM_5301X | |
933fc7b0 AL |
119 | depends on BCMA_POSSIBLE |
120 | select BCMA | |
0fc6a323 RM |
121 | help |
122 | Enable support for the SPI controller on Broadcom BCM53xx ARM SoCs. | |
123 | ||
b42dfed8 FF |
124 | config SPI_BCM63XX |
125 | tristate "Broadcom BCM63xx SPI controller" | |
126 | depends on BCM63XX | |
127 | help | |
128 | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. | |
129 | ||
142168eb JG |
130 | config SPI_BCM63XX_HSSPI |
131 | tristate "Broadcom BCM63XX HS SPI controller driver" | |
132 | depends on BCM63XX || COMPILE_TEST | |
133 | help | |
134 | This enables support for the High Speed SPI controller present on | |
135 | newer Broadcom BCM63XX SoCs. | |
136 | ||
9904f22a | 137 | config SPI_BITBANG |
d29389de | 138 | tristate "Utilities for Bitbanging SPI masters" |
9904f22a DB |
139 | help |
140 | With a few GPIO pins, your system can bitbang the SPI protocol. | |
141 | Select this to get SPI support through I/O pins (GPIO, parallel | |
142 | port, etc). Or, some systems' SPI master controller drivers use | |
143 | this code to manage the per-word or per-transfer accesses to the | |
144 | hardware shift registers. | |
145 | ||
146 | This is library code, and is automatically selected by drivers that | |
147 | need it. You only need to select this explicitly to support driver | |
148 | modules that aren't part of this kernel tree. | |
8ae12a0d | 149 | |
7111763d DB |
150 | config SPI_BUTTERFLY |
151 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | |
6291fe2a | 152 | depends on PARPORT |
7111763d DB |
153 | select SPI_BITBANG |
154 | help | |
155 | This uses a custom parallel port cable to connect to an AVR | |
156 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | |
157 | inexpensive battery powered microcontroller evaluation board. | |
158 | This same cable can be used to flash new firmware. | |
159 | ||
c474b386 HK |
160 | config SPI_CADENCE |
161 | tristate "Cadence SPI controller" | |
25dbe04a | 162 | depends on ARM |
c474b386 HK |
163 | help |
164 | This selects the Cadence SPI controller master driver | |
165 | used by Xilinx Zynq. | |
166 | ||
161b96c3 AS |
167 | config SPI_CLPS711X |
168 | tristate "CLPS711X host SPI controller" | |
5634dd8b | 169 | depends on ARCH_CLPS711X || COMPILE_TEST |
161b96c3 AS |
170 | help |
171 | This enables dedicated general purpose SPI/Microwire1-compatible | |
172 | master mode interface (SSI1) for CLPS711X-based CPUs. | |
173 | ||
34b8c661 SK |
174 | config SPI_COLDFIRE_QSPI |
175 | tristate "Freescale Coldfire QSPI controller" | |
bce4d12b | 176 | depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) |
34b8c661 SK |
177 | help |
178 | This enables support for the Coldfire QSPI controller in master | |
179 | mode. | |
180 | ||
358934a6 | 181 | config SPI_DAVINCI |
23ce17ad | 182 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
78848914 | 183 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
358934a6 SP |
184 | select SPI_BITBANG |
185 | help | |
23ce17ad SN |
186 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
187 | ||
86f8973c UKK |
188 | config SPI_EFM32 |
189 | tristate "EFM32 SPI controller" | |
190 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) | |
191 | select SPI_BITBANG | |
192 | help | |
193 | Driver for the spi controller found on Energy Micro's EFM32 SoCs. | |
194 | ||
011f23a3 MW |
195 | config SPI_EP93XX |
196 | tristate "Cirrus Logic EP93xx SPI controller" | |
f59838a0 | 197 | depends on HAS_DMA |
dd1053a9 | 198 | depends on ARCH_EP93XX || COMPILE_TEST |
011f23a3 MW |
199 | help |
200 | This enables using the Cirrus EP93xx SPI controller in master | |
201 | mode. | |
202 | ||
6cd3c7e2 TL |
203 | config SPI_FALCON |
204 | tristate "Falcon SPI controller support" | |
205 | depends on SOC_FALCON | |
206 | help | |
207 | The external bus unit (EBU) found on the FALC-ON SoC has SPI | |
208 | emulation that is designed for serial flash access. This driver | |
209 | has only been tested with m25p80 type chips. The hardware has no | |
210 | support for other types of SPI peripherals. | |
211 | ||
d29389de DB |
212 | config SPI_GPIO |
213 | tristate "GPIO-based bitbanging SPI Master" | |
76ec9d18 | 214 | depends on GPIOLIB |
d29389de DB |
215 | select SPI_BITBANG |
216 | help | |
217 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | |
218 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI | |
219 | slaves connected to a bus using this driver are configured as usual, | |
220 | except that the spi_board_info.controller_data holds the GPIO number | |
221 | for the chipselect used by this controller driver. | |
222 | ||
223 | Note that this driver often won't achieve even 1 Mbit/sec speeds, | |
224 | making it unusually slow for SPI. If your platform can inline | |
225 | GPIO operations, you should be able to leverage that for better | |
226 | speed with a custom version of this driver; see the source code. | |
227 | ||
deba2580 AB |
228 | config SPI_IMG_SPFI |
229 | tristate "IMG SPFI controller" | |
230 | depends on MIPS || COMPILE_TEST | |
231 | help | |
232 | This enables support for the SPFI master controller found on | |
233 | IMG SoCs. | |
234 | ||
b5f3294f SH |
235 | config SPI_IMX |
236 | tristate "Freescale i.MX SPI controllers" | |
dd1053a9 | 237 | depends on ARCH_MXC || COMPILE_TEST |
b5f3294f SH |
238 | select SPI_BITBANG |
239 | help | |
240 | This enables using the Freescale i.MX SPI controllers in master | |
241 | mode. | |
242 | ||
78961a57 KB |
243 | config SPI_LM70_LLP |
244 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | |
6d1f56aa | 245 | depends on PARPORT |
78961a57 KB |
246 | select SPI_BITBANG |
247 | help | |
248 | This driver supports the NS LM70 LLP Evaluation Board, | |
249 | which interfaces to an LM70 temperature sensor using | |
250 | a parallel port. | |
251 | ||
42bbb709 GL |
252 | config SPI_MPC52xx |
253 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | |
7433f2b7 | 254 | depends on PPC_MPC52xx |
42bbb709 GL |
255 | help |
256 | This drivers supports the MPC52xx SPI controller in master SPI | |
257 | mode. | |
258 | ||
00b8fd23 DC |
259 | config SPI_MPC52xx_PSC |
260 | tristate "Freescale MPC52xx PSC SPI controller" | |
6d1f56aa | 261 | depends on PPC_MPC52xx |
00b8fd23 DC |
262 | help |
263 | This enables using the Freescale MPC52xx Programmable Serial | |
264 | Controller in master SPI mode. | |
265 | ||
6e27388f AG |
266 | config SPI_MPC512x_PSC |
267 | tristate "Freescale MPC512x PSC SPI controller" | |
5e8afa34 | 268 | depends on PPC_MPC512x |
6e27388f AG |
269 | help |
270 | This enables using the Freescale MPC5121 Programmable Serial | |
271 | Controller in SPI master mode. | |
272 | ||
b36ece83 | 273 | config SPI_FSL_LIB |
e8beacbb AL |
274 | tristate |
275 | depends on OF | |
276 | ||
277 | config SPI_FSL_CPM | |
b36ece83 MH |
278 | tristate |
279 | depends on FSL_SOC | |
280 | ||
3272029f | 281 | config SPI_FSL_SPI |
447b0c7b | 282 | bool "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller" |
e8beacbb | 283 | depends on OF |
b36ece83 | 284 | select SPI_FSL_LIB |
e8beacbb | 285 | select SPI_FSL_CPM if FSL_SOC |
ccf06998 | 286 | help |
3272029f MH |
287 | This enables using the Freescale SPI controllers in master mode. |
288 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. | |
289 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. | |
447b0c7b AL |
290 | This also enables using the Aeroflex Gaisler GRLIB SPI controller in |
291 | master mode. | |
ccf06998 | 292 | |
349ad66c CF |
293 | config SPI_FSL_DSPI |
294 | tristate "Freescale DSPI controller" | |
295 | select SPI_BITBANG | |
1acbdeb9 | 296 | select REGMAP_MMIO |
b444d1df | 297 | depends on SOC_VF610 || COMPILE_TEST |
349ad66c CF |
298 | help |
299 | This enables support for the Freescale DSPI controller in master | |
300 | mode. VF610 platform uses the controller. | |
301 | ||
8b60d6c2 | 302 | config SPI_FSL_ESPI |
d9ddcec3 | 303 | bool "Freescale eSPI controller" |
8b60d6c2 MH |
304 | depends on FSL_SOC |
305 | select SPI_FSL_LIB | |
306 | help | |
307 | This enables using the Freescale eSPI controllers in master mode. | |
308 | From MPC8536, 85xx platform uses the controller, and all P10xx, | |
309 | P20xx, P30xx,P40xx, P50xx uses this controller. | |
310 | ||
c3e4bc54 BG |
311 | config SPI_MESON_SPIFC |
312 | tristate "Amlogic Meson SPIFC controller" | |
313 | depends on ARCH_MESON || COMPILE_TEST | |
1327ecd4 | 314 | select REGMAP_MMIO |
c3e4bc54 BG |
315 | help |
316 | This enables master mode support for the SPIFC (SPI flash | |
317 | controller) available in Amlogic Meson SoCs. | |
318 | ||
ce792580 TC |
319 | config SPI_OC_TINY |
320 | tristate "OpenCores tiny SPI" | |
76ec9d18 | 321 | depends on GPIOLIB |
ce792580 TC |
322 | select SPI_BITBANG |
323 | help | |
324 | This is the driver for OpenCores tiny SPI master controller. | |
325 | ||
6b52c00f DD |
326 | config SPI_OCTEON |
327 | tristate "Cavium OCTEON SPI controller" | |
9ddebc46 | 328 | depends on CAVIUM_OCTEON_SOC |
6b52c00f DD |
329 | help |
330 | SPI host driver for the hardware found on some Cavium OCTEON | |
331 | SOCs. | |
332 | ||
fdb3c18d DB |
333 | config SPI_OMAP_UWIRE |
334 | tristate "OMAP1 MicroWire" | |
6291fe2a | 335 | depends on ARCH_OMAP1 |
fdb3c18d DB |
336 | select SPI_BITBANG |
337 | help | |
338 | This hooks up to the MicroWire controller on OMAP1 chips. | |
339 | ||
ccdc7bf9 | 340 | config SPI_OMAP24XX |
8ebeb545 | 341 | tristate "McSPI driver for OMAP" |
f59838a0 | 342 | depends on HAS_DMA |
f6ab395b | 343 | depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH |
dd1053a9 | 344 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
ccdc7bf9 | 345 | help |
8ebeb545 | 346 | SPI master controller for OMAP24XX and later Multichannel SPI |
ccdc7bf9 | 347 | (McSPI) modules. |
69c202af | 348 | |
505a1495 SP |
349 | config SPI_TI_QSPI |
350 | tristate "DRA7xxx QSPI controller support" | |
351 | depends on ARCH_OMAP2PLUS || COMPILE_TEST | |
352 | help | |
353 | QSPI master controller for DRA7xxx used for flash devices. | |
354 | This device supports single, dual and quad read support, while | |
355 | it only supports single write mode. | |
356 | ||
35c9049b CM |
357 | config SPI_OMAP_100K |
358 | tristate "OMAP SPI 100K" | |
dd1053a9 | 359 | depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST |
35c9049b CM |
360 | help |
361 | OMAP SPI 100K master controller for omap7xx boards. | |
362 | ||
60cadec9 | 363 | config SPI_ORION |
6d1f56aa | 364 | tristate "Orion SPI master" |
dd1053a9 | 365 | depends on PLAT_ORION || COMPILE_TEST |
60cadec9 SA |
366 | help |
367 | This enables using the SPI master controller on the Orion chips. | |
368 | ||
b43d65f7 | 369 | config SPI_PL022 |
7f9a4b97 LW |
370 | tristate "ARM AMBA PL022 SSP controller" |
371 | depends on ARM_AMBA | |
b43d65f7 | 372 | default y if MACH_U300 |
f33b29ee | 373 | default y if ARCH_REALVIEW |
374 | default y if INTEGRATOR_IMPD1 | |
375 | default y if ARCH_VERSATILE | |
b43d65f7 LW |
376 | help |
377 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
378 | controller. If you have an embedded system with an AMBA(R) | |
379 | bus and a PL022 controller, say Y or M here. | |
380 | ||
44dab88e SF |
381 | config SPI_PPC4xx |
382 | tristate "PPC4xx SPI Controller" | |
5e8afa34 | 383 | depends on PPC32 && 4xx |
44dab88e SF |
384 | select SPI_BITBANG |
385 | help | |
386 | This selects a driver for the PPC4xx SPI Controller. | |
387 | ||
cd7bed00 MW |
388 | config SPI_PXA2XX_PXADMA |
389 | bool "PXA2xx SSP legacy PXA DMA API support" | |
390 | depends on SPI_PXA2XX && ARCH_PXA | |
391 | help | |
5928808e MW |
392 | Enable PXA private legacy DMA API support. Note that this is |
393 | deprecated in favor of generic DMA engine API. | |
394 | ||
395 | config SPI_PXA2XX_DMA | |
396 | def_bool y | |
397 | depends on SPI_PXA2XX && !SPI_PXA2XX_PXADMA | |
cd7bed00 | 398 | |
e0c9905e SS |
399 | config SPI_PXA2XX |
400 | tristate "PXA2xx SSP SPI master" | |
0244ad00 | 401 | depends on (ARCH_PXA || PCI || ACPI) |
d6ea3df0 | 402 | select PXA_SSP if ARCH_PXA |
e0c9905e | 403 | help |
d6ea3df0 SAS |
404 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
405 | controller. The driver can be configured to use any SSP port and | |
406 | additional documentation can be found a Documentation/spi/pxa2xx. | |
407 | ||
408 | config SPI_PXA2XX_PCI | |
afa93c90 | 409 | def_tristate SPI_PXA2XX && PCI && COMMON_CLK |
e0c9905e | 410 | |
64e36824 | 411 | config SPI_ROCKCHIP |
412 | tristate "Rockchip SPI controller driver" | |
c1536908 | 413 | depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH |
64e36824 | 414 | help |
415 | This selects a driver for Rockchip SPI controller. | |
416 | ||
417 | If you say yes to this option, support will be included for | |
418 | RK3066, RK3188 and RK3288 families of SPI controller. | |
419 | Rockchip SPI controller support DMA transport and PIO mode. | |
420 | The main usecase of this controller is to use spi flash as boot | |
421 | device. | |
422 | ||
0b2182dd | 423 | config SPI_RSPI |
e290c343 | 424 | tristate "Renesas RSPI/QSPI controller" |
533465a8 | 425 | depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST |
0b2182dd | 426 | help |
e290c343 | 427 | SPI driver for Renesas RSPI and QSPI blocks. |
0b2182dd | 428 | |
64ff247a II |
429 | config SPI_QUP |
430 | tristate "Qualcomm SPI controller with QUP interface" | |
058f11c8 | 431 | depends on ARCH_QCOM || (ARM && COMPILE_TEST) |
64ff247a II |
432 | help |
433 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that | |
434 | provides a common data path (an output FIFO and an input FIFO) | |
435 | for serial peripheral interface (SPI) mini-core. SPI in master | |
436 | mode supports up to 50MHz, up to four chip selects, programmable | |
437 | data path from 4 bits to 32 bits and numerous protocol variants. | |
438 | ||
439 | This driver can also be built as a module. If so, the module | |
440 | will be called spi_qup. | |
0b2182dd | 441 | |
85abfaa7 DB |
442 | config SPI_S3C24XX |
443 | tristate "Samsung S3C24XX series SPI" | |
6d1f56aa | 444 | depends on ARCH_S3C24XX |
da0abc27 | 445 | select SPI_BITBANG |
85abfaa7 DB |
446 | help |
447 | SPI driver for Samsung S3C24XX series ARM SoCs | |
448 | ||
bec0806c BD |
449 | config SPI_S3C24XX_FIQ |
450 | bool "S3C24XX driver with FIQ pseudo-DMA" | |
451 | depends on SPI_S3C24XX | |
452 | select FIQ | |
453 | help | |
454 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | |
455 | DMA by using the fast-interrupt request framework, This allows | |
456 | the driver to get DMA-like performance when there are either | |
457 | no free DMA channels, or when doing transfers that required both | |
458 | TX and RX data paths. | |
459 | ||
230d42d4 JB |
460 | config SPI_S3C64XX |
461 | tristate "Samsung S3C64XX series type SPI" | |
bf77cba9 | 462 | depends on (PLAT_SAMSUNG || ARCH_EXYNOS) |
3faecea7 | 463 | select S3C64XX_PL080 if ARCH_S3C64XX |
230d42d4 JB |
464 | help |
465 | SPI driver for Samsung S3C64XX and newer SoCs. | |
466 | ||
3ce8859e GR |
467 | config SPI_SC18IS602 |
468 | tristate "NXP SC18IS602/602B/603 I2C to SPI bridge" | |
469 | depends on I2C | |
470 | help | |
471 | SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge. | |
472 | ||
8051effc MD |
473 | config SPI_SH_MSIOF |
474 | tristate "SuperH MSIOF SPI controller" | |
51fd5090 | 475 | depends on HAVE_CLK && HAS_DMA |
7ad35442 | 476 | depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST |
8051effc | 477 | help |
746aeffd | 478 | SPI driver for SuperH and SH Mobile MSIOF blocks. |
8051effc | 479 | |
5c05dd07 YS |
480 | config SPI_SH |
481 | tristate "SuperH SPI controller" | |
dd1053a9 | 482 | depends on SUPERH || COMPILE_TEST |
5c05dd07 YS |
483 | help |
484 | SPI driver for SuperH SPI blocks. | |
485 | ||
37e46640 MD |
486 | config SPI_SH_SCI |
487 | tristate "SuperH SCI SPI controller" | |
6291fe2a | 488 | depends on SUPERH |
37e46640 MD |
489 | select SPI_BITBANG |
490 | help | |
491 | SPI driver for SuperH SCI blocks. | |
492 | ||
d1c8bbd7 KM |
493 | config SPI_SH_HSPI |
494 | tristate "SuperH HSPI controller" | |
dd1053a9 | 495 | depends on ARCH_SHMOBILE || COMPILE_TEST |
d1c8bbd7 KM |
496 | help |
497 | SPI driver for SuperH HSPI blocks. | |
498 | ||
1cc2df9d ZS |
499 | config SPI_SIRF |
500 | tristate "CSR SiRFprimaII SPI controller" | |
7668c294 | 501 | depends on SIRF_DMA |
1cc2df9d ZS |
502 | select SPI_BITBANG |
503 | help | |
504 | SPI driver for CSR SiRFprimaII SoCs | |
505 | ||
b5f65179 MR |
506 | config SPI_SUN4I |
507 | tristate "Allwinner A10 SoCs SPI controller" | |
508 | depends on ARCH_SUNXI || COMPILE_TEST | |
509 | help | |
510 | SPI driver for Allwinner sun4i, sun5i and sun7i SoCs | |
511 | ||
3558fe90 MR |
512 | config SPI_SUN6I |
513 | tristate "Allwinner A31 SPI controller" | |
514 | depends on ARCH_SUNXI || COMPILE_TEST | |
7961656a | 515 | depends on RESET_CONTROLLER |
3558fe90 MR |
516 | help |
517 | This enables using the SPI controller on the Allwinner A31 SoCs. | |
518 | ||
646781d3 MV |
519 | config SPI_MXS |
520 | tristate "Freescale MXS SPI controller" | |
521 | depends on ARCH_MXS | |
522 | select STMP_DEVICE | |
523 | help | |
524 | SPI driver for Freescale MXS devices. | |
525 | ||
f333a331 LD |
526 | config SPI_TEGRA114 |
527 | tristate "NVIDIA Tegra114 SPI Controller" | |
dd1053a9 | 528 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
f59838a0 | 529 | depends on RESET_CONTROLLER && HAS_DMA |
f333a331 LD |
530 | help |
531 | SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller | |
532 | is different than the older SoCs SPI controller and also register interface | |
533 | get changed with this controller. | |
534 | ||
8528547b LD |
535 | config SPI_TEGRA20_SFLASH |
536 | tristate "Nvidia Tegra20 Serial flash Controller" | |
dd1053a9 | 537 | depends on ARCH_TEGRA || COMPILE_TEST |
ff2251e3 | 538 | depends on RESET_CONTROLLER |
8528547b LD |
539 | help |
540 | SPI driver for Nvidia Tegra20 Serial flash Controller interface. | |
541 | The main usecase of this controller is to use spi flash as boot | |
542 | device. | |
543 | ||
dc4dc360 LD |
544 | config SPI_TEGRA20_SLINK |
545 | tristate "Nvidia Tegra20/Tegra30 SLINK Controller" | |
dd1053a9 | 546 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
f59838a0 | 547 | depends on RESET_CONTROLLER && HAS_DMA |
dc4dc360 LD |
548 | help |
549 | SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface. | |
550 | ||
e8b17b5b | 551 | config SPI_TOPCLIFF_PCH |
92b3a5c1 | 552 | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" |
2b16069a | 553 | depends on PCI && (X86_32 || COMPILE_TEST) |
e8b17b5b | 554 | help |
cdbc8f04 GL |
555 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
556 | used in some x86 embedded processors. | |
e8b17b5b | 557 | |
92b3a5c1 TM |
558 | This driver also supports the ML7213/ML7223/ML7831, a companion chip |
559 | for the Atom E6xx series and compatible with the Intel EG20T PCH. | |
f016aeb6 | 560 | |
f2cac67d AN |
561 | config SPI_TXX9 |
562 | tristate "Toshiba TXx9 SPI controller" | |
dd1053a9 | 563 | depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST) |
f2cac67d AN |
564 | help |
565 | SPI driver for Toshiba TXx9 MIPS SoCs | |
566 | ||
b3165900 LPC |
567 | config SPI_XCOMM |
568 | tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" | |
569 | depends on I2C | |
570 | help | |
571 | Support for the SPI-I2C bridge found on the Analog Devices | |
572 | AD-FMCOMMS1-EBZ board. | |
573 | ||
ae918c02 | 574 | config SPI_XILINX |
c9da2e12 | 575 | tristate "Xilinx SPI controller common module" |
6d1f56aa | 576 | depends on HAS_IOMEM |
ae918c02 AK |
577 | select SPI_BITBANG |
578 | help | |
579 | This exposes the SPI controller IP from the Xilinx EDK. | |
580 | ||
581 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | |
582 | Product Specification document (DS464) for hardware details. | |
583 | ||
c9da2e12 RR |
584 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
585 | ||
6840cc29 MF |
586 | config SPI_XTENSA_XTFPGA |
587 | tristate "Xtensa SPI controller for xtfpga" | |
be8dde46 | 588 | depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST |
6840cc29 MF |
589 | select SPI_BITBANG |
590 | help | |
591 | SPI driver for xtfpga SPI master controller. | |
592 | ||
593 | This simple SPI master controller is built into xtfpga bitstreams | |
594 | and is used to control daughterboard audio codec. It always transfers | |
595 | 16 bit words in SPI mode 0, automatically asserting CS on transfer | |
596 | start and deasserting on end. | |
597 | ||
598 | ||
30eaed05 WZ |
599 | config SPI_NUC900 |
600 | tristate "Nuvoton NUC900 series SPI" | |
6d1f56aa | 601 | depends on ARCH_W90X900 |
30eaed05 WZ |
602 | select SPI_BITBANG |
603 | help | |
604 | SPI driver for Nuvoton NUC900 series ARM SoCs | |
605 | ||
8ae12a0d DB |
606 | # |
607 | # Add new SPI master controllers in alphabetical order above this line | |
608 | # | |
609 | ||
e24c7452 | 610 | config SPI_DESIGNWARE |
8ca8d15a | 611 | tristate "DesignWare SPI controller core support" |
e24c7452 FT |
612 | help |
613 | general driver for SPI controller core from DesignWare | |
614 | ||
615 | config SPI_DW_PCI | |
616 | tristate "PCI interface driver for DW SPI core" | |
617 | depends on SPI_DESIGNWARE && PCI | |
618 | ||
7063c0d9 | 619 | config SPI_DW_MID_DMA |
ea092455 | 620 | bool "DMA support for DW SPI controller on Intel MID platform" |
7063c0d9 FT |
621 | depends on SPI_DW_PCI && INTEL_MID_DMAC |
622 | ||
f7b6fd6d JHD |
623 | config SPI_DW_MMIO |
624 | tristate "Memory-mapped io interface driver for DW SPI core" | |
794f61a3 | 625 | depends on SPI_DESIGNWARE |
f7b6fd6d | 626 | |
8ae12a0d DB |
627 | # |
628 | # There are lots of SPI device types, with sensors and memory | |
629 | # being probably the most widely used ones. | |
630 | # | |
631 | comment "SPI Protocol Masters" | |
8ae12a0d | 632 | |
814a8d50 AP |
633 | config SPI_SPIDEV |
634 | tristate "User mode SPI device driver support" | |
814a8d50 AP |
635 | help |
636 | This supports user mode SPI protocol drivers. | |
637 | ||
638 | Note that this application programming interface is EXPERIMENTAL | |
639 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. | |
640 | ||
447aef1a BD |
641 | config SPI_TLE62X0 |
642 | tristate "Infineon TLE62X0 (for power switching)" | |
6291fe2a | 643 | depends on SYSFS |
447aef1a BD |
644 | help |
645 | SPI driver for Infineon TLE62X0 series line driver chips, | |
646 | such as the TLE6220, TLE6230 and TLE6240. This provides a | |
647 | sysfs interface, with each line presented as a kind of GPIO | |
648 | exposing both switch control and diagnostic feedback. | |
649 | ||
8ae12a0d DB |
650 | # |
651 | # Add new SPI protocol masters in alphabetical order above this line | |
652 | # | |
653 | ||
6291fe2a RD |
654 | endif # SPI_MASTER |
655 | ||
8ae12a0d DB |
656 | # (slave support would go here) |
657 | ||
79d8c7a8 | 658 | endif # SPI |