Commit | Line | Data |
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161b96c3 AS |
1 | /* |
2 | * CLPS711X SPI bus driver | |
3 | * | |
98984796 | 4 | * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru> |
161b96c3 AS |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/io.h> | |
13 | #include <linux/clk.h> | |
161b96c3 AS |
14 | #include <linux/gpio.h> |
15 | #include <linux/delay.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/platform_device.h> | |
3dc92594 AS |
19 | #include <linux/regmap.h> |
20 | #include <linux/mfd/syscon.h> | |
21 | #include <linux/mfd/syscon/clps711x.h> | |
161b96c3 AS |
22 | #include <linux/spi/spi.h> |
23 | #include <linux/platform_data/spi-clps711x.h> | |
24 | ||
161b96c3 AS |
25 | #define DRIVER_NAME "spi-clps711x" |
26 | ||
3dc92594 AS |
27 | #define SYNCIO_FRMLEN(x) ((x) << 8) |
28 | #define SYNCIO_TXFRMEN (1 << 14) | |
29 | ||
161b96c3 | 30 | struct spi_clps711x_data { |
3dc92594 AS |
31 | void __iomem *syncio; |
32 | struct regmap *syscon; | |
33 | struct regmap *syscon1; | |
161b96c3 | 34 | struct clk *spi_clk; |
161b96c3 AS |
35 | |
36 | u8 *tx_buf; | |
37 | u8 *rx_buf; | |
8dda9d9a | 38 | unsigned int bpw; |
161b96c3 | 39 | int len; |
161b96c3 AS |
40 | }; |
41 | ||
42 | static int spi_clps711x_setup(struct spi_device *spi) | |
43 | { | |
161b96c3 | 44 | /* We are expect that SPI-device is not selected */ |
3e9ea4b4 | 45 | gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
161b96c3 AS |
46 | |
47 | return 0; | |
48 | } | |
49 | ||
8dda9d9a AS |
50 | static void spi_clps711x_setup_xfer(struct spi_device *spi, |
51 | struct spi_transfer *xfer) | |
161b96c3 | 52 | { |
6f50c6bc AL |
53 | struct spi_master *master = spi->master; |
54 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | |
161b96c3 | 55 | |
161b96c3 | 56 | /* Setup SPI frequency divider */ |
6f50c6bc | 57 | if (xfer->speed_hz >= master->max_speed_hz) |
3dc92594 AS |
58 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
59 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3)); | |
6f50c6bc | 60 | else if (xfer->speed_hz >= (master->max_speed_hz / 2)) |
3dc92594 AS |
61 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
62 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2)); | |
6f50c6bc | 63 | else if (xfer->speed_hz >= (master->max_speed_hz / 8)) |
3dc92594 AS |
64 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
65 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1)); | |
161b96c3 | 66 | else |
3dc92594 AS |
67 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
68 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0)); | |
161b96c3 AS |
69 | } |
70 | ||
bf5c2e27 AL |
71 | static int spi_clps711x_prepare_message(struct spi_master *master, |
72 | struct spi_message *msg) | |
161b96c3 | 73 | { |
3dc92594 | 74 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
8dda9d9a | 75 | struct spi_device *spi = msg->spi; |
161b96c3 | 76 | |
3dc92594 AS |
77 | /* Setup mode for transfer */ |
78 | return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN, | |
79 | (spi->mode & SPI_CPHA) ? | |
80 | SYSCON3_ADCCKNSEN : 0); | |
bf5c2e27 | 81 | } |
161b96c3 | 82 | |
bf5c2e27 AL |
83 | static int spi_clps711x_transfer_one(struct spi_master *master, |
84 | struct spi_device *spi, | |
85 | struct spi_transfer *xfer) | |
86 | { | |
87 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | |
88 | u8 data; | |
161b96c3 | 89 | |
bf5c2e27 | 90 | spi_clps711x_setup_xfer(spi, xfer); |
161b96c3 | 91 | |
bf5c2e27 | 92 | hw->len = xfer->len; |
bed890b4 | 93 | hw->bpw = xfer->bits_per_word; |
bf5c2e27 AL |
94 | hw->tx_buf = (u8 *)xfer->tx_buf; |
95 | hw->rx_buf = (u8 *)xfer->rx_buf; | |
161b96c3 | 96 | |
bf5c2e27 AL |
97 | /* Initiate transfer */ |
98 | data = hw->tx_buf ? *hw->tx_buf++ : 0; | |
3dc92594 AS |
99 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio); |
100 | ||
bf5c2e27 | 101 | return 1; |
161b96c3 AS |
102 | } |
103 | ||
104 | static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) | |
105 | { | |
bf5c2e27 AL |
106 | struct spi_master *master = dev_id; |
107 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | |
c7a26f12 | 108 | u8 data; |
161b96c3 AS |
109 | |
110 | /* Handle RX */ | |
3dc92594 | 111 | data = readb(hw->syncio); |
161b96c3 | 112 | if (hw->rx_buf) |
c7a26f12 | 113 | *hw->rx_buf++ = data; |
161b96c3 AS |
114 | |
115 | /* Handle TX */ | |
c7a26f12 AS |
116 | if (--hw->len > 0) { |
117 | data = hw->tx_buf ? *hw->tx_buf++ : 0; | |
3dc92594 AS |
118 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, |
119 | hw->syncio); | |
161b96c3 | 120 | } else |
bf5c2e27 | 121 | spi_finalize_current_transfer(master); |
161b96c3 AS |
122 | |
123 | return IRQ_HANDLED; | |
124 | } | |
125 | ||
fd4a319b | 126 | static int spi_clps711x_probe(struct platform_device *pdev) |
161b96c3 | 127 | { |
161b96c3 AS |
128 | struct spi_clps711x_data *hw; |
129 | struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); | |
3dc92594 AS |
130 | struct spi_master *master; |
131 | struct resource *res; | |
132 | int i, irq, ret; | |
161b96c3 AS |
133 | |
134 | if (!pdata) { | |
135 | dev_err(&pdev->dev, "No platform data supplied\n"); | |
136 | return -EINVAL; | |
137 | } | |
138 | ||
139 | if (pdata->num_chipselect < 1) { | |
140 | dev_err(&pdev->dev, "At least one CS must be defined\n"); | |
141 | return -EINVAL; | |
142 | } | |
143 | ||
3dc92594 AS |
144 | irq = platform_get_irq(pdev, 0); |
145 | if (irq < 0) | |
146 | return irq; | |
147 | ||
3e9ea4b4 AS |
148 | master = spi_alloc_master(&pdev->dev, sizeof(*hw)); |
149 | if (!master) | |
161b96c3 | 150 | return -ENOMEM; |
3e9ea4b4 AS |
151 | |
152 | master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) * | |
153 | pdata->num_chipselect, GFP_KERNEL); | |
154 | if (!master->cs_gpios) { | |
155 | ret = -ENOMEM; | |
156 | goto err_out; | |
161b96c3 AS |
157 | } |
158 | ||
159 | master->bus_num = pdev->id; | |
160 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; | |
8dda9d9a | 161 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); |
161b96c3 AS |
162 | master->num_chipselect = pdata->num_chipselect; |
163 | master->setup = spi_clps711x_setup; | |
bf5c2e27 AL |
164 | master->prepare_message = spi_clps711x_prepare_message; |
165 | master->transfer_one = spi_clps711x_transfer_one; | |
161b96c3 AS |
166 | |
167 | hw = spi_master_get_devdata(master); | |
168 | ||
169 | for (i = 0; i < master->num_chipselect; i++) { | |
3e9ea4b4 | 170 | master->cs_gpios[i] = pdata->chipselect[i]; |
fcba212d AL |
171 | ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i], |
172 | DRIVER_NAME); | |
173 | if (ret) { | |
161b96c3 | 174 | dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); |
161b96c3 AS |
175 | goto err_out; |
176 | } | |
177 | } | |
178 | ||
179 | hw->spi_clk = devm_clk_get(&pdev->dev, "spi"); | |
180 | if (IS_ERR(hw->spi_clk)) { | |
181 | dev_err(&pdev->dev, "Can't get clocks\n"); | |
182 | ret = PTR_ERR(hw->spi_clk); | |
183 | goto err_out; | |
184 | } | |
6f50c6bc | 185 | master->max_speed_hz = clk_get_rate(hw->spi_clk); |
161b96c3 | 186 | |
161b96c3 AS |
187 | platform_set_drvdata(pdev, master); |
188 | ||
3dc92594 AS |
189 | hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3"); |
190 | if (IS_ERR(hw->syscon)) { | |
191 | ret = PTR_ERR(hw->syscon); | |
192 | goto err_out; | |
193 | } | |
194 | ||
195 | hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1"); | |
196 | if (IS_ERR(hw->syscon1)) { | |
197 | ret = PTR_ERR(hw->syscon1); | |
198 | goto err_out; | |
199 | } | |
200 | ||
201 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
202 | hw->syncio = devm_ioremap_resource(&pdev->dev, res); | |
203 | if (IS_ERR(hw->syncio)) { | |
204 | ret = PTR_ERR(hw->syncio); | |
205 | goto err_out; | |
206 | } | |
207 | ||
161b96c3 | 208 | /* Disable extended mode due hardware problems */ |
3dc92594 | 209 | regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0); |
161b96c3 AS |
210 | |
211 | /* Clear possible pending interrupt */ | |
3dc92594 | 212 | readl(hw->syncio); |
161b96c3 | 213 | |
3dc92594 | 214 | ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0, |
bf5c2e27 | 215 | dev_name(&pdev->dev), master); |
3dc92594 | 216 | if (ret) |
c7083790 | 217 | goto err_out; |
161b96c3 | 218 | |
c493fc4b | 219 | ret = devm_spi_register_master(&pdev->dev, master); |
161b96c3 AS |
220 | if (!ret) { |
221 | dev_info(&pdev->dev, | |
222 | "SPI bus driver initialized. Master clock %u Hz\n", | |
6f50c6bc | 223 | master->max_speed_hz); |
161b96c3 AS |
224 | return 0; |
225 | } | |
226 | ||
227 | dev_err(&pdev->dev, "Failed to register master\n"); | |
161b96c3 | 228 | |
161b96c3 | 229 | err_out: |
161b96c3 | 230 | spi_master_put(master); |
161b96c3 AS |
231 | |
232 | return ret; | |
233 | } | |
234 | ||
161b96c3 AS |
235 | static struct platform_driver clps711x_spi_driver = { |
236 | .driver = { | |
237 | .name = DRIVER_NAME, | |
238 | .owner = THIS_MODULE, | |
239 | }, | |
240 | .probe = spi_clps711x_probe, | |
161b96c3 AS |
241 | }; |
242 | module_platform_driver(clps711x_spi_driver); | |
243 | ||
244 | MODULE_LICENSE("GPL"); | |
245 | MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>"); | |
246 | MODULE_DESCRIPTION("CLPS711X SPI bus driver"); | |
350a9b33 | 247 | MODULE_ALIAS("platform:" DRIVER_NAME); |