Commit | Line | Data |
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161b96c3 AS |
1 | /* |
2 | * CLPS711X SPI bus driver | |
3 | * | |
98984796 | 4 | * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru> |
161b96c3 AS |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/io.h> | |
13 | #include <linux/clk.h> | |
161b96c3 AS |
14 | #include <linux/gpio.h> |
15 | #include <linux/delay.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/platform_device.h> | |
3dc92594 AS |
19 | #include <linux/regmap.h> |
20 | #include <linux/mfd/syscon.h> | |
21 | #include <linux/mfd/syscon/clps711x.h> | |
161b96c3 AS |
22 | #include <linux/spi/spi.h> |
23 | #include <linux/platform_data/spi-clps711x.h> | |
24 | ||
161b96c3 AS |
25 | #define DRIVER_NAME "spi-clps711x" |
26 | ||
3dc92594 AS |
27 | #define SYNCIO_FRMLEN(x) ((x) << 8) |
28 | #define SYNCIO_TXFRMEN (1 << 14) | |
29 | ||
161b96c3 | 30 | struct spi_clps711x_data { |
3dc92594 AS |
31 | void __iomem *syncio; |
32 | struct regmap *syscon; | |
161b96c3 | 33 | struct clk *spi_clk; |
161b96c3 AS |
34 | |
35 | u8 *tx_buf; | |
36 | u8 *rx_buf; | |
8dda9d9a | 37 | unsigned int bpw; |
161b96c3 | 38 | int len; |
161b96c3 AS |
39 | }; |
40 | ||
41 | static int spi_clps711x_setup(struct spi_device *spi) | |
42 | { | |
161b96c3 | 43 | /* We are expect that SPI-device is not selected */ |
3e9ea4b4 | 44 | gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
161b96c3 AS |
45 | |
46 | return 0; | |
47 | } | |
48 | ||
bf5c2e27 AL |
49 | static int spi_clps711x_prepare_message(struct spi_master *master, |
50 | struct spi_message *msg) | |
161b96c3 | 51 | { |
3dc92594 | 52 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
8dda9d9a | 53 | struct spi_device *spi = msg->spi; |
161b96c3 | 54 | |
3dc92594 AS |
55 | /* Setup mode for transfer */ |
56 | return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN, | |
57 | (spi->mode & SPI_CPHA) ? | |
58 | SYSCON3_ADCCKNSEN : 0); | |
bf5c2e27 | 59 | } |
161b96c3 | 60 | |
bf5c2e27 AL |
61 | static int spi_clps711x_transfer_one(struct spi_master *master, |
62 | struct spi_device *spi, | |
63 | struct spi_transfer *xfer) | |
64 | { | |
65 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | |
66 | u8 data; | |
161b96c3 | 67 | |
a5b4b234 | 68 | clk_set_rate(hw->spi_clk, xfer->speed_hz ? : spi->max_speed_hz); |
161b96c3 | 69 | |
bf5c2e27 | 70 | hw->len = xfer->len; |
bed890b4 | 71 | hw->bpw = xfer->bits_per_word; |
bf5c2e27 AL |
72 | hw->tx_buf = (u8 *)xfer->tx_buf; |
73 | hw->rx_buf = (u8 *)xfer->rx_buf; | |
161b96c3 | 74 | |
bf5c2e27 AL |
75 | /* Initiate transfer */ |
76 | data = hw->tx_buf ? *hw->tx_buf++ : 0; | |
3dc92594 AS |
77 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio); |
78 | ||
bf5c2e27 | 79 | return 1; |
161b96c3 AS |
80 | } |
81 | ||
82 | static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) | |
83 | { | |
bf5c2e27 AL |
84 | struct spi_master *master = dev_id; |
85 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | |
c7a26f12 | 86 | u8 data; |
161b96c3 AS |
87 | |
88 | /* Handle RX */ | |
3dc92594 | 89 | data = readb(hw->syncio); |
161b96c3 | 90 | if (hw->rx_buf) |
c7a26f12 | 91 | *hw->rx_buf++ = data; |
161b96c3 AS |
92 | |
93 | /* Handle TX */ | |
c7a26f12 AS |
94 | if (--hw->len > 0) { |
95 | data = hw->tx_buf ? *hw->tx_buf++ : 0; | |
3dc92594 AS |
96 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, |
97 | hw->syncio); | |
161b96c3 | 98 | } else |
bf5c2e27 | 99 | spi_finalize_current_transfer(master); |
161b96c3 AS |
100 | |
101 | return IRQ_HANDLED; | |
102 | } | |
103 | ||
fd4a319b | 104 | static int spi_clps711x_probe(struct platform_device *pdev) |
161b96c3 | 105 | { |
161b96c3 AS |
106 | struct spi_clps711x_data *hw; |
107 | struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); | |
3dc92594 AS |
108 | struct spi_master *master; |
109 | struct resource *res; | |
110 | int i, irq, ret; | |
161b96c3 AS |
111 | |
112 | if (!pdata) { | |
113 | dev_err(&pdev->dev, "No platform data supplied\n"); | |
114 | return -EINVAL; | |
115 | } | |
116 | ||
117 | if (pdata->num_chipselect < 1) { | |
118 | dev_err(&pdev->dev, "At least one CS must be defined\n"); | |
119 | return -EINVAL; | |
120 | } | |
121 | ||
3dc92594 AS |
122 | irq = platform_get_irq(pdev, 0); |
123 | if (irq < 0) | |
124 | return irq; | |
125 | ||
3e9ea4b4 AS |
126 | master = spi_alloc_master(&pdev->dev, sizeof(*hw)); |
127 | if (!master) | |
161b96c3 | 128 | return -ENOMEM; |
3e9ea4b4 AS |
129 | |
130 | master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) * | |
131 | pdata->num_chipselect, GFP_KERNEL); | |
132 | if (!master->cs_gpios) { | |
133 | ret = -ENOMEM; | |
134 | goto err_out; | |
161b96c3 AS |
135 | } |
136 | ||
137 | master->bus_num = pdev->id; | |
138 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; | |
8dda9d9a | 139 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); |
161b96c3 AS |
140 | master->num_chipselect = pdata->num_chipselect; |
141 | master->setup = spi_clps711x_setup; | |
bf5c2e27 AL |
142 | master->prepare_message = spi_clps711x_prepare_message; |
143 | master->transfer_one = spi_clps711x_transfer_one; | |
161b96c3 AS |
144 | |
145 | hw = spi_master_get_devdata(master); | |
146 | ||
147 | for (i = 0; i < master->num_chipselect; i++) { | |
3e9ea4b4 | 148 | master->cs_gpios[i] = pdata->chipselect[i]; |
fcba212d AL |
149 | ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i], |
150 | DRIVER_NAME); | |
151 | if (ret) { | |
161b96c3 | 152 | dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); |
161b96c3 AS |
153 | goto err_out; |
154 | } | |
155 | } | |
156 | ||
a5b4b234 | 157 | hw->spi_clk = devm_clk_get(&pdev->dev, NULL); |
161b96c3 | 158 | if (IS_ERR(hw->spi_clk)) { |
161b96c3 AS |
159 | ret = PTR_ERR(hw->spi_clk); |
160 | goto err_out; | |
161 | } | |
161b96c3 | 162 | |
3dc92594 AS |
163 | hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3"); |
164 | if (IS_ERR(hw->syscon)) { | |
165 | ret = PTR_ERR(hw->syscon); | |
166 | goto err_out; | |
167 | } | |
168 | ||
3dc92594 AS |
169 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
170 | hw->syncio = devm_ioremap_resource(&pdev->dev, res); | |
171 | if (IS_ERR(hw->syncio)) { | |
172 | ret = PTR_ERR(hw->syncio); | |
173 | goto err_out; | |
174 | } | |
175 | ||
161b96c3 | 176 | /* Disable extended mode due hardware problems */ |
3dc92594 | 177 | regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0); |
161b96c3 AS |
178 | |
179 | /* Clear possible pending interrupt */ | |
3dc92594 | 180 | readl(hw->syncio); |
161b96c3 | 181 | |
3dc92594 | 182 | ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0, |
bf5c2e27 | 183 | dev_name(&pdev->dev), master); |
3dc92594 | 184 | if (ret) |
c7083790 | 185 | goto err_out; |
161b96c3 | 186 | |
c493fc4b | 187 | ret = devm_spi_register_master(&pdev->dev, master); |
161b96c3 AS |
188 | if (!ret) { |
189 | dev_info(&pdev->dev, | |
190 | "SPI bus driver initialized. Master clock %u Hz\n", | |
6f50c6bc | 191 | master->max_speed_hz); |
161b96c3 AS |
192 | return 0; |
193 | } | |
194 | ||
195 | dev_err(&pdev->dev, "Failed to register master\n"); | |
161b96c3 | 196 | |
161b96c3 | 197 | err_out: |
161b96c3 | 198 | spi_master_put(master); |
161b96c3 AS |
199 | |
200 | return ret; | |
201 | } | |
202 | ||
161b96c3 AS |
203 | static struct platform_driver clps711x_spi_driver = { |
204 | .driver = { | |
205 | .name = DRIVER_NAME, | |
161b96c3 AS |
206 | }, |
207 | .probe = spi_clps711x_probe, | |
161b96c3 AS |
208 | }; |
209 | module_platform_driver(clps711x_spi_driver); | |
210 | ||
211 | MODULE_LICENSE("GPL"); | |
212 | MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>"); | |
213 | MODULE_DESCRIPTION("CLPS711X SPI bus driver"); | |
350a9b33 | 214 | MODULE_ALIAS("platform:" DRIVER_NAME); |