Commit | Line | Data |
---|---|---|
e24c7452 | 1 | /* |
ca632f55 | 2 | * PCI interface driver for DW SPI Core |
e24c7452 | 3 | * |
5dc23c44 | 4 | * Copyright (c) 2009, 2014 Intel Corporation. |
e24c7452 FT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
e24c7452 FT |
14 | */ |
15 | ||
16 | #include <linux/interrupt.h> | |
17 | #include <linux/pci.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
e24c7452 | 19 | #include <linux/spi/spi.h> |
d7614de4 | 20 | #include <linux/module.h> |
e24c7452 | 21 | |
ca632f55 | 22 | #include "spi-dw.h" |
568a60ed | 23 | |
e24c7452 FT |
24 | #define DRIVER_NAME "dw_spi_pci" |
25 | ||
c95791b6 AS |
26 | struct spi_pci_desc { |
27 | int (*setup)(struct dw_spi *); | |
d58cf5ff AS |
28 | u16 num_cs; |
29 | u16 bus_num; | |
c95791b6 AS |
30 | }; |
31 | ||
d58cf5ff | 32 | static struct spi_pci_desc spi_pci_mid_desc_1 = { |
c95791b6 | 33 | .setup = dw_spi_mid_init, |
307ed83c | 34 | .num_cs = 5, |
d58cf5ff AS |
35 | .bus_num = 0, |
36 | }; | |
37 | ||
38 | static struct spi_pci_desc spi_pci_mid_desc_2 = { | |
39 | .setup = dw_spi_mid_init, | |
307ed83c | 40 | .num_cs = 2, |
d58cf5ff | 41 | .bus_num = 1, |
c95791b6 AS |
42 | }; |
43 | ||
44 | static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
e24c7452 | 45 | { |
e24c7452 | 46 | struct dw_spi *dws; |
c95791b6 | 47 | struct spi_pci_desc *desc = (struct spi_pci_desc *)ent->driver_data; |
e24c7452 FT |
48 | int pci_bar = 0; |
49 | int ret; | |
50 | ||
04f421e7 | 51 | ret = pcim_enable_device(pdev); |
e24c7452 FT |
52 | if (ret) |
53 | return ret; | |
54 | ||
1c2df965 AS |
55 | dws = devm_kzalloc(&pdev->dev, sizeof(*dws), GFP_KERNEL); |
56 | if (!dws) | |
04f421e7 | 57 | return -ENOMEM; |
e24c7452 | 58 | |
e24c7452 FT |
59 | /* Get basic io resource and map it */ |
60 | dws->paddr = pci_resource_start(pdev, pci_bar); | |
e24c7452 | 61 | |
ceb86de9 | 62 | ret = pcim_iomap_regions(pdev, 1 << pci_bar, pci_name(pdev)); |
e24c7452 | 63 | if (ret) |
04f421e7 | 64 | return ret; |
e24c7452 | 65 | |
c9d5d6fe | 66 | dws->regs = pcim_iomap_table(pdev)[pci_bar]; |
e24c7452 | 67 | dws->irq = pdev->irq; |
7063c0d9 FT |
68 | |
69 | /* | |
3208a1cc | 70 | * Specific handling for platforms, like dma setup, |
7063c0d9 FT |
71 | * clock rate, FIFO depth. |
72 | */ | |
d58cf5ff | 73 | if (desc) { |
d9c14743 AS |
74 | dws->num_cs = desc->num_cs; |
75 | dws->bus_num = desc->bus_num; | |
76 | ||
d58cf5ff AS |
77 | if (desc->setup) { |
78 | ret = desc->setup(dws); | |
79 | if (ret) | |
80 | return ret; | |
81 | } | |
d58cf5ff AS |
82 | } else { |
83 | return -ENODEV; | |
7063c0d9 | 84 | } |
e24c7452 | 85 | |
04f421e7 | 86 | ret = dw_spi_add_host(&pdev->dev, dws); |
e24c7452 | 87 | if (ret) |
04f421e7 | 88 | return ret; |
e24c7452 FT |
89 | |
90 | /* PCI hook and SPI hook use the same drv data */ | |
1c2df965 | 91 | pci_set_drvdata(pdev, dws); |
e24c7452 | 92 | |
fcf0af44 AS |
93 | dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n", |
94 | pdev->vendor, pdev->device); | |
95 | ||
04f421e7 | 96 | return 0; |
e24c7452 FT |
97 | } |
98 | ||
fd4a319b | 99 | static void spi_pci_remove(struct pci_dev *pdev) |
e24c7452 | 100 | { |
1c2df965 | 101 | struct dw_spi *dws = pci_get_drvdata(pdev); |
e24c7452 | 102 | |
1c2df965 | 103 | dw_spi_remove_host(dws); |
e24c7452 FT |
104 | } |
105 | ||
35f2d413 AS |
106 | #ifdef CONFIG_PM_SLEEP |
107 | static int spi_suspend(struct device *dev) | |
e24c7452 | 108 | { |
35f2d413 | 109 | struct pci_dev *pdev = to_pci_dev(dev); |
1c2df965 | 110 | struct dw_spi *dws = pci_get_drvdata(pdev); |
e24c7452 | 111 | |
1c2df965 | 112 | return dw_spi_suspend_host(dws); |
e24c7452 FT |
113 | } |
114 | ||
35f2d413 | 115 | static int spi_resume(struct device *dev) |
e24c7452 | 116 | { |
35f2d413 | 117 | struct pci_dev *pdev = to_pci_dev(dev); |
1c2df965 | 118 | struct dw_spi *dws = pci_get_drvdata(pdev); |
e24c7452 | 119 | |
1c2df965 | 120 | return dw_spi_resume_host(dws); |
e24c7452 | 121 | } |
e24c7452 FT |
122 | #endif |
123 | ||
35f2d413 AS |
124 | static SIMPLE_DEV_PM_OPS(dw_spi_pm_ops, spi_suspend, spi_resume); |
125 | ||
9a21e477 | 126 | static const struct pci_device_id pci_ids[] = { |
7063c0d9 | 127 | /* Intel MID platform SPI controller 0 */ |
d58cf5ff AS |
128 | /* |
129 | * The access to the device 8086:0801 is disabled by HW, since it's | |
130 | * exclusively used by SCU to communicate with MSIC. | |
131 | */ | |
132 | /* Intel MID platform SPI controller 1 */ | |
133 | { PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1}, | |
134 | /* Intel MID platform SPI controller 2 */ | |
135 | { PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2}, | |
e24c7452 FT |
136 | {}, |
137 | }; | |
138 | ||
139 | static struct pci_driver dw_spi_driver = { | |
140 | .name = DRIVER_NAME, | |
141 | .id_table = pci_ids, | |
142 | .probe = spi_pci_probe, | |
fd4a319b | 143 | .remove = spi_pci_remove, |
35f2d413 AS |
144 | .driver = { |
145 | .pm = &dw_spi_pm_ops, | |
146 | }, | |
e24c7452 FT |
147 | }; |
148 | ||
8ebb35fd | 149 | module_pci_driver(dw_spi_driver); |
e24c7452 FT |
150 | |
151 | MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>"); | |
152 | MODULE_DESCRIPTION("PCI interface driver for DW SPI Core"); | |
153 | MODULE_LICENSE("GPL v2"); |