Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[deliverable/linux.git] / drivers / spi / spi-gpio.c
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d29389de 1/*
ca632f55 2 * SPI master driver using generic bitbanged GPIO
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3 *
4 * Copyright (C) 2006,2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20#include <linux/kernel.h>
d7614de4 21#include <linux/module.h>
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22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/gpio.h>
25
26#include <linux/spi/spi.h>
27#include <linux/spi/spi_bitbang.h>
28#include <linux/spi/spi_gpio.h>
29
30
31/*
32 * This bitbanging SPI master driver should help make systems usable
33 * when a native hardware SPI engine is not available, perhaps because
34 * its driver isn't yet working or because the I/O pins it requires
35 * are used for other purposes.
36 *
37 * platform_device->driver_data ... points to spi_gpio
38 *
39 * spi->controller_state ... reserved for bitbang framework code
40 * spi->controller_data ... holds chipselect GPIO
41 *
42 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
43 */
44
45struct spi_gpio {
46 struct spi_bitbang bitbang;
47 struct spi_gpio_platform_data pdata;
48 struct platform_device *pdev;
49};
50
51/*----------------------------------------------------------------------*/
52
53/*
54 * Because the overhead of going through four GPIO procedure calls
55 * per transferred bit can make performance a problem, this code
56 * is set up so that you can use it in either of two ways:
57 *
58 * - The slow generic way: set up platform_data to hold the GPIO
59 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
60 * each of them. This driver can handle several such busses.
61 *
62 * - The quicker inlined way: only helps with platform GPIO code
63 * that inlines operations for constant GPIOs. This can give
64 * you tight (fast!) inner loops, but each such bus needs a
65 * new driver. You'll define a new C file, with Makefile and
66 * Kconfig support; the C code can be a total of six lines:
67 *
68 * #define DRIVER_NAME "myboard_spi2"
69 * #define SPI_MISO_GPIO 119
70 * #define SPI_MOSI_GPIO 120
71 * #define SPI_SCK_GPIO 121
72 * #define SPI_N_CHIPSEL 4
ca632f55 73 * #include "spi-gpio.c"
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74 */
75
76#ifndef DRIVER_NAME
77#define DRIVER_NAME "spi_gpio"
78
79#define GENERIC_BITBANG /* vs tight inlines */
80
81/* all functions referencing these symbols must define pdata */
82#define SPI_MISO_GPIO ((pdata)->miso)
83#define SPI_MOSI_GPIO ((pdata)->mosi)
84#define SPI_SCK_GPIO ((pdata)->sck)
85
86#define SPI_N_CHIPSEL ((pdata)->num_chipselect)
87
88#endif
89
90/*----------------------------------------------------------------------*/
91
92static inline const struct spi_gpio_platform_data * __pure
93spi_to_pdata(const struct spi_device *spi)
94{
95 const struct spi_bitbang *bang;
96 const struct spi_gpio *spi_gpio;
97
98 bang = spi_master_get_devdata(spi->master);
99 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
100 return &spi_gpio->pdata;
101}
102
103/* this is #defined to avoid unused-variable warnings when inlining */
104#define pdata spi_to_pdata(spi)
105
106static inline void setsck(const struct spi_device *spi, int is_on)
107{
108 gpio_set_value(SPI_SCK_GPIO, is_on);
109}
110
111static inline void setmosi(const struct spi_device *spi, int is_on)
112{
113 gpio_set_value(SPI_MOSI_GPIO, is_on);
114}
115
116static inline int getmiso(const struct spi_device *spi)
117{
be50344e 118 return !!gpio_get_value(SPI_MISO_GPIO);
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119}
120
121#undef pdata
122
123/*
124 * NOTE: this clocks "as fast as we can". It "should" be a function of the
125 * requested device clock. Software overhead means we usually have trouble
126 * reaching even one Mbit/sec (except when we can inline bitops), so for now
127 * we'll just assume we never need additional per-bit slowdowns.
128 */
129#define spidelay(nsecs) do {} while (0)
130
ca632f55 131#include "spi-bitbang-txrx.h"
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132
133/*
134 * These functions can leverage inline expansion of GPIO calls to shrink
135 * costs for a txrx bit, often by factors of around ten (by instruction
136 * count). That is particularly visible for larger word sizes, but helps
137 * even with default 8-bit words.
138 *
139 * REVISIT overheads calling these functions for each word also have
140 * significant performance costs. Having txrx_bufs() calls that inline
141 * the txrx_word() logic would help performance, e.g. on larger blocks
142 * used with flash storage or MMC/SD. There should also be ways to make
143 * GCC be less stupid about reloading registers inside the I/O loops,
144 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
145 */
146
147static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
148 unsigned nsecs, u32 word, u8 bits)
149{
04bb2a03 150 return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
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151}
152
153static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
154 unsigned nsecs, u32 word, u8 bits)
155{
04bb2a03 156 return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
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157}
158
159static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
160 unsigned nsecs, u32 word, u8 bits)
161{
04bb2a03 162 return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
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163}
164
165static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
166 unsigned nsecs, u32 word, u8 bits)
167{
04bb2a03 168 return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
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169}
170
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MS
171/*
172 * These functions do not call setmosi or getmiso if respective flag
173 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
174 * call when such pin is not present or defined in the controller.
175 * A separate set of callbacks is defined to get highest possible
176 * speed in the generic case (when both MISO and MOSI lines are
177 * available), as optimiser will remove the checks when argument is
178 * constant.
179 */
180
181static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
182 unsigned nsecs, u32 word, u8 bits)
183{
184 unsigned flags = spi->master->flags;
185 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
186}
187
188static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
189 unsigned nsecs, u32 word, u8 bits)
190{
191 unsigned flags = spi->master->flags;
192 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
193}
194
195static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
196 unsigned nsecs, u32 word, u8 bits)
197{
198 unsigned flags = spi->master->flags;
199 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
200}
201
202static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
203 unsigned nsecs, u32 word, u8 bits)
204{
205 unsigned flags = spi->master->flags;
206 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
207}
208
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209/*----------------------------------------------------------------------*/
210
211static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
212{
213 unsigned long cs = (unsigned long) spi->controller_data;
214
215 /* set initial clock polarity */
216 if (is_active)
217 setsck(spi, spi->mode & SPI_CPOL);
218
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219 if (cs != SPI_GPIO_NO_CHIPSELECT) {
220 /* SPI is normally active-low */
221 gpio_set_value(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
222 }
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223}
224
225static int spi_gpio_setup(struct spi_device *spi)
226{
227 unsigned long cs = (unsigned long) spi->controller_data;
228 int status = 0;
229
230 if (spi->bits_per_word > 32)
231 return -EINVAL;
232
233 if (!spi->controller_state) {
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MB
234 if (cs != SPI_GPIO_NO_CHIPSELECT) {
235 status = gpio_request(cs, dev_name(&spi->dev));
236 if (status)
237 return status;
05644147
UKK
238 status = gpio_direction_output(cs,
239 !(spi->mode & SPI_CS_HIGH));
bfb9bcdb 240 }
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241 }
242 if (!status)
243 status = spi_bitbang_setup(spi);
244 if (status) {
bfb9bcdb 245 if (!spi->controller_state && cs != SPI_GPIO_NO_CHIPSELECT)
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246 gpio_free(cs);
247 }
248 return status;
249}
250
251static void spi_gpio_cleanup(struct spi_device *spi)
252{
253 unsigned long cs = (unsigned long) spi->controller_data;
254
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MB
255 if (cs != SPI_GPIO_NO_CHIPSELECT)
256 gpio_free(cs);
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257 spi_bitbang_cleanup(spi);
258}
259
c65b53ba 260static int __devinit spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
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261{
262 int value;
263
264 value = gpio_request(pin, label);
265 if (value == 0) {
266 if (is_in)
267 value = gpio_direction_input(pin);
268 else
269 value = gpio_direction_output(pin, 0);
270 }
271 return value;
272}
273
c65b53ba 274static int __devinit
3c8e1a84
MS
275spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label,
276 u16 *res_flags)
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DB
277{
278 int value;
279
280 /* NOTE: SPI_*_GPIO symbols may reference "pdata" */
281
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MS
282 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) {
283 value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
284 if (value)
285 goto done;
286 } else {
287 /* HW configuration without MOSI pin */
288 *res_flags |= SPI_MASTER_NO_TX;
289 }
d29389de 290
3c8e1a84
MS
291 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) {
292 value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
293 if (value)
294 goto free_mosi;
295 } else {
296 /* HW configuration without MISO pin */
297 *res_flags |= SPI_MASTER_NO_RX;
298 }
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299
300 value = spi_gpio_alloc(SPI_SCK_GPIO, label, false);
301 if (value)
302 goto free_miso;
303
304 goto done;
305
306free_miso:
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MS
307 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
308 gpio_free(SPI_MISO_GPIO);
d29389de 309free_mosi:
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MS
310 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
311 gpio_free(SPI_MOSI_GPIO);
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312done:
313 return value;
314}
315
940ab889 316static int __devinit spi_gpio_probe(struct platform_device *pdev)
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317{
318 int status;
319 struct spi_master *master;
320 struct spi_gpio *spi_gpio;
321 struct spi_gpio_platform_data *pdata;
3c8e1a84 322 u16 master_flags = 0;
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323
324 pdata = pdev->dev.platform_data;
325#ifdef GENERIC_BITBANG
326 if (!pdata || !pdata->num_chipselect)
327 return -ENODEV;
328#endif
329
3c8e1a84 330 status = spi_gpio_request(pdata, dev_name(&pdev->dev), &master_flags);
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331 if (status < 0)
332 return status;
333
334 master = spi_alloc_master(&pdev->dev, sizeof *spi_gpio);
335 if (!master) {
336 status = -ENOMEM;
337 goto gpio_free;
338 }
339 spi_gpio = spi_master_get_devdata(master);
340 platform_set_drvdata(pdev, spi_gpio);
341
342 spi_gpio->pdev = pdev;
343 if (pdata)
344 spi_gpio->pdata = *pdata;
345
3c8e1a84 346 master->flags = master_flags;
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347 master->bus_num = pdev->id;
348 master->num_chipselect = SPI_N_CHIPSEL;
349 master->setup = spi_gpio_setup;
350 master->cleanup = spi_gpio_cleanup;
351
352 spi_gpio->bitbang.master = spi_master_get(master);
353 spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
3c8e1a84 354
23699f98 355 if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) {
3c8e1a84
MS
356 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
357 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
358 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
359 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
360 } else {
361 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
362 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
363 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
364 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
365 }
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366 spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
367 spi_gpio->bitbang.flags = SPI_CS_HIGH;
368
369 status = spi_bitbang_start(&spi_gpio->bitbang);
370 if (status < 0) {
371 spi_master_put(spi_gpio->bitbang.master);
372gpio_free:
3c8e1a84
MS
373 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
374 gpio_free(SPI_MISO_GPIO);
375 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
376 gpio_free(SPI_MOSI_GPIO);
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DB
377 gpio_free(SPI_SCK_GPIO);
378 spi_master_put(master);
379 }
380
381 return status;
382}
383
940ab889 384static int __devexit spi_gpio_remove(struct platform_device *pdev)
d29389de
DB
385{
386 struct spi_gpio *spi_gpio;
387 struct spi_gpio_platform_data *pdata;
388 int status;
389
390 spi_gpio = platform_get_drvdata(pdev);
391 pdata = pdev->dev.platform_data;
392
393 /* stop() unregisters child devices too */
394 status = spi_bitbang_stop(&spi_gpio->bitbang);
395 spi_master_put(spi_gpio->bitbang.master);
396
397 platform_set_drvdata(pdev, NULL);
398
3c8e1a84
MS
399 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
400 gpio_free(SPI_MISO_GPIO);
401 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
402 gpio_free(SPI_MOSI_GPIO);
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DB
403 gpio_free(SPI_SCK_GPIO);
404
405 return status;
406}
407
408MODULE_ALIAS("platform:" DRIVER_NAME);
409
410static struct platform_driver spi_gpio_driver = {
411 .driver.name = DRIVER_NAME,
412 .driver.owner = THIS_MODULE,
940ab889
GL
413 .probe = spi_gpio_probe,
414 .remove = __devexit_p(spi_gpio_remove),
d29389de 415};
940ab889 416module_platform_driver(spi_gpio_driver);
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417
418MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
419MODULE_AUTHOR("David Brownell");
420MODULE_LICENSE("GPL");
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