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78961a57 | 1 | /* |
ca632f55 | 2 | * Driver for LM70EVAL-LLP board for the LM70 sensor |
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3 | * |
4 | * Copyright (C) 2006 Kaiwan N Billimoria <kaiwan@designergraphix.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
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15 | */ |
16 | ||
17 | #include <linux/init.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/device.h> | |
22 | #include <linux/parport.h> | |
23 | #include <linux/sysfs.h> | |
24 | #include <linux/workqueue.h> | |
25 | ||
26 | ||
27 | #include <linux/spi/spi.h> | |
28 | #include <linux/spi/spi_bitbang.h> | |
29 | ||
30 | ||
31 | /* | |
32 | * The LM70 communicates with a host processor using a 3-wire variant of | |
33 | * the SPI/Microwire bus interface. This driver specifically supports an | |
34 | * NS LM70 LLP Evaluation Board, interfacing to a PC using its parallel | |
35 | * port to bitbang an SPI-parport bridge. Accordingly, this is an SPI | |
36 | * master controller driver. The hwmon/lm70 driver is a "SPI protocol | |
37 | * driver", layered on top of this one and usable without the lm70llp. | |
38 | * | |
2b730051 | 39 | * Datasheet and Schematic: |
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40 | * The LM70 is a temperature sensor chip from National Semiconductor; its |
41 | * datasheet is available at http://www.national.com/pf/LM/LM70.html | |
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42 | * The schematic for this particular board (the LM70EVAL-LLP) is |
43 | * available (on page 4) here: | |
44 | * http://www.national.com/appinfo/tempsensors/files/LM70LLPEVALmanual.pdf | |
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45 | * |
46 | * Also see Documentation/spi/spi-lm70llp. The SPI<->parport code here is | |
47 | * (heavily) based on spi-butterfly by David Brownell. | |
48 | * | |
49 | * The LM70 LLP connects to the PC parallel port in the following manner: | |
50 | * | |
51 | * Parallel LM70 LLP | |
52 | * Port Direction JP2 Header | |
53 | * ----------- --------- ------------ | |
54 | * D0 2 - - | |
55 | * D1 3 --> V+ 5 | |
56 | * D2 4 --> V+ 5 | |
57 | * D3 5 --> V+ 5 | |
58 | * D4 6 --> V+ 5 | |
59 | * D5 7 --> nCS 8 | |
60 | * D6 8 --> SCLK 3 | |
61 | * D7 9 --> SI/O 5 | |
62 | * GND 25 - GND 7 | |
63 | * Select 13 <-- SI/O 1 | |
64 | * | |
65 | * Note that parport pin 13 actually gets inverted by the transistor | |
66 | * arrangement which lets either the parport or the LM70 drive the | |
2b730051 | 67 | * SI/SO signal (see the schematic for details). |
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68 | */ |
69 | ||
70 | #define DRVNAME "spi-lm70llp" | |
71 | ||
72 | #define lm70_INIT 0xBE | |
73 | #define SIO 0x10 | |
74 | #define nCS 0x20 | |
75 | #define SCLK 0x40 | |
76 | ||
77 | /*-------------------------------------------------------------------------*/ | |
78 | ||
79 | struct spi_lm70llp { | |
80 | struct spi_bitbang bitbang; | |
81 | struct parport *port; | |
82 | struct pardevice *pd; | |
83 | struct spi_device *spidev_lm70; | |
84 | struct spi_board_info info; | |
49dce689 | 85 | //struct device *dev; |
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86 | }; |
87 | ||
88 | /* REVISIT : ugly global ; provides "exclusive open" facility */ | |
89 | static struct spi_lm70llp *lm70llp; | |
90 | ||
91 | ||
92 | /*-------------------------------------------------------------------*/ | |
93 | ||
94 | static inline struct spi_lm70llp *spidev_to_pp(struct spi_device *spi) | |
95 | { | |
96 | return spi->controller_data; | |
97 | } | |
98 | ||
99 | /*---------------------- LM70 LLP eval board-specific inlines follow */ | |
100 | ||
101 | /* NOTE: we don't actually need to reread the output values, since they'll | |
102 | * still be what we wrote before. Plus, going through parport builds in | |
103 | * a ~1ms/operation delay; these SPI transfers could easily be faster. | |
104 | */ | |
105 | ||
106 | static inline void deassertCS(struct spi_lm70llp *pp) | |
107 | { | |
108 | u8 data = parport_read_data(pp->port); | |
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109 | |
110 | data &= ~0x80; /* pull D7/SI-out low while de-asserted */ | |
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111 | parport_write_data(pp->port, data | nCS); |
112 | } | |
113 | ||
114 | static inline void assertCS(struct spi_lm70llp *pp) | |
115 | { | |
116 | u8 data = parport_read_data(pp->port); | |
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117 | |
118 | data |= 0x80; /* pull D7/SI-out high so lm70 drives SO-in */ | |
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119 | parport_write_data(pp->port, data & ~nCS); |
120 | } | |
121 | ||
122 | static inline void clkHigh(struct spi_lm70llp *pp) | |
123 | { | |
124 | u8 data = parport_read_data(pp->port); | |
125 | parport_write_data(pp->port, data | SCLK); | |
126 | } | |
127 | ||
128 | static inline void clkLow(struct spi_lm70llp *pp) | |
129 | { | |
130 | u8 data = parport_read_data(pp->port); | |
131 | parport_write_data(pp->port, data & ~SCLK); | |
132 | } | |
133 | ||
134 | /*------------------------- SPI-LM70-specific inlines ----------------------*/ | |
135 | ||
136 | static inline void spidelay(unsigned d) | |
137 | { | |
138 | udelay(d); | |
139 | } | |
140 | ||
141 | static inline void setsck(struct spi_device *s, int is_on) | |
142 | { | |
143 | struct spi_lm70llp *pp = spidev_to_pp(s); | |
144 | ||
145 | if (is_on) | |
146 | clkHigh(pp); | |
147 | else | |
148 | clkLow(pp); | |
149 | } | |
150 | ||
151 | static inline void setmosi(struct spi_device *s, int is_on) | |
152 | { | |
153 | /* FIXME update D7 ... this way we can put the chip | |
154 | * into shutdown mode and read the manufacturer ID, | |
155 | * but we can't put it back into operational mode. | |
156 | */ | |
157 | } | |
158 | ||
159 | /* | |
160 | * getmiso: | |
161 | * Why do we return 0 when the SIO line is high and vice-versa? | |
162 | * The fact is, the lm70 eval board from NS (which this driver drives), | |
163 | * is wired in just such a way : when the lm70's SIO goes high, a transistor | |
164 | * switches it to low reflecting this on the parport (pin 13), and vice-versa. | |
165 | */ | |
166 | static inline int getmiso(struct spi_device *s) | |
167 | { | |
168 | struct spi_lm70llp *pp = spidev_to_pp(s); | |
169 | return ((SIO == (parport_read_status(pp->port) & SIO)) ? 0 : 1 ); | |
170 | } | |
171 | /*--------------------------------------------------------------------*/ | |
172 | ||
ca632f55 | 173 | #include "spi-bitbang-txrx.h" |
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174 | |
175 | static void lm70_chipselect(struct spi_device *spi, int value) | |
176 | { | |
177 | struct spi_lm70llp *pp = spidev_to_pp(spi); | |
178 | ||
179 | if (value) | |
180 | assertCS(pp); | |
181 | else | |
182 | deassertCS(pp); | |
183 | } | |
184 | ||
185 | /* | |
186 | * Our actual bitbanger routine. | |
187 | */ | |
188 | static u32 lm70_txrx(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits) | |
189 | { | |
04bb2a03 | 190 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); |
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191 | } |
192 | ||
193 | static void spi_lm70llp_attach(struct parport *p) | |
194 | { | |
195 | struct pardevice *pd; | |
196 | struct spi_lm70llp *pp; | |
197 | struct spi_master *master; | |
198 | int status; | |
199 | ||
200 | if (lm70llp) { | |
201 | printk(KERN_WARNING | |
202 | "%s: spi_lm70llp instance already loaded. Aborting.\n", | |
203 | DRVNAME); | |
204 | return; | |
205 | } | |
206 | ||
207 | /* TODO: this just _assumes_ a lm70 is there ... no probe; | |
208 | * the lm70 driver could verify it, reading the manf ID. | |
209 | */ | |
210 | ||
211 | master = spi_alloc_master(p->physport->dev, sizeof *pp); | |
212 | if (!master) { | |
213 | status = -ENOMEM; | |
214 | goto out_fail; | |
215 | } | |
216 | pp = spi_master_get_devdata(master); | |
217 | ||
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218 | /* |
219 | * SPI and bitbang hookup. | |
220 | */ | |
94c69f76 | 221 | pp->bitbang.master = master; |
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222 | pp->bitbang.chipselect = lm70_chipselect; |
223 | pp->bitbang.txrx_word[SPI_MODE_0] = lm70_txrx; | |
224 | pp->bitbang.flags = SPI_3WIRE; | |
225 | ||
226 | /* | |
227 | * Parport hookup | |
228 | */ | |
229 | pp->port = p; | |
230 | pd = parport_register_device(p, DRVNAME, | |
231 | NULL, NULL, NULL, | |
232 | PARPORT_FLAG_EXCL, pp); | |
233 | if (!pd) { | |
234 | status = -ENOMEM; | |
235 | goto out_free_master; | |
236 | } | |
237 | pp->pd = pd; | |
238 | ||
239 | status = parport_claim(pd); | |
240 | if (status < 0) | |
241 | goto out_parport_unreg; | |
242 | ||
243 | /* | |
244 | * Start SPI ... | |
245 | */ | |
246 | status = spi_bitbang_start(&pp->bitbang); | |
247 | if (status < 0) { | |
248 | printk(KERN_WARNING | |
249 | "%s: spi_bitbang_start failed with status %d\n", | |
250 | DRVNAME, status); | |
251 | goto out_off_and_release; | |
252 | } | |
253 | ||
254 | /* | |
255 | * The modalias name MUST match the device_driver name | |
256 | * for the bus glue code to match and subsequently bind them. | |
257 | * We are binding to the generic drivers/hwmon/lm70.c device | |
258 | * driver. | |
259 | */ | |
260 | strcpy(pp->info.modalias, "lm70"); | |
261 | pp->info.max_speed_hz = 6 * 1000 * 1000; | |
262 | pp->info.chip_select = 0; | |
263 | pp->info.mode = SPI_3WIRE | SPI_MODE_0; | |
264 | ||
265 | /* power up the chip, and let the LM70 control SI/SO */ | |
266 | parport_write_data(pp->port, lm70_INIT); | |
267 | ||
268 | /* Enable access to our primary data structure via | |
269 | * the board info's (void *)controller_data. | |
270 | */ | |
271 | pp->info.controller_data = pp; | |
272 | pp->spidev_lm70 = spi_new_device(pp->bitbang.master, &pp->info); | |
273 | if (pp->spidev_lm70) | |
274 | dev_dbg(&pp->spidev_lm70->dev, "spidev_lm70 at %s\n", | |
35f74fca | 275 | dev_name(&pp->spidev_lm70->dev)); |
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276 | else { |
277 | printk(KERN_WARNING "%s: spi_new_device failed\n", DRVNAME); | |
278 | status = -ENODEV; | |
279 | goto out_bitbang_stop; | |
280 | } | |
2b730051 | 281 | pp->spidev_lm70->bits_per_word = 8; |
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282 | |
283 | lm70llp = pp; | |
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284 | return; |
285 | ||
286 | out_bitbang_stop: | |
287 | spi_bitbang_stop(&pp->bitbang); | |
288 | out_off_and_release: | |
289 | /* power down */ | |
290 | parport_write_data(pp->port, 0); | |
291 | mdelay(10); | |
292 | parport_release(pp->pd); | |
293 | out_parport_unreg: | |
294 | parport_unregister_device(pd); | |
295 | out_free_master: | |
296 | (void) spi_master_put(master); | |
297 | out_fail: | |
298 | pr_info("%s: spi_lm70llp probe fail, status %d\n", DRVNAME, status); | |
299 | } | |
300 | ||
301 | static void spi_lm70llp_detach(struct parport *p) | |
302 | { | |
303 | struct spi_lm70llp *pp; | |
304 | ||
305 | if (!lm70llp || lm70llp->port != p) | |
306 | return; | |
307 | ||
308 | pp = lm70llp; | |
309 | spi_bitbang_stop(&pp->bitbang); | |
310 | ||
311 | /* power down */ | |
312 | parport_write_data(pp->port, 0); | |
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313 | |
314 | parport_release(pp->pd); | |
315 | parport_unregister_device(pp->pd); | |
316 | ||
317 | (void) spi_master_put(pp->bitbang.master); | |
318 | ||
319 | lm70llp = NULL; | |
320 | } | |
321 | ||
322 | ||
323 | static struct parport_driver spi_lm70llp_drv = { | |
324 | .name = DRVNAME, | |
325 | .attach = spi_lm70llp_attach, | |
326 | .detach = spi_lm70llp_detach, | |
327 | }; | |
328 | ||
329 | static int __init init_spi_lm70llp(void) | |
330 | { | |
331 | return parport_register_driver(&spi_lm70llp_drv); | |
332 | } | |
333 | module_init(init_spi_lm70llp); | |
334 | ||
335 | static void __exit cleanup_spi_lm70llp(void) | |
336 | { | |
337 | parport_unregister_driver(&spi_lm70llp_drv); | |
338 | } | |
339 | module_exit(cleanup_spi_lm70llp); | |
340 | ||
341 | MODULE_AUTHOR("Kaiwan N Billimoria <kaiwan@designergraphix.com>"); | |
342 | MODULE_DESCRIPTION( | |
343 | "Parport adapter for the National Semiconductor LM70 LLP eval board"); | |
344 | MODULE_LICENSE("GPL"); |