[deliverable/linux.git] / drivers / spi / spi-sh-sci.c

/*
 * SH SCI SPI interface
 *
 * Copyright (c) 2008 Magnus Damm
 *
 * Based on S3C24XX GPIO based SPI driver, which is:
 *   Copyright (c) 2006 Ben Dooks
 *   Copyright (c) 2006 Simtec Electronics
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/platform_device.h>

#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/module.h>

#include <asm/spi.h>
#include <asm/io.h>

struct sh_sci_spi {
	struct spi_bitbang bitbang;

	void __iomem *membase;
	unsigned char val;
	struct sh_spi_info *info;
	struct platform_device *dev;
};

#define SCSPTR(sp)	(sp->membase + 0x1c)
#define PIN_SCK		(1 << 2)
#define PIN_TXD		(1 << 0)
#define PIN_RXD		PIN_TXD
#define PIN_INIT	((1 << 1) | (1 << 3) | PIN_SCK | PIN_TXD)

static inline void setbits(struct sh_sci_spi *sp, int bits, int on)
{
	/*
	 * We are the only user of SCSPTR so no locking is required.
	 * Reading bit 2 and 0 in SCSPTR gives pin state as input.
	 * Writing the same bits sets the output value.
	 * This makes regular read-modify-write difficult so we
	 * use sp->val to keep track of the latest register value.
	 */

	if (on)
		sp->val |= bits;
	else
		sp->val &= ~bits;

	iowrite8(sp->val, SCSPTR(sp));
}

static inline void setsck(struct spi_device *dev, int on)
{
	setbits(spi_master_get_devdata(dev->master), PIN_SCK, on);
}

static inline void setmosi(struct spi_device *dev, int on)
{
	setbits(spi_master_get_devdata(dev->master), PIN_TXD, on);
}

static inline u32 getmiso(struct spi_device *dev)
{
	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);

	return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0;
}

#define spidelay(x) ndelay(x)

#include "spi-bitbang-txrx.h"

static u32 sh_sci_spi_txrx_mode0(struct spi_device *spi,
				      unsigned nsecs, u32 word, u8 bits)
{
	return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
}

static u32 sh_sci_spi_txrx_mode1(struct spi_device *spi,
				      unsigned nsecs, u32 word, u8 bits)
{
	return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
}

static u32 sh_sci_spi_txrx_mode2(struct spi_device *spi,
				      unsigned nsecs, u32 word, u8 bits)
{
	return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
}

static u32 sh_sci_spi_txrx_mode3(struct spi_device *spi,
				      unsigned nsecs, u32 word, u8 bits)
{
	return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
}

static void sh_sci_spi_chipselect(struct spi_device *dev, int value)
{
	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);

	if (sp->info->chip_select)
		(sp->info->chip_select)(sp->info, dev->chip_select, value);
}

static int sh_sci_spi_probe(struct platform_device *dev)
{
	struct resource	*r;
	struct spi_master *master;
	struct sh_sci_spi *sp;
	int ret;

	master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi));
	if (master == NULL) {
		dev_err(&dev->dev, "failed to allocate spi master\n");
		ret = -ENOMEM;
		goto err0;
	}

	sp = spi_master_get_devdata(master);

	platform_set_drvdata(dev, sp);
	sp->info = dev_get_platdata(&dev->dev);
	if (!sp->info) {
		dev_err(&dev->dev, "platform data is missing\n");
		ret = -ENOENT;
		goto err1;
	}

	/* setup spi bitbang adaptor */
	sp->bitbang.master = master;
	sp->bitbang.master->bus_num = sp->info->bus_num;
	sp->bitbang.master->num_chipselect = sp->info->num_chipselect;
	sp->bitbang.chipselect = sh_sci_spi_chipselect;

	sp->bitbang.txrx_word[SPI_MODE_0] = sh_sci_spi_txrx_mode0;
	sp->bitbang.txrx_word[SPI_MODE_1] = sh_sci_spi_txrx_mode1;
	sp->bitbang.txrx_word[SPI_MODE_2] = sh_sci_spi_txrx_mode2;
	sp->bitbang.txrx_word[SPI_MODE_3] = sh_sci_spi_txrx_mode3;

	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (r == NULL) {
		ret = -ENOENT;
		goto err1;
	}
	sp->membase = ioremap(r->start, resource_size(r));
	if (!sp->membase) {
		ret = -ENXIO;
		goto err1;
	}
	sp->val = ioread8(SCSPTR(sp));
	setbits(sp, PIN_INIT, 1);

	ret = spi_bitbang_start(&sp->bitbang);
	if (!ret)
		return 0;

	setbits(sp, PIN_INIT, 0);
	iounmap(sp->membase);
 err1:
	spi_master_put(sp->bitbang.master);
 err0:
	return ret;
}

static int sh_sci_spi_remove(struct platform_device *dev)
{
	struct sh_sci_spi *sp = platform_get_drvdata(dev);

	iounmap(sp->membase);
	setbits(sp, PIN_INIT, 0);
	spi_bitbang_stop(&sp->bitbang);
	spi_master_put(sp->bitbang.master);
	return 0;
}

static struct platform_driver sh_sci_spi_drv = {
	.probe		= sh_sci_spi_probe,
	.remove		= sh_sci_spi_remove,
	.driver		= {
		.name	= "spi_sh_sci",
		.owner	= THIS_MODULE,
	},
};
module_platform_driver(sh_sci_spi_drv);

MODULE_DESCRIPTION("SH SCI SPI Driver");
MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:spi_sh_sci");
Commit	Line	Data
37e46640 MD	1	/*
	2	* SH SCI SPI interface
	3	*
	4	* Copyright (c) 2008 Magnus Damm
	5	*
	6	* Based on S3C24XX GPIO based SPI driver, which is:
	7	* Copyright (c) 2006 Ben Dooks
	8	* Copyright (c) 2006 Simtec Electronics
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	*/
	15
	16	#include <linux/kernel.h>
37e46640 MD	17	#include <linux/delay.h>
	18	#include <linux/spinlock.h>
	19	#include <linux/workqueue.h>
	20	#include <linux/platform_device.h>
	21
	22	#include <linux/spi/spi.h>
	23	#include <linux/spi/spi_bitbang.h>
d7614de4	24	#include <linux/module.h>
37e46640 MD	25
	26	#include <asm/spi.h>
	27	#include <asm/io.h>
	28
	29	struct sh_sci_spi {
	30	struct spi_bitbang bitbang;
	31
	32	void __iomem *membase;
	33	unsigned char val;
	34	struct sh_spi_info *info;
	35	struct platform_device *dev;
	36	};
	37
	38	#define SCSPTR(sp) (sp->membase + 0x1c)
	39	#define PIN_SCK (1 << 2)
	40	#define PIN_TXD (1 << 0)
	41	#define PIN_RXD PIN_TXD
	42	#define PIN_INIT ((1 << 1) \| (1 << 3) \| PIN_SCK \| PIN_TXD)
	43
	44	static inline void setbits(struct sh_sci_spi *sp, int bits, int on)
	45	{
	46	/*
	47	* We are the only user of SCSPTR so no locking is required.
	48	* Reading bit 2 and 0 in SCSPTR gives pin state as input.
	49	* Writing the same bits sets the output value.
	50	* This makes regular read-modify-write difficult so we
	51	* use sp->val to keep track of the latest register value.
	52	*/
	53
	54	if (on)
	55	sp->val \|= bits;
	56	else
	57	sp->val &= ~bits;
	58
	59	iowrite8(sp->val, SCSPTR(sp));
	60	}
	61
	62	static inline void setsck(struct spi_device *dev, int on)
	63	{
	64	setbits(spi_master_get_devdata(dev->master), PIN_SCK, on);
	65	}
	66
	67	static inline void setmosi(struct spi_device *dev, int on)
	68	{
	69	setbits(spi_master_get_devdata(dev->master), PIN_TXD, on);
	70	}
	71
	72	static inline u32 getmiso(struct spi_device *dev)
	73	{
	74	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
	75
	76	return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0;
	77	}
	78
	79	#define spidelay(x) ndelay(x)
	80
ca632f55	81	#include "spi-bitbang-txrx.h"
37e46640 MD	82
	83	static u32 sh_sci_spi_txrx_mode0(struct spi_device *spi,
	84	unsigned nsecs, u32 word, u8 bits)
	85	{
04bb2a03	86	return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
37e46640 MD	87	}
	88
	89	static u32 sh_sci_spi_txrx_mode1(struct spi_device *spi,
	90	unsigned nsecs, u32 word, u8 bits)
	91	{
04bb2a03	92	return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
37e46640 MD	93	}
	94
	95	static u32 sh_sci_spi_txrx_mode2(struct spi_device *spi,
	96	unsigned nsecs, u32 word, u8 bits)
	97	{
04bb2a03	98	return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
37e46640 MD	99	}
	100
	101	static u32 sh_sci_spi_txrx_mode3(struct spi_device *spi,
	102	unsigned nsecs, u32 word, u8 bits)
	103	{
04bb2a03	104	return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
37e46640 MD	105	}
	106
	107	static void sh_sci_spi_chipselect(struct spi_device *dev, int value)
	108	{
	109	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
	110
ed8eb250	111	if (sp->info->chip_select)
37e46640 MD	112	(sp->info->chip_select)(sp->info, dev->chip_select, value);
	113	}
	114
	115	static int sh_sci_spi_probe(struct platform_device *dev)
	116	{
	117	struct resource *r;
	118	struct spi_master *master;
	119	struct sh_sci_spi *sp;
	120	int ret;
	121
	122	master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi));
	123	if (master == NULL) {
	124	dev_err(&dev->dev, "failed to allocate spi master\n");
	125	ret = -ENOMEM;
	126	goto err0;
	127	}
	128
	129	sp = spi_master_get_devdata(master);
	130
	131	platform_set_drvdata(dev, sp);
8074cf06	132	sp->info = dev_get_platdata(&dev->dev);
ed8eb250 AL	133	if (!sp->info) {
	134	dev_err(&dev->dev, "platform data is missing\n");
	135	ret = -ENOENT;
	136	goto err1;
	137	}
37e46640 MD	138
37e46640 MD	139	/* setup spi bitbang adaptor */
94c69f76	140	sp->bitbang.master = master;
37e46640 MD	141	sp->bitbang.master->bus_num = sp->info->bus_num;
	142	sp->bitbang.master->num_chipselect = sp->info->num_chipselect;
	143	sp->bitbang.chipselect = sh_sci_spi_chipselect;
	144
	145	sp->bitbang.txrx_word[SPI_MODE_0] = sh_sci_spi_txrx_mode0;
	146	sp->bitbang.txrx_word[SPI_MODE_1] = sh_sci_spi_txrx_mode1;
	147	sp->bitbang.txrx_word[SPI_MODE_2] = sh_sci_spi_txrx_mode2;
	148	sp->bitbang.txrx_word[SPI_MODE_3] = sh_sci_spi_txrx_mode3;
	149
	150	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
	151	if (r == NULL) {
	152	ret = -ENOENT;
	153	goto err1;
	154	}
76b6fdd3	155	sp->membase = ioremap(r->start, resource_size(r));
37e46640 MD	156	if (!sp->membase) {
	157	ret = -ENXIO;
	158	goto err1;
	159	}
	160	sp->val = ioread8(SCSPTR(sp));
	161	setbits(sp, PIN_INIT, 1);
	162
	163	ret = spi_bitbang_start(&sp->bitbang);
	164	if (!ret)
	165	return 0;
	166
	167	setbits(sp, PIN_INIT, 0);
	168	iounmap(sp->membase);
	169	err1:
	170	spi_master_put(sp->bitbang.master);
	171	err0:
	172	return ret;
	173	}
	174
	175	static int sh_sci_spi_remove(struct platform_device *dev)
	176	{
	177	struct sh_sci_spi *sp = platform_get_drvdata(dev);
	178
	179	iounmap(sp->membase);
	180	setbits(sp, PIN_INIT, 0);
	181	spi_bitbang_stop(&sp->bitbang);
	182	spi_master_put(sp->bitbang.master);
	183	return 0;
	184	}
	185
	186	static struct platform_driver sh_sci_spi_drv = {
	187	.probe = sh_sci_spi_probe,
	188	.remove = sh_sci_spi_remove,
	189	.driver = {
	190	.name = "spi_sh_sci",
	191	.owner = THIS_MODULE,
	192	},
	193	};
940ab889	194	module_platform_driver(sh_sci_spi_drv);
37e46640 MD	195
	196	MODULE_DESCRIPTION("SH SCI SPI Driver");
	197	MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
	198	MODULE_LICENSE("GPL");
7e38c3c4	199	MODULE_ALIAS("platform:spi_sh_sci");