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61e115a5 MB |
1 | #ifndef LINUX_SSB_PRIVATE_H_ |
2 | #define LINUX_SSB_PRIVATE_H_ | |
3 | ||
4 | #include <linux/ssb/ssb.h> | |
5 | #include <linux/types.h> | |
7ffbffe3 | 6 | #include <linux/bcm47xx_wdt.h> |
61e115a5 MB |
7 | |
8 | ||
9 | #define PFX "ssb: " | |
10 | ||
11 | #ifdef CONFIG_SSB_SILENT | |
33a606ac JP |
12 | # define ssb_printk(fmt, ...) \ |
13 | do { if (0) printk(fmt, ##__VA_ARGS__); } while (0) | |
61e115a5 | 14 | #else |
33a606ac JP |
15 | # define ssb_printk(fmt, ...) \ |
16 | printk(fmt, ##__VA_ARGS__) | |
61e115a5 MB |
17 | #endif /* CONFIG_SSB_SILENT */ |
18 | ||
33a606ac JP |
19 | #define ssb_emerg(fmt, ...) ssb_printk(KERN_EMERG PFX fmt, ##__VA_ARGS__) |
20 | #define ssb_err(fmt, ...) ssb_printk(KERN_ERR PFX fmt, ##__VA_ARGS__) | |
21 | #define ssb_warn(fmt, ...) ssb_printk(KERN_WARNING PFX fmt, ##__VA_ARGS__) | |
22 | #define ssb_notice(fmt, ...) ssb_printk(KERN_NOTICE PFX fmt, ##__VA_ARGS__) | |
23 | #define ssb_info(fmt, ...) ssb_printk(KERN_INFO PFX fmt, ##__VA_ARGS__) | |
24 | #define ssb_cont(fmt, ...) ssb_printk(KERN_CONT fmt, ##__VA_ARGS__) | |
25 | ||
61e115a5 MB |
26 | /* dprintk: Debugging printk; vanishes for non-debug compilation */ |
27 | #ifdef CONFIG_SSB_DEBUG | |
33a606ac JP |
28 | # define ssb_dbg(fmt, ...) \ |
29 | ssb_printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__) | |
61e115a5 | 30 | #else |
33a606ac JP |
31 | # define ssb_dbg(fmt, ...) \ |
32 | do { if (0) printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__); } while (0) | |
61e115a5 MB |
33 | #endif |
34 | ||
35 | #ifdef CONFIG_SSB_DEBUG | |
36 | # define SSB_WARN_ON(x) WARN_ON(x) | |
37 | # define SSB_BUG_ON(x) BUG_ON(x) | |
38 | #else | |
39 | static inline int __ssb_do_nothing(int x) { return x; } | |
40 | # define SSB_WARN_ON(x) __ssb_do_nothing(unlikely(!!(x))) | |
41 | # define SSB_BUG_ON(x) __ssb_do_nothing(unlikely(!!(x))) | |
42 | #endif | |
43 | ||
44 | ||
45 | /* pci.c */ | |
46 | #ifdef CONFIG_SSB_PCIHOST | |
47 | extern int ssb_pci_switch_core(struct ssb_bus *bus, | |
48 | struct ssb_device *dev); | |
49 | extern int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
50 | u8 coreidx); | |
51 | extern int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
52 | int turn_on); | |
53 | extern int ssb_pci_get_invariants(struct ssb_bus *bus, | |
54 | struct ssb_init_invariants *iv); | |
55 | extern void ssb_pci_exit(struct ssb_bus *bus); | |
56 | extern int ssb_pci_init(struct ssb_bus *bus); | |
57 | extern const struct ssb_bus_ops ssb_pci_ops; | |
58 | ||
59 | #else /* CONFIG_SSB_PCIHOST */ | |
60 | ||
61 | static inline int ssb_pci_switch_core(struct ssb_bus *bus, | |
62 | struct ssb_device *dev) | |
63 | { | |
64 | return 0; | |
65 | } | |
66 | static inline int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
67 | u8 coreidx) | |
68 | { | |
69 | return 0; | |
70 | } | |
71 | static inline int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
72 | int turn_on) | |
73 | { | |
74 | return 0; | |
75 | } | |
76 | static inline void ssb_pci_exit(struct ssb_bus *bus) | |
77 | { | |
78 | } | |
79 | static inline int ssb_pci_init(struct ssb_bus *bus) | |
80 | { | |
81 | return 0; | |
82 | } | |
83 | #endif /* CONFIG_SSB_PCIHOST */ | |
84 | ||
85 | ||
86 | /* pcmcia.c */ | |
87 | #ifdef CONFIG_SSB_PCMCIAHOST | |
61e115a5 MB |
88 | extern int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, |
89 | u8 coreidx); | |
90 | extern int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
91 | u8 seg); | |
92 | extern int ssb_pcmcia_get_invariants(struct ssb_bus *bus, | |
93 | struct ssb_init_invariants *iv); | |
8fe2b65a | 94 | extern int ssb_pcmcia_hardware_setup(struct ssb_bus *bus); |
e7ec2e32 | 95 | extern void ssb_pcmcia_exit(struct ssb_bus *bus); |
61e115a5 | 96 | extern int ssb_pcmcia_init(struct ssb_bus *bus); |
399500da RM |
97 | extern int ssb_host_pcmcia_init(void); |
98 | extern void ssb_host_pcmcia_exit(void); | |
61e115a5 MB |
99 | extern const struct ssb_bus_ops ssb_pcmcia_ops; |
100 | #else /* CONFIG_SSB_PCMCIAHOST */ | |
61e115a5 MB |
101 | static inline int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, |
102 | u8 coreidx) | |
103 | { | |
104 | return 0; | |
105 | } | |
106 | static inline int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
107 | u8 seg) | |
108 | { | |
109 | return 0; | |
110 | } | |
8fe2b65a MB |
111 | static inline int ssb_pcmcia_hardware_setup(struct ssb_bus *bus) |
112 | { | |
113 | return 0; | |
114 | } | |
e7ec2e32 MB |
115 | static inline void ssb_pcmcia_exit(struct ssb_bus *bus) |
116 | { | |
117 | } | |
61e115a5 MB |
118 | static inline int ssb_pcmcia_init(struct ssb_bus *bus) |
119 | { | |
120 | return 0; | |
121 | } | |
399500da RM |
122 | static inline int ssb_host_pcmcia_init(void) |
123 | { | |
124 | return 0; | |
125 | } | |
126 | static inline void ssb_host_pcmcia_exit(void) | |
127 | { | |
128 | } | |
61e115a5 MB |
129 | #endif /* CONFIG_SSB_PCMCIAHOST */ |
130 | ||
24ea602e AH |
131 | /* sdio.c */ |
132 | #ifdef CONFIG_SSB_SDIOHOST | |
133 | extern int ssb_sdio_get_invariants(struct ssb_bus *bus, | |
134 | struct ssb_init_invariants *iv); | |
135 | ||
136 | extern u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset); | |
24ea602e | 137 | extern int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx); |
24ea602e AH |
138 | extern void ssb_sdio_exit(struct ssb_bus *bus); |
139 | extern int ssb_sdio_init(struct ssb_bus *bus); | |
140 | ||
141 | extern const struct ssb_bus_ops ssb_sdio_ops; | |
142 | #else /* CONFIG_SSB_SDIOHOST */ | |
143 | static inline u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset) | |
144 | { | |
145 | return 0; | |
146 | } | |
24ea602e AH |
147 | static inline int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx) |
148 | { | |
149 | return 0; | |
150 | } | |
24ea602e AH |
151 | static inline void ssb_sdio_exit(struct ssb_bus *bus) |
152 | { | |
153 | } | |
154 | static inline int ssb_sdio_init(struct ssb_bus *bus) | |
155 | { | |
156 | return 0; | |
157 | } | |
158 | #endif /* CONFIG_SSB_SDIOHOST */ | |
159 | ||
830c7df4 RM |
160 | /************************************************** |
161 | * host_soc.c | |
162 | **************************************************/ | |
163 | ||
845da6e5 | 164 | #ifdef CONFIG_SSB_HOST_SOC |
830c7df4 | 165 | extern const struct ssb_bus_ops ssb_host_soc_ops; |
541c9a84 RM |
166 | |
167 | extern int ssb_host_soc_get_invariants(struct ssb_bus *bus, | |
168 | struct ssb_init_invariants *iv); | |
845da6e5 | 169 | #endif |
61e115a5 MB |
170 | |
171 | /* scan.c */ | |
172 | extern const char *ssb_core_name(u16 coreid); | |
173 | extern int ssb_bus_scan(struct ssb_bus *bus, | |
174 | unsigned long baseaddr); | |
175 | extern void ssb_iounmap(struct ssb_bus *ssb); | |
176 | ||
177 | ||
e7ec2e32 MB |
178 | /* sprom.c */ |
179 | extern | |
180 | ssize_t ssb_attr_sprom_show(struct ssb_bus *bus, char *buf, | |
181 | int (*sprom_read)(struct ssb_bus *bus, u16 *sprom)); | |
182 | extern | |
183 | ssize_t ssb_attr_sprom_store(struct ssb_bus *bus, | |
184 | const char *buf, size_t count, | |
185 | int (*sprom_check_crc)(const u16 *sprom, size_t size), | |
186 | int (*sprom_write)(struct ssb_bus *bus, const u16 *sprom)); | |
b3ae52b6 HM |
187 | extern int ssb_fill_sprom_with_fallback(struct ssb_bus *bus, |
188 | struct ssb_sprom *out); | |
e7ec2e32 MB |
189 | |
190 | ||
61e115a5 MB |
191 | /* core.c */ |
192 | extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m); | |
61e115a5 | 193 | extern struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev); |
aab547ce MB |
194 | int ssb_for_each_bus_call(unsigned long data, |
195 | int (*func)(struct ssb_bus *bus, unsigned long data)); | |
e7ec2e32 MB |
196 | extern struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev); |
197 | ||
3ba6018a MB |
198 | struct ssb_freeze_context { |
199 | /* Pointer to the bus */ | |
200 | struct ssb_bus *bus; | |
201 | /* Boolean list to indicate whether a device is frozen on this bus. */ | |
202 | bool device_frozen[SSB_MAX_NR_CORES]; | |
203 | }; | |
204 | extern int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx); | |
205 | extern int ssb_devices_thaw(struct ssb_freeze_context *ctx); | |
206 | ||
207 | ||
61e115a5 MB |
208 | |
209 | /* b43_pci_bridge.c */ | |
c7084535 | 210 | #ifdef CONFIG_SSB_B43_PCI_BRIDGE |
61e115a5 MB |
211 | extern int __init b43_pci_ssb_bridge_init(void); |
212 | extern void __exit b43_pci_ssb_bridge_exit(void); | |
0052b8bb | 213 | #else /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 MB |
214 | static inline int b43_pci_ssb_bridge_init(void) |
215 | { | |
216 | return 0; | |
217 | } | |
218 | static inline void b43_pci_ssb_bridge_exit(void) | |
219 | { | |
220 | } | |
0052b8bb | 221 | #endif /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 | 222 | |
d486a5b4 HM |
223 | /* driver_chipcommon_pmu.c */ |
224 | extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc); | |
225 | extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc); | |
f924e1e9 | 226 | extern u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc); |
d486a5b4 | 227 | |
7ffbffe3 HM |
228 | extern u32 ssb_chipco_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, |
229 | u32 ticks); | |
230 | extern u32 ssb_chipco_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); | |
231 | ||
72a525cb RM |
232 | /* driver_chipcommon_sflash.c */ |
233 | #ifdef CONFIG_SSB_SFLASH | |
234 | int ssb_sflash_init(struct ssb_chipcommon *cc); | |
235 | #else | |
236 | static inline int ssb_sflash_init(struct ssb_chipcommon *cc) | |
237 | { | |
238 | pr_err("Serial flash not supported\n"); | |
239 | return 0; | |
240 | } | |
241 | #endif /* CONFIG_SSB_SFLASH */ | |
242 | ||
c7a4a9e3 RM |
243 | #ifdef CONFIG_SSB_DRIVER_MIPS |
244 | extern struct platform_device ssb_pflash_dev; | |
245 | #endif | |
246 | ||
7b5d6043 RM |
247 | #ifdef CONFIG_SSB_SFLASH |
248 | extern struct platform_device ssb_sflash_dev; | |
249 | #endif | |
250 | ||
9f640a63 HM |
251 | #ifdef CONFIG_SSB_DRIVER_EXTIF |
252 | extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks); | |
253 | extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); | |
254 | #else | |
255 | static inline u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, | |
256 | u32 ticks) | |
257 | { | |
258 | return 0; | |
259 | } | |
260 | static inline u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, | |
261 | u32 ms) | |
262 | { | |
263 | return 0; | |
264 | } | |
265 | #endif | |
bde327ef HM |
266 | |
267 | #ifdef CONFIG_SSB_EMBEDDED | |
268 | extern int ssb_watchdog_register(struct ssb_bus *bus); | |
269 | #else /* CONFIG_SSB_EMBEDDED */ | |
270 | static inline int ssb_watchdog_register(struct ssb_bus *bus) | |
271 | { | |
272 | return 0; | |
273 | } | |
274 | #endif /* CONFIG_SSB_EMBEDDED */ | |
275 | ||
394bc7e3 HM |
276 | #ifdef CONFIG_SSB_DRIVER_EXTIF |
277 | extern void ssb_extif_init(struct ssb_extif *extif); | |
278 | #else | |
279 | static inline void ssb_extif_init(struct ssb_extif *extif) | |
280 | { | |
281 | } | |
282 | #endif | |
283 | ||
ec43b08b HM |
284 | #ifdef CONFIG_SSB_DRIVER_GPIO |
285 | extern int ssb_gpio_init(struct ssb_bus *bus); | |
600485ed | 286 | extern int ssb_gpio_unregister(struct ssb_bus *bus); |
ec43b08b HM |
287 | #else /* CONFIG_SSB_DRIVER_GPIO */ |
288 | static inline int ssb_gpio_init(struct ssb_bus *bus) | |
289 | { | |
290 | return -ENOTSUPP; | |
291 | } | |
600485ed HM |
292 | static inline int ssb_gpio_unregister(struct ssb_bus *bus) |
293 | { | |
294 | return 0; | |
295 | } | |
ec43b08b HM |
296 | #endif /* CONFIG_SSB_DRIVER_GPIO */ |
297 | ||
61e115a5 | 298 | #endif /* LINUX_SSB_PRIVATE_H_ */ |