staging: bcm : Fix typo in staging/bcm
[deliverable/linux.git] / drivers / staging / bcm / Adapter.h
CommitLineData
f8942e07
SH
1/***********************************
2* Adapter.h
3************************************/
4#ifndef __ADAPTER_H__
5#define __ADAPTER_H__
6
7#define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
8#include "Debug.h"
9
ff352042 10struct bcm_leader {
90942140
KM
11 USHORT Vcid;
12 USHORT PLength;
13 UCHAR Status;
f8942e07 14 UCHAR Unused[3];
e1325ad1 15} __packed;
f8942e07 16
a869993f 17struct bcm_packettosend {
ff352042 18 struct bcm_leader Leader;
f8942e07 19 UCHAR ucPayload;
e1325ad1 20} __packed;
f8942e07 21
c1975eda 22struct bcm_control_packet {
f8942e07
SH
23 PVOID ControlBuff;
24 UINT ControlBuffLen;
c1975eda 25 struct bcm_control_packet *next;
e1325ad1 26} __packed;
f8942e07 27
2610c7a8 28struct bcm_link_request {
ff352042 29 struct bcm_leader Leader;
f8942e07 30 UCHAR szData[4];
e1325ad1 31} __packed;
f8942e07 32
f8942e07
SH
33#define MAX_IP_RANGE_LENGTH 4
34#define MAX_PORT_RANGE 4
35#define MAX_PROTOCOL_LENGTH 32
36#define IPV6_ADDRESS_SIZEINBYTES 0x10
37
d5a49967 38union u_ip_address {
90942140 39 struct {
5db647a3
KM
40 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH]; /* Source Ip Address Range */
41 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH]; /* Source Ip Mask Address Range */
f8942e07 42 };
c71e0a60 43 struct {
5db647a3
KM
44 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Address Range */
45 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Mask Address Range */
f8942e07 46 };
c71e0a60 47 struct {
90942140
KM
48 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
49 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
f8942e07 50 };
c71e0a60 51 struct {
90942140
KM
52 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
53 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
f8942e07 54 };
d5a49967 55};
f8942e07 56
b38e274f
PM
57struct bcm_hdr_suppression_contextinfo {
58 UCHAR ucaHdrSuppressionInBuf[MAX_PHS_LENGTHS]; /* Intermediate buffer to accumulate pkt Header for PHS */
59 UCHAR ucaHdrSuppressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; /* Intermediate buffer containing pkt Header after PHS */
f428450a 60};
f8942e07 61
92562aee 62struct bcm_classifier_rule {
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KM
63 ULONG ulSFID;
64 UCHAR ucReserved[2];
65 B_UINT16 uiClassifierRuleIndex;
3abd6f11 66 bool bUsed;
90942140 67 USHORT usVCID_Value;
5db647a3 68 B_UINT8 u8ClassifierRulePriority; /* This field detemines the Classifier Priority */
d5a49967 69 union u_ip_address stSrcIpAddress;
5db647a3 70 UCHAR ucIPSourceAddressLength; /* Ip Source Address Length */
f8942e07 71
d5a49967 72 union u_ip_address stDestIpAddress;
5db647a3
KM
73 UCHAR ucIPDestinationAddressLength; /* Ip Destination Address Length */
74 UCHAR ucIPTypeOfServiceLength; /* Type of service Length */
75 UCHAR ucTosLow; /* Tos Low */
76 UCHAR ucTosHigh; /* Tos High */
77 UCHAR ucTosMask; /* Tos Mask */
78
79 UCHAR ucProtocolLength; /* protocol Length */
80 UCHAR ucProtocol[MAX_PROTOCOL_LENGTH]; /* protocol Length */
90942140
KM
81 USHORT usSrcPortRangeLo[MAX_PORT_RANGE];
82 USHORT usSrcPortRangeHi[MAX_PORT_RANGE];
83 UCHAR ucSrcPortRangeLength;
f8942e07 84
90942140
KM
85 USHORT usDestPortRangeLo[MAX_PORT_RANGE];
86 USHORT usDestPortRangeHi[MAX_PORT_RANGE];
87 UCHAR ucDestPortRangeLength;
88
3abd6f11
LN
89 bool bProtocolValid;
90 bool bTOSValid;
91 bool bDestIpValid;
92 bool bSrcIpValid;
f8942e07 93
5db647a3 94 /* For IPv6 Addressing */
90942140 95 UCHAR ucDirection;
3abd6f11 96 bool bIpv6Protocol;
90942140 97 UINT32 u32PHSRuleID;
a903d650 98 struct bcm_phs_rule sPhsRule;
90942140 99 UCHAR u8AssociatedPHSI;
f8942e07 100
5db647a3 101 /* Classification fields for ETH CS */
f8942e07
SH
102 UCHAR ucEthCSSrcMACLen;
103 UCHAR au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
104 UCHAR au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
105 UCHAR ucEthCSDestMACLen;
106 UCHAR au8EThCSDestMAC[MAC_ADDRESS_SIZE];
107 UCHAR au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
108 UCHAR ucEtherTypeLen;
109 UCHAR au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
110 UCHAR usUserPriority[2];
111 USHORT usVLANID;
112 USHORT usValidityBitMap;
92562aee 113};
f8942e07 114
7f22485d 115struct bcm_fragmented_packet_info {
3abd6f11 116 bool bUsed;
90942140
KM
117 ULONG ulSrcIpAddress;
118 USHORT usIpIdentification;
92562aee 119 struct bcm_classifier_rule *pstMatchedClassifierEntry;
3abd6f11 120 bool bOutOfOrderFragment;
7f22485d 121};
f8942e07 122
0b3edf76 123struct bcm_packet_info {
5db647a3 124 /* classification extension Rule */
90942140
KM
125 ULONG ulSFID;
126 USHORT usVCID_Value;
127 UINT uiThreshold;
5db647a3 128 /* This field determines the priority of the SF Queues */
90942140
KM
129 B_UINT8 u8TrafficPriority;
130
3abd6f11
LN
131 bool bValid;
132 bool bActive;
133 bool bActivateRequestSent;
90942140 134
5db647a3 135 B_UINT8 u8QueueType; /* BE or rtPS */
90942140 136
5db647a3 137 UINT uiMaxBucketSize; /* maximum size of the bucket for the queue */
90942140
KM
138 UINT uiCurrentQueueDepthOnTarget;
139 UINT uiCurrentBytesOnHost;
140 UINT uiCurrentPacketsOnHost;
141 UINT uiDroppedCountBytes;
142 UINT uiDroppedCountPackets;
143 UINT uiSentBytes;
144 UINT uiSentPackets;
145 UINT uiCurrentDrainRate;
146 UINT uiThisPeriodSentBytes;
f8942e07 147 LARGE_INTEGER liDrainCalculated;
90942140
KM
148 UINT uiCurrentTokenCount;
149 LARGE_INTEGER liLastUpdateTokenAt;
150 UINT uiMaxAllowedRate;
151 UINT NumOfPacketsSent;
152 UCHAR ucDirection;
153 USHORT usCID;
8c7d51a3 154 struct bcm_mibs_parameters stMibsExtServiceFlowTable;
90942140
KM
155 UINT uiCurrentRxRate;
156 UINT uiThisPeriodRxBytes;
157 UINT uiTotalRxBytes;
158 UINT uiTotalTxBytes;
159 UINT uiPendedLast;
160 UCHAR ucIpVersion;
f8942e07 161
c71e0a60
KM
162 union {
163 struct {
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KM
164 struct sk_buff *FirstTxQueue;
165 struct sk_buff *LastTxQueue;
f8942e07 166 };
c71e0a60 167 struct {
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KM
168 struct sk_buff *ControlHead;
169 struct sk_buff *ControlTail;
f8942e07
SH
170 };
171 };
90942140 172
3abd6f11
LN
173 bool bProtocolValid;
174 bool bTOSValid;
175 bool bDestIpValid;
176 bool bSrcIpValid;
f8942e07 177
3abd6f11
LN
178 bool bActiveSet;
179 bool bAdmittedSet;
180 bool bAuthorizedSet;
181 bool bClassifierPriority;
f8942e07 182 UCHAR ucServiceClassName[MAX_CLASS_NAME_LENGTH];
3abd6f11 183 bool bHeaderSuppressionEnabled;
f8942e07 184 spinlock_t SFQueueLock;
90942140 185 void *pstSFIndication;
f8942e07 186 struct timeval stLastUpdateTokenAt;
90942140 187 atomic_t uiPerSFTxResourceCount;
f8942e07 188 UINT uiMaxLatency;
90942140
KM
189 UCHAR bIPCSSupport;
190 UCHAR bEthCSSupport;
f8942e07 191};
f8942e07 192
774bea83
KM
193struct bcm_tarang_data {
194 struct bcm_tarang_data *next;
2979460d 195 struct bcm_mini_adapter *Adapter;
90942140
KM
196 struct sk_buff *RxAppControlHead;
197 struct sk_buff *RxAppControlTail;
26cd230f 198 int AppCtrlQueueLen;
3abd6f11
LN
199 bool MacTracingEnabled;
200 bool bApplicationToExit;
2790a3cc 201 struct bcm_mibs_dropped_cntrl_msg stDroppedAppCntrlMsgs;
90942140 202 ULONG RxCntrlMsgBitMask;
774bea83 203};
f8942e07 204
37531643 205struct bcm_targetdsx_buffer {
90942140
KM
206 ULONG ulTargetDsxBuffer;
207 B_UINT16 tid;
3abd6f11 208 bool valid;
37531643 209};
f8942e07 210
2979460d 211typedef int (*FP_FLASH_WRITE)(struct bcm_mini_adapter *, UINT, PVOID);
f8942e07 212
2979460d 213typedef int (*FP_FLASH_WRITE_STATUS)(struct bcm_mini_adapter *, UINT, PVOID);
f8942e07 214
5db647a3
KM
215/*
216 * Driver adapter data structure
217 */
2979460d
KM
218struct bcm_mini_adapter {
219 struct bcm_mini_adapter *next;
4fd64dd0
SH
220 struct net_device *dev;
221 u32 msg_enable;
90942140 222 CHAR *caDsxReqResp;
3349d95b 223 atomic_t ApplicationRunning;
3abd6f11 224 bool AppCtrlQueueOverFlow;
3349d95b 225 atomic_t CurrentApplicationCount;
90942140 226 atomic_t RegisteredApplicationCount;
3abd6f11
LN
227 bool LinkUpStatus;
228 bool TimerActive;
3349d95b 229 u32 StatisticsPointer;
f8942e07
SH
230 struct sk_buff *RxControlHead;
231 struct sk_buff *RxControlTail;
f8942e07
SH
232 struct semaphore RxAppControlQueuelock;
233 struct semaphore fw_download_sema;
774bea83 234 struct bcm_tarang_data *pTarangs;
90942140 235 spinlock_t control_queue_lock;
f8942e07 236 wait_queue_head_t process_read_wait_queue;
f8942e07 237
5db647a3
KM
238 /* the pointer to the first packet we have queued in send
239 * deserialized miniport support variables
240 */
90942140
KM
241 atomic_t TotalPacketCount;
242 atomic_t TxPktAvail;
f8942e07 243
5db647a3 244 /* this to keep track of the Tx and Rx MailBox Registers. */
90942140 245 atomic_t CurrNumFreeTxDesc;
5db647a3 246 /* to keep track the no of byte received */
90942140
KM
247 USHORT PrevNumRecvDescs;
248 USHORT CurrNumRecvDescs;
249 UINT u32TotalDSD;
0b3edf76 250 struct bcm_packet_info PackInfo[NO_OF_QUEUES];
92562aee 251 struct bcm_classifier_rule astClassifierTable[MAX_CLASSIFIERS];
3abd6f11 252 bool TransferMode;
f8942e07
SH
253
254 /*************** qos ******************/
3abd6f11 255 bool bETHCSEnabled;
90942140
KM
256 ULONG BEBucketSize;
257 ULONG rtPSBucketSize;
258 UCHAR LinkStatus;
3abd6f11
LN
259 bool AutoLinkUp;
260 bool AutoSyncup;
90942140
KM
261
262 int major;
263 int minor;
264 wait_queue_head_t tx_packet_wait_queue;
265 wait_queue_head_t process_rx_cntrlpkt;
266 atomic_t process_waiting;
3abd6f11 267 bool fw_download_done;
90942140
KM
268
269 char *txctlpacket[MAX_CNTRL_PKTS];
923fb2ae 270 atomic_t cntrlpktCnt;
90942140
KM
271 atomic_t index_app_read_cntrlpkt;
272 atomic_t index_wr_txcntrlpkt;
273 atomic_t index_rd_txcntrlpkt;
274 UINT index_datpkt;
275 struct semaphore rdmwrmsync;
f8942e07 276
37531643 277 struct bcm_targetdsx_buffer astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
3349d95b 278 ULONG ulFreeTargetBufferCnt;
90942140
KM
279 ULONG ulCurrentTargetBuffer;
280 ULONG ulTotalTargetBuffersAvailable;
281 unsigned long chip_id;
282 wait_queue_head_t lowpower_mode_wait_queue;
3abd6f11
LN
283 bool bFlashBoot;
284 bool bBinDownloaded;
285 bool bCfgDownloaded;
286 bool bSyncUpRequestSent;
3349d95b 287 USHORT usBestEffortQueueIndex;
90942140 288 wait_queue_head_t ioctl_fw_dnld_wait_queue;
3abd6f11 289 bool waiting_to_fw_download_done;
90942140 290 pid_t fw_download_process_pid;
c8182334 291 struct bcm_target_params *pstargetparams;
3abd6f11
LN
292 bool device_removed;
293 bool DeviceAccess;
294 bool bIsAutoCorrectEnabled;
295 bool bDDRInitDone;
d426205d 296 int DDRSetting;
90942140
KM
297 ULONG ulPowerSaveMode;
298 spinlock_t txtransmitlock;
299 B_UINT8 txtransmit_running;
f8942e07 300 /* Thread for control packet handling */
90942140 301 struct task_struct *control_packet_handler;
f8942e07 302 /* thread for transmitting packets. */
90942140 303 struct task_struct *transmit_packet_thread;
f8942e07
SH
304
305 /* LED Related Structures */
684fb7e6 306 struct bcm_led_info LEDInfo;
f8942e07
SH
307
308 /* Driver State for LED Blinking */
b3d9a8f7 309 enum bcm_led_events DriverState;
f8942e07 310 /* Interface Specific */
90942140
KM
311 PVOID pvInterfaceAdapter;
312 int (*bcm_file_download)(PVOID,
313 struct file *,
314 unsigned int);
315 int (*bcm_file_readback_from_chip)(PVOID,
316 struct file *,
317 unsigned int);
d426205d 318 int (*interface_rdm)(PVOID,
90942140
KM
319 UINT,
320 PVOID,
d426205d
KM
321 int);
322 int (*interface_wrm)(PVOID,
90942140
KM
323 UINT,
324 PVOID,
d426205d 325 int);
f8942e07 326 int (*interface_transmit)(PVOID, PVOID , UINT);
3abd6f11
LN
327 bool IdleMode;
328 bool bDregRequestSentInIdleMode;
329 bool bTriedToWakeUpFromlowPowerMode;
330 bool bShutStatus;
331 bool bWakeUpDevice;
90942140 332 unsigned int usIdleModePattern;
5db647a3 333 /* BOOLEAN bTriedToWakeUpFromShutdown; */
3abd6f11 334 bool bLinkDownRequested;
90942140 335 int downloadDDR;
60dadf9d 336 struct bcm_phs_extension stBCMPhsContext;
b38e274f 337 struct bcm_hdr_suppression_contextinfo stPhsTxContextInfo;
f8942e07
SH
338 uint8_t ucaPHSPktRestoreBuf[2048];
339 uint8_t bPHSEnabled;
3abd6f11
LN
340 bool AutoFirmDld;
341 bool bMipsConfig;
342 bool bDPLLConfig;
f8942e07
SH
343 UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
344 UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
7f22485d 345 struct bcm_fragmented_packet_info astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
f8942e07
SH
346 atomic_t uiMBupdate;
347 UINT32 PmuMode;
af72c617 348 enum bcm_nvm_type eNVMType;
f8942e07
SH
349 UINT uiSectorSize;
350 UINT uiSectorSizeInCFG;
3abd6f11
LN
351 bool bSectorSizeOverride;
352 bool bStatusWrite;
f8942e07
SH
353 UINT uiNVMDSDSize;
354 UINT uiVendorExtnFlag;
5db647a3
KM
355 /* it will always represent chosen DSD at any point of time.
356 * Generally it is Active DSD but in case of NVM RD/WR it might be different.
357 */
f8942e07 358 UINT ulFlashCalStart;
90942140
KM
359 ULONG ulFlashControlSectionStart;
360 ULONG ulFlashWriteSize;
361 ULONG ulFlashID;
362 FP_FLASH_WRITE fpFlashWrite;
363 FP_FLASH_WRITE_STATUS fpFlashWriteWithStatusCheck;
f8942e07
SH
364
365 struct semaphore NVMRdmWrmLock;
90942140 366 struct device *pstCreatedClassDevice;
3705a843 367
5db647a3 368 /* BOOLEAN InterfaceUpStatus; */
08391731 369 struct bcm_flash2x_cs_info *psFlash2xCSInfo;
168b1400 370 struct bcm_flash_cs_info *psFlashCSInfo;
2fe119fd 371 struct bcm_flash2x_vendor_info *psFlash2xVendorInfo;
5db647a3
KM
372 UINT uiFlashBaseAdd; /* Flash start address */
373 UINT uiActiveISOOffset; /* Active ISO offset chosen before f/w download */
ff4e065d
KM
374 enum bcm_flash2x_section_val eActiveISO; /* Active ISO section val */
375 enum bcm_flash2x_section_val eActiveDSD; /* Active DSD val chosen before f/w download */
5db647a3 376 UINT uiActiveDSDOffsetAtFwDld; /* For accessing Active DSD chosen before f/w download */
90942140
KM
377 UINT uiFlashLayoutMajorVersion;
378 UINT uiFlashLayoutMinorVersion;
3abd6f11
LN
379 bool bAllDSDWriteAllow;
380 bool bSigCorrupted;
276d30ea 381 /* this should be set who so ever want to change the Headers. after Write it should be reset immediately. */
3abd6f11 382 bool bHeaderChangeAllowed;
d426205d 383 int SelectedChip;
3abd6f11 384 bool bEndPointHalted;
5db647a3 385 /* while bFlashRawRead will be true, Driver ignore map lay out and consider flash as of without any map. */
3abd6f11
LN
386 bool bFlashRawRead;
387 bool bPreparingForLowPowerMode;
388 bool bDoSuspend;
90942140 389 UINT syscfgBefFwDld;
3abd6f11 390 bool StopAllXaction;
5db647a3 391 UINT32 liTimeSinceLastNetEntry; /* Used to Support extended CAPI requirements from */
f8942e07 392 struct semaphore LowPowerModeSync;
90942140
KM
393 ULONG liDrainCalculated;
394 UINT gpioBitMap;
4b388a9e 395 struct bcm_debug_state stDebugState;
f8942e07 396};
f8942e07 397
90942140 398#define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
f8942e07 399
406a5082 400struct bcm_eth_header {
90942140
KM
401 UCHAR au8DestinationAddress[6];
402 UCHAR au8SourceAddress[6];
403 USHORT u16Etype;
e1325ad1 404} __packed;
f8942e07 405
7a27a2cc 406struct bcm_firmware_info {
90942140
KM
407 void __user *pvMappedFirmwareAddress;
408 ULONG u32FirmwareLength;
409 ULONG u32StartingAddress;
7a27a2cc 410} __packed;
f8942e07 411
5db647a3 412/* holds the value of net_device structure.. */
f8942e07 413extern struct net_device *gblpnetdev;
7905c788 414
be309995 415struct bcm_ddr_setting {
b706113f
AS
416 UINT ulRegAddress;
417 UINT ulRegValue;
be309995 418};
2979460d 419int InitAdapter(struct bcm_mini_adapter *psAdapter);
f8942e07 420
5db647a3
KM
421/* =====================================================================
422 * Beceem vendor request codes for EP0
423 * =====================================================================
424 */
f8942e07 425
90942140
KM
426#define BCM_REQUEST_READ 0x2
427#define BCM_REQUEST_WRITE 0x1
428#define EP2_MPS_REG 0x0F0110A0
429#define EP2_MPS 0x40
f8942e07 430
90942140
KM
431#define EP2_CFG_REG 0x0F0110A8
432#define EP2_CFG_INT 0x27
433#define EP2_CFG_BULK 0x25
f8942e07 434
90942140
KM
435#define EP4_MPS_REG 0x0F0110F0
436#define EP4_MPS 0x8C
f8942e07 437
90942140 438#define EP4_CFG_REG 0x0F0110F8
f8942e07 439
90942140
KM
440#define ISO_MPS_REG 0x0F0110C8
441#define ISO_MPS 0x00000000
f8942e07
SH
442
443#define EP1 0
444#define EP2 1
445#define EP3 2
446#define EP4 3
447#define EP5 4
448#define EP6 5
449
76cc6f92 450enum bcm_einterface_setting {
f8942e07
SH
451 DEFAULT_SETTING_0 = 0,
452 ALTERNATE_SETTING_1 = 1,
76cc6f92 453};
f8942e07 454
5db647a3 455#endif /* __ADAPTER_H__ */
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