projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
staging: brcm80211: replaced wlc_ by brcms_c_, part 2
[deliverable/linux.git] / drivers / staging / brcm80211 / brcmsmac / bmac.h
CommitLineData
a9533e7e
HP		 1/*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
f8557965
RV		 16#ifndef _BRCM_BOTTOM_MAC_H_
17#define _BRCM_BOTTOM_MAC_H_
a9533e7e 18
3bec7bb9
RV		 19#include <brcmu_wifi.h>
20#include "types.h"
21
fe741e5e 22/* dup state between BMAC(struct brcms_c_hw_info) and HIGH(struct brcms_c_info)
e304151f 23 driver */
c654fce6 24struct brcms_b_state {
66cbd3ab
GKH		 25 u32 machwcap; /* mac hw capibility */
26 u32 preamble_ovr; /* preamble override */
939e1ef5 27};
a9533e7e
HP		 28
29enum {
30 IOV_BMAC_DIAG,
31 IOV_BMAC_SBGPIOTIMERVAL,
32 IOV_BMAC_SBGPIOOUT,
33 IOV_BMAC_CCGPIOCTRL, /* CC GPIOCTRL REG */
34 IOV_BMAC_CCGPIOOUT, /* CC GPIOOUT REG */
35 IOV_BMAC_CCGPIOOUTEN, /* CC GPIOOUTEN REG */
36 IOV_BMAC_CCGPIOIN, /* CC GPIOIN REG */
37 IOV_BMAC_WPSGPIO, /* WPS push button GPIO pin */
38 IOV_BMAC_OTPDUMP,
39 IOV_BMAC_OTPSTAT,
40 IOV_BMAC_PCIEASPM, /* obfuscation clkreq/aspm control */
41 IOV_BMAC_PCIEADVCORRMASK, /* advanced correctable error mask */
42 IOV_BMAC_PCIECLKREQ, /* PCIE 1.1 clockreq enab support */
43 IOV_BMAC_PCIELCREG, /* PCIE LCREG */
44 IOV_BMAC_SBGPIOTIMERMASK,
45 IOV_BMAC_RFDISABLEDLY,
46 IOV_BMAC_PCIEREG, /* PCIE REG */
47 IOV_BMAC_PCICFGREG, /* PCI Config register */
48 IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */
49 IOV_BMAC_PCIEGPIOOUT, /* PCIEOUT REG */
50 IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */
51 IOV_BMAC_PCIECLKREQENCTRL, /* clkreqenctrl REG (PCIE REV > 6.0 */
52 IOV_BMAC_DMALPBK,
53 IOV_BMAC_CCREG,
54 IOV_BMAC_COREREG,
55 IOV_BMAC_SDCIS,
56 IOV_BMAC_SDIO_DRIVE,
57 IOV_BMAC_OTPW,
58 IOV_BMAC_NVOTPW,
59 IOV_BMAC_SROM,
60 IOV_BMAC_SRCRC,
61 IOV_BMAC_CIS_SOURCE,
62 IOV_BMAC_CISVAR,
63 IOV_BMAC_OTPLOCK,
64 IOV_BMAC_OTP_CHIPID,
65 IOV_BMAC_CUSTOMVAR1,
66 IOV_BMAC_BOARDFLAGS,
67 IOV_BMAC_BOARDFLAGS2,
68 IOV_BMAC_WPSLED,
69 IOV_BMAC_NVRAM_SOURCE,
70 IOV_BMAC_OTP_RAW_READ,
71 IOV_BMAC_LAST
72};
73
fe741e5e 74extern int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
810acd19
AS		 75 uint unit, bool piomode, void *regsva, uint bustype,
76 void *btparam);
fe741e5e 77extern int brcms_b_detach(struct brcms_c_info *wlc);
c654fce6 78extern void brcms_b_watchdog(void *arg);
a9533e7e
HP		 79
80/* up/down, reset, clk */
fe741e5e 81extern void brcms_b_copyto_objmem(struct brcms_c_hw_info *wlc_hw,
a9533e7e 82 uint offset, const void *buf, int len,
66cbd3ab 83 u32 sel);
fe741e5e 84extern void brcms_b_copyfrom_objmem(struct brcms_c_hw_info *wlc_hw, uint offset,
66cbd3ab 85 void *buf, int len, u32 sel);
c654fce6
RV		 86#define brcms_b_copyfrom_shm(wlc_hw, offset, buf, len) \
87 brcms_b_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL)
88#define brcms_b_copyto_shm(wlc_hw, offset, buf, len) \
89 brcms_b_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL)
90
fe741e5e
RV		 91extern void brcms_b_core_phypll_reset(struct brcms_c_hw_info *wlc_hw);
92extern void brcms_b_core_phypll_ctl(struct brcms_c_hw_info *wlc_hw, bool on);
93extern void brcms_b_phyclk_fgc(struct brcms_c_hw_info *wlc_hw, bool clk);
94extern void brcms_b_macphyclk_set(struct brcms_c_hw_info *wlc_hw, bool clk);
95extern void brcms_b_phy_reset(struct brcms_c_hw_info *wlc_hw);
96extern void brcms_b_corereset(struct brcms_c_hw_info *wlc_hw, u32 flags);
97extern void brcms_b_reset(struct brcms_c_hw_info *wlc_hw);
98extern void brcms_b_init(struct brcms_c_hw_info *wlc_hw, chanspec_t chanspec,
a9533e7e 99 bool mute);
fe741e5e
RV		 100extern int brcms_b_up_prep(struct brcms_c_hw_info *wlc_hw);
101extern int brcms_b_up_finish(struct brcms_c_hw_info *wlc_hw);
102extern int brcms_b_bmac_down_prep(struct brcms_c_hw_info *wlc_hw);
103extern int brcms_b_down_finish(struct brcms_c_hw_info *wlc_hw);
104extern void brcms_b_switch_macfreq(struct brcms_c_hw_info *wlc_hw, u8 spurmode);
a9533e7e
HP		 105
106/* chanspec, ucode interface */
fe741e5e 107extern void brcms_b_set_chanspec(struct brcms_c_hw_info *wlc_hw,
e304151f 108 chanspec_t chanspec,
a9533e7e
HP		 109 bool mute, struct txpwr_limits *txpwr);
110
fe741e5e 111extern int brcms_b_xmtfifo_sz_get(struct brcms_c_hw_info *wlc_hw, uint fifo,
7cc4a4c0 112 uint *blocks);
fe741e5e 113extern void brcms_b_mhf(struct brcms_c_hw_info *wlc_hw, u8 idx, u16 mask,
7d4df48e 114 u16 val, int bands);
fe741e5e
RV		 115extern void brcms_b_mctrl(struct brcms_c_hw_info *wlc_hw, u32 mask, u32 val);
116extern u16 brcms_b_mhf_get(struct brcms_c_hw_info *wlc_hw, u8 idx, int bands);
117extern void brcms_b_txant_set(struct brcms_c_hw_info *wlc_hw, u16 phytxant);
118extern u16 brcms_b_get_txant(struct brcms_c_hw_info *wlc_hw);
119extern void brcms_b_antsel_type_set(struct brcms_c_hw_info *wlc_hw,
e304151f 120 u8 antsel_type);
fe741e5e 121extern int brcms_b_state_get(struct brcms_c_hw_info *wlc_hw,
c654fce6 122 brcms_b_state_t *state);
fe741e5e
RV		 123extern void brcms_b_write_shm(struct brcms_c_hw_info *wlc_hw, uint offset,
124 u16 v);
125extern u16 brcms_b_read_shm(struct brcms_c_hw_info *wlc_hw, uint offset);
126extern void brcms_b_write_template_ram(struct brcms_c_hw_info *wlc_hw,
127 int offset, int len, void *buf);
128extern void brcms_b_copyfrom_vars(struct brcms_c_hw_info *wlc_hw, char **buf,
7cc4a4c0 129 uint *len);
a9533e7e 130
fe741e5e 131extern void brcms_b_hw_etheraddr(struct brcms_c_hw_info *wlc_hw,
a44d4236 132 u8 *ea);
a9533e7e 133
fe741e5e
RV		 134extern bool brcms_b_radio_read_hwdisabled(struct brcms_c_hw_info *wlc_hw);
135extern void brcms_b_set_shortslot(struct brcms_c_hw_info *wlc_hw,
136 bool shortslot);
137extern void brcms_b_band_stf_ss_set(struct brcms_c_hw_info *wlc_hw,
138 u8 stf_mode);
a9533e7e 139
fe741e5e 140extern void brcms_b_wait_for_wake(struct brcms_c_hw_info *wlc_hw);
a9533e7e 141
1c4c54ba 142extern void brcms_c_ucode_wake_override_set(struct brcms_c_hw_info *wlc_hw,
66cbd3ab 143 u32 override_bit);
1c4c54ba 144extern void brcms_c_ucode_wake_override_clear(struct brcms_c_hw_info *wlc_hw,
66cbd3ab 145 u32 override_bit);
a9533e7e 146
fe741e5e 147extern void brcms_b_set_addrmatch(struct brcms_c_hw_info *wlc_hw,
e304151f 148 int match_reg_offset,
a44d4236 149 const u8 *addr);
fe741e5e 150extern void brcms_b_write_hw_bcntemplates(struct brcms_c_hw_info *wlc_hw,
e304151f 151 void *bcn, int len, bool both);
a9533e7e 152
fe741e5e 153extern void brcms_b_read_tsf(struct brcms_c_hw_info *wlc_hw, u32 *tsf_l_ptr,
66cbd3ab 154 u32 *tsf_h_ptr);
fe741e5e
RV		 155extern void brcms_b_set_cwmin(struct brcms_c_hw_info *wlc_hw, u16 newmin);
156extern void brcms_b_set_cwmax(struct brcms_c_hw_info *wlc_hw, u16 newmax);
a9533e7e 157
fe741e5e 158extern void brcms_b_retrylimit_upd(struct brcms_c_hw_info *wlc_hw, u16 SRL,
7d4df48e 159 u16 LRL);
a9533e7e 160
fe741e5e 161extern void brcms_b_fifoerrors(struct brcms_c_hw_info *wlc_hw);
a9533e7e 162
a9533e7e
HP		 163
164/* API for BMAC driver (e.g. wlc_phy.c etc) */
165
fe741e5e
RV		 166extern void brcms_b_bw_set(struct brcms_c_hw_info *wlc_hw, u16 bw);
167extern void brcms_b_pllreq(struct brcms_c_hw_info *wlc_hw, bool set,
e304151f 168 mbool req_bit);
fe741e5e
RV		 169extern void brcms_b_hw_up(struct brcms_c_hw_info *wlc_hw);
170extern u16 brcms_b_rate_shm_offset(struct brcms_c_hw_info *wlc_hw, u8 rate);
171extern void brcms_b_antsel_set(struct brcms_c_hw_info *wlc_hw,
172 u32 antsel_avail);
62b54dca 173
f8557965 174#endif /* _BRCM_BOTTOM_MAC_H_ */
Linux kernel - Deliverables
This page took 0.120253 seconds and 5 git commands to generate.