Merge 3.9-rc5 into staging-next
[deliverable/linux.git] / drivers / staging / comedi / drivers / addi-data / addi_common.c
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1/**
2@verbatim
3
4Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
5
356cdbcb
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6 ADDI-DATA GmbH
7 Dieselstrasse 3
8 D-77833 Ottersweier
9 Tel: +19(0)7223/9493-0
10 Fax: +49(0)7223/9493-92
25417922 11 http://www.addi-data.com
356cdbcb 12 info@addi-data.com
c995fe94 13
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14This program is free software; you can redistribute it and/or modify it under
15the terms of the GNU General Public License as published by the Free Software
16Foundation; either version 2 of the License, or (at your option) any later
17version.
c995fe94 18
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19This program is distributed in the hope that it will be useful, but WITHOUT ANY
20WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
21PARTICULAR PURPOSE. See the GNU General Public License for more details.
c995fe94 22
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23You should have received a copy of the GNU General Public License along with
24this program; if not, write to the Free Software Foundation, Inc.,
2559 Temple Place, Suite 330, Boston, MA 02111-1307 USA
c995fe94 26
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27You should also find the complete GPL in the COPYING file accompanying this
28source code.
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29
30@endverbatim
31*/
32/*
33
34 +-----------------------------------------------------------------------+
35 | (C) ADDI-DATA GmbH Dieselstrasse 3 D-77833 Ottersweier |
36 +-----------------------------------------------------------------------+
37 | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com |
38 | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com |
39 +-----------------------------------------------------------------------+
5eaf711b 40 | Project : ADDI DATA | Compiler : GCC |
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41 | Modulname : addi_common.c | Version : 2.96 |
42 +-------------------------------+---------------------------------------+
5eaf711b 43 | Author : | Date : |
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44 +-----------------------------------------------------------------------+
45 | Description : ADDI COMMON Main Module |
46 +-----------------------------------------------------------------------+
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47*/
48
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49#ifndef COMEDI_SUBD_TTLIO
50#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
51#endif
52
17d51852
HS
53static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev,
54 struct comedi_subdevice *s,
55 struct comedi_insn *insn,
56 unsigned int *data)
57{
58 const struct addi_board *this_board = comedi_board(dev);
59 struct addi_private *devpriv = dev->private;
60 unsigned short w_Address = CR_CHAN(insn->chanspec);
61 unsigned short w_Data;
62
66be78f6 63 w_Data = addi_eeprom_readw(devpriv->i_IobaseAmcc,
85c1dcba 64 this_board->pc_EepromChip, 2 * w_Address);
17d51852
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65 data[0] = w_Data;
66
67 return insn->n;
68}
69
70static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
71{
72 struct comedi_device *dev = d;
73 const struct addi_board *this_board = comedi_board(dev);
74
75 this_board->interrupt(irq, d);
76 return IRQ_RETVAL(1);
77}
78
79static int i_ADDI_Reset(struct comedi_device *dev)
80{
81 const struct addi_board *this_board = comedi_board(dev);
82
83 this_board->reset(dev);
84 return 0;
85}
86
a690b7e5 87static int addi_auto_attach(struct comedi_device *dev,
92cba8f3 88 unsigned long context_unused)
41be28db 89{
92cba8f3 90 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1f388811 91 const struct addi_board *this_board = comedi_board(dev);
843690b7 92 struct addi_private *devpriv;
34c43922 93 struct comedi_subdevice *s;
e50e2420 94 int ret, n_subdevices;
756e9d7c 95 unsigned int dw_Dummy;
41be28db 96
41be28db 97 dev->board_name = this_board->pc_DriverName;
c995fe94 98
c34fa261
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99 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
100 if (!devpriv)
101 return -ENOMEM;
102 dev->private = devpriv;
c995fe94 103
818f569f 104 ret = comedi_pci_enable(dev);
ef34724d
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105 if (ret)
106 return ret;
c995fe94 107
0fcdafb8 108 if (!this_board->pc_EepromChip ||
c965c8b7
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109 strcmp(this_board->pc_EepromChip, ADDIDATA_9054)) {
110 /* board does not have an eeprom or is not ADDIDATA_9054 */
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111 if (this_board->i_IorangeBase1)
112 dev->iobase = pci_resource_start(pcidev, 1);
113 else
114 dev->iobase = pci_resource_start(pcidev, 0);
115
116 devpriv->iobase = dev->iobase;
117 devpriv->i_IobaseAmcc = pci_resource_start(pcidev, 0);
118 devpriv->i_IobaseAddon = pci_resource_start(pcidev, 2);
c995fe94 119 } else {
c965c8b7 120 /* board has an ADDIDATA_9054 eeprom */
b0d11687 121 dev->iobase = pci_resource_start(pcidev, 2);
b0d11687 122 devpriv->iobase = pci_resource_start(pcidev, 2);
b0d11687 123 devpriv->dw_AiBase = ioremap(pci_resource_start(pcidev, 3),
2f78c642 124 this_board->i_IorangeBase3);
c995fe94 125 }
0fcdafb8 126 devpriv->i_IobaseReserved = pci_resource_start(pcidev, 3);
c995fe94 127
57517878
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128 /* Initialize parameters that can be overridden in EEPROM */
129 devpriv->s_EeParameters.i_NbrAiChannel = this_board->i_NbrAiChannel;
130 devpriv->s_EeParameters.i_NbrAoChannel = this_board->i_NbrAoChannel;
131 devpriv->s_EeParameters.i_AiMaxdata = this_board->i_AiMaxdata;
132 devpriv->s_EeParameters.i_AoMaxdata = this_board->i_AoMaxdata;
133 devpriv->s_EeParameters.i_NbrDiChannel = this_board->i_NbrDiChannel;
134 devpriv->s_EeParameters.i_NbrDoChannel = this_board->i_NbrDoChannel;
135 devpriv->s_EeParameters.i_DoMaxdata = this_board->i_DoMaxdata;
136 devpriv->s_EeParameters.i_Dma = this_board->i_Dma;
137 devpriv->s_EeParameters.i_Timer = this_board->i_Timer;
138 devpriv->s_EeParameters.ui_MinAcquisitiontimeNs =
139 this_board->ui_MinAcquisitiontimeNs;
140 devpriv->s_EeParameters.ui_MinDelaytimeNs =
141 this_board->ui_MinDelaytimeNs;
142
2696fb57 143 /* ## */
c995fe94 144
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145 if (pcidev->irq > 0) {
146 ret = request_irq(pcidev->irq, v_ADDI_Interrupt, IRQF_SHARED,
41be28db 147 dev->board_name, dev);
e6fee79e 148 if (ret == 0)
ade6c03d 149 dev->irq = pcidev->irq;
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150 }
151
2696fb57 152 /* Read eepeom and fill addi_board Structure */
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153
154 if (this_board->i_PCIEeprom) {
c995fe94 155 if (!(strcmp(this_board->pc_EepromChip, "S5920"))) {
2696fb57 156 /* Set 3 wait stait */
5eaf711b 157 if (!(strcmp(dev->board_name, "apci035")))
c995fe94 158 outl(0x80808082, devpriv->i_IobaseAmcc + 0x60);
5eaf711b 159 else
c995fe94 160 outl(0x83838383, devpriv->i_IobaseAmcc + 0x60);
5eaf711b 161
af02b584 162 /* Enable the interrupt for the controller */
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163 dw_Dummy = inl(devpriv->i_IobaseAmcc + 0x38);
164 outl(dw_Dummy | 0x2000, devpriv->i_IobaseAmcc + 0x38);
c995fe94 165 }
b0d11687 166 addi_eeprom_read_info(dev, pci_resource_start(pcidev, 0));
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167 }
168
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169 n_subdevices = 7;
170 ret = comedi_alloc_subdevices(dev, n_subdevices);
171 if (ret)
172 return ret;
c995fe94 173
c9ab760d
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174 /* Allocate and Initialise AI Subdevice Structures */
175 s = &dev->subdevices[0];
176 if ((devpriv->s_EeParameters.i_NbrAiChannel)
177 || (this_board->i_NbrAiChannelDiff)) {
178 dev->read_subdev = s;
179 s->type = COMEDI_SUBD_AI;
180 s->subdev_flags =
181 SDF_READABLE | SDF_COMMON | SDF_GROUND
182 | SDF_DIFF;
183 if (devpriv->s_EeParameters.i_NbrAiChannel) {
184 s->n_chan =
185 devpriv->s_EeParameters.i_NbrAiChannel;
186 devpriv->b_SingelDiff = 0;
187 } else {
188 s->n_chan = this_board->i_NbrAiChannelDiff;
189 devpriv->b_SingelDiff = 1;
190 }
191 s->maxdata = devpriv->s_EeParameters.i_AiMaxdata;
192 s->len_chanlist = this_board->i_AiChannelList;
193 s->range_table = this_board->pr_AiRangelist;
c995fe94 194
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195 /* Set the initialisation flag */
196 devpriv->b_AiInitialisation = 1;
c995fe94 197
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198 s->insn_config = this_board->ai_config;
199 s->insn_read = this_board->ai_read;
200 s->insn_write = this_board->ai_write;
201 s->insn_bits = this_board->ai_bits;
202 s->do_cmdtest = this_board->ai_cmdtest;
203 s->do_cmd = this_board->ai_cmd;
204 s->cancel = this_board->ai_cancel;
c995fe94 205
c9ab760d
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206 } else {
207 s->type = COMEDI_SUBD_UNUSED;
208 }
c995fe94 209
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210 /* Allocate and Initialise AO Subdevice Structures */
211 s = &dev->subdevices[1];
212 if (devpriv->s_EeParameters.i_NbrAoChannel) {
213 s->type = COMEDI_SUBD_AO;
214 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
215 s->n_chan = devpriv->s_EeParameters.i_NbrAoChannel;
216 s->maxdata = devpriv->s_EeParameters.i_AoMaxdata;
217 s->len_chanlist =
218 devpriv->s_EeParameters.i_NbrAoChannel;
219 s->range_table = this_board->pr_AoRangelist;
220 s->insn_config = this_board->ao_config;
221 s->insn_write = this_board->ao_write;
222 } else {
223 s->type = COMEDI_SUBD_UNUSED;
224 }
225 /* Allocate and Initialise DI Subdevice Structures */
226 s = &dev->subdevices[2];
227 if (devpriv->s_EeParameters.i_NbrDiChannel) {
228 s->type = COMEDI_SUBD_DI;
229 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON;
230 s->n_chan = devpriv->s_EeParameters.i_NbrDiChannel;
231 s->maxdata = 1;
232 s->len_chanlist =
233 devpriv->s_EeParameters.i_NbrDiChannel;
234 s->range_table = &range_digital;
235 s->io_bits = 0; /* all bits input */
236 s->insn_config = this_board->di_config;
237 s->insn_read = this_board->di_read;
238 s->insn_write = this_board->di_write;
239 s->insn_bits = this_board->di_bits;
240 } else {
241 s->type = COMEDI_SUBD_UNUSED;
242 }
243 /* Allocate and Initialise DO Subdevice Structures */
244 s = &dev->subdevices[3];
245 if (devpriv->s_EeParameters.i_NbrDoChannel) {
246 s->type = COMEDI_SUBD_DO;
247 s->subdev_flags =
248 SDF_READABLE | SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
249 s->n_chan = devpriv->s_EeParameters.i_NbrDoChannel;
250 s->maxdata = devpriv->s_EeParameters.i_DoMaxdata;
251 s->len_chanlist =
252 devpriv->s_EeParameters.i_NbrDoChannel;
253 s->range_table = &range_digital;
254 s->io_bits = 0xf; /* all bits output */
255
256 /* insn_config - for digital output memory */
257 s->insn_config = this_board->do_config;
258 s->insn_write = this_board->do_write;
259 s->insn_bits = this_board->do_bits;
260 s->insn_read = this_board->do_read;
261 } else {
262 s->type = COMEDI_SUBD_UNUSED;
263 }
c995fe94 264
c9ab760d
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265 /* Allocate and Initialise Timer Subdevice Structures */
266 s = &dev->subdevices[4];
267 if (devpriv->s_EeParameters.i_Timer) {
268 s->type = COMEDI_SUBD_TIMER;
269 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
270 s->n_chan = 1;
271 s->maxdata = 0;
272 s->len_chanlist = 1;
273 s->range_table = &range_digital;
274
275 s->insn_write = this_board->timer_write;
276 s->insn_read = this_board->timer_read;
277 s->insn_config = this_board->timer_config;
278 s->insn_bits = this_board->timer_bits;
279 } else {
280 s->type = COMEDI_SUBD_UNUSED;
281 }
c995fe94 282
c9ab760d
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283 /* Allocate and Initialise TTL */
284 s = &dev->subdevices[5];
285 if (this_board->i_NbrTTLChannel) {
286 s->type = COMEDI_SUBD_TTLIO;
287 s->subdev_flags =
288 SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
289 s->n_chan = this_board->i_NbrTTLChannel;
290 s->maxdata = 1;
291 s->io_bits = 0; /* all bits input */
292 s->len_chanlist = this_board->i_NbrTTLChannel;
293 s->range_table = &range_digital;
294 s->insn_config = this_board->ttl_config;
295 s->insn_bits = this_board->ttl_bits;
296 s->insn_read = this_board->ttl_read;
297 s->insn_write = this_board->ttl_write;
298 } else {
299 s->type = COMEDI_SUBD_UNUSED;
300 }
c995fe94 301
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302 /* EEPROM */
303 s = &dev->subdevices[6];
304 if (this_board->i_PCIEeprom) {
305 s->type = COMEDI_SUBD_MEMORY;
306 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
307 s->n_chan = 256;
308 s->maxdata = 0xffff;
309 s->insn_read = i_ADDIDATA_InsnReadEeprom;
310 } else {
311 s->type = COMEDI_SUBD_UNUSED;
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312 }
313
c995fe94 314 i_ADDI_Reset(dev);
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315 return 0;
316}
317
484ecc95 318static void i_ADDI_Detach(struct comedi_device *dev)
c995fe94 319{
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320 struct addi_private *devpriv = dev->private;
321
322 if (devpriv) {
ae0e3b8b 323 if (dev->iobase)
c995fe94 324 i_ADDI_Reset(dev);
484ecc95 325 if (dev->irq)
5f74ea14 326 free_irq(dev->irq, dev);
e50e2420 327 if (devpriv->dw_AiBase)
2f78c642 328 iounmap(devpriv->dw_AiBase);
c995fe94 329 }
7f072f54 330 comedi_pci_disable(dev);
c995fe94 331}
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