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d42b5211 HS |
1 | /* |
2 | * comedi_8254.h | |
3 | * Generic 8254 timer/counter support | |
4 | * Copyright (C) 2014 H Hartley Sweeten <hsweeten@visionengravers.com> | |
5 | * | |
6 | * COMEDI - Linux Control and Measurement Device Interface | |
7 | * Copyright (C) 2000 David A. Schleef <ds@schleef.org> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | */ | |
19 | ||
20 | #ifndef _COMEDI_8254_H | |
21 | #define _COMEDI_8254_H | |
22 | ||
b727255f IA |
23 | #include <linux/types.h> |
24 | ||
25 | struct comedi_device; | |
26 | struct comedi_insn; | |
27 | struct comedi_subdevice; | |
28 | ||
d42b5211 HS |
29 | /* |
30 | * Common oscillator base values in nanoseconds | |
31 | */ | |
32 | #define I8254_OSC_BASE_10MHZ 100 | |
33 | #define I8254_OSC_BASE_5MHZ 200 | |
34 | #define I8254_OSC_BASE_4MHZ 250 | |
35 | #define I8254_OSC_BASE_2MHZ 500 | |
36 | #define I8254_OSC_BASE_1MHZ 1000 | |
37 | #define I8254_OSC_BASE_100KHZ 10000 | |
38 | #define I8254_OSC_BASE_10KHZ 100000 | |
39 | #define I8254_OSC_BASE_1KHZ 1000000 | |
40 | ||
41 | /* | |
42 | * I/O access size used to read/write registers | |
43 | */ | |
44 | #define I8254_IO8 1 | |
45 | #define I8254_IO16 2 | |
46 | #define I8254_IO32 4 | |
47 | ||
48 | /* | |
49 | * Register map for generic 8254 timer (I8254_IO8 with 0 regshift) | |
50 | */ | |
51 | #define I8254_COUNTER0_REG 0x00 | |
52 | #define I8254_COUNTER1_REG 0x01 | |
53 | #define I8254_COUNTER2_REG 0x02 | |
54 | #define I8254_CTRL_REG 0x03 | |
55 | #define I8254_CTRL_SEL_CTR(x) ((x) << 6) | |
56 | #define I8254_CTRL_READBACK_COUNT ((3 << 6) | (1 << 4)) | |
57 | #define I8254_CTRL_READBACK_STATUS ((3 << 6) | (1 << 5)) | |
58 | #define I8254_CTRL_READBACK_SEL_CTR(x) (2 << (x)) | |
59 | #define I8254_CTRL_LATCH (0 << 4) | |
60 | #define I8254_CTRL_LSB_ONLY (1 << 4) | |
61 | #define I8254_CTRL_MSB_ONLY (2 << 4) | |
62 | #define I8254_CTRL_LSB_MSB (3 << 4) | |
63 | ||
64 | /* counter maps zero to 0x10000 */ | |
65 | #define I8254_MAX_COUNT 0x10000 | |
66 | ||
67 | /** | |
68 | * struct comedi_8254 - private data used by this module | |
69 | * @iobase: PIO base address of the registers (in/out) | |
70 | * @mmio: MMIO base address of the registers (read/write) | |
71 | * @iosize: I/O size used to access the registers (b/w/l) | |
72 | * @regshift: register gap shift | |
73 | * @osc_base: cascaded oscillator speed in ns | |
74 | * @divisor: divisor for single counter | |
75 | * @divisor1: divisor loaded into first cascaded counter | |
76 | * @divisor2: divisor loaded into second cascaded counter | |
77 | * #next_div: next divisor for single counter | |
78 | * @next_div1: next divisor to use for first cascaded counter | |
79 | * @next_div2: next divisor to use for second cascaded counter | |
5a213fa6 HS |
80 | * @clock_src; current clock source for each counter (driver specific) |
81 | * @gate_src; current gate source for each counter (driver specific) | |
d42b5211 HS |
82 | * @busy: flags used to indicate that a counter is "busy" |
83 | * @insn_config: driver specific (*insn_config) callback | |
84 | */ | |
85 | struct comedi_8254 { | |
86 | unsigned long iobase; | |
87 | void __iomem *mmio; | |
88 | unsigned int iosize; | |
89 | unsigned int regshift; | |
90 | unsigned int osc_base; | |
91 | unsigned int divisor; | |
92 | unsigned int divisor1; | |
93 | unsigned int divisor2; | |
94 | unsigned int next_div; | |
95 | unsigned int next_div1; | |
96 | unsigned int next_div2; | |
5a213fa6 HS |
97 | unsigned int clock_src[3]; |
98 | unsigned int gate_src[3]; | |
d42b5211 HS |
99 | bool busy[3]; |
100 | ||
101 | int (*insn_config)(struct comedi_device *, struct comedi_subdevice *s, | |
102 | struct comedi_insn *, unsigned int *data); | |
103 | }; | |
104 | ||
105 | unsigned int comedi_8254_status(struct comedi_8254 *, unsigned int counter); | |
106 | unsigned int comedi_8254_read(struct comedi_8254 *, unsigned int counter); | |
107 | void comedi_8254_write(struct comedi_8254 *, | |
108 | unsigned int counter, unsigned int val); | |
109 | ||
110 | int comedi_8254_set_mode(struct comedi_8254 *, | |
111 | unsigned int counter, unsigned int mode); | |
112 | int comedi_8254_load(struct comedi_8254 *, | |
113 | unsigned int counter, unsigned int val, unsigned int mode); | |
114 | ||
115 | void comedi_8254_pacer_enable(struct comedi_8254 *, | |
116 | unsigned int counter1, unsigned int counter2, | |
117 | bool enable); | |
118 | void comedi_8254_update_divisors(struct comedi_8254 *); | |
119 | void comedi_8254_cascade_ns_to_timer(struct comedi_8254 *, | |
120 | unsigned int *nanosec, unsigned int flags); | |
121 | void comedi_8254_ns_to_timer(struct comedi_8254 *, | |
122 | unsigned int *nanosec, unsigned int flags); | |
123 | ||
124 | void comedi_8254_set_busy(struct comedi_8254 *, | |
125 | unsigned int counter, bool busy); | |
126 | ||
127 | void comedi_8254_subdevice_init(struct comedi_subdevice *, | |
128 | struct comedi_8254 *); | |
129 | ||
130 | struct comedi_8254 *comedi_8254_init(unsigned long iobase, | |
131 | unsigned int osc_base, | |
132 | unsigned int iosize, | |
133 | unsigned int regshift); | |
134 | struct comedi_8254 *comedi_8254_mm_init(void __iomem *mmio, | |
135 | unsigned int osc_base, | |
136 | unsigned int iosize, | |
137 | unsigned int regshift); | |
138 | ||
139 | #endif /* _COMEDI_8254_H */ |