[deliverable/linux.git] / drivers / staging / comedi / drivers / ni_6527.c

/*
    comedi/drivers/ni_6527.c
    driver for National Instruments PCI-6527

    COMEDI - Linux Control and Measurement Device Interface
    Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

*/
/*
Driver: ni_6527
Description: National Instruments 6527
Author: ds
Status: works
Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527
Updated: Sat, 25 Jan 2003 13:24:40 -0800


*/

/*
   Manuals (available from ftp://ftp.natinst.com/support/manuals)

	370106b.pdf	6527 Register Level Programmer Manual

 */

#define DEBUG 1
#define DEBUG_FLAGS

#include "../comedidev.h"

#include "mite.h"

#define NI6527_DIO_SIZE 4096
#define NI6527_MITE_SIZE 4096

#define Port_Register(x)			(0x00+(x))
#define ID_Register				0x06

#define Clear_Register				0x07
#define ClrEdge				0x08
#define ClrOverflow			0x04
#define ClrFilter			0x02
#define ClrInterval			0x01

#define Filter_Interval(x)			(0x08+(x))
#define Filter_Enable(x)			(0x0c+(x))

#define Change_Status				0x14
#define MasterInterruptStatus		0x04
#define Overflow			0x02
#define EdgeStatus			0x01

#define Master_Interrupt_Control		0x15
#define FallingEdgeIntEnable		0x10
#define RisingEdgeIntEnable		0x08
#define MasterInterruptEnable		0x04
#define OverflowIntEnable		0x02
#define EdgeIntEnable			0x01

#define Rising_Edge_Detection_Enable(x)		(0x018+(x))
#define Falling_Edge_Detection_Enable(x)	(0x020+(x))

static int ni6527_attach(struct comedi_device * dev, struct comedi_devconfig * it);
static int ni6527_detach(struct comedi_device * dev);
static struct comedi_driver driver_ni6527 = {
      driver_name:"ni6527",
      module:THIS_MODULE,
      attach:ni6527_attach,
      detach:ni6527_detach,
};

struct ni6527_board {

	int dev_id;
	const char *name;
};

static const struct ni6527_board ni6527_boards[] = {
	{
	      dev_id:	0x2b20,
	      name:	"pci-6527",
		},
	{
	      dev_id:	0x2b10,
	      name:	"pxi-6527",
		},
};

#define n_ni6527_boards (sizeof(ni6527_boards)/sizeof(ni6527_boards[0]))
#define this_board ((const struct ni6527_board *)dev->board_ptr)

static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = {
	{PCI_VENDOR_ID_NATINST, 0x2b10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{PCI_VENDOR_ID_NATINST, 0x2b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{0}
};

MODULE_DEVICE_TABLE(pci, ni6527_pci_table);

typedef struct {
	struct mite_struct *mite;
	unsigned int filter_interval;
	unsigned int filter_enable;
} ni6527_private;
#define devpriv ((ni6527_private *)dev->private)

static int ni6527_find_device(struct comedi_device * dev, int bus, int slot);

static int ni6527_di_insn_config(struct comedi_device * dev, struct comedi_subdevice * s,
	struct comedi_insn * insn, unsigned int * data)
{
	int chan = CR_CHAN(insn->chanspec);
	unsigned int interval;

	if (insn->n != 2)
		return -EINVAL;

	if (data[0] != INSN_CONFIG_FILTER)
		return -EINVAL;

	if (data[1]) {
		interval = (data[1] + 100) / 200;
		data[1] = interval * 200;

		if (interval != devpriv->filter_interval) {
			writeb(interval & 0xff,
				devpriv->mite->daq_io_addr +
				Filter_Interval(0));
			writeb((interval >> 8) & 0xff,
				devpriv->mite->daq_io_addr +
				Filter_Interval(1));
			writeb((interval >> 16) & 0x0f,
				devpriv->mite->daq_io_addr +
				Filter_Interval(2));

			writeb(ClrInterval,
				devpriv->mite->daq_io_addr + Clear_Register);

			devpriv->filter_interval = interval;
		}

		devpriv->filter_enable |= 1 << chan;
	} else {
		devpriv->filter_enable &= ~(1 << chan);
	}

	writeb(devpriv->filter_enable,
		devpriv->mite->daq_io_addr + Filter_Enable(0));
	writeb(devpriv->filter_enable >> 8,
		devpriv->mite->daq_io_addr + Filter_Enable(1));
	writeb(devpriv->filter_enable >> 16,
		devpriv->mite->daq_io_addr + Filter_Enable(2));

	return 2;
}

static int ni6527_di_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
	struct comedi_insn * insn, unsigned int * data)
{
	if (insn->n != 2)
		return -EINVAL;

	data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0));
	data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8;
	data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16;

	return 2;
}

static int ni6527_do_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
	struct comedi_insn * insn, unsigned int * data)
{
	if (insn->n != 2)
		return -EINVAL;
	if (data[0]) {
		s->state &= ~data[0];
		s->state |= (data[0] & data[1]);

		/* The open relay state on the board cooresponds to 1,
		 * but in Comedi, it is represented by 0. */
		if (data[0] & 0x0000ff) {
			writeb((s->state ^ 0xff),
				devpriv->mite->daq_io_addr + Port_Register(3));
		}
		if (data[0] & 0x00ff00) {
			writeb((s->state >> 8) ^ 0xff,
				devpriv->mite->daq_io_addr + Port_Register(4));
		}
		if (data[0] & 0xff0000) {
			writeb((s->state >> 16) ^ 0xff,
				devpriv->mite->daq_io_addr + Port_Register(5));
		}
	}
	data[1] = s->state;

	return 2;
}

static irqreturn_t ni6527_interrupt(int irq, void *d PT_REGS_ARG)
{
	struct comedi_device *dev = d;
	struct comedi_subdevice *s = dev->subdevices + 2;
	unsigned int status;

	status = readb(devpriv->mite->daq_io_addr + Change_Status);
	if ((status & MasterInterruptStatus) == 0)
		return IRQ_NONE;
	if ((status & EdgeStatus) == 0)
		return IRQ_NONE;

	writeb(ClrEdge | ClrOverflow,
		devpriv->mite->daq_io_addr + Clear_Register);

	comedi_buf_put(s->async, 0);
	s->async->events |= COMEDI_CB_EOS;
	comedi_event(dev, s);
	return IRQ_HANDLED;
}

static int ni6527_intr_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
	struct comedi_cmd * cmd)
{
	int err = 0;
	int tmp;

	/* step 1: make sure trigger sources are trivially valid */

	tmp = cmd->start_src;
	cmd->start_src &= TRIG_NOW;
	if (!cmd->start_src || tmp != cmd->start_src)
		err++;

	tmp = cmd->scan_begin_src;
	cmd->scan_begin_src &= TRIG_OTHER;
	if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
		err++;

	tmp = cmd->convert_src;
	cmd->convert_src &= TRIG_FOLLOW;
	if (!cmd->convert_src || tmp != cmd->convert_src)
		err++;

	tmp = cmd->scan_end_src;
	cmd->scan_end_src &= TRIG_COUNT;
	if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
		err++;

	tmp = cmd->stop_src;
	cmd->stop_src &= TRIG_COUNT;
	if (!cmd->stop_src || tmp != cmd->stop_src)
		err++;

	if (err)
		return 1;

	/* step 2: make sure trigger sources are unique and mutually compatible */

	if (err)
		return 2;

	/* step 3: make sure arguments are trivially compatible */

	if (cmd->start_arg != 0) {
		cmd->start_arg = 0;
		err++;
	}
	if (cmd->scan_begin_arg != 0) {
		cmd->scan_begin_arg = 0;
		err++;
	}
	if (cmd->convert_arg != 0) {
		cmd->convert_arg = 0;
		err++;
	}

	if (cmd->scan_end_arg != 1) {
		cmd->scan_end_arg = 1;
		err++;
	}
	if (cmd->stop_arg != 0) {
		cmd->stop_arg = 0;
		err++;
	}

	if (err)
		return 3;

	/* step 4: fix up any arguments */

	if (err)
		return 4;

	return 0;
}

static int ni6527_intr_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
{
	//struct comedi_cmd *cmd = &s->async->cmd;

	writeb(ClrEdge | ClrOverflow,
		devpriv->mite->daq_io_addr + Clear_Register);
	writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
		MasterInterruptEnable | EdgeIntEnable,
		devpriv->mite->daq_io_addr + Master_Interrupt_Control);

	return 0;
}

static int ni6527_intr_cancel(struct comedi_device * dev, struct comedi_subdevice * s)
{
	writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);

	return 0;
}

static int ni6527_intr_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
	struct comedi_insn * insn, unsigned int * data)
{
	if (insn->n < 1)
		return -EINVAL;

	data[1] = 0;
	return 2;
}

static int ni6527_intr_insn_config(struct comedi_device * dev, struct comedi_subdevice * s,
	struct comedi_insn * insn, unsigned int * data)
{
	if (insn->n < 1)
		return -EINVAL;
	if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
		return -EINVAL;

	writeb(data[1],
		devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0));
	writeb(data[1] >> 8,
		devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1));
	writeb(data[1] >> 16,
		devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2));

	writeb(data[2],
		devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0));
	writeb(data[2] >> 8,
		devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1));
	writeb(data[2] >> 16,
		devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2));

	return 2;
}

static int ni6527_attach(struct comedi_device * dev, struct comedi_devconfig * it)
{
	struct comedi_subdevice *s;
	int ret;

	printk("comedi%d: ni6527:", dev->minor);

	if ((ret = alloc_private(dev, sizeof(ni6527_private))) < 0)
		return ret;

	ret = ni6527_find_device(dev, it->options[0], it->options[1]);
	if (ret < 0)
		return ret;

	ret = mite_setup(devpriv->mite);
	if (ret < 0) {
		printk("error setting up mite\n");
		return ret;
	}

	dev->board_name = this_board->name;
	printk(" %s", dev->board_name);

	printk(" ID=0x%02x", readb(devpriv->mite->daq_io_addr + ID_Register));

	if ((ret = alloc_subdevices(dev, 3)) < 0)
		return ret;

	s = dev->subdevices + 0;
	s->type = COMEDI_SUBD_DI;
	s->subdev_flags = SDF_READABLE;
	s->n_chan = 24;
	s->range_table = &range_digital;
	s->maxdata = 1;
	s->insn_config = ni6527_di_insn_config;
	s->insn_bits = ni6527_di_insn_bits;

	s = dev->subdevices + 1;
	s->type = COMEDI_SUBD_DO;
	s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
	s->n_chan = 24;
	s->range_table = &range_unknown;	/* FIXME: actually conductance */
	s->maxdata = 1;
	s->insn_bits = ni6527_do_insn_bits;

	s = dev->subdevices + 2;
	dev->read_subdev = s;
	s->type = COMEDI_SUBD_DI;
	s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
	s->n_chan = 1;
	s->range_table = &range_unknown;
	s->maxdata = 1;
	s->do_cmdtest = ni6527_intr_cmdtest;
	s->do_cmd = ni6527_intr_cmd;
	s->cancel = ni6527_intr_cancel;
	s->insn_bits = ni6527_intr_insn_bits;
	s->insn_config = ni6527_intr_insn_config;

	writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0));
	writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1));
	writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2));

	writeb(ClrEdge | ClrOverflow | ClrFilter | ClrInterval,
		devpriv->mite->daq_io_addr + Clear_Register);
	writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);

	ret = comedi_request_irq(mite_irq(devpriv->mite), ni6527_interrupt,
		IRQF_SHARED, "ni6527", dev);
	if (ret < 0) {
		printk(" irq not available");
	} else
		dev->irq = mite_irq(devpriv->mite);

	printk("\n");

	return 0;
}

static int ni6527_detach(struct comedi_device * dev)
{
	if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) {
		writeb(0x00,
			devpriv->mite->daq_io_addr + Master_Interrupt_Control);
	}

	if (dev->irq) {
		comedi_free_irq(dev->irq, dev);
	}

	if (devpriv && devpriv->mite) {
		mite_unsetup(devpriv->mite);
	}

	return 0;
}

static int ni6527_find_device(struct comedi_device * dev, int bus, int slot)
{
	struct mite_struct *mite;
	int i;

	for (mite = mite_devices; mite; mite = mite->next) {
		if (mite->used)
			continue;
		if (bus || slot) {
			if (bus != mite->pcidev->bus->number ||
				slot != PCI_SLOT(mite->pcidev->devfn))
				continue;
		}
		for (i = 0; i < n_ni6527_boards; i++) {
			if (mite_device_id(mite) == ni6527_boards[i].dev_id) {
				dev->board_ptr = ni6527_boards + i;
				devpriv->mite = mite;
				return 0;
			}
		}
	}
	printk("no device found\n");
	mite_list_devices();
	return -EIO;
}

COMEDI_PCI_INITCLEANUP(driver_ni6527, ni6527_pci_table);
Commit	Line	Data
ef2ccffb DS	1	/*
	2	comedi/drivers/ni_6527.c
	3	driver for National Instruments PCI-6527
	4
	5	COMEDI - Linux Control and Measurement Device Interface
	6	Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 2 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program; if not, write to the Free Software
	20	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21
	22	*/
	23	/*
	24	Driver: ni_6527
	25	Description: National Instruments 6527
	26	Author: ds
	27	Status: works
	28	Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527
	29	Updated: Sat, 25 Jan 2003 13:24:40 -0800
	30
	31
	32	*/
	33
	34	/*
	35	Manuals (available from ftp://ftp.natinst.com/support/manuals)
	36
	37	370106b.pdf 6527 Register Level Programmer Manual
	38
	39	*/
	40
	41	#define DEBUG 1
	42	#define DEBUG_FLAGS
	43
	44	#include "../comedidev.h"
	45
	46	#include "mite.h"
	47
	48	#define NI6527_DIO_SIZE 4096
	49	#define NI6527_MITE_SIZE 4096
	50
	51	#define Port_Register(x) (0x00+(x))
	52	#define ID_Register 0x06
	53
	54	#define Clear_Register 0x07
	55	#define ClrEdge 0x08
	56	#define ClrOverflow 0x04
	57	#define ClrFilter 0x02
	58	#define ClrInterval 0x01
	59
	60	#define Filter_Interval(x) (0x08+(x))
	61	#define Filter_Enable(x) (0x0c+(x))
	62
	63	#define Change_Status 0x14
	64	#define MasterInterruptStatus 0x04
65	#define Overflow 0x02
66	#define EdgeStatus 0x01
67
68	#define Master_Interrupt_Control 0x15
69	#define FallingEdgeIntEnable 0x10
70	#define RisingEdgeIntEnable 0x08
71	#define MasterInterruptEnable 0x04
72	#define OverflowIntEnable 0x02
73	#define EdgeIntEnable 0x01
74
75	#define Rising_Edge_Detection_Enable(x) (0x018+(x))
76	#define Falling_Edge_Detection_Enable(x) (0x020+(x))
77
0707bb04	78	static int ni6527_attach(struct comedi_device * dev, struct comedi_devconfig * it);
71b5f4f1	79	static int ni6527_detach(struct comedi_device * dev);
139dfbdf	80	static struct comedi_driver driver_ni6527 = {
ef2ccffb DS	81	driver_name:"ni6527",
	82	module:THIS_MODULE,
	83	attach:ni6527_attach,
	84	detach:ni6527_detach,
	85	};
	86
16d38ca3 BP	87	struct ni6527_board {
16d38ca3 BP	88
ef2ccffb DS	89	int dev_id;
ef2ccffb DS	90	const char *name;
16d38ca3 BP	91	};
	92
	93	static const struct ni6527_board ni6527_boards[] = {
ef2ccffb DS	94	{
	95	dev_id: 0x2b20,
	96	name: "pci-6527",
	97	},
	98	{
	99	dev_id: 0x2b10,
	100	name: "pxi-6527",
	101	},
	102	};
	103
	104	#define n_ni6527_boards (sizeof(ni6527_boards)/sizeof(ni6527_boards[0]))
16d38ca3	105	#define this_board ((const struct ni6527_board *)dev->board_ptr)
ef2ccffb DS	106
	107	static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = {
	108	{PCI_VENDOR_ID_NATINST, 0x2b10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	109	{PCI_VENDOR_ID_NATINST, 0x2b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	110	{0}
	111	};
	112
	113	MODULE_DEVICE_TABLE(pci, ni6527_pci_table);
	114
	115	typedef struct {
	116	struct mite_struct *mite;
	117	unsigned int filter_interval;
	118	unsigned int filter_enable;
	119	} ni6527_private;
	120	#define devpriv ((ni6527_private *)dev->private)
	121
71b5f4f1	122	static int ni6527_find_device(struct comedi_device * dev, int bus, int slot);
ef2ccffb	123
34c43922	124	static int ni6527_di_insn_config(struct comedi_device * dev, struct comedi_subdevice * s,
90035c08	125	struct comedi_insn * insn, unsigned int * data)
ef2ccffb DS	126	{
	127	int chan = CR_CHAN(insn->chanspec);
	128	unsigned int interval;
	129
	130	if (insn->n != 2)
	131	return -EINVAL;
	132
	133	if (data[0] != INSN_CONFIG_FILTER)
	134	return -EINVAL;
	135
	136	if (data[1]) {
	137	interval = (data[1] + 100) / 200;
	138	data[1] = interval * 200;
	139
	140	if (interval != devpriv->filter_interval) {
	141	writeb(interval & 0xff,
	142	devpriv->mite->daq_io_addr +
	143	Filter_Interval(0));
	144	writeb((interval >> 8) & 0xff,
	145	devpriv->mite->daq_io_addr +
	146	Filter_Interval(1));
	147	writeb((interval >> 16) & 0x0f,
	148	devpriv->mite->daq_io_addr +
	149	Filter_Interval(2));
	150
	151	writeb(ClrInterval,
	152	devpriv->mite->daq_io_addr + Clear_Register);
	153
	154	devpriv->filter_interval = interval;
	155	}
	156
	157	devpriv->filter_enable \|= 1 << chan;
	158	} else {
	159	devpriv->filter_enable &= ~(1 << chan);
	160	}
	161
	162	writeb(devpriv->filter_enable,
	163	devpriv->mite->daq_io_addr + Filter_Enable(0));
	164	writeb(devpriv->filter_enable >> 8,
	165	devpriv->mite->daq_io_addr + Filter_Enable(1));
	166	writeb(devpriv->filter_enable >> 16,
	167	devpriv->mite->daq_io_addr + Filter_Enable(2));
	168
	169	return 2;
	170	}
	171
34c43922	172	static int ni6527_di_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
90035c08	173	struct comedi_insn * insn, unsigned int * data)
ef2ccffb DS	174	{
	175	if (insn->n != 2)
	176	return -EINVAL;
	177
	178	data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0));
	179	data[1] \|= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8;
	180	data[1] \|= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16;
	181
	182	return 2;
	183	}
	184
34c43922	185	static int ni6527_do_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
90035c08	186	struct comedi_insn * insn, unsigned int * data)
ef2ccffb DS	187	{
	188	if (insn->n != 2)
	189	return -EINVAL;
	190	if (data[0]) {
	191	s->state &= ~data[0];
	192	s->state \|= (data[0] & data[1]);
	193
	194	/* The open relay state on the board cooresponds to 1,
	195	* but in Comedi, it is represented by 0. */
	196	if (data[0] & 0x0000ff) {
	197	writeb((s->state ^ 0xff),
	198	devpriv->mite->daq_io_addr + Port_Register(3));
	199	}
	200	if (data[0] & 0x00ff00) {
	201	writeb((s->state >> 8) ^ 0xff,
	202	devpriv->mite->daq_io_addr + Port_Register(4));
	203	}
	204	if (data[0] & 0xff0000) {
	205	writeb((s->state >> 16) ^ 0xff,
	206	devpriv->mite->daq_io_addr + Port_Register(5));
	207	}
	208	}
	209	data[1] = s->state;
	210
	211	return 2;
	212	}
	213
	214	static irqreturn_t ni6527_interrupt(int irq, void *d PT_REGS_ARG)
	215	{
71b5f4f1	216	struct comedi_device *dev = d;
34c43922	217	struct comedi_subdevice *s = dev->subdevices + 2;
ef2ccffb DS	218	unsigned int status;
	219
	220	status = readb(devpriv->mite->daq_io_addr + Change_Status);
	221	if ((status & MasterInterruptStatus) == 0)
	222	return IRQ_NONE;
	223	if ((status & EdgeStatus) == 0)
	224	return IRQ_NONE;
	225
	226	writeb(ClrEdge \| ClrOverflow,
	227	devpriv->mite->daq_io_addr + Clear_Register);
	228
	229	comedi_buf_put(s->async, 0);
	230	s->async->events \|= COMEDI_CB_EOS;
	231	comedi_event(dev, s);
	232	return IRQ_HANDLED;
	233	}
	234
34c43922	235	static int ni6527_intr_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
ea6d0d4c	236	struct comedi_cmd * cmd)
ef2ccffb DS	237	{
	238	int err = 0;
	239	int tmp;
	240
	241	/* step 1: make sure trigger sources are trivially valid */
	242
	243	tmp = cmd->start_src;
	244	cmd->start_src &= TRIG_NOW;
	245	if (!cmd->start_src \|\| tmp != cmd->start_src)
	246	err++;
	247
	248	tmp = cmd->scan_begin_src;
	249	cmd->scan_begin_src &= TRIG_OTHER;
	250	if (!cmd->scan_begin_src \|\| tmp != cmd->scan_begin_src)
	251	err++;
	252
	253	tmp = cmd->convert_src;
	254	cmd->convert_src &= TRIG_FOLLOW;
	255	if (!cmd->convert_src \|\| tmp != cmd->convert_src)
	256	err++;
	257
	258	tmp = cmd->scan_end_src;
	259	cmd->scan_end_src &= TRIG_COUNT;
	260	if (!cmd->scan_end_src \|\| tmp != cmd->scan_end_src)
	261	err++;
	262
	263	tmp = cmd->stop_src;
	264	cmd->stop_src &= TRIG_COUNT;
	265	if (!cmd->stop_src \|\| tmp != cmd->stop_src)
	266	err++;
	267
	268	if (err)
	269	return 1;
	270
	271	/* step 2: make sure trigger sources are unique and mutually compatible */
	272
	273	if (err)
	274	return 2;
	275
	276	/* step 3: make sure arguments are trivially compatible */
	277
	278	if (cmd->start_arg != 0) {
	279	cmd->start_arg = 0;
	280	err++;
	281	}
	282	if (cmd->scan_begin_arg != 0) {
	283	cmd->scan_begin_arg = 0;
	284	err++;
	285	}
	286	if (cmd->convert_arg != 0) {
	287	cmd->convert_arg = 0;
	288	err++;
	289	}
	290
	291	if (cmd->scan_end_arg != 1) {
	292	cmd->scan_end_arg = 1;
	293	err++;
	294	}
	295	if (cmd->stop_arg != 0) {
	296	cmd->stop_arg = 0;
	297	err++;
	298	}
	299
	300	if (err)
301	return 3;
302
303	/* step 4: fix up any arguments */
304
305	if (err)
306	return 4;
307
308	return 0;
309	}
310
34c43922	311	static int ni6527_intr_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
ef2ccffb	312	{
ea6d0d4c	313	//struct comedi_cmd *cmd = &s->async->cmd;
ef2ccffb DS	314
	315	writeb(ClrEdge \| ClrOverflow,
	316	devpriv->mite->daq_io_addr + Clear_Register);
	317	writeb(FallingEdgeIntEnable \| RisingEdgeIntEnable \|
	318	MasterInterruptEnable \| EdgeIntEnable,
	319	devpriv->mite->daq_io_addr + Master_Interrupt_Control);
	320
	321	return 0;
	322	}
	323
34c43922	324	static int ni6527_intr_cancel(struct comedi_device * dev, struct comedi_subdevice * s)
ef2ccffb DS	325	{
	326	writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
	327
	328	return 0;
	329	}
	330
34c43922	331	static int ni6527_intr_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
90035c08	332	struct comedi_insn * insn, unsigned int * data)
ef2ccffb DS	333	{
	334	if (insn->n < 1)
	335	return -EINVAL;
	336
	337	data[1] = 0;
	338	return 2;
	339	}
	340
34c43922	341	static int ni6527_intr_insn_config(struct comedi_device * dev, struct comedi_subdevice * s,
90035c08	342	struct comedi_insn * insn, unsigned int * data)
ef2ccffb DS	343	{
	344	if (insn->n < 1)
	345	return -EINVAL;
	346	if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
	347	return -EINVAL;
	348
	349	writeb(data[1],
	350	devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0));
	351	writeb(data[1] >> 8,
	352	devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1));
	353	writeb(data[1] >> 16,
	354	devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2));
	355
	356	writeb(data[2],
	357	devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0));
	358	writeb(data[2] >> 8,
	359	devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1));
	360	writeb(data[2] >> 16,
	361	devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2));
	362
	363	return 2;
	364	}
	365
0707bb04	366	static int ni6527_attach(struct comedi_device * dev, struct comedi_devconfig * it)
ef2ccffb	367	{
34c43922	368	struct comedi_subdevice *s;
ef2ccffb DS	369	int ret;
	370
	371	printk("comedi%d: ni6527:", dev->minor);
	372
	373	if ((ret = alloc_private(dev, sizeof(ni6527_private))) < 0)
	374	return ret;
	375
	376	ret = ni6527_find_device(dev, it->options[0], it->options[1]);
	377	if (ret < 0)
	378	return ret;
	379
	380	ret = mite_setup(devpriv->mite);
	381	if (ret < 0) {
	382	printk("error setting up mite\n");
	383	return ret;
	384	}
	385
	386	dev->board_name = this_board->name;
	387	printk(" %s", dev->board_name);
	388
	389	printk(" ID=0x%02x", readb(devpriv->mite->daq_io_addr + ID_Register));
	390
	391	if ((ret = alloc_subdevices(dev, 3)) < 0)
	392	return ret;
	393
	394	s = dev->subdevices + 0;
	395	s->type = COMEDI_SUBD_DI;
	396	s->subdev_flags = SDF_READABLE;
	397	s->n_chan = 24;
	398	s->range_table = &range_digital;
	399	s->maxdata = 1;
	400	s->insn_config = ni6527_di_insn_config;
	401	s->insn_bits = ni6527_di_insn_bits;
	402
	403	s = dev->subdevices + 1;
	404	s->type = COMEDI_SUBD_DO;
	405	s->subdev_flags = SDF_READABLE \| SDF_WRITABLE;
	406	s->n_chan = 24;
	407	s->range_table = &range_unknown; /* FIXME: actually conductance */
	408	s->maxdata = 1;
	409	s->insn_bits = ni6527_do_insn_bits;
	410
	411	s = dev->subdevices + 2;
	412	dev->read_subdev = s;
	413	s->type = COMEDI_SUBD_DI;
	414	s->subdev_flags = SDF_READABLE \| SDF_CMD_READ;
	415	s->n_chan = 1;
	416	s->range_table = &range_unknown;
	417	s->maxdata = 1;
	418	s->do_cmdtest = ni6527_intr_cmdtest;
	419	s->do_cmd = ni6527_intr_cmd;
	420	s->cancel = ni6527_intr_cancel;
	421	s->insn_bits = ni6527_intr_insn_bits;
	422	s->insn_config = ni6527_intr_insn_config;
	423
	424	writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0));
	425	writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1));
	426	writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2));
	427
	428	writeb(ClrEdge \| ClrOverflow \| ClrFilter \| ClrInterval,
	429	devpriv->mite->daq_io_addr + Clear_Register);
	430	writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
	431
	432	ret = comedi_request_irq(mite_irq(devpriv->mite), ni6527_interrupt,
433	IRQF_SHARED, "ni6527", dev);
434	if (ret < 0) {
435	printk(" irq not available");
436	} else
437	dev->irq = mite_irq(devpriv->mite);
438
439	printk("\n");
440
441	return 0;
442	}
443
71b5f4f1	444	static int ni6527_detach(struct comedi_device * dev)
ef2ccffb DS	445	{
	446	if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) {
	447	writeb(0x00,
	448	devpriv->mite->daq_io_addr + Master_Interrupt_Control);
	449	}
	450
	451	if (dev->irq) {
	452	comedi_free_irq(dev->irq, dev);
	453	}
	454
	455	if (devpriv && devpriv->mite) {
	456	mite_unsetup(devpriv->mite);
	457	}
	458
	459	return 0;
	460	}
	461
71b5f4f1	462	static int ni6527_find_device(struct comedi_device * dev, int bus, int slot)
ef2ccffb DS	463	{
	464	struct mite_struct *mite;
	465	int i;
	466
	467	for (mite = mite_devices; mite; mite = mite->next) {
	468	if (mite->used)
	469	continue;
	470	if (bus \|\| slot) {
	471	if (bus != mite->pcidev->bus->number \|\|
	472	slot != PCI_SLOT(mite->pcidev->devfn))
	473	continue;
	474	}
	475	for (i = 0; i < n_ni6527_boards; i++) {
	476	if (mite_device_id(mite) == ni6527_boards[i].dev_id) {
	477	dev->board_ptr = ni6527_boards + i;
	478	devpriv->mite = mite;
	479	return 0;
	480	}
	481	}
	482	}
	483	printk("no device found\n");
	484	mite_list_devices();
	485	return -EIO;
	486	}
	487
	488	COMEDI_PCI_INITCLEANUP(driver_ni6527, ni6527_pci_table);