[deliverable/linux.git] / drivers / staging / comedi / drivers / ni_at_ao.c

/*
    comedi/drivers/ni_at_ao.c
    Driver for NI AT-AO-6/10 boards

    COMEDI - Linux Control and Measurement Device Interface
    Copyright (C) 2000,2002 David A. Schleef <ds@schleef.org>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

*/
/*
Driver: ni_at_ao
Description: National Instruments AT-AO-6/10
Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10)
Status: should work
Author: ds
Updated: Sun Dec 26 12:26:28 EST 2004

Configuration options:
  [0] - I/O port base address
  [1] - IRQ (unused)
  [2] - DMA (unused)
  [3] - analog output range, set by jumpers on hardware (0 for -10 to 10V
	bipolar, 1 for 0V to 10V unipolar)

*/
/*
 * Register-level programming information can be found in NI
 * document 320379.pdf.
 */

#include "../comedidev.h"

#include <linux/ioport.h>

/* board egisters */
/* registers with _2_ are accessed when GRP2WR is set in CFG1 */

#define ATAO_SIZE 0x20

#define ATAO_2_DMATCCLR		0x00	/* W 16 */
#define ATAO_DIN		0x00	/* R 16 */
#define ATAO_DOUT		0x00	/* W 16 */

#define ATAO_CFG2		0x02	/* W 16 */
#define CALLD1	0x8000
#define CALLD0	0x4000
#define FFRTEN	0x2000
#define DAC2S8	0x1000
#define DAC2S6	0x0800
#define DAC2S4	0x0400
#define DAC2S2	0x0200
#define DAC2S0	0x0100
#define LDAC8		0x0080
#define LDAC6		0x0040
#define LDAC4		0x0020
#define LDAC2		0x0010
#define LDAC0		0x0008
#define PROMEN	0x0004
#define SCLK		0x0002
#define SDATA		0x0001

#define ATAO_2_INT1CLR		0x02	/* W 16 */

#define ATAO_CFG3		0x04	/* W 16 */
#define DMAMODE	0x0040
#define CLKOUT	0x0020
#define RCLKEN	0x0010
#define DOUTEN2	0x0008
#define DOUTEN1	0x0004
#define EN2_5V	0x0002
#define SCANEN	0x0001

#define ATAO_2_INT2CLR		0x04	/* W 16 */

#define ATAO_82C53_BASE		0x06	/* RW 8 */

#define ATAO_82C53_CNTR1	0x06	/* RW 8 */
#define ATAO_82C53_CNTR2	0x07	/* RW 8 */
#define ATAO_82C53_CNTR3	0x08	/* RW 8 */
#define ATAO_82C53_CNTRCMD	0x09	/* W 8 */
#define CNTRSEL1	0x80
#define CNTRSEL0	0x40
#define RWSEL1	0x20
#define RWSEL0	0x10
#define MODESEL2	0x08
#define MODESEL1	0x04
#define MODESEL0	0x02
#define BCDSEL	0x01
  /* read-back command */
#define COUNT		0x20
#define STATUS	0x10
#define CNTR3		0x08
#define CNTR2		0x04
#define CNTR1		0x02
  /* status */
#define OUT		0x80
#define _NULL		0x40
#define RW1		0x20
#define RW0		0x10
#define MODE2		0x08
#define MODE1		0x04
#define MODE0		0x02
#define BCD		0x01

#define ATAO_2_RTSISHFT		0x06	/* W 8 */
#define RSI		0x01

#define ATAO_2_RTSISTRB		0x07	/* W 8 */

#define ATAO_CFG1		0x0a	/* W 16 */
#define EXTINT2EN	0x8000
#define EXTINT1EN	0x4000
#define CNTINT2EN	0x2000
#define CNTINT1EN	0x1000
#define TCINTEN	0x0800
#define CNT1SRC	0x0400
#define CNT2SRC	0x0200
#define FIFOEN	0x0100
#define GRP2WR	0x0080
#define EXTUPDEN	0x0040
#define DMARQ		0x0020
#define DMAEN		0x0010
#define CH_mask	0x000f
#define ATAO_STATUS		0x0a	/* R 16 */
#define FH		0x0040
#define FE		0x0020
#define FF		0x0010
#define INT2		0x0008
#define INT1		0x0004
#define TCINT		0x0002
#define PROMOUT	0x0001

#define ATAO_FIFO_WRITE		0x0c	/* W 16 */
#define ATAO_FIFO_CLEAR		0x0c	/* R 16 */
#define ATAO_DACn(x)		(0x0c + 2*(x))	/* W */

/*
 * Board descriptions for two imaginary boards.  Describing the
 * boards in this way is optional, and completely driver-dependent.
 * Some drivers use arrays such as this, other do not.
 */
struct atao_board {
	const char *name;
	int n_ao_chans;
};

struct atao_private {

	unsigned short cfg1;
	unsigned short cfg2;
	unsigned short cfg3;

	/* Used for AO readback */
	unsigned int ao_readback[10];
};

static void atao_reset(struct comedi_device *dev)
{
	struct atao_private *devpriv = dev->private;

	/* This is the reset sequence described in the manual */

	devpriv->cfg1 = 0;
	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);

	outb(RWSEL0 | MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
	outb(0x03, dev->iobase + ATAO_82C53_CNTR1);
	outb(CNTRSEL0 | RWSEL0 | MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);

	devpriv->cfg2 = 0;
	outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);

	devpriv->cfg3 = 0;
	outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);

	inw(dev->iobase + ATAO_FIFO_CLEAR);

	devpriv->cfg1 |= GRP2WR;
	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);

	outw(0, dev->iobase + ATAO_2_INT1CLR);
	outw(0, dev->iobase + ATAO_2_INT2CLR);
	outw(0, dev->iobase + ATAO_2_DMATCCLR);

	devpriv->cfg1 &= ~GRP2WR;
	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
}

static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
			 struct comedi_insn *insn, unsigned int *data)
{
	struct atao_private *devpriv = dev->private;
	int i;
	int chan = CR_CHAN(insn->chanspec);
	short bits;

	for (i = 0; i < insn->n; i++) {
		bits = data[i] - 0x800;
		if (chan == 0) {
			devpriv->cfg1 |= GRP2WR;
			outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
		}
		outw(bits, dev->iobase + ATAO_DACn(chan));
		if (chan == 0) {
			devpriv->cfg1 &= ~GRP2WR;
			outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
		}
		devpriv->ao_readback[chan] = data[i];
	}

	return i;
}

static int atao_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
			 struct comedi_insn *insn, unsigned int *data)
{
	struct atao_private *devpriv = dev->private;
	int i;
	int chan = CR_CHAN(insn->chanspec);

	for (i = 0; i < insn->n; i++)
		data[i] = devpriv->ao_readback[chan];

	return i;
}

static int atao_dio_insn_bits(struct comedi_device *dev,
			      struct comedi_subdevice *s,
			      struct comedi_insn *insn, unsigned int *data)
{
	if (data[0]) {
		s->state &= ~data[0];
		s->state |= data[0] & data[1];
		outw(s->state, dev->iobase + ATAO_DOUT);
	}

	data[1] = inw(dev->iobase + ATAO_DIN);

	return insn->n;
}

static int atao_dio_insn_config(struct comedi_device *dev,
				struct comedi_subdevice *s,
				struct comedi_insn *insn, unsigned int *data)
{
	struct atao_private *devpriv = dev->private;
	int chan = CR_CHAN(insn->chanspec);
	unsigned int mask, bit;

	/* The input or output configuration of each digital line is
	 * configured by a special insn_config instruction.  chanspec
	 * contains the channel to be changed, and data[0] contains the
	 * value COMEDI_INPUT or COMEDI_OUTPUT. */

	mask = (chan < 4) ? 0x0f : 0xf0;
	bit = (chan < 4) ? DOUTEN1 : DOUTEN2;

	switch (data[0]) {
	case INSN_CONFIG_DIO_OUTPUT:
		s->io_bits |= mask;
		devpriv->cfg3 |= bit;
		break;
	case INSN_CONFIG_DIO_INPUT:
		s->io_bits &= ~mask;
		devpriv->cfg3 &= ~bit;
		break;
	case INSN_CONFIG_DIO_QUERY:
		data[1] =
		    (s->io_bits & (1 << chan)) ? COMEDI_OUTPUT : COMEDI_INPUT;
		return insn->n;
		break;
	default:
		return -EINVAL;
		break;
	}

	outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);

	return 1;
}

/*
 * Figure 2-1 in the manual shows 3 chips labeled DAC8800, which
 * are 8-channel 8-bit DACs.  These are most likely the calibration
 * DACs.  It is not explicitly stated in the manual how to access
 * the caldacs, but we can guess.
 */
static int atao_calib_insn_read(struct comedi_device *dev,
				struct comedi_subdevice *s,
				struct comedi_insn *insn, unsigned int *data)
{
	int i;
	for (i = 0; i < insn->n; i++)
		data[i] = 0;	/* XXX */
	return insn->n;
}

static int atao_calib_insn_write(struct comedi_device *dev,
				 struct comedi_subdevice *s,
				 struct comedi_insn *insn, unsigned int *data)
{
	struct atao_private *devpriv = dev->private;
	unsigned int bitstring, bit;
	unsigned int chan = CR_CHAN(insn->chanspec);

	bitstring = ((chan & 0x7) << 8) | (data[insn->n - 1] & 0xff);

	for (bit = 1 << (11 - 1); bit; bit >>= 1) {
		outw(devpriv->cfg2 | ((bit & bitstring) ? SDATA : 0),
		     dev->iobase + ATAO_CFG2);
		outw(devpriv->cfg2 | SCLK | ((bit & bitstring) ? SDATA : 0),
		     dev->iobase + ATAO_CFG2);
	}
	/* strobe the appropriate caldac */
	outw(devpriv->cfg2 | (((chan >> 3) + 1) << 14),
	     dev->iobase + ATAO_CFG2);
	outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);

	return insn->n;
}

static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
{
	const struct atao_board *board = comedi_board(dev);
	struct atao_private *devpriv;
	struct comedi_subdevice *s;
	unsigned long iobase;
	int ao_unipolar;
	int ret;

	iobase = it->options[0];
	if (iobase == 0)
		iobase = 0x1c0;
	ao_unipolar = it->options[3];

	printk(KERN_INFO "comedi%d: ni_at_ao: 0x%04lx", dev->minor, iobase);

	if (!request_region(iobase, ATAO_SIZE, "ni_at_ao")) {
		printk(" I/O port conflict\n");
		return -EIO;
	}
	dev->iobase = iobase;

	dev->board_name = board->name;

	devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
	if (!devpriv)
		return -ENOMEM;
	dev->private = devpriv;

	ret = comedi_alloc_subdevices(dev, 4);
	if (ret)
		return ret;

	s = &dev->subdevices[0];
	/* analog output subdevice */
	s->type = COMEDI_SUBD_AO;
	s->subdev_flags = SDF_WRITABLE;
	s->n_chan = board->n_ao_chans;
	s->maxdata = (1 << 12) - 1;
	if (ao_unipolar)
		s->range_table = &range_unipolar10;
	else
		s->range_table = &range_bipolar10;
	s->insn_write = &atao_ao_winsn;
	s->insn_read = &atao_ao_rinsn;

	s = &dev->subdevices[1];
	/* digital i/o subdevice */
	s->type = COMEDI_SUBD_DIO;
	s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
	s->n_chan = 8;
	s->maxdata = 1;
	s->range_table = &range_digital;
	s->insn_bits = atao_dio_insn_bits;
	s->insn_config = atao_dio_insn_config;

	s = &dev->subdevices[2];
	/* caldac subdevice */
	s->type = COMEDI_SUBD_CALIB;
	s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL;
	s->n_chan = 21;
	s->maxdata = 0xff;
	s->insn_read = atao_calib_insn_read;
	s->insn_write = atao_calib_insn_write;

	s = &dev->subdevices[3];
	/* eeprom subdevice */
	/* s->type=COMEDI_SUBD_EEPROM; */
	s->type = COMEDI_SUBD_UNUSED;

	atao_reset(dev);

	printk(KERN_INFO "\n");

	return 0;
}

static void atao_detach(struct comedi_device *dev)
{
	if (dev->iobase)
		release_region(dev->iobase, ATAO_SIZE);
}

static const struct atao_board atao_boards[] = {
	{
		.name		= "ai-ao-6",
		.n_ao_chans	= 6,
	}, {
		.name		= "ai-ao-10",
		.n_ao_chans	= 10,
	},
};

static struct comedi_driver ni_at_ao_driver = {
	.driver_name	= "ni_at_ao",
	.module		= THIS_MODULE,
	.attach		= atao_attach,
	.detach		= atao_detach,
	.board_name	= &atao_boards[0].name,
	.offset		= sizeof(struct atao_board),
	.num_names	= ARRAY_SIZE(atao_boards),
};
module_comedi_driver(ni_at_ao_driver);

MODULE_AUTHOR("Comedi http://www.comedi.org");
MODULE_DESCRIPTION("Comedi low-level driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
6a9d800f DS	1	/*
	2	comedi/drivers/ni_at_ao.c
	3	Driver for NI AT-AO-6/10 boards
	4
	5	COMEDI - Linux Control and Measurement Device Interface
	6	Copyright (C) 2000,2002 David A. Schleef <ds@schleef.org>
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 2 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program; if not, write to the Free Software
	20	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21
	22	*/
	23	/*
	24	Driver: ni_at_ao
	25	Description: National Instruments AT-AO-6/10
	26	Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10)
	27	Status: should work
	28	Author: ds
	29	Updated: Sun Dec 26 12:26:28 EST 2004
	30
	31	Configuration options:
	32	[0] - I/O port base address
	33	[1] - IRQ (unused)
	34	[2] - DMA (unused)
d1a04408 AR	35	[3] - analog output range, set by jumpers on hardware (0 for -10 to 10V
d1a04408 AR	36	bipolar, 1 for 0V to 10V unipolar)
6a9d800f DS	37
	38	*/
	39	/*
	40	* Register-level programming information can be found in NI
	41	* document 320379.pdf.
	42	*/
	43
	44	#include "../comedidev.h"
	45
	46	#include <linux/ioport.h>
	47
	48	/* board egisters */
	49	/* registers with _2_ are accessed when GRP2WR is set in CFG1 */
	50
	51	#define ATAO_SIZE 0x20
	52
	53	#define ATAO_2_DMATCCLR 0x00 /* W 16 */
	54	#define ATAO_DIN 0x00 /* R 16 */
	55	#define ATAO_DOUT 0x00 /* W 16 */
	56
	57	#define ATAO_CFG2 0x02 /* W 16 */
	58	#define CALLD1 0x8000
	59	#define CALLD0 0x4000
	60	#define FFRTEN 0x2000
	61	#define DAC2S8 0x1000
	62	#define DAC2S6 0x0800
	63	#define DAC2S4 0x0400
	64	#define DAC2S2 0x0200
	65	#define DAC2S0 0x0100
	66	#define LDAC8 0x0080
	67	#define LDAC6 0x0040
	68	#define LDAC4 0x0020
	69	#define LDAC2 0x0010
	70	#define LDAC0 0x0008
	71	#define PROMEN 0x0004
	72	#define SCLK 0x0002
	73	#define SDATA 0x0001
	74
	75	#define ATAO_2_INT1CLR 0x02 /* W 16 */
	76
	77	#define ATAO_CFG3 0x04 /* W 16 */
	78	#define DMAMODE 0x0040
	79	#define CLKOUT 0x0020
	80	#define RCLKEN 0x0010
	81	#define DOUTEN2 0x0008
	82	#define DOUTEN1 0x0004
	83	#define EN2_5V 0x0002
	84	#define SCANEN 0x0001
	85
	86	#define ATAO_2_INT2CLR 0x04 /* W 16 */
	87
	88	#define ATAO_82C53_BASE 0x06 /* RW 8 */
	89
	90	#define ATAO_82C53_CNTR1 0x06 /* RW 8 */
	91	#define ATAO_82C53_CNTR2 0x07 /* RW 8 */
	92	#define ATAO_82C53_CNTR3 0x08 /* RW 8 */
	93	#define ATAO_82C53_CNTRCMD 0x09 /* W 8 */
	94	#define CNTRSEL1 0x80
	95	#define CNTRSEL0 0x40
	96	#define RWSEL1 0x20
	97	#define RWSEL0 0x10
	98	#define MODESEL2 0x08
	99	#define MODESEL1 0x04
	100	#define MODESEL0 0x02
101	#define BCDSEL 0x01
102	/* read-back command */
103	#define COUNT 0x20
104	#define STATUS 0x10
105	#define CNTR3 0x08
106	#define CNTR2 0x04
107	#define CNTR1 0x02
108	/* status */
109	#define OUT 0x80
110	#define _NULL 0x40
111	#define RW1 0x20
112	#define RW0 0x10
113	#define MODE2 0x08
114	#define MODE1 0x04
115	#define MODE0 0x02
116	#define BCD 0x01
117
118	#define ATAO_2_RTSISHFT 0x06 /* W 8 */
119	#define RSI 0x01
120
121	#define ATAO_2_RTSISTRB 0x07 /* W 8 */
122
123	#define ATAO_CFG1 0x0a /* W 16 */
124	#define EXTINT2EN 0x8000
125	#define EXTINT1EN 0x4000
126	#define CNTINT2EN 0x2000
127	#define CNTINT1EN 0x1000
128	#define TCINTEN 0x0800
129	#define CNT1SRC 0x0400
130	#define CNT2SRC 0x0200
131	#define FIFOEN 0x0100
132	#define GRP2WR 0x0080
133	#define EXTUPDEN 0x0040
134	#define DMARQ 0x0020
135	#define DMAEN 0x0010
136	#define CH_mask 0x000f
137	#define ATAO_STATUS 0x0a /* R 16 */
138	#define FH 0x0040
139	#define FE 0x0020
140	#define FF 0x0010
141	#define INT2 0x0008
142	#define INT1 0x0004
143	#define TCINT 0x0002
144	#define PROMOUT 0x0001
145
146	#define ATAO_FIFO_WRITE 0x0c /* W 16 */
147	#define ATAO_FIFO_CLEAR 0x0c /* R 16 */
148	#define ATAO_DACn(x) (0x0c + 2(x)) / W */
149
150	/*
151	* Board descriptions for two imaginary boards. Describing the
152	* boards in this way is optional, and completely driver-dependent.
153	* Some drivers use arrays such as this, other do not.
154	*/
01983c39	155	struct atao_board {
6a9d800f DS	156	const char *name;
6a9d800f DS	157	int n_ao_chans;
01983c39 BP	158	};
01983c39 BP	159
75b80739 BP	160	struct atao_private {
75b80739 BP	161
6a9d800f DS	162	unsigned short cfg1;
	163	unsigned short cfg2;
	164	unsigned short cfg3;
	165
	166	/* Used for AO readback */
790c5541	167	unsigned int ao_readback[10];
75b80739 BP	168	};
75b80739 BP	169
da91b269	170	static void atao_reset(struct comedi_device *dev)
6a9d800f	171	{
9a1a6cf8 HS	172	struct atao_private *devpriv = dev->private;
9a1a6cf8 HS	173
6a9d800f DS	174	/* This is the reset sequence described in the manual */
	175
	176	devpriv->cfg1 = 0;
	177	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
	178
	179	outb(RWSEL0 \| MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
	180	outb(0x03, dev->iobase + ATAO_82C53_CNTR1);
	181	outb(CNTRSEL0 \| RWSEL0 \| MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
	182
	183	devpriv->cfg2 = 0;
	184	outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
	185
	186	devpriv->cfg3 = 0;
	187	outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);
	188
	189	inw(dev->iobase + ATAO_FIFO_CLEAR);
	190
	191	devpriv->cfg1 \|= GRP2WR;
	192	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
	193
	194	outw(0, dev->iobase + ATAO_2_INT1CLR);
	195	outw(0, dev->iobase + ATAO_2_INT2CLR);
	196	outw(0, dev->iobase + ATAO_2_DMATCCLR);
	197
	198	devpriv->cfg1 &= ~GRP2WR;
	199	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
	200	}
	201
da91b269	202	static int atao_ao_winsn(struct comedi_device dev, struct comedi_subdevice s,
0a85b6f0	203	struct comedi_insn insn, unsigned int data)
6a9d800f	204	{
9a1a6cf8	205	struct atao_private *devpriv = dev->private;
6a9d800f DS	206	int i;
	207	int chan = CR_CHAN(insn->chanspec);
	208	short bits;
	209
	210	for (i = 0; i < insn->n; i++) {
	211	bits = data[i] - 0x800;
	212	if (chan == 0) {
	213	devpriv->cfg1 \|= GRP2WR;
	214	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
	215	}
	216	outw(bits, dev->iobase + ATAO_DACn(chan));
	217	if (chan == 0) {
	218	devpriv->cfg1 &= ~GRP2WR;
	219	outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
	220	}
	221	devpriv->ao_readback[chan] = data[i];
	222	}
	223
	224	return i;
	225	}
	226
da91b269	227	static int atao_ao_rinsn(struct comedi_device dev, struct comedi_subdevice s,
0a85b6f0	228	struct comedi_insn insn, unsigned int data)
6a9d800f	229	{
9a1a6cf8	230	struct atao_private *devpriv = dev->private;
6a9d800f DS	231	int i;
	232	int chan = CR_CHAN(insn->chanspec);
	233
	234	for (i = 0; i < insn->n; i++)
	235	data[i] = devpriv->ao_readback[chan];
	236
	237	return i;
	238	}
	239
0a85b6f0 MT	240	static int atao_dio_insn_bits(struct comedi_device *dev,
	241	struct comedi_subdevice *s,
	242	struct comedi_insn insn, unsigned int data)
6a9d800f	243	{
6a9d800f DS	244	if (data[0]) {
	245	s->state &= ~data[0];
	246	s->state \|= data[0] & data[1];
	247	outw(s->state, dev->iobase + ATAO_DOUT);
	248	}
	249
	250	data[1] = inw(dev->iobase + ATAO_DIN);
	251
a2714e3e	252	return insn->n;
6a9d800f DS	253	}
6a9d800f DS	254
0a85b6f0 MT	255	static int atao_dio_insn_config(struct comedi_device *dev,
	256	struct comedi_subdevice *s,
	257	struct comedi_insn insn, unsigned int data)
6a9d800f	258	{
9a1a6cf8	259	struct atao_private *devpriv = dev->private;
6a9d800f DS	260	int chan = CR_CHAN(insn->chanspec);
	261	unsigned int mask, bit;
	262
	263	/* The input or output configuration of each digital line is
	264	* configured by a special insn_config instruction. chanspec
	265	* contains the channel to be changed, and data[0] contains the
	266	* value COMEDI_INPUT or COMEDI_OUTPUT. */
	267
	268	mask = (chan < 4) ? 0x0f : 0xf0;
	269	bit = (chan < 4) ? DOUTEN1 : DOUTEN2;
	270
	271	switch (data[0]) {
	272	case INSN_CONFIG_DIO_OUTPUT:
	273	s->io_bits \|= mask;
	274	devpriv->cfg3 \|= bit;
	275	break;
	276	case INSN_CONFIG_DIO_INPUT:
	277	s->io_bits &= ~mask;
	278	devpriv->cfg3 &= ~bit;
	279	break;
	280	case INSN_CONFIG_DIO_QUERY:
	281	data[1] =
0a85b6f0	282	(s->io_bits & (1 << chan)) ? COMEDI_OUTPUT : COMEDI_INPUT;
6a9d800f DS	283	return insn->n;
	284	break;
	285	default:
	286	return -EINVAL;
	287	break;
	288	}
	289
	290	outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);
	291
	292	return 1;
	293	}
	294
	295	/*
	296	* Figure 2-1 in the manual shows 3 chips labeled DAC8800, which
	297	* are 8-channel 8-bit DACs. These are most likely the calibration
	298	* DACs. It is not explicitly stated in the manual how to access
	299	* the caldacs, but we can guess.
	300	*/
0a85b6f0 MT	301	static int atao_calib_insn_read(struct comedi_device *dev,
	302	struct comedi_subdevice *s,
	303	struct comedi_insn insn, unsigned int data)
6a9d800f DS	304	{
6a9d800f DS	305	int i;
d1a04408	306	for (i = 0; i < insn->n; i++)
6a9d800f	307	data[i] = 0; /* XXX */
6a9d800f DS	308	return insn->n;
	309	}
	310
0a85b6f0 MT	311	static int atao_calib_insn_write(struct comedi_device *dev,
	312	struct comedi_subdevice *s,
	313	struct comedi_insn insn, unsigned int data)
6a9d800f	314	{
9a1a6cf8	315	struct atao_private *devpriv = dev->private;
6a9d800f DS	316	unsigned int bitstring, bit;
	317	unsigned int chan = CR_CHAN(insn->chanspec);
	318
	319	bitstring = ((chan & 0x7) << 8) \| (data[insn->n - 1] & 0xff);
	320
	321	for (bit = 1 << (11 - 1); bit; bit >>= 1) {
	322	outw(devpriv->cfg2 \| ((bit & bitstring) ? SDATA : 0),
0a85b6f0	323	dev->iobase + ATAO_CFG2);
6a9d800f	324	outw(devpriv->cfg2 \| SCLK \| ((bit & bitstring) ? SDATA : 0),
0a85b6f0	325	dev->iobase + ATAO_CFG2);
6a9d800f DS	326	}
	327	/* strobe the appropriate caldac */
	328	outw(devpriv->cfg2 \| (((chan >> 3) + 1) << 14),
0a85b6f0	329	dev->iobase + ATAO_CFG2);
6a9d800f DS	330	outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
	331
	332	return insn->n;
	333	}
90f703d3	334
b48ed623 HS	335	static int atao_attach(struct comedi_device dev, struct comedi_devconfig it)
b48ed623 HS	336	{
75b9ad9e	337	const struct atao_board *board = comedi_board(dev);
9a1a6cf8	338	struct atao_private *devpriv;
b48ed623 HS	339	struct comedi_subdevice *s;
	340	unsigned long iobase;
	341	int ao_unipolar;
8b6c5694	342	int ret;
b48ed623 HS	343
	344	iobase = it->options[0];
	345	if (iobase == 0)
	346	iobase = 0x1c0;
	347	ao_unipolar = it->options[3];
	348
	349	printk(KERN_INFO "comedi%d: ni_at_ao: 0x%04lx", dev->minor, iobase);
	350
	351	if (!request_region(iobase, ATAO_SIZE, "ni_at_ao")) {
	352	printk(" I/O port conflict\n");
	353	return -EIO;
	354	}
	355	dev->iobase = iobase;
	356
75b9ad9e	357	dev->board_name = board->name;
b48ed623	358
c34fa261 HS	359	devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
	360	if (!devpriv)
	361	return -ENOMEM;
	362	dev->private = devpriv;
b48ed623	363
8b6c5694 HS	364	ret = comedi_alloc_subdevices(dev, 4);
	365	if (ret)
	366	return ret;
b48ed623	367
66c5beee	368	s = &dev->subdevices[0];
b48ed623 HS	369	/* analog output subdevice */
	370	s->type = COMEDI_SUBD_AO;
	371	s->subdev_flags = SDF_WRITABLE;
75b9ad9e	372	s->n_chan = board->n_ao_chans;
b48ed623 HS	373	s->maxdata = (1 << 12) - 1;
	374	if (ao_unipolar)
	375	s->range_table = &range_unipolar10;
	376	else
	377	s->range_table = &range_bipolar10;
	378	s->insn_write = &atao_ao_winsn;
	379	s->insn_read = &atao_ao_rinsn;
	380
66c5beee	381	s = &dev->subdevices[1];
b48ed623 HS	382	/* digital i/o subdevice */
	383	s->type = COMEDI_SUBD_DIO;
	384	s->subdev_flags = SDF_READABLE \| SDF_WRITABLE;
	385	s->n_chan = 8;
	386	s->maxdata = 1;
	387	s->range_table = &range_digital;
	388	s->insn_bits = atao_dio_insn_bits;
	389	s->insn_config = atao_dio_insn_config;
	390
66c5beee	391	s = &dev->subdevices[2];
b48ed623 HS	392	/* caldac subdevice */
	393	s->type = COMEDI_SUBD_CALIB;
	394	s->subdev_flags = SDF_WRITABLE \| SDF_INTERNAL;
	395	s->n_chan = 21;
	396	s->maxdata = 0xff;
	397	s->insn_read = atao_calib_insn_read;
	398	s->insn_write = atao_calib_insn_write;
	399
66c5beee	400	s = &dev->subdevices[3];
b48ed623 HS	401	/* eeprom subdevice */
	402	/* s->type=COMEDI_SUBD_EEPROM; */
	403	s->type = COMEDI_SUBD_UNUSED;
	404
	405	atao_reset(dev);
	406
	407	printk(KERN_INFO "\n");
	408
	409	return 0;
	410	}
	411
484ecc95	412	static void atao_detach(struct comedi_device *dev)
b48ed623	413	{
b48ed623 HS	414	if (dev->iobase)
b48ed623 HS	415	release_region(dev->iobase, ATAO_SIZE);
b48ed623 HS	416	}
	417
	418	static const struct atao_board atao_boards[] = {
	419	{
	420	.name = "ai-ao-6",
	421	.n_ao_chans = 6,
	422	}, {
	423	.name = "ai-ao-10",
	424	.n_ao_chans = 10,
	425	},
	426	};
	427
	428	static struct comedi_driver ni_at_ao_driver = {
	429	.driver_name = "ni_at_ao",
	430	.module = THIS_MODULE,
	431	.attach = atao_attach,
	432	.detach = atao_detach,
	433	.board_name = &atao_boards[0].name,
	434	.offset = sizeof(struct atao_board),
	435	.num_names = ARRAY_SIZE(atao_boards),
	436	};
	437	module_comedi_driver(ni_at_ao_driver);
	438
90f703d3 AT	439	MODULE_AUTHOR("Comedi http://www.comedi.org");
	440	MODULE_DESCRIPTION("Comedi low-level driver");
	441	MODULE_LICENSE("GPL");