projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
staging: dgap: implement proper error handling in dgap_start()
[deliverable/linux.git] / drivers / staging / dgap / dgap.c
CommitLineData
c84b8b50
S		 1/*
2 * Copyright 2003 Digi International (www.digi.com)
3 * Scott H Kilau <Scott_Kilau at digi dot com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
818cc6fe 9 *
c84b8b50 10 * This program is distributed in the hope that it will be useful,
818cc6fe
MI		 11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
c84b8b50 13 * PURPOSE. See the GNU General Public License for more details.
818cc6fe 14 *
c84b8b50
S		 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 *
20 * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
21 *
22 * This is shared code between Digi's CVS archive and the
23 * Linux Kernel sources.
24 * Changing the source just for reformatting needlessly breaks
25 * our CVS diff history.
26 *
27 * Send any bug fixes/changes to: Eng.Linux at digi dot com.
28 * Thank you.
29 *
c84b8b50
S		 30 */
31
b28ec88a
MH		 32/*
33 * In the original out of kernel Digi dgap driver, firmware
34 * loading was done via user land to driver handshaking.
35 *
36 * For cards that support a concentrator (port expander),
37 * I believe the concentrator its self told the card which
38 * concentrator is actually attached and then that info
39 * was used to tell user land which concentrator firmware
40 * image was to be downloaded. I think even the BIOS or
41 * FEP images required could change with the connection
42 * of a particular concentrator.
43 *
44 * Since I have no access to any of these cards or
45 * concentrators, I cannot put the correct concentrator
46 * firmware file names into the firmware_info structure
47 * as is now done for the BIOS and FEP images.
48 *
49 * I think, but am not certain, that the cards supporting
50 * concentrators will function without them. So support
51 * of these cards has been left in this driver.
52 *
53 * In order to fully support those cards, they would
54 * either have to be acquired for dissection or maybe
55 * Digi International could provide some assistance.
56 */
57#undef DIGI_CONCENTRATORS_SUPPORTED
c84b8b50
S		 58
59#include <linux/kernel.h>
c84b8b50
S		 60#include <linux/module.h>
61#include <linux/pci.h>
62#include <linux/delay.h> /* For udelay */
351699d7 63#include <linux/slab.h>
3d9dc5db 64#include <linux/uaccess.h>
c84b8b50 65#include <linux/sched.h>
c84b8b50 66
a6792a3e
MH		 67#include <linux/interrupt.h> /* For tasklet and interrupt structs/defines */
68#include <linux/ctype.h>
69#include <linux/tty.h>
70#include <linux/tty_flip.h>
71#include <linux/serial_reg.h>
3d9dc5db 72#include <linux/io.h> /* For read[bwl]/write[bwl] */
a6792a3e 73
7568f7d3
MH		 74#include <linux/string.h>
75#include <linux/device.h>
76#include <linux/kdev_t.h>
b28ec88a 77#include <linux/firmware.h>
7568f7d3 78
ffc1c1da 79#include "dgap.h"
a6792a3e
MH		 80
81#define init_MUTEX(sem) sema_init(sem, 1)
82#define DECLARE_MUTEX(name) \
7d6069d7 83 struct semaphore name = __SEMAPHORE_INITIALIZER(name, 1)
c84b8b50
S		 84
85MODULE_LICENSE("GPL");
86MODULE_AUTHOR("Digi International, http://www.digi.com");
87MODULE_DESCRIPTION("Driver for the Digi International EPCA PCI based product line");
88MODULE_SUPPORTED_DEVICE("dgap");
89
c84b8b50
S		 90/**************************************************************************
91 *
92 * protos for this file
93 *
94 */
95
b115b024
MH		 96static int dgap_start(void);
97static void dgap_init_globals(void);
98static int dgap_found_board(struct pci_dev *pdev, int id);
99static void dgap_cleanup_board(struct board_t *brd);
100static void dgap_poll_handler(ulong dummy);
101static int dgap_init_pci(void);
102static int dgap_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
103static void dgap_remove_one(struct pci_dev *dev);
104static int dgap_probe1(struct pci_dev *pdev, int card_type);
105static int dgap_do_remap(struct board_t *brd);
106static irqreturn_t dgap_intr(int irq, void *voidbrd);
c84b8b50 107
a6792a3e
MH		 108/* Our function prototypes */
109static int dgap_tty_open(struct tty_struct *tty, struct file *file);
110static void dgap_tty_close(struct tty_struct *tty, struct file *file);
2f60b333
MH		 111static int dgap_block_til_ready(struct tty_struct *tty, struct file *file,
112 struct channel_t *ch);
113static int dgap_tty_ioctl(struct tty_struct *tty, unsigned int cmd,
114 unsigned long arg);
115static int dgap_tty_digigeta(struct tty_struct *tty,
116 struct digi_t __user *retinfo);
117static int dgap_tty_digiseta(struct tty_struct *tty,
118 struct digi_t __user *new_info);
a6792a3e
MH		 119static int dgap_tty_digigetedelay(struct tty_struct *tty, int __user *retinfo);
120static int dgap_tty_digisetedelay(struct tty_struct *tty, int __user *new_info);
5e9d8172
MH		 121static int dgap_tty_write_room(struct tty_struct *tty);
122static int dgap_tty_chars_in_buffer(struct tty_struct *tty);
a6792a3e
MH		 123static void dgap_tty_start(struct tty_struct *tty);
124static void dgap_tty_stop(struct tty_struct *tty);
125static void dgap_tty_throttle(struct tty_struct *tty);
126static void dgap_tty_unthrottle(struct tty_struct *tty);
127static void dgap_tty_flush_chars(struct tty_struct *tty);
128static void dgap_tty_flush_buffer(struct tty_struct *tty);
129static void dgap_tty_hangup(struct tty_struct *tty);
130static int dgap_wait_for_drain(struct tty_struct *tty);
2f60b333
MH		 131static int dgap_set_modem_info(struct tty_struct *tty, unsigned int command,
132 unsigned int __user *value);
133static int dgap_get_modem_info(struct channel_t *ch,
134 unsigned int __user *value);
135static int dgap_tty_digisetcustombaud(struct tty_struct *tty,
136 int __user *new_info);
137static int dgap_tty_digigetcustombaud(struct tty_struct *tty,
138 int __user *retinfo);
a6792a3e 139static int dgap_tty_tiocmget(struct tty_struct *tty);
2f60b333
MH		 140static int dgap_tty_tiocmset(struct tty_struct *tty, unsigned int set,
141 unsigned int clear);
a6792a3e
MH		 142static int dgap_tty_send_break(struct tty_struct *tty, int msec);
143static void dgap_tty_wait_until_sent(struct tty_struct *tty, int timeout);
2f60b333
MH		 144static int dgap_tty_write(struct tty_struct *tty, const unsigned char *buf,
145 int count);
146static void dgap_tty_set_termios(struct tty_struct *tty,
147 struct ktermios *old_termios);
a6792a3e
MH		 148static int dgap_tty_put_char(struct tty_struct *tty, unsigned char c);
149static void dgap_tty_send_xchar(struct tty_struct *tty, char ch);
150
b115b024 151static int dgap_tty_register(struct board_t *brd);
b115b024 152static int dgap_tty_init(struct board_t *);
b115b024
MH		 153static void dgap_tty_uninit(struct board_t *);
154static void dgap_carrier(struct channel_t *ch);
155static void dgap_input(struct channel_t *ch);
4aeafa87 156
b053bb86
MH		 157/*
158 * Our function prototypes from dgap_fep5
159 */
160static void dgap_cmdw_ext(struct channel_t *ch, u16 cmd, u16 word, uint ncmds);
161static int dgap_event(struct board_t *bd);
162
fe0ef8e6 163static void dgap_poll_tasklet(unsigned long data);
2f60b333
MH		 164static void dgap_cmdb(struct channel_t *ch, uchar cmd, uchar byte1,
165 uchar byte2, uint ncmds);
fe0ef8e6
MH		 166static void dgap_cmdw(struct channel_t *ch, uchar cmd, u16 word, uint ncmds);
167static void dgap_wmove(struct channel_t *ch, char *buf, uint cnt);
168static int dgap_param(struct tty_struct *tty);
2f60b333
MH		 169static void dgap_parity_scan(struct channel_t *ch, unsigned char *cbuf,
170 unsigned char *fbuf, int *len);
fe0ef8e6
MH		 171static uint dgap_get_custom_baud(struct channel_t *ch);
172static void dgap_firmware_reset_port(struct channel_t *ch);
173
69edaa21
MH		 174/*
175 * Function prototypes from dgap_parse.c.
176 */
177static int dgap_gettok(char **in, struct cnode *p);
178static char *dgap_getword(char **in);
179static char *dgap_savestring(char *s);
180static struct cnode *dgap_newnode(int t);
181static int dgap_checknode(struct cnode *p);
182static void dgap_err(char *s);
183
30580a78 184/*
7d6069d7
MH		 185 * Function prototypes from dgap_sysfs.h
186 */
30580a78
MH		 187struct board_t;
188struct channel_t;
189struct un_t;
190struct pci_driver;
191struct class_device;
192
fe0ef8e6
MH		 193static void dgap_create_ports_sysfiles(struct board_t *bd);
194static void dgap_remove_ports_sysfiles(struct board_t *bd);
30580a78 195
434b679b 196static int dgap_create_driver_sysfiles(struct pci_driver *);
fe0ef8e6 197static void dgap_remove_driver_sysfiles(struct pci_driver *);
30580a78 198
fe0ef8e6
MH		 199static void dgap_create_tty_sysfs(struct un_t *un, struct device *c);
200static void dgap_remove_tty_sysfs(struct device *c);
30580a78 201
9e9b3bb7
MH		 202/*
203 * Function prototypes from dgap_parse.h
204 */
fe0ef8e6
MH		 205static int dgap_parsefile(char **in, int Remove);
206static struct cnode *dgap_find_config(int type, int bus, int slot);
207static uint dgap_config_get_number_of_ports(struct board_t *bd);
208static char *dgap_create_config_string(struct board_t *bd, char *string);
fe0ef8e6
MH		 209static uint dgap_config_get_useintr(struct board_t *bd);
210static uint dgap_config_get_altpin(struct board_t *bd);
211
b115b024 212static int dgap_ms_sleep(ulong ms);
2f60b333
MH		 213static void dgap_do_bios_load(struct board_t *brd, uchar __user *ubios,
214 int len);
b115b024 215static void dgap_do_fep_load(struct board_t *brd, uchar __user *ufep, int len);
b28ec88a 216#ifdef DIGI_CONCENTRATORS_SUPPORTED
b115b024 217static void dgap_do_conc_load(struct board_t *brd, uchar *uaddr, int len);
b28ec88a 218#endif
b115b024
MH		 219static int dgap_after_config_loaded(int board);
220static int dgap_finalize_board_init(struct board_t *brd);
fe0ef8e6 221
b28ec88a
MH		 222static void dgap_get_vpd(struct board_t *brd);
223static void dgap_do_reset_board(struct board_t *brd);
224static void dgap_do_wait_for_bios(struct board_t *brd);
225static void dgap_do_wait_for_fep(struct board_t *brd);
6c8b84ef 226static int dgap_tty_register_ports(struct board_t *brd);
b28ec88a 227static int dgap_firmware_load(struct pci_dev *pdev, int card_type);
9e9b3bb7 228
01a8d255
MH		 229/* Driver unload function */
230static void dgap_cleanup_module(void);
c84b8b50 231
c84b8b50
S		 232module_exit(dgap_cleanup_module);
233
c84b8b50
S		 234/*
235 * File operations permitted on Control/Management major.
236 */
305ec874
MH		 237static const struct file_operations DgapBoardFops = {
238 .owner = THIS_MODULE,
c84b8b50
S		 239};
240
c84b8b50
S		 241/*
242 * Globals
243 */
b115b024
MH		 244static uint dgap_NumBoards;
245static struct board_t *dgap_Board[MAXBOARDS];
b115b024
MH		 246static ulong dgap_poll_counter;
247static char *dgap_config_buf;
248static int dgap_driver_state = DRIVER_INITIALIZED;
c84b8b50 249DEFINE_SPINLOCK(dgap_dl_lock);
b115b024
MH		 250static wait_queue_head_t dgap_dl_wait;
251static int dgap_dl_action;
252static int dgap_poll_tick = 20; /* Poll interval - 20 ms */
c84b8b50
S		 253
254/*
255 * Static vars.
256 */
b115b024 257static struct class *dgap_class;
c84b8b50 258
b115b024 259static struct board_t *dgap_BoardsByMajor[256];
b053bb86 260static uint dgap_count = 500;
a6792a3e 261
c84b8b50
S		 262/*
263 * Poller stuff
264 */
fe0ef8e6 265DEFINE_SPINLOCK(dgap_poll_lock); /* Poll scheduling lock */
b115b024
MH		 266static ulong dgap_poll_time; /* Time of next poll */
267static uint dgap_poll_stop; /* Used to tell poller to stop */
c84b8b50
S		 268static struct timer_list dgap_poll_timer;
269
b28ec88a
MH		 270/*
271 SUPPORTED PRODUCTS
272
273 Card Model Number of Ports Interface
274 ----------------------------------------------------------------
275 Acceleport Xem 4 - 64 (EIA232 & EIA422)
276 Acceleport Xr 4 & 8 (EIA232)
277 Acceleport Xr 920 4 & 8 (EIA232)
278 Acceleport C/X 8 - 128 (EIA232)
279 Acceleport EPC/X 8 - 224 (EIA232)
280 Acceleport Xr/422 4 & 8 (EIA422)
281 Acceleport 2r/920 2 (EIA232)
282 Acceleport 4r/920 4 (EIA232)
283 Acceleport 8r/920 8 (EIA232)
284
285 IBM 8-Port Asynchronous PCI Adapter (EIA232)
286 IBM 128-Port Asynchronous PCI Adapter (EIA232 & EIA422)
287*/
c84b8b50
S		 288
289static struct pci_device_id dgap_pci_tbl[] = {
2f60b333
MH		 290 { DIGI_VID, PCI_DEV_XEM_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
291 { DIGI_VID, PCI_DEV_CX_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
292 { DIGI_VID, PCI_DEV_CX_IBM_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
293 { DIGI_VID, PCI_DEV_EPCJ_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
294 { DIGI_VID, PCI_DEV_920_2_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
295 { DIGI_VID, PCI_DEV_920_4_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
296 { DIGI_VID, PCI_DEV_920_8_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
297 { DIGI_VID, PCI_DEV_XR_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
298 { DIGI_VID, PCI_DEV_XRJ_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
299 { DIGI_VID, PCI_DEV_XR_422_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
300 { DIGI_VID, PCI_DEV_XR_IBM_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
301 { DIGI_VID, PCI_DEV_XR_SAIP_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
302 { DIGI_VID, PCI_DEV_XR_BULL_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
303 { DIGI_VID, PCI_DEV_920_8_HP_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13 },
304 { DIGI_VID, PCI_DEV_XEM_HP_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 },
c84b8b50
S		 305 {0,} /* 0 terminated list. */
306};
307MODULE_DEVICE_TABLE(pci, dgap_pci_tbl);
308
c84b8b50
S		 309/*
310 * A generic list of Product names, PCI Vendor ID, and PCI Device ID.
311 */
312struct board_id {
313 uint config_type;
314 uchar *name;
315 uint maxports;
316 uint dpatype;
317};
318
305ec874 319static struct board_id dgap_Ids[] = {
2f60b333
MH		 320 { PPCM, PCI_DEV_XEM_NAME, 64, (T_PCXM|T_PCLITE|T_PCIBUS) },
321 { PCX, PCI_DEV_CX_NAME, 128, (T_CX|T_PCIBUS) },
322 { PCX, PCI_DEV_CX_IBM_NAME, 128, (T_CX|T_PCIBUS) },
323 { PEPC, PCI_DEV_EPCJ_NAME, 224, (T_EPC|T_PCIBUS) },
324 { APORT2_920P, PCI_DEV_920_2_NAME, 2, (T_PCXR|T_PCLITE|T_PCIBUS) },
325 { APORT4_920P, PCI_DEV_920_4_NAME, 4, (T_PCXR|T_PCLITE|T_PCIBUS) },
326 { APORT8_920P, PCI_DEV_920_8_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
327 { PAPORT8, PCI_DEV_XR_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
328 { PAPORT8, PCI_DEV_XRJ_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
329 { PAPORT8, PCI_DEV_XR_422_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
330 { PAPORT8, PCI_DEV_XR_IBM_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
331 { PAPORT8, PCI_DEV_XR_SAIP_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
332 { PAPORT8, PCI_DEV_XR_BULL_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
333 { APORT8_920P, PCI_DEV_920_8_HP_NAME, 8, (T_PCXR|T_PCLITE|T_PCIBUS) },
334 { PPCM, PCI_DEV_XEM_HP_NAME, 64, (T_PCXM|T_PCLITE|T_PCIBUS) },
c84b8b50
S		 335 {0,} /* 0 terminated list. */
336};
337
338static struct pci_driver dgap_driver = {
339 .name = "dgap",
340 .probe = dgap_init_one,
341 .id_table = dgap_pci_tbl,
342 .remove = dgap_remove_one,
343};
344
b28ec88a
MH		 345struct firmware_info {
346 uchar *conf_name; /* dgap.conf */
347 uchar *bios_name; /* BIOS filename */
348 uchar *fep_name; /* FEP filename */
349 uchar *con_name; /* Concentrator filename FIXME*/
350 int num; /* sequence number */
351};
352
353/*
354 * Firmware - BIOS, FEP, and CONC filenames
355 */
356static struct firmware_info fw_info[] = {
357 { "dgap/dgap.conf", "dgap/sxbios.bin", "dgap/sxfep.bin", 0, 0 },
358 { "dgap/dgap.conf", "dgap/cxpbios.bin", "dgap/cxpfep.bin", 0, 1 },
359 { "dgap/dgap.conf", "dgap/cxpbios.bin", "dgap/cxpfep.bin", 0, 2 },
360 { "dgap/dgap.conf", "dgap/pcibios.bin", "dgap/pcifep.bin", 0, 3 },
361 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 4 },
362 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 5 },
363 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 6 },
364 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 7 },
365 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 8 },
366 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 9 },
367 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 10 },
368 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 11 },
369 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 12 },
370 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", 0, 13 },
371 { "dgap/dgap.conf", "dgap/sxbios.bin", "dgap/sxfep.bin", 0, 14 },
372 {0,}
373};
c84b8b50 374
fe0ef8e6 375static char *dgap_driver_state_text[] = {
c84b8b50
S		 376 "Driver Initialized",
377 "Driver needs configuration load.",
378 "Driver requested configuration from download daemon.",
379 "Driver Ready."
380};
381
a6792a3e
MH		 382/*
383 * Default transparent print information.
384 */
385static struct digi_t dgap_digi_init = {
386 .digi_flags = DIGI_COOK, /* Flags */
387 .digi_maxcps = 100, /* Max CPS */
388 .digi_maxchar = 50, /* Max chars in print queue */
389 .digi_bufsize = 100, /* Printer buffer size */
390 .digi_onlen = 4, /* size of printer on string */
391 .digi_offlen = 4, /* size of printer off string */
392 .digi_onstr = "\033[5i", /* ANSI printer on string ] */
393 .digi_offstr = "\033[4i", /* ANSI printer off string ] */
394 .digi_term = "ansi" /* default terminal type */
395};
396
a6792a3e
MH		 397/*
398 * Define a local default termios struct. All ports will be created
399 * with this termios initially.
400 *
401 * This defines a raw port at 9600 baud, 8 data bits, no parity,
402 * 1 stop bit.
403 */
404
305ec874 405static struct ktermios DgapDefaultTermios = {
a6792a3e
MH		 406 .c_iflag = (DEFAULT_IFLAGS), /* iflags */
407 .c_oflag = (DEFAULT_OFLAGS), /* oflags */
408 .c_cflag = (DEFAULT_CFLAGS), /* cflags */
409 .c_lflag = (DEFAULT_LFLAGS), /* lflags */
410 .c_cc = INIT_C_CC,
7d6069d7 411 .c_line = 0,
a6792a3e
MH		 412};
413
414static const struct tty_operations dgap_tty_ops = {
415 .open = dgap_tty_open,
416 .close = dgap_tty_close,
417 .write = dgap_tty_write,
418 .write_room = dgap_tty_write_room,
419 .flush_buffer = dgap_tty_flush_buffer,
420 .chars_in_buffer = dgap_tty_chars_in_buffer,
421 .flush_chars = dgap_tty_flush_chars,
422 .ioctl = dgap_tty_ioctl,
423 .set_termios = dgap_tty_set_termios,
424 .stop = dgap_tty_stop,
425 .start = dgap_tty_start,
426 .throttle = dgap_tty_throttle,
427 .unthrottle = dgap_tty_unthrottle,
428 .hangup = dgap_tty_hangup,
429 .put_char = dgap_tty_put_char,
430 .tiocmget = dgap_tty_tiocmget,
431 .tiocmset = dgap_tty_tiocmset,
432 .break_ctl = dgap_tty_send_break,
433 .wait_until_sent = dgap_tty_wait_until_sent,
434 .send_xchar = dgap_tty_send_xchar
435};
c84b8b50 436
69edaa21
MH		 437/*
438 * Our needed internal static variables from dgap_parse.c
439 */
440static struct cnode dgap_head;
441#define MAXCWORD 200
442static char dgap_cword[MAXCWORD];
443
444struct toklist {
445 int token;
446 char *string;
447};
448
449static struct toklist dgap_tlist[] = {
2f60b333
MH		 450 { BEGIN, "config_begin" },
451 { END, "config_end" },
452 { BOARD, "board" },
453 { PCX, "Digi_AccelePort_C/X_PCI" },
454 { PEPC, "Digi_AccelePort_EPC/X_PCI" },
455 { PPCM, "Digi_AccelePort_Xem_PCI" },
456 { APORT2_920P, "Digi_AccelePort_2r_920_PCI" },
457 { APORT4_920P, "Digi_AccelePort_4r_920_PCI" },
458 { APORT8_920P, "Digi_AccelePort_8r_920_PCI" },
459 { PAPORT4, "Digi_AccelePort_4r_PCI(EIA-232/RS-422)" },
460 { PAPORT8, "Digi_AccelePort_8r_PCI(EIA-232/RS-422)" },
461 { IO, "io" },
462 { PCIINFO, "pciinfo" },
463 { LINE, "line" },
464 { CONC, "conc" },
465 { CONC, "concentrator" },
466 { CX, "cx" },
467 { CX, "ccon" },
468 { EPC, "epccon" },
469 { EPC, "epc" },
470 { MOD, "module" },
471 { ID, "id" },
472 { STARTO, "start" },
473 { SPEED, "speed" },
474 { CABLE, "cable" },
475 { CONNECT, "connect" },
476 { METHOD, "method" },
477 { STATUS, "status" },
478 { CUSTOM, "Custom" },
479 { BASIC, "Basic" },
480 { MEM, "mem" },
481 { MEM, "memory" },
482 { PORTS, "ports" },
483 { MODEM, "modem" },
484 { NPORTS, "nports" },
485 { TTYN, "ttyname" },
486 { CU, "cuname" },
487 { PRINT, "prname" },
488 { CMAJOR, "major" },
489 { ALTPIN, "altpin" },
490 { USEINTR, "useintr" },
491 { TTSIZ, "ttysize" },
492 { CHSIZ, "chsize" },
493 { BSSIZ, "boardsize" },
494 { UNTSIZ, "schedsize" },
495 { F2SIZ, "f2200size" },
496 { VPSIZ, "vpixsize" },
497 { 0, NULL }
69edaa21 498};
c84b8b50
S		 499
500/************************************************************************
501 *
502 * Driver load/unload functions
503 *
504 ************************************************************************/
505
506/*
507 * init_module()
508 *
509 * Module load. This is where it all starts.
510 */
01a8d255 511static int dgap_init_module(void)
c84b8b50
S		 512{
513 int rc = 0;
514
31960c16 515 pr_info("%s, Digi International Part Number %s\n", DG_NAME, DG_PART);
c84b8b50 516
b28ec88a
MH		 517 dgap_driver_state = DRIVER_NEED_CONFIG_LOAD;
518
c84b8b50 519 rc = dgap_start();
002de0ba 520 if (rc)
cf42c34d 521 return rc;
c84b8b50 522
c84b8b50 523 rc = dgap_init_pci();
002de0ba
MH		 524 if (rc)
525 goto err_cleanup;
526
527 rc = dgap_create_driver_sysfiles(&dgap_driver);
528 if (rc)
529 goto err_cleanup;
530
531 dgap_driver_state = DRIVER_READY;
532
533 return 0;
534
535err_cleanup:
c84b8b50 536
002de0ba 537 dgap_cleanup_module();
818cc6fe 538
cf42c34d 539 return rc;
c84b8b50 540}
01a8d255 541module_init(dgap_init_module);
c84b8b50 542
c84b8b50
S		 543/*
544 * Start of driver.
545 */
546static int dgap_start(void)
547{
548 int rc = 0;
549 unsigned long flags;
0669e5fa 550 struct device *device;
c84b8b50 551
af07daa0
AK		 552 /*
553 * make sure that the globals are
554 * init'd before we do anything else
555 */
556 dgap_init_globals();
c84b8b50 557
af07daa0 558 dgap_NumBoards = 0;
c84b8b50 559
af07daa0 560 pr_info("For the tools package please visit http://www.digi.com\n");
c84b8b50 561
af07daa0
AK		 562 /*
563 * Register our base character device into the kernel.
564 */
565
566 /*
567 * Register management/dpa devices
568 */
569 rc = register_chrdev(DIGI_DGAP_MAJOR, "dgap", &DgapBoardFops);
570 if (rc < 0)
571 return rc;
572
573 dgap_class = class_create(THIS_MODULE, "dgap_mgmt");
0669e5fa
AK		 574 if (IS_ERR(dgap_class)) {
575 rc = PTR_ERR(dgap_class);
576 goto failed_class;
577 }
578
579 device = device_create(dgap_class, NULL,
af07daa0
AK		 580 MKDEV(DIGI_DGAP_MAJOR, 0),
581 NULL, "dgap_mgmt");
0669e5fa
AK		 582 if (IS_ERR(device)) {
583 rc = PTR_ERR(device);
584 goto failed_device;
585 }
af07daa0
AK		 586
587 /* Start the poller */
588 DGAP_LOCK(dgap_poll_lock, flags);
589 init_timer(&dgap_poll_timer);
590 dgap_poll_timer.function = dgap_poll_handler;
591 dgap_poll_timer.data = 0;
592 dgap_poll_time = jiffies + dgap_jiffies_from_ms(dgap_poll_tick);
593 dgap_poll_timer.expires = dgap_poll_time;
594 DGAP_UNLOCK(dgap_poll_lock, flags);
595
596 add_timer(&dgap_poll_timer);
597
598 dgap_driver_state = DRIVER_NEED_CONFIG_LOAD;
c84b8b50 599
cf42c34d 600 return rc;
0669e5fa
AK		 601
602failed_device:
603 class_destroy(dgap_class);
604failed_class:
605 unregister_chrdev(DIGI_DGAP_MAJOR, "dgap");
606 return rc;
c84b8b50
S		 607}
608
c84b8b50
S		 609/*
610 * Register pci driver, and return how many boards we have.
611 */
612static int dgap_init_pci(void)
613{
614 return pci_register_driver(&dgap_driver);
615}
616
c84b8b50
S		 617/* returns count (>= 0), or negative on error */
618static int dgap_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
619{
620 int rc;
621
622 /* wake up and enable device */
623 rc = pci_enable_device(pdev);
624
625 if (rc < 0) {
626 rc = -EIO;
818cc6fe 627 } else {
c84b8b50
S		 628 rc = dgap_probe1(pdev, ent->driver_data);
629 if (rc == 0) {
630 dgap_NumBoards++;
b28ec88a 631 rc = dgap_firmware_load(pdev, ent->driver_data);
c84b8b50
S		 632 }
633 }
634 return rc;
818cc6fe 635}
c84b8b50 636
c84b8b50
S		 637static int dgap_probe1(struct pci_dev *pdev, int card_type)
638{
639 return dgap_found_board(pdev, card_type);
640}
818cc6fe 641
c84b8b50
S		 642static void dgap_remove_one(struct pci_dev *dev)
643{
644 /* Do Nothing */
645}
646
c84b8b50
S		 647/*
648 * dgap_cleanup_module()
649 *
650 * Module unload. This is where it all ends.
651 */
01a8d255 652static void dgap_cleanup_module(void)
c84b8b50
S		 653{
654 int i;
655 ulong lock_flags;
656
657 DGAP_LOCK(dgap_poll_lock, lock_flags);
658 dgap_poll_stop = 1;
659 DGAP_UNLOCK(dgap_poll_lock, lock_flags);
660
661 /* Turn off poller right away. */
b115b024 662 del_timer_sync(&dgap_poll_timer);
c84b8b50 663
c84b8b50
S		 664 dgap_remove_driver_sysfiles(&dgap_driver);
665
af07daa0
AK		 666 device_destroy(dgap_class, MKDEV(DIGI_DGAP_MAJOR, 0));
667 class_destroy(dgap_class);
668 unregister_chrdev(DIGI_DGAP_MAJOR, "dgap");
c84b8b50 669
57a42192 670 kfree(dgap_config_buf);
c84b8b50
S		 671
672 for (i = 0; i < dgap_NumBoards; ++i) {
673 dgap_remove_ports_sysfiles(dgap_Board[i]);
674 dgap_tty_uninit(dgap_Board[i]);
675 dgap_cleanup_board(dgap_Board[i]);
676 }
677
c84b8b50
S		 678 if (dgap_NumBoards)
679 pci_unregister_driver(&dgap_driver);
680}
681
c84b8b50
S		 682/*
683 * dgap_cleanup_board()
684 *
685 * Free all the memory associated with a board
686 */
687static void dgap_cleanup_board(struct board_t *brd)
688{
689 int i = 0;
690
7d6069d7 691 if (!brd || brd->magic != DGAP_BOARD_MAGIC)
cf42c34d 692 return;
c84b8b50
S		 693
694 if (brd->intr_used && brd->irq)
695 free_irq(brd->irq, brd);
696
697 tasklet_kill(&brd->helper_tasklet);
698
699 if (brd->re_map_port) {
700 release_mem_region(brd->membase + 0x200000, 0x200000);
701 iounmap(brd->re_map_port);
702 brd->re_map_port = NULL;
703 }
704
705 if (brd->re_map_membase) {
706 release_mem_region(brd->membase, 0x200000);
707 iounmap(brd->re_map_membase);
708 brd->re_map_membase = NULL;
709 }
710
c84b8b50 711 /* Free all allocated channels structs */
9b073ac5
MH		 712 for (i = 0; i < MAXPORTS ; i++)
713 kfree(brd->channels[i]);
c84b8b50 714
57a42192
LL		 715 kfree(brd->flipbuf);
716 kfree(brd->flipflagbuf);
c84b8b50
S		 717
718 dgap_Board[brd->boardnum] = NULL;
719
7d6069d7 720 kfree(brd);
c84b8b50
S		 721}
722
c84b8b50
S		 723/*
724 * dgap_found_board()
725 *
726 * A board has been found, init it.
727 */
728static int dgap_found_board(struct pci_dev *pdev, int id)
729{
730 struct board_t *brd;
731 unsigned int pci_irq;
732 int i = 0;
c84b8b50
S		 733
734 /* get the board structure and prep it */
9b073ac5 735 brd = kzalloc(sizeof(struct board_t), GFP_KERNEL);
31960c16 736 if (!brd)
cf42c34d 737 return -ENOMEM;
c84b8b50 738
9b073ac5
MH		 739 dgap_Board[dgap_NumBoards] = brd;
740
c84b8b50
S		 741 /* store the info for the board we've found */
742 brd->magic = DGAP_BOARD_MAGIC;
743 brd->boardnum = dgap_NumBoards;
744 brd->firstminor = 0;
745 brd->vendor = dgap_pci_tbl[id].vendor;
746 brd->device = dgap_pci_tbl[id].device;
747 brd->pdev = pdev;
748 brd->pci_bus = pdev->bus->number;
749 brd->pci_slot = PCI_SLOT(pdev->devfn);
750 brd->name = dgap_Ids[id].name;
751 brd->maxports = dgap_Ids[id].maxports;
752 brd->type = dgap_Ids[id].config_type;
753 brd->dpatype = dgap_Ids[id].dpatype;
754 brd->dpastatus = BD_NOFEP;
755 init_waitqueue_head(&brd->state_wait);
756
757 DGAP_SPINLOCK_INIT(brd->bd_lock);
758
759 brd->state = BOARD_FOUND;
760 brd->runwait = 0;
761 brd->inhibit_poller = FALSE;
762 brd->wait_for_bios = 0;
763 brd->wait_for_fep = 0;
764
305ec874 765 for (i = 0; i < MAXPORTS; i++)
c84b8b50 766 brd->channels[i] = NULL;
c84b8b50
S		 767
768 /* store which card & revision we have */
769 pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &brd->subvendor);
770 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &brd->subdevice);
771 pci_read_config_byte(pdev, PCI_REVISION_ID, &brd->rev);
772
773 pci_irq = pdev->irq;
774 brd->irq = pci_irq;
775
776 /* get the PCI Base Address Registers */
777
778 /* Xr Jupiter and EPC use BAR 2 */
2f60b333 779 if (brd->device == PCI_DEV_XRJ_DID || brd->device == PCI_DEV_EPCJ_DID) {
c84b8b50
S		 780 brd->membase = pci_resource_start(pdev, 2);
781 brd->membase_end = pci_resource_end(pdev, 2);
782 }
783 /* Everyone else uses BAR 0 */
784 else {
785 brd->membase = pci_resource_start(pdev, 0);
786 brd->membase_end = pci_resource_end(pdev, 0);
787 }
788
31960c16 789 if (!brd->membase)
c84b8b50 790 return -ENODEV;
c84b8b50
S		 791
792 if (brd->membase & 1)
793 brd->membase &= ~3;
794 else
795 brd->membase &= ~15;
796
797 /*
798 * On the PCI boards, there is no IO space allocated
799 * The I/O registers will be in the first 3 bytes of the
800 * upper 2MB of the 4MB memory space. The board memory
801 * will be mapped into the low 2MB of the 4MB memory space
802 */
803 brd->port = brd->membase + PCI_IO_OFFSET;
804 brd->port_end = brd->port + PCI_IO_SIZE;
805
c84b8b50
S		 806 /*
807 * Special initialization for non-PLX boards
808 */
2f60b333 809 if (brd->device != PCI_DEV_XRJ_DID && brd->device != PCI_DEV_EPCJ_DID) {
c84b8b50
S		 810 unsigned short cmd;
811
812 pci_write_config_byte(pdev, 0x40, 0);
813 pci_write_config_byte(pdev, 0x46, 0);
814
818cc6fe 815 /* Limit burst length to 2 doubleword transactions */
c84b8b50
S		 816 pci_write_config_byte(pdev, 0x42, 1);
817
818 /*
819 * Enable IO and mem if not already done.
820 * This was needed for support on Itanium.
821 */
822 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
823 cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
824 pci_write_config_word(pdev, PCI_COMMAND, cmd);
825 }
826
827 /* init our poll helper tasklet */
2f60b333
MH		 828 tasklet_init(&brd->helper_tasklet, dgap_poll_tasklet,
829 (unsigned long) brd);
c84b8b50 830
c84b8b50
S		 831 i = dgap_do_remap(brd);
832 if (i)
833 brd->state = BOARD_FAILED;
834 else
835 brd->state = NEED_RESET;
836
cf42c34d 837 return 0;
c84b8b50
S		 838}
839
840
305ec874
MH		 841static int dgap_finalize_board_init(struct board_t *brd)
842{
7d6069d7 843 int rc;
c84b8b50 844
c84b8b50 845 if (!brd || brd->magic != DGAP_BOARD_MAGIC)
cf42c34d 846 return -ENODEV;
c84b8b50 847
c84b8b50
S		 848 brd->use_interrupts = dgap_config_get_useintr(brd);
849
850 /*
851 * Set up our interrupt handler if we are set to do interrupts.
852 */
853 if (brd->use_interrupts && brd->irq) {
854
855 rc = request_irq(brd->irq, dgap_intr, IRQF_SHARED, "DGAP", brd);
856
31960c16 857 if (rc)
c84b8b50 858 brd->intr_used = 0;
c84b8b50
S		 859 else
860 brd->intr_used = 1;
861 } else {
862 brd->intr_used = 0;
863 }
864
cf42c34d 865 return 0;
c84b8b50
S		 866}
867
b28ec88a
MH		 868static int dgap_firmware_load(struct pci_dev *pdev, int card_type)
869{
870 struct board_t *brd = dgap_Board[dgap_NumBoards - 1];
871 const struct firmware *fw;
872 int ret;
873
874 dgap_get_vpd(brd);
875 dgap_do_reset_board(brd);
876
877 if ((fw_info[card_type].conf_name) &&
878 (dgap_driver_state == DRIVER_NEED_CONFIG_LOAD)) {
879 ret = request_firmware(&fw, fw_info[card_type].conf_name,
880 &pdev->dev);
881 if (ret) {
882 pr_err("dgap: config file %s not found\n",
883 fw_info[card_type].conf_name);
884 return ret;
885 }
886 if (!dgap_config_buf) {
887 dgap_config_buf = kmalloc(fw->size + 1, GFP_ATOMIC);
888 if (!dgap_config_buf) {
889 release_firmware(fw);
890 return -ENOMEM;
891 }
892 }
893
894 memcpy(dgap_config_buf, fw->data, fw->size);
895 release_firmware(fw);
896 dgap_config_buf[fw->size + 1] = '\0';
897
898 if (dgap_parsefile(&dgap_config_buf, TRUE) != 0)
899 return -EINVAL;
900
901 dgap_driver_state = -1;
902 }
903
904 ret = dgap_after_config_loaded(brd->boardnum);
905 if (ret)
906 return ret;
907 /*
908 * Match this board to a config the user created for us.
909 */
910 brd->bd_config =
911 dgap_find_config(brd->type, brd->pci_bus, brd->pci_slot);
912
913 /*
914 * Because the 4 port Xr products share the same PCI ID
915 * as the 8 port Xr products, if we receive a NULL config
916 * back, and this is a PAPORT8 board, retry with a
917 * PAPORT4 attempt as well.
918 */
919 if (brd->type == PAPORT8 && !brd->bd_config)
920 brd->bd_config =
921 dgap_find_config(PAPORT4, brd->pci_bus, brd->pci_slot);
922
923 if (!brd->bd_config) {
924 pr_err("dgap: No valid configuration found\n");
925 return -EINVAL;
926 }
927
928 dgap_tty_register(brd);
929 dgap_finalize_board_init(brd);
930
931 if (fw_info[card_type].bios_name) {
932 ret = request_firmware(&fw, fw_info[card_type].bios_name,
933 &pdev->dev);
934 if (ret) {
935 pr_err("dgap: bios file %s not found\n",
936 fw_info[card_type].bios_name);
937 return ret;
938 }
939 dgap_do_bios_load(brd, (char *)fw->data, fw->size);
940 release_firmware(fw);
941
942 /* Wait for BIOS to test board... */
943 dgap_do_wait_for_bios(brd);
944
945 if (brd->state != FINISHED_BIOS_LOAD)
946 return -ENXIO;
947 }
948
949 if (fw_info[card_type].fep_name) {
950 ret = request_firmware(&fw, fw_info[card_type].fep_name,
951 &pdev->dev);
952 if (ret) {
953 pr_err("dgap: fep file %s not found\n",
954 fw_info[card_type].fep_name);
955 return ret;
956 }
957 dgap_do_fep_load(brd, (char *)fw->data, fw->size);
958 release_firmware(fw);
959
960 /* Wait for FEP to load on board... */
961 dgap_do_wait_for_fep(brd);
962
963 if (brd->state != FINISHED_FEP_LOAD)
964 return -ENXIO;
965 }
966
967#ifdef DIGI_CONCENTRATORS_SUPPORTED
968 /*
969 * If this is a CX or EPCX, we need to see if the firmware
970 * is requesting a concentrator image from us.
971 */
972 if ((bd->type == PCX) || (bd->type == PEPC)) {
973 chk_addr = (u16 *) (vaddr + DOWNREQ);
974 /* Nonzero if FEP is requesting concentrator image. */
975 check = readw(chk_addr);
976 vaddr = brd->re_map_membase;
977 }
978
979 if (fw_info[card_type].con_name && check && vaddr) {
980 ret = request_firmware(&fw, fw_info[card_type].con_name,
981 &pdev->dev);
982 if (ret) {
983 pr_err("dgap: conc file %s not found\n",
984 fw_info[card_type].con_name);
985 return ret;
986 }
987 /* Put concentrator firmware loading code here */
988 offset = readw((u16 *) (vaddr + DOWNREQ));
989 memcpy_toio(offset, fw->data, fw->size);
990
991 dgap_do_conc_load(brd, (char *)fw->data, fw->size)
992 release_firmware(fw);
993 }
994#endif
995 /*
996 * Do tty device initialization.
997 */
998 ret = dgap_tty_init(brd);
999 if (ret < 0) {
1000 dgap_tty_uninit(brd);
b28ec88a
MH		 1001 return ret;
1002 }
1003
6c8b84ef
MH		 1004 ret = dgap_tty_register_ports(brd);
1005 if (ret)
1006 return ret;
b28ec88a
MH		 1007
1008 brd->state = BOARD_READY;
1009 brd->dpastatus = BD_RUNNING;
1010
1011 return 0;
1012}
c84b8b50
S		 1013
1014/*
1015 * Remap PCI memory.
1016 */
1017static int dgap_do_remap(struct board_t *brd)
1018{
1019 if (!brd || brd->magic != DGAP_BOARD_MAGIC)
1020 return -ENXIO;
1021
31960c16 1022 if (!request_mem_region(brd->membase, 0x200000, "dgap"))
c84b8b50 1023 return -ENOMEM;
c84b8b50 1024
2f60b333
MH		 1025 if (!request_mem_region(brd->membase + PCI_IO_OFFSET, 0x200000,
1026 "dgap")) {
c84b8b50
S		 1027 release_mem_region(brd->membase, 0x200000);
1028 return -ENOMEM;
7d6069d7 1029 }
c84b8b50
S		 1030
1031 brd->re_map_membase = ioremap(brd->membase, 0x200000);
1032 if (!brd->re_map_membase) {
c84b8b50
S		 1033 release_mem_region(brd->membase, 0x200000);
1034 release_mem_region(brd->membase + PCI_IO_OFFSET, 0x200000);
1035 return -ENOMEM;
1036 }
1037
1038 brd->re_map_port = ioremap((brd->membase + PCI_IO_OFFSET), 0x200000);
1039 if (!brd->re_map_port) {
1040 release_mem_region(brd->membase, 0x200000);
1041 release_mem_region(brd->membase + PCI_IO_OFFSET, 0x200000);
1042 iounmap(brd->re_map_membase);
c84b8b50
S		 1043 return -ENOMEM;
1044 }
1045
c84b8b50
S		 1046 return 0;
1047}
1048
c84b8b50
S		 1049/*****************************************************************************
1050*
1051* Function:
818cc6fe 1052*
c84b8b50
S		 1053* dgap_poll_handler
1054*
1055* Author:
1056*
1057* Scott H Kilau
818cc6fe 1058*
c84b8b50
S		 1059* Parameters:
1060*
818cc6fe 1061* dummy -- ignored
c84b8b50
S		 1062*
1063* Return Values:
1064*
1065* none
1066*
818cc6fe
MI		 1067* Description:
1068*
c84b8b50
S		 1069* As each timer expires, it determines (a) whether the "transmit"
1070* waiter needs to be woken up, and (b) whether the poller needs to
1071* be rescheduled.
1072*
1073******************************************************************************/
1074
1075static void dgap_poll_handler(ulong dummy)
1076{
1077 int i;
7d6069d7
MH		 1078 struct board_t *brd;
1079 unsigned long lock_flags;
c84b8b50
S		 1080 ulong new_time;
1081
1082 dgap_poll_counter++;
1083
c84b8b50
S		 1084 /*
1085 * Do not start the board state machine until
1086 * driver tells us its up and running, and has
1087 * everything it needs.
1088 */
b28ec88a 1089 if (dgap_driver_state != DRIVER_READY)
c84b8b50 1090 goto schedule_poller;
c84b8b50
S		 1091
1092 /*
1093 * If we have just 1 board, or the system is not SMP,
1094 * then use the typical old style poller.
1095 * Otherwise, use our new tasklet based poller, which should
1096 * speed things up for multiple boards.
1097 */
b115b024 1098 if ((dgap_NumBoards == 1) || (num_online_cpus() <= 1)) {
c84b8b50
S		 1099 for (i = 0; i < dgap_NumBoards; i++) {
1100
1101 brd = dgap_Board[i];
1102
305ec874 1103 if (brd->state == BOARD_FAILED)
c84b8b50 1104 continue;
305ec874 1105 if (!brd->intr_running)
c84b8b50
S		 1106 /* Call the real board poller directly */
1107 dgap_poll_tasklet((unsigned long) brd);
c84b8b50 1108 }
305ec874 1109 } else {
2f60b333
MH		 1110 /*
1111 * Go thru each board, kicking off a
1112 * tasklet for each if needed
1113 */
c84b8b50
S		 1114 for (i = 0; i < dgap_NumBoards; i++) {
1115 brd = dgap_Board[i];
1116
1117 /*
1118 * Attempt to grab the board lock.
1119 *
2f60b333
MH		 1120 * If we can't get it, no big deal, the next poll
1121 * will get it. Basically, I just really don't want
1122 * to spin in here, because I want to kick off my
1123 * tasklets as fast as I can, and then get out the
1124 * poller.
c84b8b50 1125 */
305ec874 1126 if (!spin_trylock(&brd->bd_lock))
c84b8b50 1127 continue;
c84b8b50 1128
2f60b333
MH		 1129 /*
1130 * If board is in a failed state, don't bother
1131 * scheduling a tasklet
1132 */
c84b8b50
S		 1133 if (brd->state == BOARD_FAILED) {
1134 spin_unlock(&brd->bd_lock);
1135 continue;
1136 }
1137
1138 /* Schedule a poll helper task */
305ec874 1139 if (!brd->intr_running)
c84b8b50 1140 tasklet_schedule(&brd->helper_tasklet);
c84b8b50
S		 1141
1142 /*
1143 * Can't do DGAP_UNLOCK here, as we don't have
1144 * lock_flags because we did a trylock above.
1145 */
1146 spin_unlock(&brd->bd_lock);
1147 }
1148 }
1149
1150schedule_poller:
1151
1152 /*
1153 * Schedule ourself back at the nominal wakeup interval.
1154 */
b115b024 1155 DGAP_LOCK(dgap_poll_lock, lock_flags);
c84b8b50
S		 1156 dgap_poll_time += dgap_jiffies_from_ms(dgap_poll_tick);
1157
1158 new_time = dgap_poll_time - jiffies;
1159
2f60b333
MH		 1160 if ((ulong) new_time >= 2 * dgap_poll_tick) {
1161 dgap_poll_time =
1162 jiffies + dgap_jiffies_from_ms(dgap_poll_tick);
1163 }
c84b8b50
S		 1164
1165 dgap_poll_timer.function = dgap_poll_handler;
1166 dgap_poll_timer.data = 0;
1167 dgap_poll_timer.expires = dgap_poll_time;
b115b024 1168 DGAP_UNLOCK(dgap_poll_lock, lock_flags);
c84b8b50
S		 1169
1170 if (!dgap_poll_stop)
1171 add_timer(&dgap_poll_timer);
1172}
1173
c84b8b50
S		 1174/*
1175 * dgap_intr()
1176 *
1177 * Driver interrupt handler.
1178 */
1179static irqreturn_t dgap_intr(int irq, void *voidbrd)
1180{
1181 struct board_t *brd = (struct board_t *) voidbrd;
1182
31960c16 1183 if (!brd)
c84b8b50 1184 return IRQ_NONE;
c84b8b50
S		 1185
1186 /*
1187 * Check to make sure its for us.
1188 */
31960c16 1189 if (brd->magic != DGAP_BOARD_MAGIC)
c84b8b50 1190 return IRQ_NONE;
c84b8b50
S		 1191
1192 brd->intr_count++;
1193
1194 /*
1195 * Schedule tasklet to run at a better time.
1196 */
1197 tasklet_schedule(&brd->helper_tasklet);
1198 return IRQ_HANDLED;
1199}
1200
c84b8b50
S		 1201/*
1202 * dgap_init_globals()
1203 *
1204 * This is where we initialize the globals from the static insmod
1205 * configuration variables. These are declared near the head of
1206 * this file.
1207 */
1208static void dgap_init_globals(void)
1209{
1210 int i = 0;
1211
305ec874 1212 for (i = 0; i < MAXBOARDS; i++)
c84b8b50 1213 dgap_Board[i] = NULL;
c84b8b50 1214
b115b024 1215 init_timer(&dgap_poll_timer);
c84b8b50
S		 1216
1217 init_waitqueue_head(&dgap_dl_wait);
1218 dgap_dl_action = 0;
1219}
1220
c84b8b50
S		 1221/************************************************************************
1222 *
1223 * Utility functions
1224 *
1225 ************************************************************************/
1226
c84b8b50
S		 1227/*
1228 * dgap_ms_sleep()
1229 *
1230 * Put the driver to sleep for x ms's
1231 *
1232 * Returns 0 if timed out, !0 (showing signal) if interrupted by a signal.
1233 */
fe0ef8e6 1234static int dgap_ms_sleep(ulong ms)
c84b8b50
S		 1235{
1236 current->state = TASK_INTERRUPTIBLE;
1237 schedule_timeout((ms * HZ) / 1000);
cf42c34d 1238 return signal_pending(current);
c84b8b50
S		 1239}
1240
a6792a3e
MH		 1241/************************************************************************
1242 *
1243 * TTY Initialization/Cleanup Functions
1244 *
1245 ************************************************************************/
1246
a6792a3e
MH		 1247/*
1248 * dgap_tty_register()
1249 *
1250 * Init the tty subsystem for this board.
1251 */
fe0ef8e6 1252static int dgap_tty_register(struct board_t *brd)
a6792a3e
MH		 1253{
1254 int rc = 0;
1255
a6792a3e
MH		 1256 brd->SerialDriver = alloc_tty_driver(MAXPORTS);
1257
1258 snprintf(brd->SerialName, MAXTTYNAMELEN, "tty_dgap_%d_", brd->boardnum);
1259 brd->SerialDriver->name = brd->SerialName;
1260 brd->SerialDriver->name_base = 0;
1261 brd->SerialDriver->major = 0;
1262 brd->SerialDriver->minor_start = 0;
1263 brd->SerialDriver->type = TTY_DRIVER_TYPE_SERIAL;
1264 brd->SerialDriver->subtype = SERIAL_TYPE_NORMAL;
1265 brd->SerialDriver->init_termios = DgapDefaultTermios;
1266 brd->SerialDriver->driver_name = DRVSTR;
2f60b333
MH		 1267 brd->SerialDriver->flags = (TTY_DRIVER_REAL_RAW |
1268 TTY_DRIVER_DYNAMIC_DEV |
1269 TTY_DRIVER_HARDWARE_BREAK);
a6792a3e
MH		 1270
1271 /* The kernel wants space to store pointers to tty_structs */
2f60b333
MH		 1272 brd->SerialDriver->ttys =
1273 kzalloc(MAXPORTS * sizeof(struct tty_struct *), GFP_KERNEL);
a6792a3e 1274 if (!brd->SerialDriver->ttys)
cf42c34d 1275 return -ENOMEM;
a6792a3e
MH		 1276
1277 /*
1278 * Entry points for driver. Called by the kernel from
1279 * tty_io.c and n_tty.c.
1280 */
1281 tty_set_operations(brd->SerialDriver, &dgap_tty_ops);
1282
1283 /*
1284 * If we're doing transparent print, we have to do all of the above
1285 * again, separately so we don't get the LD confused about what major
1286 * we are when we get into the dgap_tty_open() routine.
1287 */
1288 brd->PrintDriver = alloc_tty_driver(MAXPORTS);
1289
1290 snprintf(brd->PrintName, MAXTTYNAMELEN, "pr_dgap_%d_", brd->boardnum);
1291 brd->PrintDriver->name = brd->PrintName;
1292 brd->PrintDriver->name_base = 0;
1293 brd->PrintDriver->major = 0;
1294 brd->PrintDriver->minor_start = 0;
1295 brd->PrintDriver->type = TTY_DRIVER_TYPE_SERIAL;
1296 brd->PrintDriver->subtype = SERIAL_TYPE_NORMAL;
1297 brd->PrintDriver->init_termios = DgapDefaultTermios;
1298 brd->PrintDriver->driver_name = DRVSTR;
2f60b333
MH		 1299 brd->PrintDriver->flags = (TTY_DRIVER_REAL_RAW |
1300 TTY_DRIVER_DYNAMIC_DEV |
1301 TTY_DRIVER_HARDWARE_BREAK);
a6792a3e
MH		 1302
1303 /* The kernel wants space to store pointers to tty_structs */
2f60b333
MH		 1304 brd->PrintDriver->ttys =
1305 kzalloc(MAXPORTS * sizeof(struct tty_struct *), GFP_KERNEL);
a6792a3e 1306 if (!brd->PrintDriver->ttys)
cf42c34d 1307 return -ENOMEM;
a6792a3e
MH		 1308
1309 /*
1310 * Entry points for driver. Called by the kernel from
1311 * tty_io.c and n_tty.c.
1312 */
1313 tty_set_operations(brd->PrintDriver, &dgap_tty_ops);
1314
1315 if (!brd->dgap_Major_Serial_Registered) {
1316 /* Register tty devices */
1317 rc = tty_register_driver(brd->SerialDriver);
31960c16 1318 if (rc < 0)
cf42c34d 1319 return rc;
a6792a3e
MH		 1320 brd->dgap_Major_Serial_Registered = TRUE;
1321 dgap_BoardsByMajor[brd->SerialDriver->major] = brd;
1322 brd->dgap_Serial_Major = brd->SerialDriver->major;
1323 }
1324
1325 if (!brd->dgap_Major_TransparentPrint_Registered) {
1326 /* Register Transparent Print devices */
7d6069d7 1327 rc = tty_register_driver(brd->PrintDriver);
31960c16 1328 if (rc < 0)
cf42c34d 1329 return rc;
a6792a3e
MH		 1330 brd->dgap_Major_TransparentPrint_Registered = TRUE;
1331 dgap_BoardsByMajor[brd->PrintDriver->major] = brd;
1332 brd->dgap_TransparentPrint_Major = brd->PrintDriver->major;
1333 }
1334
cf42c34d 1335 return rc;
a6792a3e
MH		 1336}
1337
a6792a3e
MH		 1338/*
1339 * dgap_tty_init()
1340 *
1341 * Init the tty subsystem. Called once per board after board has been
1342 * downloaded and init'ed.
1343 */
fe0ef8e6 1344static int dgap_tty_init(struct board_t *brd)
a6792a3e
MH		 1345{
1346 int i;
1347 int tlw;
1348 uint true_count = 0;
1349 uchar *vaddr;
1350 uchar modem = 0;
1351 struct channel_t *ch;
1352 struct bs_t *bs;
1353 struct cm_t *cm;
1354
1355 if (!brd)
cf42c34d 1356 return -ENXIO;
a6792a3e 1357
a6792a3e
MH		 1358 /*
1359 * Initialize board structure elements.
1360 */
1361
1362 vaddr = brd->re_map_membase;
1363 true_count = readw((vaddr + NCHAN));
1364
1365 brd->nasync = dgap_config_get_number_of_ports(brd);
1366
305ec874 1367 if (!brd->nasync)
a6792a3e 1368 brd->nasync = brd->maxports;
a6792a3e 1369
305ec874 1370 if (brd->nasync > brd->maxports)
a6792a3e 1371 brd->nasync = brd->maxports;
a6792a3e
MH		 1372
1373 if (true_count != brd->nasync) {
249e7343
MH		 1374 if ((brd->type == PPCM) && (true_count == 64)) {
1375 pr_warn("dgap: %s configured for %d ports, has %d ports.\n",
31960c16 1376 brd->name, brd->nasync, true_count);
249e7343
MH		 1377 pr_warn("dgap: Please make SURE the EBI cable running from the card\n");
1378 pr_warn("dgap: to each EM module is plugged into EBI IN!\n");
1379 } else if ((brd->type == PPCM) && (true_count == 0)) {
1380 pr_warn("dgap: %s configured for %d ports, has %d ports.\n",
31960c16 1381 brd->name, brd->nasync, true_count);
249e7343
MH		 1382 pr_warn("dgap: Please make SURE the EBI cable running from the card\n");
1383 pr_warn("dgap: to each EM module is plugged into EBI IN!\n");
1384 } else
31960c16
MH		 1385 pr_warn("dgap: %s configured for %d ports, has %d ports.\n",
1386 brd->name, brd->nasync, true_count);
a6792a3e
MH		 1387
1388 brd->nasync = true_count;
1389
1390 /* If no ports, don't bother going any further */
1391 if (!brd->nasync) {
1392 brd->state = BOARD_FAILED;
1393 brd->dpastatus = BD_NOFEP;
cf42c34d 1394 return -ENXIO;
a6792a3e
MH		 1395 }
1396 }
1397
1398 /*
1399 * Allocate channel memory that might not have been allocated
1400 * when the driver was first loaded.
1401 */
1402 for (i = 0; i < brd->nasync; i++) {
1403 if (!brd->channels[i]) {
2f60b333
MH		 1404 brd->channels[i] =
1405 kzalloc(sizeof(struct channel_t), GFP_ATOMIC);
31960c16
MH		 1406 if (!brd->channels[i])
1407 return -ENOMEM;
a6792a3e
MH		 1408 }
1409 }
1410
1411 ch = brd->channels[0];
1412 vaddr = brd->re_map_membase;
1413
1414 bs = (struct bs_t *) ((ulong) vaddr + CHANBUF);
1415 cm = (struct cm_t *) ((ulong) vaddr + CMDBUF);
1416
1417 brd->bd_bs = bs;
1418
1419 /* Set up channel variables */
1420 for (i = 0; i < brd->nasync; i++, ch = brd->channels[i], bs++) {
1421
1422 if (!brd->channels[i])
1423 continue;
1424
1425 DGAP_SPINLOCK_INIT(ch->ch_lock);
1426
1427 /* Store all our magic numbers */
1428 ch->magic = DGAP_CHANNEL_MAGIC;
1429 ch->ch_tun.magic = DGAP_UNIT_MAGIC;
1430 ch->ch_tun.un_type = DGAP_SERIAL;
1431 ch->ch_tun.un_ch = ch;
1432 ch->ch_tun.un_dev = i;
1433
1434 ch->ch_pun.magic = DGAP_UNIT_MAGIC;
1435 ch->ch_pun.un_type = DGAP_PRINT;
1436 ch->ch_pun.un_ch = ch;
1437 ch->ch_pun.un_dev = i;
1438
1439 ch->ch_vaddr = vaddr;
1440 ch->ch_bs = bs;
1441 ch->ch_cm = cm;
1442 ch->ch_bd = brd;
1443 ch->ch_portnum = i;
1444 ch->ch_digi = dgap_digi_init;
1445
1446 /*
1447 * Set up digi dsr and dcd bits based on altpin flag.
1448 */
1449 if (dgap_config_get_altpin(brd)) {
1450 ch->ch_dsr = DM_CD;
1451 ch->ch_cd = DM_DSR;
1452 ch->ch_digi.digi_flags |= DIGI_ALTPIN;
305ec874 1453 } else {
a6792a3e
MH		 1454 ch->ch_cd = DM_CD;
1455 ch->ch_dsr = DM_DSR;
1456 }
1457
1458 ch->ch_taddr = vaddr + ((ch->ch_bs->tx_seg) << 4);
1459 ch->ch_raddr = vaddr + ((ch->ch_bs->rx_seg) << 4);
1460 ch->ch_tx_win = 0;
1461 ch->ch_rx_win = 0;
1462 ch->ch_tsize = readw(&(ch->ch_bs->tx_max)) + 1;
1463 ch->ch_rsize = readw(&(ch->ch_bs->rx_max)) + 1;
1464 ch->ch_tstart = 0;
1465 ch->ch_rstart = 0;
1466
1467 /* .25 second delay */
1468 ch->ch_close_delay = 250;
1469
1470 /*
1471 * Set queue water marks, interrupt mask,
1472 * and general tty parameters.
1473 */
2f60b333
MH		 1474 tlw = ch->ch_tsize >= 2000 ? ((ch->ch_tsize * 5) / 8) :
1475 ch->ch_tsize / 2;
1476 ch->ch_tlw = tlw;
a6792a3e
MH		 1477
1478 dgap_cmdw(ch, STLOW, tlw, 0);
1479
1480 dgap_cmdw(ch, SRLOW, ch->ch_rsize / 2, 0);
1481
1482 dgap_cmdw(ch, SRHIGH, 7 * ch->ch_rsize / 8, 0);
1483
1484 ch->ch_mistat = readb(&(ch->ch_bs->m_stat));
1485
1486 init_waitqueue_head(&ch->ch_flags_wait);
1487 init_waitqueue_head(&ch->ch_tun.un_flags_wait);
1488 init_waitqueue_head(&ch->ch_pun.un_flags_wait);
1489 init_waitqueue_head(&ch->ch_sniff_wait);
1490
1491 /* Turn on all modem interrupts for now */
1492 modem = (DM_CD | DM_DSR | DM_CTS | DM_RI);
1493 writeb(modem, &(ch->ch_bs->m_int));
1494
1495 /*
1496 * Set edelay to 0 if interrupts are turned on,
1497 * otherwise set edelay to the usual 100.
1498 */
1499 if (brd->intr_used)
1500 writew(0, &(ch->ch_bs->edelay));
1501 else
1502 writew(100, &(ch->ch_bs->edelay));
1503
1504 writeb(1, &(ch->ch_bs->idata));
1505 }
1506
cf42c34d 1507 return 0;
a6792a3e
MH		 1508}
1509
a6792a3e
MH		 1510/*
1511 * dgap_tty_uninit()
1512 *
1513 * Uninitialize the TTY portion of this driver. Free all memory and
1514 * resources.
1515 */
fe0ef8e6 1516static void dgap_tty_uninit(struct board_t *brd)
a6792a3e 1517{
6045b6af 1518 struct device *dev;
a6792a3e
MH		 1519 int i = 0;
1520
1521 if (brd->dgap_Major_Serial_Registered) {
1522 dgap_BoardsByMajor[brd->SerialDriver->major] = NULL;
1523 brd->dgap_Serial_Major = 0;
1524 for (i = 0; i < brd->nasync; i++) {
6c8b84ef 1525 tty_port_destroy(&brd->SerialPorts[i]);
6045b6af
MH		 1526 dev = brd->channels[i]->ch_tun.un_sysfs;
1527 dgap_remove_tty_sysfs(dev);
a6792a3e
MH		 1528 tty_unregister_device(brd->SerialDriver, i);
1529 }
1530 tty_unregister_driver(brd->SerialDriver);
1531 kfree(brd->SerialDriver->ttys);
1532 brd->SerialDriver->ttys = NULL;
1533 put_tty_driver(brd->SerialDriver);
6c8b84ef 1534 kfree(brd->SerialPorts);
a6792a3e
MH		 1535 brd->dgap_Major_Serial_Registered = FALSE;
1536 }
1537
1538 if (brd->dgap_Major_TransparentPrint_Registered) {
1539 dgap_BoardsByMajor[brd->PrintDriver->major] = NULL;
1540 brd->dgap_TransparentPrint_Major = 0;
1541 for (i = 0; i < brd->nasync; i++) {
6c8b84ef 1542 tty_port_destroy(&brd->PrinterPorts[i]);
6045b6af
MH		 1543 dev = brd->channels[i]->ch_pun.un_sysfs;
1544 dgap_remove_tty_sysfs(dev);
a6792a3e
MH		 1545 tty_unregister_device(brd->PrintDriver, i);
1546 }
1547 tty_unregister_driver(brd->PrintDriver);
1548 kfree(brd->PrintDriver->ttys);
1549 brd->PrintDriver->ttys = NULL;
1550 put_tty_driver(brd->PrintDriver);
6c8b84ef 1551 kfree(brd->PrinterPorts);
a6792a3e
MH		 1552 brd->dgap_Major_TransparentPrint_Registered = FALSE;
1553 }
1554}
1555
a6792a3e 1556#define TMPBUFLEN (1024)
a6792a3e
MH		 1557/*
1558 * dgap_sniff - Dump data out to the "sniff" buffer if the
1559 * proc sniff file is opened...
1560 */
6045b6af
MH		 1561static void dgap_sniff_nowait_nolock(struct channel_t *ch, uchar *text,
1562 uchar *buf, int len)
a6792a3e
MH		 1563{
1564 struct timeval tv;
1565 int n;
1566 int r;
1567 int nbuf;
1568 int i;
1569 int tmpbuflen;
1570 char tmpbuf[TMPBUFLEN];
1571 char *p = tmpbuf;
1572 int too_much_data;
1573
1574 /* Leave if sniff not open */
1575 if (!(ch->ch_sniff_flags & SNIFF_OPEN))
1576 return;
1577
1578 do_gettimeofday(&tv);
1579
1580 /* Create our header for data dump */
1581 p += sprintf(p, "<%ld %ld><%s><", tv.tv_sec, tv.tv_usec, text);
1582 tmpbuflen = p - tmpbuf;
1583
1584 do {
1585 too_much_data = 0;
1586
1587 for (i = 0; i < len && tmpbuflen < (TMPBUFLEN - 4); i++) {
1588 p += sprintf(p, "%02x ", *buf);
1589 buf++;
1590 tmpbuflen = p - tmpbuf;
1591 }
1592
1593 if (tmpbuflen < (TMPBUFLEN - 4)) {
1594 if (i > 0)
1595 p += sprintf(p - 1, "%s\n", ">");
1596 else
1597 p += sprintf(p, "%s\n", ">");
1598 } else {
1599 too_much_data = 1;
1600 len -= i;
1601 }
1602
1603 nbuf = strlen(tmpbuf);
1604 p = tmpbuf;
1605
1606 /*
1607 * Loop while data remains.
1608 */
1609 while (nbuf > 0 && ch->ch_sniff_buf) {
1610 /*
1611 * Determine the amount of available space left in the
1612 * buffer. If there's none, wait until some appears.
1613 */
6045b6af
MH		 1614 n = (ch->ch_sniff_out - ch->ch_sniff_in - 1) &
1615 SNIFF_MASK;
a6792a3e
MH		 1616
1617 /*
6045b6af
MH		 1618 * If there is no space left to write to in our sniff
1619 * buffer, we have no choice but to drop the data.
1620 * We *cannot* sleep here waiting for space, because
1621 * this function was probably called by the
1622 * interrupt/timer routines!
a6792a3e 1623 */
305ec874 1624 if (n == 0)
a6792a3e 1625 return;
a6792a3e
MH		 1626
1627 /*
1628 * Copy as much data as will fit.
1629 */
1630
1631 if (n > nbuf)
1632 n = nbuf;
1633
1634 r = SNIFF_MAX - ch->ch_sniff_in;
1635
1636 if (r <= n) {
1637 memcpy(ch->ch_sniff_buf + ch->ch_sniff_in, p, r);
1638
1639 n -= r;
1640 ch->ch_sniff_in = 0;
1641 p += r;
1642 nbuf -= r;
1643 }
1644
1645 memcpy(ch->ch_sniff_buf + ch->ch_sniff_in, p, n);
1646
1647 ch->ch_sniff_in += n;
1648 p += n;
1649 nbuf -= n;
1650
1651 /*
1652 * Wakeup any thread waiting for data
1653 */
1654 if (ch->ch_sniff_flags & SNIFF_WAIT_DATA) {
1655 ch->ch_sniff_flags &= ~SNIFF_WAIT_DATA;
1656 wake_up_interruptible(&ch->ch_sniff_wait);
1657 }
1658 }
1659
1660 /*
1661 * If the user sent us too much data to push into our tmpbuf,
1662 * we need to keep looping around on all the data.
1663 */
1664 if (too_much_data) {
1665 p = tmpbuf;
1666 tmpbuflen = 0;
1667 }
1668
1669 } while (too_much_data);
1670}
1671
a6792a3e
MH		 1672/*=======================================================================
1673 *
1674 * dgap_input - Process received data.
1675 *
1676 * ch - Pointer to channel structure.
1677 *
1678 *=======================================================================*/
1679
fe0ef8e6 1680static void dgap_input(struct channel_t *ch)
a6792a3e
MH		 1681{
1682 struct board_t *bd;
1683 struct bs_t *bs;
1684 struct tty_struct *tp;
1685 struct tty_ldisc *ld;
1686 uint rmask;
1687 uint head;
1688 uint tail;
1689 int data_len;
1690 ulong lock_flags;
1691 ulong lock_flags2;
1692 int flip_len;
1693 int len = 0;
1694 int n = 0;
1695 uchar *buf;
1696 uchar tmpchar;
1697 int s = 0;
1698
1699 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
1700 return;
1701
1702 tp = ch->ch_tun.un_tty;
1703
1704 bs = ch->ch_bs;
305ec874 1705 if (!bs)
a6792a3e 1706 return;
a6792a3e
MH		 1707
1708 bd = ch->ch_bd;
b115b024 1709 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
a6792a3e
MH		 1710 return;
1711
a6792a3e
MH		 1712 DGAP_LOCK(bd->bd_lock, lock_flags);
1713 DGAP_LOCK(ch->ch_lock, lock_flags2);
1714
1715 /*
1716 * Figure the number of characters in the buffer.
1717 * Exit immediately if none.
1718 */
1719
1720 rmask = ch->ch_rsize - 1;
1721
1722 head = readw(&(bs->rx_head));
1723 head &= rmask;
1724 tail = readw(&(bs->rx_tail));
1725 tail &= rmask;
1726
1727 data_len = (head - tail) & rmask;
1728
1729 if (data_len == 0) {
1730 writeb(1, &(bs->idata));
1731 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
1732 DGAP_UNLOCK(bd->bd_lock, lock_flags);
a6792a3e
MH		 1733 return;
1734 }
1735
1736 /*
1737 * If the device is not open, or CREAD is off, flush
1738 * input data and return immediately.
1739 */
7d6069d7
MH		 1740 if ((bd->state != BOARD_READY) || !tp ||
1741 (tp->magic != TTY_MAGIC) ||
1742 !(ch->ch_tun.un_flags & UN_ISOPEN) ||
1743 !(tp->termios.c_cflag & CREAD) ||
a6792a3e
MH		 1744 (ch->ch_tun.un_flags & UN_CLOSING)) {
1745
a6792a3e
MH		 1746 writew(head, &(bs->rx_tail));
1747 writeb(1, &(bs->idata));
1748 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
1749 DGAP_UNLOCK(bd->bd_lock, lock_flags);
1750 return;
1751 }
1752
1753 /*
1754 * If we are throttled, simply don't read any data.
1755 */
1756 if (ch->ch_flags & CH_RXBLOCK) {
1757 writeb(1, &(bs->idata));
1758 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
1759 DGAP_UNLOCK(bd->bd_lock, lock_flags);
a6792a3e
MH		 1760 return;
1761 }
1762
1763 /*
1764 * Ignore oruns.
1765 */
1766 tmpchar = readb(&(bs->orun));
1767 if (tmpchar) {
1768 ch->ch_err_overrun++;
1769 writeb(0, &(bs->orun));
1770 }
1771
a6792a3e
MH		 1772 /* Decide how much data we can send into the tty layer */
1773 flip_len = TTY_FLIPBUF_SIZE;
1774
1775 /* Chop down the length, if needed */
1776 len = min(data_len, flip_len);
1777 len = min(len, (N_TTY_BUF_SIZE - 1));
1778
1779 ld = tty_ldisc_ref(tp);
1780
1781#ifdef TTY_DONT_FLIP
1782 /*
1783 * If the DONT_FLIP flag is on, don't flush our buffer, and act
1784 * like the ld doesn't have any space to put the data right now.
1785 */
1786 if (test_bit(TTY_DONT_FLIP, &tp->flags))
1787 len = 0;
1788#endif
1789
1790 /*
1791 * If we were unable to get a reference to the ld,
1792 * don't flush our buffer, and act like the ld doesn't
1793 * have any space to put the data right now.
1794 */
1795 if (!ld) {
1796 len = 0;
1797 } else {
1798 /*
1799 * If ld doesn't have a pointer to a receive_buf function,
1800 * flush the data, then act like the ld doesn't have any
1801 * space to put the data right now.
1802 */
1803 if (!ld->ops->receive_buf) {
1804 writew(head, &(bs->rx_tail));
1805 len = 0;
1806 }
1807 }
1808
1809 if (len <= 0) {
1810 writeb(1, &(bs->idata));
1811 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
1812 DGAP_UNLOCK(bd->bd_lock, lock_flags);
a6792a3e
MH		 1813 if (ld)
1814 tty_ldisc_deref(ld);
1815 return;
1816 }
1817
1818 buf = ch->ch_bd->flipbuf;
1819 n = len;
1820
1821 /*
1822 * n now contains the most amount of data we can copy,
1823 * bounded either by our buffer size or the amount
1824 * of data the card actually has pending...
1825 */
1826 while (n) {
1827
1828 s = ((head >= tail) ? head : ch->ch_rsize) - tail;
1829 s = min(s, n);
1830
1831 if (s <= 0)
1832 break;
1833
1834 memcpy_fromio(buf, (char *) ch->ch_raddr + tail, s);
1835 dgap_sniff_nowait_nolock(ch, "USER READ", buf, s);
1836
1837 tail += s;
1838 buf += s;
1839
1840 n -= s;
1841 /* Flip queue if needed */
1842 tail &= rmask;
1843 }
1844
1845 writew(tail, &(bs->rx_tail));
1846 writeb(1, &(bs->idata));
1847 ch->ch_rxcount += len;
1848
1849 /*
1850 * If we are completely raw, we don't need to go through a lot
1851 * of the tty layers that exist.
1852 * In this case, we take the shortest and fastest route we
1853 * can to relay the data to the user.
1854 *
1855 * On the other hand, if we are not raw, we need to go through
1856 * the tty layer, which has its API more well defined.
1857 */
1858 if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) {
6045b6af
MH		 1859 dgap_parity_scan(ch, ch->ch_bd->flipbuf,
1860 ch->ch_bd->flipflagbuf, &len);
a6792a3e
MH		 1861
1862 len = tty_buffer_request_room(tp->port, len);
1863 tty_insert_flip_string_flags(tp->port, ch->ch_bd->flipbuf,
1864 ch->ch_bd->flipflagbuf, len);
305ec874 1865 } else {
a6792a3e
MH		 1866 len = tty_buffer_request_room(tp->port, len);
1867 tty_insert_flip_string(tp->port, ch->ch_bd->flipbuf, len);
1868 }
1869
1870 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
1871 DGAP_UNLOCK(bd->bd_lock, lock_flags);
1872
1873 /* Tell the tty layer its okay to "eat" the data now */
1874 tty_flip_buffer_push(tp->port);
1875
1876 if (ld)
1877 tty_ldisc_deref(ld);
1878
a6792a3e
MH		 1879}
1880
a6792a3e
MH		 1881/************************************************************************
1882 * Determines when CARRIER changes state and takes appropriate
1883 * action.
1884 ************************************************************************/
fe0ef8e6 1885static void dgap_carrier(struct channel_t *ch)
a6792a3e
MH		 1886{
1887 struct board_t *bd;
1888
7d6069d7
MH		 1889 int virt_carrier = 0;
1890 int phys_carrier = 0;
a6792a3e 1891
a6792a3e
MH		 1892 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
1893 return;
1894
1895 bd = ch->ch_bd;
1896
1897 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
1898 return;
1899
1900 /* Make sure altpin is always set correctly */
1901 if (ch->ch_digi.digi_flags & DIGI_ALTPIN) {
1902 ch->ch_dsr = DM_CD;
1903 ch->ch_cd = DM_DSR;
305ec874 1904 } else {
a6792a3e
MH		 1905 ch->ch_dsr = DM_DSR;
1906 ch->ch_cd = DM_CD;
1907 }
1908
31960c16 1909 if (ch->ch_mistat & D_CD(ch))
a6792a3e 1910 phys_carrier = 1;
a6792a3e 1911
305ec874 1912 if (ch->ch_digi.digi_flags & DIGI_FORCEDCD)
a6792a3e 1913 virt_carrier = 1;
a6792a3e 1914
305ec874 1915 if (ch->ch_c_cflag & CLOCAL)
a6792a3e 1916 virt_carrier = 1;
a6792a3e 1917
a6792a3e
MH		 1918 /*
1919 * Test for a VIRTUAL carrier transition to HIGH.
1920 */
1921 if (((ch->ch_flags & CH_FCAR) == 0) && (virt_carrier == 1)) {
1922
1923 /*
1924 * When carrier rises, wake any threads waiting
1925 * for carrier in the open routine.
1926 */
1927
a6792a3e
MH		 1928 if (waitqueue_active(&(ch->ch_flags_wait)))
1929 wake_up_interruptible(&ch->ch_flags_wait);
1930 }
1931
1932 /*
1933 * Test for a PHYSICAL carrier transition to HIGH.
1934 */
1935 if (((ch->ch_flags & CH_CD) == 0) && (phys_carrier == 1)) {
1936
1937 /*
1938 * When carrier rises, wake any threads waiting
1939 * for carrier in the open routine.
1940 */
1941
a6792a3e
MH		 1942 if (waitqueue_active(&(ch->ch_flags_wait)))
1943 wake_up_interruptible(&ch->ch_flags_wait);
1944 }
1945
1946 /*
1947 * Test for a PHYSICAL transition to low, so long as we aren't
1948 * currently ignoring physical transitions (which is what "virtual
1949 * carrier" indicates).
1950 *
1951 * The transition of the virtual carrier to low really doesn't
1952 * matter... it really only means "ignore carrier state", not
1953 * "make pretend that carrier is there".
1954 */
305ec874
MH		 1955 if ((virt_carrier == 0) &&
1956 ((ch->ch_flags & CH_CD) != 0) &&
1957 (phys_carrier == 0)) {
a6792a3e
MH		 1958
1959 /*
1960 * When carrier drops:
1961 *
1962 * Drop carrier on all open units.
1963 *
1964 * Flush queues, waking up any task waiting in the
1965 * line discipline.
1966 *
1967 * Send a hangup to the control terminal.
1968 *
1969 * Enable all select calls.
1970 */
1971 if (waitqueue_active(&(ch->ch_flags_wait)))
1972 wake_up_interruptible(&ch->ch_flags_wait);
1973
31960c16 1974 if (ch->ch_tun.un_open_count > 0)
a6792a3e 1975 tty_hangup(ch->ch_tun.un_tty);
a6792a3e 1976
31960c16 1977 if (ch->ch_pun.un_open_count > 0)
a6792a3e 1978 tty_hangup(ch->ch_pun.un_tty);
a6792a3e
MH		 1979 }
1980
1981 /*
1982 * Make sure that our cached values reflect the current reality.
1983 */
1984 if (virt_carrier == 1)
1985 ch->ch_flags |= CH_FCAR;
1986 else
1987 ch->ch_flags &= ~CH_FCAR;
1988
1989 if (phys_carrier == 1)
1990 ch->ch_flags |= CH_CD;
1991 else
1992 ch->ch_flags &= ~CH_CD;
1993}
1994
a6792a3e
MH		 1995/************************************************************************
1996 *
1997 * TTY Entry points and helper functions
1998 *
1999 ************************************************************************/
2000
2001/*
2002 * dgap_tty_open()
2003 *
2004 */
2005static int dgap_tty_open(struct tty_struct *tty, struct file *file)
2006{
2007 struct board_t *brd;
2008 struct channel_t *ch;
2009 struct un_t *un;
2010 struct bs_t *bs;
2011 uint major = 0;
2012 uint minor = 0;
2013 int rc = 0;
2014 ulong lock_flags;
2015 ulong lock_flags2;
2016 u16 head;
2017
2018 rc = 0;
2019
2020 major = MAJOR(tty_devnum(tty));
2021 minor = MINOR(tty_devnum(tty));
2022
305ec874 2023 if (major > 255)
a6792a3e 2024 return -ENXIO;
a6792a3e
MH		 2025
2026 /* Get board pointer from our array of majors we have allocated */
2027 brd = dgap_BoardsByMajor[major];
305ec874 2028 if (!brd)
a6792a3e 2029 return -ENXIO;
a6792a3e
MH		 2030
2031 /*
2032 * If board is not yet up to a state of READY, go to
2033 * sleep waiting for it to happen or they cancel the open.
2034 */
2035 rc = wait_event_interruptible(brd->state_wait,
2036 (brd->state & BOARD_READY));
2037
305ec874 2038 if (rc)
a6792a3e 2039 return rc;
a6792a3e
MH		 2040
2041 DGAP_LOCK(brd->bd_lock, lock_flags);
2042
2043 /* The wait above should guarantee this cannot happen */
2044 if (brd->state != BOARD_READY) {
2045 DGAP_UNLOCK(brd->bd_lock, lock_flags);
2046 return -ENXIO;
2047 }
2048
2049 /* If opened device is greater than our number of ports, bail. */
2050 if (MINOR(tty_devnum(tty)) > brd->nasync) {
2051 DGAP_UNLOCK(brd->bd_lock, lock_flags);
2052 return -ENXIO;
2053 }
2054
2055 ch = brd->channels[minor];
2056 if (!ch) {
2057 DGAP_UNLOCK(brd->bd_lock, lock_flags);
2058 return -ENXIO;
2059 }
2060
2061 /* Grab channel lock */
2062 DGAP_LOCK(ch->ch_lock, lock_flags2);
2063
2064 /* Figure out our type */
2065 if (major == brd->dgap_Serial_Major) {
2066 un = &brd->channels[minor]->ch_tun;
2067 un->un_type = DGAP_SERIAL;
305ec874 2068 } else if (major == brd->dgap_TransparentPrint_Major) {
a6792a3e
MH		 2069 un = &brd->channels[minor]->ch_pun;
2070 un->un_type = DGAP_PRINT;
305ec874 2071 } else {
a6792a3e
MH		 2072 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
2073 DGAP_UNLOCK(brd->bd_lock, lock_flags);
a6792a3e
MH		 2074 return -ENXIO;
2075 }
2076
2077 /* Store our unit into driver_data, so we always have it available. */
2078 tty->driver_data = un;
2079
a6792a3e
MH		 2080 /*
2081 * Error if channel info pointer is NULL.
2082 */
2083 bs = ch->ch_bs;
2084 if (!bs) {
2085 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
2086 DGAP_UNLOCK(brd->bd_lock, lock_flags);
a6792a3e 2087 return -ENXIO;
7d6069d7 2088 }
a6792a3e 2089
a6792a3e
MH		 2090 /*
2091 * Initialize tty's
2092 */
2093 if (!(un->un_flags & UN_ISOPEN)) {
2094 /* Store important variables. */
2095 un->un_tty = tty;
2096
2097 /* Maybe do something here to the TTY struct as well? */
2098 }
2099
2100 /*
2101 * Initialize if neither terminal or printer is open.
2102 */
2103 if (!((ch->ch_tun.un_flags | ch->ch_pun.un_flags) & UN_ISOPEN)) {
2104
a6792a3e
MH		 2105 ch->ch_mforce = 0;
2106 ch->ch_mval = 0;
2107
2108 /*
2109 * Flush input queue.
2110 */
2111 head = readw(&(bs->rx_head));
2112 writew(head, &(bs->rx_tail));
2113
2114 ch->ch_flags = 0;
2115 ch->pscan_state = 0;
2116 ch->pscan_savechar = 0;
2117
2118 ch->ch_c_cflag = tty->termios.c_cflag;
2119 ch->ch_c_iflag = tty->termios.c_iflag;
2120 ch->ch_c_oflag = tty->termios.c_oflag;
2121 ch->ch_c_lflag = tty->termios.c_lflag;
2122 ch->ch_startc = tty->termios.c_cc[VSTART];
2123 ch->ch_stopc = tty->termios.c_cc[VSTOP];
2124
2125 /* TODO: flush our TTY struct here? */
2126 }
2127
2128 dgap_carrier(ch);
2129 /*
2130 * Run param in case we changed anything
2131 */
2132 dgap_param(tty);
2133
2134 /*
2135 * follow protocol for opening port
2136 */
2137
2138 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
2139 DGAP_UNLOCK(brd->bd_lock, lock_flags);
2140
2141 rc = dgap_block_til_ready(tty, file, ch);
2142
305ec874 2143 if (!un->un_tty)
a6792a3e 2144 return -ENODEV;
a6792a3e 2145
a6792a3e
MH		 2146 /* No going back now, increment our unit and channel counters */
2147 DGAP_LOCK(ch->ch_lock, lock_flags);
2148 ch->ch_open_count++;
2149 un->un_open_count++;
2150 un->un_flags |= (UN_ISOPEN);
2151 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2152
cf42c34d 2153 return rc;
a6792a3e
MH		 2154}
2155
a6792a3e
MH		 2156/*
2157 * dgap_block_til_ready()
2158 *
2159 * Wait for DCD, if needed.
2160 */
6045b6af
MH		 2161static int dgap_block_til_ready(struct tty_struct *tty, struct file *file,
2162 struct channel_t *ch)
a6792a3e
MH		 2163{
2164 int retval = 0;
2165 struct un_t *un = NULL;
2166 ulong lock_flags;
2167 uint old_flags = 0;
2168 int sleep_on_un_flags = 0;
2169
305ec874
MH		 2170 if (!tty || tty->magic != TTY_MAGIC || !file || !ch ||
2171 ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 2172 return -ENXIO;
a6792a3e
MH		 2173
2174 un = tty->driver_data;
305ec874 2175 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 2176 return -ENXIO;
a6792a3e 2177
a6792a3e
MH		 2178 DGAP_LOCK(ch->ch_lock, lock_flags);
2179
2180 ch->ch_wopen++;
2181
2182 /* Loop forever */
2183 while (1) {
2184
2185 sleep_on_un_flags = 0;
2186
2187 /*
6045b6af
MH		 2188 * If board has failed somehow during our sleep,
2189 * bail with error.
a6792a3e
MH		 2190 */
2191 if (ch->ch_bd->state == BOARD_FAILED) {
2192 retval = -ENXIO;
2193 break;
2194 }
2195
2196 /* If tty was hung up, break out of loop and set error. */
2197 if (tty_hung_up_p(file)) {
2198 retval = -EAGAIN;
2199 break;
2200 }
2201
2202 /*
2203 * If either unit is in the middle of the fragile part of close,
2204 * we just cannot touch the channel safely.
2205 * Go back to sleep, knowing that when the channel can be
2206 * touched safely, the close routine will signal the
2207 * ch_wait_flags to wake us back up.
2208 */
6045b6af
MH		 2209 if (!((ch->ch_tun.un_flags | ch->ch_pun.un_flags) &
2210 UN_CLOSING)) {
a6792a3e
MH		 2211
2212 /*
2213 * Our conditions to leave cleanly and happily:
2214 * 1) NONBLOCKING on the tty is set.
2215 * 2) CLOCAL is set.
2216 * 3) DCD (fake or real) is active.
2217 */
2218
305ec874 2219 if (file->f_flags & O_NONBLOCK)
a6792a3e 2220 break;
a6792a3e 2221
305ec874 2222 if (tty->flags & (1 << TTY_IO_ERROR))
a6792a3e 2223 break;
a6792a3e 2224
31960c16 2225 if (ch->ch_flags & CH_CD)
a6792a3e 2226 break;
a6792a3e 2227
31960c16 2228 if (ch->ch_flags & CH_FCAR)
a6792a3e 2229 break;
305ec874 2230 } else {
a6792a3e
MH		 2231 sleep_on_un_flags = 1;
2232 }
2233
2234 /*
2235 * If there is a signal pending, the user probably
2236 * interrupted (ctrl-c) us.
2237 * Leave loop with error set.
2238 */
2239 if (signal_pending(current)) {
a6792a3e
MH		 2240 retval = -ERESTARTSYS;
2241 break;
2242 }
2243
a6792a3e
MH		 2244 /*
2245 * Store the flags before we let go of channel lock
2246 */
2247 if (sleep_on_un_flags)
2248 old_flags = ch->ch_tun.un_flags | ch->ch_pun.un_flags;
2249 else
2250 old_flags = ch->ch_flags;
2251
2252 /*
2253 * Let go of channel lock before calling schedule.
2254 * Our poller will get any FEP events and wake us up when DCD
2255 * eventually goes active.
2256 */
2257
2258 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2259
a6792a3e 2260 /*
6045b6af
MH		 2261 * Wait for something in the flags to change
2262 * from the current value.
a6792a3e
MH		 2263 */
2264 if (sleep_on_un_flags) {
2265 retval = wait_event_interruptible(un->un_flags_wait,
6045b6af
MH		 2266 (old_flags != (ch->ch_tun.un_flags |
2267 ch->ch_pun.un_flags)));
305ec874 2268 } else {
a6792a3e
MH		 2269 retval = wait_event_interruptible(ch->ch_flags_wait,
2270 (old_flags != ch->ch_flags));
2271 }
2272
a6792a3e
MH		 2273 /*
2274 * We got woken up for some reason.
2275 * Before looping around, grab our channel lock.
2276 */
2277 DGAP_LOCK(ch->ch_lock, lock_flags);
2278 }
2279
2280 ch->ch_wopen--;
2281
2282 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2283
31960c16 2284 if (retval)
cf42c34d 2285 return retval;
a6792a3e 2286
cf42c34d 2287 return 0;
a6792a3e
MH		 2288}
2289
a6792a3e
MH		 2290/*
2291 * dgap_tty_hangup()
2292 *
2293 * Hangup the port. Like a close, but don't wait for output to drain.
2294 */
2295static void dgap_tty_hangup(struct tty_struct *tty)
2296{
2297 struct board_t *bd;
2298 struct channel_t *ch;
2299 struct un_t *un;
2300
2301 if (!tty || tty->magic != TTY_MAGIC)
2302 return;
2303
2304 un = tty->driver_data;
2305 if (!un || un->magic != DGAP_UNIT_MAGIC)
2306 return;
2307
2308 ch = un->un_ch;
2309 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2310 return;
2311
2312 bd = ch->ch_bd;
2313 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
2314 return;
2315
a6792a3e
MH		 2316 /* flush the transmit queues */
2317 dgap_tty_flush_buffer(tty);
2318
a6792a3e
MH		 2319}
2320
a6792a3e
MH		 2321/*
2322 * dgap_tty_close()
2323 *
2324 */
2325static void dgap_tty_close(struct tty_struct *tty, struct file *file)
2326{
2327 struct ktermios *ts;
2328 struct board_t *bd;
2329 struct channel_t *ch;
2330 struct un_t *un;
2331 ulong lock_flags;
2332 int rc = 0;
2333
2334 if (!tty || tty->magic != TTY_MAGIC)
2335 return;
2336
2337 un = tty->driver_data;
2338 if (!un || un->magic != DGAP_UNIT_MAGIC)
2339 return;
2340
2341 ch = un->un_ch;
2342 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2343 return;
2344
2345 bd = ch->ch_bd;
2346 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
2347 return;
2348
2349 ts = &tty->termios;
2350
a6792a3e
MH		 2351 DGAP_LOCK(ch->ch_lock, lock_flags);
2352
2353 /*
2354 * Determine if this is the last close or not - and if we agree about
2355 * which type of close it is with the Line Discipline
2356 */
82ed9774 2357 if ((tty->count == 1) && (un->un_open_count != 1)) {
a6792a3e
MH		 2358 /*
2359 * Uh, oh. tty->count is 1, which means that the tty
2360 * structure will be freed. un_open_count should always
2361 * be one in these conditions. If it's greater than
2362 * one, we've got real problems, since it means the
2363 * serial port won't be shutdown.
2364 */
a6792a3e 2365 un->un_open_count = 1;
82ed9774 2366 }
a6792a3e 2367
31960c16 2368 if (--un->un_open_count < 0)
a6792a3e 2369 un->un_open_count = 0;
a6792a3e
MH		 2370
2371 ch->ch_open_count--;
2372
2373 if (ch->ch_open_count && un->un_open_count) {
a6792a3e 2374 DGAP_UNLOCK(ch->ch_lock, lock_flags);
7d6069d7
MH		 2375 return;
2376 }
a6792a3e
MH		 2377
2378 /* OK, its the last close on the unit */
a6792a3e
MH		 2379
2380 un->un_flags |= UN_CLOSING;
2381
2382 tty->closing = 1;
2383
2384 /*
2385 * Only officially close channel if count is 0 and
7d6069d7 2386 * DIGI_PRINTER bit is not set.
a6792a3e 2387 */
6045b6af
MH		 2388 if ((ch->ch_open_count == 0) &&
2389 !(ch->ch_digi.digi_flags & DIGI_PRINTER)) {
a6792a3e
MH		 2390
2391 ch->ch_flags &= ~(CH_RXBLOCK);
2392
2393 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2394
2395 /* wait for output to drain */
2396 /* This will also return if we take an interrupt */
2397
a6792a3e 2398 rc = dgap_wait_for_drain(tty);
a6792a3e
MH		 2399
2400 dgap_tty_flush_buffer(tty);
2401 tty_ldisc_flush(tty);
2402
2403 DGAP_LOCK(ch->ch_lock, lock_flags);
2404
2405 tty->closing = 0;
2406
2407 /*
2408 * If we have HUPCL set, lower DTR and RTS
2409 */
b115b024 2410 if (ch->ch_c_cflag & HUPCL) {
a6792a3e 2411 ch->ch_mostat &= ~(D_RTS(ch)|D_DTR(ch));
b115b024 2412 dgap_cmdb(ch, SMODEM, 0, D_DTR(ch)|D_RTS(ch), 0);
a6792a3e
MH		 2413
2414 /*
2415 * Go to sleep to ensure RTS/DTR
2416 * have been dropped for modems to see it.
2417 */
2418 if (ch->ch_close_delay) {
a6792a3e
MH		 2419 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2420 dgap_ms_sleep(ch->ch_close_delay);
2421 DGAP_LOCK(ch->ch_lock, lock_flags);
a6792a3e
MH		 2422 }
2423 }
2424
2425 ch->pscan_state = 0;
2426 ch->pscan_savechar = 0;
2427 ch->ch_baud_info = 0;
2428
2429 }
2430
2431 /*
2432 * turn off print device when closing print device.
2433 */
b115b024 2434 if ((un->un_type == DGAP_PRINT) && (ch->ch_flags & CH_PRON)) {
a6792a3e
MH		 2435 dgap_wmove(ch, ch->ch_digi.digi_offstr,
2436 (int) ch->ch_digi.digi_offlen);
2437 ch->ch_flags &= ~CH_PRON;
2438 }
2439
2440 un->un_tty = NULL;
2441 un->un_flags &= ~(UN_ISOPEN | UN_CLOSING);
2442 tty->driver_data = NULL;
2443
a6792a3e
MH		 2444 wake_up_interruptible(&ch->ch_flags_wait);
2445 wake_up_interruptible(&un->un_flags_wait);
2446
2447 DGAP_UNLOCK(ch->ch_lock, lock_flags);
a6792a3e
MH		 2448}
2449
a6792a3e
MH		 2450/*
2451 * dgap_tty_chars_in_buffer()
2452 *
2453 * Return number of characters that have not been transmitted yet.
2454 *
2455 * This routine is used by the line discipline to determine if there
2456 * is data waiting to be transmitted/drained/flushed or not.
2457 */
2458static int dgap_tty_chars_in_buffer(struct tty_struct *tty)
2459{
2460 struct board_t *bd = NULL;
2461 struct channel_t *ch = NULL;
2462 struct un_t *un = NULL;
2463 struct bs_t *bs = NULL;
2464 uchar tbusy;
2465 uint chars = 0;
2466 u16 thead, ttail, tmask, chead, ctail;
2467 ulong lock_flags = 0;
2468 ulong lock_flags2 = 0;
2469
2470 if (tty == NULL)
cf42c34d 2471 return 0;
a6792a3e
MH		 2472
2473 un = tty->driver_data;
2474 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 2475 return 0;
a6792a3e
MH		 2476
2477 ch = un->un_ch;
2478 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 2479 return 0;
a6792a3e
MH		 2480
2481 bd = ch->ch_bd;
2482 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 2483 return 0;
a6792a3e 2484
7d6069d7 2485 bs = ch->ch_bs;
a6792a3e 2486 if (!bs)
cf42c34d 2487 return 0;
a6792a3e
MH		 2488
2489 DGAP_LOCK(bd->bd_lock, lock_flags);
2490 DGAP_LOCK(ch->ch_lock, lock_flags2);
2491
2492 tmask = (ch->ch_tsize - 1);
2493
2494 /* Get Transmit queue pointers */
2495 thead = readw(&(bs->tx_head)) & tmask;
2496 ttail = readw(&(bs->tx_tail)) & tmask;
2497
2498 /* Get tbusy flag */
2499 tbusy = readb(&(bs->tbusy));
2500
2501 /* Get Command queue pointers */
2502 chead = readw(&(ch->ch_cm->cm_head));
2503 ctail = readw(&(ch->ch_cm->cm_tail));
2504
2505 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
2506 DGAP_UNLOCK(bd->bd_lock, lock_flags);
2507
2508 /*
2509 * The only way we know for sure if there is no pending
2510 * data left to be transferred, is if:
2511 * 1) Transmit head and tail are equal (empty).
2512 * 2) Command queue head and tail are equal (empty).
2513 * 3) The "TBUSY" flag is 0. (Transmitter not busy).
7d6069d7 2514 */
a6792a3e
MH		 2515
2516 if ((ttail == thead) && (tbusy == 0) && (chead == ctail)) {
2517 chars = 0;
305ec874 2518 } else {
a6792a3e
MH		 2519 if (thead >= ttail)
2520 chars = thead - ttail;
2521 else
2522 chars = thead - ttail + ch->ch_tsize;
2523 /*
2524 * Fudge factor here.
2525 * If chars is zero, we know that the command queue had
2526 * something in it or tbusy was set. Because we cannot
2527 * be sure if there is still some data to be transmitted,
2528 * lets lie, and tell ld we have 1 byte left.
2529 */
2530 if (chars == 0) {
2531 /*
2532 * If TBUSY is still set, and our tx buffers are empty,
2533 * force the firmware to send me another wakeup after
2534 * TBUSY has been cleared.
2535 */
2536 if (tbusy != 0) {
2537 DGAP_LOCK(ch->ch_lock, lock_flags);
2538 un->un_flags |= UN_EMPTY;
2539 writeb(1, &(bs->iempty));
2540 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2541 }
2542 chars = 1;
2543 }
2544 }
2545
cf42c34d 2546 return chars;
a6792a3e
MH		 2547}
2548
a6792a3e
MH		 2549static int dgap_wait_for_drain(struct tty_struct *tty)
2550{
2551 struct channel_t *ch;
2552 struct un_t *un;
2553 struct bs_t *bs;
2554 int ret = -EIO;
2555 uint count = 1;
2556 ulong lock_flags = 0;
2557
2558 if (!tty || tty->magic != TTY_MAGIC)
2559 return ret;
2560
2561 un = tty->driver_data;
2562 if (!un || un->magic != DGAP_UNIT_MAGIC)
2563 return ret;
2564
2565 ch = un->un_ch;
2566 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2567 return ret;
2568
7d6069d7 2569 bs = ch->ch_bs;
a6792a3e
MH		 2570 if (!bs)
2571 return ret;
2572
2573 ret = 0;
2574
a6792a3e
MH		 2575 /* Loop until data is drained */
2576 while (count != 0) {
2577
2578 count = dgap_tty_chars_in_buffer(tty);
2579
2580 if (count == 0)
2581 break;
2582
2583 /* Set flag waiting for drain */
2584 DGAP_LOCK(ch->ch_lock, lock_flags);
2585 un->un_flags |= UN_EMPTY;
2586 writeb(1, &(bs->iempty));
2587 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2588
2589 /* Go to sleep till we get woken up */
6045b6af
MH		 2590 ret = wait_event_interruptible(un->un_flags_wait,
2591 ((un->un_flags & UN_EMPTY) == 0));
a6792a3e 2592 /* If ret is non-zero, user ctrl-c'ed us */
305ec874 2593 if (ret)
a6792a3e 2594 break;
a6792a3e
MH		 2595 }
2596
2597 DGAP_LOCK(ch->ch_lock, lock_flags);
2598 un->un_flags &= ~(UN_EMPTY);
2599 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2600
cf42c34d 2601 return ret;
a6792a3e
MH		 2602}
2603
a6792a3e
MH		 2604/*
2605 * dgap_maxcps_room
2606 *
2607 * Reduces bytes_available to the max number of characters
2608 * that can be sent currently given the maxcps value, and
2609 * returns the new bytes_available. This only affects printer
2610 * output.
2611 */
2612static int dgap_maxcps_room(struct tty_struct *tty, int bytes_available)
2613{
2614 struct channel_t *ch = NULL;
2615 struct un_t *un = NULL;
2616
2617 if (tty == NULL)
cf42c34d 2618 return bytes_available;
a6792a3e
MH		 2619
2620 un = tty->driver_data;
2621 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 2622 return bytes_available;
a6792a3e
MH		 2623
2624 ch = un->un_ch;
2625 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 2626 return bytes_available;
a6792a3e
MH		 2627
2628 /*
2629 * If its not the Transparent print device, return
2630 * the full data amount.
2631 */
2632 if (un->un_type != DGAP_PRINT)
cf42c34d 2633 return bytes_available;
a6792a3e 2634
b115b024 2635 if (ch->ch_digi.digi_maxcps > 0 && ch->ch_digi.digi_bufsize > 0) {
a6792a3e
MH		 2636 int cps_limit = 0;
2637 unsigned long current_time = jiffies;
2638 unsigned long buffer_time = current_time +
6045b6af
MH		 2639 (HZ * ch->ch_digi.digi_bufsize) /
2640 ch->ch_digi.digi_maxcps;
a6792a3e
MH		 2641
2642 if (ch->ch_cpstime < current_time) {
2643 /* buffer is empty */
8a2c9c44 2644 ch->ch_cpstime = current_time; /* reset ch_cpstime */
a6792a3e 2645 cps_limit = ch->ch_digi.digi_bufsize;
305ec874 2646 } else if (ch->ch_cpstime < buffer_time) {
a6792a3e 2647 /* still room in the buffer */
6045b6af
MH		 2648 cps_limit = ((buffer_time - ch->ch_cpstime) *
2649 ch->ch_digi.digi_maxcps) / HZ;
305ec874 2650 } else {
a6792a3e
MH		 2651 /* no room in the buffer */
2652 cps_limit = 0;
2653 }
2654
2655 bytes_available = min(cps_limit, bytes_available);
2656 }
2657
cf42c34d 2658 return bytes_available;
a6792a3e
MH		 2659}
2660
a6792a3e
MH		 2661static inline void dgap_set_firmware_event(struct un_t *un, unsigned int event)
2662{
2663 struct channel_t *ch = NULL;
2664 struct bs_t *bs = NULL;
2665
2666 if (!un || un->magic != DGAP_UNIT_MAGIC)
2667 return;
2668 ch = un->un_ch;
2669 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2670 return;
7d6069d7 2671 bs = ch->ch_bs;
a6792a3e
MH		 2672 if (!bs)
2673 return;
2674
2675 if ((event & UN_LOW) != 0) {
2676 if ((un->un_flags & UN_LOW) == 0) {
2677 un->un_flags |= UN_LOW;
2678 writeb(1, &(bs->ilow));
2679 }
2680 }
2681 if ((event & UN_LOW) != 0) {
2682 if ((un->un_flags & UN_EMPTY) == 0) {
2683 un->un_flags |= UN_EMPTY;
2684 writeb(1, &(bs->iempty));
2685 }
2686 }
2687}
2688
a6792a3e
MH		 2689/*
2690 * dgap_tty_write_room()
2691 *
2692 * Return space available in Tx buffer
2693 */
2694static int dgap_tty_write_room(struct tty_struct *tty)
2695{
2696 struct channel_t *ch = NULL;
2697 struct un_t *un = NULL;
2698 struct bs_t *bs = NULL;
2699 u16 head, tail, tmask;
2700 int ret = 0;
2701 ulong lock_flags = 0;
2702
61260228 2703 if (!tty)
cf42c34d 2704 return 0;
a6792a3e
MH		 2705
2706 un = tty->driver_data;
2707 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 2708 return 0;
a6792a3e
MH		 2709
2710 ch = un->un_ch;
2711 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 2712 return 0;
a6792a3e 2713
7d6069d7 2714 bs = ch->ch_bs;
a6792a3e 2715 if (!bs)
cf42c34d 2716 return 0;
a6792a3e
MH		 2717
2718 DGAP_LOCK(ch->ch_lock, lock_flags);
2719
2720 tmask = ch->ch_tsize - 1;
2721 head = readw(&(bs->tx_head)) & tmask;
2722 tail = readw(&(bs->tx_tail)) & tmask;
2723
7d6069d7
MH		 2724 ret = tail - head - 1;
2725 if (ret < 0)
2726 ret += ch->ch_tsize;
a6792a3e
MH		 2727
2728 /* Limit printer to maxcps */
2729 ret = dgap_maxcps_room(tty, ret);
2730
2731 /*
2732 * If we are printer device, leave space for
2733 * possibly both the on and off strings.
2734 */
2735 if (un->un_type == DGAP_PRINT) {
2736 if (!(ch->ch_flags & CH_PRON))
2737 ret -= ch->ch_digi.digi_onlen;
2738 ret -= ch->ch_digi.digi_offlen;
305ec874 2739 } else {
a6792a3e
MH		 2740 if (ch->ch_flags & CH_PRON)
2741 ret -= ch->ch_digi.digi_offlen;
2742 }
2743
2744 if (ret < 0)
2745 ret = 0;
2746
2747 /*
2748 * Schedule FEP to wake us up if needed.
2749 *
2750 * TODO: This might be overkill...
2751 * Do we really need to schedule callbacks from the FEP
2752 * in every case? Can we get smarter based on ret?
2753 */
2754 dgap_set_firmware_event(un, UN_LOW | UN_EMPTY);
2755 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2756
cf42c34d 2757 return ret;
a6792a3e
MH		 2758}
2759
a6792a3e
MH		 2760/*
2761 * dgap_tty_put_char()
2762 *
2763 * Put a character into ch->ch_buf
2764 *
2765 * - used by the line discipline for OPOST processing
2766 */
2767static int dgap_tty_put_char(struct tty_struct *tty, unsigned char c)
2768{
2769 /*
2770 * Simply call tty_write.
2771 */
a6792a3e
MH		 2772 dgap_tty_write(tty, &c, 1);
2773 return 1;
2774}
2775
a6792a3e
MH		 2776/*
2777 * dgap_tty_write()
2778 *
2779 * Take data from the user or kernel and send it out to the FEP.
2780 * In here exists all the Transparent Print magic as well.
2781 */
8a2c9c44
MH		 2782static int dgap_tty_write(struct tty_struct *tty, const unsigned char *buf,
2783 int count)
a6792a3e
MH		 2784{
2785 struct channel_t *ch = NULL;
2786 struct un_t *un = NULL;
2787 struct bs_t *bs = NULL;
2788 char *vaddr = NULL;
2789 u16 head, tail, tmask, remain;
2790 int bufcount = 0, n = 0;
2791 int orig_count = 0;
2792 ulong lock_flags;
a6792a3e 2793
61260228 2794 if (!tty)
cf42c34d 2795 return 0;
a6792a3e
MH		 2796
2797 un = tty->driver_data;
2798 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 2799 return 0;
a6792a3e
MH		 2800
2801 ch = un->un_ch;
2802 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 2803 return 0;
a6792a3e 2804
7d6069d7 2805 bs = ch->ch_bs;
a6792a3e 2806 if (!bs)
cf42c34d 2807 return 0;
a6792a3e
MH		 2808
2809 if (!count)
cf42c34d 2810 return 0;
a6792a3e 2811
a6792a3e
MH		 2812 /*
2813 * Store original amount of characters passed in.
2814 * This helps to figure out if we should ask the FEP
2815 * to send us an event when it has more space available.
2816 */
2817 orig_count = count;
2818
2819 DGAP_LOCK(ch->ch_lock, lock_flags);
2820
2821 /* Get our space available for the channel from the board */
2822 tmask = ch->ch_tsize - 1;
2823 head = readw(&(bs->tx_head)) & tmask;
2824 tail = readw(&(bs->tx_tail)) & tmask;
2825
d1c3c6f5
MH		 2826 bufcount = tail - head - 1;
2827 if (bufcount < 0)
a6792a3e
MH		 2828 bufcount += ch->ch_tsize;
2829
a6792a3e
MH		 2830 /*
2831 * Limit printer output to maxcps overall, with bursts allowed
2832 * up to bufsize characters.
2833 */
2834 bufcount = dgap_maxcps_room(tty, bufcount);
2835
2836 /*
2837 * Take minimum of what the user wants to send, and the
2838 * space available in the FEP buffer.
2839 */
2840 count = min(count, bufcount);
2841
2842 /*
2843 * Bail if no space left.
2844 */
2845 if (count <= 0) {
2846 dgap_set_firmware_event(un, UN_LOW | UN_EMPTY);
2847 DGAP_UNLOCK(ch->ch_lock, lock_flags);
cf42c34d 2848 return 0;
a6792a3e
MH		 2849 }
2850
2851 /*
2852 * Output the printer ON string, if we are in terminal mode, but
2853 * need to be in printer mode.
2854 */
2855 if ((un->un_type == DGAP_PRINT) && !(ch->ch_flags & CH_PRON)) {
2856 dgap_wmove(ch, ch->ch_digi.digi_onstr,
2857 (int) ch->ch_digi.digi_onlen);
2858 head = readw(&(bs->tx_head)) & tmask;
2859 ch->ch_flags |= CH_PRON;
2860 }
2861
2862 /*
2863 * On the other hand, output the printer OFF string, if we are
2864 * currently in printer mode, but need to output to the terminal.
2865 */
2866 if ((un->un_type != DGAP_PRINT) && (ch->ch_flags & CH_PRON)) {
2867 dgap_wmove(ch, ch->ch_digi.digi_offstr,
2868 (int) ch->ch_digi.digi_offlen);
2869 head = readw(&(bs->tx_head)) & tmask;
2870 ch->ch_flags &= ~CH_PRON;
2871 }
2872
2873 /*
8a2c9c44
MH		 2874 * If there is nothing left to copy, or
2875 * I can't handle any more data, leave.
a6792a3e
MH		 2876 */
2877 if (count <= 0) {
2878 dgap_set_firmware_event(un, UN_LOW | UN_EMPTY);
2879 DGAP_UNLOCK(ch->ch_lock, lock_flags);
cf42c34d 2880 return 0;
a6792a3e
MH		 2881 }
2882
a6792a3e
MH		 2883 n = count;
2884
2885 /*
2886 * If the write wraps over the top of the circular buffer,
2887 * move the portion up to the wrap point, and reset the
2888 * pointers to the bottom.
2889 */
2890 remain = ch->ch_tstart + ch->ch_tsize - head;
2891
2892 if (n >= remain) {
2893 n -= remain;
2894 vaddr = ch->ch_taddr + head;
2895
2896 memcpy_toio(vaddr, (uchar *) buf, remain);
8a2c9c44
MH		 2897 dgap_sniff_nowait_nolock(ch, "USER WRITE", (uchar *) buf,
2898 remain);
a6792a3e
MH		 2899
2900 head = ch->ch_tstart;
2901 buf += remain;
2902 }
2903
2904 if (n > 0) {
2905
2906 /*
2907 * Move rest of data.
2908 */
2909 vaddr = ch->ch_taddr + head;
2910 remain = n;
2911
2912 memcpy_toio(vaddr, (uchar *) buf, remain);
8a2c9c44
MH		 2913 dgap_sniff_nowait_nolock(ch, "USER WRITE", (uchar *)buf,
2914 remain);
a6792a3e
MH		 2915
2916 head += remain;
2917
2918 }
2919
2920 if (count) {
2921 ch->ch_txcount += count;
2922 head &= tmask;
2923 writew(head, &(bs->tx_head));
2924 }
2925
a6792a3e
MH		 2926 dgap_set_firmware_event(un, UN_LOW | UN_EMPTY);
2927
2928 /*
2929 * If this is the print device, and the
2930 * printer is still on, we need to turn it
2931 * off before going idle. If the buffer is
2932 * non-empty, wait until it goes empty.
2933 * Otherwise turn it off right now.
2934 */
2935 if ((un->un_type == DGAP_PRINT) && (ch->ch_flags & CH_PRON)) {
2936 tail = readw(&(bs->tx_tail)) & tmask;
2937
2938 if (tail != head) {
2939 un->un_flags |= UN_EMPTY;
2940 writeb(1, &(bs->iempty));
305ec874 2941 } else {
a6792a3e
MH		 2942 dgap_wmove(ch, ch->ch_digi.digi_offstr,
2943 (int) ch->ch_digi.digi_offlen);
2944 head = readw(&(bs->tx_head)) & tmask;
2945 ch->ch_flags &= ~CH_PRON;
2946 }
2947 }
2948
2949 /* Update printer buffer empty time. */
2950 if ((un->un_type == DGAP_PRINT) && (ch->ch_digi.digi_maxcps > 0)
2951 && (ch->ch_digi.digi_bufsize > 0)) {
7d6069d7 2952 ch->ch_cpstime += (HZ * count) / ch->ch_digi.digi_maxcps;
a6792a3e
MH		 2953 }
2954
61260228 2955 DGAP_UNLOCK(ch->ch_lock, lock_flags);
a6792a3e 2956
cf42c34d 2957 return count;
a6792a3e
MH		 2958}
2959
a6792a3e
MH		 2960/*
2961 * Return modem signals to ld.
2962 */
2963static int dgap_tty_tiocmget(struct tty_struct *tty)
2964{
2965 struct channel_t *ch;
2966 struct un_t *un;
2967 int result = -EIO;
2968 uchar mstat = 0;
2969 ulong lock_flags;
2970
2971 if (!tty || tty->magic != TTY_MAGIC)
2972 return result;
2973
2974 un = tty->driver_data;
2975 if (!un || un->magic != DGAP_UNIT_MAGIC)
2976 return result;
2977
2978 ch = un->un_ch;
2979 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2980 return result;
2981
a6792a3e
MH		 2982 DGAP_LOCK(ch->ch_lock, lock_flags);
2983
2984 mstat = readb(&(ch->ch_bs->m_stat));
7d6069d7
MH		 2985 /* Append any outbound signals that might be pending... */
2986 mstat |= ch->ch_mostat;
a6792a3e
MH		 2987
2988 DGAP_UNLOCK(ch->ch_lock, lock_flags);
2989
2990 result = 0;
2991
2992 if (mstat & D_DTR(ch))
2993 result |= TIOCM_DTR;
2994 if (mstat & D_RTS(ch))
2995 result |= TIOCM_RTS;
2996 if (mstat & D_CTS(ch))
2997 result |= TIOCM_CTS;
2998 if (mstat & D_DSR(ch))
2999 result |= TIOCM_DSR;
3000 if (mstat & D_RI(ch))
3001 result |= TIOCM_RI;
3002 if (mstat & D_CD(ch))
3003 result |= TIOCM_CD;
3004
a6792a3e
MH		 3005 return result;
3006}
3007
a6792a3e
MH		 3008/*
3009 * dgap_tty_tiocmset()
3010 *
3011 * Set modem signals, called by ld.
3012 */
a6792a3e 3013static int dgap_tty_tiocmset(struct tty_struct *tty,
7d6069d7 3014 unsigned int set, unsigned int clear)
a6792a3e
MH		 3015{
3016 struct board_t *bd;
3017 struct channel_t *ch;
3018 struct un_t *un;
3019 int ret = -EIO;
3020 ulong lock_flags;
3021 ulong lock_flags2;
3022
3023 if (!tty || tty->magic != TTY_MAGIC)
3024 return ret;
3025
3026 un = tty->driver_data;
3027 if (!un || un->magic != DGAP_UNIT_MAGIC)
3028 return ret;
3029
3030 ch = un->un_ch;
3031 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3032 return ret;
3033
3034 bd = ch->ch_bd;
3035 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3036 return ret;
3037
a6792a3e
MH		 3038 DGAP_LOCK(bd->bd_lock, lock_flags);
3039 DGAP_LOCK(ch->ch_lock, lock_flags2);
3040
3041 if (set & TIOCM_RTS) {
3042 ch->ch_mforce |= D_RTS(ch);
3043 ch->ch_mval |= D_RTS(ch);
7d6069d7 3044 }
a6792a3e
MH		 3045
3046 if (set & TIOCM_DTR) {
3047 ch->ch_mforce |= D_DTR(ch);
3048 ch->ch_mval |= D_DTR(ch);
7d6069d7 3049 }
a6792a3e
MH		 3050
3051 if (clear & TIOCM_RTS) {
3052 ch->ch_mforce |= D_RTS(ch);
3053 ch->ch_mval &= ~(D_RTS(ch));
7d6069d7 3054 }
a6792a3e
MH		 3055
3056 if (clear & TIOCM_DTR) {
3057 ch->ch_mforce |= D_DTR(ch);
3058 ch->ch_mval &= ~(D_DTR(ch));
7d6069d7 3059 }
a6792a3e
MH		 3060
3061 dgap_param(tty);
3062
3063 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3064 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3065
cf42c34d 3066 return 0;
a6792a3e
MH		 3067}
3068
a6792a3e
MH		 3069/*
3070 * dgap_tty_send_break()
3071 *
3072 * Send a Break, called by ld.
3073 */
3074static int dgap_tty_send_break(struct tty_struct *tty, int msec)
3075{
3076 struct board_t *bd;
3077 struct channel_t *ch;
3078 struct un_t *un;
3079 int ret = -EIO;
3080 ulong lock_flags;
3081 ulong lock_flags2;
3082
3083 if (!tty || tty->magic != TTY_MAGIC)
3084 return ret;
3085
3086 un = tty->driver_data;
3087 if (!un || un->magic != DGAP_UNIT_MAGIC)
3088 return ret;
3089
3090 ch = un->un_ch;
3091 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3092 return ret;
3093
3094 bd = ch->ch_bd;
3095 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3096 return ret;
3097
3098 switch (msec) {
3099 case -1:
3100 msec = 0xFFFF;
3101 break;
3102 case 0:
3103 msec = 1;
3104 break;
3105 default:
3106 msec /= 10;
3107 break;
3108 }
3109
a6792a3e
MH		 3110 DGAP_LOCK(bd->bd_lock, lock_flags);
3111 DGAP_LOCK(ch->ch_lock, lock_flags2);
3112#if 0
3113 dgap_cmdw(ch, SBREAK, (u16) SBREAK_TIME, 0);
3114#endif
3115 dgap_cmdw(ch, SBREAK, (u16) msec, 0);
3116
3117 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3118 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3119
cf42c34d 3120 return 0;
a6792a3e
MH		 3121}
3122
a6792a3e
MH		 3123/*
3124 * dgap_tty_wait_until_sent()
3125 *
3126 * wait until data has been transmitted, called by ld.
3127 */
3128static void dgap_tty_wait_until_sent(struct tty_struct *tty, int timeout)
3129{
31960c16 3130 dgap_wait_for_drain(tty);
a6792a3e
MH		 3131}
3132
a6792a3e
MH		 3133/*
3134 * dgap_send_xchar()
3135 *
3136 * send a high priority character, called by ld.
3137 */
3138static void dgap_tty_send_xchar(struct tty_struct *tty, char c)
3139{
3140 struct board_t *bd;
3141 struct channel_t *ch;
3142 struct un_t *un;
3143 ulong lock_flags;
3144 ulong lock_flags2;
3145
3146 if (!tty || tty->magic != TTY_MAGIC)
3147 return;
3148
3149 un = tty->driver_data;
3150 if (!un || un->magic != DGAP_UNIT_MAGIC)
3151 return;
3152
3153 ch = un->un_ch;
3154 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3155 return;
3156
3157 bd = ch->ch_bd;
3158 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3159 return;
3160
a6792a3e
MH		 3161 DGAP_LOCK(bd->bd_lock, lock_flags);
3162 DGAP_LOCK(ch->ch_lock, lock_flags2);
3163
3164 /*
3165 * This is technically what we should do.
3166 * However, the NIST tests specifically want
3167 * to see each XON or XOFF character that it
3168 * sends, so lets just send each character
3169 * by hand...
3170 */
3171#if 0
305ec874 3172 if (c == STOP_CHAR(tty))
a6792a3e 3173 dgap_cmdw(ch, RPAUSE, 0, 0);
305ec874 3174 else if (c == START_CHAR(tty))
a6792a3e 3175 dgap_cmdw(ch, RRESUME, 0, 0);
305ec874 3176 else
a6792a3e 3177 dgap_wmove(ch, &c, 1);
a6792a3e
MH		 3178#else
3179 dgap_wmove(ch, &c, 1);
3180#endif
3181
3182 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3183 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3184
a6792a3e
MH		 3185 return;
3186}
3187
a6792a3e
MH		 3188/*
3189 * Return modem signals to ld.
3190 */
3191static int dgap_get_modem_info(struct channel_t *ch, unsigned int __user *value)
3192{
3193 int result = 0;
3194 uchar mstat = 0;
3195 ulong lock_flags;
3196 int rc = 0;
3197
a6792a3e 3198 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3199 return -ENXIO;
a6792a3e
MH		 3200
3201 DGAP_LOCK(ch->ch_lock, lock_flags);
3202
3203 mstat = readb(&(ch->ch_bs->m_stat));
3204 /* Append any outbound signals that might be pending... */
3205 mstat |= ch->ch_mostat;
3206
3207 DGAP_UNLOCK(ch->ch_lock, lock_flags);
3208
3209 result = 0;
3210
3211 if (mstat & D_DTR(ch))
3212 result |= TIOCM_DTR;
3213 if (mstat & D_RTS(ch))
3214 result |= TIOCM_RTS;
3215 if (mstat & D_CTS(ch))
3216 result |= TIOCM_CTS;
3217 if (mstat & D_DSR(ch))
3218 result |= TIOCM_DSR;
3219 if (mstat & D_RI(ch))
3220 result |= TIOCM_RI;
3221 if (mstat & D_CD(ch))
3222 result |= TIOCM_CD;
3223
3224 rc = put_user(result, value);
3225
cf42c34d 3226 return rc;
a6792a3e
MH		 3227}
3228
a6792a3e
MH		 3229/*
3230 * dgap_set_modem_info()
3231 *
3232 * Set modem signals, called by ld.
3233 */
8a2c9c44
MH		 3234static int dgap_set_modem_info(struct tty_struct *tty, unsigned int command,
3235 unsigned int __user *value)
a6792a3e
MH		 3236{
3237 struct board_t *bd;
3238 struct channel_t *ch;
3239 struct un_t *un;
3240 int ret = -ENXIO;
3241 unsigned int arg = 0;
3242 ulong lock_flags;
3243 ulong lock_flags2;
3244
3245 if (!tty || tty->magic != TTY_MAGIC)
3246 return ret;
3247
3248 un = tty->driver_data;
3249 if (!un || un->magic != DGAP_UNIT_MAGIC)
3250 return ret;
3251
3252 ch = un->un_ch;
3253 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3254 return ret;
3255
3256 bd = ch->ch_bd;
3257 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3258 return ret;
3259
a6792a3e 3260 ret = get_user(arg, value);
31960c16 3261 if (ret)
cf42c34d 3262 return ret;
a6792a3e
MH		 3263
3264 switch (command) {
3265 case TIOCMBIS:
3266 if (arg & TIOCM_RTS) {
3267 ch->ch_mforce |= D_RTS(ch);
3268 ch->ch_mval |= D_RTS(ch);
7d6069d7 3269 }
a6792a3e
MH		 3270
3271 if (arg & TIOCM_DTR) {
3272 ch->ch_mforce |= D_DTR(ch);
3273 ch->ch_mval |= D_DTR(ch);
7d6069d7 3274 }
a6792a3e
MH		 3275
3276 break;
3277
3278 case TIOCMBIC:
3279 if (arg & TIOCM_RTS) {
3280 ch->ch_mforce |= D_RTS(ch);
3281 ch->ch_mval &= ~(D_RTS(ch));
7d6069d7 3282 }
a6792a3e
MH		 3283
3284 if (arg & TIOCM_DTR) {
3285 ch->ch_mforce |= D_DTR(ch);
3286 ch->ch_mval &= ~(D_DTR(ch));
7d6069d7 3287 }
a6792a3e
MH		 3288
3289 break;
3290
7d6069d7 3291 case TIOCMSET:
a6792a3e
MH		 3292 ch->ch_mforce = D_DTR(ch)|D_RTS(ch);
3293
305ec874 3294 if (arg & TIOCM_RTS)
a6792a3e 3295 ch->ch_mval |= D_RTS(ch);
305ec874 3296 else
a6792a3e 3297 ch->ch_mval &= ~(D_RTS(ch));
a6792a3e 3298
305ec874 3299 if (arg & TIOCM_DTR)
a6792a3e 3300 ch->ch_mval |= (D_DTR(ch));
305ec874 3301 else
a6792a3e 3302 ch->ch_mval &= ~(D_DTR(ch));
a6792a3e
MH		 3303
3304 break;
3305
3306 default:
cf42c34d 3307 return -EINVAL;
a6792a3e
MH		 3308 }
3309
3310 DGAP_LOCK(bd->bd_lock, lock_flags);
3311 DGAP_LOCK(ch->ch_lock, lock_flags2);
3312
3313 dgap_param(tty);
3314
3315 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3316 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3317
cf42c34d 3318 return 0;
a6792a3e
MH		 3319}
3320
a6792a3e
MH		 3321/*
3322 * dgap_tty_digigeta()
3323 *
3324 * Ioctl to get the information for ditty.
3325 *
3326 *
3327 *
3328 */
8a2c9c44
MH		 3329static int dgap_tty_digigeta(struct tty_struct *tty,
3330 struct digi_t __user *retinfo)
a6792a3e
MH		 3331{
3332 struct channel_t *ch;
3333 struct un_t *un;
3334 struct digi_t tmp;
3335 ulong lock_flags;
3336
3337 if (!retinfo)
cf42c34d 3338 return -EFAULT;
a6792a3e
MH		 3339
3340 if (!tty || tty->magic != TTY_MAGIC)
cf42c34d 3341 return -EFAULT;
a6792a3e
MH		 3342
3343 un = tty->driver_data;
3344 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 3345 return -EFAULT;
a6792a3e
MH		 3346
3347 ch = un->un_ch;
3348 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3349 return -EFAULT;
a6792a3e
MH		 3350
3351 memset(&tmp, 0, sizeof(tmp));
3352
3353 DGAP_LOCK(ch->ch_lock, lock_flags);
3354 memcpy(&tmp, &ch->ch_digi, sizeof(tmp));
3355 DGAP_UNLOCK(ch->ch_lock, lock_flags);
3356
3357 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
cf42c34d 3358 return -EFAULT;
a6792a3e 3359
cf42c34d 3360 return 0;
a6792a3e
MH		 3361}
3362
a6792a3e
MH		 3363/*
3364 * dgap_tty_digiseta()
3365 *
3366 * Ioctl to set the information for ditty.
3367 *
3368 *
3369 *
3370 */
8a2c9c44
MH		 3371static int dgap_tty_digiseta(struct tty_struct *tty,
3372 struct digi_t __user *new_info)
a6792a3e
MH		 3373{
3374 struct board_t *bd;
3375 struct channel_t *ch;
3376 struct un_t *un;
3377 struct digi_t new_digi;
3378 ulong lock_flags = 0;
3379 unsigned long lock_flags2;
3380
a6792a3e 3381 if (!tty || tty->magic != TTY_MAGIC)
cf42c34d 3382 return -EFAULT;
a6792a3e
MH		 3383
3384 un = tty->driver_data;
3385 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 3386 return -EFAULT;
a6792a3e
MH		 3387
3388 ch = un->un_ch;
3389 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3390 return -EFAULT;
a6792a3e
MH		 3391
3392 bd = ch->ch_bd;
3393 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 3394 return -EFAULT;
a6792a3e 3395
31960c16
MH		 3396 if (copy_from_user(&new_digi, new_info, sizeof(struct digi_t)))
3397 return -EFAULT;
a6792a3e
MH		 3398
3399 DGAP_LOCK(bd->bd_lock, lock_flags);
3400 DGAP_LOCK(ch->ch_lock, lock_flags2);
3401
3402 memcpy(&ch->ch_digi, &new_digi, sizeof(struct digi_t));
3403
3404 if (ch->ch_digi.digi_maxcps < 1)
3405 ch->ch_digi.digi_maxcps = 1;
3406
3407 if (ch->ch_digi.digi_maxcps > 10000)
3408 ch->ch_digi.digi_maxcps = 10000;
3409
3410 if (ch->ch_digi.digi_bufsize < 10)
3411 ch->ch_digi.digi_bufsize = 10;
3412
3413 if (ch->ch_digi.digi_maxchar < 1)
3414 ch->ch_digi.digi_maxchar = 1;
3415
3416 if (ch->ch_digi.digi_maxchar > ch->ch_digi.digi_bufsize)
3417 ch->ch_digi.digi_maxchar = ch->ch_digi.digi_bufsize;
3418
3419 if (ch->ch_digi.digi_onlen > DIGI_PLEN)
3420 ch->ch_digi.digi_onlen = DIGI_PLEN;
3421
3422 if (ch->ch_digi.digi_offlen > DIGI_PLEN)
3423 ch->ch_digi.digi_offlen = DIGI_PLEN;
3424
3425 dgap_param(tty);
3426
3427 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3428 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3429
cf42c34d 3430 return 0;
a6792a3e
MH		 3431}
3432
a6792a3e
MH		 3433/*
3434 * dgap_tty_digigetedelay()
3435 *
3436 * Ioctl to get the current edelay setting.
3437 *
3438 *
3439 *
3440 */
3441static int dgap_tty_digigetedelay(struct tty_struct *tty, int __user *retinfo)
3442{
3443 struct channel_t *ch;
3444 struct un_t *un;
3445 int tmp;
3446 ulong lock_flags;
3447
3448 if (!retinfo)
cf42c34d 3449 return -EFAULT;
a6792a3e
MH		 3450
3451 if (!tty || tty->magic != TTY_MAGIC)
cf42c34d 3452 return -EFAULT;
a6792a3e
MH		 3453
3454 un = tty->driver_data;
3455 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 3456 return -EFAULT;
a6792a3e
MH		 3457
3458 ch = un->un_ch;
3459 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3460 return -EFAULT;
a6792a3e
MH		 3461
3462 memset(&tmp, 0, sizeof(tmp));
3463
3464 DGAP_LOCK(ch->ch_lock, lock_flags);
3465 tmp = readw(&(ch->ch_bs->edelay));
3466 DGAP_UNLOCK(ch->ch_lock, lock_flags);
3467
3468 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
cf42c34d 3469 return -EFAULT;
a6792a3e 3470
cf42c34d 3471 return 0;
a6792a3e
MH		 3472}
3473
a6792a3e
MH		 3474/*
3475 * dgap_tty_digisetedelay()
3476 *
3477 * Ioctl to set the EDELAY setting
3478 *
3479 */
3480static int dgap_tty_digisetedelay(struct tty_struct *tty, int __user *new_info)
3481{
3482 struct board_t *bd;
3483 struct channel_t *ch;
3484 struct un_t *un;
3485 int new_digi;
3486 ulong lock_flags;
3487 ulong lock_flags2;
3488
a6792a3e 3489 if (!tty || tty->magic != TTY_MAGIC)
cf42c34d 3490 return -EFAULT;
a6792a3e
MH		 3491
3492 un = tty->driver_data;
3493 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 3494 return -EFAULT;
a6792a3e
MH		 3495
3496 ch = un->un_ch;
3497 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3498 return -EFAULT;
a6792a3e
MH		 3499
3500 bd = ch->ch_bd;
3501 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 3502 return -EFAULT;
a6792a3e 3503
31960c16
MH		 3504 if (copy_from_user(&new_digi, new_info, sizeof(int)))
3505 return -EFAULT;
a6792a3e
MH		 3506
3507 DGAP_LOCK(bd->bd_lock, lock_flags);
3508 DGAP_LOCK(ch->ch_lock, lock_flags2);
3509
3510 writew((u16) new_digi, &(ch->ch_bs->edelay));
3511
3512 dgap_param(tty);
3513
3514 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3515 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3516
cf42c34d 3517 return 0;
a6792a3e
MH		 3518}
3519
a6792a3e
MH		 3520/*
3521 * dgap_tty_digigetcustombaud()
3522 *
3523 * Ioctl to get the current custom baud rate setting.
3524 */
8a2c9c44
MH		 3525static int dgap_tty_digigetcustombaud(struct tty_struct *tty,
3526 int __user *retinfo)
a6792a3e
MH		 3527{
3528 struct channel_t *ch;
3529 struct un_t *un;
3530 int tmp;
3531 ulong lock_flags;
3532
3533 if (!retinfo)
cf42c34d 3534 return -EFAULT;
a6792a3e
MH		 3535
3536 if (!tty || tty->magic != TTY_MAGIC)
cf42c34d 3537 return -EFAULT;
a6792a3e
MH		 3538
3539 un = tty->driver_data;
3540 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 3541 return -EFAULT;
a6792a3e
MH		 3542
3543 ch = un->un_ch;
3544 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3545 return -EFAULT;
a6792a3e
MH		 3546
3547 memset(&tmp, 0, sizeof(tmp));
3548
3549 DGAP_LOCK(ch->ch_lock, lock_flags);
3550 tmp = dgap_get_custom_baud(ch);
3551 DGAP_UNLOCK(ch->ch_lock, lock_flags);
3552
a6792a3e 3553 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
cf42c34d 3554 return -EFAULT;
a6792a3e 3555
cf42c34d 3556 return 0;
a6792a3e
MH		 3557}
3558
a6792a3e
MH		 3559/*
3560 * dgap_tty_digisetcustombaud()
3561 *
3562 * Ioctl to set the custom baud rate setting
3563 */
8a2c9c44
MH		 3564static int dgap_tty_digisetcustombaud(struct tty_struct *tty,
3565 int __user *new_info)
a6792a3e
MH		 3566{
3567 struct board_t *bd;
3568 struct channel_t *ch;
3569 struct un_t *un;
3570 uint new_rate;
3571 ulong lock_flags;
3572 ulong lock_flags2;
3573
a6792a3e 3574 if (!tty || tty->magic != TTY_MAGIC)
cf42c34d 3575 return -EFAULT;
a6792a3e
MH		 3576
3577 un = tty->driver_data;
3578 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 3579 return -EFAULT;
a6792a3e
MH		 3580
3581 ch = un->un_ch;
3582 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3583 return -EFAULT;
a6792a3e
MH		 3584
3585 bd = ch->ch_bd;
3586 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 3587 return -EFAULT;
a6792a3e
MH		 3588
3589
31960c16 3590 if (copy_from_user(&new_rate, new_info, sizeof(unsigned int)))
cf42c34d 3591 return -EFAULT;
a6792a3e
MH		 3592
3593 if (bd->bd_flags & BD_FEP5PLUS) {
3594
a6792a3e
MH		 3595 DGAP_LOCK(bd->bd_lock, lock_flags);
3596 DGAP_LOCK(ch->ch_lock, lock_flags2);
3597
3598 ch->ch_custom_speed = new_rate;
3599
3600 dgap_param(tty);
3601
3602 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3603 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3604 }
3605
cf42c34d 3606 return 0;
a6792a3e
MH		 3607}
3608
a6792a3e
MH		 3609/*
3610 * dgap_set_termios()
3611 */
8a2c9c44
MH		 3612static void dgap_tty_set_termios(struct tty_struct *tty,
3613 struct ktermios *old_termios)
a6792a3e
MH		 3614{
3615 struct board_t *bd;
3616 struct channel_t *ch;
3617 struct un_t *un;
3618 unsigned long lock_flags;
3619 unsigned long lock_flags2;
3620
3621 if (!tty || tty->magic != TTY_MAGIC)
3622 return;
3623
3624 un = tty->driver_data;
3625 if (!un || un->magic != DGAP_UNIT_MAGIC)
3626 return;
3627
3628 ch = un->un_ch;
3629 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3630 return;
3631
3632 bd = ch->ch_bd;
3633 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3634 return;
3635
3636 DGAP_LOCK(bd->bd_lock, lock_flags);
3637 DGAP_LOCK(ch->ch_lock, lock_flags2);
3638
3639 ch->ch_c_cflag = tty->termios.c_cflag;
3640 ch->ch_c_iflag = tty->termios.c_iflag;
3641 ch->ch_c_oflag = tty->termios.c_oflag;
3642 ch->ch_c_lflag = tty->termios.c_lflag;
3643 ch->ch_startc = tty->termios.c_cc[VSTART];
3644 ch->ch_stopc = tty->termios.c_cc[VSTOP];
3645
3646 dgap_carrier(ch);
3647 dgap_param(tty);
3648
3649 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3650 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3651}
3652
a6792a3e
MH		 3653static void dgap_tty_throttle(struct tty_struct *tty)
3654{
3655 struct board_t *bd;
3656 struct channel_t *ch;
3657 struct un_t *un;
3658 ulong lock_flags;
3659 ulong lock_flags2;
3660
3661 if (!tty || tty->magic != TTY_MAGIC)
3662 return;
3663
3664 un = tty->driver_data;
3665 if (!un || un->magic != DGAP_UNIT_MAGIC)
3666 return;
3667
7d6069d7
MH		 3668 ch = un->un_ch;
3669 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3670 return;
a6792a3e
MH		 3671
3672 bd = ch->ch_bd;
3673 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3674 return;
3675
a6792a3e
MH		 3676 DGAP_LOCK(bd->bd_lock, lock_flags);
3677 DGAP_LOCK(ch->ch_lock, lock_flags2);
3678
3679 ch->ch_flags |= (CH_RXBLOCK);
3680#if 1
3681 dgap_cmdw(ch, RPAUSE, 0, 0);
3682#endif
3683
3684 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3685 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3686
a6792a3e
MH		 3687}
3688
a6792a3e
MH		 3689static void dgap_tty_unthrottle(struct tty_struct *tty)
3690{
3691 struct board_t *bd;
3692 struct channel_t *ch;
3693 struct un_t *un;
3694 ulong lock_flags;
3695 ulong lock_flags2;
3696
3697 if (!tty || tty->magic != TTY_MAGIC)
3698 return;
3699
3700 un = tty->driver_data;
3701 if (!un || un->magic != DGAP_UNIT_MAGIC)
3702 return;
3703
7d6069d7
MH		 3704 ch = un->un_ch;
3705 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3706 return;
a6792a3e
MH		 3707
3708 bd = ch->ch_bd;
3709 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3710 return;
3711
a6792a3e
MH		 3712 DGAP_LOCK(bd->bd_lock, lock_flags);
3713 DGAP_LOCK(ch->ch_lock, lock_flags2);
3714
3715 ch->ch_flags &= ~(CH_RXBLOCK);
3716
3717#if 1
3718 dgap_cmdw(ch, RRESUME, 0, 0);
3719#endif
3720
3721 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3722 DGAP_UNLOCK(bd->bd_lock, lock_flags);
a6792a3e
MH		 3723}
3724
a6792a3e
MH		 3725static void dgap_tty_start(struct tty_struct *tty)
3726{
3727 struct board_t *bd;
3728 struct channel_t *ch;
3729 struct un_t *un;
3730 ulong lock_flags;
3731 ulong lock_flags2;
3732
3733 if (!tty || tty->magic != TTY_MAGIC)
3734 return;
3735
3736 un = tty->driver_data;
3737 if (!un || un->magic != DGAP_UNIT_MAGIC)
3738 return;
3739
7d6069d7
MH		 3740 ch = un->un_ch;
3741 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3742 return;
a6792a3e
MH		 3743
3744 bd = ch->ch_bd;
3745 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3746 return;
3747
a6792a3e
MH		 3748 DGAP_LOCK(bd->bd_lock, lock_flags);
3749 DGAP_LOCK(ch->ch_lock, lock_flags2);
3750
3751 dgap_cmdw(ch, RESUMETX, 0, 0);
3752
3753 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3754 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3755
a6792a3e
MH		 3756}
3757
a6792a3e
MH		 3758static void dgap_tty_stop(struct tty_struct *tty)
3759{
3760 struct board_t *bd;
3761 struct channel_t *ch;
3762 struct un_t *un;
3763 ulong lock_flags;
3764 ulong lock_flags2;
3765
3766 if (!tty || tty->magic != TTY_MAGIC)
3767 return;
3768
3769 un = tty->driver_data;
3770 if (!un || un->magic != DGAP_UNIT_MAGIC)
3771 return;
3772
7d6069d7
MH		 3773 ch = un->un_ch;
3774 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3775 return;
a6792a3e
MH		 3776
3777 bd = ch->ch_bd;
3778 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3779 return;
3780
a6792a3e
MH		 3781 DGAP_LOCK(bd->bd_lock, lock_flags);
3782 DGAP_LOCK(ch->ch_lock, lock_flags2);
3783
3784 dgap_cmdw(ch, PAUSETX, 0, 0);
3785
3786 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3787 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3788
a6792a3e
MH		 3789}
3790
a6792a3e
MH		 3791/*
3792 * dgap_tty_flush_chars()
3793 *
3794 * Flush the cook buffer
3795 *
3796 * Note to self, and any other poor souls who venture here:
3797 *
3798 * flush in this case DOES NOT mean dispose of the data.
3799 * instead, it means "stop buffering and send it if you
3800 * haven't already." Just guess how I figured that out... SRW 2-Jun-98
3801 *
3802 * It is also always called in interrupt context - JAR 8-Sept-99
3803 */
3804static void dgap_tty_flush_chars(struct tty_struct *tty)
3805{
3806 struct board_t *bd;
3807 struct channel_t *ch;
3808 struct un_t *un;
3809 ulong lock_flags;
3810 ulong lock_flags2;
3811
3812 if (!tty || tty->magic != TTY_MAGIC)
3813 return;
3814
3815 un = tty->driver_data;
3816 if (!un || un->magic != DGAP_UNIT_MAGIC)
3817 return;
3818
7d6069d7
MH		 3819 ch = un->un_ch;
3820 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3821 return;
a6792a3e
MH		 3822
3823 bd = ch->ch_bd;
3824 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3825 return;
3826
a6792a3e
MH		 3827 DGAP_LOCK(bd->bd_lock, lock_flags);
3828 DGAP_LOCK(ch->ch_lock, lock_flags2);
3829
3830 /* TODO: Do something here */
3831
3832 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3833 DGAP_UNLOCK(bd->bd_lock, lock_flags);
a6792a3e
MH		 3834}
3835
a6792a3e
MH		 3836/*
3837 * dgap_tty_flush_buffer()
3838 *
3839 * Flush Tx buffer (make in == out)
3840 */
3841static void dgap_tty_flush_buffer(struct tty_struct *tty)
3842{
3843 struct board_t *bd;
3844 struct channel_t *ch;
3845 struct un_t *un;
3846 ulong lock_flags;
3847 ulong lock_flags2;
3848 u16 head = 0;
3849
3850 if (!tty || tty->magic != TTY_MAGIC)
3851 return;
3852
3853 un = tty->driver_data;
3854 if (!un || un->magic != DGAP_UNIT_MAGIC)
3855 return;
3856
7d6069d7
MH		 3857 ch = un->un_ch;
3858 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3859 return;
a6792a3e
MH		 3860
3861 bd = ch->ch_bd;
3862 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3863 return;
3864
a6792a3e
MH		 3865 DGAP_LOCK(bd->bd_lock, lock_flags);
3866 DGAP_LOCK(ch->ch_lock, lock_flags2);
3867
3868 ch->ch_flags &= ~CH_STOP;
3869 head = readw(&(ch->ch_bs->tx_head));
3870 dgap_cmdw(ch, FLUSHTX, (u16) head, 0);
3871 dgap_cmdw(ch, RESUMETX, 0, 0);
3872 if (ch->ch_tun.un_flags & (UN_LOW|UN_EMPTY)) {
3873 ch->ch_tun.un_flags &= ~(UN_LOW|UN_EMPTY);
3874 wake_up_interruptible(&ch->ch_tun.un_flags_wait);
3875 }
3876 if (ch->ch_pun.un_flags & (UN_LOW|UN_EMPTY)) {
3877 ch->ch_pun.un_flags &= ~(UN_LOW|UN_EMPTY);
3878 wake_up_interruptible(&ch->ch_pun.un_flags_wait);
3879 }
3880
3881 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3882 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3883 if (waitqueue_active(&tty->write_wait))
3884 wake_up_interruptible(&tty->write_wait);
3885 tty_wakeup(tty);
a6792a3e
MH		 3886}
3887
a6792a3e
MH		 3888/*****************************************************************************
3889 *
3890 * The IOCTL function and all of its helpers
3891 *
3892 *****************************************************************************/
3893
3894/*
3895 * dgap_tty_ioctl()
3896 *
3897 * The usual assortment of ioctl's
3898 */
3899static int dgap_tty_ioctl(struct tty_struct *tty, unsigned int cmd,
3900 unsigned long arg)
3901{
3902 struct board_t *bd;
3903 struct channel_t *ch;
3904 struct un_t *un;
3905 int rc;
3906 u16 head = 0;
3907 ulong lock_flags = 0;
3908 ulong lock_flags2 = 0;
3909 void __user *uarg = (void __user *) arg;
3910
3911 if (!tty || tty->magic != TTY_MAGIC)
cf42c34d 3912 return -ENODEV;
a6792a3e
MH		 3913
3914 un = tty->driver_data;
3915 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 3916 return -ENODEV;
a6792a3e
MH		 3917
3918 ch = un->un_ch;
3919 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3920 return -ENODEV;
a6792a3e
MH		 3921
3922 bd = ch->ch_bd;
3923 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 3924 return -ENODEV;
a6792a3e 3925
a6792a3e
MH		 3926 DGAP_LOCK(bd->bd_lock, lock_flags);
3927 DGAP_LOCK(ch->ch_lock, lock_flags2);
3928
3929 if (un->un_open_count <= 0) {
a6792a3e
MH		 3930 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3931 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 3932 return -EIO;
a6792a3e
MH		 3933 }
3934
3935 switch (cmd) {
3936
3937 /* Here are all the standard ioctl's that we MUST implement */
3938
3939 case TCSBRK:
3940 /*
3941 * TCSBRK is SVID version: non-zero arg --> no break
3942 * this behaviour is exploited by tcdrain().
3943 *
3944 * According to POSIX.1 spec (7.2.2.1.2) breaks should be
3945 * between 0.25 and 0.5 seconds so we'll ask for something
3946 * in the middle: 0.375 seconds.
3947 */
3948 rc = tty_check_change(tty);
3949 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3950 DGAP_UNLOCK(bd->bd_lock, lock_flags);
305ec874 3951 if (rc)
cf42c34d 3952 return rc;
a6792a3e
MH		 3953
3954 rc = dgap_wait_for_drain(tty);
3955
31960c16 3956 if (rc)
cf42c34d 3957 return -EINTR;
a6792a3e
MH		 3958
3959 DGAP_LOCK(bd->bd_lock, lock_flags);
3960 DGAP_LOCK(ch->ch_lock, lock_flags2);
3961
305ec874 3962 if (((cmd == TCSBRK) && (!arg)) || (cmd == TCSBRKP))
a6792a3e 3963 dgap_cmdw(ch, SBREAK, (u16) SBREAK_TIME, 0);
a6792a3e
MH		 3964
3965 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3966 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3967
cf42c34d 3968 return 0;
a6792a3e 3969
a6792a3e 3970 case TCSBRKP:
7d6069d7 3971 /* support for POSIX tcsendbreak()
a6792a3e
MH		 3972
3973 * According to POSIX.1 spec (7.2.2.1.2) breaks should be
3974 * between 0.25 and 0.5 seconds so we'll ask for something
3975 * in the middle: 0.375 seconds.
3976 */
3977 rc = tty_check_change(tty);
3978 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3979 DGAP_UNLOCK(bd->bd_lock, lock_flags);
305ec874 3980 if (rc)
cf42c34d 3981 return rc;
a6792a3e
MH		 3982
3983 rc = dgap_wait_for_drain(tty);
31960c16 3984 if (rc)
cf42c34d 3985 return -EINTR;
a6792a3e
MH		 3986
3987 DGAP_LOCK(bd->bd_lock, lock_flags);
3988 DGAP_LOCK(ch->ch_lock, lock_flags2);
3989
3990 dgap_cmdw(ch, SBREAK, (u16) SBREAK_TIME, 0);
3991
3992 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
3993 DGAP_UNLOCK(bd->bd_lock, lock_flags);
3994
cf42c34d 3995 return 0;
a6792a3e 3996
7d6069d7 3997 case TIOCSBRK:
a6792a3e
MH		 3998 /*
3999 * FEP5 doesn't support turning on a break unconditionally.
4000 * The FEP5 device will stop sending a break automatically
4001 * after the specified time value that was sent when turning on
4002 * the break.
4003 */
4004 rc = tty_check_change(tty);
4005 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4006 DGAP_UNLOCK(bd->bd_lock, lock_flags);
305ec874 4007 if (rc)
cf42c34d 4008 return rc;
a6792a3e
MH		 4009
4010 rc = dgap_wait_for_drain(tty);
31960c16 4011 if (rc)
cf42c34d 4012 return -EINTR;
a6792a3e
MH		 4013
4014 DGAP_LOCK(bd->bd_lock, lock_flags);
4015 DGAP_LOCK(ch->ch_lock, lock_flags2);
4016
4017 dgap_cmdw(ch, SBREAK, (u16) SBREAK_TIME, 0);
4018
4019 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4020 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4021
a6792a3e
MH		 4022 return 0;
4023
7d6069d7 4024 case TIOCCBRK:
a6792a3e
MH		 4025 /*
4026 * FEP5 doesn't support turning off a break unconditionally.
4027 * The FEP5 device will stop sending a break automatically
4028 * after the specified time value that was sent when turning on
4029 * the break.
4030 */
4031 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4032 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4033 return 0;
4034
4035 case TIOCGSOFTCAR:
4036
4037 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4038 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4039
8a2c9c44
MH		 4040 rc = put_user(C_CLOCAL(tty) ? 1 : 0,
4041 (unsigned long __user *) arg);
cf42c34d 4042 return rc;
a6792a3e
MH		 4043
4044 case TIOCSSOFTCAR:
4045 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4046 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4047
4048 rc = get_user(arg, (unsigned long __user *) arg);
4049 if (rc)
cf42c34d 4050 return rc;
a6792a3e
MH		 4051
4052 DGAP_LOCK(bd->bd_lock, lock_flags);
4053 DGAP_LOCK(ch->ch_lock, lock_flags2);
8a2c9c44
MH		 4054 tty->termios.c_cflag = ((tty->termios.c_cflag & ~CLOCAL) |
4055 (arg ? CLOCAL : 0));
a6792a3e
MH		 4056 dgap_param(tty);
4057 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4058 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4059
cf42c34d 4060 return 0;
a6792a3e
MH		 4061
4062 case TIOCMGET:
4063 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4064 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4065 return dgap_get_modem_info(ch, uarg);
a6792a3e
MH		 4066
4067 case TIOCMBIS:
4068 case TIOCMBIC:
4069 case TIOCMSET:
4070 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4071 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4072 return dgap_set_modem_info(tty, cmd, uarg);
a6792a3e
MH		 4073
4074 /*
4075 * Here are any additional ioctl's that we want to implement
4076 */
4077
4078 case TCFLSH:
4079 /*
4080 * The linux tty driver doesn't have a flush
4081 * input routine for the driver, assuming all backed
4082 * up data is in the line disc. buffers. However,
4083 * we all know that's not the case. Here, we
4084 * act on the ioctl, but then lie and say we didn't
4085 * so the line discipline will process the flush
4086 * also.
4087 */
4088 rc = tty_check_change(tty);
4089 if (rc) {
4090 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4091 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4092 return rc;
a6792a3e
MH		 4093 }
4094
4095 if ((arg == TCIFLUSH) || (arg == TCIOFLUSH)) {
4096 if (!(un->un_type == DGAP_PRINT)) {
4097 head = readw(&(ch->ch_bs->rx_head));
4098 writew(head, &(ch->ch_bs->rx_tail));
4099 writeb(0, &(ch->ch_bs->orun));
4100 }
4101 }
4102
4103 if ((arg == TCOFLUSH) || (arg == TCIOFLUSH)) {
4104 ch->ch_flags &= ~CH_STOP;
4105 head = readw(&(ch->ch_bs->tx_head));
b115b024 4106 dgap_cmdw(ch, FLUSHTX, (u16) head, 0);
a6792a3e
MH		 4107 dgap_cmdw(ch, RESUMETX, 0, 0);
4108 if (ch->ch_tun.un_flags & (UN_LOW|UN_EMPTY)) {
4109 ch->ch_tun.un_flags &= ~(UN_LOW|UN_EMPTY);
4110 wake_up_interruptible(&ch->ch_tun.un_flags_wait);
4111 }
4112 if (ch->ch_pun.un_flags & (UN_LOW|UN_EMPTY)) {
4113 ch->ch_pun.un_flags &= ~(UN_LOW|UN_EMPTY);
4114 wake_up_interruptible(&ch->ch_pun.un_flags_wait);
4115 }
4116 if (waitqueue_active(&tty->write_wait))
4117 wake_up_interruptible(&tty->write_wait);
4118
4119 /* Can't hold any locks when calling tty_wakeup! */
4120 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4121 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4122 tty_wakeup(tty);
4123 DGAP_LOCK(bd->bd_lock, lock_flags);
4124 DGAP_LOCK(ch->ch_lock, lock_flags2);
4125 }
4126
4127 /* pretend we didn't recognize this IOCTL */
4128 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4129 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4130
cf42c34d 4131 return -ENOIOCTLCMD;
a6792a3e
MH		 4132
4133 case TCSETSF:
4134 case TCSETSW:
4135 /*
4136 * The linux tty driver doesn't have a flush
4137 * input routine for the driver, assuming all backed
4138 * up data is in the line disc. buffers. However,
4139 * we all know that's not the case. Here, we
4140 * act on the ioctl, but then lie and say we didn't
4141 * so the line discipline will process the flush
4142 * also.
4143 */
4144 if (cmd == TCSETSF) {
4145 /* flush rx */
4146 ch->ch_flags &= ~CH_STOP;
4147 head = readw(&(ch->ch_bs->rx_head));
4148 writew(head, &(ch->ch_bs->rx_tail));
4149 }
4150
4151 /* now wait for all the output to drain */
4152 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4153 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4154 rc = dgap_wait_for_drain(tty);
31960c16 4155 if (rc)
cf42c34d 4156 return -EINTR;
a6792a3e
MH		 4157
4158 /* pretend we didn't recognize this */
cf42c34d 4159 return -ENOIOCTLCMD;
a6792a3e
MH		 4160
4161 case TCSETAW:
4162
4163 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4164 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4165 rc = dgap_wait_for_drain(tty);
31960c16 4166 if (rc)
cf42c34d 4167 return -EINTR;
a6792a3e
MH		 4168
4169 /* pretend we didn't recognize this */
cf42c34d 4170 return -ENOIOCTLCMD;
a6792a3e
MH		 4171
4172 case TCXONC:
4173 /*
4174 * The Linux Line Discipline (LD) would do this for us if we
4175 * let it, but we have the special firmware options to do this
4176 * the "right way" regardless of hardware or software flow
4177 * control so we'll do it outselves instead of letting the LD
4178 * do it.
4179 */
4180 rc = tty_check_change(tty);
4181 if (rc) {
4182 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4183 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4184 return rc;
a6792a3e
MH		 4185 }
4186
a6792a3e
MH		 4187 switch (arg) {
4188
4189 case TCOON:
4190 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4191 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4192 dgap_tty_start(tty);
cf42c34d 4193 return 0;
a6792a3e
MH		 4194 case TCOOFF:
4195 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4196 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4197 dgap_tty_stop(tty);
cf42c34d 4198 return 0;
a6792a3e
MH		 4199 case TCION:
4200 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4201 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4202 /* Make the ld do it */
cf42c34d 4203 return -ENOIOCTLCMD;
a6792a3e
MH		 4204 case TCIOFF:
4205 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4206 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4207 /* Make the ld do it */
cf42c34d 4208 return -ENOIOCTLCMD;
a6792a3e
MH		 4209 default:
4210 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4211 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4212 return -EINVAL;
a6792a3e
MH		 4213 }
4214
4215 case DIGI_GETA:
4216 /* get information for ditty */
4217 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4218 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4219 return dgap_tty_digigeta(tty, uarg);
a6792a3e
MH		 4220
4221 case DIGI_SETAW:
4222 case DIGI_SETAF:
4223
4224 /* set information for ditty */
4225 if (cmd == (DIGI_SETAW)) {
4226
4227 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4228 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4229 rc = dgap_wait_for_drain(tty);
31960c16 4230 if (rc)
cf42c34d 4231 return -EINTR;
a6792a3e
MH		 4232 DGAP_LOCK(bd->bd_lock, lock_flags);
4233 DGAP_LOCK(ch->ch_lock, lock_flags2);
305ec874 4234 } else
a6792a3e 4235 tty_ldisc_flush(tty);
a6792a3e
MH		 4236 /* fall thru */
4237
4238 case DIGI_SETA:
4239 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4240 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4241 return dgap_tty_digiseta(tty, uarg);
a6792a3e
MH		 4242
4243 case DIGI_GEDELAY:
4244 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4245 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4246 return dgap_tty_digigetedelay(tty, uarg);
a6792a3e
MH		 4247
4248 case DIGI_SEDELAY:
4249 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4250 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4251 return dgap_tty_digisetedelay(tty, uarg);
a6792a3e
MH		 4252
4253 case DIGI_GETCUSTOMBAUD:
4254 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4255 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4256 return dgap_tty_digigetcustombaud(tty, uarg);
a6792a3e
MH		 4257
4258 case DIGI_SETCUSTOMBAUD:
4259 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4260 DGAP_UNLOCK(bd->bd_lock, lock_flags);
cf42c34d 4261 return dgap_tty_digisetcustombaud(tty, uarg);
a6792a3e
MH		 4262
4263 case DIGI_RESET_PORT:
4264 dgap_firmware_reset_port(ch);
4265 dgap_param(tty);
4266 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4267 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4268 return 0;
4269
4270 default:
4271 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
4272 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4273
cf42c34d 4274 return -ENOIOCTLCMD;
a6792a3e
MH		 4275 }
4276}
b053bb86 4277
b28ec88a 4278static int dgap_after_config_loaded(int board)
b053bb86 4279{
b053bb86 4280 /*
b28ec88a 4281 * Initialize KME waitqueues...
b053bb86 4282 */
b28ec88a 4283 init_waitqueue_head(&(dgap_Board[board]->kme_wait));
b053bb86 4284
b28ec88a
MH		 4285 /*
4286 * allocate flip buffer for board.
4287 */
4288 dgap_Board[board]->flipbuf = kmalloc(MYFLIPLEN, GFP_ATOMIC);
4289 if (!dgap_Board[board]->flipbuf)
4290 return -ENOMEM;
b053bb86 4291
b28ec88a
MH		 4292 dgap_Board[board]->flipflagbuf = kmalloc(MYFLIPLEN, GFP_ATOMIC);
4293 if (!dgap_Board[board]->flipflagbuf) {
4294 kfree(dgap_Board[board]->flipbuf);
4295 return -ENOMEM;
b053bb86
MH		 4296 }
4297
b28ec88a 4298 return 0;
b053bb86
MH		 4299}
4300
b28ec88a
MH		 4301/*
4302 * Create pr and tty device entries
4303 */
6c8b84ef 4304static int dgap_tty_register_ports(struct board_t *brd)
b053bb86 4305{
b28ec88a 4306 struct channel_t *ch;
6c8b84ef
MH		 4307 int i;
4308
4309 brd->SerialPorts = kcalloc(brd->nasync, sizeof(*brd->SerialPorts),
4310 GFP_KERNEL);
4311 if (brd->SerialPorts == NULL)
4312 return -ENOMEM;
4313 for (i = 0; i < brd->nasync; i++)
4314 tty_port_init(&brd->SerialPorts[i]);
4315
4316 brd->PrinterPorts = kcalloc(brd->nasync, sizeof(*brd->PrinterPorts),
4317 GFP_KERNEL);
4318 if (brd->PrinterPorts == NULL) {
4319 kfree(brd->SerialPorts);
4320 return -ENOMEM;
4321 }
4322 for (i = 0; i < brd->nasync; i++)
4323 tty_port_init(&brd->PrinterPorts[i]);
b053bb86 4324
b28ec88a 4325 ch = brd->channels[0];
6c8b84ef
MH		 4326 for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
4327
b28ec88a 4328 struct device *classp;
6c8b84ef
MH		 4329
4330 classp = tty_port_register_device(&brd->SerialPorts[i],
4331 brd->SerialDriver,
4332 brd->firstminor + i, NULL);
4333
b28ec88a 4334 dgap_create_tty_sysfs(&ch->ch_tun, classp);
6c8b84ef
MH		 4335 ch->ch_tun.un_sysfs = classp;
4336
4337 classp = tty_port_register_device(&brd->PrinterPorts[i],
4338 brd->PrintDriver,
4339 brd->firstminor + i, NULL);
b28ec88a 4340
b28ec88a 4341 dgap_create_tty_sysfs(&ch->ch_pun, classp);
6c8b84ef 4342 ch->ch_pun.un_sysfs = classp;
b28ec88a
MH		 4343 }
4344 dgap_create_ports_sysfiles(brd);
6c8b84ef
MH		 4345
4346 return 0;
b053bb86
MH		 4347}
4348
b053bb86
MH		 4349/*
4350 * Copies the BIOS code from the user to the board,
4351 * and starts the BIOS running.
4352 */
fe0ef8e6 4353static void dgap_do_bios_load(struct board_t *brd, uchar __user *ubios, int len)
b053bb86
MH		 4354{
4355 uchar *addr;
4356 uint offset;
4357 int i;
4358
4359 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
4360 return;
4361
b053bb86
MH		 4362 addr = brd->re_map_membase;
4363
4364 /*
4365 * clear POST area
4366 */
4367 for (i = 0; i < 16; i++)
4368 writeb(0, addr + POSTAREA + i);
4369
4370 /*
4371 * Download bios
4372 */
4373 offset = 0x1000;
b28ec88a 4374 memcpy_toio(addr + offset, ubios, len);
b053bb86
MH		 4375
4376 writel(0x0bf00401, addr);
4377 writel(0, (addr + 4));
4378
4379 /* Clear the reset, and change states. */
4380 writeb(FEPCLR, brd->re_map_port);
b053bb86
MH		 4381}
4382
b053bb86
MH		 4383/*
4384 * Checks to see if the BIOS completed running on the card.
4385 */
4386static void dgap_do_wait_for_bios(struct board_t *brd)
4387{
4388 uchar *addr;
4389 u16 word;
b28ec88a
MH		 4390 u16 err1;
4391 u16 err2;
b053bb86
MH		 4392
4393 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
4394 return;
4395
4396 addr = brd->re_map_membase;
4397 word = readw(addr + POSTAREA);
4398
b28ec88a
MH		 4399 /*
4400 * It can take 5-6 seconds for a board to
4401 * pass the bios self test and post results.
4402 * Give it 10 seconds.
4403 */
4404 brd->wait_for_bios = 0;
4405 while (brd->wait_for_bios < 1000) {
4406 /* Check to see if BIOS thinks board is good. (GD). */
4407 if (word == *(u16 *) "GD") {
b28ec88a
MH		 4408 brd->state = FINISHED_BIOS_LOAD;
4409 return;
4410 }
4411 msleep_interruptible(10);
4412 brd->wait_for_bios++;
4413 word = readw(addr + POSTAREA);
4414 }
4415
4416 /* Gave up on board after too long of time taken */
4417 err1 = readw(addr + SEQUENCE);
4418 err2 = readw(addr + ERROR);
31960c16
MH		 4419 pr_warn("dgap: %s failed diagnostics. Error #(%x,%x).\n",
4420 brd->name, err1, err2);
b28ec88a
MH		 4421 brd->state = BOARD_FAILED;
4422 brd->dpastatus = BD_NOBIOS;
b053bb86
MH		 4423}
4424
b053bb86
MH		 4425/*
4426 * Copies the FEP code from the user to the board,
4427 * and starts the FEP running.
4428 */
b28ec88a 4429static void dgap_do_fep_load(struct board_t *brd, uchar *ufep, int len)
b053bb86
MH		 4430{
4431 uchar *addr;
4432 uint offset;
4433
4434 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
4435 return;
4436
4437 addr = brd->re_map_membase;
4438
b053bb86
MH		 4439 /*
4440 * Download FEP
4441 */
4442 offset = 0x1000;
b28ec88a 4443 memcpy_toio(addr + offset, ufep, len);
b053bb86
MH		 4444
4445 /*
4446 * If board is a concentrator product, we need to give
4447 * it its config string describing how the concentrators look.
4448 */
4449 if ((brd->type == PCX) || (brd->type == PEPC)) {
4450 uchar string[100];
4451 uchar *config, *xconfig;
4452 int i = 0;
4453
4454 xconfig = dgap_create_config_string(brd, string);
4455
4456 /* Write string to board memory */
4457 config = addr + CONFIG;
4458 for (; i < CONFIGSIZE; i++, config++, xconfig++) {
4459 writeb(*xconfig, config);
4460 if ((*xconfig & 0xff) == 0xff)
4461 break;
4462 }
4463 }
4464
4465 writel(0xbfc01004, (addr + 0xc34));
4466 writel(0x3, (addr + 0xc30));
4467
b053bb86
MH		 4468}
4469
b053bb86
MH		 4470/*
4471 * Waits for the FEP to report thats its ready for us to use.
4472 */
4473static void dgap_do_wait_for_fep(struct board_t *brd)
4474{
4475 uchar *addr;
4476 u16 word;
b28ec88a
MH		 4477 u16 err1;
4478 u16 err2;
b053bb86
MH		 4479
4480 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
4481 return;
4482
4483 addr = brd->re_map_membase;
b053bb86
MH		 4484 word = readw(addr + FEPSTAT);
4485
b28ec88a
MH		 4486 /*
4487 * It can take 2-3 seconds for the FEP to
4488 * be up and running. Give it 5 secs.
4489 */
4490 brd->wait_for_fep = 0;
4491 while (brd->wait_for_fep < 500) {
4492 /* Check to see if FEP is up and running now. */
4493 if (word == *(u16 *) "OS") {
4494 brd->state = FINISHED_FEP_LOAD;
4495 /*
4496 * Check to see if the board can support FEP5+ commands.
4497 */
4498 word = readw(addr + FEP5_PLUS);
4499 if (word == *(u16 *) "5A")
4500 brd->bd_flags |= BD_FEP5PLUS;
b053bb86 4501
b28ec88a 4502 return;
b053bb86 4503 }
b28ec88a
MH		 4504 msleep_interruptible(10);
4505 brd->wait_for_fep++;
4506 word = readw(addr + FEPSTAT);
b053bb86
MH		 4507 }
4508
b28ec88a
MH		 4509 /* Gave up on board after too long of time taken */
4510 err1 = readw(addr + SEQUENCE);
4511 err2 = readw(addr + ERROR);
31960c16
MH		 4512 pr_warn("dgap: FEPOS for %s not functioning. Error #(%x,%x).\n",
4513 brd->name, err1, err2);
b28ec88a
MH		 4514 brd->state = BOARD_FAILED;
4515 brd->dpastatus = BD_NOFEP;
b053bb86
MH		 4516}
4517
b053bb86
MH		 4518/*
4519 * Physically forces the FEP5 card to reset itself.
4520 */
4521static void dgap_do_reset_board(struct board_t *brd)
4522{
4523 uchar check;
4524 u32 check1;
4525 u32 check2;
4526 int i = 0;
4527
305ec874
MH		 4528 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) ||
4529 !brd->re_map_membase || !brd->re_map_port)
b053bb86 4530 return;
b053bb86 4531
b053bb86
MH		 4532 /* FEPRST does not vary among supported boards */
4533 writeb(FEPRST, brd->re_map_port);
4534
4535 for (i = 0; i <= 1000; i++) {
4536 check = readb(brd->re_map_port) & 0xe;
4537 if (check == FEPRST)
4538 break;
4539 udelay(10);
4540
4541 }
4542 if (i > 1000) {
31960c16 4543 pr_warn("dgap: Board not resetting... Failing board.\n");
b053bb86
MH		 4544 brd->state = BOARD_FAILED;
4545 brd->dpastatus = BD_NOFEP;
31960c16 4546 return;
b053bb86
MH		 4547 }
4548
4549 /*
4550 * Make sure there really is memory out there.
4551 */
4552 writel(0xa55a3cc3, (brd->re_map_membase + LOWMEM));
4553 writel(0x5aa5c33c, (brd->re_map_membase + HIGHMEM));
4554 check1 = readl(brd->re_map_membase + LOWMEM);
4555 check2 = readl(brd->re_map_membase + HIGHMEM);
4556
4557 if ((check1 != 0xa55a3cc3) || (check2 != 0x5aa5c33c)) {
31960c16
MH		 4558 pr_warn("dgap: No memory at %p for board.\n",
4559 brd->re_map_membase);
b053bb86
MH		 4560 brd->state = BOARD_FAILED;
4561 brd->dpastatus = BD_NOFEP;
31960c16 4562 return;
b053bb86
MH		 4563 }
4564
4565 if (brd->state != BOARD_FAILED)
4566 brd->state = FINISHED_RESET;
b053bb86
MH		 4567}
4568
b28ec88a 4569#ifdef DIGI_CONCENTRATORS_SUPPORTED
b053bb86
MH		 4570/*
4571 * Sends a concentrator image into the FEP5 board.
4572 */
fe0ef8e6 4573static void dgap_do_conc_load(struct board_t *brd, uchar *uaddr, int len)
b053bb86
MH		 4574{
4575 char *vaddr;
4576 u16 offset = 0;
4577 struct downld_t *to_dp;
4578
4579 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
4580 return;
4581
4582 vaddr = brd->re_map_membase;
4583
4584 offset = readw((u16 *) (vaddr + DOWNREQ));
4585 to_dp = (struct downld_t *) (vaddr + (int) offset);
b28ec88a 4586 memcpy_toio(to_dp, uaddr, len);
b053bb86
MH		 4587
4588 /* Tell card we have data for it */
4589 writew(0, vaddr + (DOWNREQ));
4590
4591 brd->conc_dl_status = NO_PENDING_CONCENTRATOR_REQUESTS;
4592}
b28ec88a 4593#endif
b053bb86
MH		 4594
4595#define EXPANSION_ROM_SIZE (64 * 1024)
4596#define FEP5_ROM_MAGIC (0xFEFFFFFF)
4597
4598static void dgap_get_vpd(struct board_t *brd)
4599{
4600 u32 magic;
4601 u32 base_offset;
4602 u16 rom_offset;
4603 u16 vpd_offset;
4604 u16 image_length;
4605 u16 i;
4606 uchar byte1;
4607 uchar byte2;
4608
4609 /*
4610 * Poke the magic number at the PCI Rom Address location.
4611 * If VPD is supported, the value read from that address
4612 * will be non-zero.
4613 */
4614 magic = FEP5_ROM_MAGIC;
4615 pci_write_config_dword(brd->pdev, PCI_ROM_ADDRESS, magic);
4616 pci_read_config_dword(brd->pdev, PCI_ROM_ADDRESS, &magic);
4617
4618 /* VPD not supported, bail */
4619 if (!magic)
4620 return;
4621
4622 /*
4623 * To get to the OTPROM memory, we have to send the boards base
4624 * address or'ed with 1 into the PCI Rom Address location.
4625 */
4626 magic = brd->membase | 0x01;
4627 pci_write_config_dword(brd->pdev, PCI_ROM_ADDRESS, magic);
4628 pci_read_config_dword(brd->pdev, PCI_ROM_ADDRESS, &magic);
4629
4630 byte1 = readb(brd->re_map_membase);
4631 byte2 = readb(brd->re_map_membase + 1);
4632
4633 /*
4634 * If the board correctly swapped to the OTPROM memory,
4635 * the first 2 bytes (header) should be 0x55, 0xAA
4636 */
4637 if (byte1 == 0x55 && byte2 == 0xAA) {
4638
4639 base_offset = 0;
4640
4641 /*
4642 * We have to run through all the OTPROM memory looking
4643 * for the VPD offset.
4644 */
4645 while (base_offset <= EXPANSION_ROM_SIZE) {
4646
4647 /*
4648 * Lots of magic numbers here.
4649 *
8a2c9c44
MH		 4650 * The VPD offset is located inside the ROM Data
4651 * Structure.
4652 *
b053bb86
MH		 4653 * We also have to remember the length of each
4654 * ROM Data Structure, so we can "hop" to the next
4655 * entry if the VPD isn't in the current
4656 * ROM Data Structure.
4657 */
8a2c9c44
MH		 4658 rom_offset = readw(brd->re_map_membase +
4659 base_offset + 0x18);
4660 image_length = readw(brd->re_map_membase +
4661 rom_offset + 0x10) * 512;
4662 vpd_offset = readw(brd->re_map_membase +
4663 rom_offset + 0x08);
b053bb86
MH		 4664
4665 /* Found the VPD entry */
4666 if (vpd_offset)
4667 break;
4668
4669 /* We didn't find a VPD entry, go to next ROM entry. */
4670 base_offset += image_length;
4671
4672 byte1 = readb(brd->re_map_membase + base_offset);
4673 byte2 = readb(brd->re_map_membase + base_offset + 1);
4674
4675 /*
4676 * If the new ROM offset doesn't have 0x55, 0xAA
4677 * as its header, we have run out of ROM.
4678 */
4679 if (byte1 != 0x55 || byte2 != 0xAA)
4680 break;
4681 }
4682
4683 /*
4684 * If we have a VPD offset, then mark the board
4685 * as having a valid VPD, and copy VPDSIZE (512) bytes of
4686 * that VPD to the buffer we have in our board structure.
4687 */
4688 if (vpd_offset) {
4689 brd->bd_flags |= BD_HAS_VPD;
8a2c9c44
MH		 4690 for (i = 0; i < VPDSIZE; i++) {
4691 brd->vpd[i] = readb(brd->re_map_membase +
4692 vpd_offset + i);
4693 }
b053bb86
MH		 4694 }
4695 }
4696
4697 /*
4698 * We MUST poke the magic number at the PCI Rom Address location again.
4699 * This makes the card report the regular board memory back to us,
4700 * rather than the OTPROM memory.
4701 */
4702 magic = FEP5_ROM_MAGIC;
4703 pci_write_config_dword(brd->pdev, PCI_ROM_ADDRESS, magic);
4704}
4705
b053bb86
MH		 4706/*
4707 * Our board poller function.
4708 */
fe0ef8e6 4709static void dgap_poll_tasklet(unsigned long data)
b053bb86
MH		 4710{
4711 struct board_t *bd = (struct board_t *) data;
4712 ulong lock_flags;
4713 ulong lock_flags2;
4714 char *vaddr;
4715 u16 head, tail;
b053bb86 4716
31960c16 4717 if (!bd || (bd->magic != DGAP_BOARD_MAGIC))
b053bb86 4718 return;
b053bb86
MH		 4719
4720 if (bd->inhibit_poller)
4721 return;
4722
4723 DGAP_LOCK(bd->bd_lock, lock_flags);
4724
4725 vaddr = bd->re_map_membase;
4726
4727 /*
4728 * If board is ready, parse deeper to see if there is anything to do.
4729 */
4730 if (bd->state == BOARD_READY) {
4731
4732 struct ev_t *eaddr = NULL;
4733
4734 if (!bd->re_map_membase) {
4735 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4736 return;
4737 }
4738 if (!bd->re_map_port) {
4739 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4740 return;
4741 }
4742
305ec874 4743 if (!bd->nasync)
b053bb86 4744 goto out;
b053bb86 4745
b053bb86
MH		 4746 eaddr = (struct ev_t *) (vaddr + EVBUF);
4747
4748 /* Get our head and tail */
4749 head = readw(&(eaddr->ev_head));
4750 tail = readw(&(eaddr->ev_tail));
4751
4752 /*
4753 * If there is an event pending. Go service it.
4754 */
4755 if (head != tail) {
4756 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4757 dgap_event(bd);
4758 DGAP_LOCK(bd->bd_lock, lock_flags);
4759 }
4760
4761out:
4762 /*
4763 * If board is doing interrupts, ACK the interrupt.
4764 */
305ec874 4765 if (bd && bd->intr_running)
b053bb86 4766 readb(bd->re_map_port + 2);
b053bb86
MH		 4767
4768 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4769 return;
4770 }
4771
4772 /* Our state machine to get the board up and running */
4773
4774 /* Reset board */
4775 if (bd->state == NEED_RESET) {
4776
4777 /* Get VPD info */
4778 dgap_get_vpd(bd);
4779
4780 dgap_do_reset_board(bd);
4781 }
4782
4783 /* Move to next state */
305ec874 4784 if (bd->state == FINISHED_RESET)
b053bb86 4785 bd->state = NEED_CONFIG;
b053bb86
MH		 4786
4787 if (bd->state == NEED_CONFIG) {
4788 /*
4789 * Match this board to a config the user created for us.
4790 */
8a2c9c44
MH		 4791 bd->bd_config = dgap_find_config(bd->type, bd->pci_bus,
4792 bd->pci_slot);
b053bb86
MH		 4793
4794 /*
4795 * Because the 4 port Xr products share the same PCI ID
4796 * as the 8 port Xr products, if we receive a NULL config
4797 * back, and this is a PAPORT8 board, retry with a
4798 * PAPORT4 attempt as well.
4799 */
305ec874 4800 if (bd->type == PAPORT8 && !bd->bd_config)
8a2c9c44
MH		 4801 bd->bd_config = dgap_find_config(PAPORT4, bd->pci_bus,
4802 bd->pci_slot);
b053bb86
MH		 4803
4804 /*
4805 * Register the ttys (if any) into the kernel.
4806 */
305ec874 4807 if (bd->bd_config)
b053bb86 4808 bd->state = FINISHED_CONFIG;
305ec874 4809 else
b053bb86 4810 bd->state = CONFIG_NOT_FOUND;
b053bb86
MH		 4811 }
4812
4813 /* Move to next state */
305ec874 4814 if (bd->state == FINISHED_CONFIG)
b053bb86 4815 bd->state = NEED_DEVICE_CREATION;
b053bb86
MH		 4816
4817 /* Move to next state */
4818 if (bd->state == NEED_DEVICE_CREATION) {
4819 /*
4820 * Signal downloader, its got some work to do.
4821 */
4822 DGAP_LOCK(dgap_dl_lock, lock_flags2);
4823 if (dgap_dl_action != 1) {
4824 dgap_dl_action = 1;
4825 wake_up_interruptible(&dgap_dl_wait);
4826 }
4827 DGAP_UNLOCK(dgap_dl_lock, lock_flags2);
4828 }
4829
4830 /* Move to next state */
305ec874 4831 if (bd->state == FINISHED_DEVICE_CREATION)
b053bb86 4832 bd->state = NEED_BIOS_LOAD;
b053bb86
MH		 4833
4834 /* Move to next state */
4835 if (bd->state == NEED_BIOS_LOAD) {
4836 /*
4837 * Signal downloader, its got some work to do.
4838 */
4839 DGAP_LOCK(dgap_dl_lock, lock_flags2);
4840 if (dgap_dl_action != 1) {
4841 dgap_dl_action = 1;
4842 wake_up_interruptible(&dgap_dl_wait);
4843 }
4844 DGAP_UNLOCK(dgap_dl_lock, lock_flags2);
4845 }
4846
4847 /* Wait for BIOS to test board... */
305ec874 4848 if (bd->state == WAIT_BIOS_LOAD)
b053bb86 4849 dgap_do_wait_for_bios(bd);
b053bb86
MH		 4850
4851 /* Move to next state */
4852 if (bd->state == FINISHED_BIOS_LOAD) {
4853 bd->state = NEED_FEP_LOAD;
4854
4855 /*
4856 * Signal downloader, its got some work to do.
4857 */
4858 DGAP_LOCK(dgap_dl_lock, lock_flags2);
4859 if (dgap_dl_action != 1) {
4860 dgap_dl_action = 1;
4861 wake_up_interruptible(&dgap_dl_wait);
4862 }
4863 DGAP_UNLOCK(dgap_dl_lock, lock_flags2);
4864 }
4865
4866 /* Wait for FEP to load on board... */
305ec874 4867 if (bd->state == WAIT_FEP_LOAD)
b053bb86 4868 dgap_do_wait_for_fep(bd);
b053bb86
MH		 4869
4870 /* Move to next state */
4871 if (bd->state == FINISHED_FEP_LOAD) {
4872
4873 /*
4874 * Do tty device initialization.
4875 */
4876 int rc = dgap_tty_init(bd);
4877
4878 if (rc < 0) {
4879 dgap_tty_uninit(bd);
b053bb86
MH		 4880 bd->state = BOARD_FAILED;
4881 bd->dpastatus = BD_NOFEP;
305ec874 4882 } else {
b053bb86
MH		 4883 bd->state = NEED_PROC_CREATION;
4884
4885 /*
4886 * Signal downloader, its got some work to do.
4887 */
4888 DGAP_LOCK(dgap_dl_lock, lock_flags2);
4889 if (dgap_dl_action != 1) {
4890 dgap_dl_action = 1;
4891 wake_up_interruptible(&dgap_dl_wait);
4892 }
4893 DGAP_UNLOCK(dgap_dl_lock, lock_flags2);
4894 }
4895 }
4896
4897 /* Move to next state */
4898 if (bd->state == FINISHED_PROC_CREATION) {
4899
4900 bd->state = BOARD_READY;
4901 bd->dpastatus = BD_RUNNING;
4902
4903 /*
4904 * If user requested the board to run in interrupt mode,
4905 * go and set it up on the board.
4906 */
4907 if (bd->intr_used) {
4908 writew(1, (bd->re_map_membase + ENABLE_INTR));
4909 /*
4910 * Tell the board to poll the UARTS as fast as possible.
4911 */
4912 writew(FEPPOLL_MIN, (bd->re_map_membase + FEPPOLL));
4913 bd->intr_running = 1;
4914 }
4915
4916 /* Wake up anyone waiting for board state to change to ready */
4917 wake_up_interruptible(&bd->state_wait);
4918 }
4919
4920 DGAP_UNLOCK(bd->bd_lock, lock_flags);
4921}
4922
b053bb86
MH		 4923/*=======================================================================
4924 *
4925 * dgap_cmdb - Sends a 2 byte command to the FEP.
4926 *
4927 * ch - Pointer to channel structure.
4928 * cmd - Command to be sent.
4929 * byte1 - Integer containing first byte to be sent.
4930 * byte2 - Integer containing second byte to be sent.
4931 * ncmds - Wait until ncmds or fewer cmds are left
4932 * in the cmd buffer before returning.
4933 *
4934 *=======================================================================*/
8a2c9c44
MH		 4935static void dgap_cmdb(struct channel_t *ch, uchar cmd, uchar byte1,
4936 uchar byte2, uint ncmds)
b053bb86
MH		 4937{
4938 char *vaddr = NULL;
4939 struct cm_t *cm_addr = NULL;
4940 uint count;
4941 uint n;
4942 u16 head;
4943 u16 tail;
4944
4945 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4946 return;
4947
4948 /*
4949 * Check if board is still alive.
4950 */
31960c16 4951 if (ch->ch_bd->state == BOARD_FAILED)
b053bb86 4952 return;
b053bb86
MH		 4953
4954 /*
4955 * Make sure the pointers are in range before
4956 * writing to the FEP memory.
4957 */
4958 vaddr = ch->ch_bd->re_map_membase;
4959
4960 if (!vaddr)
4961 return;
4962
4963 cm_addr = (struct cm_t *) (vaddr + CMDBUF);
4964 head = readw(&(cm_addr->cm_head));
4965
4966 /*
4967 * Forget it if pointers out of range.
4968 */
4969 if (head >= (CMDMAX - CMDSTART) || (head & 03)) {
b053bb86
MH		 4970 ch->ch_bd->state = BOARD_FAILED;
4971 return;
4972 }
4973
4974 /*
4975 * Put the data in the circular command buffer.
4976 */
4977 writeb(cmd, (char *) (vaddr + head + CMDSTART + 0));
4978 writeb((uchar) ch->ch_portnum, (char *) (vaddr + head + CMDSTART + 1));
4979 writeb(byte1, (char *) (vaddr + head + CMDSTART + 2));
4980 writeb(byte2, (char *) (vaddr + head + CMDSTART + 3));
4981
4982 head = (head + 4) & (CMDMAX - CMDSTART - 4);
4983
4984 writew(head, &(cm_addr->cm_head));
4985
4986 /*
4987 * Wait if necessary before updating the head
4988 * pointer to limit the number of outstanding
4989 * commands to the FEP. If the time spent waiting
4990 * is outlandish, declare the FEP dead.
4991 */
4992 for (count = dgap_count ;;) {
4993
4994 head = readw(&(cm_addr->cm_head));
4995 tail = readw(&(cm_addr->cm_tail));
4996
4997 n = (head - tail) & (CMDMAX - CMDSTART - 4);
4998
4999 if (n <= ncmds * sizeof(struct cm_t))
5000 break;
5001
5002 if (--count == 0) {
b053bb86
MH		 5003 ch->ch_bd->state = BOARD_FAILED;
5004 return;
5005 }
5006 udelay(10);
5007 }
5008}
5009
b053bb86
MH		 5010/*=======================================================================
5011 *
5012 * dgap_cmdw - Sends a 1 word command to the FEP.
5013 *
5014 * ch - Pointer to channel structure.
5015 * cmd - Command to be sent.
5016 * word - Integer containing word to be sent.
5017 * ncmds - Wait until ncmds or fewer cmds are left
5018 * in the cmd buffer before returning.
5019 *
5020 *=======================================================================*/
fe0ef8e6 5021static void dgap_cmdw(struct channel_t *ch, uchar cmd, u16 word, uint ncmds)
b053bb86
MH		 5022{
5023 char *vaddr = NULL;
5024 struct cm_t *cm_addr = NULL;
5025 uint count;
5026 uint n;
5027 u16 head;
5028 u16 tail;
5029
5030 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5031 return;
5032
5033 /*
5034 * Check if board is still alive.
5035 */
31960c16 5036 if (ch->ch_bd->state == BOARD_FAILED)
b053bb86 5037 return;
b053bb86
MH		 5038
5039 /*
5040 * Make sure the pointers are in range before
5041 * writing to the FEP memory.
5042 */
5043 vaddr = ch->ch_bd->re_map_membase;
5044 if (!vaddr)
5045 return;
5046
5047 cm_addr = (struct cm_t *) (vaddr + CMDBUF);
5048 head = readw(&(cm_addr->cm_head));
5049
5050 /*
5051 * Forget it if pointers out of range.
5052 */
5053 if (head >= (CMDMAX - CMDSTART) || (head & 03)) {
b053bb86
MH		 5054 ch->ch_bd->state = BOARD_FAILED;
5055 return;
5056 }
5057
5058 /*
5059 * Put the data in the circular command buffer.
5060 */
5061 writeb(cmd, (char *) (vaddr + head + CMDSTART + 0));
5062 writeb((uchar) ch->ch_portnum, (char *) (vaddr + head + CMDSTART + 1));
5063 writew((u16) word, (char *) (vaddr + head + CMDSTART + 2));
5064
5065 head = (head + 4) & (CMDMAX - CMDSTART - 4);
5066
5067 writew(head, &(cm_addr->cm_head));
5068
5069 /*
5070 * Wait if necessary before updating the head
5071 * pointer to limit the number of outstanding
5072 * commands to the FEP. If the time spent waiting
5073 * is outlandish, declare the FEP dead.
5074 */
5075 for (count = dgap_count ;;) {
5076
5077 head = readw(&(cm_addr->cm_head));
5078 tail = readw(&(cm_addr->cm_tail));
5079
5080 n = (head - tail) & (CMDMAX - CMDSTART - 4);
5081
5082 if (n <= ncmds * sizeof(struct cm_t))
5083 break;
5084
5085 if (--count == 0) {
b053bb86
MH		 5086 ch->ch_bd->state = BOARD_FAILED;
5087 return;
5088 }
5089 udelay(10);
5090 }
5091}
5092
b053bb86
MH		 5093/*=======================================================================
5094 *
5095 * dgap_cmdw_ext - Sends a extended word command to the FEP.
5096 *
5097 * ch - Pointer to channel structure.
5098 * cmd - Command to be sent.
5099 * word - Integer containing word to be sent.
5100 * ncmds - Wait until ncmds or fewer cmds are left
5101 * in the cmd buffer before returning.
5102 *
5103 *=======================================================================*/
5104static void dgap_cmdw_ext(struct channel_t *ch, u16 cmd, u16 word, uint ncmds)
5105{
5106 char *vaddr = NULL;
5107 struct cm_t *cm_addr = NULL;
5108 uint count;
5109 uint n;
5110 u16 head;
5111 u16 tail;
5112
5113 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5114 return;
5115
5116 /*
5117 * Check if board is still alive.
5118 */
31960c16 5119 if (ch->ch_bd->state == BOARD_FAILED)
b053bb86 5120 return;
b053bb86
MH		 5121
5122 /*
5123 * Make sure the pointers are in range before
5124 * writing to the FEP memory.
5125 */
5126 vaddr = ch->ch_bd->re_map_membase;
5127 if (!vaddr)
5128 return;
5129
5130 cm_addr = (struct cm_t *) (vaddr + CMDBUF);
5131 head = readw(&(cm_addr->cm_head));
5132
5133 /*
5134 * Forget it if pointers out of range.
5135 */
5136 if (head >= (CMDMAX - CMDSTART) || (head & 03)) {
b053bb86
MH		 5137 ch->ch_bd->state = BOARD_FAILED;
5138 return;
5139 }
5140
5141 /*
5142 * Put the data in the circular command buffer.
5143 */
5144
5145 /* Write an FF to tell the FEP that we want an extended command */
5146 writeb((uchar) 0xff, (char *) (vaddr + head + CMDSTART + 0));
5147
5148 writeb((uchar) ch->ch_portnum, (uchar *) (vaddr + head + CMDSTART + 1));
5149 writew((u16) cmd, (char *) (vaddr + head + CMDSTART + 2));
5150
5151 /*
5152 * If the second part of the command won't fit,
5153 * put it at the beginning of the circular buffer.
5154 */
305ec874 5155 if (((head + 4) >= ((CMDMAX - CMDSTART)) || (head & 03)))
b053bb86 5156 writew((u16) word, (char *) (vaddr + CMDSTART));
305ec874 5157 else
b053bb86 5158 writew((u16) word, (char *) (vaddr + head + CMDSTART + 4));
b053bb86
MH		 5159
5160 head = (head + 8) & (CMDMAX - CMDSTART - 4);
5161
5162 writew(head, &(cm_addr->cm_head));
5163
5164 /*
5165 * Wait if necessary before updating the head
5166 * pointer to limit the number of outstanding
5167 * commands to the FEP. If the time spent waiting
5168 * is outlandish, declare the FEP dead.
5169 */
5170 for (count = dgap_count ;;) {
5171
5172 head = readw(&(cm_addr->cm_head));
5173 tail = readw(&(cm_addr->cm_tail));
5174
5175 n = (head - tail) & (CMDMAX - CMDSTART - 4);
5176
5177 if (n <= ncmds * sizeof(struct cm_t))
5178 break;
5179
5180 if (--count == 0) {
b053bb86
MH		 5181 ch->ch_bd->state = BOARD_FAILED;
5182 return;
5183 }
5184 udelay(10);
5185 }
5186}
5187
b053bb86
MH		 5188/*=======================================================================
5189 *
5190 * dgap_wmove - Write data to FEP buffer.
5191 *
5192 * ch - Pointer to channel structure.
5193 * buf - Poiter to characters to be moved.
5194 * cnt - Number of characters to move.
5195 *
5196 *=======================================================================*/
fe0ef8e6 5197static void dgap_wmove(struct channel_t *ch, char *buf, uint cnt)
b053bb86
MH		 5198{
5199 int n;
5200 char *taddr;
5201 struct bs_t *bs;
5202 u16 head;
5203
5204 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5205 return;
5206
5207 /*
5208 * Check parameters.
5209 */
5210 bs = ch->ch_bs;
5211 head = readw(&(bs->tx_head));
5212
5213 /*
5214 * If pointers are out of range, just return.
5215 */
305ec874
MH		 5216 if ((cnt > ch->ch_tsize) ||
5217 (unsigned)(head - ch->ch_tstart) >= ch->ch_tsize)
b053bb86 5218 return;
b053bb86
MH		 5219
5220 /*
5221 * If the write wraps over the top of the circular buffer,
5222 * move the portion up to the wrap point, and reset the
5223 * pointers to the bottom.
5224 */
5225 n = ch->ch_tstart + ch->ch_tsize - head;
5226
5227 if (cnt >= n) {
5228 cnt -= n;
5229 taddr = ch->ch_taddr + head;
5230 memcpy_toio(taddr, buf, n);
5231 head = ch->ch_tstart;
5232 buf += n;
5233 }
5234
5235 /*
5236 * Move rest of data.
5237 */
5238 taddr = ch->ch_taddr + head;
5239 n = cnt;
5240 memcpy_toio(taddr, buf, n);
5241 head += cnt;
5242
5243 writew(head, &(bs->tx_head));
5244}
5245
5246/*
5247 * Retrives the current custom baud rate from FEP memory,
5248 * and returns it back to the user.
5249 * Returns 0 on error.
5250 */
fe0ef8e6 5251static uint dgap_get_custom_baud(struct channel_t *ch)
b053bb86
MH		 5252{
5253 uchar *vaddr;
5254 ulong offset = 0;
5255 uint value = 0;
5256
305ec874 5257 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
b053bb86 5258 return 0;
b053bb86 5259
305ec874 5260 if (!ch->ch_bd || ch->ch_bd->magic != DGAP_BOARD_MAGIC)
b053bb86 5261 return 0;
b053bb86
MH		 5262
5263 if (!(ch->ch_bd->bd_flags & BD_FEP5PLUS))
5264 return 0;
5265
5266 vaddr = ch->ch_bd->re_map_membase;
5267
5268 if (!vaddr)
5269 return 0;
5270
5271 /*
5272 * Go get from fep mem, what the fep
5273 * believes the custom baud rate is.
5274 */
5275 offset = ((((*(unsigned short *)(vaddr + ECS_SEG)) << 4) +
5276 (ch->ch_portnum * 0x28) + LINE_SPEED));
5277
5278 value = readw(vaddr + offset);
5279 return value;
5280}
5281
b053bb86
MH		 5282/*
5283 * Calls the firmware to reset this channel.
5284 */
fe0ef8e6 5285static void dgap_firmware_reset_port(struct channel_t *ch)
b053bb86
MH		 5286{
5287 dgap_cmdb(ch, CHRESET, 0, 0, 0);
5288
5289 /*
5290 * Now that the channel is reset, we need to make sure
5291 * all the current settings get reapplied to the port
5292 * in the firmware.
5293 *
5294 * So we will set the driver's cache of firmware
5295 * settings all to 0, and then call param.
5296 */
5297 ch->ch_fepiflag = 0;
5298 ch->ch_fepcflag = 0;
5299 ch->ch_fepoflag = 0;
5300 ch->ch_fepstartc = 0;
5301 ch->ch_fepstopc = 0;
5302 ch->ch_fepastartc = 0;
5303 ch->ch_fepastopc = 0;
5304 ch->ch_mostat = 0;
5305 ch->ch_hflow = 0;
5306}
5307
b053bb86
MH		 5308/*=======================================================================
5309 *
5310 * dgap_param - Set Digi parameters.
5311 *
5312 * struct tty_struct * - TTY for port.
5313 *
5314 *=======================================================================*/
fe0ef8e6 5315static int dgap_param(struct tty_struct *tty)
b053bb86
MH		 5316{
5317 struct ktermios *ts;
5318 struct board_t *bd;
5319 struct channel_t *ch;
5320 struct bs_t *bs;
5321 struct un_t *un;
5322 u16 head;
5323 u16 cflag;
5324 u16 iflag;
5325 uchar mval;
5326 uchar hflow;
5327
5328 if (!tty || tty->magic != TTY_MAGIC)
5329 return -ENXIO;
5330
5331 un = (struct un_t *) tty->driver_data;
5332 if (!un || un->magic != DGAP_UNIT_MAGIC)
5333 return -ENXIO;
5334
5335 ch = un->un_ch;
5336 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5337 return -ENXIO;
5338
5339 bd = ch->ch_bd;
5340 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5341 return -ENXIO;
5342
5343 bs = ch->ch_bs;
5344 if (!bs)
5345 return -ENXIO;
5346
b053bb86
MH		 5347 ts = &tty->termios;
5348
5349 /*
5350 * If baud rate is zero, flush queues, and set mval to drop DTR.
5351 */
5352 if ((ch->ch_c_cflag & (CBAUD)) == 0) {
5353
5354 /* flush rx */
5355 head = readw(&(ch->ch_bs->rx_head));
5356 writew(head, &(ch->ch_bs->rx_tail));
5357
5358 /* flush tx */
5359 head = readw(&(ch->ch_bs->tx_head));
5360 writew(head, &(ch->ch_bs->tx_tail));
5361
5362 ch->ch_flags |= (CH_BAUD0);
5363
5364 /* Drop RTS and DTR */
5365 ch->ch_mval &= ~(D_RTS(ch)|D_DTR(ch));
5366 mval = D_DTR(ch) | D_RTS(ch);
5367 ch->ch_baud_info = 0;
5368
5369 } else if (ch->ch_custom_speed && (bd->bd_flags & BD_FEP5PLUS)) {
5370 /*
5371 * Tell the fep to do the command
5372 */
5373
b053bb86
MH		 5374 dgap_cmdw_ext(ch, 0xff01, ch->ch_custom_speed, 0);
5375
5376 /*
5377 * Now go get from fep mem, what the fep
5378 * believes the custom baud rate is.
5379 */
8a2c9c44
MH		 5380 ch->ch_custom_speed = dgap_get_custom_baud(ch);
5381 ch->ch_baud_info = ch->ch_custom_speed;
b053bb86 5382
b053bb86
MH		 5383 /* Handle transition from B0 */
5384 if (ch->ch_flags & CH_BAUD0) {
5385 ch->ch_flags &= ~(CH_BAUD0);
5386 ch->ch_mval |= (D_RTS(ch)|D_DTR(ch));
5387 }
5388 mval = D_DTR(ch) | D_RTS(ch);
5389
5390 } else {
5391 /*
5392 * Set baud rate, character size, and parity.
5393 */
5394
5395
5396 int iindex = 0;
5397 int jindex = 0;
5398 int baud = 0;
5399
5400 ulong bauds[4][16] = {
5401 { /* slowbaud */
5402 0, 50, 75, 110,
5403 134, 150, 200, 300,
5404 600, 1200, 1800, 2400,
5405 4800, 9600, 19200, 38400 },
5406 { /* slowbaud & CBAUDEX */
5407 0, 57600, 115200, 230400,
5408 460800, 150, 200, 921600,
5409 600, 1200, 1800, 2400,
5410 4800, 9600, 19200, 38400 },
5411 { /* fastbaud */
5412 0, 57600, 76800, 115200,
5413 14400, 57600, 230400, 76800,
5414 115200, 230400, 28800, 460800,
5415 921600, 9600, 19200, 38400 },
5416 { /* fastbaud & CBAUDEX */
5417 0, 57600, 115200, 230400,
5418 460800, 150, 200, 921600,
5419 600, 1200, 1800, 2400,
5420 4800, 9600, 19200, 38400 }
5421 };
5422
8a2c9c44
MH		 5423 /*
5424 * Only use the TXPrint baud rate if the
5425 * terminal unit is NOT open
5426 */
5427 if (!(ch->ch_tun.un_flags & UN_ISOPEN) &&
5428 (un->un_type == DGAP_PRINT))
b053bb86
MH		 5429 baud = C_BAUD(ch->ch_pun.un_tty) & 0xff;
5430 else
5431 baud = C_BAUD(ch->ch_tun.un_tty) & 0xff;
5432
5433 if (ch->ch_c_cflag & CBAUDEX)
5434 iindex = 1;
5435
5436 if (ch->ch_digi.digi_flags & DIGI_FAST)
5437 iindex += 2;
5438
5439 jindex = baud;
5440
305ec874
MH		 5441 if ((iindex >= 0) && (iindex < 4) &&
5442 (jindex >= 0) && (jindex < 16))
b053bb86 5443 baud = bauds[iindex][jindex];
305ec874 5444 else
b053bb86 5445 baud = 0;
b053bb86
MH		 5446
5447 if (baud == 0)
5448 baud = 9600;
5449
5450 ch->ch_baud_info = baud;
5451
b053bb86 5452 /*
8a2c9c44
MH		 5453 * CBAUD has bit position 0x1000 set these days to
5454 * indicate Linux baud rate remap.
5455 * We use a different bit assignment for high speed.
5456 * Clear this bit out while grabbing the parts of
5457 * "cflag" we want.
b053bb86 5458 */
8a2c9c44
MH		 5459 cflag = ch->ch_c_cflag & ((CBAUD ^ CBAUDEX) | PARODD | PARENB |
5460 CSTOPB | CSIZE);
b053bb86
MH		 5461
5462 /*
5463 * HUPCL bit is used by FEP to indicate fast baud
5464 * table is to be used.
5465 */
8a2c9c44
MH		 5466 if ((ch->ch_digi.digi_flags & DIGI_FAST) ||
5467 (ch->ch_c_cflag & CBAUDEX))
b053bb86
MH		 5468 cflag |= HUPCL;
5469
af5b80be
MH		 5470 if ((ch->ch_c_cflag & CBAUDEX) &&
5471 !(ch->ch_digi.digi_flags & DIGI_FAST)) {
5472 /*
5473 * The below code is trying to guarantee that only
5474 * baud rates 115200, 230400, 460800, 921600 are
5475 * remapped. We use exclusive or because the various
5476 * baud rates share common bit positions and therefore
5477 * can't be tested for easily.
5478 */
b053bb86
MH		 5479 tcflag_t tcflag = (ch->ch_c_cflag & CBAUD) | CBAUDEX;
5480 int baudpart = 0;
5481
8a2c9c44
MH		 5482 /*
5483 * Map high speed requests to index
5484 * into FEP's baud table
5485 */
b053bb86 5486 switch (tcflag) {
b115b024 5487 case B57600:
b053bb86
MH		 5488 baudpart = 1;
5489 break;
5490#ifdef B76800
b115b024 5491 case B76800:
b053bb86
MH		 5492 baudpart = 2;
5493 break;
5494#endif
b115b024 5495 case B115200:
b053bb86
MH		 5496 baudpart = 3;
5497 break;
b115b024 5498 case B230400:
b053bb86
MH		 5499 baudpart = 9;
5500 break;
b115b024 5501 case B460800:
b053bb86
MH		 5502 baudpart = 11;
5503 break;
5504#ifdef B921600
b115b024 5505 case B921600:
b053bb86
MH		 5506 baudpart = 12;
5507 break;
5508#endif
5509 default:
5510 baudpart = 0;
5511 }
5512
5513 if (baudpart)
5514 cflag = (cflag & ~(CBAUD | CBAUDEX)) | baudpart;
5515 }
5516
5517 cflag &= 0xffff;
5518
5519 if (cflag != ch->ch_fepcflag) {
5520 ch->ch_fepcflag = (u16) (cflag & 0xffff);
5521
8fc324e4
MH		 5522 /*
5523 * Okay to have channel and board
5524 * locks held calling this
5525 */
b053bb86
MH		 5526 dgap_cmdw(ch, SCFLAG, (u16) cflag, 0);
5527 }
5528
5529 /* Handle transition from B0 */
5530 if (ch->ch_flags & CH_BAUD0) {
5531 ch->ch_flags &= ~(CH_BAUD0);
5532 ch->ch_mval |= (D_RTS(ch)|D_DTR(ch));
5533 }
5534 mval = D_DTR(ch) | D_RTS(ch);
5535 }
5536
5537 /*
5538 * Get input flags.
5539 */
8fc324e4
MH		 5540 iflag = ch->ch_c_iflag & (IGNBRK | BRKINT | IGNPAR | PARMRK |
5541 INPCK | ISTRIP | IXON | IXANY | IXOFF);
b053bb86 5542
8fc324e4
MH		 5543 if ((ch->ch_startc == _POSIX_VDISABLE) ||
5544 (ch->ch_stopc == _POSIX_VDISABLE)) {
b053bb86
MH		 5545 iflag &= ~(IXON | IXOFF);
5546 ch->ch_c_iflag &= ~(IXON | IXOFF);
5547 }
5548
5549 /*
5550 * Only the IBM Xr card can switch between
5551 * 232 and 422 modes on the fly
5552 */
2f60b333 5553 if (bd->device == PCI_DEV_XR_IBM_DID) {
b053bb86
MH		 5554 if (ch->ch_digi.digi_flags & DIGI_422)
5555 dgap_cmdb(ch, SCOMMODE, MODE_422, 0, 0);
5556 else
5557 dgap_cmdb(ch, SCOMMODE, MODE_232, 0, 0);
5558 }
5559
5560 if (ch->ch_digi.digi_flags & DIGI_ALTPIN)
b115b024 5561 iflag |= IALTPIN;
b053bb86
MH		 5562
5563 if (iflag != ch->ch_fepiflag) {
5564 ch->ch_fepiflag = iflag;
5565
5566 /* Okay to have channel and board locks held calling this */
5567 dgap_cmdw(ch, SIFLAG, (u16) ch->ch_fepiflag, 0);
5568 }
5569
5570 /*
5571 * Select hardware handshaking.
5572 */
5573 hflow = 0;
5574
305ec874 5575 if (ch->ch_c_cflag & CRTSCTS)
b053bb86 5576 hflow |= (D_RTS(ch) | D_CTS(ch));
b053bb86
MH		 5577 if (ch->ch_digi.digi_flags & RTSPACE)
5578 hflow |= D_RTS(ch);
5579 if (ch->ch_digi.digi_flags & DTRPACE)
5580 hflow |= D_DTR(ch);
5581 if (ch->ch_digi.digi_flags & CTSPACE)
5582 hflow |= D_CTS(ch);
5583 if (ch->ch_digi.digi_flags & DSRPACE)
5584 hflow |= D_DSR(ch);
5585 if (ch->ch_digi.digi_flags & DCDPACE)
5586 hflow |= D_CD(ch);
5587
5588 if (hflow != ch->ch_hflow) {
5589 ch->ch_hflow = hflow;
5590
5591 /* Okay to have channel and board locks held calling this */
5592 dgap_cmdb(ch, SHFLOW, (uchar) hflow, 0xff, 0);
5593 }
5594
5595
5596 /*
8fc324e4
MH		 5597 * Set RTS and/or DTR Toggle if needed,
5598 * but only if product is FEP5+ based.
b053bb86
MH		 5599 */
5600 if (bd->bd_flags & BD_FEP5PLUS) {
5601 u16 hflow2 = 0;
305ec874 5602 if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE)
b053bb86 5603 hflow2 |= (D_RTS(ch));
305ec874 5604 if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE)
b053bb86 5605 hflow2 |= (D_DTR(ch));
b053bb86
MH		 5606
5607 dgap_cmdw_ext(ch, 0xff03, hflow2, 0);
5608 }
5609
5610 /*
5611 * Set modem control lines.
5612 */
5613
5614 mval ^= ch->ch_mforce & (mval ^ ch->ch_mval);
5615
b053bb86
MH		 5616 if (ch->ch_mostat ^ mval) {
5617 ch->ch_mostat = mval;
5618
5619 /* Okay to have channel and board locks held calling this */
b053bb86
MH		 5620 dgap_cmdb(ch, SMODEM, (uchar) mval, D_RTS(ch)|D_DTR(ch), 0);
5621 }
5622
5623 /*
5624 * Read modem signals, and then call carrier function.
5625 */
5626 ch->ch_mistat = readb(&(bs->m_stat));
5627 dgap_carrier(ch);
5628
5629 /*
5630 * Set the start and stop characters.
5631 */
8fc324e4
MH		 5632 if (ch->ch_startc != ch->ch_fepstartc ||
5633 ch->ch_stopc != ch->ch_fepstopc) {
b053bb86
MH		 5634 ch->ch_fepstartc = ch->ch_startc;
5635 ch->ch_fepstopc = ch->ch_stopc;
5636
5637 /* Okay to have channel and board locks held calling this */
5638 dgap_cmdb(ch, SFLOWC, ch->ch_fepstartc, ch->ch_fepstopc, 0);
5639 }
5640
5641 /*
5642 * Set the Auxiliary start and stop characters.
5643 */
8fc324e4
MH		 5644 if (ch->ch_astartc != ch->ch_fepastartc ||
5645 ch->ch_astopc != ch->ch_fepastopc) {
b053bb86
MH		 5646 ch->ch_fepastartc = ch->ch_astartc;
5647 ch->ch_fepastopc = ch->ch_astopc;
5648
5649 /* Okay to have channel and board locks held calling this */
5650 dgap_cmdb(ch, SAFLOWC, ch->ch_fepastartc, ch->ch_fepastopc, 0);
5651 }
5652
b053bb86
MH		 5653 return 0;
5654}
5655
b053bb86
MH		 5656/*
5657 * dgap_parity_scan()
5658 *
5659 * Convert the FEP5 way of reporting parity errors and breaks into
5660 * the Linux line discipline way.
5661 */
8fc324e4
MH		 5662static void dgap_parity_scan(struct channel_t *ch, unsigned char *cbuf,
5663 unsigned char *fbuf, int *len)
b053bb86
MH		 5664{
5665 int l = *len;
5666 int count = 0;
5667 unsigned char *in, *cout, *fout;
5668 unsigned char c;
5669
5670 in = cbuf;
5671 cout = cbuf;
5672 fout = fbuf;
5673
b053bb86
MH		 5674 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5675 return;
5676
5677 while (l--) {
5678 c = *in++;
5679 switch (ch->pscan_state) {
5680 default:
5681 /* reset to sanity and fall through */
5682 ch->pscan_state = 0;
5683
5684 case 0:
5685 /* No FF seen yet */
305ec874 5686 if (c == (unsigned char) '\377')
b053bb86
MH		 5687 /* delete this character from stream */
5688 ch->pscan_state = 1;
305ec874 5689 else {
b053bb86
MH		 5690 *cout++ = c;
5691 *fout++ = TTY_NORMAL;
5692 count += 1;
5693 }
5694 break;
5695
5696 case 1:
5697 /* first FF seen */
5698 if (c == (unsigned char) '\377') {
5699 /* doubled ff, transform to single ff */
5700 *cout++ = c;
5701 *fout++ = TTY_NORMAL;
5702 count += 1;
5703 ch->pscan_state = 0;
5704 } else {
5705 /* save value examination in next state */
5706 ch->pscan_savechar = c;
5707 ch->pscan_state = 2;
5708 }
5709 break;
5710
5711 case 2:
5712 /* third character of ff sequence */
5713
5714 *cout++ = c;
5715
5716 if (ch->pscan_savechar == 0x0) {
5717
5718 if (c == 0x0) {
b053bb86
MH		 5719 ch->ch_err_break++;
5720 *fout++ = TTY_BREAK;
305ec874 5721 } else {
b053bb86
MH		 5722 ch->ch_err_parity++;
5723 *fout++ = TTY_PARITY;
5724 }
5725 }
b053bb86
MH		 5726
5727 count += 1;
5728 ch->pscan_state = 0;
5729 }
5730 }
5731 *len = count;
b053bb86
MH		 5732}
5733
b053bb86
MH		 5734/*=======================================================================
5735 *
5736 * dgap_event - FEP to host event processing routine.
5737 *
5738 * bd - Board of current event.
5739 *
5740 *=======================================================================*/
5741static int dgap_event(struct board_t *bd)
5742{
5743 struct channel_t *ch;
5744 ulong lock_flags;
5745 ulong lock_flags2;
5746 struct bs_t *bs;
5747 uchar *event;
5748 uchar *vaddr = NULL;
5749 struct ev_t *eaddr = NULL;
5750 uint head;
5751 uint tail;
5752 int port;
5753 int reason;
5754 int modem;
5755 int b1;
5756
5757 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5758 return -ENXIO;
5759
5760 DGAP_LOCK(bd->bd_lock, lock_flags);
5761
5762 vaddr = bd->re_map_membase;
5763
5764 if (!vaddr) {
5765 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5766 return -ENXIO;
5767 }
5768
5769 eaddr = (struct ev_t *) (vaddr + EVBUF);
5770
5771 /* Get our head and tail */
5772 head = readw(&(eaddr->ev_head));
5773 tail = readw(&(eaddr->ev_tail));
5774
5775 /*
5776 * Forget it if pointers out of range.
5777 */
5778
5779 if (head >= EVMAX - EVSTART || tail >= EVMAX - EVSTART ||
5780 (head | tail) & 03) {
b053bb86
MH		 5781 /* Let go of board lock */
5782 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5783 return -ENXIO;
5784 }
5785
5786 /*
5787 * Loop to process all the events in the buffer.
5788 */
5789 while (tail != head) {
5790
5791 /*
5792 * Get interrupt information.
5793 */
5794
5795 event = bd->re_map_membase + tail + EVSTART;
5796
5797 port = event[0];
5798 reason = event[1];
5799 modem = event[2];
5800 b1 = event[3];
5801
b053bb86
MH		 5802 /*
5803 * Make sure the interrupt is valid.
5804 */
5805 if (port >= bd->nasync)
5806 goto next;
5807
305ec874 5808 if (!(reason & (IFMODEM | IFBREAK | IFTLW | IFTEM | IFDATA)))
b053bb86 5809 goto next;
b053bb86
MH		 5810
5811 ch = bd->channels[port];
5812
305ec874 5813 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
b053bb86 5814 goto next;
b053bb86
MH		 5815
5816 /*
5817 * If we have made it here, the event was valid.
5818 * Lock down the channel.
5819 */
5820 DGAP_LOCK(ch->ch_lock, lock_flags2);
5821
5822 bs = ch->ch_bs;
5823
5824 if (!bs) {
5825 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
5826 goto next;
5827 }
5828
5829 /*
5830 * Process received data.
5831 */
5832 if (reason & IFDATA) {
5833
5834 /*
5835 * ALL LOCKS *MUST* BE DROPPED BEFORE CALLING INPUT!
5836 * input could send some data to ld, which in turn
5837 * could do a callback to one of our other functions.
5838 */
5839 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
5840 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5841
5842 dgap_input(ch);
5843
5844 DGAP_LOCK(bd->bd_lock, lock_flags);
5845 DGAP_LOCK(ch->ch_lock, lock_flags2);
5846
5847 if (ch->ch_flags & CH_RACTIVE)
5848 ch->ch_flags |= CH_RENABLE;
5849 else
5850 writeb(1, &(bs->idata));
5851
5852 if (ch->ch_flags & CH_RWAIT) {
5853 ch->ch_flags &= ~CH_RWAIT;
5854
5855 wake_up_interruptible(&ch->ch_tun.un_flags_wait);
5856 }
5857 }
5858
5859 /*
5860 * Process Modem change signals.
5861 */
5862 if (reason & IFMODEM) {
5863 ch->ch_mistat = modem;
5864 dgap_carrier(ch);
5865 }
5866
5867 /*
5868 * Process break.
5869 */
5870 if (reason & IFBREAK) {
5871
b053bb86
MH		 5872 if (ch->ch_tun.un_tty) {
5873 /* A break has been indicated */
5874 ch->ch_err_break++;
5875 tty_buffer_request_room(ch->ch_tun.un_tty->port, 1);
5876 tty_insert_flip_char(ch->ch_tun.un_tty->port, 0, TTY_BREAK);
5877 tty_flip_buffer_push(ch->ch_tun.un_tty->port);
5878 }
5879 }
5880
5881 /*
5882 * Process Transmit low.
5883 */
5884 if (reason & IFTLW) {
5885
b053bb86
MH		 5886 if (ch->ch_tun.un_flags & UN_LOW) {
5887 ch->ch_tun.un_flags &= ~UN_LOW;
5888
5889 if (ch->ch_tun.un_flags & UN_ISOPEN) {
5890 if ((ch->ch_tun.un_tty->flags &
5891 (1 << TTY_DO_WRITE_WAKEUP)) &&
305ec874 5892 ch->ch_tun.un_tty->ldisc->ops->write_wakeup) {
b053bb86
MH		 5893 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
5894 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5895 (ch->ch_tun.un_tty->ldisc->ops->write_wakeup)(ch->ch_tun.un_tty);
5896 DGAP_LOCK(bd->bd_lock, lock_flags);
5897 DGAP_LOCK(ch->ch_lock, lock_flags2);
5898 }
5899 wake_up_interruptible(&ch->ch_tun.un_tty->write_wait);
5900 wake_up_interruptible(&ch->ch_tun.un_flags_wait);
b053bb86
MH		 5901 }
5902 }
5903
5904 if (ch->ch_pun.un_flags & UN_LOW) {
5905 ch->ch_pun.un_flags &= ~UN_LOW;
5906 if (ch->ch_pun.un_flags & UN_ISOPEN) {
5907 if ((ch->ch_pun.un_tty->flags &
5908 (1 << TTY_DO_WRITE_WAKEUP)) &&
305ec874 5909 ch->ch_pun.un_tty->ldisc->ops->write_wakeup) {
b053bb86
MH		 5910 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
5911 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5912 (ch->ch_pun.un_tty->ldisc->ops->write_wakeup)(ch->ch_pun.un_tty);
5913 DGAP_LOCK(bd->bd_lock, lock_flags);
5914 DGAP_LOCK(ch->ch_lock, lock_flags2);
5915 }
5916 wake_up_interruptible(&ch->ch_pun.un_tty->write_wait);
5917 wake_up_interruptible(&ch->ch_pun.un_flags_wait);
5918 }
5919 }
5920
5921 if (ch->ch_flags & CH_WLOW) {
5922 ch->ch_flags &= ~CH_WLOW;
5923 wake_up_interruptible(&ch->ch_flags_wait);
5924 }
5925 }
5926
5927 /*
5928 * Process Transmit empty.
5929 */
5930 if (reason & IFTEM) {
b053bb86
MH		 5931 if (ch->ch_tun.un_flags & UN_EMPTY) {
5932 ch->ch_tun.un_flags &= ~UN_EMPTY;
5933 if (ch->ch_tun.un_flags & UN_ISOPEN) {
5934 if ((ch->ch_tun.un_tty->flags &
5935 (1 << TTY_DO_WRITE_WAKEUP)) &&
305ec874 5936 ch->ch_tun.un_tty->ldisc->ops->write_wakeup) {
b053bb86
MH		 5937 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
5938 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5939
5940 (ch->ch_tun.un_tty->ldisc->ops->write_wakeup)(ch->ch_tun.un_tty);
5941 DGAP_LOCK(bd->bd_lock, lock_flags);
5942 DGAP_LOCK(ch->ch_lock, lock_flags2);
5943 }
5944 wake_up_interruptible(&ch->ch_tun.un_tty->write_wait);
5945 wake_up_interruptible(&ch->ch_tun.un_flags_wait);
5946 }
5947 }
5948
5949 if (ch->ch_pun.un_flags & UN_EMPTY) {
5950 ch->ch_pun.un_flags &= ~UN_EMPTY;
5951 if (ch->ch_pun.un_flags & UN_ISOPEN) {
5952 if ((ch->ch_pun.un_tty->flags &
5953 (1 << TTY_DO_WRITE_WAKEUP)) &&
305ec874 5954 ch->ch_pun.un_tty->ldisc->ops->write_wakeup) {
b053bb86
MH		 5955 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
5956 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5957 (ch->ch_pun.un_tty->ldisc->ops->write_wakeup)(ch->ch_pun.un_tty);
5958 DGAP_LOCK(bd->bd_lock, lock_flags);
5959 DGAP_LOCK(ch->ch_lock, lock_flags2);
5960 }
5961 wake_up_interruptible(&ch->ch_pun.un_tty->write_wait);
5962 wake_up_interruptible(&ch->ch_pun.un_flags_wait);
5963 }
5964 }
5965
5966
5967 if (ch->ch_flags & CH_WEMPTY) {
5968 ch->ch_flags &= ~CH_WEMPTY;
5969 wake_up_interruptible(&ch->ch_flags_wait);
5970 }
5971 }
5972
5973 DGAP_UNLOCK(ch->ch_lock, lock_flags2);
5974
5975next:
5976 tail = (tail + 4) & (EVMAX - EVSTART - 4);
5977 }
5978
5979 writew(tail, &(eaddr->ev_tail));
5980 DGAP_UNLOCK(bd->bd_lock, lock_flags);
5981
5982 return 0;
5983}
7568f7d3
MH		 5984
5985static ssize_t dgap_driver_version_show(struct device_driver *ddp, char *buf)
5986{
5987 return snprintf(buf, PAGE_SIZE, "%s\n", DG_PART);
5988}
5989static DRIVER_ATTR(version, S_IRUSR, dgap_driver_version_show, NULL);
5990
5991
5992static ssize_t dgap_driver_boards_show(struct device_driver *ddp, char *buf)
5993{
5994 return snprintf(buf, PAGE_SIZE, "%d\n", dgap_NumBoards);
5995}
5996static DRIVER_ATTR(boards, S_IRUSR, dgap_driver_boards_show, NULL);
5997
5998
5999static ssize_t dgap_driver_maxboards_show(struct device_driver *ddp, char *buf)
6000{
6001 return snprintf(buf, PAGE_SIZE, "%d\n", MAXBOARDS);
6002}
6003static DRIVER_ATTR(maxboards, S_IRUSR, dgap_driver_maxboards_show, NULL);
6004
6005
6006static ssize_t dgap_driver_pollcounter_show(struct device_driver *ddp, char *buf)
6007{
6008 return snprintf(buf, PAGE_SIZE, "%ld\n", dgap_poll_counter);
6009}
6010static DRIVER_ATTR(pollcounter, S_IRUSR, dgap_driver_pollcounter_show, NULL);
6011
6012
6013static ssize_t dgap_driver_state_show(struct device_driver *ddp, char *buf)
6014{
6015 return snprintf(buf, PAGE_SIZE, "%s\n", dgap_driver_state_text[dgap_driver_state]);
6016}
6017static DRIVER_ATTR(state, S_IRUSR, dgap_driver_state_show, NULL);
6018
7568f7d3
MH		 6019static ssize_t dgap_driver_pollrate_show(struct device_driver *ddp, char *buf)
6020{
6021 return snprintf(buf, PAGE_SIZE, "%dms\n", dgap_poll_tick);
6022}
6023
6024static ssize_t dgap_driver_pollrate_store(struct device_driver *ddp, const char *buf, size_t count)
6025{
c4875ebf
MH		 6026 if (sscanf(buf, "%d\n", &dgap_poll_tick) != 1)
6027 return -EINVAL;
7568f7d3
MH		 6028 return count;
6029}
6030static DRIVER_ATTR(pollrate, (S_IRUSR | S_IWUSR), dgap_driver_pollrate_show, dgap_driver_pollrate_store);
6031
434b679b 6032static int dgap_create_driver_sysfiles(struct pci_driver *dgap_driver)
7568f7d3
MH		 6033{
6034 int rc = 0;
6035 struct device_driver *driverfs = &dgap_driver->driver;
6036
6037 rc |= driver_create_file(driverfs, &driver_attr_version);
6038 rc |= driver_create_file(driverfs, &driver_attr_boards);
6039 rc |= driver_create_file(driverfs, &driver_attr_maxboards);
7568f7d3
MH		 6040 rc |= driver_create_file(driverfs, &driver_attr_pollrate);
6041 rc |= driver_create_file(driverfs, &driver_attr_pollcounter);
6042 rc |= driver_create_file(driverfs, &driver_attr_state);
434b679b
MH		 6043
6044 return rc;
7568f7d3
MH		 6045}
6046
fe0ef8e6 6047static void dgap_remove_driver_sysfiles(struct pci_driver *dgap_driver)
7568f7d3
MH		 6048{
6049 struct device_driver *driverfs = &dgap_driver->driver;
6050 driver_remove_file(driverfs, &driver_attr_version);
6051 driver_remove_file(driverfs, &driver_attr_boards);
6052 driver_remove_file(driverfs, &driver_attr_maxboards);
7568f7d3
MH		 6053 driver_remove_file(driverfs, &driver_attr_pollrate);
6054 driver_remove_file(driverfs, &driver_attr_pollcounter);
6055 driver_remove_file(driverfs, &driver_attr_state);
6056}
6057
3eb14151
MH		 6058static struct board_t *dgap_verify_board(struct device *p)
6059{
6060 struct board_t *bd;
6061
6062 if (!p)
6063 return NULL;
6064
6065 bd = dev_get_drvdata(p);
6066 if (!bd || bd->magic != DGAP_BOARD_MAGIC || bd->state != BOARD_READY)
6067 return NULL;
6068
6069 return bd;
6070}
7568f7d3 6071
7568f7d3
MH		 6072static ssize_t dgap_ports_state_show(struct device *p, struct device_attribute *attr, char *buf)
6073{
6074 struct board_t *bd;
6075 int count = 0;
6076 int i = 0;
6077
3eb14151
MH		 6078 bd = dgap_verify_board(p);
6079 if (!bd)
6080 return 0;
7568f7d3
MH		 6081
6082 for (i = 0; i < bd->nasync; i++) {
6083 count += snprintf(buf + count, PAGE_SIZE - count,
6084 "%d %s\n", bd->channels[i]->ch_portnum,
6085 bd->channels[i]->ch_open_count ? "Open" : "Closed");
6086 }
6087 return count;
6088}
6089static DEVICE_ATTR(ports_state, S_IRUSR, dgap_ports_state_show, NULL);
6090
7568f7d3
MH		 6091static ssize_t dgap_ports_baud_show(struct device *p, struct device_attribute *attr, char *buf)
6092{
6093 struct board_t *bd;
6094 int count = 0;
6095 int i = 0;
6096
3eb14151
MH		 6097 bd = dgap_verify_board(p);
6098 if (!bd)
6099 return 0;
7568f7d3
MH		 6100
6101 for (i = 0; i < bd->nasync; i++) {
6102 count += snprintf(buf + count, PAGE_SIZE - count,
6103 "%d %d\n", bd->channels[i]->ch_portnum, bd->channels[i]->ch_baud_info);
6104 }
6105 return count;
6106}
6107static DEVICE_ATTR(ports_baud, S_IRUSR, dgap_ports_baud_show, NULL);
6108
7568f7d3
MH		 6109static ssize_t dgap_ports_msignals_show(struct device *p, struct device_attribute *attr, char *buf)
6110{
6111 struct board_t *bd;
6112 int count = 0;
6113 int i = 0;
6114
3eb14151
MH		 6115 bd = dgap_verify_board(p);
6116 if (!bd)
6117 return 0;
7568f7d3
MH		 6118
6119 for (i = 0; i < bd->nasync; i++) {
305ec874 6120 if (bd->channels[i]->ch_open_count)
7568f7d3
MH		 6121 count += snprintf(buf + count, PAGE_SIZE - count,
6122 "%d %s %s %s %s %s %s\n", bd->channels[i]->ch_portnum,
6123 (bd->channels[i]->ch_mostat & UART_MCR_RTS) ? "RTS" : "",
6124 (bd->channels[i]->ch_mistat & UART_MSR_CTS) ? "CTS" : "",
6125 (bd->channels[i]->ch_mostat & UART_MCR_DTR) ? "DTR" : "",
6126 (bd->channels[i]->ch_mistat & UART_MSR_DSR) ? "DSR" : "",
6127 (bd->channels[i]->ch_mistat & UART_MSR_DCD) ? "DCD" : "",
6128 (bd->channels[i]->ch_mistat & UART_MSR_RI) ? "RI" : "");
305ec874 6129 else
7568f7d3
MH		 6130 count += snprintf(buf + count, PAGE_SIZE - count,
6131 "%d\n", bd->channels[i]->ch_portnum);
7568f7d3
MH		 6132 }
6133 return count;
6134}
6135static DEVICE_ATTR(ports_msignals, S_IRUSR, dgap_ports_msignals_show, NULL);
6136
7568f7d3
MH		 6137static ssize_t dgap_ports_iflag_show(struct device *p, struct device_attribute *attr, char *buf)
6138{
6139 struct board_t *bd;
6140 int count = 0;
6141 int i = 0;
6142
3eb14151
MH		 6143 bd = dgap_verify_board(p);
6144 if (!bd)
6145 return 0;
7568f7d3 6146
305ec874 6147 for (i = 0; i < bd->nasync; i++)
7568f7d3
MH		 6148 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
6149 bd->channels[i]->ch_portnum, bd->channels[i]->ch_c_iflag);
7568f7d3
MH		 6150 return count;
6151}
6152static DEVICE_ATTR(ports_iflag, S_IRUSR, dgap_ports_iflag_show, NULL);
6153
7568f7d3
MH		 6154static ssize_t dgap_ports_cflag_show(struct device *p, struct device_attribute *attr, char *buf)
6155{
6156 struct board_t *bd;
6157 int count = 0;
6158 int i = 0;
6159
3eb14151
MH		 6160 bd = dgap_verify_board(p);
6161 if (!bd)
6162 return 0;
7568f7d3 6163
305ec874 6164 for (i = 0; i < bd->nasync; i++)
7568f7d3
MH		 6165 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
6166 bd->channels[i]->ch_portnum, bd->channels[i]->ch_c_cflag);
7568f7d3
MH		 6167 return count;
6168}
6169static DEVICE_ATTR(ports_cflag, S_IRUSR, dgap_ports_cflag_show, NULL);
6170
7568f7d3
MH		 6171static ssize_t dgap_ports_oflag_show(struct device *p, struct device_attribute *attr, char *buf)
6172{
6173 struct board_t *bd;
6174 int count = 0;
6175 int i = 0;
6176
3eb14151
MH		 6177 bd = dgap_verify_board(p);
6178 if (!bd)
6179 return 0;
7568f7d3 6180
305ec874 6181 for (i = 0; i < bd->nasync; i++)
7568f7d3
MH		 6182 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
6183 bd->channels[i]->ch_portnum, bd->channels[i]->ch_c_oflag);
7568f7d3
MH		 6184 return count;
6185}
6186static DEVICE_ATTR(ports_oflag, S_IRUSR, dgap_ports_oflag_show, NULL);
6187
7568f7d3
MH		 6188static ssize_t dgap_ports_lflag_show(struct device *p, struct device_attribute *attr, char *buf)
6189{
6190 struct board_t *bd;
6191 int count = 0;
6192 int i = 0;
6193
3eb14151
MH		 6194 bd = dgap_verify_board(p);
6195 if (!bd)
6196 return 0;
7568f7d3 6197
305ec874 6198 for (i = 0; i < bd->nasync; i++)
7568f7d3
MH		 6199 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
6200 bd->channels[i]->ch_portnum, bd->channels[i]->ch_c_lflag);
7568f7d3
MH		 6201 return count;
6202}
6203static DEVICE_ATTR(ports_lflag, S_IRUSR, dgap_ports_lflag_show, NULL);
6204
7568f7d3
MH		 6205static ssize_t dgap_ports_digi_flag_show(struct device *p, struct device_attribute *attr, char *buf)
6206{
6207 struct board_t *bd;
6208 int count = 0;
6209 int i = 0;
6210
3eb14151
MH		 6211 bd = dgap_verify_board(p);
6212 if (!bd)
6213 return 0;
7568f7d3 6214
305ec874 6215 for (i = 0; i < bd->nasync; i++)
7568f7d3
MH		 6216 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
6217 bd->channels[i]->ch_portnum, bd->channels[i]->ch_digi.digi_flags);
7568f7d3
MH		 6218 return count;
6219}
6220static DEVICE_ATTR(ports_digi_flag, S_IRUSR, dgap_ports_digi_flag_show, NULL);
6221
7568f7d3
MH		 6222static ssize_t dgap_ports_rxcount_show(struct device *p, struct device_attribute *attr, char *buf)
6223{
6224 struct board_t *bd;
6225 int count = 0;
6226 int i = 0;
6227
3eb14151
MH		 6228 bd = dgap_verify_board(p);
6229 if (!bd)
6230 return 0;
7568f7d3 6231
305ec874 6232 for (i = 0; i < bd->nasync; i++)
7568f7d3
MH		 6233 count += snprintf(buf + count, PAGE_SIZE - count, "%d %ld\n",
6234 bd->channels[i]->ch_portnum, bd->channels[i]->ch_rxcount);
7568f7d3
MH		 6235 return count;
6236}
6237static DEVICE_ATTR(ports_rxcount, S_IRUSR, dgap_ports_rxcount_show, NULL);
6238
7568f7d3
MH		 6239static ssize_t dgap_ports_txcount_show(struct device *p, struct device_attribute *attr, char *buf)
6240{
6241 struct board_t *bd;
6242 int count = 0;
6243 int i = 0;
6244
3eb14151
MH		 6245 bd = dgap_verify_board(p);
6246 if (!bd)
6247 return 0;
7568f7d3 6248
305ec874 6249 for (i = 0; i < bd->nasync; i++)
7568f7d3
MH		 6250 count += snprintf(buf + count, PAGE_SIZE - count, "%d %ld\n",
6251 bd->channels[i]->ch_portnum, bd->channels[i]->ch_txcount);
7568f7d3
MH		 6252 return count;
6253}
6254static DEVICE_ATTR(ports_txcount, S_IRUSR, dgap_ports_txcount_show, NULL);
6255
7568f7d3
MH		 6256/* this function creates the sys files that will export each signal status
6257 * to sysfs each value will be put in a separate filename
6258 */
fe0ef8e6 6259static void dgap_create_ports_sysfiles(struct board_t *bd)
7568f7d3 6260{
7568f7d3 6261 dev_set_drvdata(&bd->pdev->dev, bd);
434b679b
MH		 6262 device_create_file(&(bd->pdev->dev), &dev_attr_ports_state);
6263 device_create_file(&(bd->pdev->dev), &dev_attr_ports_baud);
6264 device_create_file(&(bd->pdev->dev), &dev_attr_ports_msignals);
6265 device_create_file(&(bd->pdev->dev), &dev_attr_ports_iflag);
6266 device_create_file(&(bd->pdev->dev), &dev_attr_ports_cflag);
6267 device_create_file(&(bd->pdev->dev), &dev_attr_ports_oflag);
6268 device_create_file(&(bd->pdev->dev), &dev_attr_ports_lflag);
6269 device_create_file(&(bd->pdev->dev), &dev_attr_ports_digi_flag);
6270 device_create_file(&(bd->pdev->dev), &dev_attr_ports_rxcount);
6271 device_create_file(&(bd->pdev->dev), &dev_attr_ports_txcount);
7568f7d3
MH		 6272}
6273
7568f7d3 6274/* removes all the sys files created for that port */
fe0ef8e6 6275static void dgap_remove_ports_sysfiles(struct board_t *bd)
7568f7d3
MH		 6276{
6277 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_state);
6278 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_baud);
6279 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_msignals);
6280 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_iflag);
6281 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_cflag);
6282 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_oflag);
6283 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_lflag);
6284 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_digi_flag);
6285 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_rxcount);
6286 device_remove_file(&(bd->pdev->dev), &dev_attr_ports_txcount);
6287}
6288
7568f7d3
MH		 6289static ssize_t dgap_tty_state_show(struct device *d, struct device_attribute *attr, char *buf)
6290{
6291 struct board_t *bd;
6292 struct channel_t *ch;
6293 struct un_t *un;
6294
6295 if (!d)
cf42c34d 6296 return 0;
7568f7d3
MH		 6297 un = dev_get_drvdata(d);
6298 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6299 return 0;
7568f7d3
MH		 6300 ch = un->un_ch;
6301 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6302 return 0;
7568f7d3
MH		 6303 bd = ch->ch_bd;
6304 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6305 return 0;
7568f7d3 6306 if (bd->state != BOARD_READY)
cf42c34d 6307 return 0;
7568f7d3
MH		 6308
6309 return snprintf(buf, PAGE_SIZE, "%s", un->un_open_count ? "Open" : "Closed");
6310}
6311static DEVICE_ATTR(state, S_IRUSR, dgap_tty_state_show, NULL);
6312
7568f7d3
MH		 6313static ssize_t dgap_tty_baud_show(struct device *d, struct device_attribute *attr, char *buf)
6314{
6315 struct board_t *bd;
6316 struct channel_t *ch;
6317 struct un_t *un;
6318
6319 if (!d)
cf42c34d 6320 return 0;
7568f7d3
MH		 6321 un = dev_get_drvdata(d);
6322 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6323 return 0;
7568f7d3
MH		 6324 ch = un->un_ch;
6325 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6326 return 0;
7568f7d3
MH		 6327 bd = ch->ch_bd;
6328 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6329 return 0;
7568f7d3 6330 if (bd->state != BOARD_READY)
cf42c34d 6331 return 0;
7568f7d3
MH		 6332
6333 return snprintf(buf, PAGE_SIZE, "%d\n", ch->ch_baud_info);
6334}
6335static DEVICE_ATTR(baud, S_IRUSR, dgap_tty_baud_show, NULL);
6336
7568f7d3
MH		 6337static ssize_t dgap_tty_msignals_show(struct device *d, struct device_attribute *attr, char *buf)
6338{
6339 struct board_t *bd;
6340 struct channel_t *ch;
6341 struct un_t *un;
6342
6343 if (!d)
cf42c34d 6344 return 0;
7568f7d3
MH		 6345 un = dev_get_drvdata(d);
6346 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6347 return 0;
7568f7d3
MH		 6348 ch = un->un_ch;
6349 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6350 return 0;
7568f7d3
MH		 6351 bd = ch->ch_bd;
6352 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6353 return 0;
7568f7d3 6354 if (bd->state != BOARD_READY)
cf42c34d 6355 return 0;
7568f7d3
MH		 6356
6357 if (ch->ch_open_count) {
6358 return snprintf(buf, PAGE_SIZE, "%s %s %s %s %s %s\n",
6359 (ch->ch_mostat & UART_MCR_RTS) ? "RTS" : "",
6360 (ch->ch_mistat & UART_MSR_CTS) ? "CTS" : "",
6361 (ch->ch_mostat & UART_MCR_DTR) ? "DTR" : "",
6362 (ch->ch_mistat & UART_MSR_DSR) ? "DSR" : "",
6363 (ch->ch_mistat & UART_MSR_DCD) ? "DCD" : "",
6364 (ch->ch_mistat & UART_MSR_RI) ? "RI" : "");
6365 }
6366 return 0;
6367}
6368static DEVICE_ATTR(msignals, S_IRUSR, dgap_tty_msignals_show, NULL);
6369
7568f7d3
MH		 6370static ssize_t dgap_tty_iflag_show(struct device *d, struct device_attribute *attr, char *buf)
6371{
6372 struct board_t *bd;
6373 struct channel_t *ch;
6374 struct un_t *un;
6375
6376 if (!d)
cf42c34d 6377 return 0;
7568f7d3
MH		 6378 un = dev_get_drvdata(d);
6379 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6380 return 0;
7568f7d3
MH		 6381 ch = un->un_ch;
6382 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6383 return 0;
7568f7d3
MH		 6384 bd = ch->ch_bd;
6385 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6386 return 0;
7568f7d3 6387 if (bd->state != BOARD_READY)
cf42c34d 6388 return 0;
7568f7d3
MH		 6389
6390 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_iflag);
6391}
6392static DEVICE_ATTR(iflag, S_IRUSR, dgap_tty_iflag_show, NULL);
6393
7568f7d3
MH		 6394static ssize_t dgap_tty_cflag_show(struct device *d, struct device_attribute *attr, char *buf)
6395{
6396 struct board_t *bd;
6397 struct channel_t *ch;
6398 struct un_t *un;
6399
6400 if (!d)
cf42c34d 6401 return 0;
7568f7d3
MH		 6402 un = dev_get_drvdata(d);
6403 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6404 return 0;
7568f7d3
MH		 6405 ch = un->un_ch;
6406 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6407 return 0;
7568f7d3
MH		 6408 bd = ch->ch_bd;
6409 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6410 return 0;
7568f7d3 6411 if (bd->state != BOARD_READY)
cf42c34d 6412 return 0;
7568f7d3
MH		 6413
6414 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_cflag);
6415}
6416static DEVICE_ATTR(cflag, S_IRUSR, dgap_tty_cflag_show, NULL);
6417
7568f7d3
MH		 6418static ssize_t dgap_tty_oflag_show(struct device *d, struct device_attribute *attr, char *buf)
6419{
6420 struct board_t *bd;
6421 struct channel_t *ch;
6422 struct un_t *un;
6423
6424 if (!d)
cf42c34d 6425 return 0;
7568f7d3
MH		 6426 un = dev_get_drvdata(d);
6427 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6428 return 0;
7568f7d3
MH		 6429 ch = un->un_ch;
6430 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6431 return 0;
7568f7d3
MH		 6432 bd = ch->ch_bd;
6433 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6434 return 0;
7568f7d3 6435 if (bd->state != BOARD_READY)
cf42c34d 6436 return 0;
7568f7d3
MH		 6437
6438 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_oflag);
6439}
6440static DEVICE_ATTR(oflag, S_IRUSR, dgap_tty_oflag_show, NULL);
6441
7568f7d3
MH		 6442static ssize_t dgap_tty_lflag_show(struct device *d, struct device_attribute *attr, char *buf)
6443{
6444 struct board_t *bd;
6445 struct channel_t *ch;
6446 struct un_t *un;
6447
6448 if (!d)
cf42c34d 6449 return 0;
7568f7d3
MH		 6450 un = dev_get_drvdata(d);
6451 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6452 return 0;
7568f7d3
MH		 6453 ch = un->un_ch;
6454 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6455 return 0;
7568f7d3
MH		 6456 bd = ch->ch_bd;
6457 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6458 return 0;
7568f7d3 6459 if (bd->state != BOARD_READY)
cf42c34d 6460 return 0;
7568f7d3
MH		 6461
6462 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_lflag);
6463}
6464static DEVICE_ATTR(lflag, S_IRUSR, dgap_tty_lflag_show, NULL);
6465
7568f7d3
MH		 6466static ssize_t dgap_tty_digi_flag_show(struct device *d, struct device_attribute *attr, char *buf)
6467{
6468 struct board_t *bd;
6469 struct channel_t *ch;
6470 struct un_t *un;
6471
6472 if (!d)
cf42c34d 6473 return 0;
7568f7d3
MH		 6474 un = dev_get_drvdata(d);
6475 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6476 return 0;
7568f7d3
MH		 6477 ch = un->un_ch;
6478 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6479 return 0;
7568f7d3
MH		 6480 bd = ch->ch_bd;
6481 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6482 return 0;
7568f7d3 6483 if (bd->state != BOARD_READY)
cf42c34d 6484 return 0;
7568f7d3
MH		 6485
6486 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_digi.digi_flags);
6487}
6488static DEVICE_ATTR(digi_flag, S_IRUSR, dgap_tty_digi_flag_show, NULL);
6489
7568f7d3
MH		 6490static ssize_t dgap_tty_rxcount_show(struct device *d, struct device_attribute *attr, char *buf)
6491{
6492 struct board_t *bd;
6493 struct channel_t *ch;
6494 struct un_t *un;
6495
6496 if (!d)
cf42c34d 6497 return 0;
7568f7d3
MH		 6498 un = dev_get_drvdata(d);
6499 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6500 return 0;
7568f7d3
MH		 6501 ch = un->un_ch;
6502 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6503 return 0;
7568f7d3
MH		 6504 bd = ch->ch_bd;
6505 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6506 return 0;
7568f7d3 6507 if (bd->state != BOARD_READY)
cf42c34d 6508 return 0;
7568f7d3
MH		 6509
6510 return snprintf(buf, PAGE_SIZE, "%ld\n", ch->ch_rxcount);
6511}
6512static DEVICE_ATTR(rxcount, S_IRUSR, dgap_tty_rxcount_show, NULL);
6513
7568f7d3
MH		 6514static ssize_t dgap_tty_txcount_show(struct device *d, struct device_attribute *attr, char *buf)
6515{
6516 struct board_t *bd;
6517 struct channel_t *ch;
6518 struct un_t *un;
6519
6520 if (!d)
cf42c34d 6521 return 0;
7568f7d3
MH		 6522 un = dev_get_drvdata(d);
6523 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6524 return 0;
7568f7d3
MH		 6525 ch = un->un_ch;
6526 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6527 return 0;
7568f7d3
MH		 6528 bd = ch->ch_bd;
6529 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6530 return 0;
7568f7d3 6531 if (bd->state != BOARD_READY)
cf42c34d 6532 return 0;
7568f7d3
MH		 6533
6534 return snprintf(buf, PAGE_SIZE, "%ld\n", ch->ch_txcount);
6535}
6536static DEVICE_ATTR(txcount, S_IRUSR, dgap_tty_txcount_show, NULL);
6537
7568f7d3
MH		 6538static ssize_t dgap_tty_name_show(struct device *d, struct device_attribute *attr, char *buf)
6539{
6540 struct board_t *bd;
6541 struct channel_t *ch;
6542 struct un_t *un;
6543 int cn;
6544 int bn;
6545 struct cnode *cptr = NULL;
6546 int found = FALSE;
6547 int ncount = 0;
6548 int starto = 0;
6549 int i = 0;
6550
6551 if (!d)
cf42c34d 6552 return 0;
7568f7d3
MH		 6553 un = dev_get_drvdata(d);
6554 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 6555 return 0;
7568f7d3
MH		 6556 ch = un->un_ch;
6557 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 6558 return 0;
7568f7d3
MH		 6559 bd = ch->ch_bd;
6560 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 6561 return 0;
7568f7d3 6562 if (bd->state != BOARD_READY)
cf42c34d 6563 return 0;
7568f7d3 6564
7d6069d7 6565 bn = bd->boardnum;
7568f7d3
MH		 6566 cn = ch->ch_portnum;
6567
6568 for (cptr = bd->bd_config; cptr; cptr = cptr->next) {
6569
6570 if ((cptr->type == BNODE) &&
6571 ((cptr->u.board.type == APORT2_920P) || (cptr->u.board.type == APORT4_920P) ||
6572 (cptr->u.board.type == APORT8_920P) || (cptr->u.board.type == PAPORT4) ||
6573 (cptr->u.board.type == PAPORT8))) {
6574
6575 found = TRUE;
6576 if (cptr->u.board.v_start)
6577 starto = cptr->u.board.start;
6578 else
6579 starto = 1;
6580 }
6581
6582 if (cptr->type == TNODE && found == TRUE) {
6583 char *ptr1;
6584 if (strstr(cptr->u.ttyname, "tty")) {
6585 ptr1 = cptr->u.ttyname;
6586 ptr1 += 3;
305ec874 6587 } else
7568f7d3 6588 ptr1 = cptr->u.ttyname;
7568f7d3
MH		 6589
6590 for (i = 0; i < dgap_config_get_number_of_ports(bd); i++) {
305ec874 6591 if (cn == i)
7568f7d3
MH		 6592 return snprintf(buf, PAGE_SIZE, "%s%s%02d\n",
6593 (un->un_type == DGAP_PRINT) ? "pr" : "tty",
6594 ptr1, i + starto);
7568f7d3
MH		 6595 }
6596 }
6597
6598 if (cptr->type == CNODE) {
6599
6600 for (i = 0; i < cptr->u.conc.nport; i++) {
305ec874 6601 if (cn == (i + ncount))
7568f7d3
MH		 6602
6603 return snprintf(buf, PAGE_SIZE, "%s%s%02d\n",
6604 (un->un_type == DGAP_PRINT) ? "pr" : "tty",
6605 cptr->u.conc.id,
6606 i + (cptr->u.conc.v_start ? cptr->u.conc.start : 1));
7568f7d3
MH		 6607 }
6608
6609 ncount += cptr->u.conc.nport;
6610 }
6611
6612 if (cptr->type == MNODE) {
6613
6614 for (i = 0; i < cptr->u.module.nport; i++) {
305ec874 6615 if (cn == (i + ncount))
7568f7d3
MH		 6616 return snprintf(buf, PAGE_SIZE, "%s%s%02d\n",
6617 (un->un_type == DGAP_PRINT) ? "pr" : "tty",
6618 cptr->u.module.id,
6619 i + (cptr->u.module.v_start ? cptr->u.module.start : 1));
7568f7d3
MH		 6620 }
6621
6622 ncount += cptr->u.module.nport;
6623
6624 }
6625 }
6626
6627 return snprintf(buf, PAGE_SIZE, "%s_dgap_%d_%d\n",
6628 (un->un_type == DGAP_PRINT) ? "pr" : "tty", bn, cn);
6629
6630}
6631static DEVICE_ATTR(custom_name, S_IRUSR, dgap_tty_name_show, NULL);
6632
7568f7d3
MH		 6633static struct attribute *dgap_sysfs_tty_entries[] = {
6634 &dev_attr_state.attr,
6635 &dev_attr_baud.attr,
6636 &dev_attr_msignals.attr,
6637 &dev_attr_iflag.attr,
6638 &dev_attr_cflag.attr,
6639 &dev_attr_oflag.attr,
6640 &dev_attr_lflag.attr,
6641 &dev_attr_digi_flag.attr,
6642 &dev_attr_rxcount.attr,
6643 &dev_attr_txcount.attr,
6644 &dev_attr_custom_name.attr,
6645 NULL
6646};
6647
7568f7d3
MH		 6648static struct attribute_group dgap_tty_attribute_group = {
6649 .name = NULL,
6650 .attrs = dgap_sysfs_tty_entries,
6651};
6652
fe0ef8e6 6653static void dgap_create_tty_sysfs(struct un_t *un, struct device *c)
7568f7d3
MH		 6654{
6655 int ret;
6656
6657 ret = sysfs_create_group(&c->kobj, &dgap_tty_attribute_group);
54794d19 6658 if (ret)
7568f7d3 6659 return;
7568f7d3
MH		 6660
6661 dev_set_drvdata(c, un);
6662
6663}
6664
fe0ef8e6 6665static void dgap_remove_tty_sysfs(struct device *c)
7568f7d3
MH		 6666{
6667 sysfs_remove_group(&c->kobj, &dgap_tty_attribute_group);
6668}
69edaa21
MH		 6669
6670/*
6671 * Parse a configuration file read into memory as a string.
6672 */
fe0ef8e6 6673static int dgap_parsefile(char **in, int Remove)
69edaa21
MH		 6674{
6675 struct cnode *p, *brd, *line, *conc;
6676 int rc;
6677 char *s = NULL, *s2 = NULL;
6678 int linecnt = 0;
6679
6680 p = &dgap_head;
6681 brd = line = conc = NULL;
6682
6683 /* perhaps we are adding to an existing list? */
305ec874 6684 while (p->next != NULL)
69edaa21 6685 p = p->next;
69edaa21
MH		 6686
6687 /* file must start with a BEGIN */
b115b024 6688 while ((rc = dgap_gettok(in, p)) != BEGIN) {
69edaa21
MH		 6689 if (rc == 0) {
6690 dgap_err("unexpected EOF");
cf42c34d 6691 return -1;
69edaa21
MH		 6692 }
6693 }
6694
b115b024
MH		 6695 for (; ;) {
6696 rc = dgap_gettok(in, p);
69edaa21
MH		 6697 if (rc == 0) {
6698 dgap_err("unexpected EOF");
cf42c34d 6699 return -1;
69edaa21
MH		 6700 }
6701
6702 switch (rc) {
6703 case 0:
6704 dgap_err("unexpected end of file");
cf42c34d 6705 return -1;
69edaa21
MH		 6706
6707 case BEGIN: /* should only be 1 begin */
6708 dgap_err("unexpected config_begin\n");
cf42c34d 6709 return -1;
69edaa21
MH		 6710
6711 case END:
cf42c34d 6712 return 0;
69edaa21
MH		 6713
6714 case BOARD: /* board info */
6715 if (dgap_checknode(p))
cf42c34d 6716 return -1;
d1c3c6f5
MH		 6717 p->next = dgap_newnode(BNODE);
6718 if (!p->next) {
69edaa21 6719 dgap_err("out of memory");
cf42c34d 6720 return -1;
69edaa21
MH		 6721 }
6722 p = p->next;
6723
6724 p->u.board.status = dgap_savestring("No");
6725 line = conc = NULL;
6726 brd = p;
6727 linecnt = -1;
6728 break;
6729
6730 case APORT2_920P: /* AccelePort_4 */
6731 if (p->type != BNODE) {
6732 dgap_err("unexpected Digi_2r_920 string");
cf42c34d 6733 return -1;
69edaa21
MH		 6734 }
6735 p->u.board.type = APORT2_920P;
6736 p->u.board.v_type = 1;
69edaa21
MH		 6737 break;
6738
6739 case APORT4_920P: /* AccelePort_4 */
6740 if (p->type != BNODE) {
6741 dgap_err("unexpected Digi_4r_920 string");
cf42c34d 6742 return -1;
69edaa21
MH		 6743 }
6744 p->u.board.type = APORT4_920P;
6745 p->u.board.v_type = 1;
69edaa21
MH		 6746 break;
6747
6748 case APORT8_920P: /* AccelePort_8 */
6749 if (p->type != BNODE) {
6750 dgap_err("unexpected Digi_8r_920 string");
cf42c34d 6751 return -1;
69edaa21
MH		 6752 }
6753 p->u.board.type = APORT8_920P;
6754 p->u.board.v_type = 1;
69edaa21
MH		 6755 break;
6756
6757 case PAPORT4: /* AccelePort_4 PCI */
6758 if (p->type != BNODE) {
6759 dgap_err("unexpected Digi_4r(PCI) string");
cf42c34d 6760 return -1;
69edaa21
MH		 6761 }
6762 p->u.board.type = PAPORT4;
6763 p->u.board.v_type = 1;
69edaa21
MH		 6764 break;
6765
6766 case PAPORT8: /* AccelePort_8 PCI */
6767 if (p->type != BNODE) {
6768 dgap_err("unexpected Digi_8r string");
cf42c34d 6769 return -1;
69edaa21
MH		 6770 }
6771 p->u.board.type = PAPORT8;
6772 p->u.board.v_type = 1;
69edaa21
MH		 6773 break;
6774
6775 case PCX: /* PCI C/X */
6776 if (p->type != BNODE) {
6777 dgap_err("unexpected Digi_C/X_(PCI) string");
cf42c34d 6778 return -1;
69edaa21
MH		 6779 }
6780 p->u.board.type = PCX;
6781 p->u.board.v_type = 1;
6782 p->u.board.conc1 = 0;
6783 p->u.board.conc2 = 0;
6784 p->u.board.module1 = 0;
6785 p->u.board.module2 = 0;
69edaa21
MH		 6786 break;
6787
6788 case PEPC: /* PCI EPC/X */
6789 if (p->type != BNODE) {
6790 dgap_err("unexpected \"Digi_EPC/X_(PCI)\" string");
cf42c34d 6791 return -1;
69edaa21
MH		 6792 }
6793 p->u.board.type = PEPC;
6794 p->u.board.v_type = 1;
6795 p->u.board.conc1 = 0;
6796 p->u.board.conc2 = 0;
6797 p->u.board.module1 = 0;
6798 p->u.board.module2 = 0;
69edaa21
MH		 6799 break;
6800
6801 case PPCM: /* PCI/Xem */
6802 if (p->type != BNODE) {
6803 dgap_err("unexpected PCI/Xem string");
cf42c34d 6804 return -1;
69edaa21
MH		 6805 }
6806 p->u.board.type = PPCM;
6807 p->u.board.v_type = 1;
6808 p->u.board.conc1 = 0;
6809 p->u.board.conc2 = 0;
69edaa21
MH		 6810 break;
6811
6812 case IO: /* i/o port */
6813 if (p->type != BNODE) {
6814 dgap_err("IO port only vaild for boards");
cf42c34d 6815 return -1;
69edaa21
MH		 6816 }
6817 s = dgap_getword(in);
6818 if (s == NULL) {
6819 dgap_err("unexpected end of file");
cf42c34d 6820 return -1;
69edaa21
MH		 6821 }
6822 p->u.board.portstr = dgap_savestring(s);
6823 p->u.board.port = (short)simple_strtol(s, &s2, 0);
6824 if ((short)strlen(s) > (short)(s2 - s)) {
6825 dgap_err("bad number for IO port");
cf42c34d 6826 return -1;
69edaa21
MH		 6827 }
6828 p->u.board.v_port = 1;
69edaa21
MH		 6829 break;
6830
6831 case MEM: /* memory address */
6832 if (p->type != BNODE) {
6833 dgap_err("memory address only vaild for boards");
cf42c34d 6834 return -1;
69edaa21
MH		 6835 }
6836 s = dgap_getword(in);
6837 if (s == NULL) {
6838 dgap_err("unexpected end of file");
cf42c34d 6839 return -1;
69edaa21
MH		 6840 }
6841 p->u.board.addrstr = dgap_savestring(s);
6842 p->u.board.addr = simple_strtoul(s, &s2, 0);
6843 if ((int)strlen(s) > (int)(s2 - s)) {
6844 dgap_err("bad number for memory address");
cf42c34d 6845 return -1;
69edaa21
MH		 6846 }
6847 p->u.board.v_addr = 1;
69edaa21
MH		 6848 break;
6849
6850 case PCIINFO: /* pci information */
6851 if (p->type != BNODE) {
6852 dgap_err("memory address only vaild for boards");
cf42c34d 6853 return -1;
69edaa21
MH		 6854 }
6855 s = dgap_getword(in);
6856 if (s == NULL) {
6857 dgap_err("unexpected end of file");
cf42c34d 6858 return -1;
69edaa21
MH		 6859 }
6860 p->u.board.pcibusstr = dgap_savestring(s);
6861 p->u.board.pcibus = simple_strtoul(s, &s2, 0);
6862 if ((int)strlen(s) > (int)(s2 - s)) {
6863 dgap_err("bad number for pci bus");
cf42c34d 6864 return -1;
69edaa21
MH		 6865 }
6866 p->u.board.v_pcibus = 1;
6867 s = dgap_getword(in);
6868 if (s == NULL) {
6869 dgap_err("unexpected end of file");
cf42c34d 6870 return -1;
69edaa21
MH		 6871 }
6872 p->u.board.pcislotstr = dgap_savestring(s);
6873 p->u.board.pcislot = simple_strtoul(s, &s2, 0);
6874 if ((int)strlen(s) > (int)(s2 - s)) {
6875 dgap_err("bad number for pci slot");
cf42c34d 6876 return -1;
69edaa21
MH		 6877 }
6878 p->u.board.v_pcislot = 1;
69edaa21
MH		 6879 break;
6880
6881 case METHOD:
6882 if (p->type != BNODE) {
6883 dgap_err("install method only vaild for boards");
cf42c34d 6884 return -1;
69edaa21
MH		 6885 }
6886 s = dgap_getword(in);
6887 if (s == NULL) {
6888 dgap_err("unexpected end of file");
cf42c34d 6889 return -1;
69edaa21
MH		 6890 }
6891 p->u.board.method = dgap_savestring(s);
6892 p->u.board.v_method = 1;
69edaa21
MH		 6893 break;
6894
6895 case STATUS:
6896 if (p->type != BNODE) {
6897 dgap_err("config status only vaild for boards");
cf42c34d 6898 return -1;
69edaa21
MH		 6899 }
6900 s = dgap_getword(in);
6901 if (s == NULL) {
6902 dgap_err("unexpected end of file");
cf42c34d 6903 return -1;
69edaa21
MH		 6904 }
6905 p->u.board.status = dgap_savestring(s);
69edaa21
MH		 6906 break;
6907
6908 case NPORTS: /* number of ports */
6909 if (p->type == BNODE) {
6910 s = dgap_getword(in);
6911 if (s == NULL) {
6912 dgap_err("unexpected end of file");
cf42c34d 6913 return -1;
69edaa21
MH		 6914 }
6915 p->u.board.nport = (char)simple_strtol(s, &s2, 0);
6916 if ((int)strlen(s) > (int)(s2 - s)) {
6917 dgap_err("bad number for number of ports");
cf42c34d 6918 return -1;
69edaa21
MH		 6919 }
6920 p->u.board.v_nport = 1;
6921 } else if (p->type == CNODE) {
6922 s = dgap_getword(in);
6923 if (s == NULL) {
6924 dgap_err("unexpected end of file");
cf42c34d 6925 return -1;
69edaa21
MH		 6926 }
6927 p->u.conc.nport = (char)simple_strtol(s, &s2, 0);
6928 if ((int)strlen(s) > (int)(s2 - s)) {
6929 dgap_err("bad number for number of ports");
cf42c34d 6930 return -1;
69edaa21
MH		 6931 }
6932 p->u.conc.v_nport = 1;
6933 } else if (p->type == MNODE) {
6934 s = dgap_getword(in);
6935 if (s == NULL) {
6936 dgap_err("unexpected end of file");
cf42c34d 6937 return -1;
69edaa21
MH		 6938 }
6939 p->u.module.nport = (char)simple_strtol(s, &s2, 0);
6940 if ((int)strlen(s) > (int)(s2 - s)) {
6941 dgap_err("bad number for number of ports");
cf42c34d 6942 return -1;
69edaa21
MH		 6943 }
6944 p->u.module.v_nport = 1;
6945 } else {
6946 dgap_err("nports only valid for concentrators or modules");
cf42c34d 6947 return -1;
69edaa21 6948 }
69edaa21
MH		 6949 break;
6950
6951 case ID: /* letter ID used in tty name */
6952 s = dgap_getword(in);
6953 if (s == NULL) {
6954 dgap_err("unexpected end of file");
cf42c34d 6955 return -1;
69edaa21
MH		 6956 }
6957
6958 p->u.board.status = dgap_savestring(s);
6959
6960 if (p->type == CNODE) {
6961 p->u.conc.id = dgap_savestring(s);
6962 p->u.conc.v_id = 1;
6963 } else if (p->type == MNODE) {
6964 p->u.module.id = dgap_savestring(s);
6965 p->u.module.v_id = 1;
6966 } else {
6967 dgap_err("id only valid for concentrators or modules");
cf42c34d 6968 return -1;
69edaa21 6969 }
69edaa21
MH		 6970 break;
6971
6972 case STARTO: /* start offset of ID */
6973 if (p->type == BNODE) {
6974 s = dgap_getword(in);
6975 if (s == NULL) {
6976 dgap_err("unexpected end of file");
cf42c34d 6977 return -1;
69edaa21
MH		 6978 }
6979 p->u.board.start = simple_strtol(s, &s2, 0);
6980 if ((int)strlen(s) > (int)(s2 - s)) {
6981 dgap_err("bad number for start of tty count");
cf42c34d 6982 return -1;
69edaa21
MH		 6983 }
6984 p->u.board.v_start = 1;
6985 } else if (p->type == CNODE) {
6986 s = dgap_getword(in);
6987 if (s == NULL) {
6988 dgap_err("unexpected end of file");
cf42c34d 6989 return -1;
69edaa21
MH		 6990 }
6991 p->u.conc.start = simple_strtol(s, &s2, 0);
6992 if ((int)strlen(s) > (int)(s2 - s)) {
6993 dgap_err("bad number for start of tty count");
cf42c34d 6994 return -1;
69edaa21
MH		 6995 }
6996 p->u.conc.v_start = 1;
6997 } else if (p->type == MNODE) {
6998 s = dgap_getword(in);
6999 if (s == NULL) {
7000 dgap_err("unexpected end of file");
cf42c34d 7001 return -1;
69edaa21
MH		 7002 }
7003 p->u.module.start = simple_strtol(s, &s2, 0);
7004 if ((int)strlen(s) > (int)(s2 - s)) {
7005 dgap_err("bad number for start of tty count");
cf42c34d 7006 return -1;
69edaa21
MH		 7007 }
7008 p->u.module.v_start = 1;
7009 } else {
7010 dgap_err("start only valid for concentrators or modules");
cf42c34d 7011 return -1;
69edaa21 7012 }
69edaa21
MH		 7013 break;
7014
7015 case TTYN: /* tty name prefix */
7016 if (dgap_checknode(p))
cf42c34d 7017 return -1;
d1c3c6f5
MH		 7018 p->next = dgap_newnode(TNODE);
7019 if (!p->next) {
69edaa21 7020 dgap_err("out of memory");
cf42c34d 7021 return -1;
69edaa21
MH		 7022 }
7023 p = p->next;
d1c3c6f5
MH		 7024 s = dgap_getword(in);
7025 if (!s) {
69edaa21 7026 dgap_err("unexpeced end of file");
cf42c34d 7027 return -1;
69edaa21 7028 }
d1c3c6f5
MH		 7029 p->u.ttyname = dgap_savestring(s);
7030 if (!p->u.ttyname) {
69edaa21 7031 dgap_err("out of memory");
cf42c34d 7032 return -1;
69edaa21 7033 }
69edaa21
MH		 7034 break;
7035
7036 case CU: /* cu name prefix */
7037 if (dgap_checknode(p))
cf42c34d 7038 return -1;
d1c3c6f5
MH		 7039 p->next = dgap_newnode(CUNODE);
7040 if (!p->next) {
69edaa21 7041 dgap_err("out of memory");
cf42c34d 7042 return -1;
69edaa21
MH		 7043 }
7044 p = p->next;
d1c3c6f5
MH		 7045 s = dgap_getword(in);
7046 if (!s) {
69edaa21 7047 dgap_err("unexpeced end of file");
cf42c34d 7048 return -1;
69edaa21 7049 }
d1c3c6f5
MH		 7050 p->u.cuname = dgap_savestring(s);
7051 if (!p->u.cuname) {
69edaa21 7052 dgap_err("out of memory");
cf42c34d 7053 return -1;
69edaa21 7054 }
69edaa21
MH		 7055 break;
7056
7057 case LINE: /* line information */
7058 if (dgap_checknode(p))
cf42c34d 7059 return -1;
69edaa21
MH		 7060 if (brd == NULL) {
7061 dgap_err("must specify board before line info");
cf42c34d 7062 return -1;
69edaa21
MH		 7063 }
7064 switch (brd->u.board.type) {
7065 case PPCM:
7066 dgap_err("line not vaild for PC/em");
cf42c34d 7067 return -1;
69edaa21 7068 }
d1c3c6f5
MH		 7069 p->next = dgap_newnode(LNODE);
7070 if (!p->next) {
69edaa21 7071 dgap_err("out of memory");
cf42c34d 7072 return -1;
69edaa21
MH		 7073 }
7074 p = p->next;
7075 conc = NULL;
7076 line = p;
7077 linecnt++;
69edaa21
MH		 7078 break;
7079
7080 case CONC: /* concentrator information */
7081 if (dgap_checknode(p))
cf42c34d 7082 return -1;
69edaa21
MH		 7083 if (line == NULL) {
7084 dgap_err("must specify line info before concentrator");
cf42c34d 7085 return -1;
69edaa21 7086 }
d1c3c6f5
MH		 7087 p->next = dgap_newnode(CNODE);
7088 if (!p->next) {
69edaa21 7089 dgap_err("out of memory");
cf42c34d 7090 return -1;
69edaa21
MH		 7091 }
7092 p = p->next;
7093 conc = p;
7094 if (linecnt)
7095 brd->u.board.conc2++;
7096 else
7097 brd->u.board.conc1++;
7098
69edaa21
MH		 7099 break;
7100
7101 case CX: /* c/x type concentrator */
7102 if (p->type != CNODE) {
7103 dgap_err("cx only valid for concentrators");
cf42c34d 7104 return -1;
69edaa21
MH		 7105 }
7106 p->u.conc.type = CX;
7107 p->u.conc.v_type = 1;
69edaa21
MH		 7108 break;
7109
7110 case EPC: /* epc type concentrator */
7111 if (p->type != CNODE) {
7112 dgap_err("cx only valid for concentrators");
cf42c34d 7113 return -1;
69edaa21
MH		 7114 }
7115 p->u.conc.type = EPC;
7116 p->u.conc.v_type = 1;
69edaa21
MH		 7117 break;
7118
7119 case MOD: /* EBI module */
7120 if (dgap_checknode(p))
cf42c34d 7121 return -1;
69edaa21
MH		 7122 if (brd == NULL) {
7123 dgap_err("must specify board info before EBI modules");
cf42c34d 7124 return -1;
69edaa21
MH		 7125 }
7126 switch (brd->u.board.type) {
7127 case PPCM:
7128 linecnt = 0;
7129 break;
7130 default:
7131 if (conc == NULL) {
7132 dgap_err("must specify concentrator info before EBI module");
cf42c34d 7133 return -1;
69edaa21
MH		 7134 }
7135 }
d1c3c6f5
MH		 7136 p->next = dgap_newnode(MNODE);
7137 if (!p->next) {
69edaa21 7138 dgap_err("out of memory");
cf42c34d 7139 return -1;
69edaa21
MH		 7140 }
7141 p = p->next;
7142 if (linecnt)
7143 brd->u.board.module2++;
7144 else
7145 brd->u.board.module1++;
7146
69edaa21
MH		 7147 break;
7148
7149 case PORTS: /* ports type EBI module */
7150 if (p->type != MNODE) {
7151 dgap_err("ports only valid for EBI modules");
cf42c34d 7152 return -1;
69edaa21
MH		 7153 }
7154 p->u.module.type = PORTS;
7155 p->u.module.v_type = 1;
69edaa21
MH		 7156 break;
7157
7158 case MODEM: /* ports type EBI module */
7159 if (p->type != MNODE) {
7160 dgap_err("modem only valid for modem modules");
cf42c34d 7161 return -1;
69edaa21
MH		 7162 }
7163 p->u.module.type = MODEM;
7164 p->u.module.v_type = 1;
69edaa21
MH		 7165 break;
7166
7167 case CABLE:
7168 if (p->type == LNODE) {
d1c3c6f5
MH		 7169 s = dgap_getword(in);
7170 if (!s) {
69edaa21 7171 dgap_err("unexpected end of file");
cf42c34d 7172 return -1;
69edaa21
MH		 7173 }
7174 p->u.line.cable = dgap_savestring(s);
7175 p->u.line.v_cable = 1;
7176 }
69edaa21
MH		 7177 break;
7178
7179 case SPEED: /* sync line speed indication */
7180 if (p->type == LNODE) {
7181 s = dgap_getword(in);
7182 if (s == NULL) {
7183 dgap_err("unexpected end of file");
cf42c34d 7184 return -1;
69edaa21
MH		 7185 }
7186 p->u.line.speed = (char)simple_strtol(s, &s2, 0);
7187 if ((short)strlen(s) > (short)(s2 - s)) {
7188 dgap_err("bad number for line speed");
cf42c34d 7189 return -1;
69edaa21
MH		 7190 }
7191 p->u.line.v_speed = 1;
7192 } else if (p->type == CNODE) {
7193 s = dgap_getword(in);
7194 if (s == NULL) {
7195 dgap_err("unexpected end of file");
cf42c34d 7196 return -1;
69edaa21
MH		 7197 }
7198 p->u.conc.speed = (char)simple_strtol(s, &s2, 0);
7199 if ((short)strlen(s) > (short)(s2 - s)) {
7200 dgap_err("bad number for line speed");
cf42c34d 7201 return -1;
69edaa21
MH		 7202 }
7203 p->u.conc.v_speed = 1;
7204 } else {
7205 dgap_err("speed valid only for lines or concentrators.");
cf42c34d 7206 return -1;
69edaa21 7207 }
69edaa21
MH		 7208 break;
7209
7210 case CONNECT:
7211 if (p->type == CNODE) {
d1c3c6f5
MH		 7212 s = dgap_getword(in);
7213 if (!s) {
69edaa21 7214 dgap_err("unexpected end of file");
cf42c34d 7215 return -1;
69edaa21
MH		 7216 }
7217 p->u.conc.connect = dgap_savestring(s);
7218 p->u.conc.v_connect = 1;
7219 }
69edaa21
MH		 7220 break;
7221 case PRINT: /* transparent print name prefix */
7222 if (dgap_checknode(p))
cf42c34d 7223 return -1;
d1c3c6f5
MH		 7224 p->next = dgap_newnode(PNODE);
7225 if (!p->next) {
69edaa21 7226 dgap_err("out of memory");
cf42c34d 7227 return -1;
69edaa21
MH		 7228 }
7229 p = p->next;
d1c3c6f5
MH		 7230 s = dgap_getword(in);
7231 if (!s) {
69edaa21 7232 dgap_err("unexpeced end of file");
cf42c34d 7233 return -1;
69edaa21 7234 }
d1c3c6f5
MH		 7235 p->u.printname = dgap_savestring(s);
7236 if (!p->u.printname) {
69edaa21 7237 dgap_err("out of memory");
cf42c34d 7238 return -1;
69edaa21 7239 }
69edaa21
MH		 7240 break;
7241
7242 case CMAJOR: /* major number */
7243 if (dgap_checknode(p))
cf42c34d 7244 return -1;
d1c3c6f5
MH		 7245 p->next = dgap_newnode(JNODE);
7246 if (!p->next) {
69edaa21 7247 dgap_err("out of memory");
cf42c34d 7248 return -1;
69edaa21
MH		 7249 }
7250 p = p->next;
7251 s = dgap_getword(in);
7252 if (s == NULL) {
7253 dgap_err("unexpected end of file");
cf42c34d 7254 return -1;
69edaa21
MH		 7255 }
7256 p->u.majornumber = simple_strtol(s, &s2, 0);
7257 if ((int)strlen(s) > (int)(s2 - s)) {
7258 dgap_err("bad number for major number");
cf42c34d 7259 return -1;
69edaa21 7260 }
69edaa21
MH		 7261 break;
7262
7263 case ALTPIN: /* altpin setting */
7264 if (dgap_checknode(p))
cf42c34d 7265 return -1;
d1c3c6f5
MH		 7266 p->next = dgap_newnode(ANODE);
7267 if (!p->next) {
69edaa21 7268 dgap_err("out of memory");
cf42c34d 7269 return -1;
69edaa21
MH		 7270 }
7271 p = p->next;
7272 s = dgap_getword(in);
7273 if (s == NULL) {
7274 dgap_err("unexpected end of file");
cf42c34d 7275 return -1;
69edaa21
MH		 7276 }
7277 p->u.altpin = simple_strtol(s, &s2, 0);
7278 if ((int)strlen(s) > (int)(s2 - s)) {
7279 dgap_err("bad number for altpin");
cf42c34d 7280 return -1;
69edaa21 7281 }
69edaa21
MH		 7282 break;
7283
7284 case USEINTR: /* enable interrupt setting */
7285 if (dgap_checknode(p))
cf42c34d 7286 return -1;
d1c3c6f5
MH		 7287 p->next = dgap_newnode(INTRNODE);
7288 if (!p->next) {
69edaa21 7289 dgap_err("out of memory");
cf42c34d 7290 return -1;
69edaa21
MH		 7291 }
7292 p = p->next;
7293 s = dgap_getword(in);
7294 if (s == NULL) {
7295 dgap_err("unexpected end of file");
cf42c34d 7296 return -1;
69edaa21
MH		 7297 }
7298 p->u.useintr = simple_strtol(s, &s2, 0);
7299 if ((int)strlen(s) > (int)(s2 - s)) {
7300 dgap_err("bad number for useintr");
cf42c34d 7301 return -1;
69edaa21 7302 }
69edaa21
MH		 7303 break;
7304
7305 case TTSIZ: /* size of tty structure */
7306 if (dgap_checknode(p))
cf42c34d 7307 return -1;
d1c3c6f5
MH		 7308 p->next = dgap_newnode(TSNODE);
7309 if (!p->next) {
69edaa21 7310 dgap_err("out of memory");
cf42c34d 7311 return -1;
69edaa21
MH		 7312 }
7313 p = p->next;
7314 s = dgap_getword(in);
7315 if (s == NULL) {
7316 dgap_err("unexpected end of file");
cf42c34d 7317 return -1;
69edaa21
MH		 7318 }
7319 p->u.ttysize = simple_strtol(s, &s2, 0);
7320 if ((int)strlen(s) > (int)(s2 - s)) {
7321 dgap_err("bad number for ttysize");
cf42c34d 7322 return -1;
69edaa21 7323 }
69edaa21
MH		 7324 break;
7325
7326 case CHSIZ: /* channel structure size */
7327 if (dgap_checknode(p))
cf42c34d 7328 return -1;
d1c3c6f5
MH		 7329 p->next = dgap_newnode(CSNODE);
7330 if (!p->next) {
69edaa21 7331 dgap_err("out of memory");
cf42c34d 7332 return -1;
69edaa21
MH		 7333 }
7334 p = p->next;
7335 s = dgap_getword(in);
7336 if (s == NULL) {
7337 dgap_err("unexpected end of file");
cf42c34d 7338 return -1;
69edaa21
MH		 7339 }
7340 p->u.chsize = simple_strtol(s, &s2, 0);
7341 if ((int)strlen(s) > (int)(s2 - s)) {
7342 dgap_err("bad number for chsize");
cf42c34d 7343 return -1;
69edaa21 7344 }
69edaa21
MH		 7345 break;
7346
7347 case BSSIZ: /* board structure size */
7348 if (dgap_checknode(p))
cf42c34d 7349 return -1;
d1c3c6f5
MH		 7350 p->next = dgap_newnode(BSNODE);
7351 if (!p->next) {
69edaa21 7352 dgap_err("out of memory");
cf42c34d 7353 return -1;
69edaa21
MH		 7354 }
7355 p = p->next;
7356 s = dgap_getword(in);
7357 if (s == NULL) {
7358 dgap_err("unexpected end of file");
cf42c34d 7359 return -1;
69edaa21
MH		 7360 }
7361 p->u.bssize = simple_strtol(s, &s2, 0);
7362 if ((int)strlen(s) > (int)(s2 - s)) {
7363 dgap_err("bad number for bssize");
cf42c34d 7364 return -1;
69edaa21 7365 }
69edaa21
MH		 7366 break;
7367
7368 case UNTSIZ: /* sched structure size */
7369 if (dgap_checknode(p))
cf42c34d 7370 return -1;
d1c3c6f5
MH		 7371 p->next = dgap_newnode(USNODE);
7372 if (!p->next) {
69edaa21 7373 dgap_err("out of memory");
cf42c34d 7374 return -1;
69edaa21
MH		 7375 }
7376 p = p->next;
7377 s = dgap_getword(in);
7378 if (s == NULL) {
7379 dgap_err("unexpected end of file");
cf42c34d 7380 return -1;
69edaa21
MH		 7381 }
7382 p->u.unsize = simple_strtol(s, &s2, 0);
7383 if ((int)strlen(s) > (int)(s2 - s)) {
7384 dgap_err("bad number for schedsize");
cf42c34d 7385 return -1;
69edaa21 7386 }
69edaa21
MH		 7387 break;
7388
7389 case F2SIZ: /* f2200 structure size */
7390 if (dgap_checknode(p))
cf42c34d 7391 return -1;
d1c3c6f5
MH		 7392 p->next = dgap_newnode(FSNODE);
7393 if (!p->next) {
69edaa21 7394 dgap_err("out of memory");
cf42c34d 7395 return -1;
69edaa21
MH		 7396 }
7397 p = p->next;
7398 s = dgap_getword(in);
7399 if (s == NULL) {
7400 dgap_err("unexpected end of file");
cf42c34d 7401 return -1;
69edaa21
MH		 7402 }
7403 p->u.f2size = simple_strtol(s, &s2, 0);
7404 if ((int)strlen(s) > (int)(s2 - s)) {
7405 dgap_err("bad number for f2200size");
cf42c34d 7406 return -1;
69edaa21 7407 }
69edaa21
MH		 7408 break;
7409
7410 case VPSIZ: /* vpix structure size */
7411 if (dgap_checknode(p))
cf42c34d 7412 return -1;
d1c3c6f5
MH		 7413 p->next = dgap_newnode(VSNODE);
7414 if (!p->next) {
69edaa21 7415 dgap_err("out of memory");
cf42c34d 7416 return -1;
69edaa21
MH		 7417 }
7418 p = p->next;
7419 s = dgap_getword(in);
7420 if (s == NULL) {
7421 dgap_err("unexpected end of file");
cf42c34d 7422 return -1;
69edaa21
MH		 7423 }
7424 p->u.vpixsize = simple_strtol(s, &s2, 0);
7425 if ((int)strlen(s) > (int)(s2 - s)) {
7426 dgap_err("bad number for vpixsize");
cf42c34d 7427 return -1;
69edaa21 7428 }
69edaa21
MH		 7429 break;
7430 }
7431 }
7432}
7433
69edaa21
MH		 7434/*
7435 * dgap_sindex: much like index(), but it looks for a match of any character in
7436 * the group, and returns that position. If the first character is a ^, then
7437 * this will match the first occurrence not in that group.
7438 */
9b073ac5 7439static char *dgap_sindex(char *string, char *group)
69edaa21
MH		 7440{
7441 char *ptr;
7442
7443 if (!string || !group)
7444 return (char *) NULL;
7445
7446 if (*group == '^') {
7447 group++;
7448 for (; *string; string++) {
7449 for (ptr = group; *ptr; ptr++) {
7450 if (*ptr == *string)
7451 break;
7452 }
7453 if (*ptr == '\0')
7454 return string;
7455 }
305ec874 7456 } else {
69edaa21
MH		 7457 for (; *string; string++) {
7458 for (ptr = group; *ptr; ptr++) {
7459 if (*ptr == *string)
7460 return string;
7461 }
7462 }
7463 }
7464
7465 return (char *) NULL;
7466}
7467
69edaa21
MH		 7468/*
7469 * Get a token from the input file; return 0 if end of file is reached
7470 */
7471static int dgap_gettok(char **in, struct cnode *p)
7472{
7473 char *w;
7474 struct toklist *t;
7475
7476 if (strstr(dgap_cword, "boar")) {
7477 w = dgap_getword(in);
7478 snprintf(dgap_cword, MAXCWORD, "%s", w);
7479 for (t = dgap_tlist; t->token != 0; t++) {
b115b024 7480 if (!strcmp(w, t->string))
cf42c34d 7481 return t->token;
69edaa21
MH		 7482 }
7483 dgap_err("board !!type not specified");
cf42c34d 7484 return 1;
305ec874 7485 } else {
9b073ac5 7486 while ((w = dgap_getword(in))) {
69edaa21
MH		 7487 snprintf(dgap_cword, MAXCWORD, "%s", w);
7488 for (t = dgap_tlist; t->token != 0; t++) {
b115b024 7489 if (!strcmp(w, t->string))
cf42c34d 7490 return t->token;
69edaa21
MH		 7491 }
7492 }
cf42c34d 7493 return 0;
69edaa21
MH		 7494 }
7495}
7496
69edaa21
MH		 7497/*
7498 * get a word from the input stream, also keep track of current line number.
7499 * words are separated by whitespace.
7500 */
7501static char *dgap_getword(char **in)
7502{
7503 char *ret_ptr = *in;
7504
7d6069d7 7505 char *ptr = dgap_sindex(*in, " \t\n");
69edaa21
MH		 7506
7507 /* If no word found, return null */
7508 if (!ptr)
7509 return NULL;
7510
7511 /* Mark new location for our buffer */
7512 *ptr = '\0';
7513 *in = ptr + 1;
7514
7515 /* Eat any extra spaces/tabs/newlines that might be present */
7516 while (*in && **in && ((**in == ' ') || (**in == '\t') || (**in == '\n'))) {
7517 **in = '\0';
7518 *in = *in + 1;
7519 }
7520
7521 return ret_ptr;
7522}
7523
69edaa21
MH		 7524/*
7525 * print an error message, giving the line number in the file where
7526 * the error occurred.
7527 */
7528static void dgap_err(char *s)
7529{
8cbb5e3f 7530 pr_err("dgap: parse: %s\n", s);
69edaa21
MH		 7531}
7532
69edaa21
MH		 7533/*
7534 * allocate a new configuration node of type t
7535 */
7536static struct cnode *dgap_newnode(int t)
7537{
7538 struct cnode *n;
7539
7540 n = kmalloc(sizeof(struct cnode), GFP_ATOMIC);
7541 if (n != NULL) {
7542 memset((char *)n, 0, sizeof(struct cnode));
7543 n->type = t;
7544 }
cf42c34d 7545 return n;
69edaa21
MH		 7546}
7547
69edaa21
MH		 7548/*
7549 * dgap_checknode: see if all the necessary info has been supplied for a node
7550 * before creating the next node.
7551 */
7552static int dgap_checknode(struct cnode *p)
7553{
7554 switch (p->type) {
7555 case BNODE:
7556 if (p->u.board.v_type == 0) {
7557 dgap_err("board type !not specified");
cf42c34d 7558 return 1;
69edaa21
MH		 7559 }
7560
cf42c34d 7561 return 0;
69edaa21
MH		 7562
7563 case LNODE:
7564 if (p->u.line.v_speed == 0) {
7565 dgap_err("line speed not specified");
cf42c34d 7566 return 1;
69edaa21 7567 }
cf42c34d 7568 return 0;
69edaa21
MH		 7569
7570 case CNODE:
7571 if (p->u.conc.v_type == 0) {
7572 dgap_err("concentrator type not specified");
cf42c34d 7573 return 1;
69edaa21
MH		 7574 }
7575 if (p->u.conc.v_speed == 0) {
7576 dgap_err("concentrator line speed not specified");
cf42c34d 7577 return 1;
69edaa21
MH		 7578 }
7579 if (p->u.conc.v_nport == 0) {
7580 dgap_err("number of ports on concentrator not specified");
cf42c34d 7581 return 1;
69edaa21
MH		 7582 }
7583 if (p->u.conc.v_id == 0) {
7584 dgap_err("concentrator id letter not specified");
cf42c34d 7585 return 1;
69edaa21 7586 }
cf42c34d 7587 return 0;
69edaa21
MH		 7588
7589 case MNODE:
7590 if (p->u.module.v_type == 0) {
7591 dgap_err("EBI module type not specified");
cf42c34d 7592 return 1;
69edaa21
MH		 7593 }
7594 if (p->u.module.v_nport == 0) {
7595 dgap_err("number of ports on EBI module not specified");
cf42c34d 7596 return 1;
69edaa21
MH		 7597 }
7598 if (p->u.module.v_id == 0) {
7599 dgap_err("EBI module id letter not specified");
cf42c34d 7600 return 1;
69edaa21 7601 }
cf42c34d 7602 return 0;
69edaa21 7603 }
cf42c34d 7604 return 0;
69edaa21
MH		 7605}
7606
7607/*
7608 * save a string somewhere
7609 */
7610static char *dgap_savestring(char *s)
7611{
7612 char *p;
305ec874
MH		 7613
7614 p = kmalloc(strlen(s) + 1, GFP_ATOMIC);
7615 if (p)
69edaa21 7616 strcpy(p, s);
cf42c34d 7617 return p;
69edaa21
MH		 7618}
7619
69edaa21
MH		 7620/*
7621 * Given a board pointer, returns whether we should use interrupts or not.
7622 */
fe0ef8e6 7623static uint dgap_config_get_useintr(struct board_t *bd)
69edaa21
MH		 7624{
7625 struct cnode *p = NULL;
7626
7627 if (!bd)
cf42c34d 7628 return 0;
69edaa21
MH		 7629
7630 for (p = bd->bd_config; p; p = p->next) {
7631 switch (p->type) {
7632 case INTRNODE:
7633 /*
7634 * check for pcxr types.
7635 */
7636 return p->u.useintr;
7637 default:
7638 break;
7639 }
7640 }
7641
7642 /* If not found, then don't turn on interrupts. */
7643 return 0;
7644}
7645
69edaa21
MH		 7646/*
7647 * Given a board pointer, returns whether we turn on altpin or not.
7648 */
fe0ef8e6 7649static uint dgap_config_get_altpin(struct board_t *bd)
69edaa21
MH		 7650{
7651 struct cnode *p = NULL;
7652
7653 if (!bd)
cf42c34d 7654 return 0;
69edaa21
MH		 7655
7656 for (p = bd->bd_config; p; p = p->next) {
7657 switch (p->type) {
7658 case ANODE:
7659 /*
7660 * check for pcxr types.
7661 */
7662 return p->u.altpin;
7663 default:
7664 break;
7665 }
7666 }
7667
7668 /* If not found, then don't turn on interrupts. */
7669 return 0;
7670}
7671
69edaa21
MH		 7672/*
7673 * Given a specific type of board, if found, detached link and
7674 * returns the first occurrence in the list.
7675 */
fe0ef8e6 7676static struct cnode *dgap_find_config(int type, int bus, int slot)
69edaa21
MH		 7677{
7678 struct cnode *p, *prev = NULL, *prev2 = NULL, *found = NULL;
7679
7680 p = &dgap_head;
7681
7682 while (p->next != NULL) {
7683 prev = p;
7684 p = p->next;
7685
7686 if (p->type == BNODE) {
7687
7688 if (p->u.board.type == type) {
7689
305ec874
MH		 7690 if (p->u.board.v_pcibus &&
7691 p->u.board.pcibus != bus)
69edaa21 7692 continue;
305ec874
MH		 7693 if (p->u.board.v_pcislot &&
7694 p->u.board.pcislot != slot)
69edaa21 7695 continue;
69edaa21 7696
69edaa21
MH		 7697 found = p;
7698 /*
7699 * Keep walking thru the list till we find the next board.
7700 */
7701 while (p->next != NULL) {
7702 prev2 = p;
7703 p = p->next;
7704 if (p->type == BNODE) {
7705
7706 /*
7707 * Mark the end of our 1 board chain of configs.
7708 */
7709 prev2->next = NULL;
7710
7711 /*
7712 * Link the "next" board to the previous board,
7713 * effectively "unlinking" our board from the main config.
7714 */
7715 prev->next = p;
7716
7717 return found;
7718 }
7719 }
7720 /*
7721 * It must be the last board in the list.
7722 */
7723 prev->next = NULL;
7724 return found;
7725 }
7726 }
7727 }
7728 return NULL;
7729}
7730
7731/*
7732 * Given a board pointer, walks the config link, counting up
7733 * all ports user specified should be on the board.
7734 * (This does NOT mean they are all actually present right now tho)
7735 */
fe0ef8e6 7736static uint dgap_config_get_number_of_ports(struct board_t *bd)
69edaa21
MH		 7737{
7738 int count = 0;
7739 struct cnode *p = NULL;
7740
7741 if (!bd)
cf42c34d 7742 return 0;
69edaa21
MH		 7743
7744 for (p = bd->bd_config; p; p = p->next) {
7745
7746 switch (p->type) {
7747 case BNODE:
7748 /*
7749 * check for pcxr types.
7750 */
7751 if (p->u.board.type > EPCFE)
7752 count += p->u.board.nport;
7753 break;
7754 case CNODE:
7755 count += p->u.conc.nport;
7756 break;
7757 case MNODE:
7758 count += p->u.module.nport;
7759 break;
7760 }
7761 }
cf42c34d 7762 return count;
69edaa21
MH		 7763}
7764
fe0ef8e6 7765static char *dgap_create_config_string(struct board_t *bd, char *string)
69edaa21
MH		 7766{
7767 char *ptr = string;
7768 struct cnode *p = NULL;
7769 struct cnode *q = NULL;
7770 int speed;
7771
7772 if (!bd) {
7773 *ptr = 0xff;
7774 return string;
7775 }
7776
7777 for (p = bd->bd_config; p; p = p->next) {
7778
7779 switch (p->type) {
7780 case LNODE:
7781 *ptr = '\0';
7782 ptr++;
7783 *ptr = p->u.line.speed;
7784 ptr++;
7785 break;
7786 case CNODE:
7787 /*
7788 * Because the EPC/con concentrators can have EM modules
7789 * hanging off of them, we have to walk ahead in the list
7790 * and keep adding the number of ports on each EM to the config.
7791 * UGH!
7792 */
7793 speed = p->u.conc.speed;
7794 q = p->next;
b115b024 7795 if ((q != NULL) && (q->type == MNODE)) {
69edaa21
MH		 7796 *ptr = (p->u.conc.nport + 0x80);
7797 ptr++;
7798 p = q;
7799 while ((q->next != NULL) && (q->next->type) == MNODE) {
7800 *ptr = (q->u.module.nport + 0x80);
7801 ptr++;
7802 p = q;
7803 q = q->next;
7804 }
7805 *ptr = q->u.module.nport;
7806 ptr++;
7807 } else {
7808 *ptr = p->u.conc.nport;
7809 ptr++;
7810 }
7811
7812 *ptr = speed;
7813 ptr++;
7814 break;
7815 }
7816 }
7817
7818 *ptr = 0xff;
7819 return string;
7820}
Linux kernel - Deliverables
This page took 0.472024 seconds and 5 git commands to generate.