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d42bffb8 MM |
1 | #include <media/v4l2-dev.h> |
2 | #include <media/videobuf-core.h> | |
3 | #include <media/v4l2-ioctl.h> | |
4 | #include <linux/pci.h> | |
5 | #include <linux/version.h> | |
6 | #include <linux/stringify.h> | |
7ec21181 | 7 | #include <linux/delay.h> |
d42bffb8 MM |
8 | #include <media/videobuf-dma-contig.h> |
9 | #include <linux/kthread.h> | |
10 | ||
11 | #include "dt3155v4l.h" | |
12 | #include "dt3155-bufs.h" | |
13 | ||
14 | #define DT3155_VENDOR_ID 0x8086 | |
15 | #define DT3155_DEVICE_ID 0x1223 | |
16 | ||
17 | /* global initializers (for all boards) */ | |
18 | #ifdef CONFIG_DT3155_CCIR | |
19 | static const u8 csr2_init = VT_50HZ; | |
20 | #define DT3155_CURRENT_NORM V4L2_STD_625_50 | |
21 | static const unsigned int img_width = 768; | |
22 | static const unsigned int img_height = 576; | |
23 | static const unsigned int frames_per_sec = 25; | |
24 | static const struct v4l2_fmtdesc frame_std[] = { | |
25 | { | |
26 | .index = 0, | |
27 | .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
28 | .flags = 0, | |
29 | .description = "CCIR/50Hz 8 bits gray", | |
30 | .pixelformat = V4L2_PIX_FMT_GREY, | |
31 | }, | |
32 | }; | |
33 | #else | |
34 | static const u8 csr2_init = VT_60HZ; | |
35 | #define DT3155_CURRENT_NORM V4L2_STD_525_60 | |
36 | static const unsigned int img_width = 640; | |
37 | static const unsigned int img_height = 480; | |
38 | static const unsigned int frames_per_sec = 30; | |
39 | static const struct v4l2_fmtdesc frame_std[] = { | |
40 | { | |
41 | .index = 0, | |
42 | .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
43 | .flags = 0, | |
44 | .description = "RS-170/60Hz 8 bits gray", | |
45 | .pixelformat = V4L2_PIX_FMT_GREY, | |
46 | }, | |
47 | }; | |
48 | #endif | |
49 | ||
50 | #define NUM_OF_FORMATS ARRAY_SIZE(frame_std) | |
51 | ||
52 | static u8 config_init = ACQ_MODE_EVEN; | |
53 | ||
54 | /** | |
55 | * read_i2c_reg - reads an internal i2c register | |
56 | * | |
57 | * @addr: dt3155 mmio base address | |
58 | * @index: index (internal address) of register to read | |
59 | * @data: pointer to byte the read data will be placed in | |
60 | * | |
61 | * returns: zero on success or error code | |
62 | * | |
63 | * This function starts reading the specified (by index) register | |
64 | * and busy waits for the process to finish. The result is placed | |
65 | * in a byte pointed by data. | |
66 | */ | |
67 | static int | |
68 | read_i2c_reg(void *addr, u8 index, u8 *data) | |
69 | { | |
70 | u32 tmp = index; | |
71 | ||
72 | iowrite32((tmp<<17) | IIC_READ, addr + IIC_CSR2); | |
73 | mmiowb(); | |
74 | udelay(45); /* wait at least 43 usec for NEW_CYCLE to clear */ | |
75 | if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) { | |
76 | /* error: NEW_CYCLE not cleared */ | |
77 | printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n"); | |
78 | return -EIO; | |
79 | } | |
80 | tmp = ioread32(addr + IIC_CSR1); | |
81 | if (tmp & DIRECT_ABORT) { | |
82 | /* error: DIRECT_ABORT set */ | |
83 | printk(KERN_ERR "dt3155: DIRECT_ABORT set\n"); | |
84 | /* reset DIRECT_ABORT bit */ | |
85 | iowrite32(DIRECT_ABORT, addr + IIC_CSR1); | |
86 | return -EIO; | |
87 | } | |
88 | *data = tmp>>24; | |
89 | return 0; | |
90 | } | |
91 | ||
92 | /** | |
93 | * write_i2c_reg - writes to an internal i2c register | |
94 | * | |
95 | * @addr: dt3155 mmio base address | |
96 | * @index: index (internal address) of register to read | |
97 | * @data: data to be written | |
98 | * | |
99 | * returns: zero on success or error code | |
100 | * | |
101 | * This function starts writting the specified (by index) register | |
102 | * and busy waits for the process to finish. | |
103 | */ | |
104 | static int | |
105 | write_i2c_reg(void *addr, u8 index, u8 data) | |
106 | { | |
107 | u32 tmp = index; | |
108 | ||
109 | iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2); | |
110 | mmiowb(); | |
111 | udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */ | |
112 | if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) { | |
113 | /* error: NEW_CYCLE not cleared */ | |
114 | printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n"); | |
115 | return -EIO; | |
116 | } | |
117 | if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) { | |
118 | /* error: DIRECT_ABORT set */ | |
119 | printk(KERN_ERR "dt3155: DIRECT_ABORT set\n"); | |
120 | /* reset DIRECT_ABORT bit */ | |
121 | iowrite32(DIRECT_ABORT, addr + IIC_CSR1); | |
122 | return -EIO; | |
123 | } | |
124 | return 0; | |
125 | } | |
126 | ||
127 | /** | |
128 | * write_i2c_reg_nowait - writes to an internal i2c register | |
129 | * | |
130 | * @addr: dt3155 mmio base address | |
131 | * @index: index (internal address) of register to read | |
132 | * @data: data to be written | |
133 | * | |
134 | * This function starts writting the specified (by index) register | |
135 | * and then returns. | |
136 | */ | |
137 | void | |
138 | write_i2c_reg_nowait(void *addr, u8 index, u8 data) | |
139 | { | |
140 | u32 tmp = index; | |
141 | ||
142 | iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2); | |
143 | mmiowb(); | |
144 | } | |
145 | ||
146 | /** | |
147 | * wait_i2c_reg - waits the read/write to finish | |
148 | * | |
149 | * @addr: dt3155 mmio base address | |
150 | * | |
151 | * returns: zero on success or error code | |
152 | * | |
153 | * This function waits reading/writting to finish. | |
154 | */ | |
155 | static int | |
156 | wait_i2c_reg(void *addr) | |
157 | { | |
158 | if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) | |
159 | udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */ | |
160 | if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) { | |
161 | /* error: NEW_CYCLE not cleared */ | |
162 | printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n"); | |
163 | return -EIO; | |
164 | } | |
165 | if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) { | |
166 | /* error: DIRECT_ABORT set */ | |
167 | printk(KERN_ERR "dt3155: DIRECT_ABORT set\n"); | |
168 | /* reset DIRECT_ABORT bit */ | |
169 | iowrite32(DIRECT_ABORT, addr + IIC_CSR1); | |
170 | return -EIO; | |
171 | } | |
172 | return 0; | |
173 | } | |
174 | ||
175 | /* | |
176 | * global pointers to a list of 4MB chunks reserved at driver | |
177 | * load, broken down to contiguous buffers of 768 * 576 bytes | |
178 | * each to form a pool of buffers for allocations | |
179 | * FIXME: add spinlock to protect moves between alloc/free lists | |
180 | */ | |
181 | static struct dt3155_fifo *dt3155_chunks; /* list of 4MB chuncks */ | |
182 | static struct dt3155_fifo *dt3155_free_bufs; /* list of free buffers */ | |
183 | static struct dt3155_fifo *dt3155_alloc_bufs; /* list of allocated buffers */ | |
184 | ||
185 | /* same as in <drivers/media/video/videobuf-dma-contig.c> */ | |
186 | struct videobuf_dma_contig_memory { | |
187 | u32 magic; | |
188 | void *vaddr; | |
189 | dma_addr_t dma_handle; | |
190 | unsigned long size; | |
191 | int is_userptr; | |
192 | }; | |
193 | ||
194 | #define MAGIC_DC_MEM 0x0733ac61 | |
195 | #define MAGIC_CHECK(is, should) \ | |
196 | if (unlikely((is) != (should))) { \ | |
197 | pr_err("magic mismatch: %x expected %x\n", (is), (should)); \ | |
198 | BUG(); \ | |
199 | } | |
200 | ||
201 | /* helper functions to allocate/free buffers from the pool */ | |
202 | static void * | |
203 | dt3155_alloc_buffer(struct device *dev, size_t size, dma_addr_t *dma_handle, | |
204 | gfp_t flag) | |
205 | { | |
206 | struct dt3155_buf *buf; | |
207 | ||
208 | if (size > DT3155_BUF_SIZE) | |
209 | return NULL; | |
210 | size = DT3155_BUF_SIZE; /* same for CCIR & RS-170 */ | |
211 | buf = dt3155_get_buf(dt3155_free_bufs); | |
212 | if (!buf) | |
213 | return NULL; | |
214 | buf->dma = dma_map_single(dev, buf->cpu, size, DMA_FROM_DEVICE); | |
215 | if (dma_mapping_error(dev, buf->dma)) { | |
216 | dt3155_put_buf(buf, dt3155_free_bufs); | |
217 | return NULL; | |
218 | } | |
219 | dt3155_put_buf(buf, dt3155_alloc_bufs); | |
220 | *dma_handle = buf->dma; | |
221 | return buf->cpu; | |
222 | } | |
223 | ||
224 | static void | |
225 | dt3155_free_buffer(struct device *dev, size_t size, void *cpu_addr, | |
226 | dma_addr_t dma_handle) | |
227 | { | |
228 | struct dt3155_buf *buf, *last; | |
229 | int found = 0; | |
230 | ||
231 | if (!cpu_addr) /* to free NULL is OK */ | |
232 | return; | |
233 | last = dt3155_get_buf(dt3155_alloc_bufs); | |
234 | if (!last) { | |
235 | printk(KERN_ERR "dt3155: %s(): no alloc buffers\n", __func__); | |
236 | return; | |
237 | } | |
238 | dt3155_put_buf(last, dt3155_alloc_bufs); | |
239 | do { | |
240 | buf = dt3155_get_buf(dt3155_alloc_bufs); | |
241 | if (buf->cpu == cpu_addr && buf->dma == dma_handle) { | |
242 | found = 1; | |
243 | break; | |
244 | } | |
245 | dt3155_put_buf(buf, dt3155_alloc_bufs); | |
246 | } while (buf != last); | |
247 | if (!found) { | |
248 | printk(KERN_ERR "dt3155: %s(): buffer not found\n", __func__); | |
249 | return; | |
250 | } | |
251 | size = DT3155_BUF_SIZE; /* same for CCIR & RS-170 */ | |
252 | dma_unmap_single(dev, dma_handle, size, DMA_FROM_DEVICE); | |
253 | dt3155_put_buf(buf, dt3155_free_bufs); | |
254 | } | |
255 | ||
256 | /* same as videobuf_dma_contig_user_get() */ | |
257 | static int | |
258 | dt3155_dma_contig_user_get(struct videobuf_dma_contig_memory *mem, | |
259 | struct videobuf_buffer *vb) | |
260 | { | |
261 | struct mm_struct *mm = current->mm; | |
262 | struct vm_area_struct *vma; | |
263 | unsigned long prev_pfn, this_pfn; | |
264 | unsigned long pages_done, user_address; | |
265 | int ret; | |
266 | ||
267 | mem->size = PAGE_ALIGN(vb->size); | |
268 | mem->is_userptr = 0; | |
269 | ret = -EINVAL; | |
270 | ||
271 | down_read(&mm->mmap_sem); | |
272 | ||
273 | vma = find_vma(mm, vb->baddr); | |
274 | if (!vma) | |
275 | goto out_up; | |
276 | ||
277 | if ((vb->baddr + mem->size) > vma->vm_end) | |
278 | goto out_up; | |
279 | ||
280 | pages_done = 0; | |
281 | prev_pfn = 0; /* kill warning */ | |
282 | user_address = vb->baddr; | |
283 | ||
284 | while (pages_done < (mem->size >> PAGE_SHIFT)) { | |
285 | ret = follow_pfn(vma, user_address, &this_pfn); | |
286 | if (ret) | |
287 | break; | |
288 | ||
289 | if (pages_done == 0) | |
290 | mem->dma_handle = this_pfn << PAGE_SHIFT; | |
291 | else if (this_pfn != (prev_pfn + 1)) | |
292 | ret = -EFAULT; | |
293 | ||
294 | if (ret) | |
295 | break; | |
296 | ||
297 | prev_pfn = this_pfn; | |
298 | user_address += PAGE_SIZE; | |
299 | pages_done++; | |
300 | } | |
301 | ||
302 | if (!ret) | |
303 | mem->is_userptr = 1; | |
304 | ||
305 | out_up: | |
306 | up_read(¤t->mm->mmap_sem); | |
307 | ||
308 | return ret; | |
309 | } | |
310 | ||
311 | /* same as videobuf_dma_contig_user_put() */ | |
312 | static void | |
313 | dt3155_dma_contig_user_put(struct videobuf_dma_contig_memory *mem) | |
314 | { | |
315 | mem->is_userptr = 0; | |
316 | mem->dma_handle = 0; | |
317 | mem->size = 0; | |
318 | } | |
319 | ||
320 | /* same as videobuf_iolock() but uses allocations from the pool */ | |
321 | static int | |
322 | dt3155_iolock(struct videobuf_queue *q, struct videobuf_buffer *vb, | |
323 | struct v4l2_framebuffer *fbuf) | |
324 | { | |
325 | struct videobuf_dma_contig_memory *mem = vb->priv; | |
326 | ||
327 | BUG_ON(!mem); | |
328 | MAGIC_CHECK(mem->magic, MAGIC_DC_MEM); | |
329 | ||
330 | switch (vb->memory) { | |
331 | case V4L2_MEMORY_MMAP: | |
332 | dev_dbg(q->dev, "%s memory method MMAP\n", __func__); | |
333 | ||
334 | /* All handling should be done by __videobuf_mmap_mapper() */ | |
335 | if (!mem->vaddr) { | |
336 | dev_err(q->dev, "memory is not alloced/mmapped.\n"); | |
337 | return -EINVAL; | |
338 | } | |
339 | break; | |
340 | case V4L2_MEMORY_USERPTR: | |
341 | dev_dbg(q->dev, "%s memory method USERPTR\n", __func__); | |
342 | ||
343 | /* handle pointer from user space */ | |
344 | if (vb->baddr) | |
345 | return dt3155_dma_contig_user_get(mem, vb); | |
346 | ||
347 | /* allocate memory for the read() method */ | |
348 | mem->size = PAGE_ALIGN(vb->size); | |
349 | mem->vaddr = dt3155_alloc_buffer(q->dev, mem->size, | |
350 | &mem->dma_handle, GFP_KERNEL); | |
351 | if (!mem->vaddr) { | |
352 | dev_err(q->dev, "dma_alloc_coherent %ld failed\n", | |
353 | mem->size); | |
354 | return -ENOMEM; | |
355 | } | |
356 | ||
357 | dev_dbg(q->dev, "dma_alloc_coherent data is at %p (%ld)\n", | |
358 | mem->vaddr, mem->size); | |
359 | break; | |
360 | case V4L2_MEMORY_OVERLAY: | |
361 | default: | |
362 | dev_dbg(q->dev, "%s memory method OVERLAY/unknown\n", | |
363 | __func__); | |
364 | return -EINVAL; | |
365 | } | |
366 | ||
367 | return 0; | |
368 | } | |
369 | ||
370 | /* same as videobuf_dma_contig_free() but uses the pool */ | |
371 | void | |
372 | dt3155_dma_contig_free(struct videobuf_queue *q, struct videobuf_buffer *buf) | |
373 | { | |
374 | struct videobuf_dma_contig_memory *mem = buf->priv; | |
375 | ||
376 | /* mmapped memory can't be freed here, otherwise mmapped region | |
377 | would be released, while still needed. In this case, the memory | |
378 | release should happen inside videobuf_vm_close(). | |
379 | So, it should free memory only if the memory were allocated for | |
380 | read() operation. | |
381 | */ | |
382 | if (buf->memory != V4L2_MEMORY_USERPTR) | |
383 | return; | |
384 | ||
385 | if (!mem) | |
386 | return; | |
387 | ||
388 | MAGIC_CHECK(mem->magic, MAGIC_DC_MEM); | |
389 | ||
390 | /* handle user space pointer case */ | |
391 | if (buf->baddr) { | |
392 | dt3155_dma_contig_user_put(mem); | |
393 | return; | |
394 | } | |
395 | ||
396 | /* read() method */ | |
397 | dt3155_free_buffer(q->dev, mem->size, mem->vaddr, mem->dma_handle); | |
398 | mem->vaddr = NULL; | |
399 | } | |
400 | ||
401 | /* same as videobuf_vm_open() */ | |
402 | static void | |
403 | dt3155_vm_open(struct vm_area_struct *vma) | |
404 | { | |
405 | struct videobuf_mapping *map = vma->vm_private_data; | |
406 | ||
407 | dev_dbg(map->q->dev, "vm_open %p [count=%u,vma=%08lx-%08lx]\n", | |
408 | map, map->count, vma->vm_start, vma->vm_end); | |
409 | ||
410 | map->count++; | |
411 | } | |
412 | ||
413 | /* same as videobuf_vm_close(), but free to the pool */ | |
414 | static void | |
415 | dt3155_vm_close(struct vm_area_struct *vma) | |
416 | { | |
417 | struct videobuf_mapping *map = vma->vm_private_data; | |
418 | struct videobuf_queue *q = map->q; | |
419 | int i; | |
420 | ||
421 | dev_dbg(map->q->dev, "vm_close %p [count=%u,vma=%08lx-%08lx]\n", | |
422 | map, map->count, vma->vm_start, vma->vm_end); | |
423 | ||
424 | map->count--; | |
425 | if (0 == map->count) { | |
426 | struct videobuf_dma_contig_memory *mem; | |
427 | ||
428 | dev_dbg(map->q->dev, "munmap %p q=%p\n", map, q); | |
429 | mutex_lock(&q->vb_lock); | |
430 | ||
431 | /* We need first to cancel streams, before unmapping */ | |
432 | if (q->streaming) | |
433 | videobuf_queue_cancel(q); | |
434 | ||
435 | for (i = 0; i < VIDEO_MAX_FRAME; i++) { | |
436 | if (NULL == q->bufs[i]) | |
437 | continue; | |
438 | ||
439 | if (q->bufs[i]->map != map) | |
440 | continue; | |
441 | ||
442 | mem = q->bufs[i]->priv; | |
443 | if (mem) { | |
444 | /* This callback is called only if kernel has | |
445 | allocated memory and this memory is mmapped. | |
446 | In this case, memory should be freed, | |
447 | in order to do memory unmap. | |
448 | */ | |
449 | ||
450 | MAGIC_CHECK(mem->magic, MAGIC_DC_MEM); | |
451 | ||
452 | /* vfree is not atomic - can't be | |
453 | called with IRQ's disabled | |
454 | */ | |
455 | dev_dbg(map->q->dev, "buf[%d] freeing %p\n", | |
456 | i, mem->vaddr); | |
457 | ||
458 | dt3155_free_buffer(q->dev, mem->size, | |
459 | mem->vaddr, mem->dma_handle); | |
460 | mem->vaddr = NULL; | |
461 | } | |
462 | ||
463 | q->bufs[i]->map = NULL; | |
464 | q->bufs[i]->baddr = 0; | |
465 | } | |
466 | ||
467 | kfree(map); | |
468 | ||
469 | mutex_unlock(&q->vb_lock); | |
470 | } | |
471 | } | |
472 | ||
473 | static const struct vm_operations_struct dt3155_vm_ops = { | |
474 | .open = dt3155_vm_open, | |
475 | .close = dt3155_vm_close, | |
476 | }; | |
477 | ||
478 | /* same as videobuf_mmap_mapper(), but allocates from the pool */ | |
479 | static int | |
480 | dt3155_mmap_mapper(struct videobuf_queue *q, struct vm_area_struct *vma) | |
481 | { | |
482 | struct videobuf_dma_contig_memory *mem; | |
483 | struct videobuf_mapping *map; | |
484 | unsigned int first; | |
485 | int retval; | |
486 | unsigned long size, offset = vma->vm_pgoff << PAGE_SHIFT; | |
487 | ||
488 | dev_dbg(q->dev, "%s\n", __func__); | |
489 | if (!(vma->vm_flags & VM_WRITE) || !(vma->vm_flags & VM_SHARED)) | |
490 | return -EINVAL; | |
491 | ||
492 | /* look for first buffer to map */ | |
493 | for (first = 0; first < VIDEO_MAX_FRAME; first++) { | |
494 | if (!q->bufs[first]) | |
495 | continue; | |
496 | ||
497 | if (V4L2_MEMORY_MMAP != q->bufs[first]->memory) | |
498 | continue; | |
499 | if (q->bufs[first]->boff == offset) | |
500 | break; | |
501 | } | |
502 | if (VIDEO_MAX_FRAME == first) { | |
503 | dev_dbg(q->dev, "invalid user space offset [offset=0x%lx]\n", | |
504 | offset); | |
505 | return -EINVAL; | |
506 | } | |
507 | ||
508 | /* create mapping + update buffer list */ | |
509 | map = kzalloc(sizeof(struct videobuf_mapping), GFP_KERNEL); | |
510 | if (!map) | |
511 | return -ENOMEM; | |
512 | ||
513 | q->bufs[first]->map = map; | |
514 | map->start = vma->vm_start; | |
515 | map->end = vma->vm_end; | |
516 | map->q = q; | |
517 | ||
518 | q->bufs[first]->baddr = vma->vm_start; | |
519 | ||
520 | mem = q->bufs[first]->priv; | |
521 | BUG_ON(!mem); | |
522 | MAGIC_CHECK(mem->magic, MAGIC_DC_MEM); | |
523 | ||
524 | mem->size = PAGE_ALIGN(q->bufs[first]->bsize); | |
525 | mem->vaddr = dt3155_alloc_buffer(q->dev, mem->size, | |
526 | &mem->dma_handle, GFP_KERNEL); | |
527 | if (!mem->vaddr) { | |
528 | dev_err(q->dev, "dma_alloc_coherent size %ld failed\n", | |
529 | mem->size); | |
530 | goto error; | |
531 | } | |
532 | dev_dbg(q->dev, "dma_alloc_coherent data is at addr %p (size %ld)\n", | |
533 | mem->vaddr, mem->size); | |
534 | ||
535 | /* Try to remap memory */ | |
536 | ||
537 | size = vma->vm_end - vma->vm_start; | |
538 | size = (size < mem->size) ? size : mem->size; | |
539 | ||
540 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
541 | retval = remap_pfn_range(vma, vma->vm_start, | |
542 | mem->dma_handle >> PAGE_SHIFT, | |
543 | size, vma->vm_page_prot); | |
544 | if (retval) { | |
545 | dev_err(q->dev, "mmap: remap failed with error %d. ", retval); | |
546 | dt3155_free_buffer(q->dev, mem->size, | |
547 | mem->vaddr, mem->dma_handle); | |
548 | goto error; | |
549 | } | |
550 | ||
551 | vma->vm_ops = &dt3155_vm_ops; | |
552 | vma->vm_flags |= VM_DONTEXPAND; | |
553 | vma->vm_private_data = map; | |
554 | ||
555 | dev_dbg(q->dev, "mmap %p: q=%p %08lx-%08lx (%lx) pgoff %08lx buf %d\n", | |
556 | map, q, vma->vm_start, vma->vm_end, | |
557 | (long int) q->bufs[first]->bsize, | |
558 | vma->vm_pgoff, first); | |
559 | ||
560 | dt3155_vm_open(vma); | |
561 | ||
562 | return 0; | |
563 | ||
564 | error: | |
565 | kfree(map); | |
566 | return -ENOMEM; | |
567 | } | |
568 | ||
569 | static int | |
570 | dt3155_sync_for_cpu(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
571 | { | |
572 | struct dt3155_priv *pd = q->priv_data; | |
573 | struct videobuf_dma_contig_memory *mem = vb->priv; | |
574 | ||
575 | BUG_ON(!mem); | |
576 | MAGIC_CHECK(mem->magic, MAGIC_DC_MEM); | |
577 | ||
578 | pci_dma_sync_single_for_cpu(pd->pdev, mem->dma_handle, | |
579 | mem->size, PCI_DMA_FROMDEVICE); | |
580 | return 0; | |
581 | } | |
582 | ||
583 | static int | |
584 | dt3155_sync_for_device(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
585 | { | |
586 | struct dt3155_priv *pd = q->priv_data; | |
587 | struct videobuf_dma_contig_memory *mem = vb->priv; | |
588 | ||
589 | BUG_ON(!mem); | |
590 | MAGIC_CHECK(mem->magic, MAGIC_DC_MEM); | |
591 | ||
592 | pci_dma_sync_single_for_device(pd->pdev, mem->dma_handle, | |
593 | mem->size, PCI_DMA_FROMDEVICE); | |
594 | return 0; | |
595 | } | |
596 | ||
597 | /* | |
598 | * same as videobuf_queue_dma_contig_init(), but after | |
599 | * initialisation overwrites videobuf_iolock() and | |
600 | * videobuf_mmap_mapper() with our customized versions | |
601 | * as well as adds sync() method | |
602 | */ | |
603 | static void | |
604 | dt3155_queue_dma_contig_init(struct videobuf_queue *q, | |
605 | struct videobuf_queue_ops *ops, | |
606 | struct device *dev, | |
607 | spinlock_t *irqlock, | |
608 | enum v4l2_buf_type type, | |
609 | enum v4l2_field field, | |
610 | unsigned int msize, | |
611 | void *priv) | |
612 | { | |
613 | videobuf_queue_dma_contig_init(q, ops, dev, irqlock, | |
614 | type, field, msize, priv); | |
615 | /* overwrite with our methods */ | |
616 | q->int_ops->iolock = dt3155_iolock; | |
617 | q->int_ops->mmap_mapper = dt3155_mmap_mapper; | |
618 | q->int_ops->sync = dt3155_sync_for_cpu; | |
619 | } | |
620 | ||
621 | static int | |
622 | dt3155_start_acq(struct dt3155_priv *pd) | |
623 | { | |
624 | struct videobuf_buffer *vb = pd->curr_buf; | |
625 | dma_addr_t dma_addr; | |
626 | ||
627 | dma_addr = videobuf_to_dma_contig(vb); | |
628 | iowrite32(dma_addr, pd->regs + EVEN_DMA_START); | |
629 | iowrite32(dma_addr + vb->width, pd->regs + ODD_DMA_START); | |
630 | iowrite32(vb->width, pd->regs + EVEN_DMA_STRIDE); | |
631 | iowrite32(vb->width, pd->regs + ODD_DMA_STRIDE); | |
632 | /* enable interrupts, clear all irq flags */ | |
633 | iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | | |
634 | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR); | |
635 | iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | | |
636 | FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD, | |
637 | pd->regs + CSR1); | |
638 | wait_i2c_reg(pd->regs); | |
639 | write_i2c_reg(pd->regs, CONFIG, pd->config); | |
640 | write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); | |
641 | write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); | |
642 | ||
643 | /* start the board */ | |
644 | write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD); | |
645 | return 0; /* success */ | |
646 | } | |
647 | ||
648 | static int | |
649 | dt3155_stop_acq(struct dt3155_priv *pd) | |
650 | { | |
651 | int tmp; | |
652 | ||
653 | /* stop the board */ | |
654 | wait_i2c_reg(pd->regs); | |
655 | write_i2c_reg(pd->regs, CSR2, pd->csr2); | |
656 | ||
657 | /* disable all irqs, clear all irq flags */ | |
658 | iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR); | |
659 | write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); | |
660 | write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); | |
661 | tmp = ioread32(pd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD); | |
662 | if (tmp) | |
663 | printk(KERN_ERR "dt3155: corrupted field %u\n", tmp); | |
664 | iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | | |
665 | FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD, | |
666 | pd->regs + CSR1); | |
667 | return 0; | |
668 | } | |
669 | ||
670 | /* Locking: Caller holds q->vb_lock */ | |
671 | static int | |
672 | dt3155_buf_setup(struct videobuf_queue *q, unsigned int *count, | |
673 | unsigned int *size) | |
674 | { | |
675 | *size = img_width * img_height; | |
676 | return 0; | |
677 | } | |
678 | ||
679 | /* Locking: Caller holds q->vb_lock */ | |
680 | static int | |
681 | dt3155_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, | |
682 | enum v4l2_field field) | |
683 | { | |
684 | int ret = 0; | |
685 | ||
686 | vb->width = img_width; | |
687 | vb->height = img_height; | |
688 | vb->size = img_width * img_height; | |
689 | vb->field = field; | |
690 | if (vb->state == VIDEOBUF_NEEDS_INIT) | |
691 | ret = videobuf_iolock(q, vb, NULL); | |
692 | if (ret) { | |
693 | vb->state = VIDEOBUF_ERROR; | |
694 | printk(KERN_ERR "ERROR: videobuf_iolock() failed\n"); | |
695 | videobuf_dma_contig_free(q, vb); | |
696 | } else | |
697 | vb->state = VIDEOBUF_PREPARED; | |
698 | return ret; | |
699 | } | |
700 | ||
701 | /* Locking: Caller holds q->vb_lock & q->irqlock */ | |
702 | static void | |
703 | dt3155_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
704 | { | |
705 | struct dt3155_priv *pd = q->priv_data; | |
706 | ||
707 | if (vb->state != VIDEOBUF_NEEDS_INIT) { | |
708 | vb->state = VIDEOBUF_QUEUED; | |
709 | dt3155_sync_for_device(q, vb); | |
710 | list_add_tail(&vb->queue, &pd->dmaq); | |
711 | wake_up_interruptible_sync(&pd->do_dma); | |
712 | } else | |
713 | vb->state = VIDEOBUF_ERROR; | |
714 | } | |
715 | ||
716 | /* Locking: Caller holds q->vb_lock */ | |
717 | static void | |
718 | dt3155_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
719 | { | |
720 | if (vb->state == VIDEOBUF_ACTIVE) | |
721 | videobuf_waiton(vb, 0, 0); /* FIXME: cannot be interrupted */ | |
722 | dt3155_dma_contig_free(q, vb); | |
723 | vb->state = VIDEOBUF_NEEDS_INIT; | |
724 | } | |
725 | ||
726 | static struct videobuf_queue_ops vbq_ops = { | |
727 | .buf_setup = dt3155_buf_setup, | |
728 | .buf_prepare = dt3155_buf_prepare, | |
729 | .buf_queue = dt3155_buf_queue, | |
730 | .buf_release = dt3155_buf_release, | |
731 | }; | |
732 | ||
733 | static irqreturn_t | |
734 | dt3155_irq_handler_even(int irq, void *dev_id) | |
735 | { | |
736 | struct dt3155_priv *ipd = dev_id; | |
737 | struct videobuf_buffer *ivb; | |
738 | dma_addr_t dma_addr; | |
739 | u32 tmp; | |
740 | ||
741 | tmp = ioread32(ipd->regs + INT_CSR) & (FLD_START | FLD_END_ODD); | |
742 | if (!tmp) | |
743 | return IRQ_NONE; /* not our irq */ | |
744 | if ((tmp & FLD_START) && !(tmp & FLD_END_ODD)) { | |
745 | iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START, | |
746 | ipd->regs + INT_CSR); | |
747 | ipd->field_count++; | |
748 | return IRQ_HANDLED; /* start of field irq */ | |
749 | } | |
750 | if ((tmp & FLD_START) && (tmp & FLD_END_ODD)) { | |
751 | if (!ipd->stats.start_before_end++) | |
752 | printk(KERN_ERR "dt3155: irq: START before END\n"); | |
753 | } | |
754 | /* check for corrupted fields */ | |
755 | /* write_i2c_reg(ipd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); */ | |
756 | /* write_i2c_reg(ipd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); */ | |
757 | tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD); | |
758 | if (tmp) { | |
759 | if (!ipd->stats.corrupted_fields++) | |
760 | printk(KERN_ERR "dt3155: corrupted field %u\n", tmp); | |
761 | iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | | |
762 | FLD_DN_ODD | FLD_DN_EVEN | | |
763 | CAP_CONT_EVEN | CAP_CONT_ODD, | |
764 | ipd->regs + CSR1); | |
765 | mmiowb(); | |
766 | } | |
767 | ||
768 | spin_lock(&ipd->lock); | |
769 | if (ipd->curr_buf && ipd->curr_buf->state == VIDEOBUF_ACTIVE) { | |
770 | if (waitqueue_active(&ipd->curr_buf->done)) { | |
771 | do_gettimeofday(&ipd->curr_buf->ts); | |
772 | ipd->curr_buf->field_count = ipd->field_count; | |
773 | ipd->curr_buf->state = VIDEOBUF_DONE; | |
774 | wake_up(&ipd->curr_buf->done); | |
775 | } else { | |
776 | ivb = ipd->curr_buf; | |
777 | goto load_dma; | |
778 | } | |
779 | } else | |
780 | goto stop_dma; | |
781 | if (list_empty(&ipd->dmaq)) | |
782 | goto stop_dma; | |
783 | ivb = list_first_entry(&ipd->dmaq, typeof(*ivb), queue); | |
784 | list_del(&ivb->queue); | |
785 | if (ivb->state == VIDEOBUF_QUEUED) { | |
786 | ivb->state = VIDEOBUF_ACTIVE; | |
787 | ipd->curr_buf = ivb; | |
788 | } else | |
789 | goto stop_dma; | |
790 | load_dma: | |
791 | dma_addr = videobuf_to_dma_contig(ivb); | |
792 | iowrite32(dma_addr, ipd->regs + EVEN_DMA_START); | |
793 | iowrite32(dma_addr + ivb->width, ipd->regs + ODD_DMA_START); | |
794 | iowrite32(ivb->width, ipd->regs + EVEN_DMA_STRIDE); | |
795 | iowrite32(ivb->width, ipd->regs + ODD_DMA_STRIDE); | |
796 | mmiowb(); | |
797 | /* enable interrupts, clear all irq flags */ | |
798 | iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | | |
799 | FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR); | |
800 | spin_unlock(&ipd->lock); | |
801 | return IRQ_HANDLED; | |
802 | ||
803 | stop_dma: | |
804 | ipd->curr_buf = NULL; | |
805 | /* stop the board */ | |
806 | write_i2c_reg_nowait(ipd->regs, CSR2, ipd->csr2); | |
807 | /* disable interrupts, clear all irq flags */ | |
808 | iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR); | |
809 | spin_unlock(&ipd->lock); | |
810 | return IRQ_HANDLED; | |
811 | } | |
812 | ||
813 | static int | |
814 | dt3155_threadfn(void *arg) | |
815 | { | |
816 | struct dt3155_priv *pd = arg; | |
817 | struct videobuf_buffer *vb; | |
818 | unsigned long flags; | |
819 | ||
820 | while (1) { | |
821 | wait_event_interruptible(pd->do_dma, | |
822 | kthread_should_stop() || !list_empty(&pd->dmaq)); | |
823 | if (kthread_should_stop()) | |
824 | break; | |
825 | ||
826 | spin_lock_irqsave(&pd->lock, flags); | |
827 | if (pd->curr_buf) /* dma is active */ | |
828 | goto done; | |
829 | if (list_empty(&pd->dmaq)) /* no empty biffers */ | |
830 | goto done; | |
831 | vb = list_first_entry(&pd->dmaq, typeof(*vb), queue); | |
832 | list_del(&vb->queue); | |
833 | if (vb->state == VIDEOBUF_QUEUED) { | |
834 | vb->state = VIDEOBUF_ACTIVE; | |
835 | pd->curr_buf = vb; | |
836 | spin_unlock_irqrestore(&pd->lock, flags); | |
837 | /* start dma */ | |
838 | dt3155_start_acq(pd); | |
839 | continue; | |
840 | } else | |
841 | printk(KERN_DEBUG "%s(): This is a BUG\n", __func__); | |
842 | done: | |
843 | spin_unlock_irqrestore(&pd->lock, flags); | |
844 | } | |
845 | return 0; | |
846 | } | |
847 | ||
848 | static int | |
849 | dt3155_open(struct file *filp) | |
850 | { | |
851 | int ret = 0; | |
852 | struct dt3155_priv *pd = video_drvdata(filp); | |
853 | ||
854 | printk(KERN_INFO "dt3155: open(): minor: %i\n", pd->vdev->minor); | |
855 | ||
856 | if (mutex_lock_interruptible(&pd->mux) == -EINTR) | |
857 | return -ERESTARTSYS; | |
858 | if (!pd->users) { | |
859 | pd->vidq = kzalloc(sizeof(*pd->vidq), GFP_KERNEL); | |
860 | if (!pd->vidq) { | |
861 | printk(KERN_ERR "dt3155: error: alloc queue\n"); | |
862 | ret = -ENOMEM; | |
863 | goto err_alloc_queue; | |
864 | } | |
865 | dt3155_queue_dma_contig_init(pd->vidq, &vbq_ops, | |
866 | &pd->pdev->dev, &pd->lock, | |
867 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE, | |
868 | sizeof(struct videobuf_buffer), pd); | |
869 | /* disable all irqs, clear all irq flags */ | |
870 | iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, | |
871 | pd->regs + INT_CSR); | |
872 | pd->irq_handler = dt3155_irq_handler_even; | |
873 | ret = request_irq(pd->pdev->irq, pd->irq_handler, | |
874 | IRQF_SHARED, DT3155_NAME, pd); | |
875 | if (ret) { | |
876 | printk(KERN_ERR "dt3155: error: request_irq\n"); | |
877 | goto err_request_irq; | |
878 | } | |
879 | pd->curr_buf = NULL; | |
880 | pd->thread = kthread_run(dt3155_threadfn, pd, | |
881 | "dt3155_thread_%i", pd->vdev->minor); | |
882 | if (IS_ERR(pd->thread)) { | |
883 | printk(KERN_ERR "dt3155: kthread_run() failed\n"); | |
884 | ret = PTR_ERR(pd->thread); | |
885 | goto err_thread; | |
886 | } | |
887 | pd->field_count = 0; | |
888 | } | |
889 | pd->users++; | |
890 | goto done; | |
891 | err_thread: | |
892 | free_irq(pd->pdev->irq, pd); | |
893 | err_request_irq: | |
894 | kfree(pd->vidq); | |
895 | pd->vidq = NULL; | |
896 | err_alloc_queue: | |
897 | done: | |
898 | mutex_unlock(&pd->mux); | |
899 | return ret; | |
900 | } | |
901 | ||
902 | static int | |
903 | dt3155_release(struct file *filp) | |
904 | { | |
905 | struct dt3155_priv *pd = video_drvdata(filp); | |
906 | struct videobuf_buffer *tmp; | |
907 | unsigned long flags; | |
908 | int ret = 0; | |
909 | ||
910 | printk(KERN_INFO "dt3155: release(): minor: %i\n", pd->vdev->minor); | |
911 | ||
912 | if (mutex_lock_interruptible(&pd->mux) == -EINTR) | |
913 | return -ERESTARTSYS; | |
914 | pd->users--; | |
915 | BUG_ON(pd->users < 0); | |
916 | if (pd->acq_fp == filp) { | |
917 | spin_lock_irqsave(&pd->lock, flags); | |
918 | INIT_LIST_HEAD(&pd->dmaq); /* queue is emptied */ | |
919 | tmp = pd->curr_buf; | |
920 | spin_unlock_irqrestore(&pd->lock, flags); | |
921 | if (tmp) | |
922 | videobuf_waiton(tmp, 0, 1); /* block, interruptible */ | |
923 | dt3155_stop_acq(pd); | |
924 | videobuf_stop(pd->vidq); | |
925 | pd->acq_fp = NULL; | |
926 | } | |
927 | if (!pd->users) { | |
928 | kthread_stop(pd->thread); | |
929 | free_irq(pd->pdev->irq, pd); | |
930 | kfree(pd->vidq); | |
931 | pd->vidq = NULL; | |
932 | } | |
933 | mutex_unlock(&pd->mux); | |
934 | return ret; | |
935 | } | |
936 | ||
937 | static ssize_t | |
938 | dt3155_read(struct file *filp, char __user *user, size_t size, loff_t *loff) | |
939 | { | |
940 | struct dt3155_priv *pd = video_drvdata(filp); | |
941 | int ret; | |
942 | ||
943 | if (mutex_lock_interruptible(&pd->mux) == -EINTR) | |
944 | return -ERESTARTSYS; | |
945 | if (!pd->acq_fp) | |
946 | pd->acq_fp = filp; | |
947 | else if (pd->acq_fp != filp) { | |
948 | ret = -EBUSY; | |
949 | goto done; | |
950 | } | |
951 | ret = videobuf_read_stream(pd->vidq, user, size, loff, 0, | |
952 | filp->f_flags & O_NONBLOCK); | |
953 | done: | |
954 | mutex_unlock(&pd->mux); | |
955 | return ret; | |
956 | } | |
957 | ||
958 | static unsigned int | |
959 | dt3155_poll(struct file *filp, struct poll_table_struct *polltbl) | |
960 | { | |
961 | struct dt3155_priv *pd = video_drvdata(filp); | |
962 | ||
963 | return videobuf_poll_stream(filp, pd->vidq, polltbl); | |
964 | } | |
965 | ||
966 | static int | |
967 | dt3155_mmap(struct file *filp, struct vm_area_struct *vma) | |
968 | { | |
969 | struct dt3155_priv *pd = video_drvdata(filp); | |
970 | ||
971 | return videobuf_mmap_mapper(pd->vidq, vma); | |
972 | } | |
973 | ||
974 | static const struct v4l2_file_operations dt3155_fops = { | |
975 | .owner = THIS_MODULE, | |
976 | .open = dt3155_open, | |
977 | .release = dt3155_release, | |
978 | .read = dt3155_read, | |
979 | .poll = dt3155_poll, | |
980 | .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ | |
981 | .mmap = dt3155_mmap, | |
982 | }; | |
983 | ||
984 | static int | |
985 | dt3155_ioc_streamon(struct file *filp, void *p, enum v4l2_buf_type type) | |
986 | { | |
987 | struct dt3155_priv *pd = video_drvdata(filp); | |
988 | int ret = -ERESTARTSYS; | |
989 | ||
990 | if (mutex_lock_interruptible(&pd->mux) == -EINTR) | |
991 | return ret; | |
992 | if (!pd->acq_fp) { | |
993 | ret = videobuf_streamon(pd->vidq); | |
994 | if (ret) | |
995 | goto unlock; | |
996 | pd->acq_fp = filp; | |
997 | wake_up_interruptible_sync(&pd->do_dma); | |
998 | } else if (pd->acq_fp == filp) { | |
999 | ret = videobuf_streamon(pd->vidq); | |
1000 | if (!ret) | |
1001 | wake_up_interruptible_sync(&pd->do_dma); | |
1002 | } else | |
1003 | ret = -EBUSY; | |
1004 | unlock: | |
1005 | mutex_unlock(&pd->mux); | |
1006 | return ret; | |
1007 | } | |
1008 | ||
1009 | static int | |
1010 | dt3155_ioc_streamoff(struct file *filp, void *p, enum v4l2_buf_type type) | |
1011 | { | |
1012 | struct dt3155_priv *pd = video_drvdata(filp); | |
1013 | struct videobuf_buffer *tmp; | |
1014 | unsigned long flags; | |
1015 | int ret; | |
1016 | ||
1017 | ret = videobuf_streamoff(pd->vidq); | |
1018 | if (ret) | |
1019 | return ret; | |
1020 | spin_lock_irqsave(&pd->lock, flags); | |
1021 | tmp = pd->curr_buf; | |
1022 | spin_unlock_irqrestore(&pd->lock, flags); | |
1023 | if (tmp) | |
1024 | videobuf_waiton(tmp, 0, 1); /* block, interruptible */ | |
1025 | return ret; | |
1026 | } | |
1027 | ||
1028 | static int | |
1029 | dt3155_ioc_querycap(struct file *filp, void *p, struct v4l2_capability *cap) | |
1030 | { | |
1031 | struct dt3155_priv *pd = video_drvdata(filp); | |
1032 | ||
1033 | strcpy(cap->driver, DT3155_NAME); | |
1034 | strcpy(cap->card, DT3155_NAME " frame grabber"); | |
1035 | sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev)); | |
1036 | cap->version = | |
1037 | KERNEL_VERSION(DT3155_VER_MAJ, DT3155_VER_MIN, DT3155_VER_EXT); | |
1038 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | |
1039 | #ifdef CONFIG_DT3155_STREAMING | |
1040 | V4L2_CAP_STREAMING; | |
1041 | #else | |
1042 | V4L2_CAP_READWRITE; | |
1043 | #endif | |
1044 | return 0; | |
1045 | } | |
1046 | ||
1047 | static int | |
1048 | dt3155_ioc_enum_fmt_vid_cap(struct file *filp, void *p, struct v4l2_fmtdesc *f) | |
1049 | { | |
1050 | if (f->index >= NUM_OF_FORMATS) | |
1051 | return -EINVAL; | |
1052 | *f = frame_std[f->index]; | |
1053 | return 0; | |
1054 | } | |
1055 | ||
1056 | static int | |
1057 | dt3155_ioc_g_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f) | |
1058 | { | |
1059 | if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
1060 | return -EINVAL; | |
1061 | f->fmt.pix.width = img_width; | |
1062 | f->fmt.pix.height = img_height; | |
1063 | f->fmt.pix.pixelformat = V4L2_PIX_FMT_GREY; | |
1064 | f->fmt.pix.field = V4L2_FIELD_NONE; | |
1065 | f->fmt.pix.bytesperline = f->fmt.pix.width; | |
1066 | f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height; | |
1067 | f->fmt.pix.colorspace = 0; | |
1068 | f->fmt.pix.priv = 0; | |
1069 | return 0; | |
1070 | } | |
1071 | ||
1072 | static int | |
1073 | dt3155_ioc_try_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f) | |
1074 | { | |
1075 | if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
1076 | return -EINVAL; | |
1077 | if (f->fmt.pix.width == img_width && | |
1078 | f->fmt.pix.height == img_height && | |
1079 | f->fmt.pix.pixelformat == V4L2_PIX_FMT_GREY && | |
1080 | f->fmt.pix.field == V4L2_FIELD_NONE && | |
1081 | f->fmt.pix.bytesperline == f->fmt.pix.width && | |
1082 | f->fmt.pix.sizeimage == f->fmt.pix.width * f->fmt.pix.height) | |
1083 | return 0; | |
1084 | else | |
1085 | return -EINVAL; | |
1086 | } | |
1087 | ||
1088 | static int | |
1089 | dt3155_ioc_s_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f) | |
1090 | { | |
1091 | return dt3155_ioc_g_fmt_vid_cap(filp, p, f); | |
1092 | } | |
1093 | ||
1094 | static int | |
1095 | dt3155_ioc_reqbufs(struct file *filp, void *p, struct v4l2_requestbuffers *b) | |
1096 | { | |
1097 | struct dt3155_priv *pd = video_drvdata(filp); | |
1098 | struct videobuf_queue *q = pd->vidq; | |
1099 | ||
1100 | if (b->memory != V4L2_MEMORY_MMAP) | |
1101 | return -EINVAL; | |
1102 | if (b->count) | |
1103 | return videobuf_reqbufs(q, b); | |
1104 | else { /* FIXME: is it necessary? */ | |
1105 | printk(KERN_DEBUG "dt3155: request to free buffers\n"); | |
1106 | return videobuf_mmap_free(q); | |
1107 | } | |
1108 | } | |
1109 | ||
1110 | static int | |
1111 | dt3155_ioc_querybuf(struct file *filp, void *p, struct v4l2_buffer *b) | |
1112 | { | |
1113 | struct dt3155_priv *pd = video_drvdata(filp); | |
1114 | struct videobuf_queue *q = pd->vidq; | |
1115 | ||
1116 | return videobuf_querybuf(q, b); | |
1117 | } | |
1118 | ||
1119 | static int | |
1120 | dt3155_ioc_qbuf(struct file *filp, void *p, struct v4l2_buffer *b) | |
1121 | { | |
1122 | struct dt3155_priv *pd = video_drvdata(filp); | |
1123 | struct videobuf_queue *q = pd->vidq; | |
1124 | ||
1125 | return videobuf_qbuf(q, b); | |
1126 | } | |
1127 | ||
1128 | static int | |
1129 | dt3155_ioc_dqbuf(struct file *filp, void *p, struct v4l2_buffer *b) | |
1130 | { | |
1131 | struct dt3155_priv *pd = video_drvdata(filp); | |
1132 | struct videobuf_queue *q = pd->vidq; | |
1133 | ||
1134 | return videobuf_dqbuf(q, b, filp->f_flags & O_NONBLOCK); | |
1135 | } | |
1136 | ||
1137 | static int | |
1138 | dt3155_ioc_querystd(struct file *filp, void *p, v4l2_std_id *norm) | |
1139 | { | |
1140 | *norm = DT3155_CURRENT_NORM; | |
1141 | return 0; | |
1142 | } | |
1143 | ||
1144 | static int | |
1145 | dt3155_ioc_g_std(struct file *filp, void *p, v4l2_std_id *norm) | |
1146 | { | |
1147 | *norm = DT3155_CURRENT_NORM; | |
1148 | return 0; | |
1149 | } | |
1150 | ||
1151 | static int | |
1152 | dt3155_ioc_s_std(struct file *filp, void *p, v4l2_std_id *norm) | |
1153 | { | |
1154 | if (*norm & DT3155_CURRENT_NORM) | |
1155 | return 0; | |
1156 | return -EINVAL; | |
1157 | } | |
1158 | ||
1159 | static int | |
1160 | dt3155_ioc_enum_input(struct file *filp, void *p, struct v4l2_input *input) | |
1161 | { | |
1162 | if (input->index) | |
1163 | return -EINVAL; | |
1164 | strcpy(input->name, "Coax in"); | |
1165 | input->type = V4L2_INPUT_TYPE_CAMERA; | |
1166 | input->std = V4L2_STD_ALL; | |
1167 | input->status = 0;/* FIXME: add sync detection & V4L2_IN_ST_NO_H_LOCK */ | |
1168 | return 0; | |
1169 | } | |
1170 | ||
1171 | static int | |
1172 | dt3155_ioc_g_input(struct file *filp, void *p, unsigned int *i) | |
1173 | { | |
1174 | *i = 0; | |
1175 | return 0; | |
1176 | } | |
1177 | ||
1178 | static int | |
1179 | dt3155_ioc_s_input(struct file *filp, void *p, unsigned int i) | |
1180 | { | |
1181 | if (i) | |
1182 | return -EINVAL; | |
1183 | return 0; | |
1184 | } | |
1185 | ||
1186 | static int | |
1187 | dt3155_ioc_g_parm(struct file *filp, void *p, struct v4l2_streamparm *parms) | |
1188 | { | |
1189 | if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
1190 | return -EINVAL; | |
1191 | parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; | |
1192 | parms->parm.capture.capturemode = 0; | |
1193 | parms->parm.capture.timeperframe.numerator = 1001; | |
1194 | parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000; | |
1195 | parms->parm.capture.extendedmode = 0; | |
1196 | parms->parm.capture.readbuffers = 1; | |
1197 | return 0; | |
1198 | } | |
1199 | ||
1200 | static int | |
1201 | dt3155_ioc_s_parm(struct file *filp, void *p, struct v4l2_streamparm *parms) | |
1202 | { | |
1203 | if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
1204 | return -EINVAL; | |
1205 | parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; | |
1206 | parms->parm.capture.capturemode = 0; | |
1207 | parms->parm.capture.timeperframe.numerator = 1001; | |
1208 | parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000; | |
1209 | parms->parm.capture.extendedmode = 0; | |
1210 | parms->parm.capture.readbuffers = 1; | |
1211 | return 0; | |
1212 | } | |
1213 | ||
1214 | static const struct v4l2_ioctl_ops dt3155_ioctl_ops = { | |
1215 | .vidioc_streamon = dt3155_ioc_streamon, | |
1216 | .vidioc_streamoff = dt3155_ioc_streamoff, | |
1217 | .vidioc_querycap = dt3155_ioc_querycap, | |
1218 | /* | |
1219 | .vidioc_g_priority = dt3155_ioc_g_priority, | |
1220 | .vidioc_s_priority = dt3155_ioc_s_priority, | |
1221 | */ | |
1222 | .vidioc_enum_fmt_vid_cap = dt3155_ioc_enum_fmt_vid_cap, | |
1223 | .vidioc_try_fmt_vid_cap = dt3155_ioc_try_fmt_vid_cap, | |
1224 | .vidioc_g_fmt_vid_cap = dt3155_ioc_g_fmt_vid_cap, | |
1225 | .vidioc_s_fmt_vid_cap = dt3155_ioc_s_fmt_vid_cap, | |
1226 | .vidioc_reqbufs = dt3155_ioc_reqbufs, | |
1227 | .vidioc_querybuf = dt3155_ioc_querybuf, | |
1228 | .vidioc_qbuf = dt3155_ioc_qbuf, | |
1229 | .vidioc_dqbuf = dt3155_ioc_dqbuf, | |
1230 | .vidioc_querystd = dt3155_ioc_querystd, | |
1231 | .vidioc_g_std = dt3155_ioc_g_std, | |
1232 | .vidioc_s_std = dt3155_ioc_s_std, | |
1233 | .vidioc_enum_input = dt3155_ioc_enum_input, | |
1234 | .vidioc_g_input = dt3155_ioc_g_input, | |
1235 | .vidioc_s_input = dt3155_ioc_s_input, | |
1236 | /* | |
1237 | .vidioc_queryctrl = dt3155_ioc_queryctrl, | |
1238 | .vidioc_g_ctrl = dt3155_ioc_g_ctrl, | |
1239 | .vidioc_s_ctrl = dt3155_ioc_s_ctrl, | |
1240 | .vidioc_querymenu = dt3155_ioc_querymenu, | |
1241 | .vidioc_g_ext_ctrls = dt3155_ioc_g_ext_ctrls, | |
1242 | .vidioc_s_ext_ctrls = dt3155_ioc_s_ext_ctrls, | |
1243 | */ | |
1244 | .vidioc_g_parm = dt3155_ioc_g_parm, | |
1245 | .vidioc_s_parm = dt3155_ioc_s_parm, | |
1246 | /* | |
1247 | .vidioc_cropcap = dt3155_ioc_cropcap, | |
1248 | .vidioc_g_crop = dt3155_ioc_g_crop, | |
1249 | .vidioc_s_crop = dt3155_ioc_s_crop, | |
1250 | .vidioc_enum_framesizes = dt3155_ioc_enum_framesizes, | |
1251 | .vidioc_enum_frameintervals = dt3155_ioc_enum_frameintervals, | |
1252 | #ifdef CONFIG_VIDEO_V4L1_COMPAT | |
1253 | .vidiocgmbuf = iocgmbuf, | |
1254 | #endif | |
1255 | */ | |
1256 | }; | |
1257 | ||
1258 | static int __devinit | |
1259 | dt3155_init_board(struct pci_dev *dev) | |
1260 | { | |
1261 | int i; | |
1262 | u8 tmp; | |
1263 | struct dt3155_buf *buf; | |
1264 | struct dt3155_priv *pd = pci_get_drvdata(dev); | |
1265 | pci_set_master(dev); /* dt3155 needs it */ | |
1266 | ||
1267 | /* resetting the adapter */ | |
1268 | iowrite32(FLD_CRPT_ODD | FLD_CRPT_EVEN | FLD_DN_ODD | FLD_DN_EVEN, | |
1269 | pd->regs + CSR1); | |
1270 | mmiowb(); | |
1271 | msleep(10); | |
1272 | ||
1273 | /* initializing adaper registers */ | |
1274 | iowrite32(FIFO_EN | SRST, pd->regs + CSR1); | |
1275 | mmiowb(); | |
1276 | iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT); | |
1277 | iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT); | |
1278 | iowrite32(0x00000020, pd->regs + FIFO_TRIGER); | |
1279 | iowrite32(0x00000103, pd->regs + XFER_MODE); | |
1280 | iowrite32(0, pd->regs + RETRY_WAIT_CNT); | |
1281 | iowrite32(0, pd->regs + INT_CSR); | |
1282 | iowrite32(1, pd->regs + EVEN_FLD_MASK); | |
1283 | iowrite32(1, pd->regs + ODD_FLD_MASK); | |
1284 | iowrite32(0, pd->regs + MASK_LENGTH); | |
1285 | iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT); | |
1286 | iowrite32(0x01010101, pd->regs + IIC_CLK_DUR); | |
1287 | mmiowb(); | |
1288 | ||
1289 | /* verifying that we have a DT3155 board (not just a SAA7116 chip) */ | |
1290 | read_i2c_reg(pd->regs, DT_ID, &tmp); | |
1291 | if (tmp != DT3155_ID) | |
1292 | return -ENODEV; | |
1293 | ||
1294 | /* initialize AD LUT */ | |
1295 | write_i2c_reg(pd->regs, AD_ADDR, 0); | |
1296 | for (i = 0; i < 256; i++) | |
1297 | write_i2c_reg(pd->regs, AD_LUT, i); | |
1298 | ||
1299 | /* initialize ADC references */ | |
1300 | /* FIXME: pos_ref & neg_ref depend on VT_50HZ */ | |
1301 | write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); | |
1302 | write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3); | |
1303 | write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF); | |
1304 | write_i2c_reg(pd->regs, AD_CMD, 34); | |
1305 | write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF); | |
1306 | write_i2c_reg(pd->regs, AD_CMD, 0); | |
1307 | ||
1308 | /* initialize PM LUT */ | |
1309 | write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM); | |
1310 | for (i = 0; i < 256; i++) { | |
1311 | write_i2c_reg(pd->regs, PM_LUT_ADDR, i); | |
1312 | write_i2c_reg(pd->regs, PM_LUT_DATA, i); | |
1313 | } | |
1314 | write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL); | |
1315 | for (i = 0; i < 256; i++) { | |
1316 | write_i2c_reg(pd->regs, PM_LUT_ADDR, i); | |
1317 | write_i2c_reg(pd->regs, PM_LUT_DATA, i); | |
1318 | } | |
1319 | write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */ | |
1320 | ||
1321 | /* select chanel 1 for input and set sync level */ | |
1322 | write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); | |
1323 | write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3); | |
1324 | ||
1325 | /* allocate and pci_map memory, and initialize the DMA machine */ | |
1326 | buf = dt3155_get_buf(dt3155_free_bufs); | |
1327 | if (!buf) { | |
1328 | printk(KERN_ERR "dt3155: dt3155_get_buf " | |
1329 | "(in dt3155_init_board) failed\n"); | |
1330 | return -ENOMEM; | |
1331 | } | |
1332 | buf->dma = pci_map_single(dev, buf->cpu, | |
1333 | DT3155_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
1334 | if (pci_dma_mapping_error(dev, buf->dma)) { | |
1335 | printk(KERN_ERR "dt3155: pci_map_single failed\n"); | |
1336 | dt3155_put_buf(buf, dt3155_free_bufs); | |
1337 | return -ENOMEM; | |
1338 | } | |
1339 | iowrite32(buf->dma, pd->regs + EVEN_DMA_START); | |
1340 | iowrite32(buf->dma, pd->regs + ODD_DMA_START); | |
1341 | iowrite32(0, pd->regs + EVEN_DMA_STRIDE); | |
1342 | iowrite32(0, pd->regs + ODD_DMA_STRIDE); | |
1343 | ||
1344 | /* Perform a pseudo even field acquire */ | |
1345 | iowrite32(FIFO_EN | SRST | CAP_CONT_ODD, pd->regs + CSR1); | |
1346 | write_i2c_reg(pd->regs, CSR2, pd->csr2 | SYNC_SNTL); | |
1347 | write_i2c_reg(pd->regs, CONFIG, pd->config); | |
1348 | write_i2c_reg(pd->regs, EVEN_CSR, CSR_SNGL); | |
1349 | write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | SYNC_SNTL); | |
1350 | msleep(100); | |
1351 | read_i2c_reg(pd->regs, CSR2, &tmp); | |
1352 | write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE); | |
1353 | write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE); | |
1354 | write_i2c_reg(pd->regs, CSR2, pd->csr2); | |
1355 | iowrite32(FIFO_EN | SRST | FLD_DN_EVEN | FLD_DN_ODD, pd->regs + CSR1); | |
1356 | ||
1357 | /* pci_unmap and deallocate memory */ | |
1358 | pci_unmap_single(dev, buf->dma, DT3155_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
1359 | dt3155_put_buf(buf, dt3155_free_bufs); | |
1360 | if (tmp & BUSY_EVEN) { | |
1361 | printk(KERN_ERR "dt3155: BUSY_EVEN not cleared\n"); | |
1362 | return -EIO; | |
1363 | } | |
1364 | return 0; | |
1365 | } | |
1366 | ||
1367 | static struct video_device dt3155_vdev = { | |
1368 | .name = DT3155_NAME, | |
1369 | .fops = &dt3155_fops, | |
1370 | .ioctl_ops = &dt3155_ioctl_ops, | |
1371 | .minor = -1, | |
1372 | .release = video_device_release, | |
1373 | .tvnorms = V4L2_STD_ALL, | |
1374 | .current_norm = DT3155_CURRENT_NORM, | |
1375 | }; | |
1376 | ||
1377 | static int __devinit | |
1378 | dt3155_probe(struct pci_dev *dev, const struct pci_device_id *id) | |
1379 | { | |
1380 | int err = -ENODEV; | |
1381 | struct dt3155_priv *pd; | |
1382 | ||
1383 | printk(KERN_INFO "dt3155: probe()\n"); | |
1384 | if (pci_set_dma_mask(dev, DMA_BIT_MASK(32))) { | |
1385 | printk(KERN_ERR "dt3155: cannot set dma_mask\n"); | |
1386 | return -ENODEV; | |
1387 | } | |
1388 | pd = kzalloc(sizeof(*pd), GFP_KERNEL); | |
1389 | if (!pd) { | |
1390 | printk(KERN_ERR "dt3155: cannot allocate dt3155_priv\n"); | |
1391 | return -ENOMEM; | |
1392 | } | |
1393 | pd->vdev = video_device_alloc(); | |
1394 | if (!pd->vdev) { | |
1395 | printk(KERN_ERR "dt3155: cannot allocate vdp structure\n"); | |
1396 | goto err_video_device_alloc; | |
1397 | } | |
1398 | *pd->vdev = dt3155_vdev; | |
1399 | pci_set_drvdata(dev, pd); /* for use in dt3155_remove() */ | |
1400 | video_set_drvdata(pd->vdev, pd); /* for use in video_fops */ | |
1401 | pd->users = 0; | |
1402 | pd->acq_fp = NULL; | |
1403 | pd->pdev = dev; | |
1404 | INIT_LIST_HEAD(&pd->dmaq); | |
1405 | init_waitqueue_head(&pd->do_dma); | |
1406 | mutex_init(&pd->mux); | |
1407 | pd->csr2 = csr2_init; | |
1408 | pd->config = config_init; | |
1409 | err = pci_enable_device(pd->pdev); | |
1410 | if (err) { | |
1411 | printk(KERN_ERR "dt3155: pci_dev not enabled\n"); | |
1412 | goto err_enable_dev; | |
1413 | } | |
1414 | err = pci_request_region(pd->pdev, 0, pci_name(pd->pdev)); | |
1415 | if (err) | |
1416 | goto err_req_region; | |
1417 | pd->regs = pci_iomap(pd->pdev, 0, pci_resource_len(pd->pdev, 0)); | |
1418 | if (!pd->regs) { | |
1419 | err = -ENOMEM; | |
1420 | printk(KERN_ERR "dt3155: pci_iomap failed\n"); | |
1421 | goto err_pci_iomap; | |
1422 | } | |
1423 | err = dt3155_init_board(pd->pdev); | |
1424 | if (err) { | |
1425 | printk(KERN_ERR "dt3155: dt3155_init_board failed\n"); | |
1426 | goto err_init_board; | |
1427 | } | |
1428 | err = video_register_device(pd->vdev, VFL_TYPE_GRABBER, -1); | |
1429 | if (err) { | |
1430 | printk(KERN_ERR "dt3155: Cannot register video device\n"); | |
1431 | goto err_init_board; | |
1432 | } | |
1433 | printk(KERN_INFO "dt3155: /dev/video%i is ready\n", pd->vdev->minor); | |
1434 | return 0; /* success */ | |
1435 | ||
1436 | err_init_board: | |
1437 | pci_iounmap(pd->pdev, pd->regs); | |
1438 | err_pci_iomap: | |
1439 | pci_release_region(pd->pdev, 0); | |
1440 | err_req_region: | |
1441 | pci_disable_device(pd->pdev); | |
1442 | err_enable_dev: | |
1443 | video_device_release(pd->vdev); | |
1444 | err_video_device_alloc: | |
1445 | kfree(pd); | |
1446 | return err; | |
1447 | } | |
1448 | ||
1449 | static void __devexit | |
1450 | dt3155_remove(struct pci_dev *dev) | |
1451 | { | |
1452 | struct dt3155_priv *pd = pci_get_drvdata(dev); | |
1453 | ||
1454 | printk(KERN_INFO "dt3155: remove()\n"); | |
1455 | video_unregister_device(pd->vdev); | |
1456 | pci_iounmap(dev, pd->regs); | |
1457 | pci_release_region(pd->pdev, 0); | |
1458 | pci_disable_device(pd->pdev); | |
1459 | /* | |
1460 | * video_device_release() is invoked automatically | |
1461 | * see: struct video_device dt3155_vdev | |
1462 | */ | |
1463 | kfree(pd); | |
1464 | } | |
1465 | ||
1466 | static DEFINE_PCI_DEVICE_TABLE(pci_ids) = { | |
1467 | { PCI_DEVICE(DT3155_VENDOR_ID, DT3155_DEVICE_ID) }, | |
1468 | { 0, /* zero marks the end */ }, | |
1469 | }; | |
1470 | MODULE_DEVICE_TABLE(pci, pci_ids); | |
1471 | ||
1472 | static struct pci_driver pci_driver = { | |
1473 | .name = DT3155_NAME, | |
1474 | .id_table = pci_ids, | |
1475 | .probe = dt3155_probe, | |
1476 | .remove = __devexit_p(dt3155_remove), | |
1477 | }; | |
1478 | ||
1479 | static int __init | |
1480 | dt3155_init_module(void) | |
1481 | { | |
1482 | int err; | |
1483 | ||
1484 | printk(KERN_INFO "dt3155: ==================\n"); | |
1485 | printk(KERN_INFO "dt3155: init()\n"); | |
1486 | dt3155_chunks = dt3155_init_chunks_fifo(); | |
1487 | if (!dt3155_chunks) { | |
1488 | err = -ENOMEM; | |
1489 | printk(KERN_ERR "dt3155: cannot init dt3155_chunks_fifo\n"); | |
1490 | goto err_init_chunks_fifo; | |
1491 | } | |
1492 | dt3155_free_bufs = dt3155_init_ibufs_fifo(dt3155_chunks, | |
1493 | DT3155_BUF_SIZE); | |
1494 | if (!dt3155_free_bufs) { | |
1495 | err = -ENOMEM; | |
1496 | printk(KERN_ERR "dt3155: cannot dt3155_init_ibufs_fifo\n"); | |
1497 | goto err_init_ibufs_fifo; | |
1498 | } | |
1499 | dt3155_alloc_bufs = dt3155_init_fifo(); | |
1500 | if (!dt3155_alloc_bufs) { | |
1501 | err = -ENOMEM; | |
1502 | printk(KERN_ERR "dt3155: cannot dt3155_init_fifo\n"); | |
1503 | goto err_init_fifo; | |
1504 | } | |
1505 | err = pci_register_driver(&pci_driver); | |
1506 | if (err) { | |
1507 | printk(KERN_ERR "dt3155: cannot register pci_driver\n"); | |
1508 | goto err_register_driver; | |
1509 | } | |
1510 | return 0; /* succes */ | |
1511 | err_register_driver: | |
1512 | dt3155_free_fifo(dt3155_alloc_bufs); | |
1513 | err_init_fifo: | |
1514 | dt3155_free_ibufs_fifo(dt3155_free_bufs); | |
1515 | err_init_ibufs_fifo: | |
1516 | dt3155_free_chunks_fifo(dt3155_chunks); | |
1517 | err_init_chunks_fifo: | |
1518 | return err; | |
1519 | } | |
1520 | ||
1521 | static void __exit | |
1522 | dt3155_exit_module(void) | |
1523 | { | |
1524 | pci_unregister_driver(&pci_driver); | |
1525 | dt3155_free_fifo(dt3155_alloc_bufs); | |
1526 | dt3155_free_ibufs_fifo(dt3155_free_bufs); | |
1527 | dt3155_free_chunks_fifo(dt3155_chunks); | |
1528 | printk(KERN_INFO "dt3155: exit()\n"); | |
1529 | printk(KERN_INFO "dt3155: ==================\n"); | |
1530 | } | |
1531 | ||
1532 | module_init(dt3155_init_module); | |
1533 | module_exit(dt3155_exit_module); | |
1534 | ||
1535 | MODULE_DESCRIPTION("video4linux pci-driver for dt3155 frame grabber"); | |
1536 | MODULE_AUTHOR("Marin Mitov <mitov@issp.bas.bg>"); | |
1537 | MODULE_VERSION(DT3155_VERSION); | |
1538 | MODULE_LICENSE("GPL"); |