[deliverable/linux.git] / drivers / staging / goldfish / goldfish_nand.c

/*
 * drivers/mtd/devices/goldfish_nand.c
 *
 * Copyright (C) 2007 Google, Inc.
 * Copyright (C) 2012 Intel, Inc.
 * Copyright (C) 2013 Intel, Inc.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

#include <linux/io.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/vmalloc.h>
#include <linux/mtd/mtd.h>
#include <linux/platform_device.h>

#include <asm/div64.h>

#include "goldfish_nand_reg.h"

struct goldfish_nand {
	spinlock_t              lock;
	unsigned char __iomem  *base;
	struct cmd_params       *cmd_params;
	size_t                  mtd_count;
	struct mtd_info         mtd[0];
};

static u32 goldfish_nand_cmd_with_params(struct mtd_info *mtd,
			enum nand_cmd cmd, u64 addr, u32 len,
			void *ptr, u32 *rv)
{
	u32 cmdp;
	struct goldfish_nand *nand = mtd->priv;
	struct cmd_params *cps = nand->cmd_params;
	unsigned char __iomem  *base = nand->base;

	if (cps == NULL)
		return -1;

	switch (cmd) {
	case NAND_CMD_ERASE:
		cmdp = NAND_CMD_ERASE_WITH_PARAMS;
		break;
	case NAND_CMD_READ:
		cmdp = NAND_CMD_READ_WITH_PARAMS;
		break;
	case NAND_CMD_WRITE:
		cmdp = NAND_CMD_WRITE_WITH_PARAMS;
		break;
	default:
		return -1;
	}
	cps->dev = mtd - nand->mtd;
	cps->addr_high = (u32)(addr >> 32);
	cps->addr_low = (u32)addr;
	cps->transfer_size = len;
	cps->data = (u32)ptr;
	writel(cmdp, base + NAND_COMMAND);
	*rv = cps->result;
	return 0;
}

static u32 goldfish_nand_cmd(struct mtd_info *mtd, enum nand_cmd cmd,
				u64 addr, u32 len, void *ptr)
{
	struct goldfish_nand *nand = mtd->priv;
	u32 rv;
	unsigned long irq_flags;
	unsigned char __iomem  *base = nand->base;

	spin_lock_irqsave(&nand->lock, irq_flags);
	if (goldfish_nand_cmd_with_params(mtd, cmd, addr, len, ptr, &rv)) {
		writel(mtd - nand->mtd, base + NAND_DEV);
		writel((u32)(addr >> 32), base + NAND_ADDR_HIGH);
		writel((u32)addr, base + NAND_ADDR_LOW);
		writel(len, base + NAND_TRANSFER_SIZE);
		writel((u32)ptr, base + NAND_DATA);
		writel(cmd, base + NAND_COMMAND);
		rv = readl(base + NAND_RESULT);
	}
	spin_unlock_irqrestore(&nand->lock, irq_flags);
	return rv;
}

static int goldfish_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
{
	loff_t ofs = instr->addr;
	u32 len = instr->len;
	u32 rem;

	if (ofs + len > mtd->size)
		goto invalid_arg;
	rem = do_div(ofs, mtd->writesize);
	if (rem)
		goto invalid_arg;
	ofs *= (mtd->writesize + mtd->oobsize);

	if (len % mtd->writesize)
		goto invalid_arg;
	len = len / mtd->writesize * (mtd->writesize + mtd->oobsize);

	if (goldfish_nand_cmd(mtd, NAND_CMD_ERASE, ofs, len, NULL) != len) {
		pr_err("goldfish_nand_erase: erase failed, start %llx, len %x, dev_size %llx, erase_size %x\n",
			ofs, len, mtd->size, mtd->erasesize);
		return -EIO;
	}

	instr->state = MTD_ERASE_DONE;
	mtd_erase_callback(instr);

	return 0;

invalid_arg:
	pr_err("goldfish_nand_erase: invalid erase, start %llx, len %x, dev_size %llx, erase_size %x\n",
		ofs, len, mtd->size, mtd->erasesize);
	return -EINVAL;
}

static int goldfish_nand_read_oob(struct mtd_info *mtd, loff_t ofs,
				struct mtd_oob_ops *ops)
{
	u32 rem;

	if (ofs + ops->len > mtd->size)
		goto invalid_arg;
	if (ops->datbuf && ops->len && ops->len != mtd->writesize)
		goto invalid_arg;
	if (ops->ooblen + ops->ooboffs > mtd->oobsize)
		goto invalid_arg;

	rem = do_div(ofs, mtd->writesize);
	if (rem)
		goto invalid_arg;
	ofs *= (mtd->writesize + mtd->oobsize);

	if (ops->datbuf)
		ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
						ops->len, ops->datbuf);
	ofs += mtd->writesize + ops->ooboffs;
	if (ops->oobbuf)
		ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
						ops->ooblen, ops->oobbuf);
	return 0;

invalid_arg:
	pr_err("goldfish_nand_read_oob: invalid read, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
		ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
	return -EINVAL;
}

static int goldfish_nand_write_oob(struct mtd_info *mtd, loff_t ofs,
				struct mtd_oob_ops *ops)
{
	u32 rem;

	if (ofs + ops->len > mtd->size)
		goto invalid_arg;
	if (ops->len && ops->len != mtd->writesize)
		goto invalid_arg;
	if (ops->ooblen + ops->ooboffs > mtd->oobsize)
		goto invalid_arg;

	rem = do_div(ofs, mtd->writesize);
	if (rem)
		goto invalid_arg;
	ofs *= (mtd->writesize + mtd->oobsize);

	if (ops->datbuf)
		ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
						ops->len, ops->datbuf);
	ofs += mtd->writesize + ops->ooboffs;
	if (ops->oobbuf)
		ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
						ops->ooblen, ops->oobbuf);
	return 0;

invalid_arg:
	pr_err("goldfish_nand_write_oob: invalid write, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
		ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
	return -EINVAL;
}

static int goldfish_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
				size_t *retlen, u_char *buf)
{
	u32 rem;

	if (from + len > mtd->size)
		goto invalid_arg;
	if (len != mtd->writesize)
		goto invalid_arg;

	rem = do_div(from, mtd->writesize);
	if (rem)
		goto invalid_arg;
	from *= (mtd->writesize + mtd->oobsize);

	*retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, from, len, buf);
	return 0;

invalid_arg:
	pr_err("goldfish_nand_read: invalid read, start %llx, len %zx, dev_size %llx, write_size %x\n",
		from, len, mtd->size, mtd->writesize);
	return -EINVAL;
}

static int goldfish_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
				size_t *retlen, const u_char *buf)
{
	u32 rem;

	if (to + len > mtd->size)
		goto invalid_arg;
	if (len != mtd->writesize)
		goto invalid_arg;

	rem = do_div(to, mtd->writesize);
	if (rem)
		goto invalid_arg;
	to *= (mtd->writesize + mtd->oobsize);

	*retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, to, len, (void *)buf);
	return 0;

invalid_arg:
	pr_err("goldfish_nand_write: invalid write, start %llx, len %zx, dev_size %llx, write_size %x\n",
		to, len, mtd->size, mtd->writesize);
	return -EINVAL;
}

static int goldfish_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
{
	u32 rem;

	if (ofs >= mtd->size)
		goto invalid_arg;

	rem = do_div(ofs, mtd->erasesize);
	if (rem)
		goto invalid_arg;
	ofs *= mtd->erasesize / mtd->writesize;
	ofs *= (mtd->writesize + mtd->oobsize);

	return goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_GET, ofs, 0, NULL);

invalid_arg:
	pr_err("goldfish_nand_block_isbad: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
		ofs, mtd->size, mtd->writesize);
	return -EINVAL;
}

static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
{
	u32 rem;

	if (ofs >= mtd->size)
		goto invalid_arg;

	rem = do_div(ofs, mtd->erasesize);
	if (rem)
		goto invalid_arg;
	ofs *= mtd->erasesize / mtd->writesize;
	ofs *= (mtd->writesize + mtd->oobsize);

	if (goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_SET, ofs, 0, NULL) != 1)
		return -EIO;
	return 0;

invalid_arg:
	pr_err("goldfish_nand_block_markbad: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
		ofs, mtd->size, mtd->writesize);
	return -EINVAL;
}

static int nand_setup_cmd_params(struct platform_device *pdev,
						struct goldfish_nand *nand)
{
	u64 paddr;
	unsigned char __iomem  *base = nand->base;

	nand->cmd_params = devm_kzalloc(&pdev->dev,
					sizeof(struct cmd_params), GFP_KERNEL);
	if (!nand->cmd_params)
		return -1;

	paddr = __pa(nand->cmd_params);
	writel((u32)(paddr >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);
	writel((u32)paddr, base + NAND_CMD_PARAMS_ADDR_LOW);
	return 0;
}

static int goldfish_nand_init_device(struct platform_device *pdev,
					struct goldfish_nand *nand, int id)
{
	u32 name_len;
	u32 result;
	u32 flags;
	unsigned long irq_flags;
	unsigned char __iomem  *base = nand->base;
	struct mtd_info *mtd = &nand->mtd[id];
	char *name;

	spin_lock_irqsave(&nand->lock, irq_flags);
	writel(id, base + NAND_DEV);
	flags = readl(base + NAND_DEV_FLAGS);
	name_len = readl(base + NAND_DEV_NAME_LEN);
	mtd->writesize = readl(base + NAND_DEV_PAGE_SIZE);
	mtd->size = readl(base + NAND_DEV_SIZE_LOW);
	mtd->size |= (u64)readl(base + NAND_DEV_SIZE_HIGH) << 32;
	mtd->oobsize = readl(base + NAND_DEV_EXTRA_SIZE);
	mtd->oobavail = mtd->oobsize;
	mtd->erasesize = readl(base + NAND_DEV_ERASE_SIZE) /
			(mtd->writesize + mtd->oobsize) * mtd->writesize;
	do_div(mtd->size, mtd->writesize + mtd->oobsize);
	mtd->size *= mtd->writesize;
	dev_dbg(&pdev->dev,
		"goldfish nand dev%d: size %llx, page %d, extra %d, erase %d\n",
		       id, mtd->size, mtd->writesize,
		       mtd->oobsize, mtd->erasesize);
	spin_unlock_irqrestore(&nand->lock, irq_flags);

	mtd->priv = nand;

	mtd->name = name = devm_kzalloc(&pdev->dev, name_len + 1, GFP_KERNEL);
	if (name == NULL)
		return -ENOMEM;

	result = goldfish_nand_cmd(mtd, NAND_CMD_GET_DEV_NAME, 0, name_len,
									name);
	if (result != name_len) {
		dev_err(&pdev->dev,
			"goldfish_nand_init_device failed to get dev name %d != %d\n",
			       result, name_len);
		return -ENODEV;
	}
	((char *) mtd->name)[name_len] = '\0';

	/* Setup the MTD structure */
	mtd->type = MTD_NANDFLASH;
	mtd->flags = MTD_CAP_NANDFLASH;
	if (flags & NAND_DEV_FLAG_READ_ONLY)
		mtd->flags &= ~MTD_WRITEABLE;
	if (flags & NAND_DEV_FLAG_CMD_PARAMS_CAP)
		nand_setup_cmd_params(pdev, nand);

	mtd->owner = THIS_MODULE;
	mtd->_erase = goldfish_nand_erase;
	mtd->_read = goldfish_nand_read;
	mtd->_write = goldfish_nand_write;
	mtd->_read_oob = goldfish_nand_read_oob;
	mtd->_write_oob = goldfish_nand_write_oob;
	mtd->_block_isbad = goldfish_nand_block_isbad;
	mtd->_block_markbad = goldfish_nand_block_markbad;

	if (mtd_device_register(mtd, NULL, 0))
		return -EIO;

	return 0;
}

static int goldfish_nand_probe(struct platform_device *pdev)
{
	u32 num_dev;
	int i;
	int err;
	u32 num_dev_working;
	u32 version;
	struct resource *r;
	struct goldfish_nand *nand;
	unsigned char __iomem  *base;

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (r == NULL)
		return -ENODEV;

	base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
	if (base == NULL)
		return -ENOMEM;

	version = readl(base + NAND_VERSION);
	if (version != NAND_VERSION_CURRENT) {
		dev_err(&pdev->dev,
			"goldfish_nand_init: version mismatch, got %d, expected %d\n",
				version, NAND_VERSION_CURRENT);
		return -ENODEV;
	}
	num_dev = readl(base + NAND_NUM_DEV);
	if (num_dev == 0)
		return -ENODEV;

	nand = devm_kzalloc(&pdev->dev, sizeof(*nand) +
				sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
	if (nand == NULL)
		return -ENOMEM;

	spin_lock_init(&nand->lock);
	nand->base = base;
	nand->mtd_count = num_dev;
	platform_set_drvdata(pdev, nand);

	num_dev_working = 0;
	for (i = 0; i < num_dev; i++) {
		err = goldfish_nand_init_device(pdev, nand, i);
		if (err == 0)
			num_dev_working++;
	}
	if (num_dev_working == 0)
		return -ENODEV;
	return 0;
}

static int goldfish_nand_remove(struct platform_device *pdev)
{
	struct goldfish_nand *nand = platform_get_drvdata(pdev);
	int i;
	for (i = 0; i < nand->mtd_count; i++) {
		if (nand->mtd[i].name)
			mtd_device_unregister(&nand->mtd[i]);
	}
	return 0;
}

static struct platform_driver goldfish_nand_driver = {
	.probe		= goldfish_nand_probe,
	.remove		= goldfish_nand_remove,
	.driver = {
		.name = "goldfish_nand"
	}
};

module_platform_driver(goldfish_nand_driver);
MODULE_LICENSE("GPL");
Commit	Line	Data
8e404fff AH	1	/*
	2	* drivers/mtd/devices/goldfish_nand.c
	3	*
	4	* Copyright (C) 2007 Google, Inc.
	5	* Copyright (C) 2012 Intel, Inc.
	6	* Copyright (C) 2013 Intel, Inc.
	7	*
	8	* This software is licensed under the terms of the GNU General Public
	9	* License version 2, as published by the Free Software Foundation, and
	10	* may be copied, distributed, and modified under those terms.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	*/
	18
	19	#include <linux/io.h>
	20	#include <linux/device.h>
	21	#include <linux/module.h>
	22	#include <linux/slab.h>
	23	#include <linux/ioport.h>
	24	#include <linux/vmalloc.h>
8e404fff AH	25	#include <linux/mtd/mtd.h>
	26	#include <linux/platform_device.h>
	27
	28	#include <asm/div64.h>
	29
	30	#include "goldfish_nand_reg.h"
	31
	32	struct goldfish_nand {
	33	spinlock_t lock;
	34	unsigned char __iomem *base;
	35	struct cmd_params *cmd_params;
	36	size_t mtd_count;
	37	struct mtd_info mtd[0];
	38	};
	39
	40	static u32 goldfish_nand_cmd_with_params(struct mtd_info *mtd,
	41	enum nand_cmd cmd, u64 addr, u32 len,
	42	void ptr, u32 rv)
	43	{
	44	u32 cmdp;
	45	struct goldfish_nand *nand = mtd->priv;
	46	struct cmd_params *cps = nand->cmd_params;
	47	unsigned char __iomem *base = nand->base;
	48
	49	if (cps == NULL)
	50	return -1;
	51
	52	switch (cmd) {
	53	case NAND_CMD_ERASE:
	54	cmdp = NAND_CMD_ERASE_WITH_PARAMS;
	55	break;
	56	case NAND_CMD_READ:
	57	cmdp = NAND_CMD_READ_WITH_PARAMS;
	58	break;
	59	case NAND_CMD_WRITE:
	60	cmdp = NAND_CMD_WRITE_WITH_PARAMS;
	61	break;
	62	default:
	63	return -1;
	64	}
	65	cps->dev = mtd - nand->mtd;
	66	cps->addr_high = (u32)(addr >> 32);
	67	cps->addr_low = (u32)addr;
	68	cps->transfer_size = len;
	69	cps->data = (u32)ptr;
	70	writel(cmdp, base + NAND_COMMAND);
	71	*rv = cps->result;
	72	return 0;
	73	}
	74
	75	static u32 goldfish_nand_cmd(struct mtd_info *mtd, enum nand_cmd cmd,
	76	u64 addr, u32 len, void *ptr)
	77	{
	78	struct goldfish_nand *nand = mtd->priv;
	79	u32 rv;
	80	unsigned long irq_flags;
	81	unsigned char __iomem *base = nand->base;
	82
	83	spin_lock_irqsave(&nand->lock, irq_flags);
	84	if (goldfish_nand_cmd_with_params(mtd, cmd, addr, len, ptr, &rv)) {
	85	writel(mtd - nand->mtd, base + NAND_DEV);
	86	writel((u32)(addr >> 32), base + NAND_ADDR_HIGH);
	87	writel((u32)addr, base + NAND_ADDR_LOW);
	88	writel(len, base + NAND_TRANSFER_SIZE);
89	writel((u32)ptr, base + NAND_DATA);
90	writel(cmd, base + NAND_COMMAND);
91	rv = readl(base + NAND_RESULT);
92	}
93	spin_unlock_irqrestore(&nand->lock, irq_flags);
94	return rv;
95	}
96
97	static int goldfish_nand_erase(struct mtd_info mtd, struct erase_info instr)
98	{
99	loff_t ofs = instr->addr;
100	u32 len = instr->len;
101	u32 rem;
102
103	if (ofs + len > mtd->size)
104	goto invalid_arg;
105	rem = do_div(ofs, mtd->writesize);
106	if (rem)
107	goto invalid_arg;
108	ofs *= (mtd->writesize + mtd->oobsize);
109
110	if (len % mtd->writesize)
111	goto invalid_arg;
112	len = len / mtd->writesize * (mtd->writesize + mtd->oobsize);
113
114	if (goldfish_nand_cmd(mtd, NAND_CMD_ERASE, ofs, len, NULL) != len) {
115	pr_err("goldfish_nand_erase: erase failed, start %llx, len %x, dev_size %llx, erase_size %x\n",
116	ofs, len, mtd->size, mtd->erasesize);
117	return -EIO;
118	}
119
120	instr->state = MTD_ERASE_DONE;
121	mtd_erase_callback(instr);
122
123	return 0;
124
125	invalid_arg:
126	pr_err("goldfish_nand_erase: invalid erase, start %llx, len %x, dev_size %llx, erase_size %x\n",
127	ofs, len, mtd->size, mtd->erasesize);
128	return -EINVAL;
129	}
130
131	static int goldfish_nand_read_oob(struct mtd_info *mtd, loff_t ofs,
132	struct mtd_oob_ops *ops)
133	{
134	u32 rem;
135
136	if (ofs + ops->len > mtd->size)
137	goto invalid_arg;
138	if (ops->datbuf && ops->len && ops->len != mtd->writesize)
139	goto invalid_arg;
140	if (ops->ooblen + ops->ooboffs > mtd->oobsize)
141	goto invalid_arg;
142
143	rem = do_div(ofs, mtd->writesize);
144	if (rem)
145	goto invalid_arg;
146	ofs *= (mtd->writesize + mtd->oobsize);
147
148	if (ops->datbuf)
149	ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
150	ops->len, ops->datbuf);
151	ofs += mtd->writesize + ops->ooboffs;
152	if (ops->oobbuf)
153	ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
154	ops->ooblen, ops->oobbuf);
155	return 0;
156
157	invalid_arg:
b4fcf48a	158	pr_err("goldfish_nand_read_oob: invalid read, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
8e404fff AH	159	ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
	160	return -EINVAL;
	161	}
	162
	163	static int goldfish_nand_write_oob(struct mtd_info *mtd, loff_t ofs,
	164	struct mtd_oob_ops *ops)
	165	{
	166	u32 rem;
	167
	168	if (ofs + ops->len > mtd->size)
	169	goto invalid_arg;
	170	if (ops->len && ops->len != mtd->writesize)
	171	goto invalid_arg;
	172	if (ops->ooblen + ops->ooboffs > mtd->oobsize)
	173	goto invalid_arg;
	174
	175	rem = do_div(ofs, mtd->writesize);
	176	if (rem)
	177	goto invalid_arg;
	178	ofs *= (mtd->writesize + mtd->oobsize);
	179
	180	if (ops->datbuf)
	181	ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
	182	ops->len, ops->datbuf);
	183	ofs += mtd->writesize + ops->ooboffs;
	184	if (ops->oobbuf)
	185	ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
	186	ops->ooblen, ops->oobbuf);
	187	return 0;
	188
	189	invalid_arg:
b4fcf48a	190	pr_err("goldfish_nand_write_oob: invalid write, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
8e404fff AH	191	ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
	192	return -EINVAL;
	193	}
	194
	195	static int goldfish_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
	196	size_t retlen, u_char buf)
	197	{
	198	u32 rem;
	199
	200	if (from + len > mtd->size)
	201	goto invalid_arg;
	202	if (len != mtd->writesize)
	203	goto invalid_arg;
	204
	205	rem = do_div(from, mtd->writesize);
	206	if (rem)
	207	goto invalid_arg;
	208	from *= (mtd->writesize + mtd->oobsize);
	209
	210	*retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, from, len, buf);
	211	return 0;
	212
	213	invalid_arg:
b4fcf48a	214	pr_err("goldfish_nand_read: invalid read, start %llx, len %zx, dev_size %llx, write_size %x\n",
8e404fff AH	215	from, len, mtd->size, mtd->writesize);
	216	return -EINVAL;
	217	}
	218
	219	static int goldfish_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
	220	size_t retlen, const u_char buf)
	221	{
	222	u32 rem;
	223
	224	if (to + len > mtd->size)
	225	goto invalid_arg;
	226	if (len != mtd->writesize)
	227	goto invalid_arg;
	228
	229	rem = do_div(to, mtd->writesize);
	230	if (rem)
	231	goto invalid_arg;
	232	to *= (mtd->writesize + mtd->oobsize);
	233
	234	retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, to, len, (void )buf);
	235	return 0;
	236
	237	invalid_arg:
b4fcf48a	238	pr_err("goldfish_nand_write: invalid write, start %llx, len %zx, dev_size %llx, write_size %x\n",
8e404fff AH	239	to, len, mtd->size, mtd->writesize);
	240	return -EINVAL;
	241	}
	242
	243	static int goldfish_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
	244	{
	245	u32 rem;
	246
	247	if (ofs >= mtd->size)
	248	goto invalid_arg;
	249
	250	rem = do_div(ofs, mtd->erasesize);
	251	if (rem)
	252	goto invalid_arg;
	253	ofs *= mtd->erasesize / mtd->writesize;
	254	ofs *= (mtd->writesize + mtd->oobsize);
	255
	256	return goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_GET, ofs, 0, NULL);
	257
	258	invalid_arg:
	259	pr_err("goldfish_nand_block_isbad: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
	260	ofs, mtd->size, mtd->writesize);
	261	return -EINVAL;
	262	}
	263
	264	static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
	265	{
	266	u32 rem;
	267
	268	if (ofs >= mtd->size)
	269	goto invalid_arg;
	270
	271	rem = do_div(ofs, mtd->erasesize);
	272	if (rem)
	273	goto invalid_arg;
	274	ofs *= mtd->erasesize / mtd->writesize;
	275	ofs *= (mtd->writesize + mtd->oobsize);
	276
	277	if (goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_SET, ofs, 0, NULL) != 1)
	278	return -EIO;
	279	return 0;
	280
	281	invalid_arg:
	282	pr_err("goldfish_nand_block_markbad: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
	283	ofs, mtd->size, mtd->writesize);
	284	return -EINVAL;
	285	}
	286
	287	static int nand_setup_cmd_params(struct platform_device *pdev,
	288	struct goldfish_nand *nand)
	289	{
	290	u64 paddr;
	291	unsigned char __iomem *base = nand->base;
	292
	293	nand->cmd_params = devm_kzalloc(&pdev->dev,
	294	sizeof(struct cmd_params), GFP_KERNEL);
	295	if (!nand->cmd_params)
	296	return -1;
	297
	298	paddr = __pa(nand->cmd_params);
	299	writel((u32)(paddr >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);
	300	writel((u32)paddr, base + NAND_CMD_PARAMS_ADDR_LOW);
	301	return 0;
	302	}
303
304	static int goldfish_nand_init_device(struct platform_device *pdev,
305	struct goldfish_nand *nand, int id)
306	{
307	u32 name_len;
308	u32 result;
309	u32 flags;
310	unsigned long irq_flags;
311	unsigned char __iomem *base = nand->base;
312	struct mtd_info *mtd = &nand->mtd[id];
313	char *name;
314
315	spin_lock_irqsave(&nand->lock, irq_flags);
316	writel(id, base + NAND_DEV);
317	flags = readl(base + NAND_DEV_FLAGS);
318	name_len = readl(base + NAND_DEV_NAME_LEN);
319	mtd->writesize = readl(base + NAND_DEV_PAGE_SIZE);
320	mtd->size = readl(base + NAND_DEV_SIZE_LOW);
321	mtd->size \|= (u64)readl(base + NAND_DEV_SIZE_HIGH) << 32;
322	mtd->oobsize = readl(base + NAND_DEV_EXTRA_SIZE);
323	mtd->oobavail = mtd->oobsize;
324	mtd->erasesize = readl(base + NAND_DEV_ERASE_SIZE) /
325	(mtd->writesize + mtd->oobsize) * mtd->writesize;
326	do_div(mtd->size, mtd->writesize + mtd->oobsize);
327	mtd->size *= mtd->writesize;
36270be3	328	dev_dbg(&pdev->dev,
8e404fff	329	"goldfish nand dev%d: size %llx, page %d, extra %d, erase %d\n",
13aa4016 HP	330	id, mtd->size, mtd->writesize,
13aa4016 HP	331	mtd->oobsize, mtd->erasesize);
8e404fff AH	332	spin_unlock_irqrestore(&nand->lock, irq_flags);
	333
	334	mtd->priv = nand;
	335
	336	mtd->name = name = devm_kzalloc(&pdev->dev, name_len + 1, GFP_KERNEL);
	337	if (name == NULL)
	338	return -ENOMEM;
	339
	340	result = goldfish_nand_cmd(mtd, NAND_CMD_GET_DEV_NAME, 0, name_len,
	341	name);
	342	if (result != name_len) {
36270be3	343	dev_err(&pdev->dev,
8e404fff AH	344	"goldfish_nand_init_device failed to get dev name %d != %d\n",
	345	result, name_len);
	346	return -ENODEV;
	347	}
	348	((char *) mtd->name)[name_len] = '\0';
	349
	350	/* Setup the MTD structure */
	351	mtd->type = MTD_NANDFLASH;
	352	mtd->flags = MTD_CAP_NANDFLASH;
	353	if (flags & NAND_DEV_FLAG_READ_ONLY)
	354	mtd->flags &= ~MTD_WRITEABLE;
	355	if (flags & NAND_DEV_FLAG_CMD_PARAMS_CAP)
	356	nand_setup_cmd_params(pdev, nand);
	357
	358	mtd->owner = THIS_MODULE;
	359	mtd->_erase = goldfish_nand_erase;
	360	mtd->_read = goldfish_nand_read;
	361	mtd->_write = goldfish_nand_write;
	362	mtd->_read_oob = goldfish_nand_read_oob;
	363	mtd->_write_oob = goldfish_nand_write_oob;
	364	mtd->_block_isbad = goldfish_nand_block_isbad;
	365	mtd->_block_markbad = goldfish_nand_block_markbad;
	366
	367	if (mtd_device_register(mtd, NULL, 0))
	368	return -EIO;
	369
	370	return 0;
	371	}
	372
	373	static int goldfish_nand_probe(struct platform_device *pdev)
	374	{
	375	u32 num_dev;
	376	int i;
	377	int err;
	378	u32 num_dev_working;
	379	u32 version;
	380	struct resource *r;
	381	struct goldfish_nand *nand;
	382	unsigned char __iomem *base;
	383
	384	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	385	if (r == NULL)
	386	return -ENODEV;
	387
	388	base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
	389	if (base == NULL)
	390	return -ENOMEM;
	391
	392	version = readl(base + NAND_VERSION);
	393	if (version != NAND_VERSION_CURRENT) {
36270be3	394	dev_err(&pdev->dev,
8e404fff AH	395	"goldfish_nand_init: version mismatch, got %d, expected %d\n",
	396	version, NAND_VERSION_CURRENT);
	397	return -ENODEV;
	398	}
	399	num_dev = readl(base + NAND_NUM_DEV);
	400	if (num_dev == 0)
	401	return -ENODEV;
	402
36270be3	403	nand = devm_kzalloc(&pdev->dev, sizeof(*nand) +
8e404fff AH	404	sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
	405	if (nand == NULL)
	406	return -ENOMEM;
	407
	408	spin_lock_init(&nand->lock);
	409	nand->base = base;
	410	nand->mtd_count = num_dev;
	411	platform_set_drvdata(pdev, nand);
	412
	413	num_dev_working = 0;
	414	for (i = 0; i < num_dev; i++) {
	415	err = goldfish_nand_init_device(pdev, nand, i);
	416	if (err == 0)
	417	num_dev_working++;
	418	}
	419	if (num_dev_working == 0)
	420	return -ENODEV;
	421	return 0;
	422	}
	423
	424	static int goldfish_nand_remove(struct platform_device *pdev)
	425	{
	426	struct goldfish_nand *nand = platform_get_drvdata(pdev);
	427	int i;
	428	for (i = 0; i < nand->mtd_count; i++) {
	429	if (nand->mtd[i].name)
	430	mtd_device_unregister(&nand->mtd[i]);
	431	}
	432	return 0;
	433	}
	434
	435	static struct platform_driver goldfish_nand_driver = {
	436	.probe = goldfish_nand_probe,
	437	.remove = goldfish_nand_remove,
	438	.driver = {
	439	.name = "goldfish_nand"
	440	}
	441	};
	442
	443	module_platform_driver(goldfish_nand_driver);
	444	MODULE_LICENSE("GPL");