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bb6f19ea BS |
1 | /* |
2 | * ADIS16204 Programmable High-g Digital Impact Sensor and Recorder | |
3 | * | |
4 | * Copyright 2010 Analog Devices Inc. | |
5 | * | |
6 | * Licensed under the GPL-2 or later. | |
7 | */ | |
8 | ||
9 | #include <linux/interrupt.h> | |
10 | #include <linux/irq.h> | |
11 | #include <linux/gpio.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/mutex.h> | |
14 | #include <linux/device.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/spi/spi.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/sysfs.h> | |
19 | #include <linux/list.h> | |
99c97852 | 20 | #include <linux/module.h> |
bb6f19ea BS |
21 | |
22 | #include "../iio.h" | |
23 | #include "../sysfs.h" | |
ad3eb9ab | 24 | #include "../ring_generic.h" |
bb6f19ea BS |
25 | |
26 | #include "adis16204.h" | |
27 | ||
28 | #define DRIVER_NAME "adis16204" | |
29 | ||
bb6f19ea BS |
30 | /** |
31 | * adis16204_spi_write_reg_8() - write single byte to a register | |
32 | * @dev: device associated with child of actual device (iio_dev or iio_trig) | |
33 | * @reg_address: the address of the register to be written | |
34 | * @val: the value to write | |
35 | **/ | |
ad3eb9ab | 36 | static int adis16204_spi_write_reg_8(struct iio_dev *indio_dev, |
bb6f19ea BS |
37 | u8 reg_address, |
38 | u8 val) | |
39 | { | |
40 | int ret; | |
4de66bbb | 41 | struct adis16204_state *st = iio_priv(indio_dev); |
bb6f19ea BS |
42 | |
43 | mutex_lock(&st->buf_lock); | |
44 | st->tx[0] = ADIS16204_WRITE_REG(reg_address); | |
45 | st->tx[1] = val; | |
46 | ||
47 | ret = spi_write(st->us, st->tx, 2); | |
48 | mutex_unlock(&st->buf_lock); | |
49 | ||
50 | return ret; | |
51 | } | |
52 | ||
53 | /** | |
54 | * adis16204_spi_write_reg_16() - write 2 bytes to a pair of registers | |
ad3eb9ab | 55 | * @indio_dev: iio device associated with child of actual device |
bb6f19ea BS |
56 | * @reg_address: the address of the lower of the two registers. Second register |
57 | * is assumed to have address one greater. | |
58 | * @val: value to be written | |
59 | **/ | |
ad3eb9ab | 60 | static int adis16204_spi_write_reg_16(struct iio_dev *indio_dev, |
bb6f19ea BS |
61 | u8 lower_reg_address, |
62 | u16 value) | |
63 | { | |
64 | int ret; | |
65 | struct spi_message msg; | |
4de66bbb | 66 | struct adis16204_state *st = iio_priv(indio_dev); |
bb6f19ea BS |
67 | struct spi_transfer xfers[] = { |
68 | { | |
69 | .tx_buf = st->tx, | |
70 | .bits_per_word = 8, | |
71 | .len = 2, | |
72 | .cs_change = 1, | |
73 | }, { | |
74 | .tx_buf = st->tx + 2, | |
75 | .bits_per_word = 8, | |
76 | .len = 2, | |
77 | .cs_change = 1, | |
78 | }, | |
79 | }; | |
80 | ||
81 | mutex_lock(&st->buf_lock); | |
82 | st->tx[0] = ADIS16204_WRITE_REG(lower_reg_address); | |
83 | st->tx[1] = value & 0xFF; | |
84 | st->tx[2] = ADIS16204_WRITE_REG(lower_reg_address + 1); | |
85 | st->tx[3] = (value >> 8) & 0xFF; | |
86 | ||
87 | spi_message_init(&msg); | |
88 | spi_message_add_tail(&xfers[0], &msg); | |
89 | spi_message_add_tail(&xfers[1], &msg); | |
90 | ret = spi_sync(st->us, &msg); | |
91 | mutex_unlock(&st->buf_lock); | |
92 | ||
93 | return ret; | |
94 | } | |
95 | ||
96 | /** | |
97 | * adis16204_spi_read_reg_16() - read 2 bytes from a 16-bit register | |
ad3eb9ab | 98 | * @indio_dev: iio device associated with child of actual device |
bb6f19ea BS |
99 | * @reg_address: the address of the lower of the two registers. Second register |
100 | * is assumed to have address one greater. | |
101 | * @val: somewhere to pass back the value read | |
102 | **/ | |
ad3eb9ab JC |
103 | static int adis16204_spi_read_reg_16(struct iio_dev *indio_dev, |
104 | u8 lower_reg_address, | |
105 | u16 *val) | |
bb6f19ea BS |
106 | { |
107 | struct spi_message msg; | |
4de66bbb | 108 | struct adis16204_state *st = iio_priv(indio_dev); |
bb6f19ea BS |
109 | int ret; |
110 | struct spi_transfer xfers[] = { | |
111 | { | |
112 | .tx_buf = st->tx, | |
113 | .bits_per_word = 8, | |
114 | .len = 2, | |
115 | .cs_change = 1, | |
116 | .delay_usecs = 20, | |
117 | }, { | |
118 | .rx_buf = st->rx, | |
119 | .bits_per_word = 8, | |
120 | .len = 2, | |
bb6f19ea BS |
121 | .delay_usecs = 20, |
122 | }, | |
123 | }; | |
124 | ||
125 | mutex_lock(&st->buf_lock); | |
126 | st->tx[0] = ADIS16204_READ_REG(lower_reg_address); | |
127 | st->tx[1] = 0; | |
128 | ||
129 | spi_message_init(&msg); | |
130 | spi_message_add_tail(&xfers[0], &msg); | |
131 | spi_message_add_tail(&xfers[1], &msg); | |
132 | ret = spi_sync(st->us, &msg); | |
133 | if (ret) { | |
134 | dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X", | |
135 | lower_reg_address); | |
136 | goto error_ret; | |
137 | } | |
138 | *val = (st->rx[0] << 8) | st->rx[1]; | |
139 | ||
140 | error_ret: | |
141 | mutex_unlock(&st->buf_lock); | |
142 | return ret; | |
143 | } | |
144 | ||
ad3eb9ab | 145 | static int adis16204_check_status(struct iio_dev *indio_dev) |
bb6f19ea | 146 | { |
ad3eb9ab | 147 | u16 status; |
bb6f19ea | 148 | int ret; |
bb6f19ea | 149 | |
ad3eb9ab JC |
150 | ret = adis16204_spi_read_reg_16(indio_dev, |
151 | ADIS16204_DIAG_STAT, &status); | |
152 | if (ret < 0) { | |
153 | dev_err(&indio_dev->dev, "Reading status failed\n"); | |
bb6f19ea | 154 | goto error_ret; |
bb6f19ea | 155 | } |
ad3eb9ab | 156 | ret = status & 0x1F; |
bb6f19ea | 157 | |
ad3eb9ab JC |
158 | if (status & ADIS16204_DIAG_STAT_SELFTEST_FAIL) |
159 | dev_err(&indio_dev->dev, "Self test failure\n"); | |
160 | if (status & ADIS16204_DIAG_STAT_SPI_FAIL) | |
161 | dev_err(&indio_dev->dev, "SPI failure\n"); | |
162 | if (status & ADIS16204_DIAG_STAT_FLASH_UPT) | |
163 | dev_err(&indio_dev->dev, "Flash update failed\n"); | |
164 | if (status & ADIS16204_DIAG_STAT_POWER_HIGH) | |
165 | dev_err(&indio_dev->dev, "Power supply above 3.625V\n"); | |
166 | if (status & ADIS16204_DIAG_STAT_POWER_LOW) | |
167 | dev_err(&indio_dev->dev, "Power supply below 2.975V\n"); | |
bb6f19ea | 168 | |
ad3eb9ab | 169 | error_ret: |
bb6f19ea BS |
170 | return ret; |
171 | } | |
172 | ||
173 | static ssize_t adis16204_read_14bit_signed(struct device *dev, | |
174 | struct device_attribute *attr, | |
175 | char *buf) | |
176 | { | |
177 | struct iio_dev *indio_dev = dev_get_drvdata(dev); | |
178 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); | |
179 | s16 val = 0; | |
180 | ssize_t ret; | |
181 | ||
182 | mutex_lock(&indio_dev->mlock); | |
183 | ||
ad3eb9ab JC |
184 | ret = adis16204_spi_read_reg_16(indio_dev, |
185 | this_attr->address, (u16 *)&val); | |
bb6f19ea BS |
186 | if (!ret) { |
187 | if (val & ADIS16204_ERROR_ACTIVE) | |
ad3eb9ab | 188 | adis16204_check_status(indio_dev); |
bb6f19ea BS |
189 | |
190 | val = ((s16)(val << 2) >> 2); | |
191 | ret = sprintf(buf, "%d\n", val); | |
192 | } | |
193 | ||
194 | mutex_unlock(&indio_dev->mlock); | |
195 | ||
196 | return ret; | |
197 | } | |
198 | ||
ad3eb9ab | 199 | static int adis16204_reset(struct iio_dev *indio_dev) |
bb6f19ea | 200 | { |
bb6f19ea | 201 | int ret; |
ad3eb9ab | 202 | ret = adis16204_spi_write_reg_8(indio_dev, |
bb6f19ea BS |
203 | ADIS16204_GLOB_CMD, |
204 | ADIS16204_GLOB_CMD_SW_RESET); | |
205 | if (ret) | |
ad3eb9ab | 206 | dev_err(&indio_dev->dev, "problem resetting device"); |
bb6f19ea BS |
207 | |
208 | return ret; | |
209 | } | |
210 | ||
211 | static ssize_t adis16204_write_reset(struct device *dev, | |
212 | struct device_attribute *attr, | |
213 | const char *buf, size_t len) | |
214 | { | |
ad3eb9ab JC |
215 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
216 | ||
bb6f19ea BS |
217 | if (len < 1) |
218 | return -EINVAL; | |
219 | switch (buf[0]) { | |
220 | case '1': | |
221 | case 'y': | |
222 | case 'Y': | |
ad3eb9ab | 223 | return adis16204_reset(indio_dev); |
bb6f19ea BS |
224 | } |
225 | return -EINVAL; | |
226 | } | |
227 | ||
ad3eb9ab | 228 | int adis16204_set_irq(struct iio_dev *indio_dev, bool enable) |
bb6f19ea BS |
229 | { |
230 | int ret = 0; | |
231 | u16 msc; | |
232 | ||
ad3eb9ab | 233 | ret = adis16204_spi_read_reg_16(indio_dev, ADIS16204_MSC_CTRL, &msc); |
bb6f19ea BS |
234 | if (ret) |
235 | goto error_ret; | |
236 | ||
237 | msc |= ADIS16204_MSC_CTRL_ACTIVE_HIGH; | |
238 | msc &= ~ADIS16204_MSC_CTRL_DATA_RDY_DIO2; | |
239 | if (enable) | |
240 | msc |= ADIS16204_MSC_CTRL_DATA_RDY_EN; | |
241 | else | |
242 | msc &= ~ADIS16204_MSC_CTRL_DATA_RDY_EN; | |
243 | ||
ad3eb9ab | 244 | ret = adis16204_spi_write_reg_16(indio_dev, ADIS16204_MSC_CTRL, msc); |
bb6f19ea BS |
245 | |
246 | error_ret: | |
247 | return ret; | |
248 | } | |
249 | ||
ad3eb9ab | 250 | static int adis16204_self_test(struct iio_dev *indio_dev) |
bb6f19ea | 251 | { |
bb6f19ea | 252 | int ret; |
ad3eb9ab | 253 | ret = adis16204_spi_write_reg_16(indio_dev, |
bb6f19ea BS |
254 | ADIS16204_MSC_CTRL, |
255 | ADIS16204_MSC_CTRL_SELF_TEST_EN); | |
256 | if (ret) { | |
ad3eb9ab | 257 | dev_err(&indio_dev->dev, "problem starting self test"); |
bb6f19ea BS |
258 | goto err_ret; |
259 | } | |
260 | ||
ad3eb9ab | 261 | adis16204_check_status(indio_dev); |
bb6f19ea BS |
262 | |
263 | err_ret: | |
264 | return ret; | |
265 | } | |
266 | ||
ad3eb9ab | 267 | static int adis16204_initial_setup(struct iio_dev *indio_dev) |
bb6f19ea BS |
268 | { |
269 | int ret; | |
bb6f19ea BS |
270 | |
271 | /* Disable IRQ */ | |
ad3eb9ab | 272 | ret = adis16204_set_irq(indio_dev, false); |
bb6f19ea | 273 | if (ret) { |
ad3eb9ab | 274 | dev_err(&indio_dev->dev, "disable irq failed"); |
bb6f19ea BS |
275 | goto err_ret; |
276 | } | |
277 | ||
278 | /* Do self test */ | |
ad3eb9ab | 279 | ret = adis16204_self_test(indio_dev); |
bb6f19ea | 280 | if (ret) { |
ad3eb9ab | 281 | dev_err(&indio_dev->dev, "self test failure"); |
bb6f19ea BS |
282 | goto err_ret; |
283 | } | |
284 | ||
285 | /* Read status register to check the result */ | |
ad3eb9ab | 286 | ret = adis16204_check_status(indio_dev); |
bb6f19ea | 287 | if (ret) { |
ad3eb9ab JC |
288 | adis16204_reset(indio_dev); |
289 | dev_err(&indio_dev->dev, "device not playing ball -> reset"); | |
bb6f19ea | 290 | msleep(ADIS16204_STARTUP_DELAY); |
ad3eb9ab | 291 | ret = adis16204_check_status(indio_dev); |
bb6f19ea | 292 | if (ret) { |
ad3eb9ab | 293 | dev_err(&indio_dev->dev, "giving up"); |
bb6f19ea BS |
294 | goto err_ret; |
295 | } | |
296 | } | |
297 | ||
bb6f19ea BS |
298 | err_ret: |
299 | return ret; | |
300 | } | |
c9b9e49e JC |
301 | |
302 | /* Unique to this driver currently */ | |
303 | #define IIO_DEV_ATTR_ACCEL_XY(_show, _addr) \ | |
304 | IIO_DEVICE_ATTR(accel_xy, S_IRUGO, _show, NULL, _addr) | |
305 | #define IIO_DEV_ATTR_ACCEL_XYPEAK(_show, _addr) \ | |
306 | IIO_DEVICE_ATTR(accel_xypeak, S_IRUGO, _show, NULL, _addr) | |
307 | ||
bb6f19ea BS |
308 | static IIO_DEV_ATTR_ACCEL_XY(adis16204_read_14bit_signed, |
309 | ADIS16204_XY_RSS_OUT); | |
bb6f19ea BS |
310 | static IIO_DEV_ATTR_ACCEL_XYPEAK(adis16204_read_14bit_signed, |
311 | ADIS16204_XY_PEAK_OUT); | |
bb6f19ea BS |
312 | static IIO_CONST_ATTR(accel_xy_scale, "0.017125"); |
313 | ||
bb6f19ea BS |
314 | static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16204_write_reset, 0); |
315 | ||
ad3eb9ab JC |
316 | enum adis16204_channel { |
317 | in_supply, | |
318 | in_aux, | |
319 | temp, | |
320 | accel_x, | |
321 | accel_y, | |
322 | }; | |
323 | ||
c9b9e49e | 324 | static u8 adis16204_addresses[5][3] = { |
ad3eb9ab JC |
325 | [in_supply] = { ADIS16204_SUPPLY_OUT }, |
326 | [in_aux] = { ADIS16204_AUX_ADC }, | |
327 | [temp] = { ADIS16204_TEMP_OUT }, | |
c9b9e49e JC |
328 | [accel_x] = { ADIS16204_XACCL_OUT, ADIS16204_XACCL_NULL, |
329 | ADIS16204_X_PEAK_OUT }, | |
330 | [accel_y] = { ADIS16204_XACCL_OUT, ADIS16204_YACCL_NULL, | |
331 | ADIS16204_Y_PEAK_OUT }, | |
ad3eb9ab | 332 | }; |
c9b9e49e | 333 | |
ad3eb9ab JC |
334 | static int adis16204_read_raw(struct iio_dev *indio_dev, |
335 | struct iio_chan_spec const *chan, | |
336 | int *val, int *val2, | |
337 | long mask) | |
338 | { | |
339 | int ret; | |
340 | int bits; | |
341 | u8 addr; | |
342 | s16 val16; | |
c9b9e49e | 343 | int addrind; |
ad3eb9ab JC |
344 | |
345 | switch (mask) { | |
346 | case 0: | |
347 | mutex_lock(&indio_dev->mlock); | |
348 | addr = adis16204_addresses[chan->address][0]; | |
349 | ret = adis16204_spi_read_reg_16(indio_dev, addr, &val16); | |
8f896155 DC |
350 | if (ret) { |
351 | mutex_unlock(&indio_dev->mlock); | |
ad3eb9ab | 352 | return ret; |
8f896155 | 353 | } |
ad3eb9ab JC |
354 | |
355 | if (val16 & ADIS16204_ERROR_ACTIVE) { | |
356 | ret = adis16204_check_status(indio_dev); | |
8f896155 DC |
357 | if (ret) { |
358 | mutex_unlock(&indio_dev->mlock); | |
ad3eb9ab | 359 | return ret; |
8f896155 | 360 | } |
ad3eb9ab JC |
361 | } |
362 | val16 = val16 & ((1 << chan->scan_type.realbits) - 1); | |
363 | if (chan->scan_type.sign == 's') | |
364 | val16 = (s16)(val16 << | |
365 | (16 - chan->scan_type.realbits)) >> | |
366 | (16 - chan->scan_type.realbits); | |
367 | *val = val16; | |
368 | mutex_unlock(&indio_dev->mlock); | |
369 | return IIO_VAL_INT; | |
370 | case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): | |
371 | switch (chan->type) { | |
372 | case IIO_IN: | |
373 | *val = 0; | |
374 | if (chan->channel == 0) | |
375 | *val2 = 1220; | |
376 | else | |
377 | *val2 = 610; | |
378 | return IIO_VAL_INT_PLUS_MICRO; | |
379 | case IIO_TEMP: | |
380 | *val = 0; | |
381 | *val2 = -470000; | |
382 | return IIO_VAL_INT_PLUS_MICRO; | |
383 | case IIO_ACCEL: | |
384 | *val = 0; | |
385 | if (chan->channel == 'x') | |
386 | *val2 = 17125; | |
387 | else | |
388 | *val2 = 8407; | |
389 | return IIO_VAL_INT_PLUS_MICRO; | |
390 | default: | |
391 | return -EINVAL; | |
392 | } | |
393 | break; | |
394 | case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): | |
395 | *val = 25; | |
396 | return IIO_VAL_INT; | |
397 | case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): | |
c9b9e49e JC |
398 | case (1 << IIO_CHAN_INFO_PEAK_SEPARATE): |
399 | if (mask == (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE)) { | |
ad3eb9ab | 400 | bits = 12; |
c9b9e49e JC |
401 | addrind = 1; |
402 | } else { /* PEAK_SEPARATE */ | |
403 | bits = 14; | |
404 | addrind = 2; | |
405 | } | |
ad3eb9ab | 406 | mutex_lock(&indio_dev->mlock); |
c9b9e49e | 407 | addr = adis16204_addresses[chan->address][addrind]; |
ad3eb9ab JC |
408 | ret = adis16204_spi_read_reg_16(indio_dev, addr, &val16); |
409 | if (ret) { | |
410 | mutex_unlock(&indio_dev->mlock); | |
411 | return ret; | |
412 | } | |
413 | val16 &= (1 << bits) - 1; | |
414 | val16 = (s16)(val16 << (16 - bits)) >> (16 - bits); | |
415 | *val = val16; | |
416 | mutex_unlock(&indio_dev->mlock); | |
417 | return IIO_VAL_INT; | |
418 | } | |
419 | return -EINVAL; | |
420 | } | |
421 | ||
422 | static int adis16204_write_raw(struct iio_dev *indio_dev, | |
423 | struct iio_chan_spec const *chan, | |
424 | int val, | |
425 | int val2, | |
426 | long mask) | |
427 | { | |
428 | int bits; | |
429 | s16 val16; | |
430 | u8 addr; | |
431 | switch (mask) { | |
432 | case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): | |
433 | switch (chan->type) { | |
434 | case IIO_ACCEL: | |
435 | bits = 12; | |
436 | break; | |
437 | default: | |
438 | return -EINVAL; | |
439 | }; | |
440 | val16 = val & ((1 << bits) - 1); | |
441 | addr = adis16204_addresses[chan->address][1]; | |
442 | return adis16204_spi_write_reg_16(indio_dev, addr, val16); | |
443 | } | |
444 | return -EINVAL; | |
445 | } | |
446 | ||
447 | static struct iio_chan_spec adis16204_channels[] = { | |
448 | IIO_CHAN(IIO_IN, 0, 0, 0, "supply", 0, 0, | |
449 | (1 << IIO_CHAN_INFO_SCALE_SEPARATE), | |
450 | in_supply, ADIS16204_SCAN_SUPPLY, | |
451 | IIO_ST('u', 12, 16, 0), 0), | |
452 | IIO_CHAN(IIO_IN, 0, 1, 0, NULL, 1, 0, | |
453 | (1 << IIO_CHAN_INFO_SCALE_SEPARATE), | |
454 | in_aux, ADIS16204_SCAN_AUX_ADC, | |
455 | IIO_ST('u', 12, 16, 0), 0), | |
456 | IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, | |
457 | (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | | |
458 | (1 << IIO_CHAN_INFO_OFFSET_SEPARATE), | |
459 | temp, ADIS16204_SCAN_TEMP, | |
460 | IIO_ST('u', 12, 16, 0), 0), | |
461 | IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X, | |
462 | (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | | |
c9b9e49e JC |
463 | (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | |
464 | (1 << IIO_CHAN_INFO_PEAK_SEPARATE), | |
ad3eb9ab JC |
465 | accel_x, ADIS16204_SCAN_ACC_X, |
466 | IIO_ST('s', 14, 16, 0), 0), | |
467 | IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y, | |
468 | (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | | |
c9b9e49e JC |
469 | (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | |
470 | (1 << IIO_CHAN_INFO_PEAK_SEPARATE), | |
ad3eb9ab JC |
471 | accel_y, ADIS16204_SCAN_ACC_Y, |
472 | IIO_ST('s', 14, 16, 0), 0), | |
473 | IIO_CHAN_SOFT_TIMESTAMP(5), | |
474 | }; | |
c9b9e49e | 475 | |
bb6f19ea | 476 | static struct attribute *adis16204_attributes[] = { |
bb6f19ea | 477 | &iio_dev_attr_reset.dev_attr.attr, |
bb6f19ea | 478 | &iio_dev_attr_accel_xy.dev_attr.attr, |
bb6f19ea | 479 | &iio_dev_attr_accel_xypeak.dev_attr.attr, |
bb6f19ea BS |
480 | &iio_const_attr_accel_xy_scale.dev_attr.attr, |
481 | NULL | |
482 | }; | |
483 | ||
484 | static const struct attribute_group adis16204_attribute_group = { | |
485 | .attrs = adis16204_attributes, | |
486 | }; | |
487 | ||
6fe8135f JC |
488 | static const struct iio_info adis16204_info = { |
489 | .attrs = &adis16204_attribute_group, | |
490 | .read_raw = &adis16204_read_raw, | |
491 | .write_raw = &adis16204_write_raw, | |
492 | .driver_module = THIS_MODULE, | |
493 | }; | |
494 | ||
bb6f19ea BS |
495 | static int __devinit adis16204_probe(struct spi_device *spi) |
496 | { | |
497 | int ret, regdone = 0; | |
4de66bbb JC |
498 | struct adis16204_state *st; |
499 | struct iio_dev *indio_dev; | |
bb6f19ea | 500 | |
4de66bbb JC |
501 | /* setup the industrialio driver allocated elements */ |
502 | indio_dev = iio_allocate_device(sizeof(*st)); | |
503 | if (indio_dev == NULL) { | |
bb6f19ea | 504 | ret = -ENOMEM; |
4de66bbb | 505 | goto error_ret; |
bb6f19ea | 506 | } |
4de66bbb JC |
507 | st = iio_priv(indio_dev); |
508 | /* this is only used for removal purposes */ | |
509 | spi_set_drvdata(spi, indio_dev); | |
bb6f19ea BS |
510 | st->us = spi; |
511 | mutex_init(&st->buf_lock); | |
bb6f19ea | 512 | |
4de66bbb JC |
513 | indio_dev->name = spi->dev.driver->name; |
514 | indio_dev->dev.parent = &spi->dev; | |
515 | indio_dev->info = &adis16204_info; | |
516 | indio_dev->channels = adis16204_channels; | |
517 | indio_dev->num_channels = ARRAY_SIZE(adis16204_channels); | |
518 | indio_dev->modes = INDIO_DIRECT_MODE; | |
bb6f19ea | 519 | |
4de66bbb | 520 | ret = adis16204_configure_ring(indio_dev); |
bb6f19ea BS |
521 | if (ret) |
522 | goto error_free_dev; | |
523 | ||
4de66bbb | 524 | ret = iio_device_register(indio_dev); |
bb6f19ea BS |
525 | if (ret) |
526 | goto error_unreg_ring_funcs; | |
527 | regdone = 1; | |
528 | ||
1aa04278 | 529 | ret = iio_ring_buffer_register_ex(indio_dev, 0, |
ad3eb9ab JC |
530 | adis16204_channels, |
531 | ARRAY_SIZE(adis16204_channels)); | |
bb6f19ea BS |
532 | if (ret) { |
533 | printk(KERN_ERR "failed to initialize the ring\n"); | |
534 | goto error_unreg_ring_funcs; | |
535 | } | |
536 | ||
537 | if (spi->irq) { | |
4de66bbb | 538 | ret = adis16204_probe_trigger(indio_dev); |
bb6f19ea | 539 | if (ret) |
37f9d271 | 540 | goto error_uninitialize_ring; |
bb6f19ea BS |
541 | } |
542 | ||
543 | /* Get the device into a sane initial state */ | |
4de66bbb | 544 | ret = adis16204_initial_setup(indio_dev); |
bb6f19ea BS |
545 | if (ret) |
546 | goto error_remove_trigger; | |
547 | return 0; | |
548 | ||
549 | error_remove_trigger: | |
4de66bbb | 550 | adis16204_remove_trigger(indio_dev); |
bb6f19ea | 551 | error_uninitialize_ring: |
1aa04278 | 552 | iio_ring_buffer_unregister(indio_dev); |
bb6f19ea | 553 | error_unreg_ring_funcs: |
4de66bbb | 554 | adis16204_unconfigure_ring(indio_dev); |
bb6f19ea BS |
555 | error_free_dev: |
556 | if (regdone) | |
4de66bbb | 557 | iio_device_unregister(indio_dev); |
bb6f19ea | 558 | else |
4de66bbb | 559 | iio_free_device(indio_dev); |
bb6f19ea BS |
560 | error_ret: |
561 | return ret; | |
562 | } | |
563 | ||
564 | static int adis16204_remove(struct spi_device *spi) | |
565 | { | |
4de66bbb | 566 | struct iio_dev *indio_dev = spi_get_drvdata(spi); |
bb6f19ea | 567 | |
bb6f19ea | 568 | adis16204_remove_trigger(indio_dev); |
1aa04278 | 569 | iio_ring_buffer_unregister(indio_dev); |
bb6f19ea BS |
570 | iio_device_unregister(indio_dev); |
571 | adis16204_unconfigure_ring(indio_dev); | |
bb6f19ea BS |
572 | |
573 | return 0; | |
574 | } | |
575 | ||
576 | static struct spi_driver adis16204_driver = { | |
577 | .driver = { | |
578 | .name = "adis16204", | |
579 | .owner = THIS_MODULE, | |
580 | }, | |
581 | .probe = adis16204_probe, | |
582 | .remove = __devexit_p(adis16204_remove), | |
583 | }; | |
584 | ||
585 | static __init int adis16204_init(void) | |
586 | { | |
587 | return spi_register_driver(&adis16204_driver); | |
588 | } | |
589 | module_init(adis16204_init); | |
590 | ||
591 | static __exit void adis16204_exit(void) | |
592 | { | |
593 | spi_unregister_driver(&adis16204_driver); | |
594 | } | |
595 | module_exit(adis16204_exit); | |
596 | ||
597 | MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); | |
ad3eb9ab | 598 | MODULE_DESCRIPTION("ADIS16204 High-g Digital Impact Sensor and Recorder"); |
bb6f19ea | 599 | MODULE_LICENSE("GPL v2"); |