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Merge 3.9-rc5 into staging-next
[deliverable/linux.git] / drivers / staging / iio / adc / ad799x_core.c
CommitLineData
985dbe77
MH		 1/*
2 * iio/adc/ad799x.c
d22fd9c5 3 * Copyright (C) 2010-1011 Michael Hennerich, Analog Devices Inc.
985dbe77
MH		 4 *
5 * based on iio/adc/max1363
6 * Copyright (C) 2008-2010 Jonathan Cameron
7 *
8 * based on linux/drivers/i2c/chips/max123x
9 * Copyright (C) 2002-2004 Stefan Eletzhofer
10 *
11 * based on linux/drivers/acron/char/pcf8583.c
12 * Copyright (C) 2000 Russell King
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 * ad799x.c
19 *
20 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
21 * ad7998 and similar chips.
22 *
23 */
24
25#include <linux/interrupt.h>
985dbe77
MH		 26#include <linux/device.h>
27#include <linux/kernel.h>
28#include <linux/sysfs.h>
985dbe77
MH		 29#include <linux/i2c.h>
30#include <linux/regulator/consumer.h>
31#include <linux/slab.h>
32#include <linux/types.h>
33#include <linux/err.h>
99c97852 34#include <linux/module.h>
985dbe77 35
06458e27
JC		 36#include <linux/iio/iio.h>
37#include <linux/iio/sysfs.h>
38#include <linux/iio/events.h>
39#include <linux/iio/buffer.h>
cdf38709 40
985dbe77
MH		 41#include "ad799x.h"
42
43/*
44 * ad799x register access by I2C
45 */
46static int ad799x_i2c_read16(struct ad799x_state *st, u8 reg, u16 *data)
47{
48 struct i2c_client *client = st->client;
49 int ret = 0;
50
34244cec 51 ret = i2c_smbus_read_word_swapped(client, reg);
985dbe77
MH		 52 if (ret < 0) {
53 dev_err(&client->dev, "I2C read error\n");
54 return ret;
55 }
56
34244cec 57 *data = (u16)ret;
985dbe77
MH		 58
59 return 0;
60}
61
62static int ad799x_i2c_read8(struct ad799x_state *st, u8 reg, u8 *data)
63{
64 struct i2c_client *client = st->client;
65 int ret = 0;
66
aecac191 67 ret = i2c_smbus_read_byte_data(client, reg);
985dbe77
MH		 68 if (ret < 0) {
69 dev_err(&client->dev, "I2C read error\n");
70 return ret;
71 }
72
aecac191 73 *data = (u8)ret;
985dbe77
MH		 74
75 return 0;
76}
77
78static int ad799x_i2c_write16(struct ad799x_state *st, u8 reg, u16 data)
79{
80 struct i2c_client *client = st->client;
81 int ret = 0;
82
34244cec 83 ret = i2c_smbus_write_word_swapped(client, reg, data);
985dbe77
MH		 84 if (ret < 0)
85 dev_err(&client->dev, "I2C write error\n");
86
87 return ret;
88}
89
90static int ad799x_i2c_write8(struct ad799x_state *st, u8 reg, u8 data)
91{
92 struct i2c_client *client = st->client;
93 int ret = 0;
94
95 ret = i2c_smbus_write_byte_data(client, reg, data);
96 if (ret < 0)
97 dev_err(&client->dev, "I2C write error\n");
98
99 return ret;
100}
101
ae3805c3
LPC		 102static int ad7997_8_update_scan_mode(struct iio_dev *indio_dev,
103 const unsigned long *scan_mask)
985dbe77 104{
ae3805c3
LPC		 105 struct ad799x_state *st = iio_priv(indio_dev);
106
d8dca330
LPC		 107 kfree(st->rx_buf);
108 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
109 if (!st->rx_buf)
110 return -ENOMEM;
111
112 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
113
ae3805c3
LPC		 114 switch (st->id) {
115 case ad7997:
116 case ad7998:
117 return ad799x_i2c_write16(st, AD7998_CONF_REG,
118 st->config | (*scan_mask << AD799X_CHANNEL_SHIFT));
119 default:
120 break;
121 }
122
123 return 0;
985dbe77
MH		 124}
125
d22fd9c5 126static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
985dbe77 127{
d22fd9c5
MH		 128 u16 rxbuf;
129 u8 cmd;
985dbe77
MH		 130 int ret;
131
d22fd9c5
MH		 132 switch (st->id) {
133 case ad7991:
134 case ad7995:
135 case ad7999:
136 cmd = st->config | ((1 << ch) << AD799X_CHANNEL_SHIFT);
137 break;
138 case ad7992:
139 case ad7993:
140 case ad7994:
141 cmd = (1 << ch) << AD799X_CHANNEL_SHIFT;
142 break;
143 case ad7997:
144 case ad7998:
145 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
146 break;
147 default:
148 return -EINVAL;
985dbe77
MH		 149 }
150
d22fd9c5
MH		 151 ret = ad799x_i2c_read16(st, cmd, &rxbuf);
152 if (ret < 0)
153 return ret;
154
155 return rxbuf;
985dbe77
MH		 156}
157
84f79ecb 158static int ad799x_read_raw(struct iio_dev *indio_dev,
d22fd9c5
MH		 159 struct iio_chan_spec const *chan,
160 int *val,
161 int *val2,
162 long m)
985dbe77 163{
d22fd9c5 164 int ret;
84f79ecb 165 struct ad799x_state *st = iio_priv(indio_dev);
d22fd9c5
MH		 166 unsigned int scale_uv;
167
168 switch (m) {
b11f98ff 169 case IIO_CHAN_INFO_RAW:
84f79ecb
JC		 170 mutex_lock(&indio_dev->mlock);
171 if (iio_buffer_enabled(indio_dev))
729bbf54 172 ret = -EBUSY;
d22fd9c5 173 else
58dffaed 174 ret = ad799x_scan_direct(st, chan->scan_index);
84f79ecb 175 mutex_unlock(&indio_dev->mlock);
985dbe77 176
985dbe77 177 if (ret < 0)
d22fd9c5 178 return ret;
5357ba3d
JC		 179 *val = (ret >> chan->scan_type.shift) &
180 RES_MASK(chan->scan_type.realbits);
d22fd9c5 181 return IIO_VAL_INT;
c8a9f805 182 case IIO_CHAN_INFO_SCALE:
5357ba3d 183 scale_uv = (st->int_vref_mv * 1000) >> chan->scan_type.realbits;
d22fd9c5
MH		 184 *val = scale_uv / 1000;
185 *val2 = (scale_uv % 1000) * 1000;
186 return IIO_VAL_INT_PLUS_MICRO;
985dbe77 187 }
d22fd9c5 188 return -EINVAL;
985dbe77 189}
24cba406
JC		 190static const unsigned int ad7998_frequencies[] = {
191 [AD7998_CYC_DIS] = 0,
192 [AD7998_CYC_TCONF_32] = 15625,
193 [AD7998_CYC_TCONF_64] = 7812,
194 [AD7998_CYC_TCONF_128] = 3906,
195 [AD7998_CYC_TCONF_512] = 976,
196 [AD7998_CYC_TCONF_1024] = 488,
197 [AD7998_CYC_TCONF_2048] = 244,
198};
985dbe77
MH		 199static ssize_t ad799x_read_frequency(struct device *dev,
200 struct device_attribute *attr,
201 char *buf)
202{
62c51839 203 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
84f79ecb 204 struct ad799x_state *st = iio_priv(indio_dev);
985dbe77 205
24cba406 206 int ret;
985dbe77
MH		 207 u8 val;
208 ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &val);
209 if (ret)
210 return ret;
211
212 val &= AD7998_CYC_MASK;
213
24cba406 214 return sprintf(buf, "%u\n", ad7998_frequencies[val]);
985dbe77
MH		 215}
216
217static ssize_t ad799x_write_frequency(struct device *dev,
218 struct device_attribute *attr,
219 const char *buf,
220 size_t len)
221{
62c51839 222 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
84f79ecb 223 struct ad799x_state *st = iio_priv(indio_dev);
985dbe77
MH		 224
225 long val;
24cba406 226 int ret, i;
985dbe77
MH		 227 u8 t;
228
229 ret = strict_strtol(buf, 10, &val);
230 if (ret)
231 return ret;
232
84f79ecb 233 mutex_lock(&indio_dev->mlock);
985dbe77
MH		 234 ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &t);
235 if (ret)
236 goto error_ret_mutex;
237 /* Wipe the bits clean */
238 t &= ~AD7998_CYC_MASK;
239
24cba406
JC		 240 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
241 if (val == ad7998_frequencies[i])
242 break;
243 if (i == ARRAY_SIZE(ad7998_frequencies)) {
985dbe77
MH		 244 ret = -EINVAL;
245 goto error_ret_mutex;
246 }
24cba406 247 t |= i;
985dbe77
MH		 248 ret = ad799x_i2c_write8(st, AD7998_CYCLE_TMR_REG, t);
249
250error_ret_mutex:
84f79ecb 251 mutex_unlock(&indio_dev->mlock);
985dbe77
MH		 252
253 return ret ? ret : len;
254}
255
84f79ecb 256static int ad799x_read_event_config(struct iio_dev *indio_dev,
231c5c3b
JC		 257 u64 event_code)
258{
259 return 1;
260}
261
262static const u8 ad799x_threshold_addresses[][2] = {
263 { AD7998_DATALOW_CH1_REG, AD7998_DATAHIGH_CH1_REG },
264 { AD7998_DATALOW_CH2_REG, AD7998_DATAHIGH_CH2_REG },
265 { AD7998_DATALOW_CH3_REG, AD7998_DATAHIGH_CH3_REG },
266 { AD7998_DATALOW_CH4_REG, AD7998_DATAHIGH_CH4_REG },
267};
268
269static int ad799x_write_event_value(struct iio_dev *indio_dev,
270 u64 event_code,
271 int val)
272{
273 int ret;
274 struct ad799x_state *st = iio_priv(indio_dev);
275 int direction = !!(IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
276 IIO_EV_DIR_FALLING);
da367160 277 int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);
231c5c3b
JC		 278
279 mutex_lock(&indio_dev->mlock);
280 ret = ad799x_i2c_write16(st,
281 ad799x_threshold_addresses[number][direction],
282 val);
283 mutex_unlock(&indio_dev->mlock);
284
285 return ret;
286}
287
288static int ad799x_read_event_value(struct iio_dev *indio_dev,
289 u64 event_code,
290 int *val)
291{
292 int ret;
293 struct ad799x_state *st = iio_priv(indio_dev);
294 int direction = !!(IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
295 IIO_EV_DIR_FALLING);
da367160 296 int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);
231c5c3b
JC		 297 u16 valin;
298
299 mutex_lock(&indio_dev->mlock);
300 ret = ad799x_i2c_read16(st,
301 ad799x_threshold_addresses[number][direction],
302 &valin);
303 mutex_unlock(&indio_dev->mlock);
304 if (ret < 0)
305 return ret;
306 *val = valin;
307
308 return 0;
309}
310
985dbe77
MH		 311static ssize_t ad799x_read_channel_config(struct device *dev,
312 struct device_attribute *attr,
313 char *buf)
314{
62c51839 315 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
84f79ecb 316 struct ad799x_state *st = iio_priv(indio_dev);
72148f6e 317 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
985dbe77
MH		 318
319 int ret;
320 u16 val;
72148f6e 321 ret = ad799x_i2c_read16(st, this_attr->address, &val);
985dbe77
MH		 322 if (ret)
323 return ret;
324
325 return sprintf(buf, "%d\n", val);
326}
327
328static ssize_t ad799x_write_channel_config(struct device *dev,
329 struct device_attribute *attr,
330 const char *buf,
331 size_t len)
332{
62c51839 333 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
84f79ecb 334 struct ad799x_state *st = iio_priv(indio_dev);
72148f6e 335 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
985dbe77
MH		 336
337 long val;
338 int ret;
339
340 ret = strict_strtol(buf, 10, &val);
341 if (ret)
342 return ret;
343
84f79ecb 344 mutex_lock(&indio_dev->mlock);
72148f6e 345 ret = ad799x_i2c_write16(st, this_attr->address, val);
84f79ecb 346 mutex_unlock(&indio_dev->mlock);
985dbe77
MH		 347
348 return ret ? ret : len;
349}
350
72148f6e 351static irqreturn_t ad799x_event_handler(int irq, void *private)
985dbe77 352{
72148f6e 353 struct iio_dev *indio_dev = private;
d8aea29b 354 struct ad799x_state *st = iio_priv(private);
985dbe77 355 u8 status;
72148f6e 356 int i, ret;
985dbe77 357
72148f6e
JC		 358 ret = ad799x_i2c_read8(st, AD7998_ALERT_STAT_REG, &status);
359 if (ret)
f654a7e2 360 goto done;
985dbe77
MH		 361
362 if (!status)
f654a7e2 363 goto done;
985dbe77
MH		 364
365 ad799x_i2c_write8(st, AD7998_ALERT_STAT_REG, AD7998_ALERT_STAT_CLEAR);
366
367 for (i = 0; i < 8; i++) {
368 if (status & (1 << i))
5aa96188 369 iio_push_event(indio_dev,
72148f6e 370 i & 0x1 ?
6835cb6b 371 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
cdf38709
JC		 372 (i >> 1),
373 IIO_EV_TYPE_THRESH,
374 IIO_EV_DIR_RISING) :
6835cb6b 375 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
cdf38709
JC		 376 (i >> 1),
377 IIO_EV_TYPE_THRESH,
378 IIO_EV_DIR_FALLING),
72148f6e 379 iio_get_time_ns());
985dbe77
MH		 380 }
381
f654a7e2 382done:
72148f6e 383 return IRQ_HANDLED;
985dbe77
MH		 384}
385
322c9563 386static IIO_DEVICE_ATTR(in_voltage0_thresh_both_hyst_raw,
72148f6e
JC		 387 S_IRUGO | S_IWUSR,
388 ad799x_read_channel_config,
389 ad799x_write_channel_config,
390 AD7998_HYST_CH1_REG);
391
322c9563 392static IIO_DEVICE_ATTR(in_voltage1_thresh_both_hyst_raw,
72148f6e
JC		 393 S_IRUGO | S_IWUSR,
394 ad799x_read_channel_config,
395 ad799x_write_channel_config,
396 AD7998_HYST_CH2_REG);
397
322c9563 398static IIO_DEVICE_ATTR(in_voltage2_thresh_both_hyst_raw,
72148f6e
JC		 399 S_IRUGO | S_IWUSR,
400 ad799x_read_channel_config,
401 ad799x_write_channel_config,
402 AD7998_HYST_CH3_REG);
403
322c9563 404static IIO_DEVICE_ATTR(in_voltage3_thresh_both_hyst_raw,
72148f6e
JC		 405 S_IRUGO | S_IWUSR,
406 ad799x_read_channel_config,
407 ad799x_write_channel_config,
408 AD7998_HYST_CH4_REG);
985dbe77
MH		 409
410static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
411 ad799x_read_frequency,
412 ad799x_write_frequency);
413static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
414
415static struct attribute *ad7993_4_7_8_event_attributes[] = {
322c9563 416 &iio_dev_attr_in_voltage0_thresh_both_hyst_raw.dev_attr.attr,
322c9563 417 &iio_dev_attr_in_voltage1_thresh_both_hyst_raw.dev_attr.attr,
322c9563 418 &iio_dev_attr_in_voltage2_thresh_both_hyst_raw.dev_attr.attr,
322c9563 419 &iio_dev_attr_in_voltage3_thresh_both_hyst_raw.dev_attr.attr,
985dbe77
MH		 420 &iio_dev_attr_sampling_frequency.dev_attr.attr,
421 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
422 NULL,
423};
424
425static struct attribute_group ad7993_4_7_8_event_attrs_group = {
426 .attrs = ad7993_4_7_8_event_attributes,
8e7d9672 427 .name = "events",
985dbe77
MH		 428};
429
430static struct attribute *ad7992_event_attributes[] = {
322c9563 431 &iio_dev_attr_in_voltage0_thresh_both_hyst_raw.dev_attr.attr,
322c9563 432 &iio_dev_attr_in_voltage1_thresh_both_hyst_raw.dev_attr.attr,
985dbe77
MH		 433 &iio_dev_attr_sampling_frequency.dev_attr.attr,
434 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
435 NULL,
436};
437
438static struct attribute_group ad7992_event_attrs_group = {
439 .attrs = ad7992_event_attributes,
8e7d9672 440 .name = "events",
985dbe77
MH		 441};
442
6fe8135f
JC		 443static const struct iio_info ad7991_info = {
444 .read_raw = &ad799x_read_raw,
445 .driver_module = THIS_MODULE,
446};
447
448static const struct iio_info ad7992_info = {
449 .read_raw = &ad799x_read_raw,
6fe8135f 450 .event_attrs = &ad7992_event_attrs_group,
231c5c3b
JC		 451 .read_event_config = &ad799x_read_event_config,
452 .read_event_value = &ad799x_read_event_value,
453 .write_event_value = &ad799x_write_event_value,
6fe8135f
JC		 454 .driver_module = THIS_MODULE,
455};
456
457static const struct iio_info ad7993_4_7_8_info = {
458 .read_raw = &ad799x_read_raw,
6fe8135f 459 .event_attrs = &ad7993_4_7_8_event_attrs_group,
231c5c3b
JC		 460 .read_event_config = &ad799x_read_event_config,
461 .read_event_value = &ad799x_read_event_value,
462 .write_event_value = &ad799x_write_event_value,
6fe8135f 463 .driver_module = THIS_MODULE,
ae3805c3 464 .update_scan_mode = ad7997_8_update_scan_mode,
6fe8135f
JC		 465};
466
231c5c3b
JC		 467#define AD799X_EV_MASK (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | \
468 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING))
469
ae6d6489
LPC		 470#define AD799X_CHANNEL(_index, _realbits, _evmask) { \
471 .type = IIO_VOLTAGE, \
472 .indexed = 1, \
473 .channel = (_index), \
474 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
d00698df 475 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
ae6d6489
LPC		 476 .scan_index = (_index), \
477 .scan_type = IIO_ST('u', _realbits, 16, 12 - (_realbits)), \
478 .event_mask = (_evmask), \
479}
480
985dbe77
MH		 481static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
482 [ad7991] = {
7c626f58 483 .channel = {
ae6d6489
LPC		 484 AD799X_CHANNEL(0, 12, 0),
485 AD799X_CHANNEL(1, 12, 0),
486 AD799X_CHANNEL(2, 12, 0),
487 AD799X_CHANNEL(3, 12, 0),
488 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 489 },
d22fd9c5 490 .num_channels = 5,
6fe8135f 491 .info = &ad7991_info,
985dbe77
MH		 492 },
493 [ad7995] = {
7c626f58 494 .channel = {
ae6d6489
LPC		 495 AD799X_CHANNEL(0, 10, 0),
496 AD799X_CHANNEL(1, 10, 0),
497 AD799X_CHANNEL(2, 10, 0),
498 AD799X_CHANNEL(3, 10, 0),
499 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 500 },
d22fd9c5 501 .num_channels = 5,
6fe8135f 502 .info = &ad7991_info,
985dbe77
MH		 503 },
504 [ad7999] = {
7c626f58 505 .channel = {
ae6d6489
LPC		 506 AD799X_CHANNEL(0, 8, 0),
507 AD799X_CHANNEL(1, 8, 0),
508 AD799X_CHANNEL(2, 8, 0),
509 AD799X_CHANNEL(3, 8, 0),
510 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 511 },
d22fd9c5 512 .num_channels = 5,
6fe8135f 513 .info = &ad7991_info,
985dbe77
MH		 514 },
515 [ad7992] = {
7c626f58 516 .channel = {
ae6d6489
LPC		 517 AD799X_CHANNEL(0, 12, AD799X_EV_MASK),
518 AD799X_CHANNEL(1, 12, AD799X_EV_MASK),
519 IIO_CHAN_SOFT_TIMESTAMP(3),
7c626f58 520 },
d22fd9c5 521 .num_channels = 3,
985dbe77 522 .default_config = AD7998_ALERT_EN,
6fe8135f 523 .info = &ad7992_info,
985dbe77
MH		 524 },
525 [ad7993] = {
7c626f58 526 .channel = {
ae6d6489
LPC		 527 AD799X_CHANNEL(0, 10, AD799X_EV_MASK),
528 AD799X_CHANNEL(1, 10, AD799X_EV_MASK),
529 AD799X_CHANNEL(2, 10, AD799X_EV_MASK),
530 AD799X_CHANNEL(3, 10, AD799X_EV_MASK),
531 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 532 },
d22fd9c5 533 .num_channels = 5,
985dbe77 534 .default_config = AD7998_ALERT_EN,
6fe8135f 535 .info = &ad7993_4_7_8_info,
985dbe77
MH		 536 },
537 [ad7994] = {
7c626f58 538 .channel = {
ae6d6489
LPC		 539 AD799X_CHANNEL(0, 12, AD799X_EV_MASK),
540 AD799X_CHANNEL(1, 12, AD799X_EV_MASK),
541 AD799X_CHANNEL(2, 12, AD799X_EV_MASK),
542 AD799X_CHANNEL(3, 12, AD799X_EV_MASK),
543 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 544 },
d22fd9c5 545 .num_channels = 5,
985dbe77 546 .default_config = AD7998_ALERT_EN,
6fe8135f 547 .info = &ad7993_4_7_8_info,
985dbe77
MH		 548 },
549 [ad7997] = {
7c626f58 550 .channel = {
ae6d6489
LPC		 551 AD799X_CHANNEL(0, 10, AD799X_EV_MASK),
552 AD799X_CHANNEL(1, 10, AD799X_EV_MASK),
553 AD799X_CHANNEL(2, 10, AD799X_EV_MASK),
554 AD799X_CHANNEL(3, 10, AD799X_EV_MASK),
555 AD799X_CHANNEL(4, 10, 0),
556 AD799X_CHANNEL(5, 10, 0),
557 AD799X_CHANNEL(6, 10, 0),
558 AD799X_CHANNEL(7, 10, 0),
559 IIO_CHAN_SOFT_TIMESTAMP(8),
7c626f58 560 },
d22fd9c5 561 .num_channels = 9,
985dbe77 562 .default_config = AD7998_ALERT_EN,
6fe8135f 563 .info = &ad7993_4_7_8_info,
985dbe77
MH		 564 },
565 [ad7998] = {
7c626f58 566 .channel = {
ae6d6489
LPC		 567 AD799X_CHANNEL(0, 12, AD799X_EV_MASK),
568 AD799X_CHANNEL(1, 12, AD799X_EV_MASK),
569 AD799X_CHANNEL(2, 12, AD799X_EV_MASK),
570 AD799X_CHANNEL(3, 12, AD799X_EV_MASK),
571 AD799X_CHANNEL(4, 12, 0),
572 AD799X_CHANNEL(5, 12, 0),
573 AD799X_CHANNEL(6, 12, 0),
574 AD799X_CHANNEL(7, 12, 0),
575 IIO_CHAN_SOFT_TIMESTAMP(8),
7c626f58 576 },
d22fd9c5 577 .num_channels = 9,
985dbe77 578 .default_config = AD7998_ALERT_EN,
6fe8135f 579 .info = &ad7993_4_7_8_info,
985dbe77
MH		 580 },
581};
582
4ae1c61f 583static int ad799x_probe(struct i2c_client *client,
985dbe77
MH		 584 const struct i2c_device_id *id)
585{
26d25ae3 586 int ret;
985dbe77 587 struct ad799x_platform_data *pdata = client->dev.platform_data;
1bf7ac76 588 struct ad799x_state *st;
7cbb7537 589 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
1bf7ac76
MH		 590
591 if (indio_dev == NULL)
592 return -ENOMEM;
985dbe77 593
1bf7ac76 594 st = iio_priv(indio_dev);
985dbe77 595 /* this is only used for device removal purposes */
1bf7ac76 596 i2c_set_clientdata(client, indio_dev);
985dbe77 597
985dbe77
MH		 598 st->id = id->driver_data;
599 st->chip_info = &ad799x_chip_info_tbl[st->id];
600 st->config = st->chip_info->default_config;
601
602 /* TODO: Add pdata options for filtering and bit delay */
603
8c7e8627
LPC		 604 if (!pdata)
605 return -EINVAL;
606
607 st->int_vref_mv = pdata->vref_mv;
985dbe77
MH		 608
609 st->reg = regulator_get(&client->dev, "vcc");
610 if (!IS_ERR(st->reg)) {
611 ret = regulator_enable(st->reg);
612 if (ret)
613 goto error_put_reg;
614 }
615 st->client = client;
616
1bf7ac76
MH		 617 indio_dev->dev.parent = &client->dev;
618 indio_dev->name = id->name;
6fe8135f 619 indio_dev->info = st->chip_info->info;
6fe8135f 620
1bf7ac76 621 indio_dev->modes = INDIO_DIRECT_MODE;
1bf7ac76
MH		 622 indio_dev->channels = st->chip_info->channel;
623 indio_dev->num_channels = st->chip_info->num_channels;
1bf7ac76
MH		 624
625 ret = ad799x_register_ring_funcs_and_init(indio_dev);
985dbe77 626 if (ret)
1bf7ac76 627 goto error_disable_reg;
985dbe77 628
6fe8135f 629 if (client->irq > 0) {
72148f6e
JC		 630 ret = request_threaded_irq(client->irq,
631 NULL,
632 ad799x_event_handler,
633 IRQF_TRIGGER_FALLING |
634 IRQF_ONESHOT,
635 client->name,
1bf7ac76 636 indio_dev);
985dbe77
MH		 637 if (ret)
638 goto error_cleanup_ring;
985dbe77 639 }
26d25ae3
JC		 640 ret = iio_device_register(indio_dev);
641 if (ret)
642 goto error_free_irq;
985dbe77
MH		 643
644 return 0;
1bf7ac76 645
26d25ae3
JC		 646error_free_irq:
647 free_irq(client->irq, indio_dev);
985dbe77 648error_cleanup_ring:
1bf7ac76 649 ad799x_ring_cleanup(indio_dev);
985dbe77
MH		 650error_disable_reg:
651 if (!IS_ERR(st->reg))
652 regulator_disable(st->reg);
653error_put_reg:
654 if (!IS_ERR(st->reg))
655 regulator_put(st->reg);
7cbb7537 656 iio_device_free(indio_dev);
1bf7ac76 657
985dbe77
MH		 658 return ret;
659}
660
447d4f29 661static int ad799x_remove(struct i2c_client *client)
985dbe77 662{
1bf7ac76
MH		 663 struct iio_dev *indio_dev = i2c_get_clientdata(client);
664 struct ad799x_state *st = iio_priv(indio_dev);
985dbe77 665
d2fffd6c 666 iio_device_unregister(indio_dev);
6fe8135f 667 if (client->irq > 0)
72148f6e 668 free_irq(client->irq, indio_dev);
985dbe77 669
985dbe77 670 ad799x_ring_cleanup(indio_dev);
985dbe77
MH		 671 if (!IS_ERR(st->reg)) {
672 regulator_disable(st->reg);
673 regulator_put(st->reg);
674 }
d8dca330 675 kfree(st->rx_buf);
7cbb7537 676 iio_device_free(indio_dev);
985dbe77
MH		 677
678 return 0;
679}
680
681static const struct i2c_device_id ad799x_id[] = {
682 { "ad7991", ad7991 },
683 { "ad7995", ad7995 },
684 { "ad7999", ad7999 },
685 { "ad7992", ad7992 },
686 { "ad7993", ad7993 },
687 { "ad7994", ad7994 },
688 { "ad7997", ad7997 },
689 { "ad7998", ad7998 },
690 {}
691};
692
693MODULE_DEVICE_TABLE(i2c, ad799x_id);
694
695static struct i2c_driver ad799x_driver = {
696 .driver = {
697 .name = "ad799x",
698 },
699 .probe = ad799x_probe,
e543acf0 700 .remove = ad799x_remove,
985dbe77
MH		 701 .id_table = ad799x_id,
702};
6e5af184 703module_i2c_driver(ad799x_driver);
985dbe77
MH		 704
705MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
706MODULE_DESCRIPTION("Analog Devices AD799x ADC");
707MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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