Merge remote-tracking branch 'spi/topic/rspi' into spi-pdata
[deliverable/linux.git] / drivers / staging / iio / adc / mxs-lradc.c
CommitLineData
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1/*
2 * Freescale i.MX28 LRADC driver
3 *
4 * Copyright (c) 2012 DENX Software Engineering, GmbH.
5 * Marek Vasut <marex@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
97f4be60 18#include <linux/err.h>
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19#include <linux/interrupt.h>
20#include <linux/device.h>
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/sysfs.h>
26#include <linux/list.h>
27#include <linux/io.h>
28#include <linux/module.h>
29#include <linux/platform_device.h>
30#include <linux/spinlock.h>
31#include <linux/wait.h>
32#include <linux/sched.h>
33#include <linux/stmp_device.h>
34#include <linux/bitops.h>
35#include <linux/completion.h>
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36#include <linux/delay.h>
37#include <linux/input.h>
bc2c90c9 38
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39#include <linux/iio/iio.h>
40#include <linux/iio/buffer.h>
41#include <linux/iio/trigger.h>
42#include <linux/iio/trigger_consumer.h>
43#include <linux/iio/triggered_buffer.h>
44
45#define DRIVER_NAME "mxs-lradc"
46
47#define LRADC_MAX_DELAY_CHANS 4
48#define LRADC_MAX_MAPPED_CHANS 8
49#define LRADC_MAX_TOTAL_CHANS 16
50
51#define LRADC_DELAY_TIMER_HZ 2000
52
53/*
54 * Make this runtime configurable if necessary. Currently, if the buffered mode
55 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
56 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
57 * seconds. The result is that the samples arrive every 500mS.
58 */
59#define LRADC_DELAY_TIMER_PER 200
60#define LRADC_DELAY_TIMER_LOOP 5
61
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62/*
63 * Once the pen touches the touchscreen, the touchscreen switches from
64 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
65 * is realized by worker thread, which is called every 20 or so milliseconds.
66 * This gives the touchscreen enough fluence and does not strain the system
67 * too much.
68 */
69#define LRADC_TS_SAMPLE_DELAY_MS 5
70
71/*
72 * The LRADC reads the following amount of samples from each touchscreen
73 * channel and the driver then computes avarage of these.
74 */
75#define LRADC_TS_SAMPLE_AMOUNT 4
76
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77enum mxs_lradc_id {
78 IMX23_LRADC,
79 IMX28_LRADC,
80};
81
82static const char * const mx23_lradc_irq_names[] = {
83 "mxs-lradc-touchscreen",
84 "mxs-lradc-channel0",
85 "mxs-lradc-channel1",
86 "mxs-lradc-channel2",
87 "mxs-lradc-channel3",
88 "mxs-lradc-channel4",
89 "mxs-lradc-channel5",
90 "mxs-lradc-channel6",
91 "mxs-lradc-channel7",
92};
93
94static const char * const mx28_lradc_irq_names[] = {
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95 "mxs-lradc-touchscreen",
96 "mxs-lradc-thresh0",
97 "mxs-lradc-thresh1",
98 "mxs-lradc-channel0",
99 "mxs-lradc-channel1",
100 "mxs-lradc-channel2",
101 "mxs-lradc-channel3",
102 "mxs-lradc-channel4",
103 "mxs-lradc-channel5",
104 "mxs-lradc-channel6",
105 "mxs-lradc-channel7",
106 "mxs-lradc-button0",
107 "mxs-lradc-button1",
108};
109
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110struct mxs_lradc_of_config {
111 const int irq_count;
112 const char * const *irq_name;
113};
114
ad76fda7 115static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
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116 [IMX23_LRADC] = {
117 .irq_count = ARRAY_SIZE(mx23_lradc_irq_names),
118 .irq_name = mx23_lradc_irq_names,
119 },
120 [IMX28_LRADC] = {
121 .irq_count = ARRAY_SIZE(mx28_lradc_irq_names),
122 .irq_name = mx28_lradc_irq_names,
123 },
124};
125
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126enum mxs_lradc_ts {
127 MXS_LRADC_TOUCHSCREEN_NONE = 0,
128 MXS_LRADC_TOUCHSCREEN_4WIRE,
129 MXS_LRADC_TOUCHSCREEN_5WIRE,
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130};
131
132struct mxs_lradc {
133 struct device *dev;
134 void __iomem *base;
135 int irq[13];
136
137 uint32_t *buffer;
138 struct iio_trigger *trig;
139
140 struct mutex lock;
141
bc2c90c9 142 struct completion completion;
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143
144 /*
145 * Touchscreen LRADC channels receives a private slot in the CTRL4
146 * register, the slot #7. Therefore only 7 slots instead of 8 in the
147 * CTRL4 register can be mapped to LRADC channels when using the
148 * touchscreen.
149 *
150 * Furthermore, certain LRADC channels are shared between touchscreen
151 * and/or touch-buttons and generic LRADC block. Therefore when using
152 * either of these, these channels are not available for the regular
153 * sampling. The shared channels are as follows:
154 *
155 * CH0 -- Touch button #0
156 * CH1 -- Touch button #1
157 * CH2 -- Touch screen XPUL
158 * CH3 -- Touch screen YPLL
159 * CH4 -- Touch screen XNUL
160 * CH5 -- Touch screen YNLR
161 * CH6 -- Touch screen WIPER (5-wire only)
162 *
163 * The bitfields below represents which parts of the LRADC block are
164 * switched into special mode of operation. These channels can not
165 * be sampled as regular LRADC channels. The driver will refuse any
166 * attempt to sample these channels.
167 */
168#define CHAN_MASK_TOUCHBUTTON (0x3 << 0)
169#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
170#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
171 enum mxs_lradc_ts use_touchscreen;
172 bool stop_touchscreen;
173 bool use_touchbutton;
174
175 struct input_dev *ts_input;
176 struct work_struct ts_work;
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177};
178
179#define LRADC_CTRL0 0x00
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180#define LRADC_CTRL0_TOUCH_DETECT_ENABLE (1 << 23)
181#define LRADC_CTRL0_TOUCH_SCREEN_TYPE (1 << 22)
182#define LRADC_CTRL0_YNNSW /* YM */ (1 << 21)
183#define LRADC_CTRL0_YPNSW /* YP */ (1 << 20)
184#define LRADC_CTRL0_YPPSW /* YP */ (1 << 19)
185#define LRADC_CTRL0_XNNSW /* XM */ (1 << 18)
186#define LRADC_CTRL0_XNPSW /* XM */ (1 << 17)
187#define LRADC_CTRL0_XPPSW /* XP */ (1 << 16)
188#define LRADC_CTRL0_PLATE_MASK (0x3f << 16)
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189
190#define LRADC_CTRL1 0x10
06ddd353 191#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1 << 24)
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192#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
193#define LRADC_CTRL1_LRADC_IRQ_EN_MASK (0x1fff << 16)
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194#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
195#define LRADC_CTRL1_TOUCH_DETECT_IRQ (1 << 8)
196#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
197#define LRADC_CTRL1_LRADC_IRQ_MASK 0x1fff
198#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
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199
200#define LRADC_CTRL2 0x20
201#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
202
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203#define LRADC_STATUS 0x40
204#define LRADC_STATUS_TOUCH_DETECT_RAW (1 << 0)
205
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206#define LRADC_CH(n) (0x50 + (0x10 * (n)))
207#define LRADC_CH_ACCUMULATE (1 << 29)
208#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
209#define LRADC_CH_NUM_SAMPLES_OFFSET 24
210#define LRADC_CH_VALUE_MASK 0x3ffff
211#define LRADC_CH_VALUE_OFFSET 0
212
213#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
214#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
215#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
216#define LRADC_DELAY_KICK (1 << 20)
217#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
218#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
219#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
220#define LRADC_DELAY_LOOP_COUNT_OFFSET 11
221#define LRADC_DELAY_DELAY_MASK 0x7ff
222#define LRADC_DELAY_DELAY_OFFSET 0
223
224#define LRADC_CTRL4 0x140
225#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
226#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
227
228/*
229 * Raw I/O operations
230 */
231static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
232 const struct iio_chan_spec *chan,
233 int *val, int *val2, long m)
234{
235 struct mxs_lradc *lradc = iio_priv(iio_dev);
236 int ret;
237
238 if (m != IIO_CHAN_INFO_RAW)
239 return -EINVAL;
240
241 /* Check for invalid channel */
242 if (chan->channel > LRADC_MAX_TOTAL_CHANS)
243 return -EINVAL;
244
245 /*
246 * See if there is no buffered operation in progess. If there is, simply
247 * bail out. This can be improved to support both buffered and raw IO at
248 * the same time, yet the code becomes horribly complicated. Therefore I
249 * applied KISS principle here.
250 */
251 ret = mutex_trylock(&lradc->lock);
252 if (!ret)
253 return -EBUSY;
254
255 INIT_COMPLETION(lradc->completion);
256
257 /*
258 * No buffered operation in progress, map the channel and trigger it.
259 * Virtual channel 0 is always used here as the others are always not
260 * used if doing raw sampling.
261 */
262 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
263 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
264 writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
265
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266 /* Clean the slot's previous content, then set new one. */
267 writel(LRADC_CTRL4_LRADCSELECT_MASK(0),
268 lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
269 writel(chan->channel, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
270
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271 writel(0, lradc->base + LRADC_CH(0));
272
273 /* Enable the IRQ and start sampling the channel. */
274 writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
275 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
276 writel(1 << 0, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
277
278 /* Wait for completion on the channel, 1 second max. */
279 ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
280 if (!ret)
281 ret = -ETIMEDOUT;
282 if (ret < 0)
283 goto err;
284
285 /* Read the data. */
286 *val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
287 ret = IIO_VAL_INT;
288
289err:
290 writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
291 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
292
293 mutex_unlock(&lradc->lock);
294
295 return ret;
296}
297
298static const struct iio_info mxs_lradc_iio_info = {
299 .driver_module = THIS_MODULE,
300 .read_raw = mxs_lradc_read_raw,
301};
302
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303/*
304 * Touchscreen handling
305 */
306enum lradc_ts_plate {
307 LRADC_SAMPLE_X,
308 LRADC_SAMPLE_Y,
309 LRADC_SAMPLE_PRESSURE,
310};
311
312static int mxs_lradc_ts_touched(struct mxs_lradc *lradc)
313{
314 uint32_t reg;
315
316 /* Enable touch detection. */
317 writel(LRADC_CTRL0_PLATE_MASK,
318 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
319 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
320 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
321
322 msleep(LRADC_TS_SAMPLE_DELAY_MS);
323
324 reg = readl(lradc->base + LRADC_STATUS);
325
326 return reg & LRADC_STATUS_TOUCH_DETECT_RAW;
327}
328
329static int32_t mxs_lradc_ts_sample(struct mxs_lradc *lradc,
330 enum lradc_ts_plate plate, int change)
331{
332 unsigned long delay, jiff;
333 uint32_t reg, ctrl0 = 0, chan = 0;
334 /* The touchscreen always uses CTRL4 slot #7. */
335 const uint8_t slot = 7;
336 uint32_t val;
337
338 /*
339 * There are three correct configurations of the controller sampling
340 * the touchscreen, each of these configuration provides different
341 * information from the touchscreen.
342 *
343 * The following table describes the sampling configurations:
344 * +-------------+-------+-------+-------+
345 * | Wire \ Axis | X | Y | Z |
346 * +---------------------+-------+-------+
347 * | X+ (CH2) | HI | TS | TS |
348 * +-------------+-------+-------+-------+
349 * | X- (CH4) | LO | SH | HI |
350 * +-------------+-------+-------+-------+
351 * | Y+ (CH3) | SH | HI | HI |
352 * +-------------+-------+-------+-------+
353 * | Y- (CH5) | TS | LO | SH |
354 * +-------------+-------+-------+-------+
355 *
356 * HI ... strong '1' ; LO ... strong '0'
357 * SH ... sample here ; TS ... tri-state
358 *
359 * There are a few other ways of obtaining the Z coordinate
360 * (aka. pressure), but the one in the table seems to be the
361 * most reliable one.
362 */
363 switch (plate) {
364 case LRADC_SAMPLE_X:
365 ctrl0 = LRADC_CTRL0_XPPSW | LRADC_CTRL0_XNNSW;
366 chan = 3;
367 break;
368 case LRADC_SAMPLE_Y:
369 ctrl0 = LRADC_CTRL0_YPPSW | LRADC_CTRL0_YNNSW;
370 chan = 4;
371 break;
372 case LRADC_SAMPLE_PRESSURE:
373 ctrl0 = LRADC_CTRL0_YPPSW | LRADC_CTRL0_XNNSW;
374 chan = 5;
375 break;
376 }
377
378 if (change) {
379 writel(LRADC_CTRL0_PLATE_MASK,
380 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
381 writel(ctrl0, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
382
383 writel(LRADC_CTRL4_LRADCSELECT_MASK(slot),
384 lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
385 writel(chan << LRADC_CTRL4_LRADCSELECT_OFFSET(slot),
386 lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
387 }
388
389 writel(0xffffffff, lradc->base + LRADC_CH(slot) + STMP_OFFSET_REG_CLR);
390 writel(1 << slot, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
391
392 delay = jiffies + msecs_to_jiffies(LRADC_TS_SAMPLE_DELAY_MS);
393 do {
394 jiff = jiffies;
395 reg = readl_relaxed(lradc->base + LRADC_CTRL1);
396 if (reg & LRADC_CTRL1_LRADC_IRQ(slot))
397 break;
398 } while (time_before(jiff, delay));
399
400 writel(LRADC_CTRL1_LRADC_IRQ(slot),
401 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
402
403 if (time_after_eq(jiff, delay))
404 return -ETIMEDOUT;
405
406 val = readl(lradc->base + LRADC_CH(slot));
407 val &= LRADC_CH_VALUE_MASK;
408
409 return val;
410}
411
412static int32_t mxs_lradc_ts_sample_filter(struct mxs_lradc *lradc,
413 enum lradc_ts_plate plate)
414{
415 int32_t val, tot = 0;
416 int i;
417
418 val = mxs_lradc_ts_sample(lradc, plate, 1);
419
420 /* Delay a bit so the touchscreen is stable. */
421 mdelay(2);
422
423 for (i = 0; i < LRADC_TS_SAMPLE_AMOUNT; i++) {
424 val = mxs_lradc_ts_sample(lradc, plate, 0);
425 tot += val;
426 }
427
428 return tot / LRADC_TS_SAMPLE_AMOUNT;
429}
430
431static void mxs_lradc_ts_work(struct work_struct *ts_work)
432{
433 struct mxs_lradc *lradc = container_of(ts_work,
434 struct mxs_lradc, ts_work);
435 int val_x, val_y, val_p;
436 bool valid = false;
437
438 while (mxs_lradc_ts_touched(lradc)) {
439 /* Disable touch detector so we can sample the touchscreen. */
440 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
441 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
442
443 if (likely(valid)) {
444 input_report_abs(lradc->ts_input, ABS_X, val_x);
445 input_report_abs(lradc->ts_input, ABS_Y, val_y);
446 input_report_abs(lradc->ts_input, ABS_PRESSURE, val_p);
447 input_report_key(lradc->ts_input, BTN_TOUCH, 1);
448 input_sync(lradc->ts_input);
449 }
450
451 valid = false;
452
453 val_x = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_X);
454 if (val_x < 0)
455 continue;
456 val_y = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_Y);
457 if (val_y < 0)
458 continue;
459 val_p = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_PRESSURE);
460 if (val_p < 0)
461 continue;
462
463 valid = true;
464 }
465
466 input_report_abs(lradc->ts_input, ABS_PRESSURE, 0);
467 input_report_key(lradc->ts_input, BTN_TOUCH, 0);
468 input_sync(lradc->ts_input);
469
470 /* Do not restart the TS IRQ if the driver is shutting down. */
471 if (lradc->stop_touchscreen)
472 return;
473
474 /* Restart the touchscreen interrupts. */
475 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ,
476 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
477 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
478 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
479}
480
481static int mxs_lradc_ts_open(struct input_dev *dev)
482{
483 struct mxs_lradc *lradc = input_get_drvdata(dev);
484
485 /* The touchscreen is starting. */
486 lradc->stop_touchscreen = false;
487
488 /* Enable the touch-detect circuitry. */
489 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
490 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
491
492 /* Enable the touch-detect IRQ. */
493 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
494 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
495
496 return 0;
497}
498
499static void mxs_lradc_ts_close(struct input_dev *dev)
500{
501 struct mxs_lradc *lradc = input_get_drvdata(dev);
502
503 /* Indicate the touchscreen is stopping. */
504 lradc->stop_touchscreen = true;
505 mb();
506
507 /* Wait until touchscreen thread finishes any possible remnants. */
508 cancel_work_sync(&lradc->ts_work);
509
510 /* Disable touchscreen touch-detect IRQ. */
511 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
512 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
513
514 /* Power-down touchscreen touch-detect circuitry. */
515 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
516 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
517}
518
519static int mxs_lradc_ts_register(struct mxs_lradc *lradc)
520{
521 struct input_dev *input;
522 struct device *dev = lradc->dev;
523 int ret;
524
525 if (!lradc->use_touchscreen)
526 return 0;
527
528 input = input_allocate_device();
529 if (!input) {
530 dev_err(dev, "Failed to allocate TS device!\n");
531 return -ENOMEM;
532 }
533
534 input->name = DRIVER_NAME;
535 input->id.bustype = BUS_HOST;
536 input->dev.parent = dev;
537 input->open = mxs_lradc_ts_open;
538 input->close = mxs_lradc_ts_close;
539
540 __set_bit(EV_ABS, input->evbit);
541 __set_bit(EV_KEY, input->evbit);
542 __set_bit(BTN_TOUCH, input->keybit);
543 input_set_abs_params(input, ABS_X, 0, LRADC_CH_VALUE_MASK, 0, 0);
544 input_set_abs_params(input, ABS_Y, 0, LRADC_CH_VALUE_MASK, 0, 0);
545 input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_CH_VALUE_MASK, 0, 0);
546
547 lradc->ts_input = input;
548 input_set_drvdata(input, lradc);
549 ret = input_register_device(input);
550 if (ret)
551 input_free_device(lradc->ts_input);
552
553 return ret;
554}
555
556static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc)
557{
558 if (!lradc->use_touchscreen)
559 return;
560
561 cancel_work_sync(&lradc->ts_work);
562
563 input_unregister_device(lradc->ts_input);
564}
565
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566/*
567 * IRQ Handling
568 */
569static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
570{
571 struct iio_dev *iio = data;
572 struct mxs_lradc *lradc = iio_priv(iio);
573 unsigned long reg = readl(lradc->base + LRADC_CTRL1);
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574 const uint32_t ts_irq_mask =
575 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
576 LRADC_CTRL1_TOUCH_DETECT_IRQ;
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577
578 if (!(reg & LRADC_CTRL1_LRADC_IRQ_MASK))
579 return IRQ_NONE;
580
581 /*
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582 * Touchscreen IRQ handling code has priority and therefore
583 * is placed here. In case touchscreen IRQ arrives, disable
584 * it ASAP
bc2c90c9 585 */
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586 if (reg & LRADC_CTRL1_TOUCH_DETECT_IRQ) {
587 writel(ts_irq_mask,
588 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
589 if (!lradc->stop_touchscreen)
590 schedule_work(&lradc->ts_work);
591 }
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592
593 if (iio_buffer_enabled(iio))
594 iio_trigger_poll(iio->trig, iio_get_time_ns());
595 else if (reg & LRADC_CTRL1_LRADC_IRQ(0))
596 complete(&lradc->completion);
597
598 writel(reg & LRADC_CTRL1_LRADC_IRQ_MASK,
599 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
600
601 return IRQ_HANDLED;
602}
603
604/*
605 * Trigger handling
606 */
607static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
608{
609 struct iio_poll_func *pf = p;
610 struct iio_dev *iio = pf->indio_dev;
611 struct mxs_lradc *lradc = iio_priv(iio);
bc2c90c9
MV
612 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
613 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
7b7a4efe 614 unsigned int i, j = 0;
bc2c90c9 615
f4914e5e 616 for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
bc2c90c9
MV
617 lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));
618 writel(chan_value, lradc->base + LRADC_CH(j));
619 lradc->buffer[j] &= LRADC_CH_VALUE_MASK;
620 lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;
621 j++;
622 }
623
624 if (iio->scan_timestamp) {
625 s64 *timestamp = (s64 *)((u8 *)lradc->buffer +
626 ALIGN(j, sizeof(s64)));
627 *timestamp = pf->timestamp;
628 }
629
84b36ce5 630 iio_push_to_buffers(iio, (u8 *)lradc->buffer);
bc2c90c9
MV
631
632 iio_trigger_notify_done(iio->trig);
633
634 return IRQ_HANDLED;
635}
636
637static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)
638{
1e9663c6 639 struct iio_dev *iio = iio_trigger_get_drvdata(trig);
bc2c90c9
MV
640 struct mxs_lradc *lradc = iio_priv(iio);
641 const uint32_t st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;
642
643 writel(LRADC_DELAY_KICK, lradc->base + LRADC_DELAY(0) + st);
644
645 return 0;
646}
647
648static const struct iio_trigger_ops mxs_lradc_trigger_ops = {
649 .owner = THIS_MODULE,
650 .set_trigger_state = &mxs_lradc_configure_trigger,
651};
652
653static int mxs_lradc_trigger_init(struct iio_dev *iio)
654{
655 int ret;
656 struct iio_trigger *trig;
e1b1fa66 657 struct mxs_lradc *lradc = iio_priv(iio);
bc2c90c9
MV
658
659 trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);
660 if (trig == NULL)
661 return -ENOMEM;
662
e1b1fa66 663 trig->dev.parent = lradc->dev;
1e9663c6 664 iio_trigger_set_drvdata(trig, iio);
bc2c90c9
MV
665 trig->ops = &mxs_lradc_trigger_ops;
666
667 ret = iio_trigger_register(trig);
668 if (ret) {
669 iio_trigger_free(trig);
670 return ret;
671 }
672
e1b1fa66 673 lradc->trig = trig;
bc2c90c9
MV
674
675 return 0;
676}
677
678static void mxs_lradc_trigger_remove(struct iio_dev *iio)
679{
e1b1fa66
MV
680 struct mxs_lradc *lradc = iio_priv(iio);
681
682 iio_trigger_unregister(lradc->trig);
683 iio_trigger_free(lradc->trig);
bc2c90c9
MV
684}
685
686static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
687{
688 struct mxs_lradc *lradc = iio_priv(iio);
06ddd353
MV
689 int ret = 0, chan, ofs = 0;
690 unsigned long enable = 0;
691 uint32_t ctrl4_set = 0;
692 uint32_t ctrl4_clr = 0;
bc2c90c9
MV
693 uint32_t ctrl1_irq = 0;
694 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
695 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
c80712c7 696 const int len = bitmap_weight(iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS);
bc2c90c9
MV
697
698 if (!len)
699 return -EINVAL;
700
701 /*
702 * Lock the driver so raw access can not be done during buffered
703 * operation. This simplifies the code a lot.
704 */
705 ret = mutex_trylock(&lradc->lock);
706 if (!ret)
707 return -EBUSY;
708
709 lradc->buffer = kmalloc(len * sizeof(*lradc->buffer), GFP_KERNEL);
710 if (!lradc->buffer) {
711 ret = -ENOMEM;
712 goto err_mem;
713 }
714
715 ret = iio_sw_buffer_preenable(iio);
716 if (ret < 0)
717 goto err_buf;
718
719 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
720 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
721 writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
722
c80712c7 723 for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
06ddd353
MV
724 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
725 ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);
bc2c90c9
MV
726 ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);
727 writel(chan_value, lradc->base + LRADC_CH(ofs));
06ddd353 728 bitmap_set(&enable, ofs, 1);
bc2c90c9 729 ofs++;
73327b4c 730 }
bc2c90c9
MV
731
732 writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
733 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
734
06ddd353
MV
735 writel(ctrl4_clr, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
736 writel(ctrl4_set, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
737
bc2c90c9
MV
738 writel(ctrl1_irq, lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
739
740 writel(enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
741 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_SET);
742
743 return 0;
744
745err_buf:
746 kfree(lradc->buffer);
747err_mem:
748 mutex_unlock(&lradc->lock);
749 return ret;
750}
751
752static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
753{
754 struct mxs_lradc *lradc = iio_priv(iio);
755
756 writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
757 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
758
759 writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
760 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
761 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
762
763 kfree(lradc->buffer);
764 mutex_unlock(&lradc->lock);
765
766 return 0;
767}
768
769static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
770 const unsigned long *mask)
771{
06ddd353 772 struct mxs_lradc *lradc = iio_priv(iio);
f4914e5e 773 const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS);
06ddd353
MV
774 int rsvd_chans = 0;
775 unsigned long rsvd_mask = 0;
776
777 if (lradc->use_touchbutton)
778 rsvd_mask |= CHAN_MASK_TOUCHBUTTON;
779 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)
780 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;
781 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
782 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;
783
784 if (lradc->use_touchbutton)
785 rsvd_chans++;
786 if (lradc->use_touchscreen)
787 rsvd_chans++;
788
789 /* Test for attempts to map channels with special mode of operation. */
f4914e5e 790 if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))
06ddd353
MV
791 return false;
792
793 /* Test for attempts to map more channels then available slots. */
794 if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)
795 return false;
796
797 return true;
bc2c90c9
MV
798}
799
800static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {
801 .preenable = &mxs_lradc_buffer_preenable,
802 .postenable = &iio_triggered_buffer_postenable,
803 .predisable = &iio_triggered_buffer_predisable,
804 .postdisable = &mxs_lradc_buffer_postdisable,
805 .validate_scan_mask = &mxs_lradc_validate_scan_mask,
806};
807
808/*
809 * Driver initialization
810 */
811
812#define MXS_ADC_CHAN(idx, chan_type) { \
813 .type = (chan_type), \
814 .indexed = 1, \
815 .scan_index = (idx), \
78a5fa67 816 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
bc2c90c9
MV
817 .channel = (idx), \
818 .scan_type = { \
819 .sign = 'u', \
820 .realbits = 18, \
821 .storagebits = 32, \
822 }, \
823}
824
825static const struct iio_chan_spec mxs_lradc_chan_spec[] = {
826 MXS_ADC_CHAN(0, IIO_VOLTAGE),
827 MXS_ADC_CHAN(1, IIO_VOLTAGE),
828 MXS_ADC_CHAN(2, IIO_VOLTAGE),
829 MXS_ADC_CHAN(3, IIO_VOLTAGE),
830 MXS_ADC_CHAN(4, IIO_VOLTAGE),
831 MXS_ADC_CHAN(5, IIO_VOLTAGE),
832 MXS_ADC_CHAN(6, IIO_VOLTAGE),
833 MXS_ADC_CHAN(7, IIO_VOLTAGE), /* VBATT */
834 MXS_ADC_CHAN(8, IIO_TEMP), /* Temp sense 0 */
835 MXS_ADC_CHAN(9, IIO_TEMP), /* Temp sense 1 */
836 MXS_ADC_CHAN(10, IIO_VOLTAGE), /* VDDIO */
837 MXS_ADC_CHAN(11, IIO_VOLTAGE), /* VTH */
838 MXS_ADC_CHAN(12, IIO_VOLTAGE), /* VDDA */
839 MXS_ADC_CHAN(13, IIO_VOLTAGE), /* VDDD */
840 MXS_ADC_CHAN(14, IIO_VOLTAGE), /* VBG */
841 MXS_ADC_CHAN(15, IIO_VOLTAGE), /* VDD5V */
842};
843
844static void mxs_lradc_hw_init(struct mxs_lradc *lradc)
845{
06ddd353
MV
846 /* The ADC always uses DELAY CHANNEL 0. */
847 const uint32_t adc_cfg =
848 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |
bc2c90c9
MV
849 (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);
850
851 stmp_reset_block(lradc->base);
852
06ddd353
MV
853 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */
854 writel(adc_cfg, lradc->base + LRADC_DELAY(0));
855
856 /* Disable remaining DELAY CHANNELs */
857 writel(0, lradc->base + LRADC_DELAY(1));
858 writel(0, lradc->base + LRADC_DELAY(2));
859 writel(0, lradc->base + LRADC_DELAY(3));
860
861 /* Configure the touchscreen type */
862 writel(LRADC_CTRL0_TOUCH_SCREEN_TYPE,
863 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
864
865 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE) {
866 writel(LRADC_CTRL0_TOUCH_SCREEN_TYPE,
867 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
868 }
bc2c90c9
MV
869
870 /* Start internal temperature sensing. */
871 writel(0, lradc->base + LRADC_CTRL2);
872}
873
874static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
875{
876 int i;
877
878 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
879 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
880
881 for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)
882 writel(0, lradc->base + LRADC_DELAY(i));
883}
884
5e1f9aca
MV
885static const struct of_device_id mxs_lradc_dt_ids[] = {
886 { .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },
887 { .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },
888 { /* sentinel */ }
889};
890MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);
891
4ae1c61f 892static int mxs_lradc_probe(struct platform_device *pdev)
bc2c90c9 893{
5e1f9aca
MV
894 const struct of_device_id *of_id =
895 of_match_device(mxs_lradc_dt_ids, &pdev->dev);
896 const struct mxs_lradc_of_config *of_cfg =
897 &mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];
bc2c90c9 898 struct device *dev = &pdev->dev;
06ddd353 899 struct device_node *node = dev->of_node;
bc2c90c9
MV
900 struct mxs_lradc *lradc;
901 struct iio_dev *iio;
902 struct resource *iores;
06ddd353 903 uint32_t ts_wires = 0;
bc2c90c9
MV
904 int ret = 0;
905 int i;
906
907 /* Allocate the IIO device. */
908 iio = iio_device_alloc(sizeof(*lradc));
909 if (!iio) {
910 dev_err(dev, "Failed to allocate IIO device\n");
911 return -ENOMEM;
912 }
913
914 lradc = iio_priv(iio);
915
916 /* Grab the memory area */
917 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
918 lradc->dev = &pdev->dev;
97f4be60
TR
919 lradc->base = devm_ioremap_resource(dev, iores);
920 if (IS_ERR(lradc->base)) {
921 ret = PTR_ERR(lradc->base);
bc2c90c9
MV
922 goto err_addr;
923 }
924
06ddd353
MV
925 INIT_WORK(&lradc->ts_work, mxs_lradc_ts_work);
926
927 /* Check if touchscreen is enabled in DT. */
928 ret = of_property_read_u32(node, "fsl,lradc-touchscreen-wires",
929 &ts_wires);
930 if (ret)
931 dev_info(dev, "Touchscreen not enabled.\n");
932 else if (ts_wires == 4)
933 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;
934 else if (ts_wires == 5)
935 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;
936 else
937 dev_warn(dev, "Unsupported number of touchscreen wires (%d)\n",
938 ts_wires);
939
bc2c90c9 940 /* Grab all IRQ sources */
5e1f9aca 941 for (i = 0; i < of_cfg->irq_count; i++) {
bc2c90c9
MV
942 lradc->irq[i] = platform_get_irq(pdev, i);
943 if (lradc->irq[i] < 0) {
944 ret = -EINVAL;
945 goto err_addr;
946 }
947
948 ret = devm_request_irq(dev, lradc->irq[i],
949 mxs_lradc_handle_irq, 0,
5e1f9aca 950 of_cfg->irq_name[i], iio);
bc2c90c9
MV
951 if (ret)
952 goto err_addr;
953 }
954
955 platform_set_drvdata(pdev, iio);
956
957 init_completion(&lradc->completion);
958 mutex_init(&lradc->lock);
959
960 iio->name = pdev->name;
961 iio->dev.parent = &pdev->dev;
962 iio->info = &mxs_lradc_iio_info;
963 iio->modes = INDIO_DIRECT_MODE;
964 iio->channels = mxs_lradc_chan_spec;
965 iio->num_channels = ARRAY_SIZE(mxs_lradc_chan_spec);
f4914e5e 966 iio->masklength = LRADC_MAX_TOTAL_CHANS;
bc2c90c9
MV
967
968 ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,
969 &mxs_lradc_trigger_handler,
970 &mxs_lradc_buffer_ops);
971 if (ret)
972 goto err_addr;
973
974 ret = mxs_lradc_trigger_init(iio);
975 if (ret)
976 goto err_trig;
977
f6e8a968
AB
978 /* Configure the hardware. */
979 mxs_lradc_hw_init(lradc);
980
06ddd353
MV
981 /* Register the touchscreen input device. */
982 ret = mxs_lradc_ts_register(lradc);
983 if (ret)
984 goto err_dev;
985
bc2c90c9
MV
986 /* Register IIO device. */
987 ret = iio_device_register(iio);
988 if (ret) {
989 dev_err(dev, "Failed to register IIO device\n");
06ddd353 990 goto err_ts;
bc2c90c9
MV
991 }
992
bc2c90c9
MV
993 return 0;
994
06ddd353
MV
995err_ts:
996 mxs_lradc_ts_unregister(lradc);
bc2c90c9
MV
997err_dev:
998 mxs_lradc_trigger_remove(iio);
999err_trig:
1000 iio_triggered_buffer_cleanup(iio);
1001err_addr:
1002 iio_device_free(iio);
1003 return ret;
1004}
1005
447d4f29 1006static int mxs_lradc_remove(struct platform_device *pdev)
bc2c90c9
MV
1007{
1008 struct iio_dev *iio = platform_get_drvdata(pdev);
1009 struct mxs_lradc *lradc = iio_priv(iio);
1010
06ddd353
MV
1011 mxs_lradc_ts_unregister(lradc);
1012
bc2c90c9
MV
1013 mxs_lradc_hw_stop(lradc);
1014
1015 iio_device_unregister(iio);
1016 iio_triggered_buffer_cleanup(iio);
1017 mxs_lradc_trigger_remove(iio);
1018 iio_device_free(iio);
1019
1020 return 0;
1021}
1022
bc2c90c9
MV
1023static struct platform_driver mxs_lradc_driver = {
1024 .driver = {
1025 .name = DRIVER_NAME,
1026 .owner = THIS_MODULE,
1027 .of_match_table = mxs_lradc_dt_ids,
1028 },
1029 .probe = mxs_lradc_probe,
e543acf0 1030 .remove = mxs_lradc_remove,
bc2c90c9
MV
1031};
1032
1033module_platform_driver(mxs_lradc_driver);
1034
1035MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1036MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver");
1037MODULE_LICENSE("GPL v2");
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