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iio: exynos-adc: Fix typo in DT documentation
[deliverable/linux.git] / drivers / staging / iio / adc / mxs-lradc.c
CommitLineData
bc2c90c9
MV		 1/*
2 * Freescale i.MX28 LRADC driver
3 *
4 * Copyright (c) 2012 DENX Software Engineering, GmbH.
5 * Marek Vasut <marex@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
97f4be60 18#include <linux/err.h>
bc2c90c9
MV		 19#include <linux/interrupt.h>
20#include <linux/device.h>
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/sysfs.h>
26#include <linux/list.h>
27#include <linux/io.h>
28#include <linux/module.h>
29#include <linux/platform_device.h>
30#include <linux/spinlock.h>
31#include <linux/wait.h>
32#include <linux/sched.h>
33#include <linux/stmp_device.h>
34#include <linux/bitops.h>
35#include <linux/completion.h>
06ddd353
MV		 36#include <linux/delay.h>
37#include <linux/input.h>
bc2c90c9
MV		 38
39#include <mach/mxs.h>
40#include <mach/common.h>
41
42#include <linux/iio/iio.h>
43#include <linux/iio/buffer.h>
44#include <linux/iio/trigger.h>
45#include <linux/iio/trigger_consumer.h>
46#include <linux/iio/triggered_buffer.h>
47
48#define DRIVER_NAME "mxs-lradc"
49
50#define LRADC_MAX_DELAY_CHANS 4
51#define LRADC_MAX_MAPPED_CHANS 8
52#define LRADC_MAX_TOTAL_CHANS 16
53
54#define LRADC_DELAY_TIMER_HZ 2000
55
56/*
57 * Make this runtime configurable if necessary. Currently, if the buffered mode
58 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
59 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
60 * seconds. The result is that the samples arrive every 500mS.
61 */
62#define LRADC_DELAY_TIMER_PER 200
63#define LRADC_DELAY_TIMER_LOOP 5
64
06ddd353
MV		 65/*
66 * Once the pen touches the touchscreen, the touchscreen switches from
67 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
68 * is realized by worker thread, which is called every 20 or so milliseconds.
69 * This gives the touchscreen enough fluence and does not strain the system
70 * too much.
71 */
72#define LRADC_TS_SAMPLE_DELAY_MS 5
73
74/*
75 * The LRADC reads the following amount of samples from each touchscreen
76 * channel and the driver then computes avarage of these.
77 */
78#define LRADC_TS_SAMPLE_AMOUNT 4
79
5e1f9aca
MV		 80enum mxs_lradc_id {
81 IMX23_LRADC,
82 IMX28_LRADC,
83};
84
85static const char * const mx23_lradc_irq_names[] = {
86 "mxs-lradc-touchscreen",
87 "mxs-lradc-channel0",
88 "mxs-lradc-channel1",
89 "mxs-lradc-channel2",
90 "mxs-lradc-channel3",
91 "mxs-lradc-channel4",
92 "mxs-lradc-channel5",
93 "mxs-lradc-channel6",
94 "mxs-lradc-channel7",
95};
96
97static const char * const mx28_lradc_irq_names[] = {
bc2c90c9
MV		 98 "mxs-lradc-touchscreen",
99 "mxs-lradc-thresh0",
100 "mxs-lradc-thresh1",
101 "mxs-lradc-channel0",
102 "mxs-lradc-channel1",
103 "mxs-lradc-channel2",
104 "mxs-lradc-channel3",
105 "mxs-lradc-channel4",
106 "mxs-lradc-channel5",
107 "mxs-lradc-channel6",
108 "mxs-lradc-channel7",
109 "mxs-lradc-button0",
110 "mxs-lradc-button1",
111};
112
5e1f9aca
MV		 113struct mxs_lradc_of_config {
114 const int irq_count;
115 const char * const *irq_name;
116};
117
ad76fda7 118static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
5e1f9aca
MV		 119 [IMX23_LRADC] = {
120 .irq_count = ARRAY_SIZE(mx23_lradc_irq_names),
121 .irq_name = mx23_lradc_irq_names,
122 },
123 [IMX28_LRADC] = {
124 .irq_count = ARRAY_SIZE(mx28_lradc_irq_names),
125 .irq_name = mx28_lradc_irq_names,
126 },
127};
128
06ddd353
MV		 129enum mxs_lradc_ts {
130 MXS_LRADC_TOUCHSCREEN_NONE = 0,
131 MXS_LRADC_TOUCHSCREEN_4WIRE,
132 MXS_LRADC_TOUCHSCREEN_5WIRE,
bc2c90c9
MV		 133};
134
135struct mxs_lradc {
136 struct device *dev;
137 void __iomem *base;
138 int irq[13];
139
140 uint32_t *buffer;
141 struct iio_trigger *trig;
142
143 struct mutex lock;
144
bc2c90c9 145 struct completion completion;
06ddd353
MV		 146
147 /*
148 * Touchscreen LRADC channels receives a private slot in the CTRL4
149 * register, the slot #7. Therefore only 7 slots instead of 8 in the
150 * CTRL4 register can be mapped to LRADC channels when using the
151 * touchscreen.
152 *
153 * Furthermore, certain LRADC channels are shared between touchscreen
154 * and/or touch-buttons and generic LRADC block. Therefore when using
155 * either of these, these channels are not available for the regular
156 * sampling. The shared channels are as follows:
157 *
158 * CH0 -- Touch button #0
159 * CH1 -- Touch button #1
160 * CH2 -- Touch screen XPUL
161 * CH3 -- Touch screen YPLL
162 * CH4 -- Touch screen XNUL
163 * CH5 -- Touch screen YNLR
164 * CH6 -- Touch screen WIPER (5-wire only)
165 *
166 * The bitfields below represents which parts of the LRADC block are
167 * switched into special mode of operation. These channels can not
168 * be sampled as regular LRADC channels. The driver will refuse any
169 * attempt to sample these channels.
170 */
171#define CHAN_MASK_TOUCHBUTTON (0x3 << 0)
172#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
173#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
174 enum mxs_lradc_ts use_touchscreen;
175 bool stop_touchscreen;
176 bool use_touchbutton;
177
178 struct input_dev *ts_input;
179 struct work_struct ts_work;
bc2c90c9
MV		 180};
181
182#define LRADC_CTRL0 0x00
06ddd353
MV		 183#define LRADC_CTRL0_TOUCH_DETECT_ENABLE (1 << 23)
184#define LRADC_CTRL0_TOUCH_SCREEN_TYPE (1 << 22)
185#define LRADC_CTRL0_YNNSW /* YM */ (1 << 21)
186#define LRADC_CTRL0_YPNSW /* YP */ (1 << 20)
187#define LRADC_CTRL0_YPPSW /* YP */ (1 << 19)
188#define LRADC_CTRL0_XNNSW /* XM */ (1 << 18)
189#define LRADC_CTRL0_XNPSW /* XM */ (1 << 17)
190#define LRADC_CTRL0_XPPSW /* XP */ (1 << 16)
191#define LRADC_CTRL0_PLATE_MASK (0x3f << 16)
bc2c90c9
MV		 192
193#define LRADC_CTRL1 0x10
06ddd353 194#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1 << 24)
bc2c90c9
MV		 195#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
196#define LRADC_CTRL1_LRADC_IRQ_EN_MASK (0x1fff << 16)
06ddd353
MV		 197#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
198#define LRADC_CTRL1_TOUCH_DETECT_IRQ (1 << 8)
199#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
200#define LRADC_CTRL1_LRADC_IRQ_MASK 0x1fff
201#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
bc2c90c9
MV		 202
203#define LRADC_CTRL2 0x20
204#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
205
06ddd353
MV		 206#define LRADC_STATUS 0x40
207#define LRADC_STATUS_TOUCH_DETECT_RAW (1 << 0)
208
bc2c90c9
MV		 209#define LRADC_CH(n) (0x50 + (0x10 * (n)))
210#define LRADC_CH_ACCUMULATE (1 << 29)
211#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
212#define LRADC_CH_NUM_SAMPLES_OFFSET 24
213#define LRADC_CH_VALUE_MASK 0x3ffff
214#define LRADC_CH_VALUE_OFFSET 0
215
216#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
217#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
218#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
219#define LRADC_DELAY_KICK (1 << 20)
220#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
221#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
222#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
223#define LRADC_DELAY_LOOP_COUNT_OFFSET 11
224#define LRADC_DELAY_DELAY_MASK 0x7ff
225#define LRADC_DELAY_DELAY_OFFSET 0
226
227#define LRADC_CTRL4 0x140
228#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
229#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
230
231/*
232 * Raw I/O operations
233 */
234static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
235 const struct iio_chan_spec *chan,
236 int *val, int *val2, long m)
237{
238 struct mxs_lradc *lradc = iio_priv(iio_dev);
239 int ret;
06ddd353 240 unsigned long mask;
bc2c90c9
MV		 241
242 if (m != IIO_CHAN_INFO_RAW)
243 return -EINVAL;
244
245 /* Check for invalid channel */
246 if (chan->channel > LRADC_MAX_TOTAL_CHANS)
247 return -EINVAL;
248
06ddd353
MV		 249 /* Validate the channel if it doesn't intersect with reserved chans. */
250 bitmap_set(&mask, chan->channel, 1);
251 ret = iio_validate_scan_mask_onehot(iio_dev, &mask);
252 if (ret)
253 return -EINVAL;
254
bc2c90c9
MV		 255 /*
256 * See if there is no buffered operation in progess. If there is, simply
257 * bail out. This can be improved to support both buffered and raw IO at
258 * the same time, yet the code becomes horribly complicated. Therefore I
259 * applied KISS principle here.
260 */
261 ret = mutex_trylock(&lradc->lock);
262 if (!ret)
263 return -EBUSY;
264
265 INIT_COMPLETION(lradc->completion);
266
267 /*
268 * No buffered operation in progress, map the channel and trigger it.
269 * Virtual channel 0 is always used here as the others are always not
270 * used if doing raw sampling.
271 */
272 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
273 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
274 writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
275
06ddd353
MV		 276 /* Clean the slot's previous content, then set new one. */
277 writel(LRADC_CTRL4_LRADCSELECT_MASK(0),
278 lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
279 writel(chan->channel, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
280
bc2c90c9
MV		 281 writel(0, lradc->base + LRADC_CH(0));
282
283 /* Enable the IRQ and start sampling the channel. */
284 writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
285 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
286 writel(1 << 0, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
287
288 /* Wait for completion on the channel, 1 second max. */
289 ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
290 if (!ret)
291 ret = -ETIMEDOUT;
292 if (ret < 0)
293 goto err;
294
295 /* Read the data. */
296 *val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
297 ret = IIO_VAL_INT;
298
299err:
300 writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
301 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
302
303 mutex_unlock(&lradc->lock);
304
305 return ret;
306}
307
308static const struct iio_info mxs_lradc_iio_info = {
309 .driver_module = THIS_MODULE,
310 .read_raw = mxs_lradc_read_raw,
311};
312
06ddd353
MV		 313/*
314 * Touchscreen handling
315 */
316enum lradc_ts_plate {
317 LRADC_SAMPLE_X,
318 LRADC_SAMPLE_Y,
319 LRADC_SAMPLE_PRESSURE,
320};
321
322static int mxs_lradc_ts_touched(struct mxs_lradc *lradc)
323{
324 uint32_t reg;
325
326 /* Enable touch detection. */
327 writel(LRADC_CTRL0_PLATE_MASK,
328 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
329 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
330 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
331
332 msleep(LRADC_TS_SAMPLE_DELAY_MS);
333
334 reg = readl(lradc->base + LRADC_STATUS);
335
336 return reg & LRADC_STATUS_TOUCH_DETECT_RAW;
337}
338
339static int32_t mxs_lradc_ts_sample(struct mxs_lradc *lradc,
340 enum lradc_ts_plate plate, int change)
341{
342 unsigned long delay, jiff;
343 uint32_t reg, ctrl0 = 0, chan = 0;
344 /* The touchscreen always uses CTRL4 slot #7. */
345 const uint8_t slot = 7;
346 uint32_t val;
347
348 /*
349 * There are three correct configurations of the controller sampling
350 * the touchscreen, each of these configuration provides different
351 * information from the touchscreen.
352 *
353 * The following table describes the sampling configurations:
354 * +-------------+-------+-------+-------+
355 * | Wire \ Axis | X | Y | Z |
356 * +---------------------+-------+-------+
357 * | X+ (CH2) | HI | TS | TS |
358 * +-------------+-------+-------+-------+
359 * | X- (CH4) | LO | SH | HI |
360 * +-------------+-------+-------+-------+
361 * | Y+ (CH3) | SH | HI | HI |
362 * +-------------+-------+-------+-------+
363 * | Y- (CH5) | TS | LO | SH |
364 * +-------------+-------+-------+-------+
365 *
366 * HI ... strong '1' ; LO ... strong '0'
367 * SH ... sample here ; TS ... tri-state
368 *
369 * There are a few other ways of obtaining the Z coordinate
370 * (aka. pressure), but the one in the table seems to be the
371 * most reliable one.
372 */
373 switch (plate) {
374 case LRADC_SAMPLE_X:
375 ctrl0 = LRADC_CTRL0_XPPSW | LRADC_CTRL0_XNNSW;
376 chan = 3;
377 break;
378 case LRADC_SAMPLE_Y:
379 ctrl0 = LRADC_CTRL0_YPPSW | LRADC_CTRL0_YNNSW;
380 chan = 4;
381 break;
382 case LRADC_SAMPLE_PRESSURE:
383 ctrl0 = LRADC_CTRL0_YPPSW | LRADC_CTRL0_XNNSW;
384 chan = 5;
385 break;
386 }
387
388 if (change) {
389 writel(LRADC_CTRL0_PLATE_MASK,
390 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
391 writel(ctrl0, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
392
393 writel(LRADC_CTRL4_LRADCSELECT_MASK(slot),
394 lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
395 writel(chan << LRADC_CTRL4_LRADCSELECT_OFFSET(slot),
396 lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
397 }
398
399 writel(0xffffffff, lradc->base + LRADC_CH(slot) + STMP_OFFSET_REG_CLR);
400 writel(1 << slot, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
401
402 delay = jiffies + msecs_to_jiffies(LRADC_TS_SAMPLE_DELAY_MS);
403 do {
404 jiff = jiffies;
405 reg = readl_relaxed(lradc->base + LRADC_CTRL1);
406 if (reg & LRADC_CTRL1_LRADC_IRQ(slot))
407 break;
408 } while (time_before(jiff, delay));
409
410 writel(LRADC_CTRL1_LRADC_IRQ(slot),
411 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
412
413 if (time_after_eq(jiff, delay))
414 return -ETIMEDOUT;
415
416 val = readl(lradc->base + LRADC_CH(slot));
417 val &= LRADC_CH_VALUE_MASK;
418
419 return val;
420}
421
422static int32_t mxs_lradc_ts_sample_filter(struct mxs_lradc *lradc,
423 enum lradc_ts_plate plate)
424{
425 int32_t val, tot = 0;
426 int i;
427
428 val = mxs_lradc_ts_sample(lradc, plate, 1);
429
430 /* Delay a bit so the touchscreen is stable. */
431 mdelay(2);
432
433 for (i = 0; i < LRADC_TS_SAMPLE_AMOUNT; i++) {
434 val = mxs_lradc_ts_sample(lradc, plate, 0);
435 tot += val;
436 }
437
438 return tot / LRADC_TS_SAMPLE_AMOUNT;
439}
440
441static void mxs_lradc_ts_work(struct work_struct *ts_work)
442{
443 struct mxs_lradc *lradc = container_of(ts_work,
444 struct mxs_lradc, ts_work);
445 int val_x, val_y, val_p;
446 bool valid = false;
447
448 while (mxs_lradc_ts_touched(lradc)) {
449 /* Disable touch detector so we can sample the touchscreen. */
450 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
451 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
452
453 if (likely(valid)) {
454 input_report_abs(lradc->ts_input, ABS_X, val_x);
455 input_report_abs(lradc->ts_input, ABS_Y, val_y);
456 input_report_abs(lradc->ts_input, ABS_PRESSURE, val_p);
457 input_report_key(lradc->ts_input, BTN_TOUCH, 1);
458 input_sync(lradc->ts_input);
459 }
460
461 valid = false;
462
463 val_x = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_X);
464 if (val_x < 0)
465 continue;
466 val_y = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_Y);
467 if (val_y < 0)
468 continue;
469 val_p = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_PRESSURE);
470 if (val_p < 0)
471 continue;
472
473 valid = true;
474 }
475
476 input_report_abs(lradc->ts_input, ABS_PRESSURE, 0);
477 input_report_key(lradc->ts_input, BTN_TOUCH, 0);
478 input_sync(lradc->ts_input);
479
480 /* Do not restart the TS IRQ if the driver is shutting down. */
481 if (lradc->stop_touchscreen)
482 return;
483
484 /* Restart the touchscreen interrupts. */
485 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ,
486 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
487 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
488 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
489}
490
491static int mxs_lradc_ts_open(struct input_dev *dev)
492{
493 struct mxs_lradc *lradc = input_get_drvdata(dev);
494
495 /* The touchscreen is starting. */
496 lradc->stop_touchscreen = false;
497
498 /* Enable the touch-detect circuitry. */
499 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
500 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
501
502 /* Enable the touch-detect IRQ. */
503 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
504 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
505
506 return 0;
507}
508
509static void mxs_lradc_ts_close(struct input_dev *dev)
510{
511 struct mxs_lradc *lradc = input_get_drvdata(dev);
512
513 /* Indicate the touchscreen is stopping. */
514 lradc->stop_touchscreen = true;
515 mb();
516
517 /* Wait until touchscreen thread finishes any possible remnants. */
518 cancel_work_sync(&lradc->ts_work);
519
520 /* Disable touchscreen touch-detect IRQ. */
521 writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
522 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
523
524 /* Power-down touchscreen touch-detect circuitry. */
525 writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
526 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
527}
528
529static int mxs_lradc_ts_register(struct mxs_lradc *lradc)
530{
531 struct input_dev *input;
532 struct device *dev = lradc->dev;
533 int ret;
534
535 if (!lradc->use_touchscreen)
536 return 0;
537
538 input = input_allocate_device();
539 if (!input) {
540 dev_err(dev, "Failed to allocate TS device!\n");
541 return -ENOMEM;
542 }
543
544 input->name = DRIVER_NAME;
545 input->id.bustype = BUS_HOST;
546 input->dev.parent = dev;
547 input->open = mxs_lradc_ts_open;
548 input->close = mxs_lradc_ts_close;
549
550 __set_bit(EV_ABS, input->evbit);
551 __set_bit(EV_KEY, input->evbit);
552 __set_bit(BTN_TOUCH, input->keybit);
553 input_set_abs_params(input, ABS_X, 0, LRADC_CH_VALUE_MASK, 0, 0);
554 input_set_abs_params(input, ABS_Y, 0, LRADC_CH_VALUE_MASK, 0, 0);
555 input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_CH_VALUE_MASK, 0, 0);
556
557 lradc->ts_input = input;
558 input_set_drvdata(input, lradc);
559 ret = input_register_device(input);
560 if (ret)
561 input_free_device(lradc->ts_input);
562
563 return ret;
564}
565
566static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc)
567{
568 if (!lradc->use_touchscreen)
569 return;
570
571 cancel_work_sync(&lradc->ts_work);
572
573 input_unregister_device(lradc->ts_input);
574}
575
bc2c90c9
MV		 576/*
577 * IRQ Handling
578 */
579static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
580{
581 struct iio_dev *iio = data;
582 struct mxs_lradc *lradc = iio_priv(iio);
583 unsigned long reg = readl(lradc->base + LRADC_CTRL1);
06ddd353
MV		 584 const uint32_t ts_irq_mask =
585 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
586 LRADC_CTRL1_TOUCH_DETECT_IRQ;
bc2c90c9
MV		 587
588 if (!(reg & LRADC_CTRL1_LRADC_IRQ_MASK))
589 return IRQ_NONE;
590
591 /*
06ddd353
MV		 592 * Touchscreen IRQ handling code has priority and therefore
593 * is placed here. In case touchscreen IRQ arrives, disable
594 * it ASAP
bc2c90c9 595 */
06ddd353
MV		 596 if (reg & LRADC_CTRL1_TOUCH_DETECT_IRQ) {
597 writel(ts_irq_mask,
598 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
599 if (!lradc->stop_touchscreen)
600 schedule_work(&lradc->ts_work);
601 }
bc2c90c9
MV		 602
603 if (iio_buffer_enabled(iio))
604 iio_trigger_poll(iio->trig, iio_get_time_ns());
605 else if (reg & LRADC_CTRL1_LRADC_IRQ(0))
606 complete(&lradc->completion);
607
608 writel(reg & LRADC_CTRL1_LRADC_IRQ_MASK,
609 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
610
611 return IRQ_HANDLED;
612}
613
614/*
615 * Trigger handling
616 */
617static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
618{
619 struct iio_poll_func *pf = p;
620 struct iio_dev *iio = pf->indio_dev;
621 struct mxs_lradc *lradc = iio_priv(iio);
bc2c90c9
MV		 622 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
623 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
7b7a4efe 624 unsigned int i, j = 0;
bc2c90c9
MV		 625
626 for_each_set_bit(i, iio->active_scan_mask, iio->masklength) {
627 lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));
628 writel(chan_value, lradc->base + LRADC_CH(j));
629 lradc->buffer[j] &= LRADC_CH_VALUE_MASK;
630 lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;
631 j++;
632 }
633
634 if (iio->scan_timestamp) {
635 s64 *timestamp = (s64 *)((u8 *)lradc->buffer +
636 ALIGN(j, sizeof(s64)));
637 *timestamp = pf->timestamp;
638 }
639
84b36ce5 640 iio_push_to_buffers(iio, (u8 *)lradc->buffer);
bc2c90c9
MV		 641
642 iio_trigger_notify_done(iio->trig);
643
644 return IRQ_HANDLED;
645}
646
647static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)
648{
1e9663c6 649 struct iio_dev *iio = iio_trigger_get_drvdata(trig);
bc2c90c9
MV		 650 struct mxs_lradc *lradc = iio_priv(iio);
651 const uint32_t st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;
652
653 writel(LRADC_DELAY_KICK, lradc->base + LRADC_DELAY(0) + st);
654
655 return 0;
656}
657
658static const struct iio_trigger_ops mxs_lradc_trigger_ops = {
659 .owner = THIS_MODULE,
660 .set_trigger_state = &mxs_lradc_configure_trigger,
661};
662
663static int mxs_lradc_trigger_init(struct iio_dev *iio)
664{
665 int ret;
666 struct iio_trigger *trig;
667
668 trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);
669 if (trig == NULL)
670 return -ENOMEM;
671
672 trig->dev.parent = iio->dev.parent;
1e9663c6 673 iio_trigger_set_drvdata(trig, iio);
bc2c90c9
MV		 674 trig->ops = &mxs_lradc_trigger_ops;
675
676 ret = iio_trigger_register(trig);
677 if (ret) {
678 iio_trigger_free(trig);
679 return ret;
680 }
681
682 iio->trig = trig;
683
684 return 0;
685}
686
687static void mxs_lradc_trigger_remove(struct iio_dev *iio)
688{
689 iio_trigger_unregister(iio->trig);
690 iio_trigger_free(iio->trig);
691}
692
693static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
694{
695 struct mxs_lradc *lradc = iio_priv(iio);
696 struct iio_buffer *buffer = iio->buffer;
06ddd353
MV		 697 int ret = 0, chan, ofs = 0;
698 unsigned long enable = 0;
699 uint32_t ctrl4_set = 0;
700 uint32_t ctrl4_clr = 0;
bc2c90c9
MV		 701 uint32_t ctrl1_irq = 0;
702 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
703 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
704 const int len = bitmap_weight(buffer->scan_mask, LRADC_MAX_TOTAL_CHANS);
705
706 if (!len)
707 return -EINVAL;
708
709 /*
710 * Lock the driver so raw access can not be done during buffered
711 * operation. This simplifies the code a lot.
712 */
713 ret = mutex_trylock(&lradc->lock);
714 if (!ret)
715 return -EBUSY;
716
717 lradc->buffer = kmalloc(len * sizeof(*lradc->buffer), GFP_KERNEL);
718 if (!lradc->buffer) {
719 ret = -ENOMEM;
720 goto err_mem;
721 }
722
723 ret = iio_sw_buffer_preenable(iio);
724 if (ret < 0)
725 goto err_buf;
726
727 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
728 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
729 writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
730
731 for_each_set_bit(chan, buffer->scan_mask, LRADC_MAX_TOTAL_CHANS) {
06ddd353
MV		 732 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
733 ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);
bc2c90c9
MV		 734 ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);
735 writel(chan_value, lradc->base + LRADC_CH(ofs));
06ddd353 736 bitmap_set(&enable, ofs, 1);
bc2c90c9 737 ofs++;
73327b4c 738 }
bc2c90c9
MV		 739
740 writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
741 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
742
06ddd353
MV		 743 writel(ctrl4_clr, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
744 writel(ctrl4_set, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
745
bc2c90c9
MV		 746 writel(ctrl1_irq, lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
747
748 writel(enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
749 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_SET);
750
751 return 0;
752
753err_buf:
754 kfree(lradc->buffer);
755err_mem:
756 mutex_unlock(&lradc->lock);
757 return ret;
758}
759
760static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
761{
762 struct mxs_lradc *lradc = iio_priv(iio);
763
764 writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
765 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
766
767 writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
768 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
769 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
770
771 kfree(lradc->buffer);
772 mutex_unlock(&lradc->lock);
773
774 return 0;
775}
776
777static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
778 const unsigned long *mask)
779{
06ddd353
MV		 780 struct mxs_lradc *lradc = iio_priv(iio);
781 const int len = iio->masklength;
782 const int map_chans = bitmap_weight(mask, len);
783 int rsvd_chans = 0;
784 unsigned long rsvd_mask = 0;
785
786 if (lradc->use_touchbutton)
787 rsvd_mask |= CHAN_MASK_TOUCHBUTTON;
788 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)
789 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;
790 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
791 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;
792
793 if (lradc->use_touchbutton)
794 rsvd_chans++;
795 if (lradc->use_touchscreen)
796 rsvd_chans++;
797
798 /* Test for attempts to map channels with special mode of operation. */
799 if (bitmap_intersects(mask, &rsvd_mask, len))
800 return false;
801
802 /* Test for attempts to map more channels then available slots. */
803 if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)
804 return false;
805
806 return true;
bc2c90c9
MV		 807}
808
809static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {
810 .preenable = &mxs_lradc_buffer_preenable,
811 .postenable = &iio_triggered_buffer_postenable,
812 .predisable = &iio_triggered_buffer_predisable,
813 .postdisable = &mxs_lradc_buffer_postdisable,
814 .validate_scan_mask = &mxs_lradc_validate_scan_mask,
815};
816
817/*
818 * Driver initialization
819 */
820
821#define MXS_ADC_CHAN(idx, chan_type) { \
822 .type = (chan_type), \
823 .indexed = 1, \
824 .scan_index = (idx), \
78a5fa67 825 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
bc2c90c9
MV		 826 .channel = (idx), \
827 .scan_type = { \
828 .sign = 'u', \
829 .realbits = 18, \
830 .storagebits = 32, \
831 }, \
832}
833
834static const struct iio_chan_spec mxs_lradc_chan_spec[] = {
835 MXS_ADC_CHAN(0, IIO_VOLTAGE),
836 MXS_ADC_CHAN(1, IIO_VOLTAGE),
837 MXS_ADC_CHAN(2, IIO_VOLTAGE),
838 MXS_ADC_CHAN(3, IIO_VOLTAGE),
839 MXS_ADC_CHAN(4, IIO_VOLTAGE),
840 MXS_ADC_CHAN(5, IIO_VOLTAGE),
841 MXS_ADC_CHAN(6, IIO_VOLTAGE),
842 MXS_ADC_CHAN(7, IIO_VOLTAGE), /* VBATT */
843 MXS_ADC_CHAN(8, IIO_TEMP), /* Temp sense 0 */
844 MXS_ADC_CHAN(9, IIO_TEMP), /* Temp sense 1 */
845 MXS_ADC_CHAN(10, IIO_VOLTAGE), /* VDDIO */
846 MXS_ADC_CHAN(11, IIO_VOLTAGE), /* VTH */
847 MXS_ADC_CHAN(12, IIO_VOLTAGE), /* VDDA */
848 MXS_ADC_CHAN(13, IIO_VOLTAGE), /* VDDD */
849 MXS_ADC_CHAN(14, IIO_VOLTAGE), /* VBG */
850 MXS_ADC_CHAN(15, IIO_VOLTAGE), /* VDD5V */
851};
852
853static void mxs_lradc_hw_init(struct mxs_lradc *lradc)
854{
06ddd353
MV		 855 /* The ADC always uses DELAY CHANNEL 0. */
856 const uint32_t adc_cfg =
857 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |
bc2c90c9
MV		 858 (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);
859
860 stmp_reset_block(lradc->base);
861
06ddd353
MV		 862 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */
863 writel(adc_cfg, lradc->base + LRADC_DELAY(0));
864
865 /* Disable remaining DELAY CHANNELs */
866 writel(0, lradc->base + LRADC_DELAY(1));
867 writel(0, lradc->base + LRADC_DELAY(2));
868 writel(0, lradc->base + LRADC_DELAY(3));
869
870 /* Configure the touchscreen type */
871 writel(LRADC_CTRL0_TOUCH_SCREEN_TYPE,
872 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
873
874 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE) {
875 writel(LRADC_CTRL0_TOUCH_SCREEN_TYPE,
876 lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
877 }
bc2c90c9
MV		 878
879 /* Start internal temperature sensing. */
880 writel(0, lradc->base + LRADC_CTRL2);
881}
882
883static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
884{
885 int i;
886
887 writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
888 lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
889
890 for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)
891 writel(0, lradc->base + LRADC_DELAY(i));
892}
893
5e1f9aca
MV		 894static const struct of_device_id mxs_lradc_dt_ids[] = {
895 { .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },
896 { .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },
897 { /* sentinel */ }
898};
899MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);
900
4ae1c61f 901static int mxs_lradc_probe(struct platform_device *pdev)
bc2c90c9 902{
5e1f9aca
MV		 903 const struct of_device_id *of_id =
904 of_match_device(mxs_lradc_dt_ids, &pdev->dev);
905 const struct mxs_lradc_of_config *of_cfg =
906 &mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];
bc2c90c9 907 struct device *dev = &pdev->dev;
06ddd353 908 struct device_node *node = dev->of_node;
bc2c90c9
MV		 909 struct mxs_lradc *lradc;
910 struct iio_dev *iio;
911 struct resource *iores;
06ddd353 912 uint32_t ts_wires = 0;
bc2c90c9
MV		 913 int ret = 0;
914 int i;
915
916 /* Allocate the IIO device. */
917 iio = iio_device_alloc(sizeof(*lradc));
918 if (!iio) {
919 dev_err(dev, "Failed to allocate IIO device\n");
920 return -ENOMEM;
921 }
922
923 lradc = iio_priv(iio);
924
925 /* Grab the memory area */
926 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
927 lradc->dev = &pdev->dev;
97f4be60
TR		 928 lradc->base = devm_ioremap_resource(dev, iores);
929 if (IS_ERR(lradc->base)) {
930 ret = PTR_ERR(lradc->base);
bc2c90c9
MV		 931 goto err_addr;
932 }
933
06ddd353
MV		 934 INIT_WORK(&lradc->ts_work, mxs_lradc_ts_work);
935
936 /* Check if touchscreen is enabled in DT. */
937 ret = of_property_read_u32(node, "fsl,lradc-touchscreen-wires",
938 &ts_wires);
939 if (ret)
940 dev_info(dev, "Touchscreen not enabled.\n");
941 else if (ts_wires == 4)
942 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;
943 else if (ts_wires == 5)
944 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;
945 else
946 dev_warn(dev, "Unsupported number of touchscreen wires (%d)\n",
947 ts_wires);
948
bc2c90c9 949 /* Grab all IRQ sources */
5e1f9aca 950 for (i = 0; i < of_cfg->irq_count; i++) {
bc2c90c9
MV		 951 lradc->irq[i] = platform_get_irq(pdev, i);
952 if (lradc->irq[i] < 0) {
953 ret = -EINVAL;
954 goto err_addr;
955 }
956
957 ret = devm_request_irq(dev, lradc->irq[i],
958 mxs_lradc_handle_irq, 0,
5e1f9aca 959 of_cfg->irq_name[i], iio);
bc2c90c9
MV		 960 if (ret)
961 goto err_addr;
962 }
963
964 platform_set_drvdata(pdev, iio);
965
966 init_completion(&lradc->completion);
967 mutex_init(&lradc->lock);
968
969 iio->name = pdev->name;
970 iio->dev.parent = &pdev->dev;
971 iio->info = &mxs_lradc_iio_info;
972 iio->modes = INDIO_DIRECT_MODE;
973 iio->channels = mxs_lradc_chan_spec;
974 iio->num_channels = ARRAY_SIZE(mxs_lradc_chan_spec);
975
976 ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,
977 &mxs_lradc_trigger_handler,
978 &mxs_lradc_buffer_ops);
979 if (ret)
980 goto err_addr;
981
982 ret = mxs_lradc_trigger_init(iio);
983 if (ret)
984 goto err_trig;
985
06ddd353
MV		 986 /* Register the touchscreen input device. */
987 ret = mxs_lradc_ts_register(lradc);
988 if (ret)
989 goto err_dev;
990
bc2c90c9
MV		 991 /* Register IIO device. */
992 ret = iio_device_register(iio);
993 if (ret) {
994 dev_err(dev, "Failed to register IIO device\n");
06ddd353 995 goto err_ts;
bc2c90c9
MV		 996 }
997
998 /* Configure the hardware. */
999 mxs_lradc_hw_init(lradc);
1000
1001 return 0;
1002
06ddd353
MV		 1003err_ts:
1004 mxs_lradc_ts_unregister(lradc);
bc2c90c9
MV		 1005err_dev:
1006 mxs_lradc_trigger_remove(iio);
1007err_trig:
1008 iio_triggered_buffer_cleanup(iio);
1009err_addr:
1010 iio_device_free(iio);
1011 return ret;
1012}
1013
447d4f29 1014static int mxs_lradc_remove(struct platform_device *pdev)
bc2c90c9
MV		 1015{
1016 struct iio_dev *iio = platform_get_drvdata(pdev);
1017 struct mxs_lradc *lradc = iio_priv(iio);
1018
06ddd353
MV		 1019 mxs_lradc_ts_unregister(lradc);
1020
bc2c90c9
MV		 1021 mxs_lradc_hw_stop(lradc);
1022
1023 iio_device_unregister(iio);
1024 iio_triggered_buffer_cleanup(iio);
1025 mxs_lradc_trigger_remove(iio);
1026 iio_device_free(iio);
1027
1028 return 0;
1029}
1030
bc2c90c9
MV		 1031static struct platform_driver mxs_lradc_driver = {
1032 .driver = {
1033 .name = DRIVER_NAME,
1034 .owner = THIS_MODULE,
1035 .of_match_table = mxs_lradc_dt_ids,
1036 },
1037 .probe = mxs_lradc_probe,
e543acf0 1038 .remove = mxs_lradc_remove,
bc2c90c9
MV		 1039};
1040
1041module_platform_driver(mxs_lradc_driver);
1042
1043MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1044MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver");
1045MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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