iio: mxs-lradc: separate touchscreen and buffer virtual channels
[deliverable/linux.git] / drivers / staging / iio / adc / mxs-lradc.c
CommitLineData
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1/*
2 * Freescale i.MX28 LRADC driver
3 *
4 * Copyright (c) 2012 DENX Software Engineering, GmbH.
5 * Marek Vasut <marex@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
97f4be60 18#include <linux/err.h>
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19#include <linux/interrupt.h>
20#include <linux/device.h>
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/sysfs.h>
26#include <linux/list.h>
27#include <linux/io.h>
28#include <linux/module.h>
29#include <linux/platform_device.h>
30#include <linux/spinlock.h>
31#include <linux/wait.h>
32#include <linux/sched.h>
33#include <linux/stmp_device.h>
34#include <linux/bitops.h>
35#include <linux/completion.h>
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36#include <linux/delay.h>
37#include <linux/input.h>
18da755d 38#include <linux/clk.h>
bc2c90c9 39
bc2c90c9 40#include <linux/iio/iio.h>
d5acf594 41#include <linux/iio/sysfs.h>
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42#include <linux/iio/buffer.h>
43#include <linux/iio/trigger.h>
44#include <linux/iio/trigger_consumer.h>
45#include <linux/iio/triggered_buffer.h>
46
47#define DRIVER_NAME "mxs-lradc"
48
49#define LRADC_MAX_DELAY_CHANS 4
50#define LRADC_MAX_MAPPED_CHANS 8
51#define LRADC_MAX_TOTAL_CHANS 16
52
53#define LRADC_DELAY_TIMER_HZ 2000
54
55/*
56 * Make this runtime configurable if necessary. Currently, if the buffered mode
57 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
58 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
59 * seconds. The result is that the samples arrive every 500mS.
60 */
61#define LRADC_DELAY_TIMER_PER 200
62#define LRADC_DELAY_TIMER_LOOP 5
63
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64/*
65 * Once the pen touches the touchscreen, the touchscreen switches from
66 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
67 * is realized by worker thread, which is called every 20 or so milliseconds.
68 * This gives the touchscreen enough fluence and does not strain the system
69 * too much.
70 */
71#define LRADC_TS_SAMPLE_DELAY_MS 5
72
73/*
74 * The LRADC reads the following amount of samples from each touchscreen
75 * channel and the driver then computes avarage of these.
76 */
77#define LRADC_TS_SAMPLE_AMOUNT 4
78
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79enum mxs_lradc_id {
80 IMX23_LRADC,
81 IMX28_LRADC,
82};
83
84static const char * const mx23_lradc_irq_names[] = {
85 "mxs-lradc-touchscreen",
86 "mxs-lradc-channel0",
87 "mxs-lradc-channel1",
88 "mxs-lradc-channel2",
89 "mxs-lradc-channel3",
90 "mxs-lradc-channel4",
91 "mxs-lradc-channel5",
92 "mxs-lradc-channel6",
93 "mxs-lradc-channel7",
94};
95
96static const char * const mx28_lradc_irq_names[] = {
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97 "mxs-lradc-touchscreen",
98 "mxs-lradc-thresh0",
99 "mxs-lradc-thresh1",
100 "mxs-lradc-channel0",
101 "mxs-lradc-channel1",
102 "mxs-lradc-channel2",
103 "mxs-lradc-channel3",
104 "mxs-lradc-channel4",
105 "mxs-lradc-channel5",
106 "mxs-lradc-channel6",
107 "mxs-lradc-channel7",
108 "mxs-lradc-button0",
109 "mxs-lradc-button1",
110};
111
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112struct mxs_lradc_of_config {
113 const int irq_count;
114 const char * const *irq_name;
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115 const uint32_t *vref_mv;
116};
117
118#define VREF_MV_BASE 1850
119
120static const uint32_t mx23_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
121 VREF_MV_BASE, /* CH0 */
122 VREF_MV_BASE, /* CH1 */
123 VREF_MV_BASE, /* CH2 */
124 VREF_MV_BASE, /* CH3 */
125 VREF_MV_BASE, /* CH4 */
126 VREF_MV_BASE, /* CH5 */
127 VREF_MV_BASE * 2, /* CH6 VDDIO */
128 VREF_MV_BASE * 4, /* CH7 VBATT */
129 VREF_MV_BASE, /* CH8 Temp sense 0 */
130 VREF_MV_BASE, /* CH9 Temp sense 1 */
131 VREF_MV_BASE, /* CH10 */
132 VREF_MV_BASE, /* CH11 */
133 VREF_MV_BASE, /* CH12 USB_DP */
134 VREF_MV_BASE, /* CH13 USB_DN */
135 VREF_MV_BASE, /* CH14 VBG */
136 VREF_MV_BASE * 4, /* CH15 VDD5V */
137};
138
139static const uint32_t mx28_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
140 VREF_MV_BASE, /* CH0 */
141 VREF_MV_BASE, /* CH1 */
142 VREF_MV_BASE, /* CH2 */
143 VREF_MV_BASE, /* CH3 */
144 VREF_MV_BASE, /* CH4 */
145 VREF_MV_BASE, /* CH5 */
146 VREF_MV_BASE, /* CH6 */
147 VREF_MV_BASE * 4, /* CH7 VBATT */
148 VREF_MV_BASE, /* CH8 Temp sense 0 */
149 VREF_MV_BASE, /* CH9 Temp sense 1 */
150 VREF_MV_BASE * 2, /* CH10 VDDIO */
151 VREF_MV_BASE, /* CH11 VTH */
152 VREF_MV_BASE * 2, /* CH12 VDDA */
153 VREF_MV_BASE, /* CH13 VDDD */
154 VREF_MV_BASE, /* CH14 VBG */
155 VREF_MV_BASE * 4, /* CH15 VDD5V */
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156};
157
ad76fda7 158static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
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159 [IMX23_LRADC] = {
160 .irq_count = ARRAY_SIZE(mx23_lradc_irq_names),
161 .irq_name = mx23_lradc_irq_names,
f6db68a4 162 .vref_mv = mx23_vref_mv,
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163 },
164 [IMX28_LRADC] = {
165 .irq_count = ARRAY_SIZE(mx28_lradc_irq_names),
166 .irq_name = mx28_lradc_irq_names,
f6db68a4 167 .vref_mv = mx28_vref_mv,
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168 },
169};
170
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171enum mxs_lradc_ts {
172 MXS_LRADC_TOUCHSCREEN_NONE = 0,
173 MXS_LRADC_TOUCHSCREEN_4WIRE,
174 MXS_LRADC_TOUCHSCREEN_5WIRE,
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175};
176
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177/*
178 * Touchscreen handling
179 */
180enum lradc_ts_plate {
181 LRADC_TOUCH = 0,
182 LRADC_SAMPLE_X,
183 LRADC_SAMPLE_Y,
184 LRADC_SAMPLE_PRESSURE,
185 LRADC_SAMPLE_VALID,
186};
187
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188enum mxs_lradc_divbytwo {
189 MXS_LRADC_DIV_DISABLED = 0,
190 MXS_LRADC_DIV_ENABLED,
191};
192
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193struct mxs_lradc_scale {
194 unsigned int integer;
195 unsigned int nano;
196};
197
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198struct mxs_lradc {
199 struct device *dev;
200 void __iomem *base;
201 int irq[13];
202
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203 struct clk *clk;
204
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205 uint32_t *buffer;
206 struct iio_trigger *trig;
207
208 struct mutex lock;
209
bc2c90c9 210 struct completion completion;
06ddd353 211
f6db68a4 212 const uint32_t *vref_mv;
d5acf594 213 struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
38125b2c 214 unsigned long is_divided;
f6db68a4 215
06ddd353 216 /*
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217 * When the touchscreen is enabled, we give it two private virtual
218 * channels: #6 and #7. This means that only 6 virtual channels (instead
219 * of 8) will be available for buffered capture.
220 */
221#define TOUCHSCREEN_VCHANNEL1 7
222#define TOUCHSCREEN_VCHANNEL2 6
223
224 /*
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225 * Furthermore, certain LRADC channels are shared between touchscreen
226 * and/or touch-buttons and generic LRADC block. Therefore when using
227 * either of these, these channels are not available for the regular
228 * sampling. The shared channels are as follows:
229 *
230 * CH0 -- Touch button #0
231 * CH1 -- Touch button #1
232 * CH2 -- Touch screen XPUL
233 * CH3 -- Touch screen YPLL
234 * CH4 -- Touch screen XNUL
235 * CH5 -- Touch screen YNLR
236 * CH6 -- Touch screen WIPER (5-wire only)
237 *
238 * The bitfields below represents which parts of the LRADC block are
239 * switched into special mode of operation. These channels can not
240 * be sampled as regular LRADC channels. The driver will refuse any
241 * attempt to sample these channels.
242 */
243#define CHAN_MASK_TOUCHBUTTON (0x3 << 0)
244#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
245#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
246 enum mxs_lradc_ts use_touchscreen;
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247 bool use_touchbutton;
248
249 struct input_dev *ts_input;
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250
251 enum mxs_lradc_id soc;
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252 enum lradc_ts_plate cur_plate; /* statemachine */
253 bool ts_valid;
254 unsigned ts_x_pos;
255 unsigned ts_y_pos;
256 unsigned ts_pressure;
257
258 /* handle touchscreen's physical behaviour */
259 /* samples per coordinate */
260 unsigned over_sample_cnt;
261 /* time clocks between samples */
262 unsigned over_sample_delay;
263 /* time in clocks to wait after the plates where switched */
264 unsigned settling_delay;
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265};
266
267#define LRADC_CTRL0 0x00
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268# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE (1 << 23)
269# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE (1 << 22)
270# define LRADC_CTRL0_MX28_YNNSW /* YM */ (1 << 21)
271# define LRADC_CTRL0_MX28_YPNSW /* YP */ (1 << 20)
272# define LRADC_CTRL0_MX28_YPPSW /* YP */ (1 << 19)
273# define LRADC_CTRL0_MX28_XNNSW /* XM */ (1 << 18)
274# define LRADC_CTRL0_MX28_XNPSW /* XM */ (1 << 17)
275# define LRADC_CTRL0_MX28_XPPSW /* XP */ (1 << 16)
276
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277# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE (1 << 20)
278# define LRADC_CTRL0_MX23_YM (1 << 19)
279# define LRADC_CTRL0_MX23_XM (1 << 18)
280# define LRADC_CTRL0_MX23_YP (1 << 17)
281# define LRADC_CTRL0_MX23_XP (1 << 16)
282
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283# define LRADC_CTRL0_MX28_PLATE_MASK \
284 (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
285 LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
286 LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
287 LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
bc2c90c9 288
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289# define LRADC_CTRL0_MX23_PLATE_MASK \
290 (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
291 LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
292 LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
293
bc2c90c9 294#define LRADC_CTRL1 0x10
06ddd353 295#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1 << 24)
bc2c90c9 296#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
7e4d4a6f 297#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
8c06f714 298#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
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299#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
300#define LRADC_CTRL1_TOUCH_DETECT_IRQ (1 << 8)
301#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
7e4d4a6f 302#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
8c06f714 303#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
06ddd353 304#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
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305
306#define LRADC_CTRL2 0x20
aba70f2a 307#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
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308#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
309
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310#define LRADC_STATUS 0x40
311#define LRADC_STATUS_TOUCH_DETECT_RAW (1 << 0)
312
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313#define LRADC_CH(n) (0x50 + (0x10 * (n)))
314#define LRADC_CH_ACCUMULATE (1 << 29)
315#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
316#define LRADC_CH_NUM_SAMPLES_OFFSET 24
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317#define LRADC_CH_NUM_SAMPLES(x) \
318 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
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319#define LRADC_CH_VALUE_MASK 0x3ffff
320#define LRADC_CH_VALUE_OFFSET 0
321
322#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
323#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
324#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
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325#define LRADC_DELAY_TRIGGER(x) \
326 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
327 LRADC_DELAY_TRIGGER_LRADCS_MASK)
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328#define LRADC_DELAY_KICK (1 << 20)
329#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
330#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
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331#define LRADC_DELAY_TRIGGER_DELAYS(x) \
332 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
333 LRADC_DELAY_TRIGGER_DELAYS_MASK)
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334#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
335#define LRADC_DELAY_LOOP_COUNT_OFFSET 11
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336#define LRADC_DELAY_LOOP(x) \
337 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
338 LRADC_DELAY_LOOP_COUNT_MASK)
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339#define LRADC_DELAY_DELAY_MASK 0x7ff
340#define LRADC_DELAY_DELAY_OFFSET 0
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341#define LRADC_DELAY_DELAY(x) \
342 (((x) << LRADC_DELAY_DELAY_OFFSET) & \
343 LRADC_DELAY_DELAY_MASK)
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344
345#define LRADC_CTRL4 0x140
346#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
347#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
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348#define LRADC_CTRL4_LRADCSELECT(n, x) \
349 (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
350 LRADC_CTRL4_LRADCSELECT_MASK(n))
bc2c90c9 351
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352#define LRADC_RESOLUTION 12
353#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
354
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355static void mxs_lradc_reg_set(struct mxs_lradc *lradc, u32 val, u32 reg)
356{
357 writel(val, lradc->base + reg + STMP_OFFSET_REG_SET);
358}
359
360static void mxs_lradc_reg_clear(struct mxs_lradc *lradc, u32 val, u32 reg)
361{
362 writel(val, lradc->base + reg + STMP_OFFSET_REG_CLR);
363}
364
365static void mxs_lradc_reg_wrt(struct mxs_lradc *lradc, u32 val, u32 reg)
366{
367 writel(val, lradc->base + reg);
368}
369
370static u32 mxs_lradc_plate_mask(struct mxs_lradc *lradc)
371{
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372 if (lradc->soc == IMX23_LRADC)
373 return LRADC_CTRL0_MX23_PLATE_MASK;
0f8ad68b 374 return LRADC_CTRL0_MX28_PLATE_MASK;
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375}
376
377static u32 mxs_lradc_irq_en_mask(struct mxs_lradc *lradc)
378{
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379 if (lradc->soc == IMX23_LRADC)
380 return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK;
0f8ad68b 381 return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK;
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382}
383
384static u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)
385{
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386 if (lradc->soc == IMX23_LRADC)
387 return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;
0f8ad68b 388 return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;
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389}
390
391static u32 mxs_lradc_touch_detect_bit(struct mxs_lradc *lradc)
392{
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393 if (lradc->soc == IMX23_LRADC)
394 return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE;
0f8ad68b 395 return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE;
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396}
397
398static u32 mxs_lradc_drive_x_plate(struct mxs_lradc *lradc)
399{
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400 if (lradc->soc == IMX23_LRADC)
401 return LRADC_CTRL0_MX23_XP | LRADC_CTRL0_MX23_XM;
0f8ad68b 402 return LRADC_CTRL0_MX28_XPPSW | LRADC_CTRL0_MX28_XNNSW;
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403}
404
405static u32 mxs_lradc_drive_y_plate(struct mxs_lradc *lradc)
406{
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407 if (lradc->soc == IMX23_LRADC)
408 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_YM;
0f8ad68b 409 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_YNNSW;
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410}
411
412static u32 mxs_lradc_drive_pressure(struct mxs_lradc *lradc)
413{
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414 if (lradc->soc == IMX23_LRADC)
415 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XM;
0f8ad68b 416 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW;
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417}
418
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419static bool mxs_lradc_check_touch_event(struct mxs_lradc *lradc)
420{
421 return !!(readl(lradc->base + LRADC_STATUS) &
422 LRADC_STATUS_TOUCH_DETECT_RAW);
423}
424
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425static void mxs_lradc_map_channel(struct mxs_lradc *lradc, unsigned vch,
426 unsigned ch)
427{
428 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(vch),
429 LRADC_CTRL4);
430 mxs_lradc_reg_set(lradc, LRADC_CTRL4_LRADCSELECT(vch, ch), LRADC_CTRL4);
431}
432
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433static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch)
434{
435 /*
436 * prepare for oversampling conversion
437 *
438 * from the datasheet:
439 * "The ACCUMULATE bit in the appropriate channel register
440 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
441 * otherwise, the IRQs will not fire."
442 */
443 mxs_lradc_reg_wrt(lradc, LRADC_CH_ACCUMULATE |
444 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1),
445 LRADC_CH(ch));
446
447 /* from the datasheet:
448 * "Software must clear this register in preparation for a
449 * multi-cycle accumulation.
450 */
451 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch));
452
453 /* prepare the delay/loop unit according to the oversampling count */
454 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch) |
455 LRADC_DELAY_TRIGGER_DELAYS(0) |
456 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
457 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
458 LRADC_DELAY(3));
459
f81197b8 460 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch), LRADC_CTRL1);
dee05308 461
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462 /*
463 * after changing the touchscreen plates setting
464 * the signals need some initial time to settle. Start the
465 * SoC's delay unit and start the conversion later
466 * and automatically.
467 */
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468 mxs_lradc_reg_wrt(lradc,
469 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
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470 LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
471 LRADC_DELAY_KICK |
472 LRADC_DELAY_DELAY(lradc->settling_delay),
473 LRADC_DELAY(2));
474}
475
476/*
477 * Pressure detection is special:
478 * We want to do both required measurements for the pressure detection in
479 * one turn. Use the hardware features to chain both conversions and let the
480 * hardware report one interrupt if both conversions are done
481 */
482static void mxs_lradc_setup_ts_pressure(struct mxs_lradc *lradc, unsigned ch1,
483 unsigned ch2)
484{
485 u32 reg;
486
487 /*
488 * prepare for oversampling conversion
489 *
490 * from the datasheet:
491 * "The ACCUMULATE bit in the appropriate channel register
492 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
493 * otherwise, the IRQs will not fire."
494 */
495 reg = LRADC_CH_ACCUMULATE |
496 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1);
497 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch1));
498 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch2));
499
500 /* from the datasheet:
501 * "Software must clear this register in preparation for a
502 * multi-cycle accumulation.
503 */
504 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch1));
505 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch2));
506
507 /* prepare the delay/loop unit according to the oversampling count */
508 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch1) |
509 LRADC_DELAY_TRIGGER(1 << ch2) | /* start both channels */
510 LRADC_DELAY_TRIGGER_DELAYS(0) |
511 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
512 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
513 LRADC_DELAY(3));
514
f81197b8 515 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch2), LRADC_CTRL1);
dee05308 516
dee05308
JB
517 /*
518 * after changing the touchscreen plates setting
519 * the signals need some initial time to settle. Start the
520 * SoC's delay unit and start the conversion later
521 * and automatically.
522 */
0c05a5d6
BV
523 mxs_lradc_reg_wrt(lradc,
524 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
dee05308
JB
525 LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
526 LRADC_DELAY_KICK |
527 LRADC_DELAY_DELAY(lradc->settling_delay), LRADC_DELAY(2));
528}
529
530static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc *lradc,
531 unsigned channel)
532{
533 u32 reg;
534 unsigned num_samples, val;
535
536 reg = readl(lradc->base + LRADC_CH(channel));
537 if (reg & LRADC_CH_ACCUMULATE)
538 num_samples = lradc->over_sample_cnt;
539 else
540 num_samples = 1;
541
542 val = (reg & LRADC_CH_VALUE_MASK) >> LRADC_CH_VALUE_OFFSET;
543 return val / num_samples;
544}
545
546static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc *lradc,
547 unsigned ch1, unsigned ch2)
548{
549 u32 reg, mask;
550 unsigned pressure, m1, m2;
551
552 mask = LRADC_CTRL1_LRADC_IRQ(ch1) | LRADC_CTRL1_LRADC_IRQ(ch2);
553 reg = readl(lradc->base + LRADC_CTRL1) & mask;
554
555 while (reg != mask) {
556 reg = readl(lradc->base + LRADC_CTRL1) & mask;
557 dev_dbg(lradc->dev, "One channel is still busy: %X\n", reg);
558 }
559
560 m1 = mxs_lradc_read_raw_channel(lradc, ch1);
561 m2 = mxs_lradc_read_raw_channel(lradc, ch2);
562
563 if (m2 == 0) {
564 dev_warn(lradc->dev, "Cannot calculate pressure\n");
565 return 1 << (LRADC_RESOLUTION - 1);
566 }
567
568 /* simply scale the value from 0 ... max ADC resolution */
569 pressure = m1;
570 pressure *= (1 << LRADC_RESOLUTION);
571 pressure /= m2;
572
573 dev_dbg(lradc->dev, "Pressure = %u\n", pressure);
574 return pressure;
575}
576
577#define TS_CH_XP 2
578#define TS_CH_YP 3
579#define TS_CH_XM 4
580#define TS_CH_YM 5
581
dee05308
JB
582/*
583 * YP(open)--+-------------+
584 * | |--+
585 * | | |
586 * YM(-)--+-------------+ |
587 * +--------------+
588 * | |
589 * XP(weak+) XM(open)
590 *
591 * "weak+" means 200k Ohm VDDIO
592 * (-) means GND
593 */
594static void mxs_lradc_setup_touch_detection(struct mxs_lradc *lradc)
595{
596 /*
597 * In order to detect a touch event the 'touch detect enable' bit
598 * enables:
599 * - a weak pullup to the X+ connector
600 * - a strong ground at the Y- connector
601 */
602 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
603 mxs_lradc_reg_set(lradc, mxs_lradc_touch_detect_bit(lradc),
604 LRADC_CTRL0);
605}
606
607/*
608 * YP(meas)--+-------------+
609 * | |--+
610 * | | |
611 * YM(open)--+-------------+ |
612 * +--------------+
613 * | |
614 * XP(+) XM(-)
615 *
616 * (+) means here 1.85 V
617 * (-) means here GND
618 */
619static void mxs_lradc_prepare_x_pos(struct mxs_lradc *lradc)
620{
621 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
622 mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0);
623
624 lradc->cur_plate = LRADC_SAMPLE_X;
f81197b8
KM
625 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YP);
626 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
dee05308
JB
627}
628
629/*
630 * YP(+)--+-------------+
631 * | |--+
632 * | | |
633 * YM(-)--+-------------+ |
634 * +--------------+
635 * | |
636 * XP(open) XM(meas)
637 *
638 * (+) means here 1.85 V
639 * (-) means here GND
640 */
641static void mxs_lradc_prepare_y_pos(struct mxs_lradc *lradc)
642{
643 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
644 mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0);
645
646 lradc->cur_plate = LRADC_SAMPLE_Y;
f81197b8
KM
647 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_XM);
648 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
dee05308
JB
649}
650
651/*
652 * YP(+)--+-------------+
653 * | |--+
654 * | | |
655 * YM(meas)--+-------------+ |
656 * +--------------+
657 * | |
658 * XP(meas) XM(-)
659 *
660 * (+) means here 1.85 V
661 * (-) means here GND
662 */
663static void mxs_lradc_prepare_pressure(struct mxs_lradc *lradc)
664{
665 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
666 mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0);
667
668 lradc->cur_plate = LRADC_SAMPLE_PRESSURE;
f81197b8
KM
669 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YM);
670 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL2, TS_CH_XP);
671 mxs_lradc_setup_ts_pressure(lradc, TOUCHSCREEN_VCHANNEL2,
672 TOUCHSCREEN_VCHANNEL1);
dee05308
JB
673}
674
675static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc)
676{
677 mxs_lradc_setup_touch_detection(lradc);
678
679 lradc->cur_plate = LRADC_TOUCH;
680 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |
681 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
682 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
683}
684
f81197b8
KM
685static void mxs_lradc_start_touch_event(struct mxs_lradc *lradc)
686{
687 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
688 LRADC_CTRL1);
689 mxs_lradc_reg_set(lradc,
690 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1);
691 /*
692 * start with the Y-pos, because it uses nearly the same plate
693 * settings like the touch detection
694 */
695 mxs_lradc_prepare_y_pos(lradc);
696}
697
dee05308
JB
698static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc)
699{
700 input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos);
701 input_report_abs(lradc->ts_input, ABS_Y, lradc->ts_y_pos);
702 input_report_abs(lradc->ts_input, ABS_PRESSURE, lradc->ts_pressure);
703 input_report_key(lradc->ts_input, BTN_TOUCH, 1);
704 input_sync(lradc->ts_input);
705}
706
707static void mxs_lradc_complete_touch_event(struct mxs_lradc *lradc)
708{
709 mxs_lradc_setup_touch_detection(lradc);
710 lradc->cur_plate = LRADC_SAMPLE_VALID;
711 /*
712 * start a dummy conversion to burn time to settle the signals
713 * note: we are not interested in the conversion's value
714 */
f81197b8
KM
715 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1));
716 mxs_lradc_reg_clear(lradc,
717 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
718 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);
719 mxs_lradc_reg_wrt(lradc,
720 LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) |
dee05308
JB
721 LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10), /* waste 5 ms */
722 LRADC_DELAY(2));
723}
724
725/*
726 * in order to avoid false measurements, report only samples where
727 * the surface is still touched after the position measurement
728 */
729static void mxs_lradc_finish_touch_event(struct mxs_lradc *lradc, bool valid)
730{
731 /* if it is still touched, report the sample */
732 if (valid && mxs_lradc_check_touch_event(lradc)) {
733 lradc->ts_valid = true;
734 mxs_lradc_report_ts_event(lradc);
735 }
736
737 /* if it is even still touched, continue with the next measurement */
738 if (mxs_lradc_check_touch_event(lradc)) {
739 mxs_lradc_prepare_y_pos(lradc);
740 return;
741 }
742
743 if (lradc->ts_valid) {
744 /* signal the release */
745 lradc->ts_valid = false;
746 input_report_key(lradc->ts_input, BTN_TOUCH, 0);
747 input_sync(lradc->ts_input);
748 }
749
750 /* if it is released, wait for the next touch via IRQ */
760dbe1d 751 lradc->cur_plate = LRADC_TOUCH;
f81197b8
KM
752 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
753 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
754 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |
755 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
756 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1);
dee05308
JB
757 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
758}
759
760/* touchscreen's state machine */
761static void mxs_lradc_handle_touch(struct mxs_lradc *lradc)
762{
dee05308
JB
763 switch (lradc->cur_plate) {
764 case LRADC_TOUCH:
f81197b8
KM
765 if (mxs_lradc_check_touch_event(lradc))
766 mxs_lradc_start_touch_event(lradc);
dee05308
JB
767 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ,
768 LRADC_CTRL1);
769 return;
770
771 case LRADC_SAMPLE_Y:
f81197b8
KM
772 lradc->ts_y_pos = mxs_lradc_read_raw_channel(lradc,
773 TOUCHSCREEN_VCHANNEL1);
dee05308
JB
774 mxs_lradc_prepare_x_pos(lradc);
775 return;
776
777 case LRADC_SAMPLE_X:
f81197b8
KM
778 lradc->ts_x_pos = mxs_lradc_read_raw_channel(lradc,
779 TOUCHSCREEN_VCHANNEL1);
dee05308
JB
780 mxs_lradc_prepare_pressure(lradc);
781 return;
782
783 case LRADC_SAMPLE_PRESSURE:
f81197b8
KM
784 lradc->ts_pressure = mxs_lradc_read_ts_pressure(lradc,
785 TOUCHSCREEN_VCHANNEL2,
786 TOUCHSCREEN_VCHANNEL1);
dee05308
JB
787 mxs_lradc_complete_touch_event(lradc);
788 return;
789
790 case LRADC_SAMPLE_VALID:
dee05308
JB
791 mxs_lradc_finish_touch_event(lradc, 1);
792 break;
793 }
794}
795
bc2c90c9
MV
796/*
797 * Raw I/O operations
798 */
c8231a9a 799static int mxs_lradc_read_single(struct iio_dev *iio_dev, int chan, int *val)
bc2c90c9
MV
800{
801 struct mxs_lradc *lradc = iio_priv(iio_dev);
802 int ret;
803
bc2c90c9
MV
804 /*
805 * See if there is no buffered operation in progess. If there is, simply
806 * bail out. This can be improved to support both buffered and raw IO at
807 * the same time, yet the code becomes horribly complicated. Therefore I
808 * applied KISS principle here.
809 */
810 ret = mutex_trylock(&lradc->lock);
811 if (!ret)
812 return -EBUSY;
813
16735d02 814 reinit_completion(&lradc->completion);
bc2c90c9
MV
815
816 /*
817 * No buffered operation in progress, map the channel and trigger it.
818 * Virtual channel 0 is always used here as the others are always not
819 * used if doing raw sampling.
820 */
8c06f714
JB
821 if (lradc->soc == IMX28_LRADC)
822 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK,
f0b83cc8
JB
823 LRADC_CTRL1);
824 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0);
bc2c90c9 825
19bc4981
RH
826 /* Enable / disable the divider per requirement */
827 if (test_bit(chan, &lradc->is_divided))
828 mxs_lradc_reg_set(lradc, 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
829 LRADC_CTRL2);
830 else
831 mxs_lradc_reg_clear(lradc,
832 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET, LRADC_CTRL2);
833
06ddd353 834 /* Clean the slot's previous content, then set new one. */
168934c9
AO
835 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(0),
836 LRADC_CTRL4);
c8231a9a 837 mxs_lradc_reg_set(lradc, chan, LRADC_CTRL4);
06ddd353 838
f0b83cc8 839 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(0));
bc2c90c9
MV
840
841 /* Enable the IRQ and start sampling the channel. */
f0b83cc8
JB
842 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
843 mxs_lradc_reg_set(lradc, 1 << 0, LRADC_CTRL0);
bc2c90c9
MV
844
845 /* Wait for completion on the channel, 1 second max. */
846 ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
847 if (!ret)
848 ret = -ETIMEDOUT;
849 if (ret < 0)
850 goto err;
851
852 /* Read the data. */
853 *val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
854 ret = IIO_VAL_INT;
855
856err:
f0b83cc8 857 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
bc2c90c9
MV
858
859 mutex_unlock(&lradc->lock);
860
861 return ret;
862}
863
c8231a9a
AB
864static int mxs_lradc_read_temp(struct iio_dev *iio_dev, int *val)
865{
866 int ret, min, max;
867
868 ret = mxs_lradc_read_single(iio_dev, 8, &min);
869 if (ret != IIO_VAL_INT)
870 return ret;
871
872 ret = mxs_lradc_read_single(iio_dev, 9, &max);
873 if (ret != IIO_VAL_INT)
874 return ret;
875
876 *val = max - min;
877
878 return IIO_VAL_INT;
879}
880
881static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
882 const struct iio_chan_spec *chan,
883 int *val, int *val2, long m)
884{
f6db68a4
HP
885 struct mxs_lradc *lradc = iio_priv(iio_dev);
886
c8231a9a
AB
887 switch (m) {
888 case IIO_CHAN_INFO_RAW:
889 if (chan->type == IIO_TEMP)
890 return mxs_lradc_read_temp(iio_dev, val);
891
892 return mxs_lradc_read_single(iio_dev, chan->channel, val);
893
894 case IIO_CHAN_INFO_SCALE:
895 if (chan->type == IIO_TEMP) {
896 /* From the datasheet, we have to multiply by 1.012 and
897 * divide by 4
898 */
899 *val = 0;
900 *val2 = 253000;
901 return IIO_VAL_INT_PLUS_MICRO;
902 }
903
f6db68a4 904 *val = lradc->vref_mv[chan->channel];
aba70f2a 905 *val2 = chan->scan_type.realbits -
38125b2c 906 test_bit(chan->channel, &lradc->is_divided);
f6db68a4 907 return IIO_VAL_FRACTIONAL_LOG2;
c8231a9a
AB
908
909 case IIO_CHAN_INFO_OFFSET:
910 if (chan->type == IIO_TEMP) {
911 /* The calculated value from the ADC is in Kelvin, we
912 * want Celsius for hwmon so the offset is
913 * -272.15 * scale
914 */
915 *val = -1075;
916 *val2 = 691699;
917
918 return IIO_VAL_INT_PLUS_MICRO;
919 }
920
921 return -EINVAL;
922
923 default:
924 break;
925 }
926
927 return -EINVAL;
928}
929
aba70f2a
HP
930static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
931 const struct iio_chan_spec *chan,
932 int val, int val2, long m)
933{
934 struct mxs_lradc *lradc = iio_priv(iio_dev);
935 struct mxs_lradc_scale *scale_avail =
936 lradc->scale_avail[chan->channel];
937 int ret;
938
939 ret = mutex_trylock(&lradc->lock);
940 if (!ret)
941 return -EBUSY;
942
943 switch (m) {
944 case IIO_CHAN_INFO_SCALE:
945 ret = -EINVAL;
946 if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&
947 val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
948 /* divider by two disabled */
38125b2c 949 clear_bit(chan->channel, &lradc->is_divided);
aba70f2a
HP
950 ret = 0;
951 } else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&
952 val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
953 /* divider by two enabled */
38125b2c 954 set_bit(chan->channel, &lradc->is_divided);
aba70f2a
HP
955 ret = 0;
956 }
957
958 break;
959 default:
960 ret = -EINVAL;
961 break;
962 }
963
964 mutex_unlock(&lradc->lock);
965
966 return ret;
967}
968
969static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,
970 const struct iio_chan_spec *chan,
971 long m)
972{
973 return IIO_VAL_INT_PLUS_NANO;
974}
975
d5acf594
HP
976static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
977 struct device_attribute *attr,
978 char *buf,
979 int ch)
980{
981 struct iio_dev *iio = dev_to_iio_dev(dev);
982 struct mxs_lradc *lradc = iio_priv(iio);
983 int i, len = 0;
984
985 for (i = 0; i < ARRAY_SIZE(lradc->scale_avail[ch]); i++)
986 len += sprintf(buf + len, "%d.%09u ",
987 lradc->scale_avail[ch][i].integer,
988 lradc->scale_avail[ch][i].nano);
989
990 len += sprintf(buf + len, "\n");
991
992 return len;
993}
994
995static ssize_t mxs_lradc_show_scale_available(struct device *dev,
996 struct device_attribute *attr,
997 char *buf)
998{
999 struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr);
1000
1001 return mxs_lradc_show_scale_available_ch(dev, attr, buf,
1002 iio_attr->address);
1003}
1004
1005#define SHOW_SCALE_AVAILABLE_ATTR(ch) \
1006static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \
1007 mxs_lradc_show_scale_available, NULL, ch)
1008
1009SHOW_SCALE_AVAILABLE_ATTR(0);
1010SHOW_SCALE_AVAILABLE_ATTR(1);
1011SHOW_SCALE_AVAILABLE_ATTR(2);
1012SHOW_SCALE_AVAILABLE_ATTR(3);
1013SHOW_SCALE_AVAILABLE_ATTR(4);
1014SHOW_SCALE_AVAILABLE_ATTR(5);
1015SHOW_SCALE_AVAILABLE_ATTR(6);
1016SHOW_SCALE_AVAILABLE_ATTR(7);
d5acf594
HP
1017SHOW_SCALE_AVAILABLE_ATTR(10);
1018SHOW_SCALE_AVAILABLE_ATTR(11);
1019SHOW_SCALE_AVAILABLE_ATTR(12);
1020SHOW_SCALE_AVAILABLE_ATTR(13);
1021SHOW_SCALE_AVAILABLE_ATTR(14);
1022SHOW_SCALE_AVAILABLE_ATTR(15);
1023
1024static struct attribute *mxs_lradc_attributes[] = {
1025 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
1026 &iio_dev_attr_in_voltage1_scale_available.dev_attr.attr,
1027 &iio_dev_attr_in_voltage2_scale_available.dev_attr.attr,
1028 &iio_dev_attr_in_voltage3_scale_available.dev_attr.attr,
1029 &iio_dev_attr_in_voltage4_scale_available.dev_attr.attr,
1030 &iio_dev_attr_in_voltage5_scale_available.dev_attr.attr,
1031 &iio_dev_attr_in_voltage6_scale_available.dev_attr.attr,
1032 &iio_dev_attr_in_voltage7_scale_available.dev_attr.attr,
d5acf594
HP
1033 &iio_dev_attr_in_voltage10_scale_available.dev_attr.attr,
1034 &iio_dev_attr_in_voltage11_scale_available.dev_attr.attr,
1035 &iio_dev_attr_in_voltage12_scale_available.dev_attr.attr,
1036 &iio_dev_attr_in_voltage13_scale_available.dev_attr.attr,
1037 &iio_dev_attr_in_voltage14_scale_available.dev_attr.attr,
1038 &iio_dev_attr_in_voltage15_scale_available.dev_attr.attr,
1039 NULL
1040};
1041
1042static const struct attribute_group mxs_lradc_attribute_group = {
1043 .attrs = mxs_lradc_attributes,
1044};
1045
bc2c90c9
MV
1046static const struct iio_info mxs_lradc_iio_info = {
1047 .driver_module = THIS_MODULE,
1048 .read_raw = mxs_lradc_read_raw,
aba70f2a
HP
1049 .write_raw = mxs_lradc_write_raw,
1050 .write_raw_get_fmt = mxs_lradc_write_raw_get_fmt,
d5acf594 1051 .attrs = &mxs_lradc_attribute_group,
bc2c90c9
MV
1052};
1053
06ddd353
MV
1054static int mxs_lradc_ts_open(struct input_dev *dev)
1055{
1056 struct mxs_lradc *lradc = input_get_drvdata(dev);
1057
06ddd353 1058 /* Enable the touch-detect circuitry. */
dee05308 1059 mxs_lradc_enable_touch_detection(lradc);
06ddd353
MV
1060
1061 return 0;
1062}
1063
dee05308 1064static void mxs_lradc_disable_ts(struct mxs_lradc *lradc)
06ddd353 1065{
dee05308
JB
1066 /* stop all interrupts from firing */
1067 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
f81197b8
KM
1068 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
1069 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);
06ddd353 1070
dee05308
JB
1071 /* Power-down touchscreen touch-detect circuitry. */
1072 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
1073}
06ddd353 1074
dee05308
JB
1075static void mxs_lradc_ts_close(struct input_dev *dev)
1076{
1077 struct mxs_lradc *lradc = input_get_drvdata(dev);
06ddd353 1078
dee05308 1079 mxs_lradc_disable_ts(lradc);
06ddd353
MV
1080}
1081
1082static int mxs_lradc_ts_register(struct mxs_lradc *lradc)
1083{
1084 struct input_dev *input;
1085 struct device *dev = lradc->dev;
1086 int ret;
1087
1088 if (!lradc->use_touchscreen)
1089 return 0;
1090
1091 input = input_allocate_device();
f99a92c3 1092 if (!input)
06ddd353 1093 return -ENOMEM;
06ddd353
MV
1094
1095 input->name = DRIVER_NAME;
1096 input->id.bustype = BUS_HOST;
1097 input->dev.parent = dev;
1098 input->open = mxs_lradc_ts_open;
1099 input->close = mxs_lradc_ts_close;
1100
1101 __set_bit(EV_ABS, input->evbit);
1102 __set_bit(EV_KEY, input->evbit);
1103 __set_bit(BTN_TOUCH, input->keybit);
1eb70a97
HP
1104 input_set_abs_params(input, ABS_X, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
1105 input_set_abs_params(input, ABS_Y, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
1106 input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_SINGLE_SAMPLE_MASK,
1107 0, 0);
06ddd353
MV
1108
1109 lradc->ts_input = input;
1110 input_set_drvdata(input, lradc);
1111 ret = input_register_device(input);
1112 if (ret)
1113 input_free_device(lradc->ts_input);
1114
1115 return ret;
1116}
1117
1118static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc)
1119{
1120 if (!lradc->use_touchscreen)
1121 return;
1122
dee05308 1123 mxs_lradc_disable_ts(lradc);
06ddd353
MV
1124 input_unregister_device(lradc->ts_input);
1125}
1126
bc2c90c9
MV
1127/*
1128 * IRQ Handling
1129 */
1130static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
1131{
1132 struct iio_dev *iio = data;
1133 struct mxs_lradc *lradc = iio_priv(iio);
1134 unsigned long reg = readl(lradc->base + LRADC_CTRL1);
f81197b8 1135 uint32_t clr_irq = mxs_lradc_irq_mask(lradc);
06ddd353 1136 const uint32_t ts_irq_mask =
dee05308 1137 LRADC_CTRL1_TOUCH_DETECT_IRQ |
f81197b8
KM
1138 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
1139 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2);
bc2c90c9 1140
f0b83cc8 1141 if (!(reg & mxs_lradc_irq_mask(lradc)))
bc2c90c9
MV
1142 return IRQ_NONE;
1143
f81197b8 1144 if (lradc->use_touchscreen && (reg & ts_irq_mask)) {
dee05308 1145 mxs_lradc_handle_touch(lradc);
bc2c90c9 1146
f81197b8
KM
1147 /* Make sure we don't clear the next conversion's interrupt. */
1148 clr_irq &= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
1149 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2));
1150 }
1151
bc2c90c9 1152 if (iio_buffer_enabled(iio))
398fd22b 1153 iio_trigger_poll(iio->trig);
bc2c90c9
MV
1154 else if (reg & LRADC_CTRL1_LRADC_IRQ(0))
1155 complete(&lradc->completion);
1156
f81197b8 1157 mxs_lradc_reg_clear(lradc, reg & clr_irq, LRADC_CTRL1);
bc2c90c9
MV
1158
1159 return IRQ_HANDLED;
1160}
1161
1162/*
1163 * Trigger handling
1164 */
1165static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
1166{
1167 struct iio_poll_func *pf = p;
1168 struct iio_dev *iio = pf->indio_dev;
1169 struct mxs_lradc *lradc = iio_priv(iio);
bc2c90c9
MV
1170 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
1171 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
7b7a4efe 1172 unsigned int i, j = 0;
bc2c90c9 1173
f4914e5e 1174 for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
bc2c90c9 1175 lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));
f0b83cc8 1176 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(j));
bc2c90c9
MV
1177 lradc->buffer[j] &= LRADC_CH_VALUE_MASK;
1178 lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;
1179 j++;
1180 }
1181
4fa10de6 1182 iio_push_to_buffers_with_timestamp(iio, lradc->buffer, pf->timestamp);
bc2c90c9
MV
1183
1184 iio_trigger_notify_done(iio->trig);
1185
1186 return IRQ_HANDLED;
1187}
1188
1189static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)
1190{
1e9663c6 1191 struct iio_dev *iio = iio_trigger_get_drvdata(trig);
bc2c90c9
MV
1192 struct mxs_lradc *lradc = iio_priv(iio);
1193 const uint32_t st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;
1194
f0b83cc8 1195 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_KICK, LRADC_DELAY(0) + st);
bc2c90c9
MV
1196
1197 return 0;
1198}
1199
1200static const struct iio_trigger_ops mxs_lradc_trigger_ops = {
1201 .owner = THIS_MODULE,
1202 .set_trigger_state = &mxs_lradc_configure_trigger,
1203};
1204
1205static int mxs_lradc_trigger_init(struct iio_dev *iio)
1206{
1207 int ret;
1208 struct iio_trigger *trig;
e1b1fa66 1209 struct mxs_lradc *lradc = iio_priv(iio);
bc2c90c9
MV
1210
1211 trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);
1212 if (trig == NULL)
1213 return -ENOMEM;
1214
e1b1fa66 1215 trig->dev.parent = lradc->dev;
1e9663c6 1216 iio_trigger_set_drvdata(trig, iio);
bc2c90c9
MV
1217 trig->ops = &mxs_lradc_trigger_ops;
1218
1219 ret = iio_trigger_register(trig);
1220 if (ret) {
1221 iio_trigger_free(trig);
1222 return ret;
1223 }
1224
e1b1fa66 1225 lradc->trig = trig;
bc2c90c9
MV
1226
1227 return 0;
1228}
1229
1230static void mxs_lradc_trigger_remove(struct iio_dev *iio)
1231{
e1b1fa66
MV
1232 struct mxs_lradc *lradc = iio_priv(iio);
1233
1234 iio_trigger_unregister(lradc->trig);
1235 iio_trigger_free(lradc->trig);
bc2c90c9
MV
1236}
1237
1238static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
1239{
1240 struct mxs_lradc *lradc = iio_priv(iio);
06ddd353
MV
1241 int ret = 0, chan, ofs = 0;
1242 unsigned long enable = 0;
1243 uint32_t ctrl4_set = 0;
1244 uint32_t ctrl4_clr = 0;
bc2c90c9
MV
1245 uint32_t ctrl1_irq = 0;
1246 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
1247 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
168934c9
AO
1248 const int len = bitmap_weight(iio->active_scan_mask,
1249 LRADC_MAX_TOTAL_CHANS);
bc2c90c9
MV
1250
1251 if (!len)
1252 return -EINVAL;
1253
1254 /*
1255 * Lock the driver so raw access can not be done during buffered
1256 * operation. This simplifies the code a lot.
1257 */
1258 ret = mutex_trylock(&lradc->lock);
1259 if (!ret)
1260 return -EBUSY;
1261
5b12d0ac 1262 lradc->buffer = kmalloc_array(len, sizeof(*lradc->buffer), GFP_KERNEL);
bc2c90c9
MV
1263 if (!lradc->buffer) {
1264 ret = -ENOMEM;
1265 goto err_mem;
1266 }
1267
8c06f714
JB
1268 if (lradc->soc == IMX28_LRADC)
1269 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK,
f0b83cc8
JB
1270 LRADC_CTRL1);
1271 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0);
bc2c90c9 1272
c80712c7 1273 for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
06ddd353
MV
1274 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
1275 ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);
bc2c90c9 1276 ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);
f0b83cc8 1277 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(ofs));
06ddd353 1278 bitmap_set(&enable, ofs, 1);
bc2c90c9 1279 ofs++;
73327b4c 1280 }
bc2c90c9 1281
f0b83cc8
JB
1282 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1283 LRADC_DELAY_KICK, LRADC_DELAY(0));
1284 mxs_lradc_reg_clear(lradc, ctrl4_clr, LRADC_CTRL4);
1285 mxs_lradc_reg_set(lradc, ctrl4_set, LRADC_CTRL4);
1286 mxs_lradc_reg_set(lradc, ctrl1_irq, LRADC_CTRL1);
1287 mxs_lradc_reg_set(lradc, enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
1288 LRADC_DELAY(0));
bc2c90c9
MV
1289
1290 return 0;
1291
bc2c90c9
MV
1292err_mem:
1293 mutex_unlock(&lradc->lock);
1294 return ret;
1295}
1296
1297static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
1298{
1299 struct mxs_lradc *lradc = iio_priv(iio);
1300
f0b83cc8
JB
1301 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1302 LRADC_DELAY_KICK, LRADC_DELAY(0));
bc2c90c9 1303
f0b83cc8 1304 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0);
8c06f714
JB
1305 if (lradc->soc == IMX28_LRADC)
1306 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK,
f0b83cc8 1307 LRADC_CTRL1);
bc2c90c9
MV
1308
1309 kfree(lradc->buffer);
1310 mutex_unlock(&lradc->lock);
1311
1312 return 0;
1313}
1314
1315static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
1316 const unsigned long *mask)
1317{
06ddd353 1318 struct mxs_lradc *lradc = iio_priv(iio);
f4914e5e 1319 const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS);
06ddd353
MV
1320 int rsvd_chans = 0;
1321 unsigned long rsvd_mask = 0;
1322
1323 if (lradc->use_touchbutton)
1324 rsvd_mask |= CHAN_MASK_TOUCHBUTTON;
1325 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)
1326 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;
1327 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
1328 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;
1329
1330 if (lradc->use_touchbutton)
1331 rsvd_chans++;
1332 if (lradc->use_touchscreen)
f81197b8 1333 rsvd_chans += 2;
06ddd353
MV
1334
1335 /* Test for attempts to map channels with special mode of operation. */
f4914e5e 1336 if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))
06ddd353
MV
1337 return false;
1338
1339 /* Test for attempts to map more channels then available slots. */
1340 if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)
1341 return false;
1342
1343 return true;
bc2c90c9
MV
1344}
1345
1346static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {
1347 .preenable = &mxs_lradc_buffer_preenable,
1348 .postenable = &iio_triggered_buffer_postenable,
1349 .predisable = &iio_triggered_buffer_predisable,
1350 .postdisable = &mxs_lradc_buffer_postdisable,
1351 .validate_scan_mask = &mxs_lradc_validate_scan_mask,
1352};
1353
1354/*
1355 * Driver initialization
1356 */
1357
1358#define MXS_ADC_CHAN(idx, chan_type) { \
1359 .type = (chan_type), \
1360 .indexed = 1, \
1361 .scan_index = (idx), \
f6db68a4
HP
1362 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1363 BIT(IIO_CHAN_INFO_SCALE), \
bc2c90c9 1364 .channel = (idx), \
d5acf594 1365 .address = (idx), \
bc2c90c9
MV
1366 .scan_type = { \
1367 .sign = 'u', \
1eb70a97 1368 .realbits = LRADC_RESOLUTION, \
bc2c90c9
MV
1369 .storagebits = 32, \
1370 }, \
1371}
1372
1373static const struct iio_chan_spec mxs_lradc_chan_spec[] = {
1374 MXS_ADC_CHAN(0, IIO_VOLTAGE),
1375 MXS_ADC_CHAN(1, IIO_VOLTAGE),
1376 MXS_ADC_CHAN(2, IIO_VOLTAGE),
1377 MXS_ADC_CHAN(3, IIO_VOLTAGE),
1378 MXS_ADC_CHAN(4, IIO_VOLTAGE),
1379 MXS_ADC_CHAN(5, IIO_VOLTAGE),
1380 MXS_ADC_CHAN(6, IIO_VOLTAGE),
1381 MXS_ADC_CHAN(7, IIO_VOLTAGE), /* VBATT */
c8231a9a
AB
1382 /* Combined Temperature sensors */
1383 {
1384 .type = IIO_TEMP,
1385 .indexed = 1,
1386 .scan_index = 8,
1387 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
1388 BIT(IIO_CHAN_INFO_OFFSET) |
1389 BIT(IIO_CHAN_INFO_SCALE),
1390 .channel = 8,
1391 .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},
1392 },
bc2c90c9
MV
1393 MXS_ADC_CHAN(10, IIO_VOLTAGE), /* VDDIO */
1394 MXS_ADC_CHAN(11, IIO_VOLTAGE), /* VTH */
1395 MXS_ADC_CHAN(12, IIO_VOLTAGE), /* VDDA */
1396 MXS_ADC_CHAN(13, IIO_VOLTAGE), /* VDDD */
1397 MXS_ADC_CHAN(14, IIO_VOLTAGE), /* VBG */
1398 MXS_ADC_CHAN(15, IIO_VOLTAGE), /* VDD5V */
1399};
1400
947123d5 1401static int mxs_lradc_hw_init(struct mxs_lradc *lradc)
bc2c90c9 1402{
06ddd353
MV
1403 /* The ADC always uses DELAY CHANNEL 0. */
1404 const uint32_t adc_cfg =
1405 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |
bc2c90c9
MV
1406 (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);
1407
947123d5 1408 int ret = stmp_reset_block(lradc->base);
3e4b4923 1409
947123d5
FE
1410 if (ret)
1411 return ret;
bc2c90c9 1412
06ddd353 1413 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */
f0b83cc8 1414 mxs_lradc_reg_wrt(lradc, adc_cfg, LRADC_DELAY(0));
06ddd353
MV
1415
1416 /* Disable remaining DELAY CHANNELs */
f0b83cc8
JB
1417 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(1));
1418 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
1419 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
06ddd353
MV
1420
1421 /* Configure the touchscreen type */
8c06f714
JB
1422 if (lradc->soc == IMX28_LRADC) {
1423 mxs_lradc_reg_clear(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
f0b83cc8 1424 LRADC_CTRL0);
06ddd353 1425
f0b83cc8
JB
1426 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
1427 mxs_lradc_reg_set(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
1428 LRADC_CTRL0);
06ddd353 1429 }
bc2c90c9
MV
1430
1431 /* Start internal temperature sensing. */
f0b83cc8 1432 mxs_lradc_reg_wrt(lradc, 0, LRADC_CTRL2);
947123d5
FE
1433
1434 return 0;
bc2c90c9
MV
1435}
1436
1437static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
1438{
1439 int i;
1440
f0b83cc8 1441 mxs_lradc_reg_clear(lradc, mxs_lradc_irq_en_mask(lradc), LRADC_CTRL1);
bc2c90c9
MV
1442
1443 for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)
f0b83cc8 1444 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(i));
bc2c90c9
MV
1445}
1446
5e1f9aca
MV
1447static const struct of_device_id mxs_lradc_dt_ids[] = {
1448 { .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },
1449 { .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },
1450 { /* sentinel */ }
1451};
1452MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);
1453
dee05308
JB
1454static int mxs_lradc_probe_touchscreen(struct mxs_lradc *lradc,
1455 struct device_node *lradc_node)
1456{
e9c88fb5
JB
1457 int ret;
1458 u32 ts_wires = 0, adapt;
1459
1460 ret = of_property_read_u32(lradc_node, "fsl,lradc-touchscreen-wires",
1461 &ts_wires);
1462 if (ret)
1463 return -ENODEV; /* touchscreen feature disabled */
1464
1465 switch (ts_wires) {
1466 case 4:
1467 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;
1468 break;
1469 case 5:
1470 if (lradc->soc == IMX28_LRADC) {
1471 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;
1472 break;
1473 }
1474 /* fall through an error message for i.MX23 */
1475 default:
1476 dev_err(lradc->dev,
1477 "Unsupported number of touchscreen wires (%d)\n",
1478 ts_wires);
1479 return -EINVAL;
1480 }
1481
dee05308 1482 lradc->over_sample_cnt = 4;
e9c88fb5
JB
1483 ret = of_property_read_u32(lradc_node, "fsl,ave-ctrl", &adapt);
1484 if (ret == 0)
1485 lradc->over_sample_cnt = adapt;
1486
dee05308 1487 lradc->over_sample_delay = 2;
e9c88fb5
JB
1488 ret = of_property_read_u32(lradc_node, "fsl,ave-delay", &adapt);
1489 if (ret == 0)
1490 lradc->over_sample_delay = adapt;
1491
dee05308 1492 lradc->settling_delay = 10;
e9c88fb5
JB
1493 ret = of_property_read_u32(lradc_node, "fsl,settling", &adapt);
1494 if (ret == 0)
1495 lradc->settling_delay = adapt;
dee05308
JB
1496
1497 return 0;
1498}
1499
4ae1c61f 1500static int mxs_lradc_probe(struct platform_device *pdev)
bc2c90c9 1501{
5e1f9aca
MV
1502 const struct of_device_id *of_id =
1503 of_match_device(mxs_lradc_dt_ids, &pdev->dev);
1504 const struct mxs_lradc_of_config *of_cfg =
1505 &mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];
bc2c90c9 1506 struct device *dev = &pdev->dev;
06ddd353 1507 struct device_node *node = dev->of_node;
bc2c90c9
MV
1508 struct mxs_lradc *lradc;
1509 struct iio_dev *iio;
1510 struct resource *iores;
dee05308 1511 int ret = 0, touch_ret;
d5acf594 1512 int i, s;
e036f71e 1513 uint64_t scale_uv;
bc2c90c9
MV
1514
1515 /* Allocate the IIO device. */
073c33d5 1516 iio = devm_iio_device_alloc(dev, sizeof(*lradc));
bc2c90c9
MV
1517 if (!iio) {
1518 dev_err(dev, "Failed to allocate IIO device\n");
1519 return -ENOMEM;
1520 }
1521
1522 lradc = iio_priv(iio);
ccff5297 1523 lradc->soc = (enum mxs_lradc_id)of_id->data;
bc2c90c9
MV
1524
1525 /* Grab the memory area */
1526 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1527 lradc->dev = &pdev->dev;
97f4be60 1528 lradc->base = devm_ioremap_resource(dev, iores);
073c33d5
SK
1529 if (IS_ERR(lradc->base))
1530 return PTR_ERR(lradc->base);
bc2c90c9 1531
18da755d
JB
1532 lradc->clk = devm_clk_get(&pdev->dev, NULL);
1533 if (IS_ERR(lradc->clk)) {
1534 dev_err(dev, "Failed to get the delay unit clock\n");
1535 return PTR_ERR(lradc->clk);
1536 }
1537 ret = clk_prepare_enable(lradc->clk);
1538 if (ret != 0) {
1539 dev_err(dev, "Failed to enable the delay unit clock\n");
1540 return ret;
1541 }
1542
dee05308 1543 touch_ret = mxs_lradc_probe_touchscreen(lradc, node);
06ddd353 1544
bc2c90c9 1545 /* Grab all IRQ sources */
5e1f9aca 1546 for (i = 0; i < of_cfg->irq_count; i++) {
bc2c90c9 1547 lradc->irq[i] = platform_get_irq(pdev, i);
75d7ed3b
FE
1548 if (lradc->irq[i] < 0) {
1549 ret = lradc->irq[i];
1550 goto err_clk;
1551 }
bc2c90c9
MV
1552
1553 ret = devm_request_irq(dev, lradc->irq[i],
1554 mxs_lradc_handle_irq, 0,
5e1f9aca 1555 of_cfg->irq_name[i], iio);
bc2c90c9 1556 if (ret)
75d7ed3b 1557 goto err_clk;
bc2c90c9
MV
1558 }
1559
f6db68a4
HP
1560 lradc->vref_mv = of_cfg->vref_mv;
1561
bc2c90c9
MV
1562 platform_set_drvdata(pdev, iio);
1563
1564 init_completion(&lradc->completion);
1565 mutex_init(&lradc->lock);
1566
1567 iio->name = pdev->name;
1568 iio->dev.parent = &pdev->dev;
1569 iio->info = &mxs_lradc_iio_info;
1570 iio->modes = INDIO_DIRECT_MODE;
1571 iio->channels = mxs_lradc_chan_spec;
1572 iio->num_channels = ARRAY_SIZE(mxs_lradc_chan_spec);
f4914e5e 1573 iio->masklength = LRADC_MAX_TOTAL_CHANS;
bc2c90c9
MV
1574
1575 ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,
1576 &mxs_lradc_trigger_handler,
1577 &mxs_lradc_buffer_ops);
1578 if (ret)
75d7ed3b 1579 goto err_clk;
bc2c90c9
MV
1580
1581 ret = mxs_lradc_trigger_init(iio);
1582 if (ret)
1583 goto err_trig;
1584
d5acf594
HP
1585 /* Populate available ADC input ranges */
1586 for (i = 0; i < LRADC_MAX_TOTAL_CHANS; i++) {
1587 for (s = 0; s < ARRAY_SIZE(lradc->scale_avail[i]); s++) {
1588 /*
1589 * [s=0] = optional divider by two disabled (default)
1590 * [s=1] = optional divider by two enabled
1591 *
1592 * The scale is calculated by doing:
1593 * Vref >> (realbits - s)
1594 * which multiplies by two on the second component
1595 * of the array.
1596 */
1597 scale_uv = ((u64)lradc->vref_mv[i] * 100000000) >>
d4bf105b 1598 (LRADC_RESOLUTION - s);
d5acf594
HP
1599 lradc->scale_avail[i][s].nano =
1600 do_div(scale_uv, 100000000) * 10;
1601 lradc->scale_avail[i][s].integer = scale_uv;
1602 }
1603 }
1604
f6e8a968 1605 /* Configure the hardware. */
947123d5
FE
1606 ret = mxs_lradc_hw_init(lradc);
1607 if (ret)
1608 goto err_dev;
f6e8a968 1609
06ddd353 1610 /* Register the touchscreen input device. */
dee05308
JB
1611 if (touch_ret == 0) {
1612 ret = mxs_lradc_ts_register(lradc);
1613 if (ret)
1614 goto err_ts_register;
1615 }
06ddd353 1616
bc2c90c9
MV
1617 /* Register IIO device. */
1618 ret = iio_device_register(iio);
1619 if (ret) {
1620 dev_err(dev, "Failed to register IIO device\n");
06ddd353 1621 goto err_ts;
bc2c90c9
MV
1622 }
1623
bc2c90c9
MV
1624 return 0;
1625
06ddd353
MV
1626err_ts:
1627 mxs_lradc_ts_unregister(lradc);
a0ef6db7
FE
1628err_ts_register:
1629 mxs_lradc_hw_stop(lradc);
bc2c90c9
MV
1630err_dev:
1631 mxs_lradc_trigger_remove(iio);
1632err_trig:
1633 iio_triggered_buffer_cleanup(iio);
75d7ed3b
FE
1634err_clk:
1635 clk_disable_unprepare(lradc->clk);
bc2c90c9
MV
1636 return ret;
1637}
1638
447d4f29 1639static int mxs_lradc_remove(struct platform_device *pdev)
bc2c90c9
MV
1640{
1641 struct iio_dev *iio = platform_get_drvdata(pdev);
1642 struct mxs_lradc *lradc = iio_priv(iio);
1643
a0ef6db7 1644 iio_device_unregister(iio);
06ddd353 1645 mxs_lradc_ts_unregister(lradc);
bc2c90c9 1646 mxs_lradc_hw_stop(lradc);
bc2c90c9 1647 mxs_lradc_trigger_remove(iio);
a0ef6db7 1648 iio_triggered_buffer_cleanup(iio);
bc2c90c9 1649
18da755d 1650 clk_disable_unprepare(lradc->clk);
bc2c90c9
MV
1651 return 0;
1652}
1653
bc2c90c9
MV
1654static struct platform_driver mxs_lradc_driver = {
1655 .driver = {
1656 .name = DRIVER_NAME,
bc2c90c9
MV
1657 .of_match_table = mxs_lradc_dt_ids,
1658 },
1659 .probe = mxs_lradc_probe,
e543acf0 1660 .remove = mxs_lradc_remove,
bc2c90c9
MV
1661};
1662
1663module_platform_driver(mxs_lradc_driver);
1664
1665MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1666MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver");
1667MODULE_LICENSE("GPL v2");
8c4a8c9d 1668MODULE_ALIAS("platform:" DRIVER_NAME);
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