staging:iio:dac:ad5446: allocate chip state with iio_dev and use iio_priv for access.
[deliverable/linux.git] / drivers / staging / iio / dac / ad5446.h
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1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
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8#ifndef IIO_DAC_AD5446_H_
9#define IIO_DAC_AD5446_H_
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10
11/* DAC Control Bits */
12
13#define AD5446_LOAD (0x0 << 14) /* Load and update */
14#define AD5446_SDO_DIS (0x1 << 14) /* Disable SDO */
15#define AD5446_NOP (0x2 << 14) /* No operation */
16#define AD5446_CLK_RISING (0x3 << 14) /* Clock data on rising edge */
17
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18#define AD5620_LOAD (0x0 << 14) /* Load and update Norm Operation*/
19#define AD5620_PWRDWN_1k (0x1 << 14) /* Power-down: 1kOhm to GND */
20#define AD5620_PWRDWN_100k (0x2 << 14) /* Power-down: 100kOhm to GND */
21#define AD5620_PWRDWN_TRISTATE (0x3 << 14) /* Power-down: Three-state */
22
23#define AD5660_LOAD (0x0 << 16) /* Load and update Norm Operation*/
24#define AD5660_PWRDWN_1k (0x1 << 16) /* Power-down: 1kOhm to GND */
25#define AD5660_PWRDWN_100k (0x2 << 16) /* Power-down: 100kOhm to GND */
26#define AD5660_PWRDWN_TRISTATE (0x3 << 16) /* Power-down: Three-state */
27
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28#define RES_MASK(bits) ((1 << (bits)) - 1)
29
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30#define MODE_PWRDWN_1k 0x1
31#define MODE_PWRDWN_100k 0x2
32#define MODE_PWRDWN_TRISTATE 0x3
33
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34/**
35 * struct ad5446_state - driver instance specific data
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36 * @spi: spi_device
37 * @chip_info: chip model specific constants, available modes etc
38 * @reg: supply regulator
39 * @poll_work: bottom half of polling interrupt handler
40 * @vref_mv: actual reference voltage used
41 * @xfer: default spi transfer
42 * @msg: default spi message
43 * @data: spi transmit buffer
44 */
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45
46struct ad5446_state {
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47 struct spi_device *spi;
48 const struct ad5446_chip_info *chip_info;
49 struct regulator *reg;
50 struct work_struct poll_work;
51 unsigned short vref_mv;
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52 unsigned cached_val;
53 unsigned pwr_down_mode;
54 unsigned pwr_down;
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55 struct spi_transfer xfer;
56 struct spi_message msg;
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57 union {
58 unsigned short d16;
59 unsigned char d24[3];
60 } data;
61};
62
63/**
4f765482 64 * struct ad5446_chip_info - chip specific information
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65 * @bits: accuracy of the DAC in bits
66 * @storagebits: number of bits written to the DAC
67 * @left_shift: number of bits the datum must be shifted
d846263d 68 * @int_vref_mv: AD5620/40/60: the internal reference voltage
4f765482 69 * @store_sample: chip specific helper function to store the datum
bbed4dc7 70 * @store_sample: chip specific helper function to store the powerpown cmd
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71 */
72
73struct ad5446_chip_info {
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74 u8 bits;
75 u8 storagebits;
76 u8 left_shift;
77 u16 int_vref_mv;
78 void (*store_sample) (struct ad5446_state *st, unsigned val);
79 void (*store_pwr_down) (struct ad5446_state *st, unsigned mode);
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80};
81
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82/**
83 * ad5446_supported_device_ids:
84 * The AD5620/40/60 parts are available in different fixed internal reference
85 * voltage options. The actual part numbers may look differently
86 * (and a bit cryptic), however this style is used to make clear which
87 * parts are supported here.
88 */
89
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90enum ad5446_supported_device_ids {
91 ID_AD5444,
92 ID_AD5446,
67d1c1f4 93 ID_AD5541A,
b5a49481 94 ID_AD5542A,
0772268a 95 ID_AD5543,
b5a49481 96 ID_AD5512A,
0772268a 97 ID_AD5553,
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98 ID_AD5601,
99 ID_AD5611,
100 ID_AD5621,
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101 ID_AD5620_2500,
102 ID_AD5620_1250,
103 ID_AD5640_2500,
104 ID_AD5640_1250,
105 ID_AD5660_2500,
106 ID_AD5660_1250,
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107};
108
d846263d 109#endif /* IIO_DAC_AD5446_H_ */
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