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staging:iio: Fix adis16400 channel offsets and scales
[deliverable/linux.git] / drivers / staging / iio / imu / adis16400_core.c
CommitLineData
a9d26f00
BS		 1/*
2 * adis16400.c support Analog Devices ADIS16400/5
3 * 3d 2g Linear Accelerometers,
4 * 3d Gyroscopes,
5 * 3d Magnetometers via SPI
6 *
7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
0f8c9620 8 * Copyright (c) 2007 Jonathan Cameron <jic23@kernel.org>
6a6ec623 9 * Copyright (c) 2011 Analog Devices Inc.
a9d26f00
BS		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17#include <linux/interrupt.h>
18#include <linux/irq.h>
a9d26f00
BS		 19#include <linux/delay.h>
20#include <linux/mutex.h>
21#include <linux/device.h>
22#include <linux/kernel.h>
23#include <linux/spi/spi.h>
1cb6c1f5 24#include <linux/slab.h>
a9d26f00
BS		 25#include <linux/sysfs.h>
26#include <linux/list.h>
99c97852 27#include <linux/module.h>
a9d26f00 28
06458e27
JC		 29#include <linux/iio/iio.h>
30#include <linux/iio/sysfs.h>
31#include <linux/iio/buffer.h>
a9d26f00
BS		 32#include "adis16400.h"
33
2a29a90b 34enum adis16400_chip_variant {
8e886e65 35 ADIS16300,
85da5059 36 ADIS16334,
2a29a90b
JC		 37 ADIS16350,
38 ADIS16360,
39 ADIS16362,
40 ADIS16364,
41 ADIS16365,
42 ADIS16400,
43};
44
a9d26f00
BS		 45/**
46 * adis16400_spi_write_reg_8() - write single byte to a register
47 * @dev: device associated with child of actual device (iio_dev or iio_trig)
48 * @reg_address: the address of the register to be written
49 * @val: the value to write
521de518 50 */
e7854845
JC		 51static int adis16400_spi_write_reg_8(struct iio_dev *indio_dev,
52 u8 reg_address,
53 u8 val)
a9d26f00
BS		 54{
55 int ret;
38d15f06 56 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 57
58 mutex_lock(&st->buf_lock);
59 st->tx[0] = ADIS16400_WRITE_REG(reg_address);
60 st->tx[1] = val;
61
62 ret = spi_write(st->us, st->tx, 2);
63 mutex_unlock(&st->buf_lock);
64
65 return ret;
66}
67
68/**
69 * adis16400_spi_write_reg_16() - write 2 bytes to a pair of registers
70 * @dev: device associated with child of actual device (iio_dev or iio_trig)
71 * @reg_address: the address of the lower of the two registers. Second register
72 * is assumed to have address one greater.
73 * @val: value to be written
521de518
JC		 74 *
75 * At the moment the spi framework doesn't allow global setting of cs_change.
76 * This means that use cannot be made of spi_write.
77 */
e7854845 78static int adis16400_spi_write_reg_16(struct iio_dev *indio_dev,
a9d26f00
BS		 79 u8 lower_reg_address,
80 u16 value)
81{
82 int ret;
83 struct spi_message msg;
38d15f06 84 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 85 struct spi_transfer xfers[] = {
86 {
87 .tx_buf = st->tx,
88 .bits_per_word = 8,
89 .len = 2,
90 .cs_change = 1,
91 }, {
92 .tx_buf = st->tx + 2,
93 .bits_per_word = 8,
94 .len = 2,
a9d26f00
BS		 95 },
96 };
97
98 mutex_lock(&st->buf_lock);
99 st->tx[0] = ADIS16400_WRITE_REG(lower_reg_address);
100 st->tx[1] = value & 0xFF;
101 st->tx[2] = ADIS16400_WRITE_REG(lower_reg_address + 1);
102 st->tx[3] = (value >> 8) & 0xFF;
103
104 spi_message_init(&msg);
105 spi_message_add_tail(&xfers[0], &msg);
106 spi_message_add_tail(&xfers[1], &msg);
107 ret = spi_sync(st->us, &msg);
108 mutex_unlock(&st->buf_lock);
109
110 return ret;
111}
112
113/**
114 * adis16400_spi_read_reg_16() - read 2 bytes from a 16-bit register
e7854845 115 * @indio_dev: iio device
a9d26f00
BS		 116 * @reg_address: the address of the lower of the two registers. Second register
117 * is assumed to have address one greater.
118 * @val: somewhere to pass back the value read
521de518
JC		 119 *
120 * At the moment the spi framework doesn't allow global setting of cs_change.
121 * This means that use cannot be made of spi_read.
a9d26f00 122 **/
e7854845 123static int adis16400_spi_read_reg_16(struct iio_dev *indio_dev,
a9d26f00
BS		 124 u8 lower_reg_address,
125 u16 *val)
126{
127 struct spi_message msg;
38d15f06 128 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 129 int ret;
130 struct spi_transfer xfers[] = {
131 {
132 .tx_buf = st->tx,
133 .bits_per_word = 8,
134 .len = 2,
135 .cs_change = 1,
136 }, {
137 .rx_buf = st->rx,
138 .bits_per_word = 8,
139 .len = 2,
a9d26f00
BS		 140 },
141 };
142
143 mutex_lock(&st->buf_lock);
144 st->tx[0] = ADIS16400_READ_REG(lower_reg_address);
145 st->tx[1] = 0;
a9d26f00
BS		 146
147 spi_message_init(&msg);
148 spi_message_add_tail(&xfers[0], &msg);
149 spi_message_add_tail(&xfers[1], &msg);
150 ret = spi_sync(st->us, &msg);
151 if (ret) {
152 dev_err(&st->us->dev,
153 "problem when reading 16 bit register 0x%02X",
154 lower_reg_address);
155 goto error_ret;
156 }
157 *val = (st->rx[0] << 8) | st->rx[1];
158
159error_ret:
160 mutex_unlock(&st->buf_lock);
161 return ret;
162}
163
98c9373d
JC		 164static int adis16400_get_freq(struct iio_dev *indio_dev)
165{
166 u16 t;
167 int sps, ret;
168
169 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t);
170 if (ret < 0)
171 return ret;
172 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638;
173 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
174
175 return sps;
176}
177
a9d26f00
BS		 178static ssize_t adis16400_read_frequency(struct device *dev,
179 struct device_attribute *attr,
180 char *buf)
181{
dedb1e77 182 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
a9d26f00 183 int ret, len = 0;
98c9373d
JC		 184 ret = adis16400_get_freq(indio_dev);
185 if (ret < 0)
a9d26f00 186 return ret;
98c9373d 187 len = sprintf(buf, "%d SPS\n", ret);
a9d26f00
BS		 188 return len;
189}
190
98c9373d
JC		 191static const unsigned adis16400_3db_divisors[] = {
192 [0] = 2, /* Special case */
193 [1] = 5,
194 [2] = 10,
195 [3] = 50,
196 [4] = 200,
197};
198
199static int adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val)
200{
201 int i, ret;
202 u16 val16;
203 for (i = ARRAY_SIZE(adis16400_3db_divisors) - 1; i >= 0; i--)
204 if (sps/adis16400_3db_divisors[i] > val)
205 break;
206 if (i == -1)
207 ret = -EINVAL;
208 else {
209 ret = adis16400_spi_read_reg_16(indio_dev,
210 ADIS16400_SENS_AVG,
211 &val16);
212 if (ret < 0)
213 goto error_ret;
214
215 ret = adis16400_spi_write_reg_16(indio_dev,
216 ADIS16400_SENS_AVG,
217 (val16 & ~0x03) | i);
218 }
219error_ret:
220 return ret;
221}
222
a9d26f00
BS		 223static ssize_t adis16400_write_frequency(struct device *dev,
224 struct device_attribute *attr,
225 const char *buf,
226 size_t len)
227{
dedb1e77 228 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
38d15f06 229 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 230 long val;
231 int ret;
232 u8 t;
233
234 ret = strict_strtol(buf, 10, &val);
235 if (ret)
236 return ret;
50d4b306
DC		 237 if (val == 0)
238 return -EINVAL;
a9d26f00
BS		 239
240 mutex_lock(&indio_dev->mlock);
241
242 t = (1638 / val);
243 if (t > 0)
244 t--;
245 t &= ADIS16400_SMPL_PRD_DIV_MASK;
246 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
247 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
248 else
249 st->us->max_speed_hz = ADIS16400_SPI_FAST;
250
e7854845 251 ret = adis16400_spi_write_reg_8(indio_dev,
a9d26f00
BS		 252 ADIS16400_SMPL_PRD,
253 t);
254
98c9373d 255 /* Also update the filter */
a9d26f00
BS		 256 mutex_unlock(&indio_dev->mlock);
257
258 return ret ? ret : len;
259}
260
e7854845 261static int adis16400_reset(struct iio_dev *indio_dev)
3fd66da1
BS		 262{
263 int ret;
e7854845 264 ret = adis16400_spi_write_reg_8(indio_dev,
3fd66da1
BS		 265 ADIS16400_GLOB_CMD,
266 ADIS16400_GLOB_CMD_SW_RESET);
267 if (ret)
e7854845 268 dev_err(&indio_dev->dev, "problem resetting device");
3fd66da1
BS		 269
270 return ret;
271}
272
e7854845 273int adis16400_set_irq(struct iio_dev *indio_dev, bool enable)
a9d26f00
BS		 274{
275 int ret;
276 u16 msc;
521de518 277
e7854845 278 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_MSC_CTRL, &msc);
a9d26f00
BS		 279 if (ret)
280 goto error_ret;
281
282 msc |= ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH;
283 if (enable)
284 msc |= ADIS16400_MSC_CTRL_DATA_RDY_EN;
285 else
286 msc &= ~ADIS16400_MSC_CTRL_DATA_RDY_EN;
287
e7854845 288 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_MSC_CTRL, msc);
a9d26f00
BS		 289 if (ret)
290 goto error_ret;
291
292error_ret:
293 return ret;
294}
295
a9d26f00 296/* Power down the device */
e7854845 297static int adis16400_stop_device(struct iio_dev *indio_dev)
a9d26f00
BS		 298{
299 int ret;
300 u16 val = ADIS16400_SLP_CNT_POWER_OFF;
301
e7854845 302 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_SLP_CNT, val);
a9d26f00 303 if (ret)
e7854845
JC		 304 dev_err(&indio_dev->dev,
305 "problem with turning device off: SLP_CNT");
a9d26f00
BS		 306
307 return ret;
308}
309
e7854845 310static int adis16400_check_status(struct iio_dev *indio_dev)
a9d26f00
BS		 311{
312 u16 status;
313 int ret;
e7854845 314 struct device *dev = &indio_dev->dev;
a9d26f00 315
e7854845
JC		 316 ret = adis16400_spi_read_reg_16(indio_dev,
317 ADIS16400_DIAG_STAT, &status);
a9d26f00
BS		 318
319 if (ret < 0) {
320 dev_err(dev, "Reading status failed\n");
321 goto error_ret;
322 }
323 ret = status;
324 if (status & ADIS16400_DIAG_STAT_ZACCL_FAIL)
325 dev_err(dev, "Z-axis accelerometer self-test failure\n");
326 if (status & ADIS16400_DIAG_STAT_YACCL_FAIL)
327 dev_err(dev, "Y-axis accelerometer self-test failure\n");
328 if (status & ADIS16400_DIAG_STAT_XACCL_FAIL)
329 dev_err(dev, "X-axis accelerometer self-test failure\n");
330 if (status & ADIS16400_DIAG_STAT_XGYRO_FAIL)
331 dev_err(dev, "X-axis gyroscope self-test failure\n");
332 if (status & ADIS16400_DIAG_STAT_YGYRO_FAIL)
333 dev_err(dev, "Y-axis gyroscope self-test failure\n");
334 if (status & ADIS16400_DIAG_STAT_ZGYRO_FAIL)
335 dev_err(dev, "Z-axis gyroscope self-test failure\n");
336 if (status & ADIS16400_DIAG_STAT_ALARM2)
337 dev_err(dev, "Alarm 2 active\n");
338 if (status & ADIS16400_DIAG_STAT_ALARM1)
339 dev_err(dev, "Alarm 1 active\n");
340 if (status & ADIS16400_DIAG_STAT_FLASH_CHK)
341 dev_err(dev, "Flash checksum error\n");
342 if (status & ADIS16400_DIAG_STAT_SELF_TEST)
343 dev_err(dev, "Self test error\n");
344 if (status & ADIS16400_DIAG_STAT_OVERFLOW)
345 dev_err(dev, "Sensor overrange\n");
346 if (status & ADIS16400_DIAG_STAT_SPI_FAIL)
347 dev_err(dev, "SPI failure\n");
348 if (status & ADIS16400_DIAG_STAT_FLASH_UPT)
349 dev_err(dev, "Flash update failed\n");
350 if (status & ADIS16400_DIAG_STAT_POWER_HIGH)
351 dev_err(dev, "Power supply above 5.25V\n");
352 if (status & ADIS16400_DIAG_STAT_POWER_LOW)
353 dev_err(dev, "Power supply below 4.75V\n");
354
355error_ret:
356 return ret;
357}
358
521de518
JC		 359static int adis16400_self_test(struct iio_dev *indio_dev)
360{
361 int ret;
362 ret = adis16400_spi_write_reg_16(indio_dev,
363 ADIS16400_MSC_CTRL,
364 ADIS16400_MSC_CTRL_MEM_TEST);
365 if (ret) {
366 dev_err(&indio_dev->dev, "problem starting self test");
367 goto err_ret;
368 }
369
370 msleep(ADIS16400_MTEST_DELAY);
371 adis16400_check_status(indio_dev);
372
373err_ret:
374 return ret;
375}
376
38d15f06 377static int adis16400_initial_setup(struct iio_dev *indio_dev)
a9d26f00
BS		 378{
379 int ret;
380 u16 prod_id, smp_prd;
38d15f06 381 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 382
383 /* use low spi speed for init */
384 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
385 st->us->mode = SPI_MODE_3;
386 spi_setup(st->us);
387
38d15f06 388 ret = adis16400_set_irq(indio_dev, false);
a9d26f00 389 if (ret) {
521de518 390 dev_err(&indio_dev->dev, "disable irq failed");
a9d26f00
BS		 391 goto err_ret;
392 }
393
38d15f06 394 ret = adis16400_self_test(indio_dev);
3fd66da1 395 if (ret) {
521de518 396 dev_err(&indio_dev->dev, "self test failure");
3fd66da1
BS		 397 goto err_ret;
398 }
a9d26f00 399
38d15f06 400 ret = adis16400_check_status(indio_dev);
a9d26f00 401 if (ret) {
38d15f06 402 adis16400_reset(indio_dev);
521de518 403 dev_err(&indio_dev->dev, "device not playing ball -> reset");
a9d26f00 404 msleep(ADIS16400_STARTUP_DELAY);
38d15f06 405 ret = adis16400_check_status(indio_dev);
a9d26f00 406 if (ret) {
521de518 407 dev_err(&indio_dev->dev, "giving up");
a9d26f00
BS		 408 goto err_ret;
409 }
410 }
2a29a90b 411 if (st->variant->flags & ADIS16400_HAS_PROD_ID) {
38d15f06 412 ret = adis16400_spi_read_reg_16(indio_dev,
2a29a90b
JC		 413 ADIS16400_PRODUCT_ID, &prod_id);
414 if (ret)
415 goto err_ret;
a9d26f00 416
2a29a90b 417 if ((prod_id & 0xF000) != st->variant->product_id)
521de518 418 dev_warn(&indio_dev->dev, "incorrect id");
a9d26f00 419
69d80bae 420 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n",
521de518
JC		 421 indio_dev->name, prod_id,
422 st->us->chip_select, st->us->irq);
2a29a90b 423 }
a9d26f00 424 /* use high spi speed if possible */
38d15f06 425 ret = adis16400_spi_read_reg_16(indio_dev,
e7854845 426 ADIS16400_SMPL_PRD, &smp_prd);
a9d26f00
BS		 427 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
428 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
429 spi_setup(st->us);
430 }
431
a9d26f00 432err_ret:
a9d26f00
BS		 433 return ret;
434}
435
a9d26f00 436static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
521de518
JC		 437 adis16400_read_frequency,
438 adis16400_write_frequency);
a9d26f00 439
51a0a5b0 440static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("409 546 819 1638");
a9d26f00 441
e7854845
JC		 442enum adis16400_chan {
443 in_supply,
444 gyro_x,
445 gyro_y,
446 gyro_z,
447 accel_x,
448 accel_y,
449 accel_z,
450 magn_x,
451 magn_y,
452 magn_z,
453 temp,
2a29a90b 454 temp0, temp1, temp2,
91ab3fc9 455 in1,
07a8329c 456 in2,
91ab3fc9
JC		 457 incli_x,
458 incli_y,
e7854845
JC		 459};
460
07a8329c 461static u8 adis16400_addresses[18][2] = {
521de518 462 [in_supply] = { ADIS16400_SUPPLY_OUT },
e7854845
JC		 463 [gyro_x] = { ADIS16400_XGYRO_OUT, ADIS16400_XGYRO_OFF },
464 [gyro_y] = { ADIS16400_YGYRO_OUT, ADIS16400_YGYRO_OFF },
465 [gyro_z] = { ADIS16400_ZGYRO_OUT, ADIS16400_ZGYRO_OFF },
466 [accel_x] = { ADIS16400_XACCL_OUT, ADIS16400_XACCL_OFF },
467 [accel_y] = { ADIS16400_YACCL_OUT, ADIS16400_YACCL_OFF },
468 [accel_z] = { ADIS16400_ZACCL_OUT, ADIS16400_ZACCL_OFF },
521de518
JC		 469 [magn_x] = { ADIS16400_XMAGN_OUT },
470 [magn_y] = { ADIS16400_YMAGN_OUT },
471 [magn_z] = { ADIS16400_ZMAGN_OUT },
472 [temp] = { ADIS16400_TEMP_OUT },
2a29a90b
JC		 473 [temp0] = { ADIS16350_XTEMP_OUT },
474 [temp1] = { ADIS16350_YTEMP_OUT },
475 [temp2] = { ADIS16350_ZTEMP_OUT },
07a8329c
LPC		 476 [in1] = { ADIS16300_AUX_ADC },
477 [in2] = { ADIS16400_AUX_ADC },
521de518
JC		 478 [incli_x] = { ADIS16300_PITCH_OUT },
479 [incli_y] = { ADIS16300_ROLL_OUT }
e7854845
JC		 480};
481
98c9373d 482
e7854845
JC		 483static int adis16400_write_raw(struct iio_dev *indio_dev,
484 struct iio_chan_spec const *chan,
485 int val,
486 int val2,
487 long mask)
488{
98c9373d
JC		 489 struct adis16400_state *st = iio_priv(indio_dev);
490 int ret, sps;
521de518 491
e7854845 492 switch (mask) {
c8a9f805 493 case IIO_CHAN_INFO_CALIBBIAS:
e7854845
JC		 494 mutex_lock(&indio_dev->mlock);
495 ret = adis16400_spi_write_reg_16(indio_dev,
496 adis16400_addresses[chan->address][1],
497 val);
498 mutex_unlock(&indio_dev->mlock);
499 return ret;
98c9373d
JC		 500 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
501 /* Need to cache values so we can update if the frequency
502 changes */
503 mutex_lock(&indio_dev->mlock);
504 st->filt_int = val;
505 /* Work out update to current value */
506 sps = adis16400_get_freq(indio_dev);
507 if (sps < 0) {
508 mutex_unlock(&indio_dev->mlock);
509 return sps;
510 }
511
512 ret = adis16400_set_filter(indio_dev, sps, val);
513 mutex_unlock(&indio_dev->mlock);
514 return ret;
e7854845
JC		 515 default:
516 return -EINVAL;
517 }
518}
519
520static int adis16400_read_raw(struct iio_dev *indio_dev,
521 struct iio_chan_spec const *chan,
522 int *val,
523 int *val2,
524 long mask)
525{
38d15f06 526 struct adis16400_state *st = iio_priv(indio_dev);
521de518 527 int ret, shift;
e7854845 528 s16 val16;
e7854845
JC		 529
530 switch (mask) {
a5d016d4 531 case IIO_CHAN_INFO_RAW:
e7854845
JC		 532 mutex_lock(&indio_dev->mlock);
533 ret = adis16400_spi_read_reg_16(indio_dev,
534 adis16400_addresses[chan->address][0],
535 &val16);
536 if (ret) {
537 mutex_unlock(&indio_dev->mlock);
538 return ret;
539 }
540 val16 &= (1 << chan->scan_type.realbits) - 1;
541 if (chan->scan_type.sign == 's') {
542 shift = 16 - chan->scan_type.realbits;
543 val16 = (s16)(val16 << shift) >> shift;
544 }
545 *val = val16;
546 mutex_unlock(&indio_dev->mlock);
547 return IIO_VAL_INT;
c8a9f805 548 case IIO_CHAN_INFO_SCALE:
e7854845 549 switch (chan->type) {
41ea040c 550 case IIO_ANGL_VEL:
e7854845 551 *val = 0;
2a29a90b 552 *val2 = st->variant->gyro_scale_micro;
e7854845 553 return IIO_VAL_INT_PLUS_MICRO;
6835cb6b 554 case IIO_VOLTAGE:
e7854845 555 *val = 0;
1cf8c97f
LPC		 556 if (chan->channel == 0) {
557 *val = 2;
558 *val2 = 418000; /* 2.418 mV */
559 } else {
560 *val = 0;
561 *val2 = 805800; /* 805.8 uV */
562 }
e7854845
JC		 563 return IIO_VAL_INT_PLUS_MICRO;
564 case IIO_ACCEL:
565 *val = 0;
2a29a90b 566 *val2 = st->variant->accel_scale_micro;
e7854845
JC		 567 return IIO_VAL_INT_PLUS_MICRO;
568 case IIO_MAGN:
569 *val = 0;
1cf8c97f 570 *val2 = 500; /* 0.5 mgauss */
e7854845
JC		 571 return IIO_VAL_INT_PLUS_MICRO;
572 case IIO_TEMP:
1cf8c97f
LPC		 573 *val = 140; /* 0.14 C */
574 *val2 = 0;
e7854845
JC		 575 return IIO_VAL_INT_PLUS_MICRO;
576 default:
577 return -EINVAL;
578 }
c8a9f805 579 case IIO_CHAN_INFO_CALIBBIAS:
e7854845
JC		 580 mutex_lock(&indio_dev->mlock);
581 ret = adis16400_spi_read_reg_16(indio_dev,
582 adis16400_addresses[chan->address][1],
583 &val16);
2a29a90b
JC		 584 mutex_unlock(&indio_dev->mlock);
585 if (ret)
e7854845 586 return ret;
e7854845
JC		 587 val16 = ((val16 & 0xFFF) << 4) >> 4;
588 *val = val16;
589 return IIO_VAL_INT;
c8a9f805 590 case IIO_CHAN_INFO_OFFSET:
1cf8c97f
LPC		 591 *val = 2500 / 14; /* 25 C = 0x00 */
592 return IIO_VAL_INT;
98c9373d
JC		 593 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
594 mutex_lock(&indio_dev->mlock);
595 /* Need both the number of taps and the sampling frequency */
596 ret = adis16400_spi_read_reg_16(indio_dev,
597 ADIS16400_SENS_AVG,
598 &val16);
599 if (ret < 0) {
600 mutex_unlock(&indio_dev->mlock);
601 return ret;
602 }
603 ret = adis16400_get_freq(indio_dev);
604 if (ret > 0)
605 *val = ret/adis16400_3db_divisors[val16 & 0x03];
606 *val2 = 0;
607 mutex_unlock(&indio_dev->mlock);
608 if (ret < 0)
609 return ret;
610 return IIO_VAL_INT_PLUS_MICRO;
e7854845
JC		 611 default:
612 return -EINVAL;
613 }
614}
615
f4e4b955 616static const struct iio_chan_spec adis16400_channels[] = {
521de518
JC		 617 {
618 .type = IIO_VOLTAGE,
619 .indexed = 1,
620 .channel = 0,
621 .extend_name = "supply",
a5d016d4
JC		 622 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
623 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 624 .address = in_supply,
625 .scan_index = ADIS16400_SCAN_SUPPLY,
626 .scan_type = IIO_ST('u', 14, 16, 0)
627 }, {
41ea040c 628 .type = IIO_ANGL_VEL,
521de518
JC		 629 .modified = 1,
630 .channel2 = IIO_MOD_X,
a5d016d4
JC		 631 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
632 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 633 IIO_CHAN_INFO_SCALE_SHARED_BIT |
634 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 635 .address = gyro_x,
636 .scan_index = ADIS16400_SCAN_GYRO_X,
637 .scan_type = IIO_ST('s', 14, 16, 0)
638 }, {
41ea040c 639 .type = IIO_ANGL_VEL,
521de518
JC		 640 .modified = 1,
641 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 642 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
643 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 644 IIO_CHAN_INFO_SCALE_SHARED_BIT |
645 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 646 .address = gyro_y,
647 .scan_index = ADIS16400_SCAN_GYRO_Y,
648 .scan_type = IIO_ST('s', 14, 16, 0),
649 }, {
41ea040c 650 .type = IIO_ANGL_VEL,
521de518
JC		 651 .modified = 1,
652 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 653 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
654 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 655 IIO_CHAN_INFO_SCALE_SHARED_BIT |
656 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 657 .address = gyro_z,
658 .scan_index = ADIS16400_SCAN_GYRO_Z,
659 .scan_type = IIO_ST('s', 14, 16, 0),
660 }, {
661 .type = IIO_ACCEL,
662 .modified = 1,
663 .channel2 = IIO_MOD_X,
a5d016d4
JC		 664 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
665 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 666 IIO_CHAN_INFO_SCALE_SHARED_BIT |
667 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 668 .address = accel_x,
669 .scan_index = ADIS16400_SCAN_ACC_X,
670 .scan_type = IIO_ST('s', 14, 16, 0),
671 }, {
672 .type = IIO_ACCEL,
673 .modified = 1,
674 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 675 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
676 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 677 IIO_CHAN_INFO_SCALE_SHARED_BIT |
678 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 679 .address = accel_y,
680 .scan_index = ADIS16400_SCAN_ACC_Y,
681 .scan_type = IIO_ST('s', 14, 16, 0),
682 }, {
683 .type = IIO_ACCEL,
684 .modified = 1,
685 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 686 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
687 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 688 IIO_CHAN_INFO_SCALE_SHARED_BIT |
689 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 690 .address = accel_z,
691 .scan_index = ADIS16400_SCAN_ACC_Z,
692 .scan_type = IIO_ST('s', 14, 16, 0),
693 }, {
694 .type = IIO_MAGN,
695 .modified = 1,
696 .channel2 = IIO_MOD_X,
a5d016d4
JC		 697 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
698 IIO_CHAN_INFO_SCALE_SHARED_BIT |
98c9373d 699 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 700 .address = magn_x,
701 .scan_index = ADIS16400_SCAN_MAGN_X,
702 .scan_type = IIO_ST('s', 14, 16, 0),
703 }, {
704 .type = IIO_MAGN,
705 .modified = 1,
706 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 707 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
708 IIO_CHAN_INFO_SCALE_SHARED_BIT |
98c9373d 709 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 710 .address = magn_y,
711 .scan_index = ADIS16400_SCAN_MAGN_Y,
712 .scan_type = IIO_ST('s', 14, 16, 0),
713 }, {
714 .type = IIO_MAGN,
715 .modified = 1,
716 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 717 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
718 IIO_CHAN_INFO_SCALE_SHARED_BIT |
98c9373d 719 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 720 .address = magn_z,
721 .scan_index = ADIS16400_SCAN_MAGN_Z,
722 .scan_type = IIO_ST('s', 14, 16, 0),
723 }, {
724 .type = IIO_TEMP,
725 .indexed = 1,
726 .channel = 0,
a5d016d4
JC		 727 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
728 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
c8a9f805 729 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 730 .address = temp,
731 .scan_index = ADIS16400_SCAN_TEMP,
732 .scan_type = IIO_ST('s', 12, 16, 0),
733 }, {
6835cb6b 734 .type = IIO_VOLTAGE,
521de518
JC		 735 .indexed = 1,
736 .channel = 1,
a5d016d4
JC		 737 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
738 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
07a8329c 739 .address = in2,
521de518
JC		 740 .scan_index = ADIS16400_SCAN_ADC_0,
741 .scan_type = IIO_ST('s', 12, 16, 0),
742 },
e7854845
JC		 743 IIO_CHAN_SOFT_TIMESTAMP(12)
744};
745
f4e4b955 746static const struct iio_chan_spec adis16350_channels[] = {
521de518
JC		 747 {
748 .type = IIO_VOLTAGE,
749 .indexed = 1,
750 .channel = 0,
751 .extend_name = "supply",
a5d016d4
JC		 752 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
753 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 754 .address = in_supply,
755 .scan_index = ADIS16400_SCAN_SUPPLY,
756 .scan_type = IIO_ST('u', 12, 16, 0)
757 }, {
41ea040c 758 .type = IIO_ANGL_VEL,
521de518
JC		 759 .modified = 1,
760 .channel2 = IIO_MOD_X,
a5d016d4
JC		 761 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
762 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 763 IIO_CHAN_INFO_SCALE_SHARED_BIT |
764 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 765 .address = gyro_x,
766 .scan_index = ADIS16400_SCAN_GYRO_X,
767 .scan_type = IIO_ST('s', 14, 16, 0)
768 }, {
41ea040c 769 .type = IIO_ANGL_VEL,
521de518
JC		 770 .modified = 1,
771 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 772 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
773 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 774 IIO_CHAN_INFO_SCALE_SHARED_BIT |
775 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 776 .address = gyro_y,
777 .scan_index = ADIS16400_SCAN_GYRO_Y,
778 .scan_type = IIO_ST('s', 14, 16, 0),
779 }, {
41ea040c 780 .type = IIO_ANGL_VEL,
521de518
JC		 781 .modified = 1,
782 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 783 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
784 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 785 IIO_CHAN_INFO_SCALE_SHARED_BIT |
786 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 787 .address = gyro_z,
788 .scan_index = ADIS16400_SCAN_GYRO_Z,
789 .scan_type = IIO_ST('s', 14, 16, 0),
790 }, {
a5d016d4 791 .type = IIO_ACCEL,
521de518
JC		 792 .modified = 1,
793 .channel2 = IIO_MOD_X,
a5d016d4
JC		 794 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
795 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 796 IIO_CHAN_INFO_SCALE_SHARED_BIT |
797 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 798 .address = accel_x,
799 .scan_index = ADIS16400_SCAN_ACC_X,
800 .scan_type = IIO_ST('s', 14, 16, 0),
801 }, {
802 .type = IIO_ACCEL,
803 .modified = 1,
804 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 805 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
806 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 807 IIO_CHAN_INFO_SCALE_SHARED_BIT |
808 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 809 .address = accel_y,
810 .scan_index = ADIS16400_SCAN_ACC_Y,
811 .scan_type = IIO_ST('s', 14, 16, 0),
812 }, {
813 .type = IIO_ACCEL,
814 .modified = 1,
815 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 816 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
817 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 818 IIO_CHAN_INFO_SCALE_SHARED_BIT |
819 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 820 .address = accel_z,
821 .scan_index = ADIS16400_SCAN_ACC_Z,
822 .scan_type = IIO_ST('s', 14, 16, 0),
823 }, {
824 .type = IIO_TEMP,
825 .indexed = 1,
826 .channel = 0,
827 .extend_name = "x",
a5d016d4
JC		 828 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
829 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
98c9373d
JC		 830 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
831 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 832 .address = temp0,
833 .scan_index = ADIS16350_SCAN_TEMP_X,
834 .scan_type = IIO_ST('s', 12, 16, 0),
835 }, {
836 .type = IIO_TEMP,
837 .indexed = 1,
838 .channel = 1,
839 .extend_name = "y",
a5d016d4
JC		 840 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
841 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
98c9373d
JC		 842 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
843 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 844 .address = temp1,
845 .scan_index = ADIS16350_SCAN_TEMP_Y,
846 .scan_type = IIO_ST('s', 12, 16, 0),
847 }, {
848 .type = IIO_TEMP,
849 .indexed = 1,
850 .channel = 2,
851 .extend_name = "z",
a5d016d4
JC		 852 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
853 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
c8a9f805 854 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 855 .address = temp2,
856 .scan_index = ADIS16350_SCAN_TEMP_Z,
857 .scan_type = IIO_ST('s', 12, 16, 0),
858 }, {
6835cb6b 859 .type = IIO_VOLTAGE,
521de518
JC		 860 .indexed = 1,
861 .channel = 1,
a5d016d4
JC		 862 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
863 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 864 .address = in1,
865 .scan_index = ADIS16350_SCAN_ADC_0,
866 .scan_type = IIO_ST('s', 12, 16, 0),
867 },
2a29a90b
JC		 868 IIO_CHAN_SOFT_TIMESTAMP(11)
869};
870
f4e4b955 871static const struct iio_chan_spec adis16300_channels[] = {
521de518
JC		 872 {
873 .type = IIO_VOLTAGE,
874 .indexed = 1,
875 .channel = 0,
876 .extend_name = "supply",
a5d016d4
JC		 877 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
878 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 879 .address = in_supply,
880 .scan_index = ADIS16400_SCAN_SUPPLY,
881 .scan_type = IIO_ST('u', 12, 16, 0)
882 }, {
41ea040c 883 .type = IIO_ANGL_VEL,
521de518
JC		 884 .modified = 1,
885 .channel2 = IIO_MOD_X,
a5d016d4
JC		 886 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
887 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 888 IIO_CHAN_INFO_SCALE_SHARED_BIT |
889 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 890 .address = gyro_x,
891 .scan_index = ADIS16400_SCAN_GYRO_X,
892 .scan_type = IIO_ST('s', 14, 16, 0),
893 }, {
894 .type = IIO_ACCEL,
895 .modified = 1,
896 .channel2 = IIO_MOD_X,
a5d016d4
JC		 897 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
898 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 899 IIO_CHAN_INFO_SCALE_SHARED_BIT |
900 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 901 .address = accel_x,
902 .scan_index = ADIS16400_SCAN_ACC_X,
903 .scan_type = IIO_ST('s', 14, 16, 0),
904 }, {
905 .type = IIO_ACCEL,
906 .modified = 1,
907 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 908 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
909 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 910 IIO_CHAN_INFO_SCALE_SHARED_BIT |
911 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 912 .address = accel_y,
913 .scan_index = ADIS16400_SCAN_ACC_Y,
914 .scan_type = IIO_ST('s', 14, 16, 0),
915 }, {
916 .type = IIO_ACCEL,
917 .modified = 1,
918 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 919 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
920 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 921 IIO_CHAN_INFO_SCALE_SHARED_BIT |
922 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 923 .address = accel_z,
924 .scan_index = ADIS16400_SCAN_ACC_Z,
925 .scan_type = IIO_ST('s', 14, 16, 0),
926 }, {
927 .type = IIO_TEMP,
928 .indexed = 1,
929 .channel = 0,
a5d016d4
JC		 930 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
931 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
c8a9f805 932 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
6f30592e 933 .address = temp0,
521de518
JC		 934 .scan_index = ADIS16400_SCAN_TEMP,
935 .scan_type = IIO_ST('s', 12, 16, 0),
936 }, {
6835cb6b 937 .type = IIO_VOLTAGE,
521de518
JC		 938 .indexed = 1,
939 .channel = 1,
a5d016d4
JC		 940 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
941 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 942 .address = in1,
943 .scan_index = ADIS16350_SCAN_ADC_0,
944 .scan_type = IIO_ST('s', 12, 16, 0),
945 }, {
946 .type = IIO_INCLI,
947 .modified = 1,
948 .channel2 = IIO_MOD_X,
a5d016d4
JC		 949 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
950 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 951 .address = incli_x,
952 .scan_index = ADIS16300_SCAN_INCLI_X,
953 .scan_type = IIO_ST('s', 13, 16, 0),
954 }, {
955 .type = IIO_INCLI,
956 .modified = 1,
957 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 958 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
959 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 960 .address = incli_y,
961 .scan_index = ADIS16300_SCAN_INCLI_Y,
962 .scan_type = IIO_ST('s', 13, 16, 0),
963 },
8e886e65
JC		 964 IIO_CHAN_SOFT_TIMESTAMP(14)
965};
966
85da5059 967static const struct iio_chan_spec adis16334_channels[] = {
521de518 968 {
41ea040c 969 .type = IIO_ANGL_VEL,
521de518
JC		 970 .modified = 1,
971 .channel2 = IIO_MOD_X,
a5d016d4
JC		 972 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
973 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 974 IIO_CHAN_INFO_SCALE_SHARED_BIT |
975 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 976 .address = gyro_x,
977 .scan_index = ADIS16400_SCAN_GYRO_X,
978 .scan_type = IIO_ST('s', 14, 16, 0),
979 }, {
41ea040c 980 .type = IIO_ANGL_VEL,
521de518
JC		 981 .modified = 1,
982 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 983 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
984 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 985 IIO_CHAN_INFO_SCALE_SHARED_BIT |
986 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 987 .address = gyro_y,
988 .scan_index = ADIS16400_SCAN_GYRO_Y,
989 .scan_type = IIO_ST('s', 14, 16, 0),
990 }, {
41ea040c 991 .type = IIO_ANGL_VEL,
521de518
JC		 992 .modified = 1,
993 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 994 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
995 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 996 IIO_CHAN_INFO_SCALE_SHARED_BIT |
997 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 998 .address = gyro_z,
999 .scan_index = ADIS16400_SCAN_GYRO_Z,
1000 .scan_type = IIO_ST('s', 14, 16, 0),
1001 }, {
1002 .type = IIO_ACCEL,
1003 .modified = 1,
1004 .channel2 = IIO_MOD_X,
a5d016d4
JC		 1005 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1006 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1007 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1008 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1009 .address = accel_x,
1010 .scan_index = ADIS16400_SCAN_ACC_X,
1011 .scan_type = IIO_ST('s', 14, 16, 0),
1012 }, {
1013 .type = IIO_ACCEL,
1014 .modified = 1,
1015 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 1016 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1017 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1018 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1019 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1020 .address = accel_y,
1021 .scan_index = ADIS16400_SCAN_ACC_Y,
1022 .scan_type = IIO_ST('s', 14, 16, 0),
1023 }, {
1024 .type = IIO_ACCEL,
1025 .modified = 1,
1026 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 1027 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1028 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1029 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1030 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1031 .address = accel_z,
1032 .scan_index = ADIS16400_SCAN_ACC_Z,
1033 .scan_type = IIO_ST('s', 14, 16, 0),
1034 }, {
1035 .type = IIO_TEMP,
1036 .indexed = 1,
1037 .channel = 0,
a5d016d4
JC		 1038 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1039 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
c8a9f805 1040 IIO_CHAN_INFO_SCALE_SHARED_BIT,
bb7cf8bc
LPC		 1041 .address = temp0,
1042 .scan_index = ADIS16400_SCAN_TEMP,
521de518
JC		 1043 .scan_type = IIO_ST('s', 14, 16, 0),
1044 },
88b42f3a
JC		 1045 IIO_CHAN_SOFT_TIMESTAMP(12)
1046};
1047
a9d26f00 1048static struct attribute *adis16400_attributes[] = {
a9d26f00 1049 &iio_dev_attr_sampling_frequency.dev_attr.attr,
51a0a5b0 1050 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
a9d26f00
BS		 1051 NULL
1052};
1053
1054static const struct attribute_group adis16400_attribute_group = {
1055 .attrs = adis16400_attributes,
1056};
1057
2a29a90b 1058static struct adis16400_chip_info adis16400_chips[] = {
8e886e65
JC		 1059 [ADIS16300] = {
1060 .channels = adis16300_channels,
1061 .num_channels = ARRAY_SIZE(adis16300_channels),
1cf8c97f 1062 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
8e886e65
JC		 1063 .accel_scale_micro = 5884,
1064 .default_scan_mask = (1 << ADIS16400_SCAN_SUPPLY) |
1065 (1 << ADIS16400_SCAN_GYRO_X) | (1 << ADIS16400_SCAN_ACC_X) |
1066 (1 << ADIS16400_SCAN_ACC_Y) | (1 << ADIS16400_SCAN_ACC_Z) |
1067 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) |
1068 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) |
1069 (1 << 14),
1070 },
85da5059
JC		 1071 [ADIS16334] = {
1072 .channels = adis16334_channels,
1073 .num_channels = ARRAY_SIZE(adis16334_channels),
1cf8c97f
LPC		 1074 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1075 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
88b42f3a
JC		 1076 .default_scan_mask = (1 << ADIS16400_SCAN_GYRO_X) |
1077 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) |
1078 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) |
1079 (1 << ADIS16400_SCAN_ACC_Z),
1080 },
2a29a90b
JC		 1081 [ADIS16350] = {
1082 .channels = adis16350_channels,
1083 .num_channels = ARRAY_SIZE(adis16350_channels),
1cf8c97f
LPC		 1084 .gyro_scale_micro = IIO_DEGREE_TO_RAD(73260), /* 0.07326 deg/s */
1085 .accel_scale_micro = IIO_G_TO_M_S_2(2522), /* 0.002522 g */
2a29a90b
JC		 1086 .default_scan_mask = 0x7FF,
1087 .flags = ADIS16400_NO_BURST,
1088 },
1089 [ADIS16360] = {
1090 .channels = adis16350_channels,
1091 .num_channels = ARRAY_SIZE(adis16350_channels),
1092 .flags = ADIS16400_HAS_PROD_ID,
1093 .product_id = 0x3FE8,
1cf8c97f
LPC		 1094 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1095 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
2a29a90b
JC		 1096 .default_scan_mask = 0x7FF,
1097 },
1098 [ADIS16362] = {
1099 .channels = adis16350_channels,
1100 .num_channels = ARRAY_SIZE(adis16350_channels),
1101 .flags = ADIS16400_HAS_PROD_ID,
1102 .product_id = 0x3FEA,
1cf8c97f
LPC		 1103 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1104 .accel_scale_micro = IIO_G_TO_M_S_2(333), /* 0.333 mg */
2a29a90b
JC		 1105 .default_scan_mask = 0x7FF,
1106 },
1107 [ADIS16364] = {
1108 .channels = adis16350_channels,
1109 .num_channels = ARRAY_SIZE(adis16350_channels),
1110 .flags = ADIS16400_HAS_PROD_ID,
1111 .product_id = 0x3FEC,
1cf8c97f
LPC		 1112 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1113 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
2a29a90b
JC		 1114 .default_scan_mask = 0x7FF,
1115 },
1116 [ADIS16365] = {
1117 .channels = adis16350_channels,
1118 .num_channels = ARRAY_SIZE(adis16350_channels),
1119 .flags = ADIS16400_HAS_PROD_ID,
1120 .product_id = 0x3FED,
1cf8c97f
LPC		 1121 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1122 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
2a29a90b
JC		 1123 .default_scan_mask = 0x7FF,
1124 },
1125 [ADIS16400] = {
1126 .channels = adis16400_channels,
1127 .num_channels = ARRAY_SIZE(adis16400_channels),
1128 .flags = ADIS16400_HAS_PROD_ID,
1129 .product_id = 0x4015,
1cf8c97f
LPC		 1130 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1131 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
2a29a90b
JC		 1132 .default_scan_mask = 0xFFF,
1133 }
1134};
1135
6fe8135f
JC		 1136static const struct iio_info adis16400_info = {
1137 .driver_module = THIS_MODULE,
1138 .read_raw = &adis16400_read_raw,
1139 .write_raw = &adis16400_write_raw,
1140 .attrs = &adis16400_attribute_group,
1141};
2a29a90b 1142
a9d26f00
BS		 1143static int __devinit adis16400_probe(struct spi_device *spi)
1144{
26d25ae3 1145 int ret;
38d15f06 1146 struct adis16400_state *st;
7cbb7537 1147 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
38d15f06 1148 if (indio_dev == NULL) {
a9d26f00
BS		 1149 ret = -ENOMEM;
1150 goto error_ret;
1151 }
38d15f06 1152 st = iio_priv(indio_dev);
a9d26f00 1153 /* this is only used for removal purposes */
38d15f06 1154 spi_set_drvdata(spi, indio_dev);
a9d26f00 1155
a9d26f00
BS		 1156 st->us = spi;
1157 mutex_init(&st->buf_lock);
38d15f06 1158
a9d26f00 1159 /* setup the industrialio driver allocated elements */
2a29a90b 1160 st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data];
38d15f06
JC		 1161 indio_dev->dev.parent = &spi->dev;
1162 indio_dev->name = spi_get_device_id(spi)->name;
38d15f06
JC		 1163 indio_dev->channels = st->variant->channels;
1164 indio_dev->num_channels = st->variant->num_channels;
6fe8135f 1165 indio_dev->info = &adis16400_info;
38d15f06
JC		 1166 indio_dev->modes = INDIO_DIRECT_MODE;
1167
1168 ret = adis16400_configure_ring(indio_dev);
a9d26f00
BS		 1169 if (ret)
1170 goto error_free_dev;
1171
14555b14
JC		 1172 ret = iio_buffer_register(indio_dev,
1173 st->variant->channels,
1174 st->variant->num_channels);
a9d26f00 1175 if (ret) {
6a6ec623 1176 dev_err(&spi->dev, "failed to initialize the ring\n");
a9d26f00
BS		 1177 goto error_unreg_ring_funcs;
1178 }
1179
521de518 1180 if (spi->irq) {
38d15f06 1181 ret = adis16400_probe_trigger(indio_dev);
a9d26f00 1182 if (ret)
b333a240 1183 goto error_uninitialize_ring;
a9d26f00
BS		 1184 }
1185
1186 /* Get the device into a sane initial state */
38d15f06 1187 ret = adis16400_initial_setup(indio_dev);
a9d26f00
BS		 1188 if (ret)
1189 goto error_remove_trigger;
26d25ae3
JC		 1190 ret = iio_device_register(indio_dev);
1191 if (ret)
1192 goto error_remove_trigger;
1193
a9d26f00
BS		 1194 return 0;
1195
1196error_remove_trigger:
487db485 1197 if (spi->irq)
38d15f06 1198 adis16400_remove_trigger(indio_dev);
a9d26f00 1199error_uninitialize_ring:
14555b14 1200 iio_buffer_unregister(indio_dev);
a9d26f00 1201error_unreg_ring_funcs:
38d15f06 1202 adis16400_unconfigure_ring(indio_dev);
a9d26f00 1203error_free_dev:
7cbb7537 1204 iio_device_free(indio_dev);
a9d26f00
BS		 1205error_ret:
1206 return ret;
1207}
1208
1209/* fixme, confirm ordering in this function */
8e828752 1210static int __devexit adis16400_remove(struct spi_device *spi)
a9d26f00 1211{
38d15f06 1212 struct iio_dev *indio_dev = spi_get_drvdata(spi);
a9d26f00 1213
d2fffd6c 1214 iio_device_unregister(indio_dev);
0b4ac3dc 1215 adis16400_stop_device(indio_dev);
a9d26f00 1216
a9d26f00 1217 adis16400_remove_trigger(indio_dev);
14555b14 1218 iio_buffer_unregister(indio_dev);
a9d26f00 1219 adis16400_unconfigure_ring(indio_dev);
7cbb7537 1220 iio_device_free(indio_dev);
2a29a90b 1221
a9d26f00 1222 return 0;
a9d26f00
BS		 1223}
1224
2a29a90b 1225static const struct spi_device_id adis16400_id[] = {
8e886e65 1226 {"adis16300", ADIS16300},
85da5059 1227 {"adis16334", ADIS16334},
2a29a90b
JC		 1228 {"adis16350", ADIS16350},
1229 {"adis16354", ADIS16350},
1230 {"adis16355", ADIS16350},
1231 {"adis16360", ADIS16360},
1232 {"adis16362", ADIS16362},
1233 {"adis16364", ADIS16364},
1234 {"adis16365", ADIS16365},
1235 {"adis16400", ADIS16400},
1236 {"adis16405", ADIS16400},
1237 {}
1238};
55e4390c 1239MODULE_DEVICE_TABLE(spi, adis16400_id);
2a29a90b 1240
a9d26f00
BS		 1241static struct spi_driver adis16400_driver = {
1242 .driver = {
1243 .name = "adis16400",
1244 .owner = THIS_MODULE,
1245 },
2a29a90b 1246 .id_table = adis16400_id,
a9d26f00
BS		 1247 .probe = adis16400_probe,
1248 .remove = __devexit_p(adis16400_remove),
1249};
ae6ae6fe 1250module_spi_driver(adis16400_driver);
a9d26f00
BS		 1251
1252MODULE_AUTHOR("Manuel Stahl <manuel.stahl@iis.fraunhofer.de>");
1253MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver");
1254MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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