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staging:iio:Documentation Trivial typo fixes.
[deliverable/linux.git] / drivers / staging / iio / imu / adis16400_core.c
CommitLineData
a9d26f00
BS		 1/*
2 * adis16400.c support Analog Devices ADIS16400/5
3 * 3d 2g Linear Accelerometers,
4 * 3d Gyroscopes,
5 * 3d Magnetometers via SPI
6 *
7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk>
6a6ec623 9 * Copyright (c) 2011 Analog Devices Inc.
a9d26f00
BS		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17#include <linux/interrupt.h>
18#include <linux/irq.h>
a9d26f00
BS		 19#include <linux/delay.h>
20#include <linux/mutex.h>
21#include <linux/device.h>
22#include <linux/kernel.h>
23#include <linux/spi/spi.h>
1cb6c1f5 24#include <linux/slab.h>
a9d26f00
BS		 25#include <linux/sysfs.h>
26#include <linux/list.h>
99c97852 27#include <linux/module.h>
a9d26f00
BS		 28
29#include "../iio.h"
30#include "../sysfs.h"
af5046af 31#include "../buffer.h"
a9d26f00
BS		 32#include "adis16400.h"
33
2a29a90b 34enum adis16400_chip_variant {
8e886e65 35 ADIS16300,
85da5059 36 ADIS16334,
2a29a90b
JC		 37 ADIS16350,
38 ADIS16360,
39 ADIS16362,
40 ADIS16364,
41 ADIS16365,
42 ADIS16400,
43};
44
a9d26f00
BS		 45/**
46 * adis16400_spi_write_reg_8() - write single byte to a register
47 * @dev: device associated with child of actual device (iio_dev or iio_trig)
48 * @reg_address: the address of the register to be written
49 * @val: the value to write
521de518 50 */
e7854845
JC		 51static int adis16400_spi_write_reg_8(struct iio_dev *indio_dev,
52 u8 reg_address,
53 u8 val)
a9d26f00
BS		 54{
55 int ret;
38d15f06 56 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 57
58 mutex_lock(&st->buf_lock);
59 st->tx[0] = ADIS16400_WRITE_REG(reg_address);
60 st->tx[1] = val;
61
62 ret = spi_write(st->us, st->tx, 2);
63 mutex_unlock(&st->buf_lock);
64
65 return ret;
66}
67
68/**
69 * adis16400_spi_write_reg_16() - write 2 bytes to a pair of registers
70 * @dev: device associated with child of actual device (iio_dev or iio_trig)
71 * @reg_address: the address of the lower of the two registers. Second register
72 * is assumed to have address one greater.
73 * @val: value to be written
521de518
JC		 74 *
75 * At the moment the spi framework doesn't allow global setting of cs_change.
76 * This means that use cannot be made of spi_write.
77 */
e7854845 78static int adis16400_spi_write_reg_16(struct iio_dev *indio_dev,
a9d26f00
BS		 79 u8 lower_reg_address,
80 u16 value)
81{
82 int ret;
83 struct spi_message msg;
38d15f06 84 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 85 struct spi_transfer xfers[] = {
86 {
87 .tx_buf = st->tx,
88 .bits_per_word = 8,
89 .len = 2,
90 .cs_change = 1,
91 }, {
92 .tx_buf = st->tx + 2,
93 .bits_per_word = 8,
94 .len = 2,
a9d26f00
BS		 95 },
96 };
97
98 mutex_lock(&st->buf_lock);
99 st->tx[0] = ADIS16400_WRITE_REG(lower_reg_address);
100 st->tx[1] = value & 0xFF;
101 st->tx[2] = ADIS16400_WRITE_REG(lower_reg_address + 1);
102 st->tx[3] = (value >> 8) & 0xFF;
103
104 spi_message_init(&msg);
105 spi_message_add_tail(&xfers[0], &msg);
106 spi_message_add_tail(&xfers[1], &msg);
107 ret = spi_sync(st->us, &msg);
108 mutex_unlock(&st->buf_lock);
109
110 return ret;
111}
112
113/**
114 * adis16400_spi_read_reg_16() - read 2 bytes from a 16-bit register
e7854845 115 * @indio_dev: iio device
a9d26f00
BS		 116 * @reg_address: the address of the lower of the two registers. Second register
117 * is assumed to have address one greater.
118 * @val: somewhere to pass back the value read
521de518
JC		 119 *
120 * At the moment the spi framework doesn't allow global setting of cs_change.
121 * This means that use cannot be made of spi_read.
a9d26f00 122 **/
e7854845 123static int adis16400_spi_read_reg_16(struct iio_dev *indio_dev,
a9d26f00
BS		 124 u8 lower_reg_address,
125 u16 *val)
126{
127 struct spi_message msg;
38d15f06 128 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 129 int ret;
130 struct spi_transfer xfers[] = {
131 {
132 .tx_buf = st->tx,
133 .bits_per_word = 8,
134 .len = 2,
135 .cs_change = 1,
136 }, {
137 .rx_buf = st->rx,
138 .bits_per_word = 8,
139 .len = 2,
a9d26f00
BS		 140 },
141 };
142
143 mutex_lock(&st->buf_lock);
144 st->tx[0] = ADIS16400_READ_REG(lower_reg_address);
145 st->tx[1] = 0;
a9d26f00
BS		 146
147 spi_message_init(&msg);
148 spi_message_add_tail(&xfers[0], &msg);
149 spi_message_add_tail(&xfers[1], &msg);
150 ret = spi_sync(st->us, &msg);
151 if (ret) {
152 dev_err(&st->us->dev,
153 "problem when reading 16 bit register 0x%02X",
154 lower_reg_address);
155 goto error_ret;
156 }
157 *val = (st->rx[0] << 8) | st->rx[1];
158
159error_ret:
160 mutex_unlock(&st->buf_lock);
161 return ret;
162}
163
98c9373d
JC		 164static int adis16400_get_freq(struct iio_dev *indio_dev)
165{
166 u16 t;
167 int sps, ret;
168
169 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t);
170 if (ret < 0)
171 return ret;
172 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638;
173 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
174
175 return sps;
176}
177
a9d26f00
BS		 178static ssize_t adis16400_read_frequency(struct device *dev,
179 struct device_attribute *attr,
180 char *buf)
181{
e7854845 182 struct iio_dev *indio_dev = dev_get_drvdata(dev);
a9d26f00 183 int ret, len = 0;
98c9373d
JC		 184 ret = adis16400_get_freq(indio_dev);
185 if (ret < 0)
a9d26f00 186 return ret;
98c9373d 187 len = sprintf(buf, "%d SPS\n", ret);
a9d26f00
BS		 188 return len;
189}
190
98c9373d
JC		 191static const unsigned adis16400_3db_divisors[] = {
192 [0] = 2, /* Special case */
193 [1] = 5,
194 [2] = 10,
195 [3] = 50,
196 [4] = 200,
197};
198
199static int adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val)
200{
201 int i, ret;
202 u16 val16;
203 for (i = ARRAY_SIZE(adis16400_3db_divisors) - 1; i >= 0; i--)
204 if (sps/adis16400_3db_divisors[i] > val)
205 break;
206 if (i == -1)
207 ret = -EINVAL;
208 else {
209 ret = adis16400_spi_read_reg_16(indio_dev,
210 ADIS16400_SENS_AVG,
211 &val16);
212 if (ret < 0)
213 goto error_ret;
214
215 ret = adis16400_spi_write_reg_16(indio_dev,
216 ADIS16400_SENS_AVG,
217 (val16 & ~0x03) | i);
218 }
219error_ret:
220 return ret;
221}
222
a9d26f00
BS		 223static ssize_t adis16400_write_frequency(struct device *dev,
224 struct device_attribute *attr,
225 const char *buf,
226 size_t len)
227{
228 struct iio_dev *indio_dev = dev_get_drvdata(dev);
38d15f06 229 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 230 long val;
231 int ret;
232 u8 t;
233
234 ret = strict_strtol(buf, 10, &val);
235 if (ret)
236 return ret;
237
238 mutex_lock(&indio_dev->mlock);
239
240 t = (1638 / val);
241 if (t > 0)
242 t--;
243 t &= ADIS16400_SMPL_PRD_DIV_MASK;
244 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
245 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
246 else
247 st->us->max_speed_hz = ADIS16400_SPI_FAST;
248
e7854845 249 ret = adis16400_spi_write_reg_8(indio_dev,
a9d26f00
BS		 250 ADIS16400_SMPL_PRD,
251 t);
252
98c9373d 253 /* Also update the filter */
a9d26f00
BS		 254 mutex_unlock(&indio_dev->mlock);
255
256 return ret ? ret : len;
257}
258
e7854845 259static int adis16400_reset(struct iio_dev *indio_dev)
3fd66da1
BS		 260{
261 int ret;
e7854845 262 ret = adis16400_spi_write_reg_8(indio_dev,
3fd66da1
BS		 263 ADIS16400_GLOB_CMD,
264 ADIS16400_GLOB_CMD_SW_RESET);
265 if (ret)
e7854845 266 dev_err(&indio_dev->dev, "problem resetting device");
3fd66da1
BS		 267
268 return ret;
269}
270
a9d26f00
BS		 271static ssize_t adis16400_write_reset(struct device *dev,
272 struct device_attribute *attr,
273 const char *buf, size_t len)
274{
7a6ff010
JC		 275 bool val;
276 int ret;
e7854845 277
7a6ff010
JC		 278 ret = strtobool(buf, &val);
279 if (ret < 0)
280 return ret;
521de518 281 if (val) {
7a6ff010 282 ret = adis16400_reset(dev_get_drvdata(dev));
521de518
JC		 283 if (ret < 0)
284 return ret;
285 }
7a6ff010
JC		 286
287 return len;
a9d26f00
BS		 288}
289
e7854845 290int adis16400_set_irq(struct iio_dev *indio_dev, bool enable)
a9d26f00
BS		 291{
292 int ret;
293 u16 msc;
521de518 294
e7854845 295 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_MSC_CTRL, &msc);
a9d26f00
BS		 296 if (ret)
297 goto error_ret;
298
299 msc |= ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH;
300 if (enable)
301 msc |= ADIS16400_MSC_CTRL_DATA_RDY_EN;
302 else
303 msc &= ~ADIS16400_MSC_CTRL_DATA_RDY_EN;
304
e7854845 305 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_MSC_CTRL, msc);
a9d26f00
BS		 306 if (ret)
307 goto error_ret;
308
309error_ret:
310 return ret;
311}
312
a9d26f00 313/* Power down the device */
e7854845 314static int adis16400_stop_device(struct iio_dev *indio_dev)
a9d26f00
BS		 315{
316 int ret;
317 u16 val = ADIS16400_SLP_CNT_POWER_OFF;
318
e7854845 319 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_SLP_CNT, val);
a9d26f00 320 if (ret)
e7854845
JC		 321 dev_err(&indio_dev->dev,
322 "problem with turning device off: SLP_CNT");
a9d26f00
BS		 323
324 return ret;
325}
326
e7854845 327static int adis16400_check_status(struct iio_dev *indio_dev)
a9d26f00
BS		 328{
329 u16 status;
330 int ret;
e7854845 331 struct device *dev = &indio_dev->dev;
a9d26f00 332
e7854845
JC		 333 ret = adis16400_spi_read_reg_16(indio_dev,
334 ADIS16400_DIAG_STAT, &status);
a9d26f00
BS		 335
336 if (ret < 0) {
337 dev_err(dev, "Reading status failed\n");
338 goto error_ret;
339 }
340 ret = status;
341 if (status & ADIS16400_DIAG_STAT_ZACCL_FAIL)
342 dev_err(dev, "Z-axis accelerometer self-test failure\n");
343 if (status & ADIS16400_DIAG_STAT_YACCL_FAIL)
344 dev_err(dev, "Y-axis accelerometer self-test failure\n");
345 if (status & ADIS16400_DIAG_STAT_XACCL_FAIL)
346 dev_err(dev, "X-axis accelerometer self-test failure\n");
347 if (status & ADIS16400_DIAG_STAT_XGYRO_FAIL)
348 dev_err(dev, "X-axis gyroscope self-test failure\n");
349 if (status & ADIS16400_DIAG_STAT_YGYRO_FAIL)
350 dev_err(dev, "Y-axis gyroscope self-test failure\n");
351 if (status & ADIS16400_DIAG_STAT_ZGYRO_FAIL)
352 dev_err(dev, "Z-axis gyroscope self-test failure\n");
353 if (status & ADIS16400_DIAG_STAT_ALARM2)
354 dev_err(dev, "Alarm 2 active\n");
355 if (status & ADIS16400_DIAG_STAT_ALARM1)
356 dev_err(dev, "Alarm 1 active\n");
357 if (status & ADIS16400_DIAG_STAT_FLASH_CHK)
358 dev_err(dev, "Flash checksum error\n");
359 if (status & ADIS16400_DIAG_STAT_SELF_TEST)
360 dev_err(dev, "Self test error\n");
361 if (status & ADIS16400_DIAG_STAT_OVERFLOW)
362 dev_err(dev, "Sensor overrange\n");
363 if (status & ADIS16400_DIAG_STAT_SPI_FAIL)
364 dev_err(dev, "SPI failure\n");
365 if (status & ADIS16400_DIAG_STAT_FLASH_UPT)
366 dev_err(dev, "Flash update failed\n");
367 if (status & ADIS16400_DIAG_STAT_POWER_HIGH)
368 dev_err(dev, "Power supply above 5.25V\n");
369 if (status & ADIS16400_DIAG_STAT_POWER_LOW)
370 dev_err(dev, "Power supply below 4.75V\n");
371
372error_ret:
373 return ret;
374}
375
521de518
JC		 376static int adis16400_self_test(struct iio_dev *indio_dev)
377{
378 int ret;
379 ret = adis16400_spi_write_reg_16(indio_dev,
380 ADIS16400_MSC_CTRL,
381 ADIS16400_MSC_CTRL_MEM_TEST);
382 if (ret) {
383 dev_err(&indio_dev->dev, "problem starting self test");
384 goto err_ret;
385 }
386
387 msleep(ADIS16400_MTEST_DELAY);
388 adis16400_check_status(indio_dev);
389
390err_ret:
391 return ret;
392}
393
38d15f06 394static int adis16400_initial_setup(struct iio_dev *indio_dev)
a9d26f00
BS		 395{
396 int ret;
397 u16 prod_id, smp_prd;
38d15f06 398 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 399
400 /* use low spi speed for init */
401 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
402 st->us->mode = SPI_MODE_3;
403 spi_setup(st->us);
404
38d15f06 405 ret = adis16400_set_irq(indio_dev, false);
a9d26f00 406 if (ret) {
521de518 407 dev_err(&indio_dev->dev, "disable irq failed");
a9d26f00
BS		 408 goto err_ret;
409 }
410
38d15f06 411 ret = adis16400_self_test(indio_dev);
3fd66da1 412 if (ret) {
521de518 413 dev_err(&indio_dev->dev, "self test failure");
3fd66da1
BS		 414 goto err_ret;
415 }
a9d26f00 416
38d15f06 417 ret = adis16400_check_status(indio_dev);
a9d26f00 418 if (ret) {
38d15f06 419 adis16400_reset(indio_dev);
521de518 420 dev_err(&indio_dev->dev, "device not playing ball -> reset");
a9d26f00 421 msleep(ADIS16400_STARTUP_DELAY);
38d15f06 422 ret = adis16400_check_status(indio_dev);
a9d26f00 423 if (ret) {
521de518 424 dev_err(&indio_dev->dev, "giving up");
a9d26f00
BS		 425 goto err_ret;
426 }
427 }
2a29a90b 428 if (st->variant->flags & ADIS16400_HAS_PROD_ID) {
38d15f06 429 ret = adis16400_spi_read_reg_16(indio_dev,
2a29a90b
JC		 430 ADIS16400_PRODUCT_ID, &prod_id);
431 if (ret)
432 goto err_ret;
a9d26f00 433
2a29a90b 434 if ((prod_id & 0xF000) != st->variant->product_id)
521de518 435 dev_warn(&indio_dev->dev, "incorrect id");
a9d26f00 436
69d80bae 437 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n",
521de518
JC		 438 indio_dev->name, prod_id,
439 st->us->chip_select, st->us->irq);
2a29a90b 440 }
a9d26f00 441 /* use high spi speed if possible */
38d15f06 442 ret = adis16400_spi_read_reg_16(indio_dev,
e7854845 443 ADIS16400_SMPL_PRD, &smp_prd);
a9d26f00
BS		 444 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
445 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
446 spi_setup(st->us);
447 }
448
a9d26f00 449err_ret:
a9d26f00
BS		 450 return ret;
451}
452
a9d26f00 453static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
521de518
JC		 454 adis16400_read_frequency,
455 adis16400_write_frequency);
a9d26f00
BS		 456
457static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16400_write_reset, 0);
458
51a0a5b0 459static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("409 546 819 1638");
a9d26f00 460
e7854845
JC		 461enum adis16400_chan {
462 in_supply,
463 gyro_x,
464 gyro_y,
465 gyro_z,
466 accel_x,
467 accel_y,
468 accel_z,
469 magn_x,
470 magn_y,
471 magn_z,
472 temp,
2a29a90b 473 temp0, temp1, temp2,
91ab3fc9
JC		 474 in1,
475 incli_x,
476 incli_y,
e7854845
JC		 477};
478
91ab3fc9 479static u8 adis16400_addresses[17][2] = {
521de518 480 [in_supply] = { ADIS16400_SUPPLY_OUT },
e7854845
JC		 481 [gyro_x] = { ADIS16400_XGYRO_OUT, ADIS16400_XGYRO_OFF },
482 [gyro_y] = { ADIS16400_YGYRO_OUT, ADIS16400_YGYRO_OFF },
483 [gyro_z] = { ADIS16400_ZGYRO_OUT, ADIS16400_ZGYRO_OFF },
484 [accel_x] = { ADIS16400_XACCL_OUT, ADIS16400_XACCL_OFF },
485 [accel_y] = { ADIS16400_YACCL_OUT, ADIS16400_YACCL_OFF },
486 [accel_z] = { ADIS16400_ZACCL_OUT, ADIS16400_ZACCL_OFF },
521de518
JC		 487 [magn_x] = { ADIS16400_XMAGN_OUT },
488 [magn_y] = { ADIS16400_YMAGN_OUT },
489 [magn_z] = { ADIS16400_ZMAGN_OUT },
490 [temp] = { ADIS16400_TEMP_OUT },
2a29a90b
JC		 491 [temp0] = { ADIS16350_XTEMP_OUT },
492 [temp1] = { ADIS16350_YTEMP_OUT },
493 [temp2] = { ADIS16350_ZTEMP_OUT },
521de518
JC		 494 [in1] = { ADIS16400_AUX_ADC },
495 [incli_x] = { ADIS16300_PITCH_OUT },
496 [incli_y] = { ADIS16300_ROLL_OUT }
e7854845
JC		 497};
498
98c9373d 499
e7854845
JC		 500static int adis16400_write_raw(struct iio_dev *indio_dev,
501 struct iio_chan_spec const *chan,
502 int val,
503 int val2,
504 long mask)
505{
98c9373d
JC		 506 struct adis16400_state *st = iio_priv(indio_dev);
507 int ret, sps;
521de518 508
e7854845 509 switch (mask) {
c8a9f805 510 case IIO_CHAN_INFO_CALIBBIAS:
e7854845
JC		 511 mutex_lock(&indio_dev->mlock);
512 ret = adis16400_spi_write_reg_16(indio_dev,
513 adis16400_addresses[chan->address][1],
514 val);
515 mutex_unlock(&indio_dev->mlock);
516 return ret;
98c9373d
JC		 517 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
518 /* Need to cache values so we can update if the frequency
519 changes */
520 mutex_lock(&indio_dev->mlock);
521 st->filt_int = val;
522 /* Work out update to current value */
523 sps = adis16400_get_freq(indio_dev);
524 if (sps < 0) {
525 mutex_unlock(&indio_dev->mlock);
526 return sps;
527 }
528
529 ret = adis16400_set_filter(indio_dev, sps, val);
530 mutex_unlock(&indio_dev->mlock);
531 return ret;
e7854845
JC		 532 default:
533 return -EINVAL;
534 }
535}
536
537static int adis16400_read_raw(struct iio_dev *indio_dev,
538 struct iio_chan_spec const *chan,
539 int *val,
540 int *val2,
541 long mask)
542{
38d15f06 543 struct adis16400_state *st = iio_priv(indio_dev);
521de518 544 int ret, shift;
e7854845 545 s16 val16;
e7854845
JC		 546
547 switch (mask) {
a5d016d4 548 case IIO_CHAN_INFO_RAW:
e7854845
JC		 549 mutex_lock(&indio_dev->mlock);
550 ret = adis16400_spi_read_reg_16(indio_dev,
551 adis16400_addresses[chan->address][0],
552 &val16);
553 if (ret) {
554 mutex_unlock(&indio_dev->mlock);
555 return ret;
556 }
557 val16 &= (1 << chan->scan_type.realbits) - 1;
558 if (chan->scan_type.sign == 's') {
559 shift = 16 - chan->scan_type.realbits;
560 val16 = (s16)(val16 << shift) >> shift;
561 }
562 *val = val16;
563 mutex_unlock(&indio_dev->mlock);
564 return IIO_VAL_INT;
c8a9f805 565 case IIO_CHAN_INFO_SCALE:
e7854845 566 switch (chan->type) {
41ea040c 567 case IIO_ANGL_VEL:
e7854845 568 *val = 0;
2a29a90b 569 *val2 = st->variant->gyro_scale_micro;
e7854845 570 return IIO_VAL_INT_PLUS_MICRO;
6835cb6b 571 case IIO_VOLTAGE:
e7854845
JC		 572 *val = 0;
573 if (chan->channel == 0)
574 *val2 = 2418;
575 else
576 *val2 = 806;
577 return IIO_VAL_INT_PLUS_MICRO;
578 case IIO_ACCEL:
579 *val = 0;
2a29a90b 580 *val2 = st->variant->accel_scale_micro;
e7854845
JC		 581 return IIO_VAL_INT_PLUS_MICRO;
582 case IIO_MAGN:
583 *val = 0;
584 *val2 = 500;
585 return IIO_VAL_INT_PLUS_MICRO;
586 case IIO_TEMP:
587 *val = 0;
588 *val2 = 140000;
589 return IIO_VAL_INT_PLUS_MICRO;
590 default:
591 return -EINVAL;
592 }
c8a9f805 593 case IIO_CHAN_INFO_CALIBBIAS:
e7854845
JC		 594 mutex_lock(&indio_dev->mlock);
595 ret = adis16400_spi_read_reg_16(indio_dev,
596 adis16400_addresses[chan->address][1],
597 &val16);
2a29a90b
JC		 598 mutex_unlock(&indio_dev->mlock);
599 if (ret)
e7854845 600 return ret;
e7854845
JC		 601 val16 = ((val16 & 0xFFF) << 4) >> 4;
602 *val = val16;
603 return IIO_VAL_INT;
c8a9f805 604 case IIO_CHAN_INFO_OFFSET:
e7854845
JC		 605 /* currently only temperature */
606 *val = 198;
607 *val2 = 160000;
608 return IIO_VAL_INT_PLUS_MICRO;
98c9373d
JC		 609 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
610 mutex_lock(&indio_dev->mlock);
611 /* Need both the number of taps and the sampling frequency */
612 ret = adis16400_spi_read_reg_16(indio_dev,
613 ADIS16400_SENS_AVG,
614 &val16);
615 if (ret < 0) {
616 mutex_unlock(&indio_dev->mlock);
617 return ret;
618 }
619 ret = adis16400_get_freq(indio_dev);
620 if (ret > 0)
621 *val = ret/adis16400_3db_divisors[val16 & 0x03];
622 *val2 = 0;
623 mutex_unlock(&indio_dev->mlock);
624 if (ret < 0)
625 return ret;
626 return IIO_VAL_INT_PLUS_MICRO;
e7854845
JC		 627 default:
628 return -EINVAL;
629 }
630}
631
632static struct iio_chan_spec adis16400_channels[] = {
521de518
JC		 633 {
634 .type = IIO_VOLTAGE,
635 .indexed = 1,
636 .channel = 0,
637 .extend_name = "supply",
a5d016d4
JC		 638 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
639 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 640 .address = in_supply,
641 .scan_index = ADIS16400_SCAN_SUPPLY,
642 .scan_type = IIO_ST('u', 14, 16, 0)
643 }, {
41ea040c 644 .type = IIO_ANGL_VEL,
521de518
JC		 645 .modified = 1,
646 .channel2 = IIO_MOD_X,
a5d016d4
JC		 647 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
648 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 649 IIO_CHAN_INFO_SCALE_SHARED_BIT |
650 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 651 .address = gyro_x,
652 .scan_index = ADIS16400_SCAN_GYRO_X,
653 .scan_type = IIO_ST('s', 14, 16, 0)
654 }, {
41ea040c 655 .type = IIO_ANGL_VEL,
521de518
JC		 656 .modified = 1,
657 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 658 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
659 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 660 IIO_CHAN_INFO_SCALE_SHARED_BIT |
661 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 662 .address = gyro_y,
663 .scan_index = ADIS16400_SCAN_GYRO_Y,
664 .scan_type = IIO_ST('s', 14, 16, 0),
665 }, {
41ea040c 666 .type = IIO_ANGL_VEL,
521de518
JC		 667 .modified = 1,
668 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 669 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
670 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 671 IIO_CHAN_INFO_SCALE_SHARED_BIT |
672 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 673 .address = gyro_z,
674 .scan_index = ADIS16400_SCAN_GYRO_Z,
675 .scan_type = IIO_ST('s', 14, 16, 0),
676 }, {
677 .type = IIO_ACCEL,
678 .modified = 1,
679 .channel2 = IIO_MOD_X,
a5d016d4
JC		 680 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
681 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 682 IIO_CHAN_INFO_SCALE_SHARED_BIT |
683 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 684 .address = accel_x,
685 .scan_index = ADIS16400_SCAN_ACC_X,
686 .scan_type = IIO_ST('s', 14, 16, 0),
687 }, {
688 .type = IIO_ACCEL,
689 .modified = 1,
690 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 691 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
692 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 693 IIO_CHAN_INFO_SCALE_SHARED_BIT |
694 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 695 .address = accel_y,
696 .scan_index = ADIS16400_SCAN_ACC_Y,
697 .scan_type = IIO_ST('s', 14, 16, 0),
698 }, {
699 .type = IIO_ACCEL,
700 .modified = 1,
701 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 702 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
703 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 704 IIO_CHAN_INFO_SCALE_SHARED_BIT |
705 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 706 .address = accel_z,
707 .scan_index = ADIS16400_SCAN_ACC_Z,
708 .scan_type = IIO_ST('s', 14, 16, 0),
709 }, {
710 .type = IIO_MAGN,
711 .modified = 1,
712 .channel2 = IIO_MOD_X,
a5d016d4
JC		 713 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
714 IIO_CHAN_INFO_SCALE_SHARED_BIT |
98c9373d 715 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 716 .address = magn_x,
717 .scan_index = ADIS16400_SCAN_MAGN_X,
718 .scan_type = IIO_ST('s', 14, 16, 0),
719 }, {
720 .type = IIO_MAGN,
721 .modified = 1,
722 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 723 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
724 IIO_CHAN_INFO_SCALE_SHARED_BIT |
98c9373d 725 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 726 .address = magn_y,
727 .scan_index = ADIS16400_SCAN_MAGN_Y,
728 .scan_type = IIO_ST('s', 14, 16, 0),
729 }, {
730 .type = IIO_MAGN,
731 .modified = 1,
732 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 733 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
734 IIO_CHAN_INFO_SCALE_SHARED_BIT |
98c9373d 735 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 736 .address = magn_z,
737 .scan_index = ADIS16400_SCAN_MAGN_Z,
738 .scan_type = IIO_ST('s', 14, 16, 0),
739 }, {
740 .type = IIO_TEMP,
741 .indexed = 1,
742 .channel = 0,
a5d016d4
JC		 743 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
744 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
c8a9f805 745 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 746 .address = temp,
747 .scan_index = ADIS16400_SCAN_TEMP,
748 .scan_type = IIO_ST('s', 12, 16, 0),
749 }, {
6835cb6b 750 .type = IIO_VOLTAGE,
521de518
JC		 751 .indexed = 1,
752 .channel = 1,
a5d016d4
JC		 753 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
754 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 755 .address = in1,
756 .scan_index = ADIS16400_SCAN_ADC_0,
757 .scan_type = IIO_ST('s', 12, 16, 0),
758 },
e7854845
JC		 759 IIO_CHAN_SOFT_TIMESTAMP(12)
760};
761
2a29a90b 762static struct iio_chan_spec adis16350_channels[] = {
521de518
JC		 763 {
764 .type = IIO_VOLTAGE,
765 .indexed = 1,
766 .channel = 0,
767 .extend_name = "supply",
a5d016d4
JC		 768 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
769 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 770 .address = in_supply,
771 .scan_index = ADIS16400_SCAN_SUPPLY,
772 .scan_type = IIO_ST('u', 12, 16, 0)
773 }, {
41ea040c 774 .type = IIO_ANGL_VEL,
521de518
JC		 775 .modified = 1,
776 .channel2 = IIO_MOD_X,
a5d016d4
JC		 777 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
778 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 779 IIO_CHAN_INFO_SCALE_SHARED_BIT |
780 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 781 .address = gyro_x,
782 .scan_index = ADIS16400_SCAN_GYRO_X,
783 .scan_type = IIO_ST('s', 14, 16, 0)
784 }, {
41ea040c 785 .type = IIO_ANGL_VEL,
521de518
JC		 786 .modified = 1,
787 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 788 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
789 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 790 IIO_CHAN_INFO_SCALE_SHARED_BIT |
791 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 792 .address = gyro_y,
793 .scan_index = ADIS16400_SCAN_GYRO_Y,
794 .scan_type = IIO_ST('s', 14, 16, 0),
795 }, {
41ea040c 796 .type = IIO_ANGL_VEL,
521de518
JC		 797 .modified = 1,
798 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 799 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
800 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 801 IIO_CHAN_INFO_SCALE_SHARED_BIT |
802 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 803 .address = gyro_z,
804 .scan_index = ADIS16400_SCAN_GYRO_Z,
805 .scan_type = IIO_ST('s', 14, 16, 0),
806 }, {
a5d016d4 807 .type = IIO_ACCEL,
521de518
JC		 808 .modified = 1,
809 .channel2 = IIO_MOD_X,
a5d016d4
JC		 810 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
811 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 812 IIO_CHAN_INFO_SCALE_SHARED_BIT |
813 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 814 .address = accel_x,
815 .scan_index = ADIS16400_SCAN_ACC_X,
816 .scan_type = IIO_ST('s', 14, 16, 0),
817 }, {
818 .type = IIO_ACCEL,
819 .modified = 1,
820 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 821 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
822 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 823 IIO_CHAN_INFO_SCALE_SHARED_BIT |
824 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 825 .address = accel_y,
826 .scan_index = ADIS16400_SCAN_ACC_Y,
827 .scan_type = IIO_ST('s', 14, 16, 0),
828 }, {
829 .type = IIO_ACCEL,
830 .modified = 1,
831 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 832 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
833 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 834 IIO_CHAN_INFO_SCALE_SHARED_BIT |
835 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 836 .address = accel_z,
837 .scan_index = ADIS16400_SCAN_ACC_Z,
838 .scan_type = IIO_ST('s', 14, 16, 0),
839 }, {
840 .type = IIO_TEMP,
841 .indexed = 1,
842 .channel = 0,
843 .extend_name = "x",
a5d016d4
JC		 844 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
845 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
98c9373d
JC		 846 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
847 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 848 .address = temp0,
849 .scan_index = ADIS16350_SCAN_TEMP_X,
850 .scan_type = IIO_ST('s', 12, 16, 0),
851 }, {
852 .type = IIO_TEMP,
853 .indexed = 1,
854 .channel = 1,
855 .extend_name = "y",
a5d016d4
JC		 856 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
857 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
98c9373d
JC		 858 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
859 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 860 .address = temp1,
861 .scan_index = ADIS16350_SCAN_TEMP_Y,
862 .scan_type = IIO_ST('s', 12, 16, 0),
863 }, {
864 .type = IIO_TEMP,
865 .indexed = 1,
866 .channel = 2,
867 .extend_name = "z",
a5d016d4
JC		 868 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
869 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
c8a9f805 870 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 871 .address = temp2,
872 .scan_index = ADIS16350_SCAN_TEMP_Z,
873 .scan_type = IIO_ST('s', 12, 16, 0),
874 }, {
6835cb6b 875 .type = IIO_VOLTAGE,
521de518
JC		 876 .indexed = 1,
877 .channel = 1,
a5d016d4
JC		 878 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
879 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 880 .address = in1,
881 .scan_index = ADIS16350_SCAN_ADC_0,
882 .scan_type = IIO_ST('s', 12, 16, 0),
883 },
2a29a90b
JC		 884 IIO_CHAN_SOFT_TIMESTAMP(11)
885};
886
8e886e65 887static struct iio_chan_spec adis16300_channels[] = {
521de518
JC		 888 {
889 .type = IIO_VOLTAGE,
890 .indexed = 1,
891 .channel = 0,
892 .extend_name = "supply",
a5d016d4
JC		 893 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
894 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 895 .address = in_supply,
896 .scan_index = ADIS16400_SCAN_SUPPLY,
897 .scan_type = IIO_ST('u', 12, 16, 0)
898 }, {
41ea040c 899 .type = IIO_ANGL_VEL,
521de518
JC		 900 .modified = 1,
901 .channel2 = IIO_MOD_X,
a5d016d4
JC		 902 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
903 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 904 IIO_CHAN_INFO_SCALE_SHARED_BIT |
905 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 906 .address = gyro_x,
907 .scan_index = ADIS16400_SCAN_GYRO_X,
908 .scan_type = IIO_ST('s', 14, 16, 0),
909 }, {
910 .type = IIO_ACCEL,
911 .modified = 1,
912 .channel2 = IIO_MOD_X,
a5d016d4
JC		 913 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
914 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 915 IIO_CHAN_INFO_SCALE_SHARED_BIT |
916 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 917 .address = accel_x,
918 .scan_index = ADIS16400_SCAN_ACC_X,
919 .scan_type = IIO_ST('s', 14, 16, 0),
920 }, {
921 .type = IIO_ACCEL,
922 .modified = 1,
923 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 924 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
925 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 926 IIO_CHAN_INFO_SCALE_SHARED_BIT |
927 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 928 .address = accel_y,
929 .scan_index = ADIS16400_SCAN_ACC_Y,
930 .scan_type = IIO_ST('s', 14, 16, 0),
931 }, {
932 .type = IIO_ACCEL,
933 .modified = 1,
934 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 935 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
936 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 937 IIO_CHAN_INFO_SCALE_SHARED_BIT |
938 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 939 .address = accel_z,
940 .scan_index = ADIS16400_SCAN_ACC_Z,
941 .scan_type = IIO_ST('s', 14, 16, 0),
942 }, {
943 .type = IIO_TEMP,
944 .indexed = 1,
945 .channel = 0,
a5d016d4
JC		 946 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
947 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
c8a9f805 948 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 949 .address = temp,
950 .scan_index = ADIS16400_SCAN_TEMP,
951 .scan_type = IIO_ST('s', 12, 16, 0),
952 }, {
6835cb6b 953 .type = IIO_VOLTAGE,
521de518
JC		 954 .indexed = 1,
955 .channel = 1,
a5d016d4
JC		 956 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
957 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 958 .address = in1,
959 .scan_index = ADIS16350_SCAN_ADC_0,
960 .scan_type = IIO_ST('s', 12, 16, 0),
961 }, {
962 .type = IIO_INCLI,
963 .modified = 1,
964 .channel2 = IIO_MOD_X,
a5d016d4
JC		 965 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
966 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 967 .address = incli_x,
968 .scan_index = ADIS16300_SCAN_INCLI_X,
969 .scan_type = IIO_ST('s', 13, 16, 0),
970 }, {
971 .type = IIO_INCLI,
972 .modified = 1,
973 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 974 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
975 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 976 .address = incli_y,
977 .scan_index = ADIS16300_SCAN_INCLI_Y,
978 .scan_type = IIO_ST('s', 13, 16, 0),
979 },
8e886e65
JC		 980 IIO_CHAN_SOFT_TIMESTAMP(14)
981};
982
85da5059 983static const struct iio_chan_spec adis16334_channels[] = {
521de518 984 {
41ea040c 985 .type = IIO_ANGL_VEL,
521de518
JC		 986 .modified = 1,
987 .channel2 = IIO_MOD_X,
a5d016d4
JC		 988 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
989 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 990 IIO_CHAN_INFO_SCALE_SHARED_BIT |
991 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 992 .address = gyro_x,
993 .scan_index = ADIS16400_SCAN_GYRO_X,
994 .scan_type = IIO_ST('s', 14, 16, 0),
995 }, {
41ea040c 996 .type = IIO_ANGL_VEL,
521de518
JC		 997 .modified = 1,
998 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 999 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1000 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1001 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1002 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1003 .address = gyro_y,
1004 .scan_index = ADIS16400_SCAN_GYRO_Y,
1005 .scan_type = IIO_ST('s', 14, 16, 0),
1006 }, {
41ea040c 1007 .type = IIO_ANGL_VEL,
521de518
JC		 1008 .modified = 1,
1009 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 1010 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1011 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1012 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1013 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1014 .address = gyro_z,
1015 .scan_index = ADIS16400_SCAN_GYRO_Z,
1016 .scan_type = IIO_ST('s', 14, 16, 0),
1017 }, {
1018 .type = IIO_ACCEL,
1019 .modified = 1,
1020 .channel2 = IIO_MOD_X,
a5d016d4
JC		 1021 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1022 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1023 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1024 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1025 .address = accel_x,
1026 .scan_index = ADIS16400_SCAN_ACC_X,
1027 .scan_type = IIO_ST('s', 14, 16, 0),
1028 }, {
1029 .type = IIO_ACCEL,
1030 .modified = 1,
1031 .channel2 = IIO_MOD_Y,
a5d016d4
JC		 1032 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1033 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1034 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1035 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1036 .address = accel_y,
1037 .scan_index = ADIS16400_SCAN_ACC_Y,
1038 .scan_type = IIO_ST('s', 14, 16, 0),
1039 }, {
1040 .type = IIO_ACCEL,
1041 .modified = 1,
1042 .channel2 = IIO_MOD_Z,
a5d016d4
JC		 1043 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1044 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
98c9373d
JC		 1045 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1046 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
521de518
JC		 1047 .address = accel_z,
1048 .scan_index = ADIS16400_SCAN_ACC_Z,
1049 .scan_type = IIO_ST('s', 14, 16, 0),
1050 }, {
1051 .type = IIO_TEMP,
1052 .indexed = 1,
1053 .channel = 0,
a5d016d4
JC		 1054 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1055 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
c8a9f805 1056 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 1057 .address = accel_z,
1058 .scan_index = ADIS16400_SCAN_ACC_Z,
1059 .scan_type = IIO_ST('s', 14, 16, 0),
1060 },
88b42f3a
JC		 1061 IIO_CHAN_SOFT_TIMESTAMP(12)
1062};
1063
a9d26f00 1064static struct attribute *adis16400_attributes[] = {
a9d26f00 1065 &iio_dev_attr_sampling_frequency.dev_attr.attr,
51a0a5b0 1066 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
a9d26f00 1067 &iio_dev_attr_reset.dev_attr.attr,
a9d26f00
BS		 1068 NULL
1069};
1070
1071static const struct attribute_group adis16400_attribute_group = {
1072 .attrs = adis16400_attributes,
1073};
1074
2a29a90b 1075static struct adis16400_chip_info adis16400_chips[] = {
8e886e65
JC		 1076 [ADIS16300] = {
1077 .channels = adis16300_channels,
1078 .num_channels = ARRAY_SIZE(adis16300_channels),
1079 .gyro_scale_micro = 873,
1080 .accel_scale_micro = 5884,
1081 .default_scan_mask = (1 << ADIS16400_SCAN_SUPPLY) |
1082 (1 << ADIS16400_SCAN_GYRO_X) | (1 << ADIS16400_SCAN_ACC_X) |
1083 (1 << ADIS16400_SCAN_ACC_Y) | (1 << ADIS16400_SCAN_ACC_Z) |
1084 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) |
1085 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) |
1086 (1 << 14),
1087 },
85da5059
JC		 1088 [ADIS16334] = {
1089 .channels = adis16334_channels,
1090 .num_channels = ARRAY_SIZE(adis16334_channels),
88b42f3a
JC		 1091 .gyro_scale_micro = 873,
1092 .accel_scale_micro = 981,
1093 .default_scan_mask = (1 << ADIS16400_SCAN_GYRO_X) |
1094 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) |
1095 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) |
1096 (1 << ADIS16400_SCAN_ACC_Z),
1097 },
2a29a90b
JC		 1098 [ADIS16350] = {
1099 .channels = adis16350_channels,
1100 .num_channels = ARRAY_SIZE(adis16350_channels),
1101 .gyro_scale_micro = 872664,
1102 .accel_scale_micro = 24732,
1103 .default_scan_mask = 0x7FF,
1104 .flags = ADIS16400_NO_BURST,
1105 },
1106 [ADIS16360] = {
1107 .channels = adis16350_channels,
1108 .num_channels = ARRAY_SIZE(adis16350_channels),
1109 .flags = ADIS16400_HAS_PROD_ID,
1110 .product_id = 0x3FE8,
1111 .gyro_scale_micro = 1279,
1112 .accel_scale_micro = 24732,
1113 .default_scan_mask = 0x7FF,
1114 },
1115 [ADIS16362] = {
1116 .channels = adis16350_channels,
1117 .num_channels = ARRAY_SIZE(adis16350_channels),
1118 .flags = ADIS16400_HAS_PROD_ID,
1119 .product_id = 0x3FEA,
1120 .gyro_scale_micro = 1279,
1121 .accel_scale_micro = 24732,
1122 .default_scan_mask = 0x7FF,
1123 },
1124 [ADIS16364] = {
1125 .channels = adis16350_channels,
1126 .num_channels = ARRAY_SIZE(adis16350_channels),
1127 .flags = ADIS16400_HAS_PROD_ID,
1128 .product_id = 0x3FEC,
1129 .gyro_scale_micro = 1279,
1130 .accel_scale_micro = 24732,
1131 .default_scan_mask = 0x7FF,
1132 },
1133 [ADIS16365] = {
1134 .channels = adis16350_channels,
1135 .num_channels = ARRAY_SIZE(adis16350_channels),
1136 .flags = ADIS16400_HAS_PROD_ID,
1137 .product_id = 0x3FED,
1138 .gyro_scale_micro = 1279,
1139 .accel_scale_micro = 24732,
1140 .default_scan_mask = 0x7FF,
1141 },
1142 [ADIS16400] = {
1143 .channels = adis16400_channels,
1144 .num_channels = ARRAY_SIZE(adis16400_channels),
1145 .flags = ADIS16400_HAS_PROD_ID,
1146 .product_id = 0x4015,
1147 .gyro_scale_micro = 873,
1148 .accel_scale_micro = 32656,
1149 .default_scan_mask = 0xFFF,
1150 }
1151};
1152
6fe8135f
JC		 1153static const struct iio_info adis16400_info = {
1154 .driver_module = THIS_MODULE,
1155 .read_raw = &adis16400_read_raw,
1156 .write_raw = &adis16400_write_raw,
1157 .attrs = &adis16400_attribute_group,
1158};
2a29a90b 1159
a9d26f00
BS		 1160static int __devinit adis16400_probe(struct spi_device *spi)
1161{
26d25ae3 1162 int ret;
38d15f06
JC		 1163 struct adis16400_state *st;
1164 struct iio_dev *indio_dev = iio_allocate_device(sizeof(*st));
1165 if (indio_dev == NULL) {
a9d26f00
BS		 1166 ret = -ENOMEM;
1167 goto error_ret;
1168 }
38d15f06 1169 st = iio_priv(indio_dev);
a9d26f00 1170 /* this is only used for removal purposes */
38d15f06 1171 spi_set_drvdata(spi, indio_dev);
a9d26f00 1172
a9d26f00
BS		 1173 st->us = spi;
1174 mutex_init(&st->buf_lock);
38d15f06 1175
a9d26f00 1176 /* setup the industrialio driver allocated elements */
2a29a90b 1177 st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data];
38d15f06
JC		 1178 indio_dev->dev.parent = &spi->dev;
1179 indio_dev->name = spi_get_device_id(spi)->name;
38d15f06
JC		 1180 indio_dev->channels = st->variant->channels;
1181 indio_dev->num_channels = st->variant->num_channels;
6fe8135f 1182 indio_dev->info = &adis16400_info;
38d15f06
JC		 1183 indio_dev->modes = INDIO_DIRECT_MODE;
1184
1185 ret = adis16400_configure_ring(indio_dev);
a9d26f00
BS		 1186 if (ret)
1187 goto error_free_dev;
1188
14555b14
JC		 1189 ret = iio_buffer_register(indio_dev,
1190 st->variant->channels,
1191 st->variant->num_channels);
a9d26f00 1192 if (ret) {
6a6ec623 1193 dev_err(&spi->dev, "failed to initialize the ring\n");
a9d26f00
BS		 1194 goto error_unreg_ring_funcs;
1195 }
1196
521de518 1197 if (spi->irq) {
38d15f06 1198 ret = adis16400_probe_trigger(indio_dev);
a9d26f00 1199 if (ret)
b333a240 1200 goto error_uninitialize_ring;
a9d26f00
BS		 1201 }
1202
1203 /* Get the device into a sane initial state */
38d15f06 1204 ret = adis16400_initial_setup(indio_dev);
a9d26f00
BS		 1205 if (ret)
1206 goto error_remove_trigger;
26d25ae3
JC		 1207 ret = iio_device_register(indio_dev);
1208 if (ret)
1209 goto error_remove_trigger;
1210
a9d26f00
BS		 1211 return 0;
1212
1213error_remove_trigger:
487db485 1214 if (spi->irq)
38d15f06 1215 adis16400_remove_trigger(indio_dev);
a9d26f00 1216error_uninitialize_ring:
14555b14 1217 iio_buffer_unregister(indio_dev);
a9d26f00 1218error_unreg_ring_funcs:
38d15f06 1219 adis16400_unconfigure_ring(indio_dev);
a9d26f00 1220error_free_dev:
26d25ae3 1221 iio_free_device(indio_dev);
a9d26f00
BS		 1222error_ret:
1223 return ret;
1224}
1225
1226/* fixme, confirm ordering in this function */
1227static int adis16400_remove(struct spi_device *spi)
1228{
1229 int ret;
38d15f06 1230 struct iio_dev *indio_dev = spi_get_drvdata(spi);
a9d26f00 1231
d2fffd6c 1232 iio_device_unregister(indio_dev);
e7854845 1233 ret = adis16400_stop_device(indio_dev);
a9d26f00
BS		 1234 if (ret)
1235 goto err_ret;
1236
a9d26f00 1237 adis16400_remove_trigger(indio_dev);
14555b14 1238 iio_buffer_unregister(indio_dev);
a9d26f00 1239 adis16400_unconfigure_ring(indio_dev);
d2fffd6c 1240 iio_free_device(indio_dev);
2a29a90b 1241
a9d26f00
BS		 1242 return 0;
1243
1244err_ret:
1245 return ret;
1246}
1247
2a29a90b 1248static const struct spi_device_id adis16400_id[] = {
8e886e65 1249 {"adis16300", ADIS16300},
85da5059 1250 {"adis16334", ADIS16334},
2a29a90b
JC		 1251 {"adis16350", ADIS16350},
1252 {"adis16354", ADIS16350},
1253 {"adis16355", ADIS16350},
1254 {"adis16360", ADIS16360},
1255 {"adis16362", ADIS16362},
1256 {"adis16364", ADIS16364},
1257 {"adis16365", ADIS16365},
1258 {"adis16400", ADIS16400},
1259 {"adis16405", ADIS16400},
1260 {}
1261};
55e4390c 1262MODULE_DEVICE_TABLE(spi, adis16400_id);
2a29a90b 1263
a9d26f00
BS		 1264static struct spi_driver adis16400_driver = {
1265 .driver = {
1266 .name = "adis16400",
1267 .owner = THIS_MODULE,
1268 },
2a29a90b 1269 .id_table = adis16400_id,
a9d26f00
BS		 1270 .probe = adis16400_probe,
1271 .remove = __devexit_p(adis16400_remove),
1272};
ae6ae6fe 1273module_spi_driver(adis16400_driver);
a9d26f00
BS		 1274
1275MODULE_AUTHOR("Manuel Stahl <manuel.stahl@iis.fraunhofer.de>");
1276MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver");
1277MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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