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staging:iio: filter description - low pass 3db frequency.
[deliverable/linux.git] / drivers / staging / iio / imu / adis16400_core.c
CommitLineData
a9d26f00
BS		 1/*
2 * adis16400.c support Analog Devices ADIS16400/5
3 * 3d 2g Linear Accelerometers,
4 * 3d Gyroscopes,
5 * 3d Magnetometers via SPI
6 *
7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk>
6a6ec623 9 * Copyright (c) 2011 Analog Devices Inc.
a9d26f00
BS		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17#include <linux/interrupt.h>
18#include <linux/irq.h>
a9d26f00
BS		 19#include <linux/delay.h>
20#include <linux/mutex.h>
21#include <linux/device.h>
22#include <linux/kernel.h>
23#include <linux/spi/spi.h>
1cb6c1f5 24#include <linux/slab.h>
a9d26f00
BS		 25#include <linux/sysfs.h>
26#include <linux/list.h>
99c97852 27#include <linux/module.h>
a9d26f00
BS		 28
29#include "../iio.h"
30#include "../sysfs.h"
af5046af 31#include "../buffer.h"
a9d26f00
BS		 32#include "adis16400.h"
33
2a29a90b 34enum adis16400_chip_variant {
8e886e65 35 ADIS16300,
85da5059 36 ADIS16334,
2a29a90b
JC		 37 ADIS16350,
38 ADIS16360,
39 ADIS16362,
40 ADIS16364,
41 ADIS16365,
42 ADIS16400,
43};
44
a9d26f00
BS		 45/**
46 * adis16400_spi_write_reg_8() - write single byte to a register
47 * @dev: device associated with child of actual device (iio_dev or iio_trig)
48 * @reg_address: the address of the register to be written
49 * @val: the value to write
521de518 50 */
e7854845
JC		 51static int adis16400_spi_write_reg_8(struct iio_dev *indio_dev,
52 u8 reg_address,
53 u8 val)
a9d26f00
BS		 54{
55 int ret;
38d15f06 56 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 57
58 mutex_lock(&st->buf_lock);
59 st->tx[0] = ADIS16400_WRITE_REG(reg_address);
60 st->tx[1] = val;
61
62 ret = spi_write(st->us, st->tx, 2);
63 mutex_unlock(&st->buf_lock);
64
65 return ret;
66}
67
68/**
69 * adis16400_spi_write_reg_16() - write 2 bytes to a pair of registers
70 * @dev: device associated with child of actual device (iio_dev or iio_trig)
71 * @reg_address: the address of the lower of the two registers. Second register
72 * is assumed to have address one greater.
73 * @val: value to be written
521de518
JC		 74 *
75 * At the moment the spi framework doesn't allow global setting of cs_change.
76 * This means that use cannot be made of spi_write.
77 */
e7854845 78static int adis16400_spi_write_reg_16(struct iio_dev *indio_dev,
a9d26f00
BS		 79 u8 lower_reg_address,
80 u16 value)
81{
82 int ret;
83 struct spi_message msg;
38d15f06 84 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 85 struct spi_transfer xfers[] = {
86 {
87 .tx_buf = st->tx,
88 .bits_per_word = 8,
89 .len = 2,
90 .cs_change = 1,
91 }, {
92 .tx_buf = st->tx + 2,
93 .bits_per_word = 8,
94 .len = 2,
a9d26f00
BS		 95 },
96 };
97
98 mutex_lock(&st->buf_lock);
99 st->tx[0] = ADIS16400_WRITE_REG(lower_reg_address);
100 st->tx[1] = value & 0xFF;
101 st->tx[2] = ADIS16400_WRITE_REG(lower_reg_address + 1);
102 st->tx[3] = (value >> 8) & 0xFF;
103
104 spi_message_init(&msg);
105 spi_message_add_tail(&xfers[0], &msg);
106 spi_message_add_tail(&xfers[1], &msg);
107 ret = spi_sync(st->us, &msg);
108 mutex_unlock(&st->buf_lock);
109
110 return ret;
111}
112
113/**
114 * adis16400_spi_read_reg_16() - read 2 bytes from a 16-bit register
e7854845 115 * @indio_dev: iio device
a9d26f00
BS		 116 * @reg_address: the address of the lower of the two registers. Second register
117 * is assumed to have address one greater.
118 * @val: somewhere to pass back the value read
521de518
JC		 119 *
120 * At the moment the spi framework doesn't allow global setting of cs_change.
121 * This means that use cannot be made of spi_read.
a9d26f00 122 **/
e7854845 123static int adis16400_spi_read_reg_16(struct iio_dev *indio_dev,
a9d26f00
BS		 124 u8 lower_reg_address,
125 u16 *val)
126{
127 struct spi_message msg;
38d15f06 128 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 129 int ret;
130 struct spi_transfer xfers[] = {
131 {
132 .tx_buf = st->tx,
133 .bits_per_word = 8,
134 .len = 2,
135 .cs_change = 1,
136 }, {
137 .rx_buf = st->rx,
138 .bits_per_word = 8,
139 .len = 2,
a9d26f00
BS		 140 },
141 };
142
143 mutex_lock(&st->buf_lock);
144 st->tx[0] = ADIS16400_READ_REG(lower_reg_address);
145 st->tx[1] = 0;
a9d26f00
BS		 146
147 spi_message_init(&msg);
148 spi_message_add_tail(&xfers[0], &msg);
149 spi_message_add_tail(&xfers[1], &msg);
150 ret = spi_sync(st->us, &msg);
151 if (ret) {
152 dev_err(&st->us->dev,
153 "problem when reading 16 bit register 0x%02X",
154 lower_reg_address);
155 goto error_ret;
156 }
157 *val = (st->rx[0] << 8) | st->rx[1];
158
159error_ret:
160 mutex_unlock(&st->buf_lock);
161 return ret;
162}
163
a9d26f00
BS		 164static ssize_t adis16400_read_frequency(struct device *dev,
165 struct device_attribute *attr,
166 char *buf)
167{
e7854845 168 struct iio_dev *indio_dev = dev_get_drvdata(dev);
a9d26f00
BS		 169 int ret, len = 0;
170 u16 t;
171 int sps;
e7854845 172 ret = adis16400_spi_read_reg_16(indio_dev,
a9d26f00
BS		 173 ADIS16400_SMPL_PRD,
174 &t);
175 if (ret)
176 return ret;
177 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638;
178 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
179 len = sprintf(buf, "%d SPS\n", sps);
180 return len;
181}
182
183static ssize_t adis16400_write_frequency(struct device *dev,
184 struct device_attribute *attr,
185 const char *buf,
186 size_t len)
187{
188 struct iio_dev *indio_dev = dev_get_drvdata(dev);
38d15f06 189 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 190 long val;
191 int ret;
192 u8 t;
193
194 ret = strict_strtol(buf, 10, &val);
195 if (ret)
196 return ret;
197
198 mutex_lock(&indio_dev->mlock);
199
200 t = (1638 / val);
201 if (t > 0)
202 t--;
203 t &= ADIS16400_SMPL_PRD_DIV_MASK;
204 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
205 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
206 else
207 st->us->max_speed_hz = ADIS16400_SPI_FAST;
208
e7854845 209 ret = adis16400_spi_write_reg_8(indio_dev,
a9d26f00
BS		 210 ADIS16400_SMPL_PRD,
211 t);
212
213 mutex_unlock(&indio_dev->mlock);
214
215 return ret ? ret : len;
216}
217
e7854845 218static int adis16400_reset(struct iio_dev *indio_dev)
3fd66da1
BS		 219{
220 int ret;
e7854845 221 ret = adis16400_spi_write_reg_8(indio_dev,
3fd66da1
BS		 222 ADIS16400_GLOB_CMD,
223 ADIS16400_GLOB_CMD_SW_RESET);
224 if (ret)
e7854845 225 dev_err(&indio_dev->dev, "problem resetting device");
3fd66da1
BS		 226
227 return ret;
228}
229
a9d26f00
BS		 230static ssize_t adis16400_write_reset(struct device *dev,
231 struct device_attribute *attr,
232 const char *buf, size_t len)
233{
7a6ff010
JC		 234 bool val;
235 int ret;
e7854845 236
7a6ff010
JC		 237 ret = strtobool(buf, &val);
238 if (ret < 0)
239 return ret;
521de518 240 if (val) {
7a6ff010 241 ret = adis16400_reset(dev_get_drvdata(dev));
521de518
JC		 242 if (ret < 0)
243 return ret;
244 }
7a6ff010
JC		 245
246 return len;
a9d26f00
BS		 247}
248
e7854845 249int adis16400_set_irq(struct iio_dev *indio_dev, bool enable)
a9d26f00
BS		 250{
251 int ret;
252 u16 msc;
521de518 253
e7854845 254 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_MSC_CTRL, &msc);
a9d26f00
BS		 255 if (ret)
256 goto error_ret;
257
258 msc |= ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH;
259 if (enable)
260 msc |= ADIS16400_MSC_CTRL_DATA_RDY_EN;
261 else
262 msc &= ~ADIS16400_MSC_CTRL_DATA_RDY_EN;
263
e7854845 264 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_MSC_CTRL, msc);
a9d26f00
BS		 265 if (ret)
266 goto error_ret;
267
268error_ret:
269 return ret;
270}
271
a9d26f00 272/* Power down the device */
e7854845 273static int adis16400_stop_device(struct iio_dev *indio_dev)
a9d26f00
BS		 274{
275 int ret;
276 u16 val = ADIS16400_SLP_CNT_POWER_OFF;
277
e7854845 278 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_SLP_CNT, val);
a9d26f00 279 if (ret)
e7854845
JC		 280 dev_err(&indio_dev->dev,
281 "problem with turning device off: SLP_CNT");
a9d26f00
BS		 282
283 return ret;
284}
285
e7854845 286static int adis16400_check_status(struct iio_dev *indio_dev)
a9d26f00
BS		 287{
288 u16 status;
289 int ret;
e7854845 290 struct device *dev = &indio_dev->dev;
a9d26f00 291
e7854845
JC		 292 ret = adis16400_spi_read_reg_16(indio_dev,
293 ADIS16400_DIAG_STAT, &status);
a9d26f00
BS		 294
295 if (ret < 0) {
296 dev_err(dev, "Reading status failed\n");
297 goto error_ret;
298 }
299 ret = status;
300 if (status & ADIS16400_DIAG_STAT_ZACCL_FAIL)
301 dev_err(dev, "Z-axis accelerometer self-test failure\n");
302 if (status & ADIS16400_DIAG_STAT_YACCL_FAIL)
303 dev_err(dev, "Y-axis accelerometer self-test failure\n");
304 if (status & ADIS16400_DIAG_STAT_XACCL_FAIL)
305 dev_err(dev, "X-axis accelerometer self-test failure\n");
306 if (status & ADIS16400_DIAG_STAT_XGYRO_FAIL)
307 dev_err(dev, "X-axis gyroscope self-test failure\n");
308 if (status & ADIS16400_DIAG_STAT_YGYRO_FAIL)
309 dev_err(dev, "Y-axis gyroscope self-test failure\n");
310 if (status & ADIS16400_DIAG_STAT_ZGYRO_FAIL)
311 dev_err(dev, "Z-axis gyroscope self-test failure\n");
312 if (status & ADIS16400_DIAG_STAT_ALARM2)
313 dev_err(dev, "Alarm 2 active\n");
314 if (status & ADIS16400_DIAG_STAT_ALARM1)
315 dev_err(dev, "Alarm 1 active\n");
316 if (status & ADIS16400_DIAG_STAT_FLASH_CHK)
317 dev_err(dev, "Flash checksum error\n");
318 if (status & ADIS16400_DIAG_STAT_SELF_TEST)
319 dev_err(dev, "Self test error\n");
320 if (status & ADIS16400_DIAG_STAT_OVERFLOW)
321 dev_err(dev, "Sensor overrange\n");
322 if (status & ADIS16400_DIAG_STAT_SPI_FAIL)
323 dev_err(dev, "SPI failure\n");
324 if (status & ADIS16400_DIAG_STAT_FLASH_UPT)
325 dev_err(dev, "Flash update failed\n");
326 if (status & ADIS16400_DIAG_STAT_POWER_HIGH)
327 dev_err(dev, "Power supply above 5.25V\n");
328 if (status & ADIS16400_DIAG_STAT_POWER_LOW)
329 dev_err(dev, "Power supply below 4.75V\n");
330
331error_ret:
332 return ret;
333}
334
521de518
JC		 335static int adis16400_self_test(struct iio_dev *indio_dev)
336{
337 int ret;
338 ret = adis16400_spi_write_reg_16(indio_dev,
339 ADIS16400_MSC_CTRL,
340 ADIS16400_MSC_CTRL_MEM_TEST);
341 if (ret) {
342 dev_err(&indio_dev->dev, "problem starting self test");
343 goto err_ret;
344 }
345
346 msleep(ADIS16400_MTEST_DELAY);
347 adis16400_check_status(indio_dev);
348
349err_ret:
350 return ret;
351}
352
38d15f06 353static int adis16400_initial_setup(struct iio_dev *indio_dev)
a9d26f00
BS		 354{
355 int ret;
356 u16 prod_id, smp_prd;
38d15f06 357 struct adis16400_state *st = iio_priv(indio_dev);
a9d26f00
BS		 358
359 /* use low spi speed for init */
360 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
361 st->us->mode = SPI_MODE_3;
362 spi_setup(st->us);
363
38d15f06 364 ret = adis16400_set_irq(indio_dev, false);
a9d26f00 365 if (ret) {
521de518 366 dev_err(&indio_dev->dev, "disable irq failed");
a9d26f00
BS		 367 goto err_ret;
368 }
369
38d15f06 370 ret = adis16400_self_test(indio_dev);
3fd66da1 371 if (ret) {
521de518 372 dev_err(&indio_dev->dev, "self test failure");
3fd66da1
BS		 373 goto err_ret;
374 }
a9d26f00 375
38d15f06 376 ret = adis16400_check_status(indio_dev);
a9d26f00 377 if (ret) {
38d15f06 378 adis16400_reset(indio_dev);
521de518 379 dev_err(&indio_dev->dev, "device not playing ball -> reset");
a9d26f00 380 msleep(ADIS16400_STARTUP_DELAY);
38d15f06 381 ret = adis16400_check_status(indio_dev);
a9d26f00 382 if (ret) {
521de518 383 dev_err(&indio_dev->dev, "giving up");
a9d26f00
BS		 384 goto err_ret;
385 }
386 }
2a29a90b 387 if (st->variant->flags & ADIS16400_HAS_PROD_ID) {
38d15f06 388 ret = adis16400_spi_read_reg_16(indio_dev,
2a29a90b
JC		 389 ADIS16400_PRODUCT_ID, &prod_id);
390 if (ret)
391 goto err_ret;
a9d26f00 392
2a29a90b 393 if ((prod_id & 0xF000) != st->variant->product_id)
521de518 394 dev_warn(&indio_dev->dev, "incorrect id");
a9d26f00 395
69d80bae 396 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n",
521de518
JC		 397 indio_dev->name, prod_id,
398 st->us->chip_select, st->us->irq);
2a29a90b 399 }
a9d26f00 400 /* use high spi speed if possible */
38d15f06 401 ret = adis16400_spi_read_reg_16(indio_dev,
e7854845 402 ADIS16400_SMPL_PRD, &smp_prd);
a9d26f00
BS		 403 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
404 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
405 spi_setup(st->us);
406 }
407
a9d26f00 408err_ret:
a9d26f00
BS		 409 return ret;
410}
411
a9d26f00 412static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
521de518
JC		 413 adis16400_read_frequency,
414 adis16400_write_frequency);
a9d26f00
BS		 415
416static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16400_write_reset, 0);
417
51a0a5b0 418static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("409 546 819 1638");
a9d26f00 419
e7854845
JC		 420enum adis16400_chan {
421 in_supply,
422 gyro_x,
423 gyro_y,
424 gyro_z,
425 accel_x,
426 accel_y,
427 accel_z,
428 magn_x,
429 magn_y,
430 magn_z,
431 temp,
2a29a90b 432 temp0, temp1, temp2,
91ab3fc9
JC		 433 in1,
434 incli_x,
435 incli_y,
e7854845
JC		 436};
437
91ab3fc9 438static u8 adis16400_addresses[17][2] = {
521de518 439 [in_supply] = { ADIS16400_SUPPLY_OUT },
e7854845
JC		 440 [gyro_x] = { ADIS16400_XGYRO_OUT, ADIS16400_XGYRO_OFF },
441 [gyro_y] = { ADIS16400_YGYRO_OUT, ADIS16400_YGYRO_OFF },
442 [gyro_z] = { ADIS16400_ZGYRO_OUT, ADIS16400_ZGYRO_OFF },
443 [accel_x] = { ADIS16400_XACCL_OUT, ADIS16400_XACCL_OFF },
444 [accel_y] = { ADIS16400_YACCL_OUT, ADIS16400_YACCL_OFF },
445 [accel_z] = { ADIS16400_ZACCL_OUT, ADIS16400_ZACCL_OFF },
521de518
JC		 446 [magn_x] = { ADIS16400_XMAGN_OUT },
447 [magn_y] = { ADIS16400_YMAGN_OUT },
448 [magn_z] = { ADIS16400_ZMAGN_OUT },
449 [temp] = { ADIS16400_TEMP_OUT },
2a29a90b
JC		 450 [temp0] = { ADIS16350_XTEMP_OUT },
451 [temp1] = { ADIS16350_YTEMP_OUT },
452 [temp2] = { ADIS16350_ZTEMP_OUT },
521de518
JC		 453 [in1] = { ADIS16400_AUX_ADC },
454 [incli_x] = { ADIS16300_PITCH_OUT },
455 [incli_y] = { ADIS16300_ROLL_OUT }
e7854845
JC		 456};
457
458static int adis16400_write_raw(struct iio_dev *indio_dev,
459 struct iio_chan_spec const *chan,
460 int val,
461 int val2,
462 long mask)
463{
464 int ret;
521de518 465
e7854845 466 switch (mask) {
c8a9f805 467 case IIO_CHAN_INFO_CALIBBIAS:
e7854845
JC		 468 mutex_lock(&indio_dev->mlock);
469 ret = adis16400_spi_write_reg_16(indio_dev,
470 adis16400_addresses[chan->address][1],
471 val);
472 mutex_unlock(&indio_dev->mlock);
473 return ret;
474 default:
475 return -EINVAL;
476 }
477}
478
479static int adis16400_read_raw(struct iio_dev *indio_dev,
480 struct iio_chan_spec const *chan,
481 int *val,
482 int *val2,
483 long mask)
484{
38d15f06 485 struct adis16400_state *st = iio_priv(indio_dev);
521de518 486 int ret, shift;
e7854845 487 s16 val16;
e7854845
JC		 488
489 switch (mask) {
490 case 0:
491 mutex_lock(&indio_dev->mlock);
492 ret = adis16400_spi_read_reg_16(indio_dev,
493 adis16400_addresses[chan->address][0],
494 &val16);
495 if (ret) {
496 mutex_unlock(&indio_dev->mlock);
497 return ret;
498 }
499 val16 &= (1 << chan->scan_type.realbits) - 1;
500 if (chan->scan_type.sign == 's') {
501 shift = 16 - chan->scan_type.realbits;
502 val16 = (s16)(val16 << shift) >> shift;
503 }
504 *val = val16;
505 mutex_unlock(&indio_dev->mlock);
506 return IIO_VAL_INT;
c8a9f805 507 case IIO_CHAN_INFO_SCALE:
e7854845 508 switch (chan->type) {
41ea040c 509 case IIO_ANGL_VEL:
e7854845 510 *val = 0;
2a29a90b 511 *val2 = st->variant->gyro_scale_micro;
e7854845 512 return IIO_VAL_INT_PLUS_MICRO;
6835cb6b 513 case IIO_VOLTAGE:
e7854845
JC		 514 *val = 0;
515 if (chan->channel == 0)
516 *val2 = 2418;
517 else
518 *val2 = 806;
519 return IIO_VAL_INT_PLUS_MICRO;
520 case IIO_ACCEL:
521 *val = 0;
2a29a90b 522 *val2 = st->variant->accel_scale_micro;
e7854845
JC		 523 return IIO_VAL_INT_PLUS_MICRO;
524 case IIO_MAGN:
525 *val = 0;
526 *val2 = 500;
527 return IIO_VAL_INT_PLUS_MICRO;
528 case IIO_TEMP:
529 *val = 0;
530 *val2 = 140000;
531 return IIO_VAL_INT_PLUS_MICRO;
532 default:
533 return -EINVAL;
534 }
c8a9f805 535 case IIO_CHAN_INFO_CALIBBIAS:
e7854845
JC		 536 mutex_lock(&indio_dev->mlock);
537 ret = adis16400_spi_read_reg_16(indio_dev,
538 adis16400_addresses[chan->address][1],
539 &val16);
2a29a90b
JC		 540 mutex_unlock(&indio_dev->mlock);
541 if (ret)
e7854845 542 return ret;
e7854845
JC		 543 val16 = ((val16 & 0xFFF) << 4) >> 4;
544 *val = val16;
545 return IIO_VAL_INT;
c8a9f805 546 case IIO_CHAN_INFO_OFFSET:
e7854845
JC		 547 /* currently only temperature */
548 *val = 198;
549 *val2 = 160000;
550 return IIO_VAL_INT_PLUS_MICRO;
551 default:
552 return -EINVAL;
553 }
554}
555
556static struct iio_chan_spec adis16400_channels[] = {
521de518
JC		 557 {
558 .type = IIO_VOLTAGE,
559 .indexed = 1,
560 .channel = 0,
561 .extend_name = "supply",
c8a9f805 562 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 563 .address = in_supply,
564 .scan_index = ADIS16400_SCAN_SUPPLY,
565 .scan_type = IIO_ST('u', 14, 16, 0)
566 }, {
41ea040c 567 .type = IIO_ANGL_VEL,
521de518
JC		 568 .modified = 1,
569 .channel2 = IIO_MOD_X,
c8a9f805
JC		 570 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
571 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 572 .address = gyro_x,
573 .scan_index = ADIS16400_SCAN_GYRO_X,
574 .scan_type = IIO_ST('s', 14, 16, 0)
575 }, {
41ea040c 576 .type = IIO_ANGL_VEL,
521de518
JC		 577 .modified = 1,
578 .channel2 = IIO_MOD_Y,
c8a9f805
JC		 579 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
580 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 581 .address = gyro_y,
582 .scan_index = ADIS16400_SCAN_GYRO_Y,
583 .scan_type = IIO_ST('s', 14, 16, 0),
584 }, {
41ea040c 585 .type = IIO_ANGL_VEL,
521de518
JC		 586 .modified = 1,
587 .channel2 = IIO_MOD_Z,
c8a9f805
JC		 588 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
589 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 590 .address = gyro_z,
591 .scan_index = ADIS16400_SCAN_GYRO_Z,
592 .scan_type = IIO_ST('s', 14, 16, 0),
593 }, {
594 .type = IIO_ACCEL,
595 .modified = 1,
596 .channel2 = IIO_MOD_X,
c8a9f805
JC		 597 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
598 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 599 .address = accel_x,
600 .scan_index = ADIS16400_SCAN_ACC_X,
601 .scan_type = IIO_ST('s', 14, 16, 0),
602 }, {
603 .type = IIO_ACCEL,
604 .modified = 1,
605 .channel2 = IIO_MOD_Y,
c8a9f805
JC		 606 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
607 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 608 .address = accel_y,
609 .scan_index = ADIS16400_SCAN_ACC_Y,
610 .scan_type = IIO_ST('s', 14, 16, 0),
611 }, {
612 .type = IIO_ACCEL,
613 .modified = 1,
614 .channel2 = IIO_MOD_Z,
c8a9f805
JC		 615 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
616 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 617 .address = accel_z,
618 .scan_index = ADIS16400_SCAN_ACC_Z,
619 .scan_type = IIO_ST('s', 14, 16, 0),
620 }, {
621 .type = IIO_MAGN,
622 .modified = 1,
623 .channel2 = IIO_MOD_X,
c8a9f805 624 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 625 .address = magn_x,
626 .scan_index = ADIS16400_SCAN_MAGN_X,
627 .scan_type = IIO_ST('s', 14, 16, 0),
628 }, {
629 .type = IIO_MAGN,
630 .modified = 1,
631 .channel2 = IIO_MOD_Y,
c8a9f805 632 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 633 .address = magn_y,
634 .scan_index = ADIS16400_SCAN_MAGN_Y,
635 .scan_type = IIO_ST('s', 14, 16, 0),
636 }, {
637 .type = IIO_MAGN,
638 .modified = 1,
639 .channel2 = IIO_MOD_Z,
c8a9f805 640 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 641 .address = magn_z,
642 .scan_index = ADIS16400_SCAN_MAGN_Z,
643 .scan_type = IIO_ST('s', 14, 16, 0),
644 }, {
645 .type = IIO_TEMP,
646 .indexed = 1,
647 .channel = 0,
c8a9f805
JC		 648 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
649 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 650 .address = temp,
651 .scan_index = ADIS16400_SCAN_TEMP,
652 .scan_type = IIO_ST('s', 12, 16, 0),
653 }, {
6835cb6b 654 .type = IIO_VOLTAGE,
521de518
JC		 655 .indexed = 1,
656 .channel = 1,
c8a9f805 657 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 658 .address = in1,
659 .scan_index = ADIS16400_SCAN_ADC_0,
660 .scan_type = IIO_ST('s', 12, 16, 0),
661 },
e7854845
JC		 662 IIO_CHAN_SOFT_TIMESTAMP(12)
663};
664
2a29a90b 665static struct iio_chan_spec adis16350_channels[] = {
521de518
JC		 666 {
667 .type = IIO_VOLTAGE,
668 .indexed = 1,
669 .channel = 0,
670 .extend_name = "supply",
c8a9f805 671 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 672 .address = in_supply,
673 .scan_index = ADIS16400_SCAN_SUPPLY,
674 .scan_type = IIO_ST('u', 12, 16, 0)
675 }, {
41ea040c 676 .type = IIO_ANGL_VEL,
521de518
JC		 677 .modified = 1,
678 .channel2 = IIO_MOD_X,
c8a9f805
JC		 679 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
680 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 681 .address = gyro_x,
682 .scan_index = ADIS16400_SCAN_GYRO_X,
683 .scan_type = IIO_ST('s', 14, 16, 0)
684 }, {
41ea040c 685 .type = IIO_ANGL_VEL,
521de518
JC		 686 .modified = 1,
687 .channel2 = IIO_MOD_Y,
c8a9f805
JC		 688 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
689 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 690 .address = gyro_y,
691 .scan_index = ADIS16400_SCAN_GYRO_Y,
692 .scan_type = IIO_ST('s', 14, 16, 0),
693 }, {
41ea040c 694 .type = IIO_ANGL_VEL,
521de518
JC		 695 .modified = 1,
696 .channel2 = IIO_MOD_Z,
c8a9f805
JC		 697 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
698 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 699 .address = gyro_z,
700 .scan_index = ADIS16400_SCAN_GYRO_Z,
701 .scan_type = IIO_ST('s', 14, 16, 0),
702 }, {
703 .type = IIO_ACCEL,
704 .modified = 1,
705 .channel2 = IIO_MOD_X,
c8a9f805
JC		 706 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
707 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 708 .address = accel_x,
709 .scan_index = ADIS16400_SCAN_ACC_X,
710 .scan_type = IIO_ST('s', 14, 16, 0),
711 }, {
712 .type = IIO_ACCEL,
713 .modified = 1,
714 .channel2 = IIO_MOD_Y,
c8a9f805
JC		 715 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
716 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 717 .address = accel_y,
718 .scan_index = ADIS16400_SCAN_ACC_Y,
719 .scan_type = IIO_ST('s', 14, 16, 0),
720 }, {
721 .type = IIO_ACCEL,
722 .modified = 1,
723 .channel2 = IIO_MOD_Z,
c8a9f805
JC		 724 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
725 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 726 .address = accel_z,
727 .scan_index = ADIS16400_SCAN_ACC_Z,
728 .scan_type = IIO_ST('s', 14, 16, 0),
729 }, {
730 .type = IIO_TEMP,
731 .indexed = 1,
732 .channel = 0,
733 .extend_name = "x",
c8a9f805
JC		 734 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
735 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 736 .address = temp0,
737 .scan_index = ADIS16350_SCAN_TEMP_X,
738 .scan_type = IIO_ST('s', 12, 16, 0),
739 }, {
740 .type = IIO_TEMP,
741 .indexed = 1,
742 .channel = 1,
743 .extend_name = "y",
c8a9f805
JC		 744 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
745 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 746 .address = temp1,
747 .scan_index = ADIS16350_SCAN_TEMP_Y,
748 .scan_type = IIO_ST('s', 12, 16, 0),
749 }, {
750 .type = IIO_TEMP,
751 .indexed = 1,
752 .channel = 2,
753 .extend_name = "z",
c8a9f805
JC		 754 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
755 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 756 .address = temp2,
757 .scan_index = ADIS16350_SCAN_TEMP_Z,
758 .scan_type = IIO_ST('s', 12, 16, 0),
759 }, {
6835cb6b 760 .type = IIO_VOLTAGE,
521de518
JC		 761 .indexed = 1,
762 .channel = 1,
c8a9f805 763 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 764 .address = in1,
765 .scan_index = ADIS16350_SCAN_ADC_0,
766 .scan_type = IIO_ST('s', 12, 16, 0),
767 },
2a29a90b
JC		 768 IIO_CHAN_SOFT_TIMESTAMP(11)
769};
770
8e886e65 771static struct iio_chan_spec adis16300_channels[] = {
521de518
JC		 772 {
773 .type = IIO_VOLTAGE,
774 .indexed = 1,
775 .channel = 0,
776 .extend_name = "supply",
c8a9f805 777 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 778 .address = in_supply,
779 .scan_index = ADIS16400_SCAN_SUPPLY,
780 .scan_type = IIO_ST('u', 12, 16, 0)
781 }, {
41ea040c 782 .type = IIO_ANGL_VEL,
521de518
JC		 783 .modified = 1,
784 .channel2 = IIO_MOD_X,
c8a9f805
JC		 785 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
786 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 787 .address = gyro_x,
788 .scan_index = ADIS16400_SCAN_GYRO_X,
789 .scan_type = IIO_ST('s', 14, 16, 0),
790 }, {
791 .type = IIO_ACCEL,
792 .modified = 1,
793 .channel2 = IIO_MOD_X,
c8a9f805
JC		 794 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
795 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 796 .address = accel_x,
797 .scan_index = ADIS16400_SCAN_ACC_X,
798 .scan_type = IIO_ST('s', 14, 16, 0),
799 }, {
800 .type = IIO_ACCEL,
801 .modified = 1,
802 .channel2 = IIO_MOD_Y,
c8a9f805
JC		 803 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
804 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 805 .address = accel_y,
806 .scan_index = ADIS16400_SCAN_ACC_Y,
807 .scan_type = IIO_ST('s', 14, 16, 0),
808 }, {
809 .type = IIO_ACCEL,
810 .modified = 1,
811 .channel2 = IIO_MOD_Z,
c8a9f805
JC		 812 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
813 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 814 .address = accel_z,
815 .scan_index = ADIS16400_SCAN_ACC_Z,
816 .scan_type = IIO_ST('s', 14, 16, 0),
817 }, {
818 .type = IIO_TEMP,
819 .indexed = 1,
820 .channel = 0,
c8a9f805
JC		 821 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
822 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 823 .address = temp,
824 .scan_index = ADIS16400_SCAN_TEMP,
825 .scan_type = IIO_ST('s', 12, 16, 0),
826 }, {
6835cb6b 827 .type = IIO_VOLTAGE,
521de518
JC		 828 .indexed = 1,
829 .channel = 1,
c8a9f805 830 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
521de518
JC		 831 .address = in1,
832 .scan_index = ADIS16350_SCAN_ADC_0,
833 .scan_type = IIO_ST('s', 12, 16, 0),
834 }, {
835 .type = IIO_INCLI,
836 .modified = 1,
837 .channel2 = IIO_MOD_X,
c8a9f805 838 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 839 .address = incli_x,
840 .scan_index = ADIS16300_SCAN_INCLI_X,
841 .scan_type = IIO_ST('s', 13, 16, 0),
842 }, {
843 .type = IIO_INCLI,
844 .modified = 1,
845 .channel2 = IIO_MOD_Y,
c8a9f805 846 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 847 .address = incli_y,
848 .scan_index = ADIS16300_SCAN_INCLI_Y,
849 .scan_type = IIO_ST('s', 13, 16, 0),
850 },
8e886e65
JC		 851 IIO_CHAN_SOFT_TIMESTAMP(14)
852};
853
85da5059 854static const struct iio_chan_spec adis16334_channels[] = {
521de518 855 {
41ea040c 856 .type = IIO_ANGL_VEL,
521de518
JC		 857 .modified = 1,
858 .channel2 = IIO_MOD_X,
c8a9f805
JC		 859 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
860 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 861 .address = gyro_x,
862 .scan_index = ADIS16400_SCAN_GYRO_X,
863 .scan_type = IIO_ST('s', 14, 16, 0),
864 }, {
41ea040c 865 .type = IIO_ANGL_VEL,
521de518
JC		 866 .modified = 1,
867 .channel2 = IIO_MOD_Y,
c8a9f805
JC		 868 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
869 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 870 .address = gyro_y,
871 .scan_index = ADIS16400_SCAN_GYRO_Y,
872 .scan_type = IIO_ST('s', 14, 16, 0),
873 }, {
41ea040c 874 .type = IIO_ANGL_VEL,
521de518
JC		 875 .modified = 1,
876 .channel2 = IIO_MOD_Z,
c8a9f805
JC		 877 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
878 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 879 .address = gyro_z,
880 .scan_index = ADIS16400_SCAN_GYRO_Z,
881 .scan_type = IIO_ST('s', 14, 16, 0),
882 }, {
883 .type = IIO_ACCEL,
884 .modified = 1,
885 .channel2 = IIO_MOD_X,
c8a9f805
JC		 886 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
887 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 888 .address = accel_x,
889 .scan_index = ADIS16400_SCAN_ACC_X,
890 .scan_type = IIO_ST('s', 14, 16, 0),
891 }, {
892 .type = IIO_ACCEL,
893 .modified = 1,
894 .channel2 = IIO_MOD_Y,
c8a9f805
JC		 895 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
896 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 897 .address = accel_y,
898 .scan_index = ADIS16400_SCAN_ACC_Y,
899 .scan_type = IIO_ST('s', 14, 16, 0),
900 }, {
901 .type = IIO_ACCEL,
902 .modified = 1,
903 .channel2 = IIO_MOD_Z,
c8a9f805
JC		 904 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
905 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 906 .address = accel_z,
907 .scan_index = ADIS16400_SCAN_ACC_Z,
908 .scan_type = IIO_ST('s', 14, 16, 0),
909 }, {
910 .type = IIO_TEMP,
911 .indexed = 1,
912 .channel = 0,
c8a9f805
JC		 913 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
914 IIO_CHAN_INFO_SCALE_SHARED_BIT,
521de518
JC		 915 .address = accel_z,
916 .scan_index = ADIS16400_SCAN_ACC_Z,
917 .scan_type = IIO_ST('s', 14, 16, 0),
918 },
88b42f3a
JC		 919 IIO_CHAN_SOFT_TIMESTAMP(12)
920};
921
a9d26f00 922static struct attribute *adis16400_attributes[] = {
a9d26f00 923 &iio_dev_attr_sampling_frequency.dev_attr.attr,
51a0a5b0 924 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
a9d26f00 925 &iio_dev_attr_reset.dev_attr.attr,
a9d26f00
BS		 926 NULL
927};
928
929static const struct attribute_group adis16400_attribute_group = {
930 .attrs = adis16400_attributes,
931};
932
2a29a90b 933static struct adis16400_chip_info adis16400_chips[] = {
8e886e65
JC		 934 [ADIS16300] = {
935 .channels = adis16300_channels,
936 .num_channels = ARRAY_SIZE(adis16300_channels),
937 .gyro_scale_micro = 873,
938 .accel_scale_micro = 5884,
939 .default_scan_mask = (1 << ADIS16400_SCAN_SUPPLY) |
940 (1 << ADIS16400_SCAN_GYRO_X) | (1 << ADIS16400_SCAN_ACC_X) |
941 (1 << ADIS16400_SCAN_ACC_Y) | (1 << ADIS16400_SCAN_ACC_Z) |
942 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) |
943 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) |
944 (1 << 14),
945 },
85da5059
JC		 946 [ADIS16334] = {
947 .channels = adis16334_channels,
948 .num_channels = ARRAY_SIZE(adis16334_channels),
88b42f3a
JC		 949 .gyro_scale_micro = 873,
950 .accel_scale_micro = 981,
951 .default_scan_mask = (1 << ADIS16400_SCAN_GYRO_X) |
952 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) |
953 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) |
954 (1 << ADIS16400_SCAN_ACC_Z),
955 },
2a29a90b
JC		 956 [ADIS16350] = {
957 .channels = adis16350_channels,
958 .num_channels = ARRAY_SIZE(adis16350_channels),
959 .gyro_scale_micro = 872664,
960 .accel_scale_micro = 24732,
961 .default_scan_mask = 0x7FF,
962 .flags = ADIS16400_NO_BURST,
963 },
964 [ADIS16360] = {
965 .channels = adis16350_channels,
966 .num_channels = ARRAY_SIZE(adis16350_channels),
967 .flags = ADIS16400_HAS_PROD_ID,
968 .product_id = 0x3FE8,
969 .gyro_scale_micro = 1279,
970 .accel_scale_micro = 24732,
971 .default_scan_mask = 0x7FF,
972 },
973 [ADIS16362] = {
974 .channels = adis16350_channels,
975 .num_channels = ARRAY_SIZE(adis16350_channels),
976 .flags = ADIS16400_HAS_PROD_ID,
977 .product_id = 0x3FEA,
978 .gyro_scale_micro = 1279,
979 .accel_scale_micro = 24732,
980 .default_scan_mask = 0x7FF,
981 },
982 [ADIS16364] = {
983 .channels = adis16350_channels,
984 .num_channels = ARRAY_SIZE(adis16350_channels),
985 .flags = ADIS16400_HAS_PROD_ID,
986 .product_id = 0x3FEC,
987 .gyro_scale_micro = 1279,
988 .accel_scale_micro = 24732,
989 .default_scan_mask = 0x7FF,
990 },
991 [ADIS16365] = {
992 .channels = adis16350_channels,
993 .num_channels = ARRAY_SIZE(adis16350_channels),
994 .flags = ADIS16400_HAS_PROD_ID,
995 .product_id = 0x3FED,
996 .gyro_scale_micro = 1279,
997 .accel_scale_micro = 24732,
998 .default_scan_mask = 0x7FF,
999 },
1000 [ADIS16400] = {
1001 .channels = adis16400_channels,
1002 .num_channels = ARRAY_SIZE(adis16400_channels),
1003 .flags = ADIS16400_HAS_PROD_ID,
1004 .product_id = 0x4015,
1005 .gyro_scale_micro = 873,
1006 .accel_scale_micro = 32656,
1007 .default_scan_mask = 0xFFF,
1008 }
1009};
1010
6fe8135f
JC		 1011static const struct iio_info adis16400_info = {
1012 .driver_module = THIS_MODULE,
1013 .read_raw = &adis16400_read_raw,
1014 .write_raw = &adis16400_write_raw,
1015 .attrs = &adis16400_attribute_group,
1016};
2a29a90b 1017
a9d26f00
BS		 1018static int __devinit adis16400_probe(struct spi_device *spi)
1019{
26d25ae3 1020 int ret;
38d15f06
JC		 1021 struct adis16400_state *st;
1022 struct iio_dev *indio_dev = iio_allocate_device(sizeof(*st));
1023 if (indio_dev == NULL) {
a9d26f00
BS		 1024 ret = -ENOMEM;
1025 goto error_ret;
1026 }
38d15f06 1027 st = iio_priv(indio_dev);
a9d26f00 1028 /* this is only used for removal purposes */
38d15f06 1029 spi_set_drvdata(spi, indio_dev);
a9d26f00 1030
a9d26f00
BS		 1031 st->us = spi;
1032 mutex_init(&st->buf_lock);
38d15f06 1033
a9d26f00 1034 /* setup the industrialio driver allocated elements */
2a29a90b 1035 st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data];
38d15f06
JC		 1036 indio_dev->dev.parent = &spi->dev;
1037 indio_dev->name = spi_get_device_id(spi)->name;
38d15f06
JC		 1038 indio_dev->channels = st->variant->channels;
1039 indio_dev->num_channels = st->variant->num_channels;
6fe8135f 1040 indio_dev->info = &adis16400_info;
38d15f06
JC		 1041 indio_dev->modes = INDIO_DIRECT_MODE;
1042
1043 ret = adis16400_configure_ring(indio_dev);
a9d26f00
BS		 1044 if (ret)
1045 goto error_free_dev;
1046
14555b14
JC		 1047 ret = iio_buffer_register(indio_dev,
1048 st->variant->channels,
1049 st->variant->num_channels);
a9d26f00 1050 if (ret) {
6a6ec623 1051 dev_err(&spi->dev, "failed to initialize the ring\n");
a9d26f00
BS		 1052 goto error_unreg_ring_funcs;
1053 }
1054
521de518 1055 if (spi->irq) {
38d15f06 1056 ret = adis16400_probe_trigger(indio_dev);
a9d26f00 1057 if (ret)
b333a240 1058 goto error_uninitialize_ring;
a9d26f00
BS		 1059 }
1060
1061 /* Get the device into a sane initial state */
38d15f06 1062 ret = adis16400_initial_setup(indio_dev);
a9d26f00
BS		 1063 if (ret)
1064 goto error_remove_trigger;
26d25ae3
JC		 1065 ret = iio_device_register(indio_dev);
1066 if (ret)
1067 goto error_remove_trigger;
1068
a9d26f00
BS		 1069 return 0;
1070
1071error_remove_trigger:
ec3afa40 1072 if (indio_dev->modes & INDIO_BUFFER_TRIGGERED)
38d15f06 1073 adis16400_remove_trigger(indio_dev);
a9d26f00 1074error_uninitialize_ring:
14555b14 1075 iio_buffer_unregister(indio_dev);
a9d26f00 1076error_unreg_ring_funcs:
38d15f06 1077 adis16400_unconfigure_ring(indio_dev);
a9d26f00 1078error_free_dev:
26d25ae3 1079 iio_free_device(indio_dev);
a9d26f00
BS		 1080error_ret:
1081 return ret;
1082}
1083
1084/* fixme, confirm ordering in this function */
1085static int adis16400_remove(struct spi_device *spi)
1086{
1087 int ret;
38d15f06 1088 struct iio_dev *indio_dev = spi_get_drvdata(spi);
a9d26f00 1089
d2fffd6c 1090 iio_device_unregister(indio_dev);
e7854845 1091 ret = adis16400_stop_device(indio_dev);
a9d26f00
BS		 1092 if (ret)
1093 goto err_ret;
1094
a9d26f00 1095 adis16400_remove_trigger(indio_dev);
14555b14 1096 iio_buffer_unregister(indio_dev);
a9d26f00 1097 adis16400_unconfigure_ring(indio_dev);
d2fffd6c 1098 iio_free_device(indio_dev);
2a29a90b 1099
a9d26f00
BS		 1100 return 0;
1101
1102err_ret:
1103 return ret;
1104}
1105
2a29a90b 1106static const struct spi_device_id adis16400_id[] = {
8e886e65 1107 {"adis16300", ADIS16300},
85da5059 1108 {"adis16334", ADIS16334},
2a29a90b
JC		 1109 {"adis16350", ADIS16350},
1110 {"adis16354", ADIS16350},
1111 {"adis16355", ADIS16350},
1112 {"adis16360", ADIS16360},
1113 {"adis16362", ADIS16362},
1114 {"adis16364", ADIS16364},
1115 {"adis16365", ADIS16365},
1116 {"adis16400", ADIS16400},
1117 {"adis16405", ADIS16400},
1118 {}
1119};
55e4390c 1120MODULE_DEVICE_TABLE(spi, adis16400_id);
2a29a90b 1121
a9d26f00
BS		 1122static struct spi_driver adis16400_driver = {
1123 .driver = {
1124 .name = "adis16400",
1125 .owner = THIS_MODULE,
1126 },
2a29a90b 1127 .id_table = adis16400_id,
a9d26f00
BS		 1128 .probe = adis16400_probe,
1129 .remove = __devexit_p(adis16400_remove),
1130};
1131
1132static __init int adis16400_init(void)
1133{
1134 return spi_register_driver(&adis16400_driver);
1135}
1136module_init(adis16400_init);
1137
1138static __exit void adis16400_exit(void)
1139{
1140 spi_unregister_driver(&adis16400_driver);
1141}
1142module_exit(adis16400_exit);
1143
1144MODULE_AUTHOR("Manuel Stahl <manuel.stahl@iis.fraunhofer.de>");
1145MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver");
1146MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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