[deliverable/linux.git] / drivers / staging / iio / meter / ade7759.c

/*
 * ADE7759 Active Energy Metering IC with di/dt Sensor Interface Driver
 *
 * Copyright 2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>
#include <linux/module.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include "meter.h"
#include "ade7759.h"

static int ade7759_spi_write_reg_8(struct device *dev,
		u8 reg_address,
		u8 val)
{
	int ret;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7759_state *st = iio_priv(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7759_WRITE_REG(reg_address);
	st->tx[1] = val;

	ret = spi_write(st->us, st->tx, 2);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7759_spi_write_reg_16(struct device *dev,
		u8 reg_address,
		u16 value)
{
	int ret;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7759_state *st = iio_priv(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7759_WRITE_REG(reg_address);
	st->tx[1] = (value >> 8) & 0xFF;
	st->tx[2] = value & 0xFF;
	ret = spi_write(st->us, st->tx, 3);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7759_spi_read_reg_8(struct device *dev,
		u8 reg_address,
		u8 *val)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7759_state *st = iio_priv(indio_dev);
	int ret;

	ret = spi_w8r8(st->us, ADE7759_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
				reg_address);
		return ret;
	}
	*val = ret;

	return 0;
}

static int ade7759_spi_read_reg_16(struct device *dev,
		u8 reg_address,
		u16 *val)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7759_state *st = iio_priv(indio_dev);
	int ret;

	ret = spi_w8r16(st->us, ADE7759_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
			reg_address);
		return ret;
	}

	*val = ret;
	*val = be16_to_cpup(val);

	return 0;
}

static int ade7759_spi_read_reg_40(struct device *dev,
		u8 reg_address,
		u64 *val)
{
	struct spi_message msg;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7759_state *st = iio_priv(indio_dev);
	int ret;
	struct spi_transfer xfers[] = {
		{
			.tx_buf = st->tx,
			.rx_buf = st->rx,
			.bits_per_word = 8,
			.len = 6,
		},
	};

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7759_READ_REG(reg_address);
	memset(&st->tx[1], 0 , 5);

	spi_message_init(&msg);
	spi_message_add_tail(xfers, &msg);
	ret = spi_sync(st->us, &msg);
	if (ret) {
		dev_err(&st->us->dev, "problem when reading 40 bit register 0x%02X",
				reg_address);
		goto error_ret;
	}
	*val = ((u64)st->rx[1] << 32) | (st->rx[2] << 24) |
		(st->rx[3] << 16) | (st->rx[4] << 8) | st->rx[5];

error_ret:
	mutex_unlock(&st->buf_lock);
	return ret;
}

static ssize_t ade7759_read_8bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u8 val = 0;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7759_spi_read_reg_8(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7759_read_16bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u16 val = 0;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7759_spi_read_reg_16(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7759_read_40bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u64 val = 0;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7759_spi_read_reg_40(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%llu\n", val);
}

static ssize_t ade7759_write_8bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	long val;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7759_spi_write_reg_8(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static ssize_t ade7759_write_16bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	long val;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7759_spi_write_reg_16(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static int ade7759_reset(struct device *dev)
{
	int ret;
	u16 val;
	ade7759_spi_read_reg_16(dev,
			ADE7759_MODE,
			&val);
	val |= 1 << 6; /* Software Chip Reset */
	ret = ade7759_spi_write_reg_16(dev,
			ADE7759_MODE,
			val);

	return ret;
}

static ssize_t ade7759_write_reset(struct device *dev,
		struct device_attribute *attr,
		const char *buf, size_t len)
{
	if (len < 1)
		return -1;
	switch (buf[0]) {
	case '1':
	case 'y':
	case 'Y':
		return ade7759_reset(dev);
	}
	return -1;
}

static IIO_DEV_ATTR_AENERGY(ade7759_read_40bit, ADE7759_AENERGY);
static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
		ade7759_read_16bit,
		ade7759_write_16bit,
		ADE7759_CFDEN);
static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
		ade7759_read_8bit,
		ade7759_write_8bit,
		ADE7759_CFNUM);
static IIO_DEV_ATTR_CHKSUM(ade7759_read_8bit, ADE7759_CHKSUM);
static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
		ade7759_read_16bit,
		ade7759_write_16bit,
		ADE7759_PHCAL);
static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
		ade7759_read_16bit,
		ade7759_write_16bit,
		ADE7759_APOS);
static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
		ade7759_read_8bit,
		ade7759_write_8bit,
		ADE7759_SAGCYC);
static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
		ade7759_read_8bit,
		ade7759_write_8bit,
		ADE7759_SAGLVL);
static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
		ade7759_read_8bit,
		ade7759_write_8bit,
		ADE7759_LINECYC);
static IIO_DEV_ATTR_LENERGY(ade7759_read_40bit, ADE7759_LENERGY);
static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
		ade7759_read_8bit,
		ade7759_write_8bit,
		ADE7759_GAIN);
static IIO_DEV_ATTR_ACTIVE_POWER_GAIN(S_IWUSR | S_IRUGO,
		ade7759_read_16bit,
		ade7759_write_16bit,
		ADE7759_APGAIN);
static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
		ade7759_read_8bit,
		ade7759_write_8bit,
		ADE7759_CH1OS);
static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
		ade7759_read_8bit,
		ade7759_write_8bit,
		ADE7759_CH2OS);

static int ade7759_set_irq(struct device *dev, bool enable)
{
	int ret;
	u8 irqen;
	ret = ade7759_spi_read_reg_8(dev, ADE7759_IRQEN, &irqen);
	if (ret)
		goto error_ret;

	if (enable)
		irqen |= 1 << 3; /* Enables an interrupt when a data is
				    present in the waveform register */
	else
		irqen &= ~(1 << 3);

	ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);

error_ret:
	return ret;
}

/* Power down the device */
static int ade7759_stop_device(struct device *dev)
{
	u16 val;

	ade7759_spi_read_reg_16(dev,
			ADE7759_MODE,
			&val);
	val |= 1 << 4;  /* AD converters can be turned off */

	return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
}

static int ade7759_initial_setup(struct iio_dev *indio_dev)
{
	int ret;
	struct ade7759_state *st = iio_priv(indio_dev);
	struct device *dev = &indio_dev->dev;

	/* use low spi speed for init */
	st->us->mode = SPI_MODE_3;
	spi_setup(st->us);

	/* Disable IRQ */
	ret = ade7759_set_irq(dev, false);
	if (ret) {
		dev_err(dev, "disable irq failed");
		goto err_ret;
	}

	ade7759_reset(dev);
	msleep(ADE7759_STARTUP_DELAY);

err_ret:
	return ret;
}

static ssize_t ade7759_read_frequency(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u16 t;
	int sps;
	ret = ade7759_spi_read_reg_16(dev,
			ADE7759_MODE,
			&t);
	if (ret)
		return ret;

	t = (t >> 3) & 0x3;
	sps = 27900 / (1 + t);

	return sprintf(buf, "%d\n", sps);
}

static ssize_t ade7759_write_frequency(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7759_state *st = iio_priv(indio_dev);
	unsigned long val;
	int ret;
	u16 reg, t;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		return ret;
	if (val == 0)
		return -EINVAL;

	mutex_lock(&indio_dev->mlock);

	t = (27900 / val);
	if (t > 0)
		t--;

	if (t > 1)
		st->us->max_speed_hz = ADE7759_SPI_SLOW;
	else
		st->us->max_speed_hz = ADE7759_SPI_FAST;

	ret = ade7759_spi_read_reg_16(dev, ADE7759_MODE, &reg);
	if (ret)
		goto out;

	reg &= ~(3 << 13);
	reg |= t << 13;

	ret = ade7759_spi_write_reg_16(dev, ADE7759_MODE, reg);

out:
	mutex_unlock(&indio_dev->mlock);

	return ret ? ret : len;
}
static IIO_DEV_ATTR_TEMP_RAW(ade7759_read_8bit);
static IIO_CONST_ATTR(in_temp_offset, "70 C");
static IIO_CONST_ATTR(in_temp_scale, "1 C");

static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
		ade7759_read_frequency,
		ade7759_write_frequency);

static IIO_DEV_ATTR_RESET(ade7759_write_reset);

static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");

static struct attribute *ade7759_attributes[] = {
	&iio_dev_attr_in_temp_raw.dev_attr.attr,
	&iio_const_attr_in_temp_offset.dev_attr.attr,
	&iio_const_attr_in_temp_scale.dev_attr.attr,
	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	&iio_dev_attr_reset.dev_attr.attr,
	&iio_dev_attr_phcal.dev_attr.attr,
	&iio_dev_attr_cfden.dev_attr.attr,
	&iio_dev_attr_aenergy.dev_attr.attr,
	&iio_dev_attr_cfnum.dev_attr.attr,
	&iio_dev_attr_apos.dev_attr.attr,
	&iio_dev_attr_sagcyc.dev_attr.attr,
	&iio_dev_attr_saglvl.dev_attr.attr,
	&iio_dev_attr_linecyc.dev_attr.attr,
	&iio_dev_attr_lenergy.dev_attr.attr,
	&iio_dev_attr_chksum.dev_attr.attr,
	&iio_dev_attr_pga_gain.dev_attr.attr,
	&iio_dev_attr_active_power_gain.dev_attr.attr,
	&iio_dev_attr_choff_1.dev_attr.attr,
	&iio_dev_attr_choff_2.dev_attr.attr,
	NULL,
};

static const struct attribute_group ade7759_attribute_group = {
	.attrs = ade7759_attributes,
};

static const struct iio_info ade7759_info = {
	.attrs = &ade7759_attribute_group,
	.driver_module = THIS_MODULE,
};

static int __devinit ade7759_probe(struct spi_device *spi)
{
	int ret;
	struct ade7759_state *st;
	struct iio_dev *indio_dev;

	/* setup the industrialio driver allocated elements */
	indio_dev = iio_device_alloc(sizeof(*st));
	if (indio_dev == NULL) {
		ret = -ENOMEM;
		goto error_ret;
	}
	/* this is only used for removal purposes */
	spi_set_drvdata(spi, indio_dev);

	st = iio_priv(indio_dev);
	st->us = spi;
	mutex_init(&st->buf_lock);
	indio_dev->name = spi->dev.driver->name;
	indio_dev->dev.parent = &spi->dev;
	indio_dev->info = &ade7759_info;
	indio_dev->modes = INDIO_DIRECT_MODE;

	/* Get the device into a sane initial state */
	ret = ade7759_initial_setup(indio_dev);
	if (ret)
		goto error_free_dev;

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_free_dev;

	return 0;

error_free_dev:
	iio_device_free(indio_dev);
error_ret:
	return ret;
}

/* fixme, confirm ordering in this function */
static int ade7759_remove(struct spi_device *spi)
{
	int ret;
	struct iio_dev *indio_dev = spi_get_drvdata(spi);

	iio_device_unregister(indio_dev);
	ret = ade7759_stop_device(&(indio_dev->dev));
	if (ret)
		goto err_ret;

	iio_device_free(indio_dev);

err_ret:
	return ret;
}

static struct spi_driver ade7759_driver = {
	.driver = {
		.name = "ade7759",
		.owner = THIS_MODULE,
	},
	.probe = ade7759_probe,
	.remove = __devexit_p(ade7759_remove),
};
module_spi_driver(ade7759_driver);

MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
MODULE_DESCRIPTION("Analog Devices ADE7759 Active Energy Metering IC Driver");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:ad7759");
Commit	Line	Data
2919fa54 BS	1	/*
	2	* ADE7759 Active Energy Metering IC with di/dt Sensor Interface Driver
	3	*
	4	* Copyright 2010 Analog Devices Inc.
	5	*
	6	* Licensed under the GPL-2 or later.
	7	*/
	8
	9	#include <linux/interrupt.h>
	10	#include <linux/irq.h>
2919fa54 BS	11	#include <linux/delay.h>
	12	#include <linux/mutex.h>
	13	#include <linux/device.h>
	14	#include <linux/kernel.h>
	15	#include <linux/spi/spi.h>
	16	#include <linux/slab.h>
	17	#include <linux/sysfs.h>
	18	#include <linux/list.h>
99c97852	19	#include <linux/module.h>
2919fa54	20
06458e27 JC	21	#include <linux/iio/iio.h>
06458e27 JC	22	#include <linux/iio/sysfs.h>
2919fa54 BS	23	#include "meter.h"
	24	#include "ade7759.h"
	25
3859faca	26	static int ade7759_spi_write_reg_8(struct device *dev,
2919fa54 BS	27	u8 reg_address,
	28	u8 val)
	29	{
	30	int ret;
196b59c1	31	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
afc2ff0a	32	struct ade7759_state *st = iio_priv(indio_dev);
2919fa54 BS	33
	34	mutex_lock(&st->buf_lock);
	35	st->tx[0] = ADE7759_WRITE_REG(reg_address);
	36	st->tx[1] = val;
	37
	38	ret = spi_write(st->us, st->tx, 2);
	39	mutex_unlock(&st->buf_lock);
	40
	41	return ret;
	42	}
	43
	44	static int ade7759_spi_write_reg_16(struct device *dev,
	45	u8 reg_address,
	46	u16 value)
	47	{
	48	int ret;
196b59c1	49	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
afc2ff0a	50	struct ade7759_state *st = iio_priv(indio_dev);
2919fa54 BS	51
	52	mutex_lock(&st->buf_lock);
	53	st->tx[0] = ADE7759_WRITE_REG(reg_address);
	54	st->tx[1] = (value >> 8) & 0xFF;
	55	st->tx[2] = value & 0xFF;
3859faca	56	ret = spi_write(st->us, st->tx, 3);
2919fa54 BS	57	mutex_unlock(&st->buf_lock);
	58
	59	return ret;
	60	}
	61
	62	static int ade7759_spi_read_reg_8(struct device *dev,
	63	u8 reg_address,
	64	u8 *val)
	65	{
196b59c1	66	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
afc2ff0a	67	struct ade7759_state *st = iio_priv(indio_dev);
2919fa54	68	int ret;
2919fa54	69
3859faca JC	70	ret = spi_w8r8(st->us, ADE7759_READ_REG(reg_address));
3859faca JC	71	if (ret < 0) {
2919fa54 BS	72	dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
2919fa54 BS	73	reg_address);
3859faca	74	return ret;
2919fa54	75	}
3859faca	76	*val = ret;
2919fa54	77
3859faca	78	return 0;
2919fa54 BS	79	}
	80
	81	static int ade7759_spi_read_reg_16(struct device *dev,
	82	u8 reg_address,
	83	u16 *val)
	84	{
196b59c1	85	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
afc2ff0a	86	struct ade7759_state *st = iio_priv(indio_dev);
2919fa54	87	int ret;
2919fa54	88
3859faca JC	89	ret = spi_w8r16(st->us, ADE7759_READ_REG(reg_address));
3859faca JC	90	if (ret < 0) {
2919fa54	91	dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
3859faca JC	92	reg_address);
3859faca JC	93	return ret;
2919fa54	94	}
2919fa54	95
3859faca JC	96	*val = ret;
	97	*val = be16_to_cpup(val);
	98
	99	return 0;
2919fa54 BS	100	}
	101
	102	static int ade7759_spi_read_reg_40(struct device *dev,
	103	u8 reg_address,
	104	u64 *val)
	105	{
	106	struct spi_message msg;
196b59c1	107	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
afc2ff0a	108	struct ade7759_state *st = iio_priv(indio_dev);
2919fa54 BS	109	int ret;
	110	struct spi_transfer xfers[] = {
	111	{
	112	.tx_buf = st->tx,
	113	.rx_buf = st->rx,
	114	.bits_per_word = 8,
	115	.len = 6,
	116	},
	117	};
	118
	119	mutex_lock(&st->buf_lock);
	120	st->tx[0] = ADE7759_READ_REG(reg_address);
	121	memset(&st->tx[1], 0 , 5);
	122
	123	spi_message_init(&msg);
	124	spi_message_add_tail(xfers, &msg);
	125	ret = spi_sync(st->us, &msg);
	126	if (ret) {
	127	dev_err(&st->us->dev, "problem when reading 40 bit register 0x%02X",
	128	reg_address);
	129	goto error_ret;
	130	}
	131	*val = ((u64)st->rx[1] << 32) \| (st->rx[2] << 24) \|
	132	(st->rx[3] << 16) \| (st->rx[4] << 8) \| st->rx[5];
	133
	134	error_ret:
	135	mutex_unlock(&st->buf_lock);
	136	return ret;
	137	}
	138
	139	static ssize_t ade7759_read_8bit(struct device *dev,
	140	struct device_attribute *attr,
	141	char *buf)
	142	{
	143	int ret;
	144	u8 val = 0;
	145	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	146
	147	ret = ade7759_spi_read_reg_8(dev, this_attr->address, &val);
	148	if (ret)
	149	return ret;
	150
	151	return sprintf(buf, "%u\n", val);
	152	}
	153
	154	static ssize_t ade7759_read_16bit(struct device *dev,
	155	struct device_attribute *attr,
	156	char *buf)
	157	{
	158	int ret;
	159	u16 val = 0;
	160	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	161
	162	ret = ade7759_spi_read_reg_16(dev, this_attr->address, &val);
	163	if (ret)
	164	return ret;
	165
	166	return sprintf(buf, "%u\n", val);
	167	}
	168
	169	static ssize_t ade7759_read_40bit(struct device *dev,
	170	struct device_attribute *attr,
	171	char *buf)
	172	{
173	int ret;
174	u64 val = 0;
175	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
176
177	ret = ade7759_spi_read_reg_40(dev, this_attr->address, &val);
178	if (ret)
179	return ret;
180
181	return sprintf(buf, "%llu\n", val);
182	}
183
184	static ssize_t ade7759_write_8bit(struct device *dev,
185	struct device_attribute *attr,
186	const char *buf,
187	size_t len)
188	{
189	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
190	int ret;
191	long val;
192
193	ret = strict_strtol(buf, 10, &val);
194	if (ret)
195	goto error_ret;
196	ret = ade7759_spi_write_reg_8(dev, this_attr->address, val);
197
198	error_ret:
199	return ret ? ret : len;
200	}
201
202	static ssize_t ade7759_write_16bit(struct device *dev,
203	struct device_attribute *attr,
204	const char *buf,
205	size_t len)
206	{
207	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
208	int ret;
209	long val;
210
211	ret = strict_strtol(buf, 10, &val);
212	if (ret)
213	goto error_ret;
214	ret = ade7759_spi_write_reg_16(dev, this_attr->address, val);
215
216	error_ret:
217	return ret ? ret : len;
218	}
219
220	static int ade7759_reset(struct device *dev)
221	{
222	int ret;
223	u16 val;
224	ade7759_spi_read_reg_16(dev,
225	ADE7759_MODE,
226	&val);
227	val \|= 1 << 6; /* Software Chip Reset */
228	ret = ade7759_spi_write_reg_16(dev,
229	ADE7759_MODE,
230	val);
231
232	return ret;
233	}
234
235	static ssize_t ade7759_write_reset(struct device *dev,
236	struct device_attribute *attr,
237	const char *buf, size_t len)
238	{
239	if (len < 1)
240	return -1;
241	switch (buf[0]) {
242	case '1':
243	case 'y':
244	case 'Y':
245	return ade7759_reset(dev);
246	}
247	return -1;
248	}
249
250	static IIO_DEV_ATTR_AENERGY(ade7759_read_40bit, ADE7759_AENERGY);
251	static IIO_DEV_ATTR_CFDEN(S_IWUSR \| S_IRUGO,
252	ade7759_read_16bit,
253	ade7759_write_16bit,
254	ADE7759_CFDEN);
255	static IIO_DEV_ATTR_CFNUM(S_IWUSR \| S_IRUGO,
256	ade7759_read_8bit,
257	ade7759_write_8bit,
258	ADE7759_CFNUM);
259	static IIO_DEV_ATTR_CHKSUM(ade7759_read_8bit, ADE7759_CHKSUM);
260	static IIO_DEV_ATTR_PHCAL(S_IWUSR \| S_IRUGO,
261	ade7759_read_16bit,
262	ade7759_write_16bit,
263	ADE7759_PHCAL);
264	static IIO_DEV_ATTR_APOS(S_IWUSR \| S_IRUGO,
265	ade7759_read_16bit,
266	ade7759_write_16bit,
267	ADE7759_APOS);
268	static IIO_DEV_ATTR_SAGCYC(S_IWUSR \| S_IRUGO,
269	ade7759_read_8bit,
270	ade7759_write_8bit,
271	ADE7759_SAGCYC);
272	static IIO_DEV_ATTR_SAGLVL(S_IWUSR \| S_IRUGO,
273	ade7759_read_8bit,
274	ade7759_write_8bit,
275	ADE7759_SAGLVL);
276	static IIO_DEV_ATTR_LINECYC(S_IWUSR \| S_IRUGO,
277	ade7759_read_8bit,
278	ade7759_write_8bit,
279	ADE7759_LINECYC);
280	static IIO_DEV_ATTR_LENERGY(ade7759_read_40bit, ADE7759_LENERGY);
281	static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR \| S_IRUGO,
282	ade7759_read_8bit,
283	ade7759_write_8bit,
284	ADE7759_GAIN);
285	static IIO_DEV_ATTR_ACTIVE_POWER_GAIN(S_IWUSR \| S_IRUGO,
286	ade7759_read_16bit,
287	ade7759_write_16bit,
288	ADE7759_APGAIN);
289	static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR \| S_IRUGO,
290	ade7759_read_8bit,
291	ade7759_write_8bit,
292	ADE7759_CH1OS);
293	static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR \| S_IRUGO,
294	ade7759_read_8bit,
295	ade7759_write_8bit,
296	ADE7759_CH2OS);
297
298	static int ade7759_set_irq(struct device *dev, bool enable)
299	{
300	int ret;
301	u8 irqen;
302	ret = ade7759_spi_read_reg_8(dev, ADE7759_IRQEN, &irqen);
303	if (ret)
304	goto error_ret;
305
306	if (enable)
307	irqen \|= 1 << 3; /* Enables an interrupt when a data is
308	present in the waveform register */
309	else
310	irqen &= ~(1 << 3);
311
312	ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);
2919fa54 BS	313
	314	error_ret:
	315	return ret;
	316	}
	317
	318	/* Power down the device */
3859faca	319	static int ade7759_stop_device(struct device *dev)
2919fa54	320	{
2919fa54	321	u16 val;
3859faca	322
2919fa54 BS	323	ade7759_spi_read_reg_16(dev,
	324	ADE7759_MODE,
	325	&val);
	326	val \|= 1 << 4; /* AD converters can be turned off */
2919fa54	327
3859faca	328	return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
2919fa54 BS	329	}
2919fa54 BS	330
afc2ff0a	331	static int ade7759_initial_setup(struct iio_dev *indio_dev)
2919fa54 BS	332	{
2919fa54 BS	333	int ret;
afc2ff0a JC	334	struct ade7759_state *st = iio_priv(indio_dev);
afc2ff0a JC	335	struct device *dev = &indio_dev->dev;
2919fa54 BS	336
	337	/* use low spi speed for init */
	338	st->us->mode = SPI_MODE_3;
	339	spi_setup(st->us);
	340
	341	/* Disable IRQ */
	342	ret = ade7759_set_irq(dev, false);
	343	if (ret) {
	344	dev_err(dev, "disable irq failed");
	345	goto err_ret;
	346	}
	347
	348	ade7759_reset(dev);
	349	msleep(ADE7759_STARTUP_DELAY);
	350
	351	err_ret:
	352	return ret;
	353	}
	354
	355	static ssize_t ade7759_read_frequency(struct device *dev,
	356	struct device_attribute *attr,
	357	char *buf)
	358	{
3859faca	359	int ret;
2919fa54 BS	360	u16 t;
	361	int sps;
	362	ret = ade7759_spi_read_reg_16(dev,
	363	ADE7759_MODE,
	364	&t);
	365	if (ret)
	366	return ret;
	367
	368	t = (t >> 3) & 0x3;
	369	sps = 27900 / (1 + t);
	370
3859faca	371	return sprintf(buf, "%d\n", sps);
2919fa54 BS	372	}
	373
	374	static ssize_t ade7759_write_frequency(struct device *dev,
	375	struct device_attribute *attr,
	376	const char *buf,
	377	size_t len)
	378	{
196b59c1	379	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
afc2ff0a	380	struct ade7759_state *st = iio_priv(indio_dev);
2919fa54 BS	381	unsigned long val;
	382	int ret;
	383	u16 reg, t;
	384
	385	ret = strict_strtol(buf, 10, &val);
	386	if (ret)
	387	return ret;
50d4b306 DC	388	if (val == 0)
50d4b306 DC	389	return -EINVAL;
2919fa54 BS	390
	391	mutex_lock(&indio_dev->mlock);
	392
	393	t = (27900 / val);
	394	if (t > 0)
	395	t--;
	396
	397	if (t > 1)
	398	st->us->max_speed_hz = ADE7759_SPI_SLOW;
	399	else
	400	st->us->max_speed_hz = ADE7759_SPI_FAST;
	401
3859faca	402	ret = ade7759_spi_read_reg_16(dev, ADE7759_MODE, &reg);
2919fa54 BS	403	if (ret)
	404	goto out;
	405
	406	reg &= ~(3 << 13);
	407	reg \|= t << 13;
	408
3859faca	409	ret = ade7759_spi_write_reg_16(dev, ADE7759_MODE, reg);
2919fa54 BS	410
	411	out:
	412	mutex_unlock(&indio_dev->mlock);
	413
	414	return ret ? ret : len;
	415	}
	416	static IIO_DEV_ATTR_TEMP_RAW(ade7759_read_8bit);
322c9563 JC	417	static IIO_CONST_ATTR(in_temp_offset, "70 C");
322c9563 JC	418	static IIO_CONST_ATTR(in_temp_scale, "1 C");
2919fa54 BS	419
	420	static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR \| S_IRUGO,
	421	ade7759_read_frequency,
	422	ade7759_write_frequency);
	423
	424	static IIO_DEV_ATTR_RESET(ade7759_write_reset);
	425
	426	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
	427
2919fa54	428	static struct attribute *ade7759_attributes[] = {
322c9563 JC	429	&iio_dev_attr_in_temp_raw.dev_attr.attr,
	430	&iio_const_attr_in_temp_offset.dev_attr.attr,
	431	&iio_const_attr_in_temp_scale.dev_attr.attr,
2919fa54 BS	432	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	433	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	434	&iio_dev_attr_reset.dev_attr.attr,
2919fa54 BS	435	&iio_dev_attr_phcal.dev_attr.attr,
	436	&iio_dev_attr_cfden.dev_attr.attr,
	437	&iio_dev_attr_aenergy.dev_attr.attr,
	438	&iio_dev_attr_cfnum.dev_attr.attr,
	439	&iio_dev_attr_apos.dev_attr.attr,
	440	&iio_dev_attr_sagcyc.dev_attr.attr,
	441	&iio_dev_attr_saglvl.dev_attr.attr,
	442	&iio_dev_attr_linecyc.dev_attr.attr,
	443	&iio_dev_attr_lenergy.dev_attr.attr,
	444	&iio_dev_attr_chksum.dev_attr.attr,
	445	&iio_dev_attr_pga_gain.dev_attr.attr,
	446	&iio_dev_attr_active_power_gain.dev_attr.attr,
	447	&iio_dev_attr_choff_1.dev_attr.attr,
	448	&iio_dev_attr_choff_2.dev_attr.attr,
	449	NULL,
	450	};
	451
	452	static const struct attribute_group ade7759_attribute_group = {
	453	.attrs = ade7759_attributes,
	454	};
	455
6fe8135f JC	456	static const struct iio_info ade7759_info = {
	457	.attrs = &ade7759_attribute_group,
	458	.driver_module = THIS_MODULE,
	459	};
	460
2919fa54 BS	461	static int __devinit ade7759_probe(struct spi_device *spi)
2919fa54 BS	462	{
3859faca	463	int ret;
afc2ff0a JC	464	struct ade7759_state *st;
	465	struct iio_dev *indio_dev;
	466
	467	/* setup the industrialio driver allocated elements */
7cbb7537	468	indio_dev = iio_device_alloc(sizeof(*st));
afc2ff0a JC	469	if (indio_dev == NULL) {
afc2ff0a JC	470	ret = -ENOMEM;
2919fa54 BS	471	goto error_ret;
	472	}
	473	/* this is only used for removal purposes */
afc2ff0a	474	spi_set_drvdata(spi, indio_dev);
2919fa54	475
afc2ff0a	476	st = iio_priv(indio_dev);
2919fa54 BS	477	st->us = spi;
2919fa54 BS	478	mutex_init(&st->buf_lock);
afc2ff0a JC	479	indio_dev->name = spi->dev.driver->name;
	480	indio_dev->dev.parent = &spi->dev;
	481	indio_dev->info = &ade7759_info;
	482	indio_dev->modes = INDIO_DIRECT_MODE;
2919fa54	483
26d25ae3 JC	484	/* Get the device into a sane initial state */
26d25ae3 JC	485	ret = ade7759_initial_setup(indio_dev);
2919fa54	486	if (ret)
3859faca	487	goto error_free_dev;
2919fa54	488
26d25ae3	489	ret = iio_device_register(indio_dev);
2919fa54	490	if (ret)
26d25ae3	491	goto error_free_dev;
2919fa54	492
26d25ae3	493	return 0;
3859faca	494
2919fa54	495	error_free_dev:
7cbb7537	496	iio_device_free(indio_dev);
2919fa54 BS	497	error_ret:
	498	return ret;
	499	}
	500
	501	/* fixme, confirm ordering in this function */
	502	static int ade7759_remove(struct spi_device *spi)
	503	{
	504	int ret;
afc2ff0a	505	struct iio_dev *indio_dev = spi_get_drvdata(spi);
2919fa54	506
d2fffd6c	507	iio_device_unregister(indio_dev);
2919fa54 BS	508	ret = ade7759_stop_device(&(indio_dev->dev));
	509	if (ret)
	510	goto err_ret;
	511
7cbb7537	512	iio_device_free(indio_dev);
2919fa54 BS	513
	514	err_ret:
	515	return ret;
	516	}
	517
	518	static struct spi_driver ade7759_driver = {
	519	.driver = {
	520	.name = "ade7759",
	521	.owner = THIS_MODULE,
	522	},
	523	.probe = ade7759_probe,
	524	.remove = __devexit_p(ade7759_remove),
	525	};
ae6ae6fe	526	module_spi_driver(ade7759_driver);
2919fa54 BS	527
	528	MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
	529	MODULE_DESCRIPTION("Analog Devices ADE7759 Active Energy Metering IC Driver");
	530	MODULE_LICENSE("GPL v2");
55e4390c	531	MODULE_ALIAS("spi:ad7759");