[deliverable/linux.git] / drivers / staging / imx-drm / imx-ldb.c

/*
 * i.MX drm driver - LVDS display bridge
 *
 * Copyright (C) 2012 Sascha Hauer, Pengutronix
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/module.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <drm/drmP.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <video/of_videomode.h>
#include <linux/regmap.h>
#include <linux/videodev2.h>

#include "imx-drm.h"

#define DRIVER_NAME "imx-ldb"

#define LDB_CH0_MODE_EN_TO_DI0		(1 << 0)
#define LDB_CH0_MODE_EN_TO_DI1		(3 << 0)
#define LDB_CH0_MODE_EN_MASK		(3 << 0)
#define LDB_CH1_MODE_EN_TO_DI0		(1 << 2)
#define LDB_CH1_MODE_EN_TO_DI1		(3 << 2)
#define LDB_CH1_MODE_EN_MASK		(3 << 2)
#define LDB_SPLIT_MODE_EN		(1 << 4)
#define LDB_DATA_WIDTH_CH0_24		(1 << 5)
#define LDB_BIT_MAP_CH0_JEIDA		(1 << 6)
#define LDB_DATA_WIDTH_CH1_24		(1 << 7)
#define LDB_BIT_MAP_CH1_JEIDA		(1 << 8)
#define LDB_DI0_VS_POL_ACT_LOW		(1 << 9)
#define LDB_DI1_VS_POL_ACT_LOW		(1 << 10)
#define LDB_BGREF_RMODE_INT		(1 << 15)

#define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
#define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)

struct imx_ldb;

struct imx_ldb_channel {
	struct imx_ldb *ldb;
	struct drm_connector connector;
	struct imx_drm_connector *imx_drm_connector;
	struct drm_encoder encoder;
	struct imx_drm_encoder *imx_drm_encoder;
	int chno;
	void *edid;
	int edid_len;
	struct drm_display_mode mode;
	int mode_valid;
};

struct bus_mux {
	int reg;
	int shift;
	int mask;
};

struct imx_ldb {
	struct regmap *regmap;
	struct device *dev;
	struct imx_ldb_channel channel[2];
	struct clk *clk[2]; /* our own clock */
	struct clk *clk_sel[4]; /* parent of display clock */
	struct clk *clk_pll[2]; /* upstream clock we can adjust */
	u32 ldb_ctrl;
	const struct bus_mux *lvds_mux;
};

static enum drm_connector_status imx_ldb_connector_detect(
		struct drm_connector *connector, bool force)
{
	return connector_status_connected;
}

static void imx_ldb_connector_destroy(struct drm_connector *connector)
{
	/* do not free here */
}

static int imx_ldb_connector_get_modes(struct drm_connector *connector)
{
	struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
	int num_modes = 0;

	if (imx_ldb_ch->edid) {
		drm_mode_connector_update_edid_property(connector,
							imx_ldb_ch->edid);
		num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
	}

	if (imx_ldb_ch->mode_valid) {
		struct drm_display_mode *mode;

		mode = drm_mode_create(connector->dev);
		drm_mode_copy(mode, &imx_ldb_ch->mode);
		mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
		drm_mode_probed_add(connector, mode);
		num_modes++;
	}

	return num_modes;
}

static struct drm_encoder *imx_ldb_connector_best_encoder(
		struct drm_connector *connector)
{
	struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);

	return &imx_ldb_ch->encoder;
}

static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
{
}

static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
			   const struct drm_display_mode *mode,
			   struct drm_display_mode *adjusted_mode)
{
	return true;
}

static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
		unsigned long serial_clk, unsigned long di_clk)
{
	int ret;

	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
			clk_get_rate(ldb->clk_pll[chno]), serial_clk);
	clk_set_rate(ldb->clk_pll[chno], serial_clk);

	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
			clk_get_rate(ldb->clk_pll[chno]));

	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
			clk_get_rate(ldb->clk[chno]),
			(long int)di_clk);
	clk_set_rate(ldb->clk[chno], di_clk);

	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
			clk_get_rate(ldb->clk[chno]));

	/* set display clock mux to LDB input clock */
	ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
	if (ret)
		dev_err(ldb->dev, "unable to set di%d parent clock to ldb_di%d\n", mux, chno);
}

static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
{
	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
	struct imx_ldb *ldb = imx_ldb_ch->ldb;
	struct drm_display_mode *mode = &encoder->crtc->mode;
	u32 pixel_fmt;
	unsigned long serial_clk;
	unsigned long di_clk = mode->clock * 1000;
	int mux = imx_drm_encoder_get_mux_id(encoder);

	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
		/* dual channel LVDS mode */
		serial_clk = 3500UL * mode->clock;
		imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
		imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
	} else {
		serial_clk = 7000UL * mode->clock;
		imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk, di_clk);
	}

	switch (imx_ldb_ch->chno) {
	case 0:
		pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
			V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
		break;
	case 1:
		pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
			V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
		break;
	default:
		dev_err(ldb->dev, "unable to config di%d panel format\n",
			imx_ldb_ch->chno);
		pixel_fmt = V4L2_PIX_FMT_RGB24;
	}

	imx_drm_panel_format(encoder, pixel_fmt);
}

static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
{
	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
	struct imx_ldb *ldb = imx_ldb_ch->ldb;
	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
	int mux = imx_drm_encoder_get_mux_id(encoder);

	if (dual) {
		clk_prepare_enable(ldb->clk[0]);
		clk_prepare_enable(ldb->clk[1]);
	}

	if (imx_ldb_ch == &ldb->channel[0] || dual) {
		ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
		if (mux == 0 || ldb->lvds_mux)
			ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
		else if (mux == 1)
			ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
	}
	if (imx_ldb_ch == &ldb->channel[1] || dual) {
		ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
		if (mux == 1 || ldb->lvds_mux)
			ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
		else if (mux == 0)
			ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
	}

	if (ldb->lvds_mux) {
		const struct bus_mux *lvds_mux = NULL;

		if (imx_ldb_ch == &ldb->channel[0])
			lvds_mux = &ldb->lvds_mux[0];
		else if (imx_ldb_ch == &ldb->channel[1])
			lvds_mux = &ldb->lvds_mux[1];

		regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
				   mux << lvds_mux->shift);
	}

	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
}

static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
			 struct drm_display_mode *mode,
			 struct drm_display_mode *adjusted_mode)
{
	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
	struct imx_ldb *ldb = imx_ldb_ch->ldb;
	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;

	if (mode->clock > 170000) {
		dev_warn(ldb->dev,
			 "%s: mode exceeds 170 MHz pixel clock\n", __func__);
	}
	if (mode->clock > 85000 && !dual) {
		dev_warn(ldb->dev,
			 "%s: mode exceeds 85 MHz pixel clock\n", __func__);
	}

	/* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
	if (imx_ldb_ch == &ldb->channel[0]) {
		if (mode->flags & DRM_MODE_FLAG_NVSYNC)
			ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
		else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
			ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
	}
	if (imx_ldb_ch == &ldb->channel[1]) {
		if (mode->flags & DRM_MODE_FLAG_NVSYNC)
			ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
		else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
			ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
	}
}

static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
{
	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
	struct imx_ldb *ldb = imx_ldb_ch->ldb;

	/*
	 * imx_ldb_encoder_disable is called by
	 * drm_helper_disable_unused_functions without
	 * the encoder being enabled before.
	 */
	if (imx_ldb_ch == &ldb->channel[0] &&
	    (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
		return;
	else if (imx_ldb_ch == &ldb->channel[1] &&
		 (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
		return;

	if (imx_ldb_ch == &ldb->channel[0])
		ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
	else if (imx_ldb_ch == &ldb->channel[1])
		ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;

	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);

	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
		clk_disable_unprepare(ldb->clk[0]);
		clk_disable_unprepare(ldb->clk[1]);
	}
}

static void imx_ldb_encoder_destroy(struct drm_encoder *encoder)
{
	/* do not free here */
}

static struct drm_connector_funcs imx_ldb_connector_funcs = {
	.dpms = drm_helper_connector_dpms,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.detect = imx_ldb_connector_detect,
	.destroy = imx_ldb_connector_destroy,
};

static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
	.get_modes = imx_ldb_connector_get_modes,
	.best_encoder = imx_ldb_connector_best_encoder,
	.mode_valid = imx_drm_connector_mode_valid,
};

static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
	.destroy = imx_ldb_encoder_destroy,
};

static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
	.dpms = imx_ldb_encoder_dpms,
	.mode_fixup = imx_ldb_encoder_mode_fixup,
	.prepare = imx_ldb_encoder_prepare,
	.commit = imx_ldb_encoder_commit,
	.mode_set = imx_ldb_encoder_mode_set,
	.disable = imx_ldb_encoder_disable,
};

static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
{
	char clkname[16];

	sprintf(clkname, "di%d", chno);
	ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
	if (IS_ERR(ldb->clk[chno]))
		return PTR_ERR(ldb->clk[chno]);

	sprintf(clkname, "di%d_pll", chno);
	ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);

	return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
}

static int imx_ldb_register(struct imx_ldb_channel *imx_ldb_ch)
{
	int ret;
	struct imx_ldb *ldb = imx_ldb_ch->ldb;

	ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
	if (ret)
		return ret;
	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
		ret |= imx_ldb_get_clk(ldb, 1);
		if (ret)
			return ret;
	}

	imx_ldb_ch->connector.funcs = &imx_ldb_connector_funcs;
	imx_ldb_ch->encoder.funcs = &imx_ldb_encoder_funcs;

	imx_ldb_ch->encoder.encoder_type = DRM_MODE_ENCODER_LVDS;
	imx_ldb_ch->connector.connector_type = DRM_MODE_CONNECTOR_LVDS;

	drm_encoder_helper_add(&imx_ldb_ch->encoder,
			&imx_ldb_encoder_helper_funcs);
	ret = imx_drm_add_encoder(&imx_ldb_ch->encoder,
			&imx_ldb_ch->imx_drm_encoder, THIS_MODULE);
	if (ret) {
		dev_err(ldb->dev, "adding encoder failed with %d\n", ret);
		return ret;
	}

	drm_connector_helper_add(&imx_ldb_ch->connector,
			&imx_ldb_connector_helper_funcs);

	ret = imx_drm_add_connector(&imx_ldb_ch->connector,
			&imx_ldb_ch->imx_drm_connector, THIS_MODULE);
	if (ret) {
		imx_drm_remove_encoder(imx_ldb_ch->imx_drm_encoder);
		dev_err(ldb->dev, "adding connector failed with %d\n", ret);
		return ret;
	}

	drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
			&imx_ldb_ch->encoder);

	return 0;
}

enum {
	LVDS_BIT_MAP_SPWG,
	LVDS_BIT_MAP_JEIDA
};

static const char * const imx_ldb_bit_mappings[] = {
	[LVDS_BIT_MAP_SPWG]  = "spwg",
	[LVDS_BIT_MAP_JEIDA] = "jeida",
};

static const int of_get_data_mapping(struct device_node *np)
{
	const char *bm;
	int ret, i;

	ret = of_property_read_string(np, "fsl,data-mapping", &bm);
	if (ret < 0)
		return ret;

	for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++)
		if (!strcasecmp(bm, imx_ldb_bit_mappings[i]))
			return i;

	return -EINVAL;
}

static struct bus_mux imx6q_lvds_mux[2] = {
	{
		.reg = IOMUXC_GPR3,
		.shift = 6,
		.mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
	}, {
		.reg = IOMUXC_GPR3,
		.shift = 8,
		.mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
	}
};

/*
 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 * of_match_device will walk through this list and take the first entry
 * matching any of its compatible values. Therefore, the more generic
 * entries (in this case fsl,imx53-ldb) need to be ordered last.
 */
static const struct of_device_id imx_ldb_dt_ids[] = {
	{ .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
	{ .compatible = "fsl,imx53-ldb", .data = NULL, },
	{ }
};
MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);

static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
{
	struct device_node *np = dev->of_node;
	const struct of_device_id *of_id =
			of_match_device(imx_ldb_dt_ids, dev);
	struct device_node *child;
	const u8 *edidp;
	struct imx_ldb *imx_ldb;
	int datawidth;
	int mapping;
	int dual;
	int ret;
	int i;

	imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
	if (!imx_ldb)
		return -ENOMEM;

	imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
	if (IS_ERR(imx_ldb->regmap)) {
		dev_err(dev, "failed to get parent regmap\n");
		return PTR_ERR(imx_ldb->regmap);
	}

	imx_ldb->dev = dev;

	if (of_id)
		imx_ldb->lvds_mux = of_id->data;

	dual = of_property_read_bool(np, "fsl,dual-channel");
	if (dual)
		imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;

	/*
	 * There are three different possible clock mux configurations:
	 * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
	 * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
	 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
	 * Map them all to di0_sel...di3_sel.
	 */
	for (i = 0; i < 4; i++) {
		char clkname[16];

		sprintf(clkname, "di%d_sel", i);
		imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
		if (IS_ERR(imx_ldb->clk_sel[i])) {
			ret = PTR_ERR(imx_ldb->clk_sel[i]);
			imx_ldb->clk_sel[i] = NULL;
			break;
		}
	}
	if (i == 0)
		return ret;

	for_each_child_of_node(np, child) {
		struct imx_ldb_channel *channel;

		ret = of_property_read_u32(child, "reg", &i);
		if (ret || i < 0 || i > 1)
			return -EINVAL;

		if (dual && i > 0) {
			dev_warn(dev, "dual-channel mode, ignoring second output\n");
			continue;
		}

		if (!of_device_is_available(child))
			continue;

		channel = &imx_ldb->channel[i];
		channel->ldb = imx_ldb;
		channel->chno = i;

		edidp = of_get_property(child, "edid", &channel->edid_len);
		if (edidp) {
			channel->edid = kmemdup(edidp, channel->edid_len,
						GFP_KERNEL);
		} else {
			ret = of_get_drm_display_mode(child, &channel->mode, 0);
			if (!ret)
				channel->mode_valid = 1;
		}

		ret = of_property_read_u32(child, "fsl,data-width", &datawidth);
		if (ret)
			datawidth = 0;
		else if (datawidth != 18 && datawidth != 24)
			return -EINVAL;

		mapping = of_get_data_mapping(child);
		switch (mapping) {
		case LVDS_BIT_MAP_SPWG:
			if (datawidth == 24) {
				if (i == 0 || dual)
					imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
				if (i == 1 || dual)
					imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
			}
			break;
		case LVDS_BIT_MAP_JEIDA:
			if (datawidth == 18) {
				dev_err(dev, "JEIDA standard only supported in 24 bit\n");
				return -EINVAL;
			}
			if (i == 0 || dual)
				imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 | LDB_BIT_MAP_CH0_JEIDA;
			if (i == 1 || dual)
				imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 | LDB_BIT_MAP_CH1_JEIDA;
			break;
		default:
			dev_err(dev, "data mapping not specified or invalid\n");
			return -EINVAL;
		}

		ret = imx_ldb_register(channel);
		if (ret)
			return ret;

		imx_drm_encoder_add_possible_crtcs(channel->imx_drm_encoder, child);
	}

	dev_set_drvdata(dev, imx_ldb);

	return 0;
}

static void imx_ldb_unbind(struct device *dev, struct device *master,
	void *data)
{
	struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
	int i;

	for (i = 0; i < 2; i++) {
		struct imx_ldb_channel *channel = &imx_ldb->channel[i];
		struct drm_connector *connector = &channel->connector;
		struct drm_encoder *encoder = &channel->encoder;

		drm_mode_connector_detach_encoder(connector, encoder);

		imx_drm_remove_connector(channel->imx_drm_connector);
		imx_drm_remove_encoder(channel->imx_drm_encoder);
	}
}

static const struct component_ops imx_ldb_ops = {
	.bind	= imx_ldb_bind,
	.unbind	= imx_ldb_unbind,
};

static int imx_ldb_probe(struct platform_device *pdev)
{
	return component_add(&pdev->dev, &imx_ldb_ops);
}

static int imx_ldb_remove(struct platform_device *pdev)
{
	component_del(&pdev->dev, &imx_ldb_ops);
	return 0;
}

static struct platform_driver imx_ldb_driver = {
	.probe		= imx_ldb_probe,
	.remove		= imx_ldb_remove,
	.driver		= {
		.of_match_table = imx_ldb_dt_ids,
		.name	= DRIVER_NAME,
		.owner	= THIS_MODULE,
	},
};

module_platform_driver(imx_ldb_driver);

MODULE_DESCRIPTION("i.MX LVDS driver");
MODULE_AUTHOR("Sascha Hauer, Pengutronix");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRIVER_NAME);
Commit	Line	Data
ac4c1a9b SH	1	/*
	2	* i.MX drm driver - LVDS display bridge
	3	*
	4	* Copyright (C) 2012 Sascha Hauer, Pengutronix
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version 2
	9	* of the License, or (at your option) any later version.
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	18	* MA 02110-1301, USA.
	19	*/
	20
	21	#include <linux/module.h>
	22	#include <linux/clk.h>
17b5001b	23	#include <linux/component.h>
ac4c1a9b SH	24	#include <drm/drmP.h>
	25	#include <drm/drm_fb_helper.h>
	26	#include <drm/drm_crtc_helper.h>
	27	#include <linux/mfd/syscon.h>
	28	#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
	29	#include <linux/of_address.h>
	30	#include <linux/of_device.h>
	31	#include <video/of_videomode.h>
	32	#include <linux/regmap.h>
	33	#include <linux/videodev2.h>
	34
	35	#include "imx-drm.h"
	36
	37	#define DRIVER_NAME "imx-ldb"
	38
	39	#define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
	40	#define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
	41	#define LDB_CH0_MODE_EN_MASK (3 << 0)
	42	#define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
	43	#define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
	44	#define LDB_CH1_MODE_EN_MASK (3 << 2)
	45	#define LDB_SPLIT_MODE_EN (1 << 4)
	46	#define LDB_DATA_WIDTH_CH0_24 (1 << 5)
	47	#define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
	48	#define LDB_DATA_WIDTH_CH1_24 (1 << 7)
	49	#define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
	50	#define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
	51	#define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
	52	#define LDB_BGREF_RMODE_INT (1 << 15)
	53
	54	#define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
	55	#define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
	56
	57	struct imx_ldb;
	58
	59	struct imx_ldb_channel {
	60	struct imx_ldb *ldb;
	61	struct drm_connector connector;
	62	struct imx_drm_connector *imx_drm_connector;
	63	struct drm_encoder encoder;
	64	struct imx_drm_encoder *imx_drm_encoder;
	65	int chno;
	66	void *edid;
	67	int edid_len;
	68	struct drm_display_mode mode;
	69	int mode_valid;
	70	};
	71
	72	struct bus_mux {
	73	int reg;
	74	int shift;
	75	int mask;
	76	};
	77
	78	struct imx_ldb {
	79	struct regmap *regmap;
	80	struct device *dev;
	81	struct imx_ldb_channel channel[2];
	82	struct clk clk[2]; / our own clock */
	83	struct clk clk_sel[4]; / parent of display clock */
	84	struct clk clk_pll[2]; / upstream clock we can adjust */
	85	u32 ldb_ctrl;
	86	const struct bus_mux *lvds_mux;
	87	};
88
89	static enum drm_connector_status imx_ldb_connector_detect(
90	struct drm_connector *connector, bool force)
91	{
92	return connector_status_connected;
93	}
94
95	static void imx_ldb_connector_destroy(struct drm_connector *connector)
96	{
97	/* do not free here */
98	}
99
100	static int imx_ldb_connector_get_modes(struct drm_connector *connector)
101	{
102	struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
103	int num_modes = 0;
104
105	if (imx_ldb_ch->edid) {
106	drm_mode_connector_update_edid_property(connector,
107	imx_ldb_ch->edid);
108	num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
109	}
110
111	if (imx_ldb_ch->mode_valid) {
112	struct drm_display_mode *mode;
113
114	mode = drm_mode_create(connector->dev);
115	drm_mode_copy(mode, &imx_ldb_ch->mode);
116	mode->type \|= DRM_MODE_TYPE_DRIVER \| DRM_MODE_TYPE_PREFERRED;
117	drm_mode_probed_add(connector, mode);
118	num_modes++;
119	}
120
121	return num_modes;
122	}
123
ac4c1a9b SH	124	static struct drm_encoder *imx_ldb_connector_best_encoder(
	125	struct drm_connector *connector)
	126	{
	127	struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
	128
	129	return &imx_ldb_ch->encoder;
	130	}
	131
	132	static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
	133	{
	134	}
	135
	136	static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
	137	const struct drm_display_mode *mode,
	138	struct drm_display_mode *adjusted_mode)
	139	{
	140	return true;
	141	}
	142
	143	static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
	144	unsigned long serial_clk, unsigned long di_clk)
	145	{
	146	int ret;
	147
	148	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
	149	clk_get_rate(ldb->clk_pll[chno]), serial_clk);
	150	clk_set_rate(ldb->clk_pll[chno], serial_clk);
	151
	152	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
	153	clk_get_rate(ldb->clk_pll[chno]));
	154
	155	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
	156	clk_get_rate(ldb->clk[chno]),
	157	(long int)di_clk);
	158	clk_set_rate(ldb->clk[chno], di_clk);
	159
	160	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
	161	clk_get_rate(ldb->clk[chno]));
	162
	163	/* set display clock mux to LDB input clock */
	164	ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
49f4a9c8	165	if (ret)
ac4c1a9b	166	dev_err(ldb->dev, "unable to set di%d parent clock to ldb_di%d\n", mux, chno);
ac4c1a9b SH	167	}
	168
	169	static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
	170	{
	171	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
	172	struct imx_ldb *ldb = imx_ldb_ch->ldb;
	173	struct drm_display_mode *mode = &encoder->crtc->mode;
000d73fc	174	u32 pixel_fmt;
ac4c1a9b SH	175	unsigned long serial_clk;
ac4c1a9b SH	176	unsigned long di_clk = mode->clock * 1000;
e76171b0	177	int mux = imx_drm_encoder_get_mux_id(encoder);
ac4c1a9b SH	178
	179	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
	180	/* dual channel LVDS mode */
	181	serial_clk = 3500UL * mode->clock;
	182	imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
	183	imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
	184	} else {
	185	serial_clk = 7000UL * mode->clock;
	186	imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk, di_clk);
	187	}
	188
000d73fc MN	189	switch (imx_ldb_ch->chno) {
	190	case 0:
	191	pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
	192	V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
	193	break;
	194	case 1:
	195	pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
	196	V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
	197	break;
	198	default:
	199	dev_err(ldb->dev, "unable to config di%d panel format\n",
	200	imx_ldb_ch->chno);
	201	pixel_fmt = V4L2_PIX_FMT_RGB24;
	202	}
	203
f2d66aad	204	imx_drm_panel_format(encoder, pixel_fmt);
ac4c1a9b SH	205	}
	206
	207	static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
	208	{
	209	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
	210	struct imx_ldb *ldb = imx_ldb_ch->ldb;
	211	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
e76171b0	212	int mux = imx_drm_encoder_get_mux_id(encoder);
ac4c1a9b SH	213
	214	if (dual) {
	215	clk_prepare_enable(ldb->clk[0]);
	216	clk_prepare_enable(ldb->clk[1]);
	217	}
	218
	219	if (imx_ldb_ch == &ldb->channel[0] \|\| dual) {
	220	ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
	221	if (mux == 0 \|\| ldb->lvds_mux)
	222	ldb->ldb_ctrl \|= LDB_CH0_MODE_EN_TO_DI0;
	223	else if (mux == 1)
	224	ldb->ldb_ctrl \|= LDB_CH0_MODE_EN_TO_DI1;
	225	}
	226	if (imx_ldb_ch == &ldb->channel[1] \|\| dual) {
	227	ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
	228	if (mux == 1 \|\| ldb->lvds_mux)
	229	ldb->ldb_ctrl \|= LDB_CH1_MODE_EN_TO_DI1;
	230	else if (mux == 0)
	231	ldb->ldb_ctrl \|= LDB_CH1_MODE_EN_TO_DI0;
	232	}
	233
	234	if (ldb->lvds_mux) {
	235	const struct bus_mux *lvds_mux = NULL;
	236
	237	if (imx_ldb_ch == &ldb->channel[0])
	238	lvds_mux = &ldb->lvds_mux[0];
	239	else if (imx_ldb_ch == &ldb->channel[1])
	240	lvds_mux = &ldb->lvds_mux[1];
	241
	242	regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
	243	mux << lvds_mux->shift);
	244	}
	245
	246	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
	247	}
	248
	249	static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
	250	struct drm_display_mode *mode,
	251	struct drm_display_mode *adjusted_mode)
	252	{
	253	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
	254	struct imx_ldb *ldb = imx_ldb_ch->ldb;
	255	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
	256
	257	if (mode->clock > 170000) {
	258	dev_warn(ldb->dev,
	259	"%s: mode exceeds 170 MHz pixel clock\n", __func__);
	260	}
	261	if (mode->clock > 85000 && !dual) {
	262	dev_warn(ldb->dev,
	263	"%s: mode exceeds 85 MHz pixel clock\n", __func__);
	264	}
	265
	266	/* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
	267	if (imx_ldb_ch == &ldb->channel[0]) {
	268	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
	269	ldb->ldb_ctrl \|= LDB_DI0_VS_POL_ACT_LOW;
	270	else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
	271	ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
	272	}
	273	if (imx_ldb_ch == &ldb->channel[1]) {
	274	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
	275	ldb->ldb_ctrl \|= LDB_DI1_VS_POL_ACT_LOW;
	276	else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
277	ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
278	}
279	}
280
281	static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
282	{
283	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
284	struct imx_ldb *ldb = imx_ldb_ch->ldb;
285
286	/*
287	* imx_ldb_encoder_disable is called by
288	* drm_helper_disable_unused_functions without
289	* the encoder being enabled before.
290	*/
291	if (imx_ldb_ch == &ldb->channel[0] &&
292	(ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
293	return;
294	else if (imx_ldb_ch == &ldb->channel[1] &&
295	(ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
296	return;
297
298	if (imx_ldb_ch == &ldb->channel[0])
299	ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
300	else if (imx_ldb_ch == &ldb->channel[1])
301	ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
302
303	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
304
305	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
306	clk_disable_unprepare(ldb->clk[0]);
307	clk_disable_unprepare(ldb->clk[1]);
308	}
309	}
310
311	static void imx_ldb_encoder_destroy(struct drm_encoder *encoder)
312	{
313	/* do not free here */
314	}
315
316	static struct drm_connector_funcs imx_ldb_connector_funcs = {
317	.dpms = drm_helper_connector_dpms,
318	.fill_modes = drm_helper_probe_single_connector_modes,
319	.detect = imx_ldb_connector_detect,
320	.destroy = imx_ldb_connector_destroy,
321	};
322
323	static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
324	.get_modes = imx_ldb_connector_get_modes,
325	.best_encoder = imx_ldb_connector_best_encoder,
baa68c4b	326	.mode_valid = imx_drm_connector_mode_valid,
ac4c1a9b SH	327	};
	328
	329	static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
	330	.destroy = imx_ldb_encoder_destroy,
	331	};
	332
	333	static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
	334	.dpms = imx_ldb_encoder_dpms,
	335	.mode_fixup = imx_ldb_encoder_mode_fixup,
	336	.prepare = imx_ldb_encoder_prepare,
	337	.commit = imx_ldb_encoder_commit,
	338	.mode_set = imx_ldb_encoder_mode_set,
	339	.disable = imx_ldb_encoder_disable,
	340	};
	341
	342	static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
	343	{
	344	char clkname[16];
	345
	346	sprintf(clkname, "di%d", chno);
	347	ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
	348	if (IS_ERR(ldb->clk[chno]))
	349	return PTR_ERR(ldb->clk[chno]);
	350
	351	sprintf(clkname, "di%d_pll", chno);
	352	ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
ac4c1a9b	353
1f933fa8	354	return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
ac4c1a9b SH	355	}
	356
	357	static int imx_ldb_register(struct imx_ldb_channel *imx_ldb_ch)
	358	{
	359	int ret;
	360	struct imx_ldb *ldb = imx_ldb_ch->ldb;
	361
	362	ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
	363	if (ret)
	364	return ret;
	365	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
	366	ret \|= imx_ldb_get_clk(ldb, 1);
	367	if (ret)
	368	return ret;
	369	}
	370
	371	imx_ldb_ch->connector.funcs = &imx_ldb_connector_funcs;
	372	imx_ldb_ch->encoder.funcs = &imx_ldb_encoder_funcs;
	373
	374	imx_ldb_ch->encoder.encoder_type = DRM_MODE_ENCODER_LVDS;
	375	imx_ldb_ch->connector.connector_type = DRM_MODE_CONNECTOR_LVDS;
	376
	377	drm_encoder_helper_add(&imx_ldb_ch->encoder,
	378	&imx_ldb_encoder_helper_funcs);
	379	ret = imx_drm_add_encoder(&imx_ldb_ch->encoder,
	380	&imx_ldb_ch->imx_drm_encoder, THIS_MODULE);
	381	if (ret) {
	382	dev_err(ldb->dev, "adding encoder failed with %d\n", ret);
	383	return ret;
	384	}
	385
	386	drm_connector_helper_add(&imx_ldb_ch->connector,
	387	&imx_ldb_connector_helper_funcs);
	388
	389	ret = imx_drm_add_connector(&imx_ldb_ch->connector,
	390	&imx_ldb_ch->imx_drm_connector, THIS_MODULE);
	391	if (ret) {
	392	imx_drm_remove_encoder(imx_ldb_ch->imx_drm_encoder);
	393	dev_err(ldb->dev, "adding connector failed with %d\n", ret);
	394	return ret;
	395	}
	396
	397	drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
	398	&imx_ldb_ch->encoder);
	399
	400	return 0;
	401	}
	402
	403	enum {
	404	LVDS_BIT_MAP_SPWG,
	405	LVDS_BIT_MAP_JEIDA
	406	};
	407
5354cb64	408	static const char * const imx_ldb_bit_mappings[] = {
ac4c1a9b SH	409	[LVDS_BIT_MAP_SPWG] = "spwg",
	410	[LVDS_BIT_MAP_JEIDA] = "jeida",
	411	};
	412
d78b1406	413	static const int of_get_data_mapping(struct device_node *np)
ac4c1a9b SH	414	{
	415	const char *bm;
	416	int ret, i;
	417
	418	ret = of_property_read_string(np, "fsl,data-mapping", &bm);
	419	if (ret < 0)
	420	return ret;
	421
	422	for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++)
	423	if (!strcasecmp(bm, imx_ldb_bit_mappings[i]))
	424	return i;
	425
	426	return -EINVAL;
	427	}
	428
	429	static struct bus_mux imx6q_lvds_mux[2] = {
	430	{
	431	.reg = IOMUXC_GPR3,
	432	.shift = 6,
	433	.mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
	434	}, {
	435	.reg = IOMUXC_GPR3,
	436	.shift = 8,
	437	.mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
	438	}
	439	};
	440
	441	/*
	442	* For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
	443	* of_match_device will walk through this list and take the first entry
	444	* matching any of its compatible values. Therefore, the more generic
	445	* entries (in this case fsl,imx53-ldb) need to be ordered last.
	446	*/
	447	static const struct of_device_id imx_ldb_dt_ids[] = {
	448	{ .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
	449	{ .compatible = "fsl,imx53-ldb", .data = NULL, },
	450	{ }
	451	};
	452	MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
	453
17b5001b	454	static int imx_ldb_bind(struct device dev, struct device master, void *data)
ac4c1a9b	455	{
17b5001b	456	struct device_node *np = dev->of_node;
ac4c1a9b	457	const struct of_device_id *of_id =
17b5001b	458	of_match_device(imx_ldb_dt_ids, dev);
ac4c1a9b SH	459	struct device_node *child;
	460	const u8 *edidp;
	461	struct imx_ldb *imx_ldb;
	462	int datawidth;
	463	int mapping;
	464	int dual;
	465	int ret;
	466	int i;
	467
17b5001b	468	imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
ac4c1a9b SH	469	if (!imx_ldb)
	470	return -ENOMEM;
	471
	472	imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
	473	if (IS_ERR(imx_ldb->regmap)) {
17b5001b	474	dev_err(dev, "failed to get parent regmap\n");
ac4c1a9b SH	475	return PTR_ERR(imx_ldb->regmap);
	476	}
	477
17b5001b	478	imx_ldb->dev = dev;
ac4c1a9b SH	479
	480	if (of_id)
	481	imx_ldb->lvds_mux = of_id->data;
	482
	483	dual = of_property_read_bool(np, "fsl,dual-channel");
	484	if (dual)
	485	imx_ldb->ldb_ctrl \|= LDB_SPLIT_MODE_EN;
	486
	487	/*
4599934d	488	* There are three different possible clock mux configurations:
ac4c1a9b SH	489	* i.MX53: ipu1_di0_sel, ipu1_di1_sel
	490	* i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
	491	* i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
	492	* Map them all to di0_sel...di3_sel.
	493	*/
	494	for (i = 0; i < 4; i++) {
	495	char clkname[16];
	496
	497	sprintf(clkname, "di%d_sel", i);
	498	imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
	499	if (IS_ERR(imx_ldb->clk_sel[i])) {
	500	ret = PTR_ERR(imx_ldb->clk_sel[i]);
	501	imx_ldb->clk_sel[i] = NULL;
	502	break;
	503	}
	504	}
	505	if (i == 0)
	506	return ret;
	507
	508	for_each_child_of_node(np, child) {
	509	struct imx_ldb_channel *channel;
	510
	511	ret = of_property_read_u32(child, "reg", &i);
	512	if (ret \|\| i < 0 \|\| i > 1)
	513	return -EINVAL;
	514
	515	if (dual && i > 0) {
17b5001b	516	dev_warn(dev, "dual-channel mode, ignoring second output\n");
ac4c1a9b SH	517	continue;
	518	}
	519
	520	if (!of_device_is_available(child))
	521	continue;
	522
	523	channel = &imx_ldb->channel[i];
	524	channel->ldb = imx_ldb;
	525	channel->chno = i;
	526
	527	edidp = of_get_property(child, "edid", &channel->edid_len);
	528	if (edidp) {
	529	channel->edid = kmemdup(edidp, channel->edid_len,
	530	GFP_KERNEL);
	531	} else {
	532	ret = of_get_drm_display_mode(child, &channel->mode, 0);
	533	if (!ret)
	534	channel->mode_valid = 1;
	535	}
	536
	537	ret = of_property_read_u32(child, "fsl,data-width", &datawidth);
	538	if (ret)
	539	datawidth = 0;
	540	else if (datawidth != 18 && datawidth != 24)
	541	return -EINVAL;
	542
	543	mapping = of_get_data_mapping(child);
	544	switch (mapping) {
	545	case LVDS_BIT_MAP_SPWG:
	546	if (datawidth == 24) {
	547	if (i == 0 \|\| dual)
	548	imx_ldb->ldb_ctrl \|= LDB_DATA_WIDTH_CH0_24;
	549	if (i == 1 \|\| dual)
	550	imx_ldb->ldb_ctrl \|= LDB_DATA_WIDTH_CH1_24;
	551	}
	552	break;
	553	case LVDS_BIT_MAP_JEIDA:
	554	if (datawidth == 18) {
17b5001b	555	dev_err(dev, "JEIDA standard only supported in 24 bit\n");
ac4c1a9b SH	556	return -EINVAL;
	557	}
	558	if (i == 0 \|\| dual)
	559	imx_ldb->ldb_ctrl \|= LDB_DATA_WIDTH_CH0_24 \| LDB_BIT_MAP_CH0_JEIDA;
	560	if (i == 1 \|\| dual)
	561	imx_ldb->ldb_ctrl \|= LDB_DATA_WIDTH_CH1_24 \| LDB_BIT_MAP_CH1_JEIDA;
	562	break;
	563	default:
17b5001b	564	dev_err(dev, "data mapping not specified or invalid\n");
ac4c1a9b SH	565	return -EINVAL;
	566	}
	567
	568	ret = imx_ldb_register(channel);
	569	if (ret)
	570	return ret;
	571
	572	imx_drm_encoder_add_possible_crtcs(channel->imx_drm_encoder, child);
	573	}
	574
17b5001b	575	dev_set_drvdata(dev, imx_ldb);
ac4c1a9b SH	576
	577	return 0;
	578	}
	579
17b5001b RK	580	static void imx_ldb_unbind(struct device dev, struct device master,
17b5001b RK	581	void *data)
ac4c1a9b	582	{
17b5001b	583	struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
ac4c1a9b SH	584	int i;
	585
	586	for (i = 0; i < 2; i++) {
	587	struct imx_ldb_channel *channel = &imx_ldb->channel[i];
	588	struct drm_connector *connector = &channel->connector;
	589	struct drm_encoder *encoder = &channel->encoder;
	590
	591	drm_mode_connector_detach_encoder(connector, encoder);
	592
	593	imx_drm_remove_connector(channel->imx_drm_connector);
	594	imx_drm_remove_encoder(channel->imx_drm_encoder);
	595	}
17b5001b	596	}
ac4c1a9b	597
17b5001b RK	598	static const struct component_ops imx_ldb_ops = {
	599	.bind = imx_ldb_bind,
	600	.unbind = imx_ldb_unbind,
	601	};
	602
	603	static int imx_ldb_probe(struct platform_device *pdev)
	604	{
	605	return component_add(&pdev->dev, &imx_ldb_ops);
	606	}
	607
	608	static int imx_ldb_remove(struct platform_device *pdev)
	609	{
	610	component_del(&pdev->dev, &imx_ldb_ops);
ac4c1a9b SH	611	return 0;
	612	}
	613
	614	static struct platform_driver imx_ldb_driver = {
	615	.probe = imx_ldb_probe,
	616	.remove = imx_ldb_remove,
	617	.driver = {
	618	.of_match_table = imx_ldb_dt_ids,
	619	.name = DRIVER_NAME,
	620	.owner = THIS_MODULE,
	621	},
	622	};
	623
	624	module_platform_driver(imx_ldb_driver);
	625
	626	MODULE_DESCRIPTION("i.MX LVDS driver");
	627	MODULE_AUTHOR("Sascha Hauer, Pengutronix");
	628	MODULE_LICENSE("GPL");
bc627387	629	MODULE_ALIAS("platform:" DRIVER_NAME);