imx-drm: imx-drm-core: use array instead of list for CRTCs
[deliverable/linux.git] / drivers / staging / imx-drm / imx-ldb.c
CommitLineData
ac4c1a9b
SH
1/*
2 * i.MX drm driver - LVDS display bridge
3 *
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/clk.h>
23#include <drm/drmP.h>
24#include <drm/drm_fb_helper.h>
25#include <drm/drm_crtc_helper.h>
26#include <linux/mfd/syscon.h>
27#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
28#include <linux/of_address.h>
29#include <linux/of_device.h>
30#include <video/of_videomode.h>
31#include <linux/regmap.h>
32#include <linux/videodev2.h>
33
34#include "imx-drm.h"
35
36#define DRIVER_NAME "imx-ldb"
37
38#define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
39#define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
40#define LDB_CH0_MODE_EN_MASK (3 << 0)
41#define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
42#define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
43#define LDB_CH1_MODE_EN_MASK (3 << 2)
44#define LDB_SPLIT_MODE_EN (1 << 4)
45#define LDB_DATA_WIDTH_CH0_24 (1 << 5)
46#define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
47#define LDB_DATA_WIDTH_CH1_24 (1 << 7)
48#define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
49#define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
50#define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
51#define LDB_BGREF_RMODE_INT (1 << 15)
52
53#define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
54#define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
55
56struct imx_ldb;
57
58struct imx_ldb_channel {
59 struct imx_ldb *ldb;
60 struct drm_connector connector;
61 struct imx_drm_connector *imx_drm_connector;
62 struct drm_encoder encoder;
63 struct imx_drm_encoder *imx_drm_encoder;
64 int chno;
65 void *edid;
66 int edid_len;
67 struct drm_display_mode mode;
68 int mode_valid;
69};
70
71struct bus_mux {
72 int reg;
73 int shift;
74 int mask;
75};
76
77struct imx_ldb {
78 struct regmap *regmap;
79 struct device *dev;
80 struct imx_ldb_channel channel[2];
81 struct clk *clk[2]; /* our own clock */
82 struct clk *clk_sel[4]; /* parent of display clock */
83 struct clk *clk_pll[2]; /* upstream clock we can adjust */
84 u32 ldb_ctrl;
85 const struct bus_mux *lvds_mux;
86};
87
88static enum drm_connector_status imx_ldb_connector_detect(
89 struct drm_connector *connector, bool force)
90{
91 return connector_status_connected;
92}
93
94static void imx_ldb_connector_destroy(struct drm_connector *connector)
95{
96 /* do not free here */
97}
98
99static int imx_ldb_connector_get_modes(struct drm_connector *connector)
100{
101 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
102 int num_modes = 0;
103
104 if (imx_ldb_ch->edid) {
105 drm_mode_connector_update_edid_property(connector,
106 imx_ldb_ch->edid);
107 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
108 }
109
110 if (imx_ldb_ch->mode_valid) {
111 struct drm_display_mode *mode;
112
113 mode = drm_mode_create(connector->dev);
114 drm_mode_copy(mode, &imx_ldb_ch->mode);
115 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
116 drm_mode_probed_add(connector, mode);
117 num_modes++;
118 }
119
120 return num_modes;
121}
122
123static int imx_ldb_connector_mode_valid(struct drm_connector *connector,
124 struct drm_display_mode *mode)
125{
126 return 0;
127}
128
129static struct drm_encoder *imx_ldb_connector_best_encoder(
130 struct drm_connector *connector)
131{
132 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
133
134 return &imx_ldb_ch->encoder;
135}
136
137static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
138{
139}
140
141static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
142 const struct drm_display_mode *mode,
143 struct drm_display_mode *adjusted_mode)
144{
145 return true;
146}
147
148static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
149 unsigned long serial_clk, unsigned long di_clk)
150{
151 int ret;
152
153 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
154 clk_get_rate(ldb->clk_pll[chno]), serial_clk);
155 clk_set_rate(ldb->clk_pll[chno], serial_clk);
156
157 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
158 clk_get_rate(ldb->clk_pll[chno]));
159
160 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
161 clk_get_rate(ldb->clk[chno]),
162 (long int)di_clk);
163 clk_set_rate(ldb->clk[chno], di_clk);
164
165 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
166 clk_get_rate(ldb->clk[chno]));
167
168 /* set display clock mux to LDB input clock */
169 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
49f4a9c8 170 if (ret)
ac4c1a9b 171 dev_err(ldb->dev, "unable to set di%d parent clock to ldb_di%d\n", mux, chno);
ac4c1a9b
SH
172}
173
174static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
175{
176 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
177 struct imx_ldb *ldb = imx_ldb_ch->ldb;
178 struct drm_display_mode *mode = &encoder->crtc->mode;
000d73fc 179 u32 pixel_fmt;
ac4c1a9b
SH
180 unsigned long serial_clk;
181 unsigned long di_clk = mode->clock * 1000;
e76171b0 182 int mux = imx_drm_encoder_get_mux_id(encoder);
ac4c1a9b
SH
183
184 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
185 /* dual channel LVDS mode */
186 serial_clk = 3500UL * mode->clock;
187 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
188 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
189 } else {
190 serial_clk = 7000UL * mode->clock;
191 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk, di_clk);
192 }
193
000d73fc
MN
194 switch (imx_ldb_ch->chno) {
195 case 0:
196 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
197 V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
198 break;
199 case 1:
200 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
201 V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
202 break;
203 default:
204 dev_err(ldb->dev, "unable to config di%d panel format\n",
205 imx_ldb_ch->chno);
206 pixel_fmt = V4L2_PIX_FMT_RGB24;
207 }
208
ac4c1a9b 209 imx_drm_crtc_panel_format(encoder->crtc, DRM_MODE_ENCODER_LVDS,
000d73fc 210 pixel_fmt);
ac4c1a9b
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211}
212
213static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
214{
215 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
216 struct imx_ldb *ldb = imx_ldb_ch->ldb;
217 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
e76171b0 218 int mux = imx_drm_encoder_get_mux_id(encoder);
ac4c1a9b
SH
219
220 if (dual) {
221 clk_prepare_enable(ldb->clk[0]);
222 clk_prepare_enable(ldb->clk[1]);
223 }
224
225 if (imx_ldb_ch == &ldb->channel[0] || dual) {
226 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
227 if (mux == 0 || ldb->lvds_mux)
228 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
229 else if (mux == 1)
230 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
231 }
232 if (imx_ldb_ch == &ldb->channel[1] || dual) {
233 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
234 if (mux == 1 || ldb->lvds_mux)
235 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
236 else if (mux == 0)
237 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
238 }
239
240 if (ldb->lvds_mux) {
241 const struct bus_mux *lvds_mux = NULL;
242
243 if (imx_ldb_ch == &ldb->channel[0])
244 lvds_mux = &ldb->lvds_mux[0];
245 else if (imx_ldb_ch == &ldb->channel[1])
246 lvds_mux = &ldb->lvds_mux[1];
247
248 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
249 mux << lvds_mux->shift);
250 }
251
252 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
253}
254
255static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
256 struct drm_display_mode *mode,
257 struct drm_display_mode *adjusted_mode)
258{
259 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
260 struct imx_ldb *ldb = imx_ldb_ch->ldb;
261 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
262
263 if (mode->clock > 170000) {
264 dev_warn(ldb->dev,
265 "%s: mode exceeds 170 MHz pixel clock\n", __func__);
266 }
267 if (mode->clock > 85000 && !dual) {
268 dev_warn(ldb->dev,
269 "%s: mode exceeds 85 MHz pixel clock\n", __func__);
270 }
271
272 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
273 if (imx_ldb_ch == &ldb->channel[0]) {
274 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
275 ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
276 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
277 ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
278 }
279 if (imx_ldb_ch == &ldb->channel[1]) {
280 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
281 ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
282 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
283 ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
284 }
285}
286
287static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
288{
289 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
290 struct imx_ldb *ldb = imx_ldb_ch->ldb;
291
292 /*
293 * imx_ldb_encoder_disable is called by
294 * drm_helper_disable_unused_functions without
295 * the encoder being enabled before.
296 */
297 if (imx_ldb_ch == &ldb->channel[0] &&
298 (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
299 return;
300 else if (imx_ldb_ch == &ldb->channel[1] &&
301 (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
302 return;
303
304 if (imx_ldb_ch == &ldb->channel[0])
305 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
306 else if (imx_ldb_ch == &ldb->channel[1])
307 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
308
309 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
310
311 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
312 clk_disable_unprepare(ldb->clk[0]);
313 clk_disable_unprepare(ldb->clk[1]);
314 }
315}
316
317static void imx_ldb_encoder_destroy(struct drm_encoder *encoder)
318{
319 /* do not free here */
320}
321
322static struct drm_connector_funcs imx_ldb_connector_funcs = {
323 .dpms = drm_helper_connector_dpms,
324 .fill_modes = drm_helper_probe_single_connector_modes,
325 .detect = imx_ldb_connector_detect,
326 .destroy = imx_ldb_connector_destroy,
327};
328
329static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
330 .get_modes = imx_ldb_connector_get_modes,
331 .best_encoder = imx_ldb_connector_best_encoder,
332 .mode_valid = imx_ldb_connector_mode_valid,
333};
334
335static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
336 .destroy = imx_ldb_encoder_destroy,
337};
338
339static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
340 .dpms = imx_ldb_encoder_dpms,
341 .mode_fixup = imx_ldb_encoder_mode_fixup,
342 .prepare = imx_ldb_encoder_prepare,
343 .commit = imx_ldb_encoder_commit,
344 .mode_set = imx_ldb_encoder_mode_set,
345 .disable = imx_ldb_encoder_disable,
346};
347
348static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
349{
350 char clkname[16];
351
352 sprintf(clkname, "di%d", chno);
353 ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
354 if (IS_ERR(ldb->clk[chno]))
355 return PTR_ERR(ldb->clk[chno]);
356
357 sprintf(clkname, "di%d_pll", chno);
358 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
ac4c1a9b 359
1f933fa8 360 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
ac4c1a9b
SH
361}
362
363static int imx_ldb_register(struct imx_ldb_channel *imx_ldb_ch)
364{
365 int ret;
366 struct imx_ldb *ldb = imx_ldb_ch->ldb;
367
368 ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
369 if (ret)
370 return ret;
371 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
372 ret |= imx_ldb_get_clk(ldb, 1);
373 if (ret)
374 return ret;
375 }
376
377 imx_ldb_ch->connector.funcs = &imx_ldb_connector_funcs;
378 imx_ldb_ch->encoder.funcs = &imx_ldb_encoder_funcs;
379
380 imx_ldb_ch->encoder.encoder_type = DRM_MODE_ENCODER_LVDS;
381 imx_ldb_ch->connector.connector_type = DRM_MODE_CONNECTOR_LVDS;
382
383 drm_encoder_helper_add(&imx_ldb_ch->encoder,
384 &imx_ldb_encoder_helper_funcs);
385 ret = imx_drm_add_encoder(&imx_ldb_ch->encoder,
386 &imx_ldb_ch->imx_drm_encoder, THIS_MODULE);
387 if (ret) {
388 dev_err(ldb->dev, "adding encoder failed with %d\n", ret);
389 return ret;
390 }
391
392 drm_connector_helper_add(&imx_ldb_ch->connector,
393 &imx_ldb_connector_helper_funcs);
394
395 ret = imx_drm_add_connector(&imx_ldb_ch->connector,
396 &imx_ldb_ch->imx_drm_connector, THIS_MODULE);
397 if (ret) {
398 imx_drm_remove_encoder(imx_ldb_ch->imx_drm_encoder);
399 dev_err(ldb->dev, "adding connector failed with %d\n", ret);
400 return ret;
401 }
402
403 drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
404 &imx_ldb_ch->encoder);
405
406 return 0;
407}
408
409enum {
410 LVDS_BIT_MAP_SPWG,
411 LVDS_BIT_MAP_JEIDA
412};
413
5354cb64 414static const char * const imx_ldb_bit_mappings[] = {
ac4c1a9b
SH
415 [LVDS_BIT_MAP_SPWG] = "spwg",
416 [LVDS_BIT_MAP_JEIDA] = "jeida",
417};
418
d78b1406 419static const int of_get_data_mapping(struct device_node *np)
ac4c1a9b
SH
420{
421 const char *bm;
422 int ret, i;
423
424 ret = of_property_read_string(np, "fsl,data-mapping", &bm);
425 if (ret < 0)
426 return ret;
427
428 for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++)
429 if (!strcasecmp(bm, imx_ldb_bit_mappings[i]))
430 return i;
431
432 return -EINVAL;
433}
434
435static struct bus_mux imx6q_lvds_mux[2] = {
436 {
437 .reg = IOMUXC_GPR3,
438 .shift = 6,
439 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
440 }, {
441 .reg = IOMUXC_GPR3,
442 .shift = 8,
443 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
444 }
445};
446
447/*
448 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
449 * of_match_device will walk through this list and take the first entry
450 * matching any of its compatible values. Therefore, the more generic
451 * entries (in this case fsl,imx53-ldb) need to be ordered last.
452 */
453static const struct of_device_id imx_ldb_dt_ids[] = {
454 { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
455 { .compatible = "fsl,imx53-ldb", .data = NULL, },
456 { }
457};
458MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
459
460static int imx_ldb_probe(struct platform_device *pdev)
461{
462 struct device_node *np = pdev->dev.of_node;
463 const struct of_device_id *of_id =
28d31374 464 of_match_device(imx_ldb_dt_ids, &pdev->dev);
ac4c1a9b
SH
465 struct device_node *child;
466 const u8 *edidp;
467 struct imx_ldb *imx_ldb;
468 int datawidth;
469 int mapping;
470 int dual;
471 int ret;
472 int i;
473
474 imx_ldb = devm_kzalloc(&pdev->dev, sizeof(*imx_ldb), GFP_KERNEL);
475 if (!imx_ldb)
476 return -ENOMEM;
477
478 imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
479 if (IS_ERR(imx_ldb->regmap)) {
480 dev_err(&pdev->dev, "failed to get parent regmap\n");
481 return PTR_ERR(imx_ldb->regmap);
482 }
483
484 imx_ldb->dev = &pdev->dev;
485
486 if (of_id)
487 imx_ldb->lvds_mux = of_id->data;
488
489 dual = of_property_read_bool(np, "fsl,dual-channel");
490 if (dual)
491 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
492
493 /*
4599934d 494 * There are three different possible clock mux configurations:
ac4c1a9b
SH
495 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
496 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
497 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
498 * Map them all to di0_sel...di3_sel.
499 */
500 for (i = 0; i < 4; i++) {
501 char clkname[16];
502
503 sprintf(clkname, "di%d_sel", i);
504 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
505 if (IS_ERR(imx_ldb->clk_sel[i])) {
506 ret = PTR_ERR(imx_ldb->clk_sel[i]);
507 imx_ldb->clk_sel[i] = NULL;
508 break;
509 }
510 }
511 if (i == 0)
512 return ret;
513
514 for_each_child_of_node(np, child) {
515 struct imx_ldb_channel *channel;
516
517 ret = of_property_read_u32(child, "reg", &i);
518 if (ret || i < 0 || i > 1)
519 return -EINVAL;
520
521 if (dual && i > 0) {
522 dev_warn(&pdev->dev, "dual-channel mode, ignoring second output\n");
523 continue;
524 }
525
526 if (!of_device_is_available(child))
527 continue;
528
529 channel = &imx_ldb->channel[i];
530 channel->ldb = imx_ldb;
531 channel->chno = i;
532
533 edidp = of_get_property(child, "edid", &channel->edid_len);
534 if (edidp) {
535 channel->edid = kmemdup(edidp, channel->edid_len,
536 GFP_KERNEL);
537 } else {
538 ret = of_get_drm_display_mode(child, &channel->mode, 0);
539 if (!ret)
540 channel->mode_valid = 1;
541 }
542
543 ret = of_property_read_u32(child, "fsl,data-width", &datawidth);
544 if (ret)
545 datawidth = 0;
546 else if (datawidth != 18 && datawidth != 24)
547 return -EINVAL;
548
549 mapping = of_get_data_mapping(child);
550 switch (mapping) {
551 case LVDS_BIT_MAP_SPWG:
552 if (datawidth == 24) {
553 if (i == 0 || dual)
554 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
555 if (i == 1 || dual)
556 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
557 }
558 break;
559 case LVDS_BIT_MAP_JEIDA:
560 if (datawidth == 18) {
561 dev_err(&pdev->dev, "JEIDA standard only supported in 24 bit\n");
562 return -EINVAL;
563 }
564 if (i == 0 || dual)
565 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 | LDB_BIT_MAP_CH0_JEIDA;
566 if (i == 1 || dual)
567 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 | LDB_BIT_MAP_CH1_JEIDA;
568 break;
569 default:
570 dev_err(&pdev->dev, "data mapping not specified or invalid\n");
571 return -EINVAL;
572 }
573
574 ret = imx_ldb_register(channel);
575 if (ret)
576 return ret;
577
578 imx_drm_encoder_add_possible_crtcs(channel->imx_drm_encoder, child);
579 }
580
581 platform_set_drvdata(pdev, imx_ldb);
582
583 return 0;
584}
585
586static int imx_ldb_remove(struct platform_device *pdev)
587{
588 struct imx_ldb *imx_ldb = platform_get_drvdata(pdev);
589 int i;
590
591 for (i = 0; i < 2; i++) {
592 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
593 struct drm_connector *connector = &channel->connector;
594 struct drm_encoder *encoder = &channel->encoder;
595
596 drm_mode_connector_detach_encoder(connector, encoder);
597
598 imx_drm_remove_connector(channel->imx_drm_connector);
599 imx_drm_remove_encoder(channel->imx_drm_encoder);
600 }
601
602 return 0;
603}
604
605static struct platform_driver imx_ldb_driver = {
606 .probe = imx_ldb_probe,
607 .remove = imx_ldb_remove,
608 .driver = {
609 .of_match_table = imx_ldb_dt_ids,
610 .name = DRIVER_NAME,
611 .owner = THIS_MODULE,
612 },
613};
614
615module_platform_driver(imx_ldb_driver);
616
617MODULE_DESCRIPTION("i.MX LVDS driver");
618MODULE_AUTHOR("Sascha Hauer, Pengutronix");
619MODULE_LICENSE("GPL");
bc627387 620MODULE_ALIAS("platform:" DRIVER_NAME);
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