Commit | Line | Data |
---|---|---|
faa4fd2a | 1 | /* |
dcae5dac HV |
2 | * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com> |
3 | * | |
4 | * Original author: | |
5 | * Ben Collins <bcollins@ubuntu.com> | |
6 | * | |
7 | * Additional work by: | |
8 | * John Brooks <john.brooks@bluecherry.net> | |
faa4fd2a BC |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
23 | */ | |
24 | ||
decebabf KH |
25 | #ifndef __SOLO6X10_H |
26 | #define __SOLO6X10_H | |
faa4fd2a | 27 | |
faa4fd2a BC |
28 | #include <linux/pci.h> |
29 | #include <linux/i2c.h> | |
faa4fd2a BC |
30 | #include <linux/mutex.h> |
31 | #include <linux/list.h> | |
32 | #include <linux/wait.h> | |
dcae5dac HV |
33 | #include <linux/stringify.h> |
34 | #include <linux/io.h> | |
60063497 | 35 | #include <linux/atomic.h> |
dcae5dac | 36 | #include <linux/slab.h> |
faa4fd2a | 37 | #include <linux/videodev2.h> |
dcae5dac | 38 | |
faa4fd2a | 39 | #include <media/v4l2-dev.h> |
d9ebd623 | 40 | #include <media/v4l2-device.h> |
c813bd3c | 41 | #include <media/v4l2-ctrls.h> |
faa4fd2a | 42 | #include <media/videobuf-core.h> |
dcae5dac | 43 | |
ae69b22c | 44 | #include "registers.h" |
faa4fd2a BC |
45 | |
46 | #ifndef PCI_VENDOR_ID_SOFTLOGIC | |
47 | #define PCI_VENDOR_ID_SOFTLOGIC 0x9413 | |
48 | #define PCI_DEVICE_ID_SOLO6010 0x6010 | |
908113d8 | 49 | #define PCI_DEVICE_ID_SOLO6110 0x6110 |
faa4fd2a BC |
50 | #endif |
51 | ||
52 | #ifndef PCI_VENDOR_ID_BLUECHERRY | |
53 | #define PCI_VENDOR_ID_BLUECHERRY 0x1BB3 | |
54 | /* Neugent Softlogic 6010 based cards */ | |
55 | #define PCI_DEVICE_ID_NEUSOLO_4 0x4304 | |
56 | #define PCI_DEVICE_ID_NEUSOLO_9 0x4309 | |
57 | #define PCI_DEVICE_ID_NEUSOLO_16 0x4310 | |
f62de9be BC |
58 | /* Bluecherry Softlogic 6010 based cards */ |
59 | #define PCI_DEVICE_ID_BC_SOLO_4 0x4E04 | |
60 | #define PCI_DEVICE_ID_BC_SOLO_9 0x4E09 | |
61 | #define PCI_DEVICE_ID_BC_SOLO_16 0x4E10 | |
62 | /* Bluecherry Softlogic 6110 based cards */ | |
63 | #define PCI_DEVICE_ID_BC_6110_4 0x5304 | |
64 | #define PCI_DEVICE_ID_BC_6110_8 0x5308 | |
65 | #define PCI_DEVICE_ID_BC_6110_16 0x5310 | |
faa4fd2a BC |
66 | #endif /* Bluecherry */ |
67 | ||
dcae5dac HV |
68 | /* Used in pci_device_id, and solo_dev->type */ |
69 | #define SOLO_DEV_6010 0 | |
70 | #define SOLO_DEV_6110 1 | |
71 | ||
decebabf | 72 | #define SOLO6X10_NAME "solo6x10" |
faa4fd2a BC |
73 | |
74 | #define SOLO_MAX_CHANNELS 16 | |
75 | ||
20c5f492 | 76 | #define SOLO6X10_VERSION "3.0.0" |
908113d8 | 77 | |
faa4fd2a | 78 | /* |
decebabf | 79 | * The SOLO6x10 actually has 8 i2c channels, but we only use 2. |
faa4fd2a BC |
80 | * 0 - Techwell chip(s) |
81 | * 1 - SAA7128 | |
82 | */ | |
83 | #define SOLO_I2C_ADAPTERS 2 | |
84 | #define SOLO_I2C_TW 0 | |
85 | #define SOLO_I2C_SAA 1 | |
86 | ||
87 | /* DMA Engine setup */ | |
88 | #define SOLO_NR_P2M 4 | |
89 | #define SOLO_NR_P2M_DESC 256 | |
dcae5dac | 90 | #define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16) |
faa4fd2a BC |
91 | |
92 | /* Encoder standard modes */ | |
93 | #define SOLO_ENC_MODE_CIF 2 | |
94 | #define SOLO_ENC_MODE_HD1 1 | |
95 | #define SOLO_ENC_MODE_D1 9 | |
96 | ||
97 | #define SOLO_DEFAULT_GOP 30 | |
98 | #define SOLO_DEFAULT_QP 3 | |
99 | ||
faa4fd2a BC |
100 | #ifndef V4L2_BUF_FLAG_MOTION_ON |
101 | #define V4L2_BUF_FLAG_MOTION_ON 0x0400 | |
102 | #define V4L2_BUF_FLAG_MOTION_DETECTED 0x0800 | |
103 | #endif | |
c813bd3c HV |
104 | |
105 | #define SOLO_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000) | |
106 | #define V4L2_CID_MOTION_ENABLE (SOLO_CID_CUSTOM_BASE+0) | |
107 | #define V4L2_CID_MOTION_THRESHOLD (SOLO_CID_CUSTOM_BASE+1) | |
108 | #define V4L2_CID_MOTION_TRACE (SOLO_CID_CUSTOM_BASE+2) | |
109 | #define V4L2_CID_OSD_TEXT (SOLO_CID_CUSTOM_BASE+3) | |
faa4fd2a BC |
110 | |
111 | enum SOLO_I2C_STATE { | |
112 | IIC_STATE_IDLE, | |
113 | IIC_STATE_START, | |
114 | IIC_STATE_READ, | |
115 | IIC_STATE_WRITE, | |
116 | IIC_STATE_STOP | |
117 | }; | |
118 | ||
dcae5dac HV |
119 | /* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */ |
120 | struct solo_p2m_desc { | |
121 | u32 ctrl; | |
122 | u32 cfg; | |
123 | u32 dma_addr; | |
124 | u32 ext_addr; | |
f62de9be BC |
125 | }; |
126 | ||
faa4fd2a | 127 | struct solo_p2m_dev { |
f62de9be | 128 | struct mutex mutex; |
faa4fd2a | 129 | struct completion completion; |
dcae5dac HV |
130 | int desc_count; |
131 | int desc_idx; | |
132 | struct solo_p2m_desc *descs; | |
faa4fd2a | 133 | int error; |
faa4fd2a BC |
134 | }; |
135 | ||
dcae5dac | 136 | #define OSD_TEXT_MAX 44 |
faa4fd2a | 137 | |
a7eb931d HV |
138 | enum solo_enc_types { |
139 | SOLO_ENC_TYPE_STD, | |
140 | SOLO_ENC_TYPE_EXT, | |
141 | }; | |
142 | ||
faa4fd2a | 143 | struct solo_enc_dev { |
dcae5dac | 144 | struct solo_dev *solo_dev; |
faa4fd2a | 145 | /* V4L2 Items */ |
c813bd3c | 146 | struct v4l2_ctrl_handler hdl; |
faa4fd2a BC |
147 | struct video_device *vfd; |
148 | /* General accounting */ | |
dcae5dac HV |
149 | struct mutex enable_lock; |
150 | spinlock_t motion_lock; | |
faa4fd2a | 151 | atomic_t readers; |
dcae5dac | 152 | atomic_t mpeg_readers; |
faa4fd2a BC |
153 | u8 ch; |
154 | u8 mode, gop, qp, interlaced, interval; | |
faa4fd2a | 155 | u8 bw_weight; |
faa4fd2a BC |
156 | u16 motion_thresh; |
157 | u16 width; | |
158 | u16 height; | |
dcae5dac HV |
159 | |
160 | /* OSD buffers */ | |
faa4fd2a | 161 | char osd_text[OSD_TEXT_MAX + 1]; |
dcae5dac HV |
162 | u8 osd_buf[SOLO_EOSD_EXT_SIZE_MAX] |
163 | __aligned(4); | |
faa4fd2a | 164 | |
dcae5dac HV |
165 | /* VOP stuff */ |
166 | unsigned char vop[64]; | |
167 | int vop_len; | |
168 | unsigned char jpeg_header[1024]; | |
169 | int jpeg_len; | |
170 | ||
a7eb931d HV |
171 | u32 fmt; |
172 | u8 enc_on; | |
173 | enum solo_enc_types type; | |
174 | struct videobuf_queue vidq; | |
175 | struct list_head vidq_active; | |
176 | int desc_count; | |
177 | int desc_nelts; | |
178 | struct solo_p2m_desc *desc_items; | |
179 | dma_addr_t desc_dma; | |
180 | spinlock_t av_lock; | |
faa4fd2a BC |
181 | }; |
182 | ||
decebabf KH |
183 | /* The SOLO6x10 PCI Device */ |
184 | struct solo_dev { | |
faa4fd2a BC |
185 | /* General stuff */ |
186 | struct pci_dev *pdev; | |
dcae5dac HV |
187 | int type; |
188 | unsigned int time_sync; | |
189 | unsigned int usec_lsb; | |
190 | unsigned int clock_mhz; | |
faa4fd2a BC |
191 | u8 __iomem *reg_base; |
192 | int nr_chans; | |
193 | int nr_ext; | |
194 | u32 irq_mask; | |
195 | u32 motion_mask; | |
196 | spinlock_t reg_io_lock; | |
d9ebd623 | 197 | struct v4l2_device v4l2_dev; |
faa4fd2a BC |
198 | |
199 | /* tw28xx accounting */ | |
ee6351f5 | 200 | u8 tw2865, tw2864, tw2815; |
faa4fd2a BC |
201 | u8 tw28_cnt; |
202 | ||
203 | /* i2c related items */ | |
204 | struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS]; | |
205 | enum SOLO_I2C_STATE i2c_state; | |
f62de9be | 206 | struct mutex i2c_mutex; |
faa4fd2a BC |
207 | int i2c_id; |
208 | wait_queue_head_t i2c_wait; | |
209 | struct i2c_msg *i2c_msg; | |
210 | unsigned int i2c_msg_num; | |
211 | unsigned int i2c_msg_ptr; | |
212 | ||
213 | /* P2M DMA Engine */ | |
214 | struct solo_p2m_dev p2m_dev[SOLO_NR_P2M]; | |
dcae5dac HV |
215 | atomic_t p2m_count; |
216 | int p2m_jiffies; | |
217 | unsigned int p2m_timeouts; | |
faa4fd2a BC |
218 | |
219 | /* V4L2 Display items */ | |
220 | struct video_device *vfd; | |
221 | unsigned int erasing; | |
222 | unsigned int frame_blank; | |
223 | u8 cur_disp_ch; | |
224 | wait_queue_head_t disp_thread_wait; | |
c813bd3c | 225 | struct v4l2_ctrl_handler disp_hdl; |
faa4fd2a BC |
226 | |
227 | /* V4L2 Encoder items */ | |
228 | struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS]; | |
229 | u16 enc_bw_remain; | |
230 | /* IDX into hw mp4 encoder */ | |
231 | u8 enc_idx; | |
faa4fd2a BC |
232 | |
233 | /* Current video settings */ | |
afabbe6d | 234 | u32 video_type; |
faa4fd2a BC |
235 | u16 video_hsize, video_vsize; |
236 | u16 vout_hstart, vout_vstart; | |
237 | u16 vin_hstart, vin_vstart; | |
238 | u8 fps; | |
239 | ||
dcae5dac HV |
240 | /* JPEG Qp setting */ |
241 | spinlock_t jpeg_qp_lock; | |
242 | u32 jpeg_qp[2]; | |
243 | ||
faa4fd2a BC |
244 | /* Audio components */ |
245 | struct snd_card *snd_card; | |
246 | struct snd_pcm *snd_pcm; | |
247 | atomic_t snd_users; | |
248 | int g723_hw_idx; | |
dcae5dac HV |
249 | |
250 | /* sysfs stuffs */ | |
251 | struct device dev; | |
252 | int sdram_size; | |
253 | struct bin_attribute sdram_attr; | |
254 | unsigned int sys_config; | |
255 | ||
256 | /* Ring thread */ | |
257 | struct task_struct *ring_thread; | |
258 | wait_queue_head_t ring_thread_wait; | |
259 | atomic_t enc_users; | |
260 | atomic_t disp_users; | |
261 | ||
262 | /* VOP_HEADER handling */ | |
263 | void *vh_buf; | |
264 | dma_addr_t vh_dma; | |
265 | int vh_size; | |
6a2e65d5 HV |
266 | |
267 | /* Buffer handling */ | |
268 | struct videobuf_queue vidq; | |
269 | struct task_struct *kthread; | |
270 | spinlock_t slock; | |
271 | int old_write; | |
272 | struct list_head vidq_active; | |
faa4fd2a BC |
273 | }; |
274 | ||
decebabf | 275 | static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg) |
faa4fd2a BC |
276 | { |
277 | unsigned long flags; | |
278 | u32 ret; | |
279 | u16 val; | |
280 | ||
281 | spin_lock_irqsave(&solo_dev->reg_io_lock, flags); | |
282 | ||
283 | ret = readl(solo_dev->reg_base + reg); | |
284 | rmb(); | |
285 | pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val); | |
286 | rmb(); | |
287 | ||
288 | spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags); | |
289 | ||
290 | return ret; | |
291 | } | |
292 | ||
dcae5dac HV |
293 | static inline void solo_reg_write(struct solo_dev *solo_dev, int reg, |
294 | u32 data) | |
faa4fd2a BC |
295 | { |
296 | unsigned long flags; | |
297 | u16 val; | |
298 | ||
299 | spin_lock_irqsave(&solo_dev->reg_io_lock, flags); | |
300 | ||
301 | writel(data, solo_dev->reg_base + reg); | |
302 | wmb(); | |
303 | pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val); | |
304 | rmb(); | |
305 | ||
306 | spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags); | |
307 | } | |
308 | ||
dcae5dac HV |
309 | static inline void solo_irq_on(struct solo_dev *dev, u32 mask) |
310 | { | |
311 | dev->irq_mask |= mask; | |
312 | solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask); | |
313 | } | |
314 | ||
315 | static inline void solo_irq_off(struct solo_dev *dev, u32 mask) | |
316 | { | |
317 | dev->irq_mask &= ~mask; | |
318 | solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask); | |
319 | } | |
faa4fd2a BC |
320 | |
321 | /* Init/exit routeines for subsystems */ | |
decebabf KH |
322 | int solo_disp_init(struct solo_dev *solo_dev); |
323 | void solo_disp_exit(struct solo_dev *solo_dev); | |
faa4fd2a | 324 | |
decebabf KH |
325 | int solo_gpio_init(struct solo_dev *solo_dev); |
326 | void solo_gpio_exit(struct solo_dev *solo_dev); | |
faa4fd2a | 327 | |
decebabf KH |
328 | int solo_i2c_init(struct solo_dev *solo_dev); |
329 | void solo_i2c_exit(struct solo_dev *solo_dev); | |
faa4fd2a | 330 | |
decebabf KH |
331 | int solo_p2m_init(struct solo_dev *solo_dev); |
332 | void solo_p2m_exit(struct solo_dev *solo_dev); | |
faa4fd2a | 333 | |
dcae5dac | 334 | int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr); |
decebabf | 335 | void solo_v4l2_exit(struct solo_dev *solo_dev); |
faa4fd2a | 336 | |
decebabf KH |
337 | int solo_enc_init(struct solo_dev *solo_dev); |
338 | void solo_enc_exit(struct solo_dev *solo_dev); | |
faa4fd2a | 339 | |
dcae5dac | 340 | int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr); |
decebabf | 341 | void solo_enc_v4l2_exit(struct solo_dev *solo_dev); |
faa4fd2a | 342 | |
decebabf KH |
343 | int solo_g723_init(struct solo_dev *solo_dev); |
344 | void solo_g723_exit(struct solo_dev *solo_dev); | |
faa4fd2a BC |
345 | |
346 | /* ISR's */ | |
decebabf KH |
347 | int solo_i2c_isr(struct solo_dev *solo_dev); |
348 | void solo_p2m_isr(struct solo_dev *solo_dev, int id); | |
dcae5dac | 349 | void solo_p2m_error_isr(struct solo_dev *solo_dev); |
decebabf KH |
350 | void solo_enc_v4l2_isr(struct solo_dev *solo_dev); |
351 | void solo_g723_isr(struct solo_dev *solo_dev); | |
352 | void solo_motion_isr(struct solo_dev *solo_dev); | |
353 | void solo_video_in_isr(struct solo_dev *solo_dev); | |
faa4fd2a BC |
354 | |
355 | /* i2c read/write */ | |
decebabf KH |
356 | u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off); |
357 | void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off, | |
faa4fd2a BC |
358 | u8 data); |
359 | ||
360 | /* P2M DMA */ | |
dcae5dac HV |
361 | int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr, |
362 | dma_addr_t dma_addr, u32 ext_addr, u32 size, | |
363 | int repeat, u32 ext_size); | |
364 | int solo_p2m_dma(struct solo_dev *solo_dev, int wr, | |
365 | void *sys_addr, u32 ext_addr, u32 size, | |
366 | int repeat, u32 ext_size); | |
367 | void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr, | |
368 | dma_addr_t dma_addr, u32 ext_addr, u32 size, | |
369 | int repeat, u32 ext_size); | |
370 | int solo_p2m_dma_desc(struct solo_dev *solo_dev, | |
371 | struct solo_p2m_desc *desc, dma_addr_t desc_dma, | |
372 | int desc_cnt); | |
faa4fd2a BC |
373 | |
374 | /* Set the threshold for motion detection */ | |
dcae5dac HV |
375 | int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val); |
376 | int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch, u16 val, | |
377 | u16 block); | |
faa4fd2a BC |
378 | #define SOLO_DEF_MOT_THRESH 0x0300 |
379 | ||
380 | /* Write text on OSD */ | |
381 | int solo_osd_print(struct solo_enc_dev *solo_enc); | |
382 | ||
dcae5dac HV |
383 | /* EEPROM commands */ |
384 | unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en); | |
385 | unsigned short solo_eeprom_read(struct solo_dev *solo_dev, int loc); | |
386 | int solo_eeprom_write(struct solo_dev *solo_dev, int loc, | |
387 | unsigned short data); | |
388 | ||
389 | /* JPEG Qp functions */ | |
390 | void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch, | |
391 | unsigned int qp); | |
392 | int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch); | |
393 | ||
394 | #define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags)) | |
395 | ||
decebabf | 396 | #endif /* __SOLO6X10_H */ |