[deliverable/linux.git] / drivers / staging / media / solo6x10 / solo6x10.h

/*
 * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
 *
 * Original author:
 * Ben Collins <bcollins@ubuntu.com>
 *
 * Additional work by:
 * John Brooks <john.brooks@bluecherry.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */

#ifndef __SOLO6X10_H
#define __SOLO6X10_H

#include <linux/pci.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/list.h>
#include <linux/wait.h>
#include <linux/stringify.h>
#include <linux/io.h>
#include <linux/atomic.h>
#include <linux/slab.h>
#include <linux/videodev2.h>

#include <media/v4l2-dev.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
#include <media/videobuf2-core.h>

#include "registers.h"

#ifndef PCI_VENDOR_ID_SOFTLOGIC
#define PCI_VENDOR_ID_SOFTLOGIC		0x9413
#define PCI_DEVICE_ID_SOLO6010		0x6010
#define PCI_DEVICE_ID_SOLO6110		0x6110
#endif

#ifndef PCI_VENDOR_ID_BLUECHERRY
#define PCI_VENDOR_ID_BLUECHERRY	0x1BB3
/* Neugent Softlogic 6010 based cards */
#define PCI_DEVICE_ID_NEUSOLO_4		0x4304
#define PCI_DEVICE_ID_NEUSOLO_9		0x4309
#define PCI_DEVICE_ID_NEUSOLO_16	0x4310
/* Bluecherry Softlogic 6010 based cards */
#define PCI_DEVICE_ID_BC_SOLO_4		0x4E04
#define PCI_DEVICE_ID_BC_SOLO_9		0x4E09
#define PCI_DEVICE_ID_BC_SOLO_16	0x4E10
/* Bluecherry Softlogic 6110 based cards */
#define PCI_DEVICE_ID_BC_6110_4		0x5304
#define PCI_DEVICE_ID_BC_6110_8		0x5308
#define PCI_DEVICE_ID_BC_6110_16	0x5310
#endif /* Bluecherry */

/* Used in pci_device_id, and solo_dev->type */
#define SOLO_DEV_6010			0
#define SOLO_DEV_6110			1

#define SOLO6X10_NAME			"solo6x10"

#define SOLO_MAX_CHANNELS		16

#define SOLO6X10_VERSION		"3.0.0"

/*
 * The SOLO6x10 actually has 8 i2c channels, but we only use 2.
 * 0 - Techwell chip(s)
 * 1 - SAA7128
 */
#define SOLO_I2C_ADAPTERS		2
#define SOLO_I2C_TW			0
#define SOLO_I2C_SAA			1

/* DMA Engine setup */
#define SOLO_NR_P2M			4
#define SOLO_NR_P2M_DESC		256
#define SOLO_P2M_DESC_SIZE		(SOLO_NR_P2M_DESC * 16)

/* Encoder standard modes */
#define SOLO_ENC_MODE_CIF		2
#define SOLO_ENC_MODE_HD1		1
#define SOLO_ENC_MODE_D1		9

#define SOLO_DEFAULT_GOP		30
#define SOLO_DEFAULT_QP			3

#ifndef V4L2_BUF_FLAG_MOTION_ON
#define V4L2_BUF_FLAG_MOTION_ON		0x10000
#define V4L2_BUF_FLAG_MOTION_DETECTED	0x20000
#endif

#define SOLO_CID_CUSTOM_BASE		(V4L2_CID_USER_BASE | 0xf000)
#define V4L2_CID_MOTION_MODE		(SOLO_CID_CUSTOM_BASE+0)
#define V4L2_CID_MOTION_THRESHOLD	(SOLO_CID_CUSTOM_BASE+1)
#define V4L2_CID_MOTION_TRACE		(SOLO_CID_CUSTOM_BASE+2)
#define V4L2_CID_OSD_TEXT		(SOLO_CID_CUSTOM_BASE+3)

/*
 * Motion thresholds are in a table of 64x64 samples, with
 * each sample representing 16x16 pixels of the source. In
 * effect, 44x30 samples are used for NTSC, and 44x36 for PAL.
 * The 5th sample on the 10th row is (10*64)+5 = 645.
 */
#define SOLO_MOTION_SZ (64)
struct solo_motion_thresholds {
	__u16	thresholds[SOLO_MOTION_SZ][SOLO_MOTION_SZ];
};

#define SOLO_IOC_G_MOTION_THRESHOLDS	_IOR('V', BASE_VIDIOC_PRIVATE+0, struct solo_motion_thresholds)
#define SOLO_IOC_S_MOTION_THRESHOLDS	_IOW('V', BASE_VIDIOC_PRIVATE+1, struct solo_motion_thresholds)

enum SOLO_I2C_STATE {
	IIC_STATE_IDLE,
	IIC_STATE_START,
	IIC_STATE_READ,
	IIC_STATE_WRITE,
	IIC_STATE_STOP
};

/* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */
struct solo_p2m_desc {
	u32	ctrl;
	u32	cfg;
	u32	dma_addr;
	u32	ext_addr;
};

struct solo_p2m_dev {
	struct mutex		mutex;
	struct completion	completion;
	int			desc_count;
	int			desc_idx;
	struct solo_p2m_desc	*descs;
	int			error;
};

#define OSD_TEXT_MAX		44

struct solo_vb2_buf {
	struct vb2_buffer vb;
	struct list_head list;
};

enum solo_enc_types {
	SOLO_ENC_TYPE_STD,
	SOLO_ENC_TYPE_EXT,
};

struct solo_enc_dev {
	struct solo_dev	*solo_dev;
	/* V4L2 Items */
	struct v4l2_ctrl_handler hdl;
	struct video_device	*vfd;
	/* General accounting */
	struct mutex		lock;
	spinlock_t		motion_lock;
	u8			ch;
	u8			mode, gop, qp, interlaced, interval;
	u8			bw_weight;
	u16			motion_thresh;
	struct solo_motion_thresholds motion_thresholds;
	bool			motion_global;
	bool			motion_enabled;
	u16			width;
	u16			height;

	/* OSD buffers */
	char			osd_text[OSD_TEXT_MAX + 1];
	u8			osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
					__aligned(4);

	/* VOP stuff */
	unsigned char		vop[64];
	int			vop_len;
	unsigned char		jpeg_header[1024];
	int			jpeg_len;

	u32			fmt;
	enum solo_enc_types	type;
	u32			sequence;
	struct vb2_queue	vidq;
	struct list_head	vidq_active;
	int			desc_count;
	int			desc_nelts;
	struct solo_p2m_desc	*desc_items;
	dma_addr_t		desc_dma;
	spinlock_t		av_lock;
};

/* The SOLO6x10 PCI Device */
struct solo_dev {
	/* General stuff */
	struct pci_dev		*pdev;
	int			type;
	unsigned int		time_sync;
	unsigned int		usec_lsb;
	unsigned int		clock_mhz;
	u8 __iomem		*reg_base;
	int			nr_chans;
	int			nr_ext;
	u32			irq_mask;
	u32			motion_mask;
	spinlock_t		reg_io_lock;
	struct v4l2_device	v4l2_dev;

	/* tw28xx accounting */
	u8			tw2865, tw2864, tw2815;
	u8			tw28_cnt;

	/* i2c related items */
	struct i2c_adapter	i2c_adap[SOLO_I2C_ADAPTERS];
	enum SOLO_I2C_STATE	i2c_state;
	struct mutex		i2c_mutex;
	int			i2c_id;
	wait_queue_head_t	i2c_wait;
	struct i2c_msg		*i2c_msg;
	unsigned int		i2c_msg_num;
	unsigned int		i2c_msg_ptr;

	/* P2M DMA Engine */
	struct solo_p2m_dev	p2m_dev[SOLO_NR_P2M];
	atomic_t		p2m_count;
	int			p2m_jiffies;
	unsigned int		p2m_timeouts;

	/* V4L2 Display items */
	struct video_device	*vfd;
	unsigned int		erasing;
	unsigned int		frame_blank;
	u8			cur_disp_ch;
	wait_queue_head_t	disp_thread_wait;
	struct v4l2_ctrl_handler disp_hdl;

	/* V4L2 Encoder items */
	struct solo_enc_dev	*v4l2_enc[SOLO_MAX_CHANNELS];
	u16			enc_bw_remain;
	/* IDX into hw mp4 encoder */
	u8			enc_idx;

	/* Current video settings */
	u32			video_type;
	u16			video_hsize, video_vsize;
	u16			vout_hstart, vout_vstart;
	u16			vin_hstart, vin_vstart;
	u8			fps;

	/* JPEG Qp setting */
	spinlock_t      jpeg_qp_lock;
	u32		jpeg_qp[2];

	/* Audio components */
	struct snd_card		*snd_card;
	struct snd_pcm		*snd_pcm;
	atomic_t		snd_users;
	int			g723_hw_idx;

	/* sysfs stuffs */
	struct device		dev;
	int			sdram_size;
	struct bin_attribute	sdram_attr;
	unsigned int		sys_config;

	/* Ring thread */
	struct task_struct	*ring_thread;
	wait_queue_head_t	ring_thread_wait;

	/* VOP_HEADER handling */
	void                    *vh_buf;
	dma_addr_t		vh_dma;
	int			vh_size;

	/* Buffer handling */
	struct vb2_queue	vidq;
	struct vb2_alloc_ctx	*alloc_ctx;
	u32			sequence;
	struct task_struct      *kthread;
	struct mutex		lock;
	spinlock_t		slock;
	int			old_write;
	struct list_head	vidq_active;
};

static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
{
	unsigned long flags;
	u32 ret;
	u16 val;

	spin_lock_irqsave(&solo_dev->reg_io_lock, flags);

	ret = readl(solo_dev->reg_base + reg);
	rmb();
	pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
	rmb();

	spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);

	return ret;
}

static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
				  u32 data)
{
	unsigned long flags;
	u16 val;

	spin_lock_irqsave(&solo_dev->reg_io_lock, flags);

	writel(data, solo_dev->reg_base + reg);
	wmb();
	pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
	rmb();

	spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
}

static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
{
	dev->irq_mask |= mask;
	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
}

static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
{
	dev->irq_mask &= ~mask;
	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
}

/* Init/exit routines for subsystems */
int solo_disp_init(struct solo_dev *solo_dev);
void solo_disp_exit(struct solo_dev *solo_dev);

int solo_gpio_init(struct solo_dev *solo_dev);
void solo_gpio_exit(struct solo_dev *solo_dev);

int solo_i2c_init(struct solo_dev *solo_dev);
void solo_i2c_exit(struct solo_dev *solo_dev);

int solo_p2m_init(struct solo_dev *solo_dev);
void solo_p2m_exit(struct solo_dev *solo_dev);

int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
void solo_v4l2_exit(struct solo_dev *solo_dev);

int solo_enc_init(struct solo_dev *solo_dev);
void solo_enc_exit(struct solo_dev *solo_dev);

int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
void solo_enc_v4l2_exit(struct solo_dev *solo_dev);

int solo_g723_init(struct solo_dev *solo_dev);
void solo_g723_exit(struct solo_dev *solo_dev);

/* ISR's */
int solo_i2c_isr(struct solo_dev *solo_dev);
void solo_p2m_isr(struct solo_dev *solo_dev, int id);
void solo_p2m_error_isr(struct solo_dev *solo_dev);
void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
void solo_g723_isr(struct solo_dev *solo_dev);
void solo_motion_isr(struct solo_dev *solo_dev);
void solo_video_in_isr(struct solo_dev *solo_dev);

/* i2c read/write */
u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
			u8 data);

/* P2M DMA */
int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
		   dma_addr_t dma_addr, u32 ext_addr, u32 size,
		   int repeat, u32 ext_size);
int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
		 void *sys_addr, u32 ext_addr, u32 size,
		 int repeat, u32 ext_size);
void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
			dma_addr_t dma_addr, u32 ext_addr, u32 size,
			int repeat, u32 ext_size);
int solo_p2m_dma_desc(struct solo_dev *solo_dev,
		      struct solo_p2m_desc *desc, dma_addr_t desc_dma,
		      int desc_cnt);

/* Global s_std ioctl */
int solo_set_video_type(struct solo_dev *solo_dev, bool type);
void solo_update_mode(struct solo_enc_dev *solo_enc);

/* Set the threshold for motion detection */
int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
		const struct solo_motion_thresholds *thresholds);
#define SOLO_DEF_MOT_THRESH		0x0300

/* Write text on OSD */
int solo_osd_print(struct solo_enc_dev *solo_enc);

/* EEPROM commands */
unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
unsigned short solo_eeprom_read(struct solo_dev *solo_dev, int loc);
int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
		      unsigned short data);

/* JPEG Qp functions */
void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
		    unsigned int qp);
int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);

#define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))

#endif /* __SOLO6X10_H */
Commit	Line	Data
faa4fd2a	1	/*
dcae5dac HV	2	* Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
	3	*
	4	* Original author:
	5	* Ben Collins <bcollins@ubuntu.com>
	6	*
	7	* Additional work by:
	8	* John Brooks <john.brooks@bluecherry.net>
faa4fd2a BC	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	23	*/
	24
decebabf KH	25	#ifndef __SOLO6X10_H
decebabf KH	26	#define __SOLO6X10_H
faa4fd2a	27
faa4fd2a BC	28	#include <linux/pci.h>
faa4fd2a BC	29	#include <linux/i2c.h>
faa4fd2a BC	30	#include <linux/mutex.h>
	31	#include <linux/list.h>
	32	#include <linux/wait.h>
dcae5dac HV	33	#include <linux/stringify.h>
dcae5dac HV	34	#include <linux/io.h>
60063497	35	#include <linux/atomic.h>
dcae5dac	36	#include <linux/slab.h>
faa4fd2a	37	#include <linux/videodev2.h>
dcae5dac	38
faa4fd2a	39	#include <media/v4l2-dev.h>
d9ebd623	40	#include <media/v4l2-device.h>
c813bd3c	41	#include <media/v4l2-ctrls.h>
382c31a9	42	#include <media/videobuf2-core.h>
dcae5dac	43
ae69b22c	44	#include "registers.h"
faa4fd2a BC	45
	46	#ifndef PCI_VENDOR_ID_SOFTLOGIC
	47	#define PCI_VENDOR_ID_SOFTLOGIC 0x9413
	48	#define PCI_DEVICE_ID_SOLO6010 0x6010
908113d8	49	#define PCI_DEVICE_ID_SOLO6110 0x6110
faa4fd2a BC	50	#endif
	51
	52	#ifndef PCI_VENDOR_ID_BLUECHERRY
	53	#define PCI_VENDOR_ID_BLUECHERRY 0x1BB3
	54	/* Neugent Softlogic 6010 based cards */
	55	#define PCI_DEVICE_ID_NEUSOLO_4 0x4304
	56	#define PCI_DEVICE_ID_NEUSOLO_9 0x4309
	57	#define PCI_DEVICE_ID_NEUSOLO_16 0x4310
f62de9be BC	58	/* Bluecherry Softlogic 6010 based cards */
	59	#define PCI_DEVICE_ID_BC_SOLO_4 0x4E04
	60	#define PCI_DEVICE_ID_BC_SOLO_9 0x4E09
	61	#define PCI_DEVICE_ID_BC_SOLO_16 0x4E10
	62	/* Bluecherry Softlogic 6110 based cards */
	63	#define PCI_DEVICE_ID_BC_6110_4 0x5304
	64	#define PCI_DEVICE_ID_BC_6110_8 0x5308
	65	#define PCI_DEVICE_ID_BC_6110_16 0x5310
faa4fd2a BC	66	#endif /* Bluecherry */
faa4fd2a BC	67
dcae5dac HV	68	/* Used in pci_device_id, and solo_dev->type */
	69	#define SOLO_DEV_6010 0
	70	#define SOLO_DEV_6110 1
	71
decebabf	72	#define SOLO6X10_NAME "solo6x10"
faa4fd2a BC	73
	74	#define SOLO_MAX_CHANNELS 16
	75
20c5f492	76	#define SOLO6X10_VERSION "3.0.0"
908113d8	77
faa4fd2a	78	/*
decebabf	79	* The SOLO6x10 actually has 8 i2c channels, but we only use 2.
faa4fd2a BC	80	* 0 - Techwell chip(s)
	81	* 1 - SAA7128
	82	*/
	83	#define SOLO_I2C_ADAPTERS 2
	84	#define SOLO_I2C_TW 0
	85	#define SOLO_I2C_SAA 1
	86
	87	/* DMA Engine setup */
	88	#define SOLO_NR_P2M 4
	89	#define SOLO_NR_P2M_DESC 256
dcae5dac	90	#define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16)
faa4fd2a BC	91
	92	/* Encoder standard modes */
	93	#define SOLO_ENC_MODE_CIF 2
	94	#define SOLO_ENC_MODE_HD1 1
	95	#define SOLO_ENC_MODE_D1 9
	96
	97	#define SOLO_DEFAULT_GOP 30
	98	#define SOLO_DEFAULT_QP 3
	99
faa4fd2a	100	#ifndef V4L2_BUF_FLAG_MOTION_ON
f5df0b7f HV	101	#define V4L2_BUF_FLAG_MOTION_ON 0x10000
f5df0b7f HV	102	#define V4L2_BUF_FLAG_MOTION_DETECTED 0x20000
faa4fd2a	103	#endif
c813bd3c HV	104
c813bd3c HV	105	#define SOLO_CID_CUSTOM_BASE (V4L2_CID_USER_BASE \| 0xf000)
f5df0b7f	106	#define V4L2_CID_MOTION_MODE (SOLO_CID_CUSTOM_BASE+0)
c813bd3c HV	107	#define V4L2_CID_MOTION_THRESHOLD (SOLO_CID_CUSTOM_BASE+1)
	108	#define V4L2_CID_MOTION_TRACE (SOLO_CID_CUSTOM_BASE+2)
	109	#define V4L2_CID_OSD_TEXT (SOLO_CID_CUSTOM_BASE+3)
faa4fd2a	110
f5df0b7f HV	111	/*
	112	* Motion thresholds are in a table of 64x64 samples, with
	113	* each sample representing 16x16 pixels of the source. In
	114	* effect, 44x30 samples are used for NTSC, and 44x36 for PAL.
	115	* The 5th sample on the 10th row is (10*64)+5 = 645.
	116	*/
	117	#define SOLO_MOTION_SZ (64)
	118	struct solo_motion_thresholds {
	119	__u16 thresholds[SOLO_MOTION_SZ][SOLO_MOTION_SZ];
	120	};
	121
	122	#define SOLO_IOC_G_MOTION_THRESHOLDS _IOR('V', BASE_VIDIOC_PRIVATE+0, struct solo_motion_thresholds)
	123	#define SOLO_IOC_S_MOTION_THRESHOLDS _IOW('V', BASE_VIDIOC_PRIVATE+1, struct solo_motion_thresholds)
	124
faa4fd2a BC	125	enum SOLO_I2C_STATE {
	126	IIC_STATE_IDLE,
	127	IIC_STATE_START,
	128	IIC_STATE_READ,
	129	IIC_STATE_WRITE,
	130	IIC_STATE_STOP
	131	};
	132
dcae5dac HV	133	/* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */
	134	struct solo_p2m_desc {
	135	u32 ctrl;
	136	u32 cfg;
	137	u32 dma_addr;
	138	u32 ext_addr;
f62de9be BC	139	};
f62de9be BC	140
faa4fd2a	141	struct solo_p2m_dev {
f62de9be	142	struct mutex mutex;
faa4fd2a	143	struct completion completion;
dcae5dac HV	144	int desc_count;
	145	int desc_idx;
	146	struct solo_p2m_desc *descs;
faa4fd2a	147	int error;
faa4fd2a BC	148	};
faa4fd2a BC	149
dcae5dac	150	#define OSD_TEXT_MAX 44
faa4fd2a	151
382c31a9 HV	152	struct solo_vb2_buf {
	153	struct vb2_buffer vb;
	154	struct list_head list;
	155	};
	156
a7eb931d HV	157	enum solo_enc_types {
	158	SOLO_ENC_TYPE_STD,
	159	SOLO_ENC_TYPE_EXT,
	160	};
	161
faa4fd2a	162	struct solo_enc_dev {
dcae5dac	163	struct solo_dev *solo_dev;
faa4fd2a	164	/* V4L2 Items */
c813bd3c	165	struct v4l2_ctrl_handler hdl;
faa4fd2a BC	166	struct video_device *vfd;
faa4fd2a BC	167	/* General accounting */
382c31a9	168	struct mutex lock;
dcae5dac	169	spinlock_t motion_lock;
faa4fd2a BC	170	u8 ch;
faa4fd2a BC	171	u8 mode, gop, qp, interlaced, interval;
faa4fd2a	172	u8 bw_weight;
faa4fd2a	173	u16 motion_thresh;
f5df0b7f HV	174	struct solo_motion_thresholds motion_thresholds;
	175	bool motion_global;
	176	bool motion_enabled;
faa4fd2a BC	177	u16 width;
faa4fd2a BC	178	u16 height;
dcae5dac HV	179
dcae5dac HV	180	/* OSD buffers */
faa4fd2a	181	char osd_text[OSD_TEXT_MAX + 1];
dcae5dac HV	182	u8 osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
dcae5dac HV	183	__aligned(4);
faa4fd2a	184
dcae5dac HV	185	/* VOP stuff */
	186	unsigned char vop[64];
	187	int vop_len;
	188	unsigned char jpeg_header[1024];
	189	int jpeg_len;
	190
a7eb931d	191	u32 fmt;
a7eb931d	192	enum solo_enc_types type;
15513c12	193	u32 sequence;
382c31a9	194	struct vb2_queue vidq;
a7eb931d HV	195	struct list_head vidq_active;
	196	int desc_count;
	197	int desc_nelts;
	198	struct solo_p2m_desc *desc_items;
	199	dma_addr_t desc_dma;
	200	spinlock_t av_lock;
faa4fd2a BC	201	};
faa4fd2a BC	202
decebabf KH	203	/* The SOLO6x10 PCI Device */
decebabf KH	204	struct solo_dev {
faa4fd2a BC	205	/* General stuff */
faa4fd2a BC	206	struct pci_dev *pdev;
dcae5dac HV	207	int type;
	208	unsigned int time_sync;
	209	unsigned int usec_lsb;
	210	unsigned int clock_mhz;
faa4fd2a BC	211	u8 __iomem *reg_base;
	212	int nr_chans;
	213	int nr_ext;
	214	u32 irq_mask;
	215	u32 motion_mask;
	216	spinlock_t reg_io_lock;
d9ebd623	217	struct v4l2_device v4l2_dev;
faa4fd2a BC	218
faa4fd2a BC	219	/* tw28xx accounting */
ee6351f5	220	u8 tw2865, tw2864, tw2815;
faa4fd2a BC	221	u8 tw28_cnt;
	222
	223	/* i2c related items */
	224	struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS];
	225	enum SOLO_I2C_STATE i2c_state;
f62de9be	226	struct mutex i2c_mutex;
faa4fd2a BC	227	int i2c_id;
	228	wait_queue_head_t i2c_wait;
	229	struct i2c_msg *i2c_msg;
	230	unsigned int i2c_msg_num;
	231	unsigned int i2c_msg_ptr;
	232
	233	/* P2M DMA Engine */
	234	struct solo_p2m_dev p2m_dev[SOLO_NR_P2M];
dcae5dac HV	235	atomic_t p2m_count;
	236	int p2m_jiffies;
	237	unsigned int p2m_timeouts;
faa4fd2a BC	238
	239	/* V4L2 Display items */
	240	struct video_device *vfd;
	241	unsigned int erasing;
	242	unsigned int frame_blank;
	243	u8 cur_disp_ch;
	244	wait_queue_head_t disp_thread_wait;
c813bd3c	245	struct v4l2_ctrl_handler disp_hdl;
faa4fd2a BC	246
	247	/* V4L2 Encoder items */
	248	struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS];
	249	u16 enc_bw_remain;
	250	/* IDX into hw mp4 encoder */
	251	u8 enc_idx;
faa4fd2a BC	252
faa4fd2a BC	253	/* Current video settings */
afabbe6d	254	u32 video_type;
faa4fd2a BC	255	u16 video_hsize, video_vsize;
	256	u16 vout_hstart, vout_vstart;
	257	u16 vin_hstart, vin_vstart;
	258	u8 fps;
	259
dcae5dac HV	260	/* JPEG Qp setting */
	261	spinlock_t jpeg_qp_lock;
	262	u32 jpeg_qp[2];
	263
faa4fd2a BC	264	/* Audio components */
	265	struct snd_card *snd_card;
	266	struct snd_pcm *snd_pcm;
	267	atomic_t snd_users;
	268	int g723_hw_idx;
dcae5dac HV	269
	270	/* sysfs stuffs */
	271	struct device dev;
	272	int sdram_size;
	273	struct bin_attribute sdram_attr;
	274	unsigned int sys_config;
	275
	276	/* Ring thread */
	277	struct task_struct *ring_thread;
	278	wait_queue_head_t ring_thread_wait;
dcae5dac HV	279
	280	/* VOP_HEADER handling */
	281	void *vh_buf;
	282	dma_addr_t vh_dma;
	283	int vh_size;
6a2e65d5 HV	284
6a2e65d5 HV	285	/* Buffer handling */
a4056c2f HV	286	struct vb2_queue vidq;
a4056c2f HV	287	struct vb2_alloc_ctx *alloc_ctx;
15513c12	288	u32 sequence;
6a2e65d5	289	struct task_struct *kthread;
a4056c2f	290	struct mutex lock;
6a2e65d5 HV	291	spinlock_t slock;
	292	int old_write;
	293	struct list_head vidq_active;
faa4fd2a BC	294	};
faa4fd2a BC	295
decebabf	296	static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
faa4fd2a BC	297	{
	298	unsigned long flags;
	299	u32 ret;
	300	u16 val;
	301
	302	spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
	303
	304	ret = readl(solo_dev->reg_base + reg);
	305	rmb();
	306	pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
	307	rmb();
	308
	309	spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
	310
	311	return ret;
	312	}
	313
dcae5dac HV	314	static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
dcae5dac HV	315	u32 data)
faa4fd2a BC	316	{
	317	unsigned long flags;
	318	u16 val;
	319
	320	spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
	321
	322	writel(data, solo_dev->reg_base + reg);
	323	wmb();
	324	pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
	325	rmb();
	326
	327	spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
	328	}
	329
dcae5dac HV	330	static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
	331	{
	332	dev->irq_mask \|= mask;
	333	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
	334	}
	335
	336	static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
	337	{
	338	dev->irq_mask &= ~mask;
	339	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
	340	}
faa4fd2a	341
4c211ed7	342	/* Init/exit routines for subsystems */
decebabf KH	343	int solo_disp_init(struct solo_dev *solo_dev);
decebabf KH	344	void solo_disp_exit(struct solo_dev *solo_dev);
faa4fd2a	345
decebabf KH	346	int solo_gpio_init(struct solo_dev *solo_dev);
decebabf KH	347	void solo_gpio_exit(struct solo_dev *solo_dev);
faa4fd2a	348
decebabf KH	349	int solo_i2c_init(struct solo_dev *solo_dev);
decebabf KH	350	void solo_i2c_exit(struct solo_dev *solo_dev);
faa4fd2a	351
decebabf KH	352	int solo_p2m_init(struct solo_dev *solo_dev);
decebabf KH	353	void solo_p2m_exit(struct solo_dev *solo_dev);
faa4fd2a	354
dcae5dac	355	int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
decebabf	356	void solo_v4l2_exit(struct solo_dev *solo_dev);
faa4fd2a	357
decebabf KH	358	int solo_enc_init(struct solo_dev *solo_dev);
decebabf KH	359	void solo_enc_exit(struct solo_dev *solo_dev);
faa4fd2a	360
dcae5dac	361	int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
decebabf	362	void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
faa4fd2a	363
decebabf KH	364	int solo_g723_init(struct solo_dev *solo_dev);
decebabf KH	365	void solo_g723_exit(struct solo_dev *solo_dev);
faa4fd2a BC	366
faa4fd2a BC	367	/* ISR's */
decebabf KH	368	int solo_i2c_isr(struct solo_dev *solo_dev);
decebabf KH	369	void solo_p2m_isr(struct solo_dev *solo_dev, int id);
dcae5dac	370	void solo_p2m_error_isr(struct solo_dev *solo_dev);
decebabf KH	371	void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
	372	void solo_g723_isr(struct solo_dev *solo_dev);
	373	void solo_motion_isr(struct solo_dev *solo_dev);
	374	void solo_video_in_isr(struct solo_dev *solo_dev);
faa4fd2a BC	375
faa4fd2a BC	376	/* i2c read/write */
decebabf KH	377	u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
decebabf KH	378	void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
faa4fd2a BC	379	u8 data);
	380
	381	/* P2M DMA */
dcae5dac HV	382	int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
	383	dma_addr_t dma_addr, u32 ext_addr, u32 size,
	384	int repeat, u32 ext_size);
	385	int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
	386	void *sys_addr, u32 ext_addr, u32 size,
	387	int repeat, u32 ext_size);
	388	void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
	389	dma_addr_t dma_addr, u32 ext_addr, u32 size,
	390	int repeat, u32 ext_size);
	391	int solo_p2m_dma_desc(struct solo_dev *solo_dev,
	392	struct solo_p2m_desc *desc, dma_addr_t desc_dma,
	393	int desc_cnt);
faa4fd2a	394
4c211ed7 HV	395	/* Global s_std ioctl */
	396	int solo_set_video_type(struct solo_dev *solo_dev, bool type);
	397	void solo_update_mode(struct solo_enc_dev *solo_enc);
	398
faa4fd2a	399	/* Set the threshold for motion detection */
dcae5dac	400	int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
f5df0b7f HV	401	int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
f5df0b7f HV	402	const struct solo_motion_thresholds *thresholds);
faa4fd2a BC	403	#define SOLO_DEF_MOT_THRESH 0x0300
	404
	405	/* Write text on OSD */
	406	int solo_osd_print(struct solo_enc_dev *solo_enc);
	407
dcae5dac HV	408	/* EEPROM commands */
	409	unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
	410	unsigned short solo_eeprom_read(struct solo_dev *solo_dev, int loc);
	411	int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
	412	unsigned short data);
	413
	414	/* JPEG Qp functions */
	415	void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
	416	unsigned int qp);
	417	int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);
	418
	419	#define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))
	420
decebabf	421	#endif /* __SOLO6X10_H */