staging: octeon-ethernet: remove skb alloc failure warnings
[deliverable/linux.git] / drivers / staging / octeon / ethernet-rx.c
CommitLineData
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1/**********************************************************************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
3368c784 7 * Copyright (c) 2003-2010 Cavium Networks
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8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26**********************************************************************/
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/cache.h>
3368c784 30#include <linux/cpumask.h>
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31#include <linux/netdevice.h>
32#include <linux/init.h>
33#include <linux/etherdevice.h>
34#include <linux/ip.h>
35#include <linux/string.h>
36#include <linux/prefetch.h>
7a2eaf93 37#include <linux/ratelimit.h>
3368c784 38#include <linux/smp.h>
dc890df0 39#include <linux/interrupt.h>
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40#include <net/dst.h>
41#ifdef CONFIG_XFRM
42#include <linux/xfrm.h>
43#include <net/xfrm.h>
44#endif /* CONFIG_XFRM */
45
60063497 46#include <linux/atomic.h>
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47
48#include <asm/octeon/octeon.h>
49
50#include "ethernet-defines.h"
80ff0fd3 51#include "ethernet-mem.h"
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52#include "ethernet-rx.h"
53#include "octeon-ethernet.h"
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54#include "ethernet-util.h"
55
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56#include <asm/octeon/cvmx-helper.h>
57#include <asm/octeon/cvmx-wqe.h>
58#include <asm/octeon/cvmx-fau.h>
59#include <asm/octeon/cvmx-pow.h>
60#include <asm/octeon/cvmx-pip.h>
61#include <asm/octeon/cvmx-scratch.h>
80ff0fd3 62
af866496 63#include <asm/octeon/cvmx-gmxx-defs.h>
80ff0fd3 64
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65struct cvm_napi_wrapper {
66 struct napi_struct napi;
67} ____cacheline_aligned_in_smp;
80ff0fd3 68
3368c784 69static struct cvm_napi_wrapper cvm_oct_napi[NR_CPUS] __cacheline_aligned_in_smp;
80ff0fd3 70
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71struct cvm_oct_core_state {
72 int baseline_cores;
73 /*
74 * The number of additional cores that could be processing
75 * input packtes.
76 */
77 atomic_t available_cores;
78 cpumask_t cpu_state;
79} ____cacheline_aligned_in_smp;
80ff0fd3 80
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81static struct cvm_oct_core_state core_state __cacheline_aligned_in_smp;
82
83static void cvm_oct_enable_napi(void *_)
80ff0fd3 84{
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85 int cpu = smp_processor_id();
86 napi_schedule(&cvm_oct_napi[cpu].napi);
87}
88
89static void cvm_oct_enable_one_cpu(void)
90{
91 int v;
92 int cpu;
93
94 /* Check to see if more CPUs are available for receive processing... */
95 v = atomic_sub_if_positive(1, &core_state.available_cores);
96 if (v < 0)
97 return;
98
99 /* ... if a CPU is available, Turn on NAPI polling for that CPU. */
100 for_each_online_cpu(cpu) {
101 if (!cpu_test_and_set(cpu, core_state.cpu_state)) {
102 v = smp_call_function_single(cpu, cvm_oct_enable_napi,
103 NULL, 0);
104 if (v)
105 panic("Can't enable NAPI.");
106 break;
107 }
108 }
109}
110
111static void cvm_oct_no_more_work(void)
112{
113 int cpu = smp_processor_id();
114
115 /*
116 * CPU zero is special. It always has the irq enabled when
117 * waiting for incoming packets.
118 */
119 if (cpu == 0) {
120 enable_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group);
121 return;
122 }
123
124 cpu_clear(cpu, core_state.cpu_state);
125 atomic_add(1, &core_state.available_cores);
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126}
127
80ff0fd3 128/**
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129 * cvm_oct_do_interrupt - interrupt handler.
130 *
131 * The interrupt occurs whenever the POW has packets in our group.
80ff0fd3 132 *
80ff0fd3 133 */
3368c784 134static irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id)
80ff0fd3 135{
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136 /* Disable the IRQ and start napi_poll. */
137 disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group);
138 cvm_oct_enable_napi(NULL);
139
140 return IRQ_HANDLED;
80ff0fd3 141}
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142
143/**
ec977c5b 144 * cvm_oct_check_rcv_error - process receive errors
80ff0fd3 145 * @work: Work queue entry pointing to the packet.
ec977c5b 146 *
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147 * Returns Non-zero if the packet can be dropped, zero otherwise.
148 */
149static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
150{
151 if ((work->word2.snoip.err_code == 10) && (work->len <= 64)) {
152 /*
153 * Ignore length errors on min size packets. Some
154 * equipment incorrectly pads packets to 64+4FCS
155 * instead of 60+4FCS. Note these packets still get
156 * counted as frame errors.
157 */
158 } else
159 if (USE_10MBPS_PREAMBLE_WORKAROUND
160 && ((work->word2.snoip.err_code == 5)
161 || (work->word2.snoip.err_code == 7))) {
162
163 /*
164 * We received a packet with either an alignment error
165 * or a FCS error. This may be signalling that we are
215c47c9 166 * running 10Mbps with GMXX_RXX_FRM_CTL[PRE_CHK]
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167 * off. If this is the case we need to parse the
168 * packet to determine if we can remove a non spec
169 * preamble and generate a correct packet.
170 */
171 int interface = cvmx_helper_get_interface_num(work->ipprt);
172 int index = cvmx_helper_get_interface_index_num(work->ipprt);
173 union cvmx_gmxx_rxx_frm_ctl gmxx_rxx_frm_ctl;
174 gmxx_rxx_frm_ctl.u64 =
175 cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
176 if (gmxx_rxx_frm_ctl.s.pre_chk == 0) {
177
178 uint8_t *ptr =
179 cvmx_phys_to_ptr(work->packet_ptr.s.addr);
180 int i = 0;
181
182 while (i < work->len - 1) {
183 if (*ptr != 0x55)
184 break;
185 ptr++;
186 i++;
187 }
188
189 if (*ptr == 0xd5) {
190 /*
7a2eaf93 191 printk_ratelimited("Port %d received 0xd5 preamble\n", work->ipprt);
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192 */
193 work->packet_ptr.s.addr += i + 1;
194 work->len -= i + 5;
195 } else if ((*ptr & 0xf) == 0xd) {
196 /*
7a2eaf93 197 printk_ratelimited("Port %d received 0x?d preamble\n", work->ipprt);
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198 */
199 work->packet_ptr.s.addr += i;
200 work->len -= i + 4;
201 for (i = 0; i < work->len; i++) {
202 *ptr =
203 ((*ptr & 0xf0) >> 4) |
204 ((*(ptr + 1) & 0xf) << 4);
205 ptr++;
206 }
207 } else {
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208 printk_ratelimited("Port %d unknown preamble, packet "
209 "dropped\n",
210 work->ipprt);
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211 /*
212 cvmx_helper_dump_packet(work);
213 */
214 cvm_oct_free_work(work);
215 return 1;
216 }
217 }
218 } else {
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219 printk_ratelimited("Port %d receive error code %d, packet dropped\n",
220 work->ipprt, work->word2.snoip.err_code);
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221 cvm_oct_free_work(work);
222 return 1;
223 }
224
225 return 0;
226}
227
228/**
ec977c5b 229 * cvm_oct_napi_poll - the NAPI poll function.
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230 * @napi: The NAPI instance, or null if called from cvm_oct_poll_controller
231 * @budget: Maximum number of packets to receive.
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232 *
233 * Returns the number of packets processed.
80ff0fd3 234 */
3368c784 235static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
80ff0fd3 236{
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237 const int coreid = cvmx_get_core_num();
238 uint64_t old_group_mask;
239 uint64_t old_scratch;
240 int rx_count = 0;
241 int did_work_request = 0;
242 int packet_not_copied;
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243
244 /* Prefetch cvm_oct_device since we know we need it soon */
245 prefetch(cvm_oct_device);
246
247 if (USE_ASYNC_IOBDMA) {
248 /* Save scratch in case userspace is using it */
249 CVMX_SYNCIOBDMA;
250 old_scratch = cvmx_scratch_read64(CVMX_SCR_SCRATCH);
251 }
252
253 /* Only allow work for our group (and preserve priorities) */
254 old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));
255 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),
256 (old_group_mask & ~0xFFFFull) | 1 << pow_receive_group);
257
3368c784 258 if (USE_ASYNC_IOBDMA) {
80ff0fd3 259 cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
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260 did_work_request = 1;
261 }
80ff0fd3 262
3368c784 263 while (rx_count < budget) {
80ff0fd3 264 struct sk_buff *skb = NULL;
3368c784 265 struct sk_buff **pskb = NULL;
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266 int skb_in_hw;
267 cvmx_wqe_t *work;
268
3368c784 269 if (USE_ASYNC_IOBDMA && did_work_request)
80ff0fd3 270 work = cvmx_pow_work_response_async(CVMX_SCR_SCRATCH);
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271 else
272 work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT);
273
80ff0fd3 274 prefetch(work);
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275 did_work_request = 0;
276 if (work == NULL) {
277 union cvmx_pow_wq_int wq_int;
278 wq_int.u64 = 0;
279 wq_int.s.iq_dis = 1 << pow_receive_group;
280 wq_int.s.wq_int = 1 << pow_receive_group;
281 cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64);
80ff0fd3 282 break;
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283 }
284 pskb = (struct sk_buff **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - sizeof(void *));
285 prefetch(pskb);
80ff0fd3 286
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287 if (USE_ASYNC_IOBDMA && rx_count < (budget - 1)) {
288 cvmx_pow_work_request_async_nocheck(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
289 did_work_request = 1;
290 }
291
292 if (rx_count == 0) {
293 /*
294 * First time through, see if there is enough
295 * work waiting to merit waking another
296 * CPU.
297 */
298 union cvmx_pow_wq_int_cntx counts;
299 int backlog;
300 int cores_in_use = core_state.baseline_cores - atomic_read(&core_state.available_cores);
301 counts.u64 = cvmx_read_csr(CVMX_POW_WQ_INT_CNTX(pow_receive_group));
302 backlog = counts.s.iq_cnt + counts.s.ds_cnt;
303 if (backlog > budget * cores_in_use && napi != NULL)
304 cvm_oct_enable_one_cpu();
80ff0fd3 305 }
ed12cd61 306 rx_count++;
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307
308 skb_in_hw = USE_SKBUFFS_IN_HW && work->word2.s.bufs == 1;
309 if (likely(skb_in_hw)) {
3368c784 310 skb = *pskb;
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311 prefetch(&skb->head);
312 prefetch(&skb->len);
313 }
314 prefetch(cvm_oct_device[work->ipprt]);
315
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316 /* Immediately throw away all packets with receive errors */
317 if (unlikely(work->word2.snoip.rcv_error)) {
318 if (cvm_oct_check_rcv_error(work))
319 continue;
320 }
321
322 /*
323 * We can only use the zero copy path if skbuffs are
324 * in the FPA pool and the packet fits in a single
325 * buffer.
326 */
327 if (likely(skb_in_hw)) {
6568a234 328 skb->data = skb->head + work->packet_ptr.s.addr - cvmx_ptr_to_phys(skb->head);
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329 prefetch(skb->data);
330 skb->len = work->len;
331 skb_set_tail_pointer(skb, skb->len);
332 packet_not_copied = 1;
333 } else {
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334 /*
335 * We have to copy the packet. First allocate
336 * an skbuff for it.
337 */
338 skb = dev_alloc_skb(work->len);
339 if (!skb) {
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340 cvm_oct_free_work(work);
341 continue;
342 }
343
344 /*
345 * Check if we've received a packet that was
6568a234 346 * entirely stored in the work entry.
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347 */
348 if (unlikely(work->word2.s.bufs == 0)) {
349 uint8_t *ptr = work->packet_data;
350
351 if (likely(!work->word2.s.not_IP)) {
352 /*
353 * The beginning of the packet
354 * moves for IP packets.
355 */
356 if (work->word2.s.is_v6)
357 ptr += 2;
358 else
359 ptr += 6;
360 }
361 memcpy(skb_put(skb, work->len), ptr, work->len);
362 /* No packet buffers to free */
363 } else {
364 int segments = work->word2.s.bufs;
6568a234 365 union cvmx_buf_ptr segment_ptr = work->packet_ptr;
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366 int len = work->len;
367
368 while (segments--) {
369 union cvmx_buf_ptr next_ptr =
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370 *(union cvmx_buf_ptr *)cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
371
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372 /*
373 * Octeon Errata PKI-100: The segment size is
374 * wrong. Until it is fixed, calculate the
375 * segment size based on the packet pool
376 * buffer size. When it is fixed, the
377 * following line should be replaced with this
378 * one: int segment_size =
379 * segment_ptr.s.size;
380 */
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381 int segment_size = CVMX_FPA_PACKET_POOL_SIZE -
382 (segment_ptr.s.addr - (((segment_ptr.s.addr >> 7) - segment_ptr.s.back) << 7));
383 /*
384 * Don't copy more than what
385 * is left in the packet.
386 */
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387 if (segment_size > len)
388 segment_size = len;
389 /* Copy the data into the packet */
390 memcpy(skb_put(skb, segment_size),
6568a234 391 cvmx_phys_to_ptr(segment_ptr.s.addr),
80ff0fd3 392 segment_size);
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393 len -= segment_size;
394 segment_ptr = next_ptr;
395 }
396 }
397 packet_not_copied = 0;
398 }
399
400 if (likely((work->ipprt < TOTAL_NUMBER_OF_PORTS) &&
401 cvm_oct_device[work->ipprt])) {
402 struct net_device *dev = cvm_oct_device[work->ipprt];
403 struct octeon_ethernet *priv = netdev_priv(dev);
404
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405 /*
406 * Only accept packets for devices that are
407 * currently up.
408 */
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409 if (likely(dev->flags & IFF_UP)) {
410 skb->protocol = eth_type_trans(skb, dev);
411 skb->dev = dev;
412
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413 if (unlikely(work->word2.s.not_IP || work->word2.s.IP_exc ||
414 work->word2.s.L4_error || !work->word2.s.tcp_or_udp))
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415 skb->ip_summed = CHECKSUM_NONE;
416 else
417 skb->ip_summed = CHECKSUM_UNNECESSARY;
418
419 /* Increment RX stats for virtual ports */
420 if (work->ipprt >= CVMX_PIP_NUM_INPUT_PORTS) {
421#ifdef CONFIG_64BIT
422 atomic64_add(1, (atomic64_t *)&priv->stats.rx_packets);
423 atomic64_add(skb->len, (atomic64_t *)&priv->stats.rx_bytes);
424#else
425 atomic_add(1, (atomic_t *)&priv->stats.rx_packets);
426 atomic_add(skb->len, (atomic_t *)&priv->stats.rx_bytes);
427#endif
428 }
429 netif_receive_skb(skb);
430 } else {
6568a234 431 /* Drop any packet received for a device that isn't up */
80ff0fd3 432 /*
7a2eaf93 433 printk_ratelimited("%s: Device not up, packet dropped\n",
6568a234
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434 dev->name);
435 */
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436#ifdef CONFIG_64BIT
437 atomic64_add(1, (atomic64_t *)&priv->stats.rx_dropped);
438#else
439 atomic_add(1, (atomic_t *)&priv->stats.rx_dropped);
440#endif
441 dev_kfree_skb_irq(skb);
442 }
443 } else {
444 /*
445 * Drop any packet received for a device that
446 * doesn't exist.
447 */
7a2eaf93 448 printk_ratelimited("Port %d not controlled by Linux, packet dropped\n",
6568a234 449 work->ipprt);
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450 dev_kfree_skb_irq(skb);
451 }
452 /*
453 * Check to see if the skbuff and work share the same
454 * packet buffer.
455 */
456 if (USE_SKBUFFS_IN_HW && likely(packet_not_copied)) {
457 /*
458 * This buffer needs to be replaced, increment
459 * the number of buffers we need to free by
460 * one.
461 */
462 cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE,
463 1);
464
465 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL,
466 DONT_WRITEBACK(1));
467 } else {
468 cvm_oct_free_work(work);
469 }
470 }
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471 /* Restore the original POW group mask */
472 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask);
473 if (USE_ASYNC_IOBDMA) {
474 /* Restore the scratch area */
475 cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);
476 }
3368c784 477 cvm_oct_rx_refill_pool(0);
80ff0fd3 478
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479 if (rx_count < budget && napi != NULL) {
480 /* No more work */
481 napi_complete(napi);
482 cvm_oct_no_more_work();
80ff0fd3 483 }
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484 return rx_count;
485}
486
487#ifdef CONFIG_NET_POLL_CONTROLLER
488/**
ec977c5b 489 * cvm_oct_poll_controller - poll for receive packets
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490 * device.
491 *
492 * @dev: Device to poll. Unused
493 */
494void cvm_oct_poll_controller(struct net_device *dev)
495{
496 cvm_oct_napi_poll(NULL, 16);
80ff0fd3 497}
3368c784 498#endif
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499
500void cvm_oct_rx_initialize(void)
501{
502 int i;
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503 struct net_device *dev_for_napi = NULL;
504 union cvmx_pow_wq_int_thrx int_thr;
505 union cvmx_pow_wq_int_pc int_pc;
506
507 for (i = 0; i < TOTAL_NUMBER_OF_PORTS; i++) {
508 if (cvm_oct_device[i]) {
509 dev_for_napi = cvm_oct_device[i];
510 break;
511 }
512 }
513
514 if (NULL == dev_for_napi)
515 panic("No net_devices were allocated.");
516
517 if (max_rx_cpus > 1 && max_rx_cpus < num_online_cpus())
518 atomic_set(&core_state.available_cores, max_rx_cpus);
519 else
520 atomic_set(&core_state.available_cores, num_online_cpus());
521 core_state.baseline_cores = atomic_read(&core_state.available_cores);
522
523 core_state.cpu_state = CPU_MASK_NONE;
524 for_each_possible_cpu(i) {
525 netif_napi_add(dev_for_napi, &cvm_oct_napi[i].napi,
526 cvm_oct_napi_poll, rx_napi_weight);
527 napi_enable(&cvm_oct_napi[i].napi);
528 }
529 /* Register an IRQ hander for to receive POW interrupts */
530 i = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group,
531 cvm_oct_do_interrupt, 0, "Ethernet", cvm_oct_device);
532
533 if (i)
534 panic("Could not acquire Ethernet IRQ %d\n",
535 OCTEON_IRQ_WORKQ0 + pow_receive_group);
536
537 disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group);
538
539 int_thr.u64 = 0;
540 int_thr.s.tc_en = 1;
541 int_thr.s.tc_thr = 1;
542 /* Enable POW interrupt when our port has at least one packet */
543 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), int_thr.u64);
544
545 int_pc.u64 = 0;
546 int_pc.s.pc_thr = 5;
547 cvmx_write_csr(CVMX_POW_WQ_INT_PC, int_pc.u64);
548
549
550 /* Scheduld NAPI now. This will indirectly enable interrupts. */
551 cvm_oct_enable_one_cpu();
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552}
553
554void cvm_oct_rx_shutdown(void)
555{
556 int i;
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557 /* Shutdown all of the NAPIs */
558 for_each_possible_cpu(i)
559 netif_napi_del(&cvm_oct_napi[i].napi);
80ff0fd3 560}
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