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80ff0fd3 DD |
1 | /********************************************************************** |
2 | * Author: Cavium Networks | |
3 | * | |
4 | * Contact: support@caviumnetworks.com | |
5 | * This file is part of the OCTEON SDK | |
6 | * | |
7 | * Copyright (c) 2003-2007 Cavium Networks | |
8 | * | |
9 | * This file is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License, Version 2, as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This file is distributed in the hope that it will be useful, but | |
14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty | |
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or | |
16 | * NONINFRINGEMENT. See the GNU General Public License for more | |
17 | * details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this file; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
22 | * or visit http://www.gnu.org/licenses/. | |
23 | * | |
24 | * This file may also be available under a different license from Cavium. | |
25 | * Contact Cavium Networks for more information | |
26 | **********************************************************************/ | |
df9244c5 | 27 | #include <linux/platform_device.h> |
80ff0fd3 | 28 | #include <linux/kernel.h> |
80ff0fd3 DD |
29 | #include <linux/module.h> |
30 | #include <linux/netdevice.h> | |
31 | #include <linux/etherdevice.h> | |
f6ed1b3b | 32 | #include <linux/phy.h> |
5a0e3ad6 | 33 | #include <linux/slab.h> |
dc890df0 | 34 | #include <linux/interrupt.h> |
df9244c5 | 35 | #include <linux/of_net.h> |
80ff0fd3 DD |
36 | |
37 | #include <net/dst.h> | |
38 | ||
39 | #include <asm/octeon/octeon.h> | |
40 | ||
41 | #include "ethernet-defines.h" | |
a620c163 | 42 | #include "octeon-ethernet.h" |
80ff0fd3 DD |
43 | #include "ethernet-mem.h" |
44 | #include "ethernet-rx.h" | |
45 | #include "ethernet-tx.h" | |
f696a108 | 46 | #include "ethernet-mdio.h" |
80ff0fd3 | 47 | #include "ethernet-util.h" |
80ff0fd3 | 48 | |
af866496 DD |
49 | #include <asm/octeon/cvmx-pip.h> |
50 | #include <asm/octeon/cvmx-pko.h> | |
51 | #include <asm/octeon/cvmx-fau.h> | |
52 | #include <asm/octeon/cvmx-ipd.h> | |
53 | #include <asm/octeon/cvmx-helper.h> | |
80ff0fd3 | 54 | |
af866496 DD |
55 | #include <asm/octeon/cvmx-gmxx-defs.h> |
56 | #include <asm/octeon/cvmx-smix-defs.h> | |
80ff0fd3 DD |
57 | |
58 | #if defined(CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS) \ | |
59 | && CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS | |
60 | int num_packet_buffers = CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS; | |
61 | #else | |
62 | int num_packet_buffers = 1024; | |
63 | #endif | |
64 | module_param(num_packet_buffers, int, 0444); | |
65 | MODULE_PARM_DESC(num_packet_buffers, "\n" | |
66 | "\tNumber of packet buffers to allocate and store in the\n" | |
67 | "\tFPA. By default, 1024 packet buffers are used unless\n" | |
68 | "\tCONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS is defined."); | |
69 | ||
70 | int pow_receive_group = 15; | |
71 | module_param(pow_receive_group, int, 0444); | |
72 | MODULE_PARM_DESC(pow_receive_group, "\n" | |
73 | "\tPOW group to receive packets from. All ethernet hardware\n" | |
d82603c6 | 74 | "\twill be configured to send incoming packets to this POW\n" |
80ff0fd3 DD |
75 | "\tgroup. Also any other software can submit packets to this\n" |
76 | "\tgroup for the kernel to process."); | |
77 | ||
78 | int pow_send_group = -1; | |
79 | module_param(pow_send_group, int, 0644); | |
80 | MODULE_PARM_DESC(pow_send_group, "\n" | |
81 | "\tPOW group to send packets to other software on. This\n" | |
82 | "\tcontrols the creation of the virtual device pow0.\n" | |
83 | "\talways_use_pow also depends on this value."); | |
84 | ||
85 | int always_use_pow; | |
86 | module_param(always_use_pow, int, 0444); | |
87 | MODULE_PARM_DESC(always_use_pow, "\n" | |
88 | "\tWhen set, always send to the pow group. This will cause\n" | |
89 | "\tpackets sent to real ethernet devices to be sent to the\n" | |
90 | "\tPOW group instead of the hardware. Unless some other\n" | |
91 | "\tapplication changes the config, packets will still be\n" | |
92 | "\treceived from the low level hardware. Use this option\n" | |
93 | "\tto allow a CVMX app to intercept all packets from the\n" | |
94 | "\tlinux kernel. You must specify pow_send_group along with\n" | |
95 | "\tthis option."); | |
96 | ||
97 | char pow_send_list[128] = ""; | |
98 | module_param_string(pow_send_list, pow_send_list, sizeof(pow_send_list), 0444); | |
99 | MODULE_PARM_DESC(pow_send_list, "\n" | |
100 | "\tComma separated list of ethernet devices that should use the\n" | |
101 | "\tPOW for transmit instead of the actual ethernet hardware. This\n" | |
102 | "\tis a per port version of always_use_pow. always_use_pow takes\n" | |
103 | "\tprecedence over this list. For example, setting this to\n" | |
104 | "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n" | |
105 | "\tusing the pow_send_group."); | |
106 | ||
3368c784 DD |
107 | int max_rx_cpus = -1; |
108 | module_param(max_rx_cpus, int, 0444); | |
109 | MODULE_PARM_DESC(max_rx_cpus, "\n" | |
110 | "\t\tThe maximum number of CPUs to use for packet reception.\n" | |
111 | "\t\tUse -1 to use all available CPUs."); | |
80ff0fd3 | 112 | |
3368c784 DD |
113 | int rx_napi_weight = 32; |
114 | module_param(rx_napi_weight, int, 0444); | |
115 | MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter."); | |
13c5939e | 116 | |
80ff0fd3 | 117 | /** |
f8c26486 | 118 | * cvm_oct_poll_queue - Workqueue for polling operations. |
80ff0fd3 | 119 | */ |
f8c26486 DD |
120 | struct workqueue_struct *cvm_oct_poll_queue; |
121 | ||
122 | /** | |
123 | * cvm_oct_poll_queue_stopping - flag to indicate polling should stop. | |
124 | * | |
125 | * Set to one right before cvm_oct_poll_queue is destroyed. | |
80ff0fd3 | 126 | */ |
f8c26486 | 127 | atomic_t cvm_oct_poll_queue_stopping = ATOMIC_INIT(0); |
80ff0fd3 DD |
128 | |
129 | /** | |
130 | * Array of every ethernet device owned by this driver indexed by | |
131 | * the ipd input port number. | |
132 | */ | |
133 | struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; | |
134 | ||
4898c560 DD |
135 | u64 cvm_oct_tx_poll_interval; |
136 | ||
f8c26486 DD |
137 | static void cvm_oct_rx_refill_worker(struct work_struct *work); |
138 | static DECLARE_DELAYED_WORK(cvm_oct_rx_refill_work, cvm_oct_rx_refill_worker); | |
139 | ||
140 | static void cvm_oct_rx_refill_worker(struct work_struct *work) | |
80ff0fd3 | 141 | { |
f8c26486 DD |
142 | /* |
143 | * FPA 0 may have been drained, try to refill it if we need | |
144 | * more than num_packet_buffers / 2, otherwise normal receive | |
145 | * processing will refill it. If it were drained, no packets | |
146 | * could be received so cvm_oct_napi_poll would never be | |
147 | * invoked to do the refill. | |
148 | */ | |
149 | cvm_oct_rx_refill_pool(num_packet_buffers / 2); | |
a620c163 | 150 | |
f8c26486 DD |
151 | if (!atomic_read(&cvm_oct_poll_queue_stopping)) |
152 | queue_delayed_work(cvm_oct_poll_queue, | |
153 | &cvm_oct_rx_refill_work, HZ); | |
80ff0fd3 DD |
154 | } |
155 | ||
4898c560 | 156 | static void cvm_oct_periodic_worker(struct work_struct *work) |
f8c26486 DD |
157 | { |
158 | struct octeon_ethernet *priv = container_of(work, | |
159 | struct octeon_ethernet, | |
4898c560 | 160 | port_periodic_work.work); |
a620c163 | 161 | |
f6ed1b3b | 162 | if (priv->poll) |
f8c26486 | 163 | priv->poll(cvm_oct_device[priv->port]); |
a620c163 | 164 | |
b186410d NH |
165 | cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats( |
166 | cvm_oct_device[priv->port]); | |
4898c560 | 167 | |
f8c26486 | 168 | if (!atomic_read(&cvm_oct_poll_queue_stopping)) |
b186410d NH |
169 | queue_delayed_work(cvm_oct_poll_queue, |
170 | &priv->port_periodic_work, HZ); | |
851ec8cd | 171 | } |
80ff0fd3 | 172 | |
4f240906 | 173 | static void cvm_oct_configure_common_hw(void) |
80ff0fd3 | 174 | { |
80ff0fd3 DD |
175 | /* Setup the FPA */ |
176 | cvmx_fpa_enable(); | |
177 | cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, | |
178 | num_packet_buffers); | |
179 | cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, | |
180 | num_packet_buffers); | |
181 | if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) | |
182 | cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, | |
183 | CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128); | |
184 | ||
185 | if (USE_RED) | |
186 | cvmx_helper_setup_red(num_packet_buffers / 4, | |
187 | num_packet_buffers / 8); | |
188 | ||
80ff0fd3 DD |
189 | } |
190 | ||
191 | /** | |
ec977c5b DD |
192 | * cvm_oct_free_work- Free a work queue entry |
193 | * | |
194 | * @work_queue_entry: Work queue entry to free | |
80ff0fd3 | 195 | * |
80ff0fd3 DD |
196 | * Returns Zero on success, Negative on failure. |
197 | */ | |
198 | int cvm_oct_free_work(void *work_queue_entry) | |
199 | { | |
200 | cvmx_wqe_t *work = work_queue_entry; | |
201 | ||
202 | int segments = work->word2.s.bufs; | |
203 | union cvmx_buf_ptr segment_ptr = work->packet_ptr; | |
204 | ||
205 | while (segments--) { | |
206 | union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *) | |
207 | cvmx_phys_to_ptr(segment_ptr.s.addr - 8); | |
208 | if (unlikely(!segment_ptr.s.i)) | |
209 | cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr), | |
210 | segment_ptr.s.pool, | |
211 | DONT_WRITEBACK(CVMX_FPA_PACKET_POOL_SIZE / | |
212 | 128)); | |
213 | segment_ptr = next_ptr; | |
214 | } | |
215 | cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1)); | |
216 | ||
217 | return 0; | |
218 | } | |
219 | EXPORT_SYMBOL(cvm_oct_free_work); | |
220 | ||
f696a108 | 221 | /** |
ec977c5b | 222 | * cvm_oct_common_get_stats - get the low level ethernet statistics |
f696a108 | 223 | * @dev: Device to get the statistics from |
ec977c5b | 224 | * |
f696a108 DD |
225 | * Returns Pointer to the statistics |
226 | */ | |
227 | static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev) | |
228 | { | |
229 | cvmx_pip_port_status_t rx_status; | |
230 | cvmx_pko_port_status_t tx_status; | |
231 | struct octeon_ethernet *priv = netdev_priv(dev); | |
232 | ||
233 | if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) { | |
234 | if (octeon_is_simulation()) { | |
235 | /* The simulator doesn't support statistics */ | |
236 | memset(&rx_status, 0, sizeof(rx_status)); | |
237 | memset(&tx_status, 0, sizeof(tx_status)); | |
238 | } else { | |
239 | cvmx_pip_get_port_status(priv->port, 1, &rx_status); | |
240 | cvmx_pko_get_port_status(priv->port, 1, &tx_status); | |
241 | } | |
242 | ||
243 | priv->stats.rx_packets += rx_status.inb_packets; | |
244 | priv->stats.tx_packets += tx_status.packets; | |
245 | priv->stats.rx_bytes += rx_status.inb_octets; | |
246 | priv->stats.tx_bytes += tx_status.octets; | |
247 | priv->stats.multicast += rx_status.multicast_packets; | |
248 | priv->stats.rx_crc_errors += rx_status.inb_errors; | |
249 | priv->stats.rx_frame_errors += rx_status.fcs_align_err_packets; | |
250 | ||
251 | /* | |
252 | * The drop counter must be incremented atomically | |
253 | * since the RX tasklet also increments it. | |
254 | */ | |
255 | #ifdef CONFIG_64BIT | |
256 | atomic64_add(rx_status.dropped_packets, | |
257 | (atomic64_t *)&priv->stats.rx_dropped); | |
258 | #else | |
259 | atomic_add(rx_status.dropped_packets, | |
260 | (atomic_t *)&priv->stats.rx_dropped); | |
261 | #endif | |
262 | } | |
263 | ||
264 | return &priv->stats; | |
265 | } | |
266 | ||
267 | /** | |
ec977c5b | 268 | * cvm_oct_common_change_mtu - change the link MTU |
f696a108 DD |
269 | * @dev: Device to change |
270 | * @new_mtu: The new MTU | |
271 | * | |
272 | * Returns Zero on success | |
273 | */ | |
274 | static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu) | |
275 | { | |
276 | struct octeon_ethernet *priv = netdev_priv(dev); | |
277 | int interface = INTERFACE(priv->port); | |
278 | int index = INDEX(priv->port); | |
279 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | |
280 | int vlan_bytes = 4; | |
281 | #else | |
282 | int vlan_bytes = 0; | |
283 | #endif | |
284 | ||
285 | /* | |
286 | * Limit the MTU to make sure the ethernet packets are between | |
287 | * 64 bytes and 65535 bytes. | |
288 | */ | |
289 | if ((new_mtu + 14 + 4 + vlan_bytes < 64) | |
290 | || (new_mtu + 14 + 4 + vlan_bytes > 65392)) { | |
291 | pr_err("MTU must be between %d and %d.\n", | |
292 | 64 - 14 - 4 - vlan_bytes, 65392 - 14 - 4 - vlan_bytes); | |
293 | return -EINVAL; | |
294 | } | |
295 | dev->mtu = new_mtu; | |
296 | ||
297 | if ((interface < 2) | |
298 | && (cvmx_helper_interface_get_mode(interface) != | |
299 | CVMX_HELPER_INTERFACE_MODE_SPI)) { | |
300 | /* Add ethernet header and FCS, and VLAN if configured. */ | |
301 | int max_packet = new_mtu + 14 + 4 + vlan_bytes; | |
302 | ||
303 | if (OCTEON_IS_MODEL(OCTEON_CN3XXX) | |
304 | || OCTEON_IS_MODEL(OCTEON_CN58XX)) { | |
305 | /* Signal errors on packets larger than the MTU */ | |
306 | cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), | |
307 | max_packet); | |
308 | } else { | |
309 | /* | |
310 | * Set the hardware to truncate packets larger | |
311 | * than the MTU and smaller the 64 bytes. | |
312 | */ | |
313 | union cvmx_pip_frm_len_chkx frm_len_chk; | |
314 | frm_len_chk.u64 = 0; | |
315 | frm_len_chk.s.minlen = 64; | |
316 | frm_len_chk.s.maxlen = max_packet; | |
317 | cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), | |
318 | frm_len_chk.u64); | |
319 | } | |
320 | /* | |
321 | * Set the hardware to truncate packets larger than | |
322 | * the MTU. The jabber register must be set to a | |
323 | * multiple of 8 bytes, so round up. | |
324 | */ | |
325 | cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), | |
326 | (max_packet + 7) & ~7u); | |
327 | } | |
328 | return 0; | |
329 | } | |
330 | ||
331 | /** | |
ec977c5b | 332 | * cvm_oct_common_set_multicast_list - set the multicast list |
f696a108 DD |
333 | * @dev: Device to work on |
334 | */ | |
335 | static void cvm_oct_common_set_multicast_list(struct net_device *dev) | |
336 | { | |
337 | union cvmx_gmxx_prtx_cfg gmx_cfg; | |
338 | struct octeon_ethernet *priv = netdev_priv(dev); | |
339 | int interface = INTERFACE(priv->port); | |
340 | int index = INDEX(priv->port); | |
341 | ||
342 | if ((interface < 2) | |
343 | && (cvmx_helper_interface_get_mode(interface) != | |
344 | CVMX_HELPER_INTERFACE_MODE_SPI)) { | |
345 | union cvmx_gmxx_rxx_adr_ctl control; | |
346 | control.u64 = 0; | |
347 | control.s.bcst = 1; /* Allow broadcast MAC addresses */ | |
348 | ||
d5907942 | 349 | if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI) || |
f696a108 DD |
350 | (dev->flags & IFF_PROMISC)) |
351 | /* Force accept multicast packets */ | |
352 | control.s.mcst = 2; | |
353 | else | |
215c47c9 | 354 | /* Force reject multicast packets */ |
f696a108 DD |
355 | control.s.mcst = 1; |
356 | ||
357 | if (dev->flags & IFF_PROMISC) | |
358 | /* | |
359 | * Reject matches if promisc. Since CAM is | |
360 | * shut off, should accept everything. | |
361 | */ | |
362 | control.s.cam_mode = 0; | |
363 | else | |
364 | /* Filter packets based on the CAM */ | |
365 | control.s.cam_mode = 1; | |
366 | ||
367 | gmx_cfg.u64 = | |
368 | cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); | |
369 | cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), | |
370 | gmx_cfg.u64 & ~1ull); | |
371 | ||
372 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), | |
373 | control.u64); | |
374 | if (dev->flags & IFF_PROMISC) | |
375 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN | |
376 | (index, interface), 0); | |
377 | else | |
378 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN | |
379 | (index, interface), 1); | |
380 | ||
381 | cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), | |
382 | gmx_cfg.u64); | |
383 | } | |
384 | } | |
385 | ||
386 | /** | |
ec977c5b DD |
387 | * cvm_oct_common_set_mac_address - set the hardware MAC address for a device |
388 | * @dev: The device in question. | |
389 | * @addr: Address structure to change it too. | |
390 | ||
f696a108 DD |
391 | * Returns Zero on success |
392 | */ | |
df9244c5 | 393 | static int cvm_oct_set_mac_filter(struct net_device *dev) |
f696a108 DD |
394 | { |
395 | struct octeon_ethernet *priv = netdev_priv(dev); | |
396 | union cvmx_gmxx_prtx_cfg gmx_cfg; | |
397 | int interface = INTERFACE(priv->port); | |
398 | int index = INDEX(priv->port); | |
399 | ||
f696a108 DD |
400 | if ((interface < 2) |
401 | && (cvmx_helper_interface_get_mode(interface) != | |
402 | CVMX_HELPER_INTERFACE_MODE_SPI)) { | |
403 | int i; | |
df9244c5 | 404 | uint8_t *ptr = dev->dev_addr; |
f696a108 DD |
405 | uint64_t mac = 0; |
406 | for (i = 0; i < 6; i++) | |
df9244c5 | 407 | mac = (mac << 8) | (uint64_t)ptr[i]; |
f696a108 DD |
408 | |
409 | gmx_cfg.u64 = | |
410 | cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); | |
411 | cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), | |
412 | gmx_cfg.u64 & ~1ull); | |
413 | ||
414 | cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac); | |
415 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface), | |
df9244c5 | 416 | ptr[0]); |
f696a108 | 417 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface), |
df9244c5 | 418 | ptr[1]); |
f696a108 | 419 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface), |
df9244c5 | 420 | ptr[2]); |
f696a108 | 421 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface), |
df9244c5 | 422 | ptr[3]); |
f696a108 | 423 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface), |
df9244c5 | 424 | ptr[4]); |
f696a108 | 425 | cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface), |
df9244c5 | 426 | ptr[5]); |
f696a108 DD |
427 | cvm_oct_common_set_multicast_list(dev); |
428 | cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), | |
429 | gmx_cfg.u64); | |
430 | } | |
431 | return 0; | |
432 | } | |
433 | ||
df9244c5 DD |
434 | static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr) |
435 | { | |
436 | int r = eth_mac_addr(dev, addr); | |
437 | ||
438 | if (r) | |
439 | return r; | |
440 | return cvm_oct_set_mac_filter(dev); | |
441 | } | |
442 | ||
f696a108 | 443 | /** |
ec977c5b | 444 | * cvm_oct_common_init - per network device initialization |
f696a108 | 445 | * @dev: Device to initialize |
ec977c5b | 446 | * |
f696a108 DD |
447 | * Returns Zero on success |
448 | */ | |
449 | int cvm_oct_common_init(struct net_device *dev) | |
450 | { | |
f696a108 | 451 | struct octeon_ethernet *priv = netdev_priv(dev); |
df9244c5 DD |
452 | const u8 *mac = NULL; |
453 | ||
454 | if (priv->of_node) | |
455 | mac = of_get_mac_address(priv->of_node); | |
456 | ||
4d978452 | 457 | if (mac) |
df9244c5 | 458 | memcpy(dev->dev_addr, mac, ETH_ALEN); |
15c6ff3b | 459 | else |
df9244c5 | 460 | eth_hw_addr_random(dev); |
f696a108 DD |
461 | |
462 | /* | |
463 | * Force the interface to use the POW send if always_use_pow | |
464 | * was specified or it is in the pow send list. | |
465 | */ | |
466 | if ((pow_send_group != -1) | |
467 | && (always_use_pow || strstr(pow_send_list, dev->name))) | |
468 | priv->queue = -1; | |
469 | ||
924cc268 DD |
470 | if (priv->queue != -1) { |
471 | dev->features |= NETIF_F_SG; | |
472 | if (USE_HW_TCPUDP_CHECKSUM) | |
473 | dev->features |= NETIF_F_IP_CSUM; | |
474 | } | |
f696a108 | 475 | |
f696a108 DD |
476 | /* We do our own locking, Linux doesn't need to */ |
477 | dev->features |= NETIF_F_LLTX; | |
478 | SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops); | |
479 | ||
f6ed1b3b | 480 | cvm_oct_phy_setup_device(dev); |
df9244c5 | 481 | cvm_oct_set_mac_filter(dev); |
f696a108 DD |
482 | dev->netdev_ops->ndo_change_mtu(dev, dev->mtu); |
483 | ||
484 | /* | |
485 | * Zero out stats for port so we won't mistakenly show | |
486 | * counters from the bootloader. | |
487 | */ | |
488 | memset(dev->netdev_ops->ndo_get_stats(dev), 0, | |
489 | sizeof(struct net_device_stats)); | |
490 | ||
491 | return 0; | |
492 | } | |
493 | ||
494 | void cvm_oct_common_uninit(struct net_device *dev) | |
495 | { | |
f6ed1b3b DD |
496 | struct octeon_ethernet *priv = netdev_priv(dev); |
497 | ||
498 | if (priv->phydev) | |
499 | phy_disconnect(priv->phydev); | |
f696a108 DD |
500 | } |
501 | ||
502 | static const struct net_device_ops cvm_oct_npi_netdev_ops = { | |
503 | .ndo_init = cvm_oct_common_init, | |
504 | .ndo_uninit = cvm_oct_common_uninit, | |
505 | .ndo_start_xmit = cvm_oct_xmit, | |
afc4b13d | 506 | .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, |
f696a108 DD |
507 | .ndo_set_mac_address = cvm_oct_common_set_mac_address, |
508 | .ndo_do_ioctl = cvm_oct_ioctl, | |
509 | .ndo_change_mtu = cvm_oct_common_change_mtu, | |
510 | .ndo_get_stats = cvm_oct_common_get_stats, | |
511 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
512 | .ndo_poll_controller = cvm_oct_poll_controller, | |
513 | #endif | |
514 | }; | |
515 | static const struct net_device_ops cvm_oct_xaui_netdev_ops = { | |
516 | .ndo_init = cvm_oct_xaui_init, | |
517 | .ndo_uninit = cvm_oct_xaui_uninit, | |
518 | .ndo_open = cvm_oct_xaui_open, | |
519 | .ndo_stop = cvm_oct_xaui_stop, | |
520 | .ndo_start_xmit = cvm_oct_xmit, | |
afc4b13d | 521 | .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, |
f696a108 DD |
522 | .ndo_set_mac_address = cvm_oct_common_set_mac_address, |
523 | .ndo_do_ioctl = cvm_oct_ioctl, | |
524 | .ndo_change_mtu = cvm_oct_common_change_mtu, | |
525 | .ndo_get_stats = cvm_oct_common_get_stats, | |
526 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
527 | .ndo_poll_controller = cvm_oct_poll_controller, | |
528 | #endif | |
529 | }; | |
530 | static const struct net_device_ops cvm_oct_sgmii_netdev_ops = { | |
531 | .ndo_init = cvm_oct_sgmii_init, | |
532 | .ndo_uninit = cvm_oct_sgmii_uninit, | |
533 | .ndo_open = cvm_oct_sgmii_open, | |
534 | .ndo_stop = cvm_oct_sgmii_stop, | |
535 | .ndo_start_xmit = cvm_oct_xmit, | |
afc4b13d | 536 | .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, |
f696a108 DD |
537 | .ndo_set_mac_address = cvm_oct_common_set_mac_address, |
538 | .ndo_do_ioctl = cvm_oct_ioctl, | |
539 | .ndo_change_mtu = cvm_oct_common_change_mtu, | |
540 | .ndo_get_stats = cvm_oct_common_get_stats, | |
541 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
542 | .ndo_poll_controller = cvm_oct_poll_controller, | |
543 | #endif | |
544 | }; | |
545 | static const struct net_device_ops cvm_oct_spi_netdev_ops = { | |
546 | .ndo_init = cvm_oct_spi_init, | |
547 | .ndo_uninit = cvm_oct_spi_uninit, | |
548 | .ndo_start_xmit = cvm_oct_xmit, | |
afc4b13d | 549 | .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, |
f696a108 DD |
550 | .ndo_set_mac_address = cvm_oct_common_set_mac_address, |
551 | .ndo_do_ioctl = cvm_oct_ioctl, | |
552 | .ndo_change_mtu = cvm_oct_common_change_mtu, | |
553 | .ndo_get_stats = cvm_oct_common_get_stats, | |
554 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
555 | .ndo_poll_controller = cvm_oct_poll_controller, | |
556 | #endif | |
557 | }; | |
558 | static const struct net_device_ops cvm_oct_rgmii_netdev_ops = { | |
559 | .ndo_init = cvm_oct_rgmii_init, | |
560 | .ndo_uninit = cvm_oct_rgmii_uninit, | |
561 | .ndo_open = cvm_oct_rgmii_open, | |
562 | .ndo_stop = cvm_oct_rgmii_stop, | |
563 | .ndo_start_xmit = cvm_oct_xmit, | |
afc4b13d | 564 | .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, |
f696a108 DD |
565 | .ndo_set_mac_address = cvm_oct_common_set_mac_address, |
566 | .ndo_do_ioctl = cvm_oct_ioctl, | |
567 | .ndo_change_mtu = cvm_oct_common_change_mtu, | |
568 | .ndo_get_stats = cvm_oct_common_get_stats, | |
569 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
570 | .ndo_poll_controller = cvm_oct_poll_controller, | |
571 | #endif | |
572 | }; | |
573 | static const struct net_device_ops cvm_oct_pow_netdev_ops = { | |
574 | .ndo_init = cvm_oct_common_init, | |
575 | .ndo_start_xmit = cvm_oct_xmit_pow, | |
afc4b13d | 576 | .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, |
f696a108 DD |
577 | .ndo_set_mac_address = cvm_oct_common_set_mac_address, |
578 | .ndo_do_ioctl = cvm_oct_ioctl, | |
579 | .ndo_change_mtu = cvm_oct_common_change_mtu, | |
580 | .ndo_get_stats = cvm_oct_common_get_stats, | |
581 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
582 | .ndo_poll_controller = cvm_oct_poll_controller, | |
583 | #endif | |
584 | }; | |
585 | ||
f6ed1b3b DD |
586 | extern void octeon_mdiobus_force_mod_depencency(void); |
587 | ||
b186410d NH |
588 | static struct device_node *cvm_oct_of_get_child( |
589 | const struct device_node *parent, int reg_val) | |
df9244c5 DD |
590 | { |
591 | struct device_node *node = NULL; | |
592 | int size; | |
593 | const __be32 *addr; | |
594 | ||
595 | for (;;) { | |
596 | node = of_get_next_child(parent, node); | |
597 | if (!node) | |
598 | break; | |
599 | addr = of_get_property(node, "reg", &size); | |
600 | if (addr && (be32_to_cpu(*addr) == reg_val)) | |
601 | break; | |
602 | } | |
603 | return node; | |
604 | } | |
605 | ||
4f240906 | 606 | static struct device_node *cvm_oct_node_for_port(struct device_node *pip, |
b186410d | 607 | int interface, int port) |
df9244c5 DD |
608 | { |
609 | struct device_node *ni, *np; | |
610 | ||
611 | ni = cvm_oct_of_get_child(pip, interface); | |
612 | if (!ni) | |
613 | return NULL; | |
614 | ||
615 | np = cvm_oct_of_get_child(ni, port); | |
616 | of_node_put(ni); | |
617 | ||
618 | return np; | |
619 | } | |
620 | ||
4f240906 | 621 | static int cvm_oct_probe(struct platform_device *pdev) |
80ff0fd3 DD |
622 | { |
623 | int num_interfaces; | |
624 | int interface; | |
625 | int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; | |
626 | int qos; | |
df9244c5 | 627 | struct device_node *pip; |
80ff0fd3 | 628 | |
f6ed1b3b | 629 | octeon_mdiobus_force_mod_depencency(); |
80ff0fd3 DD |
630 | pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION); |
631 | ||
df9244c5 DD |
632 | pip = pdev->dev.of_node; |
633 | if (!pip) { | |
634 | pr_err("Error: No 'pip' in /aliases\n"); | |
635 | return -EINVAL; | |
636 | } | |
13c5939e | 637 | |
f8c26486 DD |
638 | cvm_oct_poll_queue = create_singlethread_workqueue("octeon-ethernet"); |
639 | if (cvm_oct_poll_queue == NULL) { | |
640 | pr_err("octeon-ethernet: Cannot create workqueue"); | |
641 | return -ENOMEM; | |
642 | } | |
643 | ||
80ff0fd3 DD |
644 | cvm_oct_configure_common_hw(); |
645 | ||
646 | cvmx_helper_initialize_packet_io_global(); | |
647 | ||
648 | /* Change the input group for all ports before input is enabled */ | |
649 | num_interfaces = cvmx_helper_get_number_of_interfaces(); | |
650 | for (interface = 0; interface < num_interfaces; interface++) { | |
651 | int num_ports = cvmx_helper_ports_on_interface(interface); | |
652 | int port; | |
653 | ||
654 | for (port = cvmx_helper_get_ipd_port(interface, 0); | |
655 | port < cvmx_helper_get_ipd_port(interface, num_ports); | |
656 | port++) { | |
657 | union cvmx_pip_prt_tagx pip_prt_tagx; | |
658 | pip_prt_tagx.u64 = | |
659 | cvmx_read_csr(CVMX_PIP_PRT_TAGX(port)); | |
660 | pip_prt_tagx.s.grp = pow_receive_group; | |
661 | cvmx_write_csr(CVMX_PIP_PRT_TAGX(port), | |
662 | pip_prt_tagx.u64); | |
663 | } | |
664 | } | |
665 | ||
666 | cvmx_helper_ipd_and_packet_input_enable(); | |
667 | ||
668 | memset(cvm_oct_device, 0, sizeof(cvm_oct_device)); | |
669 | ||
670 | /* | |
671 | * Initialize the FAU used for counting packet buffers that | |
672 | * need to be freed. | |
673 | */ | |
674 | cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); | |
675 | ||
4898c560 DD |
676 | /* Initialize the FAU used for counting tx SKBs that need to be freed */ |
677 | cvmx_fau_atomic_write32(FAU_TOTAL_TX_TO_CLEAN, 0); | |
678 | ||
80ff0fd3 DD |
679 | if ((pow_send_group != -1)) { |
680 | struct net_device *dev; | |
681 | pr_info("\tConfiguring device for POW only access\n"); | |
682 | dev = alloc_etherdev(sizeof(struct octeon_ethernet)); | |
683 | if (dev) { | |
684 | /* Initialize the device private structure. */ | |
685 | struct octeon_ethernet *priv = netdev_priv(dev); | |
80ff0fd3 | 686 | |
f696a108 | 687 | dev->netdev_ops = &cvm_oct_pow_netdev_ops; |
80ff0fd3 DD |
688 | priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED; |
689 | priv->port = CVMX_PIP_NUM_INPUT_PORTS; | |
690 | priv->queue = -1; | |
691 | strcpy(dev->name, "pow%d"); | |
692 | for (qos = 0; qos < 16; qos++) | |
693 | skb_queue_head_init(&priv->tx_free_list[qos]); | |
694 | ||
695 | if (register_netdev(dev) < 0) { | |
6568a234 | 696 | pr_err("Failed to register ethernet device for POW\n"); |
c4711c3a | 697 | free_netdev(dev); |
80ff0fd3 DD |
698 | } else { |
699 | cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev; | |
6568a234 DD |
700 | pr_info("%s: POW send group %d, receive group %d\n", |
701 | dev->name, pow_send_group, | |
702 | pow_receive_group); | |
80ff0fd3 DD |
703 | } |
704 | } else { | |
6568a234 | 705 | pr_err("Failed to allocate ethernet device for POW\n"); |
80ff0fd3 DD |
706 | } |
707 | } | |
708 | ||
709 | num_interfaces = cvmx_helper_get_number_of_interfaces(); | |
710 | for (interface = 0; interface < num_interfaces; interface++) { | |
711 | cvmx_helper_interface_mode_t imode = | |
712 | cvmx_helper_interface_get_mode(interface); | |
713 | int num_ports = cvmx_helper_ports_on_interface(interface); | |
714 | int port; | |
df9244c5 | 715 | int port_index; |
80ff0fd3 | 716 | |
b186410d NH |
717 | for (port_index = 0, |
718 | port = cvmx_helper_get_ipd_port(interface, 0); | |
80ff0fd3 | 719 | port < cvmx_helper_get_ipd_port(interface, num_ports); |
df9244c5 | 720 | port_index++, port++) { |
80ff0fd3 DD |
721 | struct octeon_ethernet *priv; |
722 | struct net_device *dev = | |
723 | alloc_etherdev(sizeof(struct octeon_ethernet)); | |
724 | if (!dev) { | |
6568a234 | 725 | pr_err("Failed to allocate ethernet device for port %d\n", port); |
80ff0fd3 DD |
726 | continue; |
727 | } | |
80ff0fd3 DD |
728 | |
729 | /* Initialize the device private structure. */ | |
730 | priv = netdev_priv(dev); | |
b186410d NH |
731 | priv->of_node = cvm_oct_node_for_port(pip, interface, |
732 | port_index); | |
80ff0fd3 | 733 | |
4898c560 DD |
734 | INIT_DELAYED_WORK(&priv->port_periodic_work, |
735 | cvm_oct_periodic_worker); | |
80ff0fd3 DD |
736 | priv->imode = imode; |
737 | priv->port = port; | |
738 | priv->queue = cvmx_pko_get_base_queue(priv->port); | |
739 | priv->fau = fau - cvmx_pko_get_num_queues(port) * 4; | |
740 | for (qos = 0; qos < 16; qos++) | |
741 | skb_queue_head_init(&priv->tx_free_list[qos]); | |
742 | for (qos = 0; qos < cvmx_pko_get_num_queues(port); | |
743 | qos++) | |
744 | cvmx_fau_atomic_write32(priv->fau + qos * 4, 0); | |
745 | ||
746 | switch (priv->imode) { | |
747 | ||
748 | /* These types don't support ports to IPD/PKO */ | |
749 | case CVMX_HELPER_INTERFACE_MODE_DISABLED: | |
750 | case CVMX_HELPER_INTERFACE_MODE_PCIE: | |
751 | case CVMX_HELPER_INTERFACE_MODE_PICMG: | |
752 | break; | |
753 | ||
754 | case CVMX_HELPER_INTERFACE_MODE_NPI: | |
f696a108 | 755 | dev->netdev_ops = &cvm_oct_npi_netdev_ops; |
80ff0fd3 DD |
756 | strcpy(dev->name, "npi%d"); |
757 | break; | |
758 | ||
759 | case CVMX_HELPER_INTERFACE_MODE_XAUI: | |
f696a108 | 760 | dev->netdev_ops = &cvm_oct_xaui_netdev_ops; |
80ff0fd3 DD |
761 | strcpy(dev->name, "xaui%d"); |
762 | break; | |
763 | ||
764 | case CVMX_HELPER_INTERFACE_MODE_LOOP: | |
f696a108 | 765 | dev->netdev_ops = &cvm_oct_npi_netdev_ops; |
80ff0fd3 DD |
766 | strcpy(dev->name, "loop%d"); |
767 | break; | |
768 | ||
769 | case CVMX_HELPER_INTERFACE_MODE_SGMII: | |
f696a108 | 770 | dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; |
80ff0fd3 DD |
771 | strcpy(dev->name, "eth%d"); |
772 | break; | |
773 | ||
774 | case CVMX_HELPER_INTERFACE_MODE_SPI: | |
f696a108 | 775 | dev->netdev_ops = &cvm_oct_spi_netdev_ops; |
80ff0fd3 DD |
776 | strcpy(dev->name, "spi%d"); |
777 | break; | |
778 | ||
779 | case CVMX_HELPER_INTERFACE_MODE_RGMII: | |
780 | case CVMX_HELPER_INTERFACE_MODE_GMII: | |
f696a108 | 781 | dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; |
80ff0fd3 DD |
782 | strcpy(dev->name, "eth%d"); |
783 | break; | |
784 | } | |
785 | ||
f696a108 | 786 | if (!dev->netdev_ops) { |
c4711c3a | 787 | free_netdev(dev); |
80ff0fd3 DD |
788 | } else if (register_netdev(dev) < 0) { |
789 | pr_err("Failed to register ethernet device " | |
790 | "for interface %d, port %d\n", | |
791 | interface, priv->port); | |
c4711c3a | 792 | free_netdev(dev); |
80ff0fd3 DD |
793 | } else { |
794 | cvm_oct_device[priv->port] = dev; | |
795 | fau -= | |
796 | cvmx_pko_get_num_queues(priv->port) * | |
797 | sizeof(uint32_t); | |
f8c26486 | 798 | queue_delayed_work(cvm_oct_poll_queue, |
b186410d | 799 | &priv->port_periodic_work, HZ); |
80ff0fd3 DD |
800 | } |
801 | } | |
802 | } | |
803 | ||
4898c560 | 804 | cvm_oct_tx_initialize(); |
3368c784 | 805 | cvm_oct_rx_initialize(); |
80ff0fd3 | 806 | |
4898c560 DD |
807 | /* |
808 | * 150 uS: about 10 1500-byte packtes at 1GE. | |
809 | */ | |
810 | cvm_oct_tx_poll_interval = 150 * (octeon_get_clock_rate() / 1000000); | |
80ff0fd3 | 811 | |
f8c26486 | 812 | queue_delayed_work(cvm_oct_poll_queue, &cvm_oct_rx_refill_work, HZ); |
80ff0fd3 DD |
813 | |
814 | return 0; | |
815 | } | |
816 | ||
f7e2f350 | 817 | static int cvm_oct_remove(struct platform_device *pdev) |
80ff0fd3 DD |
818 | { |
819 | int port; | |
820 | ||
821 | /* Disable POW interrupt */ | |
822 | cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0); | |
823 | ||
824 | cvmx_ipd_disable(); | |
825 | ||
826 | /* Free the interrupt handler */ | |
827 | free_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, cvm_oct_device); | |
828 | ||
f8c26486 DD |
829 | atomic_inc_return(&cvm_oct_poll_queue_stopping); |
830 | cancel_delayed_work_sync(&cvm_oct_rx_refill_work); | |
831 | ||
80ff0fd3 | 832 | cvm_oct_rx_shutdown(); |
4898c560 DD |
833 | cvm_oct_tx_shutdown(); |
834 | ||
80ff0fd3 DD |
835 | cvmx_pko_disable(); |
836 | ||
837 | /* Free the ethernet devices */ | |
838 | for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) { | |
839 | if (cvm_oct_device[port]) { | |
f8c26486 DD |
840 | struct net_device *dev = cvm_oct_device[port]; |
841 | struct octeon_ethernet *priv = netdev_priv(dev); | |
4898c560 | 842 | cancel_delayed_work_sync(&priv->port_periodic_work); |
f8c26486 | 843 | |
4898c560 | 844 | cvm_oct_tx_shutdown_dev(dev); |
f8c26486 | 845 | unregister_netdev(dev); |
c4711c3a | 846 | free_netdev(dev); |
80ff0fd3 DD |
847 | cvm_oct_device[port] = NULL; |
848 | } | |
849 | } | |
850 | ||
f8c26486 DD |
851 | destroy_workqueue(cvm_oct_poll_queue); |
852 | ||
80ff0fd3 | 853 | cvmx_pko_shutdown(); |
80ff0fd3 DD |
854 | |
855 | cvmx_ipd_free_ptr(); | |
856 | ||
857 | /* Free the HW pools */ | |
858 | cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, | |
859 | num_packet_buffers); | |
860 | cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, | |
861 | num_packet_buffers); | |
862 | if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) | |
863 | cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, | |
864 | CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128); | |
df9244c5 | 865 | return 0; |
80ff0fd3 DD |
866 | } |
867 | ||
df9244c5 DD |
868 | static struct of_device_id cvm_oct_match[] = { |
869 | { | |
870 | .compatible = "cavium,octeon-3860-pip", | |
871 | }, | |
872 | {}, | |
873 | }; | |
874 | MODULE_DEVICE_TABLE(of, cvm_oct_match); | |
875 | ||
876 | static struct platform_driver cvm_oct_driver = { | |
877 | .probe = cvm_oct_probe, | |
095d0bb5 | 878 | .remove = cvm_oct_remove, |
df9244c5 DD |
879 | .driver = { |
880 | .owner = THIS_MODULE, | |
881 | .name = KBUILD_MODNAME, | |
882 | .of_match_table = cvm_oct_match, | |
883 | }, | |
884 | }; | |
885 | ||
886 | module_platform_driver(cvm_oct_driver); | |
887 | ||
80ff0fd3 DD |
888 | MODULE_LICENSE("GPL"); |
889 | MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>"); | |
890 | MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver."); |