Staging: octeon-ethernet: Convert to use PHY Abstraction Layer.
[deliverable/linux.git] / drivers / staging / octeon / ethernet.c
CommitLineData
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1/**********************************************************************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2007 Cavium Networks
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26**********************************************************************/
27#include <linux/kernel.h>
28#include <linux/init.h>
29#include <linux/module.h>
30#include <linux/netdevice.h>
31#include <linux/etherdevice.h>
32#include <linux/delay.h>
f6ed1b3b 33#include <linux/phy.h>
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34
35#include <net/dst.h>
36
37#include <asm/octeon/octeon.h>
38
39#include "ethernet-defines.h"
a620c163 40#include "octeon-ethernet.h"
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41#include "ethernet-mem.h"
42#include "ethernet-rx.h"
43#include "ethernet-tx.h"
f696a108 44#include "ethernet-mdio.h"
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45#include "ethernet-util.h"
46#include "ethernet-proc.h"
a620c163 47
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48
49#include "cvmx-pip.h"
50#include "cvmx-pko.h"
51#include "cvmx-fau.h"
52#include "cvmx-ipd.h"
53#include "cvmx-helper.h"
54
f696a108 55#include "cvmx-gmxx-defs.h"
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56#include "cvmx-smix-defs.h"
57
58#if defined(CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS) \
59 && CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS
60int num_packet_buffers = CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS;
61#else
62int num_packet_buffers = 1024;
63#endif
64module_param(num_packet_buffers, int, 0444);
65MODULE_PARM_DESC(num_packet_buffers, "\n"
66 "\tNumber of packet buffers to allocate and store in the\n"
67 "\tFPA. By default, 1024 packet buffers are used unless\n"
68 "\tCONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS is defined.");
69
70int pow_receive_group = 15;
71module_param(pow_receive_group, int, 0444);
72MODULE_PARM_DESC(pow_receive_group, "\n"
73 "\tPOW group to receive packets from. All ethernet hardware\n"
74 "\twill be configured to send incomming packets to this POW\n"
75 "\tgroup. Also any other software can submit packets to this\n"
76 "\tgroup for the kernel to process.");
77
78int pow_send_group = -1;
79module_param(pow_send_group, int, 0644);
80MODULE_PARM_DESC(pow_send_group, "\n"
81 "\tPOW group to send packets to other software on. This\n"
82 "\tcontrols the creation of the virtual device pow0.\n"
83 "\talways_use_pow also depends on this value.");
84
85int always_use_pow;
86module_param(always_use_pow, int, 0444);
87MODULE_PARM_DESC(always_use_pow, "\n"
88 "\tWhen set, always send to the pow group. This will cause\n"
89 "\tpackets sent to real ethernet devices to be sent to the\n"
90 "\tPOW group instead of the hardware. Unless some other\n"
91 "\tapplication changes the config, packets will still be\n"
92 "\treceived from the low level hardware. Use this option\n"
93 "\tto allow a CVMX app to intercept all packets from the\n"
94 "\tlinux kernel. You must specify pow_send_group along with\n"
95 "\tthis option.");
96
97char pow_send_list[128] = "";
98module_param_string(pow_send_list, pow_send_list, sizeof(pow_send_list), 0444);
99MODULE_PARM_DESC(pow_send_list, "\n"
100 "\tComma separated list of ethernet devices that should use the\n"
101 "\tPOW for transmit instead of the actual ethernet hardware. This\n"
102 "\tis a per port version of always_use_pow. always_use_pow takes\n"
103 "\tprecedence over this list. For example, setting this to\n"
104 "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n"
105 "\tusing the pow_send_group.");
106
107static int disable_core_queueing = 1;
108module_param(disable_core_queueing, int, 0444);
109MODULE_PARM_DESC(disable_core_queueing, "\n"
110 "\tWhen set the networking core's tx_queue_len is set to zero. This\n"
111 "\tallows packets to be sent without lock contention in the packet\n"
112 "\tscheduler resulting in some cases in improved throughput.\n");
113
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114
115/*
116 * The offset from mac_addr_base that should be used for the next port
117 * that is configured. By convention, if any mgmt ports exist on the
118 * chip, they get the first mac addresses, The ports controlled by
119 * this driver are numbered sequencially following any mgmt addresses
120 * that may exist.
121 */
122static unsigned int cvm_oct_mac_addr_offset;
123
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124/**
125 * Periodic timer to check auto negotiation
126 */
127static struct timer_list cvm_oct_poll_timer;
128
129/**
130 * Array of every ethernet device owned by this driver indexed by
131 * the ipd input port number.
132 */
133struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
134
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135/**
136 * Periodic timer tick for slow management operations
137 *
138 * @arg: Device to check
139 */
140static void cvm_do_timer(unsigned long arg)
141{
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142 int32_t skb_to_free, undo;
143 int queues_per_port;
144 int qos;
145 struct octeon_ethernet *priv;
80ff0fd3 146 static int port;
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147
148 if (port >= CVMX_PIP_NUM_INPUT_PORTS) {
149 /*
150 * All ports have been polled. Start the next
151 * iteration through the ports in one second.
152 */
80ff0fd3 153 port = 0;
80ff0fd3 154 mod_timer(&cvm_oct_poll_timer, jiffies + HZ);
a620c163 155 return;
80ff0fd3 156 }
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157 if (!cvm_oct_device[port])
158 goto out;
159
160 priv = netdev_priv(cvm_oct_device[port]);
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161 if (priv->poll)
162 priv->poll(cvm_oct_device[port]);
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163
164 queues_per_port = cvmx_pko_get_num_queues(port);
165 /* Drain any pending packets in the free list */
166 for (qos = 0; qos < queues_per_port; qos++) {
167 if (skb_queue_len(&priv->tx_free_list[qos]) == 0)
168 continue;
169 skb_to_free = cvmx_fau_fetch_and_add32(priv->fau + qos * 4,
170 MAX_SKB_TO_FREE);
171 undo = skb_to_free > 0 ?
172 MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE;
173 if (undo > 0)
174 cvmx_fau_atomic_add32(priv->fau+qos*4, -undo);
175 skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ?
176 MAX_SKB_TO_FREE : -skb_to_free;
177 cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 1);
178 }
179 cvm_oct_device[port]->netdev_ops->ndo_get_stats(cvm_oct_device[port]);
180
181out:
182 port++;
183 /* Poll the next port in a 50th of a second.
184 This spreads the polling of ports out a little bit */
185 mod_timer(&cvm_oct_poll_timer, jiffies + HZ / 50);
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186}
187
188/**
189 * Configure common hardware for all interfaces
190 */
191static __init void cvm_oct_configure_common_hw(void)
192{
193 int r;
194 /* Setup the FPA */
195 cvmx_fpa_enable();
196 cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
197 num_packet_buffers);
198 cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
199 num_packet_buffers);
200 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
201 cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
202 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
203
204 if (USE_RED)
205 cvmx_helper_setup_red(num_packet_buffers / 4,
206 num_packet_buffers / 8);
207
208 /* Enable the MII interface */
209 if (!octeon_is_simulation())
210 cvmx_write_csr(CVMX_SMIX_EN(0), 1);
211
212 /* Register an IRQ hander for to receive POW interrupts */
213 r = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group,
214 cvm_oct_do_interrupt, IRQF_SHARED, "Ethernet",
215 cvm_oct_device);
216
217#if defined(CONFIG_SMP) && 0
218 if (USE_MULTICORE_RECEIVE) {
219 irq_set_affinity(OCTEON_IRQ_WORKQ0 + pow_receive_group,
220 cpu_online_mask);
221 }
222#endif
223}
224
225/**
226 * Free a work queue entry received in a intercept callback.
227 *
228 * @work_queue_entry:
229 * Work queue entry to free
230 * Returns Zero on success, Negative on failure.
231 */
232int cvm_oct_free_work(void *work_queue_entry)
233{
234 cvmx_wqe_t *work = work_queue_entry;
235
236 int segments = work->word2.s.bufs;
237 union cvmx_buf_ptr segment_ptr = work->packet_ptr;
238
239 while (segments--) {
240 union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *)
241 cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
242 if (unlikely(!segment_ptr.s.i))
243 cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr),
244 segment_ptr.s.pool,
245 DONT_WRITEBACK(CVMX_FPA_PACKET_POOL_SIZE /
246 128));
247 segment_ptr = next_ptr;
248 }
249 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1));
250
251 return 0;
252}
253EXPORT_SYMBOL(cvm_oct_free_work);
254
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255/**
256 * Get the low level ethernet statistics
257 *
258 * @dev: Device to get the statistics from
259 * Returns Pointer to the statistics
260 */
261static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev)
262{
263 cvmx_pip_port_status_t rx_status;
264 cvmx_pko_port_status_t tx_status;
265 struct octeon_ethernet *priv = netdev_priv(dev);
266
267 if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) {
268 if (octeon_is_simulation()) {
269 /* The simulator doesn't support statistics */
270 memset(&rx_status, 0, sizeof(rx_status));
271 memset(&tx_status, 0, sizeof(tx_status));
272 } else {
273 cvmx_pip_get_port_status(priv->port, 1, &rx_status);
274 cvmx_pko_get_port_status(priv->port, 1, &tx_status);
275 }
276
277 priv->stats.rx_packets += rx_status.inb_packets;
278 priv->stats.tx_packets += tx_status.packets;
279 priv->stats.rx_bytes += rx_status.inb_octets;
280 priv->stats.tx_bytes += tx_status.octets;
281 priv->stats.multicast += rx_status.multicast_packets;
282 priv->stats.rx_crc_errors += rx_status.inb_errors;
283 priv->stats.rx_frame_errors += rx_status.fcs_align_err_packets;
284
285 /*
286 * The drop counter must be incremented atomically
287 * since the RX tasklet also increments it.
288 */
289#ifdef CONFIG_64BIT
290 atomic64_add(rx_status.dropped_packets,
291 (atomic64_t *)&priv->stats.rx_dropped);
292#else
293 atomic_add(rx_status.dropped_packets,
294 (atomic_t *)&priv->stats.rx_dropped);
295#endif
296 }
297
298 return &priv->stats;
299}
300
301/**
302 * Change the link MTU. Unimplemented
303 *
304 * @dev: Device to change
305 * @new_mtu: The new MTU
306 *
307 * Returns Zero on success
308 */
309static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu)
310{
311 struct octeon_ethernet *priv = netdev_priv(dev);
312 int interface = INTERFACE(priv->port);
313 int index = INDEX(priv->port);
314#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
315 int vlan_bytes = 4;
316#else
317 int vlan_bytes = 0;
318#endif
319
320 /*
321 * Limit the MTU to make sure the ethernet packets are between
322 * 64 bytes and 65535 bytes.
323 */
324 if ((new_mtu + 14 + 4 + vlan_bytes < 64)
325 || (new_mtu + 14 + 4 + vlan_bytes > 65392)) {
326 pr_err("MTU must be between %d and %d.\n",
327 64 - 14 - 4 - vlan_bytes, 65392 - 14 - 4 - vlan_bytes);
328 return -EINVAL;
329 }
330 dev->mtu = new_mtu;
331
332 if ((interface < 2)
333 && (cvmx_helper_interface_get_mode(interface) !=
334 CVMX_HELPER_INTERFACE_MODE_SPI)) {
335 /* Add ethernet header and FCS, and VLAN if configured. */
336 int max_packet = new_mtu + 14 + 4 + vlan_bytes;
337
338 if (OCTEON_IS_MODEL(OCTEON_CN3XXX)
339 || OCTEON_IS_MODEL(OCTEON_CN58XX)) {
340 /* Signal errors on packets larger than the MTU */
341 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface),
342 max_packet);
343 } else {
344 /*
345 * Set the hardware to truncate packets larger
346 * than the MTU and smaller the 64 bytes.
347 */
348 union cvmx_pip_frm_len_chkx frm_len_chk;
349 frm_len_chk.u64 = 0;
350 frm_len_chk.s.minlen = 64;
351 frm_len_chk.s.maxlen = max_packet;
352 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface),
353 frm_len_chk.u64);
354 }
355 /*
356 * Set the hardware to truncate packets larger than
357 * the MTU. The jabber register must be set to a
358 * multiple of 8 bytes, so round up.
359 */
360 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface),
361 (max_packet + 7) & ~7u);
362 }
363 return 0;
364}
365
366/**
367 * Set the multicast list. Currently unimplemented.
368 *
369 * @dev: Device to work on
370 */
371static void cvm_oct_common_set_multicast_list(struct net_device *dev)
372{
373 union cvmx_gmxx_prtx_cfg gmx_cfg;
374 struct octeon_ethernet *priv = netdev_priv(dev);
375 int interface = INTERFACE(priv->port);
376 int index = INDEX(priv->port);
377
378 if ((interface < 2)
379 && (cvmx_helper_interface_get_mode(interface) !=
380 CVMX_HELPER_INTERFACE_MODE_SPI)) {
381 union cvmx_gmxx_rxx_adr_ctl control;
382 control.u64 = 0;
383 control.s.bcst = 1; /* Allow broadcast MAC addresses */
384
385 if (dev->mc_list || (dev->flags & IFF_ALLMULTI) ||
386 (dev->flags & IFF_PROMISC))
387 /* Force accept multicast packets */
388 control.s.mcst = 2;
389 else
390 /* Force reject multicat packets */
391 control.s.mcst = 1;
392
393 if (dev->flags & IFF_PROMISC)
394 /*
395 * Reject matches if promisc. Since CAM is
396 * shut off, should accept everything.
397 */
398 control.s.cam_mode = 0;
399 else
400 /* Filter packets based on the CAM */
401 control.s.cam_mode = 1;
402
403 gmx_cfg.u64 =
404 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
405 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
406 gmx_cfg.u64 & ~1ull);
407
408 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface),
409 control.u64);
410 if (dev->flags & IFF_PROMISC)
411 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
412 (index, interface), 0);
413 else
414 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
415 (index, interface), 1);
416
417 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
418 gmx_cfg.u64);
419 }
420}
421
422/**
423 * Set the hardware MAC address for a device
424 *
425 * @dev: Device to change the MAC address for
426 * @addr: Address structure to change it too. MAC address is addr + 2.
427 * Returns Zero on success
428 */
429static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr)
430{
431 struct octeon_ethernet *priv = netdev_priv(dev);
432 union cvmx_gmxx_prtx_cfg gmx_cfg;
433 int interface = INTERFACE(priv->port);
434 int index = INDEX(priv->port);
435
436 memcpy(dev->dev_addr, addr + 2, 6);
437
438 if ((interface < 2)
439 && (cvmx_helper_interface_get_mode(interface) !=
440 CVMX_HELPER_INTERFACE_MODE_SPI)) {
441 int i;
442 uint8_t *ptr = addr;
443 uint64_t mac = 0;
444 for (i = 0; i < 6; i++)
445 mac = (mac << 8) | (uint64_t) (ptr[i + 2]);
446
447 gmx_cfg.u64 =
448 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
449 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
450 gmx_cfg.u64 & ~1ull);
451
452 cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
453 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface),
454 ptr[2]);
455 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface),
456 ptr[3]);
457 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface),
458 ptr[4]);
459 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface),
460 ptr[5]);
461 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface),
462 ptr[6]);
463 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface),
464 ptr[7]);
465 cvm_oct_common_set_multicast_list(dev);
466 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
467 gmx_cfg.u64);
468 }
469 return 0;
470}
471
472/**
473 * Per network device initialization
474 *
475 * @dev: Device to initialize
476 * Returns Zero on success
477 */
478int cvm_oct_common_init(struct net_device *dev)
479{
f696a108 480 struct octeon_ethernet *priv = netdev_priv(dev);
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481 struct sockaddr sa;
482 u64 mac = ((u64)(octeon_bootinfo->mac_addr_base[0] & 0xff) << 40) |
483 ((u64)(octeon_bootinfo->mac_addr_base[1] & 0xff) << 32) |
484 ((u64)(octeon_bootinfo->mac_addr_base[2] & 0xff) << 24) |
485 ((u64)(octeon_bootinfo->mac_addr_base[3] & 0xff) << 16) |
486 ((u64)(octeon_bootinfo->mac_addr_base[4] & 0xff) << 8) |
487 (u64)(octeon_bootinfo->mac_addr_base[5] & 0xff);
488
489 mac += cvm_oct_mac_addr_offset;
490 sa.sa_data[0] = (mac >> 40) & 0xff;
491 sa.sa_data[1] = (mac >> 32) & 0xff;
492 sa.sa_data[2] = (mac >> 24) & 0xff;
493 sa.sa_data[3] = (mac >> 16) & 0xff;
494 sa.sa_data[4] = (mac >> 8) & 0xff;
495 sa.sa_data[5] = mac & 0xff;
496
497 if (cvm_oct_mac_addr_offset >= octeon_bootinfo->mac_addr_count)
498 printk(KERN_DEBUG "%s: Using MAC outside of the assigned range:"
499 " %02x:%02x:%02x:%02x:%02x:%02x\n", dev->name,
500 sa.sa_data[0] & 0xff, sa.sa_data[1] & 0xff,
501 sa.sa_data[2] & 0xff, sa.sa_data[3] & 0xff,
502 sa.sa_data[4] & 0xff, sa.sa_data[5] & 0xff);
503 cvm_oct_mac_addr_offset++;
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504
505 /*
506 * Force the interface to use the POW send if always_use_pow
507 * was specified or it is in the pow send list.
508 */
509 if ((pow_send_group != -1)
510 && (always_use_pow || strstr(pow_send_list, dev->name)))
511 priv->queue = -1;
512
513 if (priv->queue != -1 && USE_HW_TCPUDP_CHECKSUM)
514 dev->features |= NETIF_F_IP_CSUM;
515
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516 /* We do our own locking, Linux doesn't need to */
517 dev->features |= NETIF_F_LLTX;
518 SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops);
519
f6ed1b3b 520 cvm_oct_phy_setup_device(dev);
13c5939e 521 dev->netdev_ops->ndo_set_mac_address(dev, &sa);
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522 dev->netdev_ops->ndo_change_mtu(dev, dev->mtu);
523
524 /*
525 * Zero out stats for port so we won't mistakenly show
526 * counters from the bootloader.
527 */
528 memset(dev->netdev_ops->ndo_get_stats(dev), 0,
529 sizeof(struct net_device_stats));
530
531 return 0;
532}
533
534void cvm_oct_common_uninit(struct net_device *dev)
535{
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536 struct octeon_ethernet *priv = netdev_priv(dev);
537
538 if (priv->phydev)
539 phy_disconnect(priv->phydev);
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540}
541
542static const struct net_device_ops cvm_oct_npi_netdev_ops = {
543 .ndo_init = cvm_oct_common_init,
544 .ndo_uninit = cvm_oct_common_uninit,
545 .ndo_start_xmit = cvm_oct_xmit,
546 .ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
547 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
548 .ndo_do_ioctl = cvm_oct_ioctl,
549 .ndo_change_mtu = cvm_oct_common_change_mtu,
550 .ndo_get_stats = cvm_oct_common_get_stats,
551#ifdef CONFIG_NET_POLL_CONTROLLER
552 .ndo_poll_controller = cvm_oct_poll_controller,
553#endif
554};
555static const struct net_device_ops cvm_oct_xaui_netdev_ops = {
556 .ndo_init = cvm_oct_xaui_init,
557 .ndo_uninit = cvm_oct_xaui_uninit,
558 .ndo_open = cvm_oct_xaui_open,
559 .ndo_stop = cvm_oct_xaui_stop,
560 .ndo_start_xmit = cvm_oct_xmit,
561 .ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
562 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
563 .ndo_do_ioctl = cvm_oct_ioctl,
564 .ndo_change_mtu = cvm_oct_common_change_mtu,
565 .ndo_get_stats = cvm_oct_common_get_stats,
566#ifdef CONFIG_NET_POLL_CONTROLLER
567 .ndo_poll_controller = cvm_oct_poll_controller,
568#endif
569};
570static const struct net_device_ops cvm_oct_sgmii_netdev_ops = {
571 .ndo_init = cvm_oct_sgmii_init,
572 .ndo_uninit = cvm_oct_sgmii_uninit,
573 .ndo_open = cvm_oct_sgmii_open,
574 .ndo_stop = cvm_oct_sgmii_stop,
575 .ndo_start_xmit = cvm_oct_xmit,
576 .ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
577 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
578 .ndo_do_ioctl = cvm_oct_ioctl,
579 .ndo_change_mtu = cvm_oct_common_change_mtu,
580 .ndo_get_stats = cvm_oct_common_get_stats,
581#ifdef CONFIG_NET_POLL_CONTROLLER
582 .ndo_poll_controller = cvm_oct_poll_controller,
583#endif
584};
585static const struct net_device_ops cvm_oct_spi_netdev_ops = {
586 .ndo_init = cvm_oct_spi_init,
587 .ndo_uninit = cvm_oct_spi_uninit,
588 .ndo_start_xmit = cvm_oct_xmit,
589 .ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
590 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
591 .ndo_do_ioctl = cvm_oct_ioctl,
592 .ndo_change_mtu = cvm_oct_common_change_mtu,
593 .ndo_get_stats = cvm_oct_common_get_stats,
594#ifdef CONFIG_NET_POLL_CONTROLLER
595 .ndo_poll_controller = cvm_oct_poll_controller,
596#endif
597};
598static const struct net_device_ops cvm_oct_rgmii_netdev_ops = {
599 .ndo_init = cvm_oct_rgmii_init,
600 .ndo_uninit = cvm_oct_rgmii_uninit,
601 .ndo_open = cvm_oct_rgmii_open,
602 .ndo_stop = cvm_oct_rgmii_stop,
603 .ndo_start_xmit = cvm_oct_xmit,
604 .ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
605 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
606 .ndo_do_ioctl = cvm_oct_ioctl,
607 .ndo_change_mtu = cvm_oct_common_change_mtu,
608 .ndo_get_stats = cvm_oct_common_get_stats,
609#ifdef CONFIG_NET_POLL_CONTROLLER
610 .ndo_poll_controller = cvm_oct_poll_controller,
611#endif
612};
613static const struct net_device_ops cvm_oct_pow_netdev_ops = {
614 .ndo_init = cvm_oct_common_init,
615 .ndo_start_xmit = cvm_oct_xmit_pow,
616 .ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
617 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
618 .ndo_do_ioctl = cvm_oct_ioctl,
619 .ndo_change_mtu = cvm_oct_common_change_mtu,
620 .ndo_get_stats = cvm_oct_common_get_stats,
621#ifdef CONFIG_NET_POLL_CONTROLLER
622 .ndo_poll_controller = cvm_oct_poll_controller,
623#endif
624};
625
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626extern void octeon_mdiobus_force_mod_depencency(void);
627
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628/**
629 * Module/ driver initialization. Creates the linux network
630 * devices.
631 *
632 * Returns Zero on success
633 */
634static int __init cvm_oct_init_module(void)
635{
636 int num_interfaces;
637 int interface;
638 int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
639 int qos;
640
f6ed1b3b 641 octeon_mdiobus_force_mod_depencency();
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642 pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION);
643
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644 if (OCTEON_IS_MODEL(OCTEON_CN52XX))
645 cvm_oct_mac_addr_offset = 2; /* First two are the mgmt ports. */
646 else if (OCTEON_IS_MODEL(OCTEON_CN56XX))
647 cvm_oct_mac_addr_offset = 1; /* First one is the mgmt port. */
648 else
649 cvm_oct_mac_addr_offset = 0;
650
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651 cvm_oct_proc_initialize();
652 cvm_oct_rx_initialize();
653 cvm_oct_configure_common_hw();
654
655 cvmx_helper_initialize_packet_io_global();
656
657 /* Change the input group for all ports before input is enabled */
658 num_interfaces = cvmx_helper_get_number_of_interfaces();
659 for (interface = 0; interface < num_interfaces; interface++) {
660 int num_ports = cvmx_helper_ports_on_interface(interface);
661 int port;
662
663 for (port = cvmx_helper_get_ipd_port(interface, 0);
664 port < cvmx_helper_get_ipd_port(interface, num_ports);
665 port++) {
666 union cvmx_pip_prt_tagx pip_prt_tagx;
667 pip_prt_tagx.u64 =
668 cvmx_read_csr(CVMX_PIP_PRT_TAGX(port));
669 pip_prt_tagx.s.grp = pow_receive_group;
670 cvmx_write_csr(CVMX_PIP_PRT_TAGX(port),
671 pip_prt_tagx.u64);
672 }
673 }
674
675 cvmx_helper_ipd_and_packet_input_enable();
676
677 memset(cvm_oct_device, 0, sizeof(cvm_oct_device));
678
679 /*
680 * Initialize the FAU used for counting packet buffers that
681 * need to be freed.
682 */
683 cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
684
685 if ((pow_send_group != -1)) {
686 struct net_device *dev;
687 pr_info("\tConfiguring device for POW only access\n");
688 dev = alloc_etherdev(sizeof(struct octeon_ethernet));
689 if (dev) {
690 /* Initialize the device private structure. */
691 struct octeon_ethernet *priv = netdev_priv(dev);
692 memset(priv, 0, sizeof(struct octeon_ethernet));
693
f696a108 694 dev->netdev_ops = &cvm_oct_pow_netdev_ops;
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695 priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED;
696 priv->port = CVMX_PIP_NUM_INPUT_PORTS;
697 priv->queue = -1;
698 strcpy(dev->name, "pow%d");
699 for (qos = 0; qos < 16; qos++)
700 skb_queue_head_init(&priv->tx_free_list[qos]);
701
702 if (register_netdev(dev) < 0) {
703 pr_err("Failed to register ethernet "
704 "device for POW\n");
705 kfree(dev);
706 } else {
707 cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev;
708 pr_info("%s: POW send group %d, receive "
709 "group %d\n",
710 dev->name, pow_send_group,
711 pow_receive_group);
712 }
713 } else {
714 pr_err("Failed to allocate ethernet device "
715 "for POW\n");
716 }
717 }
718
719 num_interfaces = cvmx_helper_get_number_of_interfaces();
720 for (interface = 0; interface < num_interfaces; interface++) {
721 cvmx_helper_interface_mode_t imode =
722 cvmx_helper_interface_get_mode(interface);
723 int num_ports = cvmx_helper_ports_on_interface(interface);
724 int port;
725
726 for (port = cvmx_helper_get_ipd_port(interface, 0);
727 port < cvmx_helper_get_ipd_port(interface, num_ports);
728 port++) {
729 struct octeon_ethernet *priv;
730 struct net_device *dev =
731 alloc_etherdev(sizeof(struct octeon_ethernet));
732 if (!dev) {
733 pr_err("Failed to allocate ethernet device "
734 "for port %d\n", port);
735 continue;
736 }
737 if (disable_core_queueing)
738 dev->tx_queue_len = 0;
739
740 /* Initialize the device private structure. */
741 priv = netdev_priv(dev);
742 memset(priv, 0, sizeof(struct octeon_ethernet));
743
744 priv->imode = imode;
745 priv->port = port;
746 priv->queue = cvmx_pko_get_base_queue(priv->port);
747 priv->fau = fau - cvmx_pko_get_num_queues(port) * 4;
748 for (qos = 0; qos < 16; qos++)
749 skb_queue_head_init(&priv->tx_free_list[qos]);
750 for (qos = 0; qos < cvmx_pko_get_num_queues(port);
751 qos++)
752 cvmx_fau_atomic_write32(priv->fau + qos * 4, 0);
753
754 switch (priv->imode) {
755
756 /* These types don't support ports to IPD/PKO */
757 case CVMX_HELPER_INTERFACE_MODE_DISABLED:
758 case CVMX_HELPER_INTERFACE_MODE_PCIE:
759 case CVMX_HELPER_INTERFACE_MODE_PICMG:
760 break;
761
762 case CVMX_HELPER_INTERFACE_MODE_NPI:
f696a108 763 dev->netdev_ops = &cvm_oct_npi_netdev_ops;
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764 strcpy(dev->name, "npi%d");
765 break;
766
767 case CVMX_HELPER_INTERFACE_MODE_XAUI:
f696a108 768 dev->netdev_ops = &cvm_oct_xaui_netdev_ops;
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769 strcpy(dev->name, "xaui%d");
770 break;
771
772 case CVMX_HELPER_INTERFACE_MODE_LOOP:
f696a108 773 dev->netdev_ops = &cvm_oct_npi_netdev_ops;
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774 strcpy(dev->name, "loop%d");
775 break;
776
777 case CVMX_HELPER_INTERFACE_MODE_SGMII:
f696a108 778 dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
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779 strcpy(dev->name, "eth%d");
780 break;
781
782 case CVMX_HELPER_INTERFACE_MODE_SPI:
f696a108 783 dev->netdev_ops = &cvm_oct_spi_netdev_ops;
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784 strcpy(dev->name, "spi%d");
785 break;
786
787 case CVMX_HELPER_INTERFACE_MODE_RGMII:
788 case CVMX_HELPER_INTERFACE_MODE_GMII:
f696a108 789 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops;
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790 strcpy(dev->name, "eth%d");
791 break;
792 }
793
f696a108 794 if (!dev->netdev_ops) {
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795 kfree(dev);
796 } else if (register_netdev(dev) < 0) {
797 pr_err("Failed to register ethernet device "
798 "for interface %d, port %d\n",
799 interface, priv->port);
800 kfree(dev);
801 } else {
802 cvm_oct_device[priv->port] = dev;
803 fau -=
804 cvmx_pko_get_num_queues(priv->port) *
805 sizeof(uint32_t);
806 }
807 }
808 }
809
810 if (INTERRUPT_LIMIT) {
811 /*
812 * Set the POW timer rate to give an interrupt at most
813 * INTERRUPT_LIMIT times per second.
814 */
815 cvmx_write_csr(CVMX_POW_WQ_INT_PC,
816 octeon_bootinfo->eclock_hz / (INTERRUPT_LIMIT *
817 16 * 256) << 8);
818
819 /*
820 * Enable POW timer interrupt. It will count when
821 * there are packets available.
822 */
823 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group),
824 0x1ful << 24);
825 } else {
826 /* Enable POW interrupt when our port has at least one packet */
827 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001);
828 }
829
830 /* Enable the poll timer for checking RGMII status */
831 init_timer(&cvm_oct_poll_timer);
832 cvm_oct_poll_timer.data = 0;
833 cvm_oct_poll_timer.function = cvm_do_timer;
834 mod_timer(&cvm_oct_poll_timer, jiffies + HZ);
835
836 return 0;
837}
838
839/**
840 * Module / driver shutdown
841 *
842 * Returns Zero on success
843 */
844static void __exit cvm_oct_cleanup_module(void)
845{
846 int port;
847
848 /* Disable POW interrupt */
849 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0);
850
851 cvmx_ipd_disable();
852
853 /* Free the interrupt handler */
854 free_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, cvm_oct_device);
855
856 del_timer(&cvm_oct_poll_timer);
857 cvm_oct_rx_shutdown();
858 cvmx_pko_disable();
859
860 /* Free the ethernet devices */
861 for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) {
862 if (cvm_oct_device[port]) {
863 cvm_oct_tx_shutdown(cvm_oct_device[port]);
864 unregister_netdev(cvm_oct_device[port]);
865 kfree(cvm_oct_device[port]);
866 cvm_oct_device[port] = NULL;
867 }
868 }
869
870 cvmx_pko_shutdown();
871 cvm_oct_proc_shutdown();
872
873 cvmx_ipd_free_ptr();
874
875 /* Free the HW pools */
876 cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
877 num_packet_buffers);
878 cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
879 num_packet_buffers);
880 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
881 cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
882 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
883}
884
885MODULE_LICENSE("GPL");
886MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
887MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver.");
888module_init(cvm_oct_init_module);
889module_exit(cvm_oct_cleanup_module);
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