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Merge tag 'renesas-fixes-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / staging / rdma / hfi1 / user_sdma.c
CommitLineData
77241056
MM		 1/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50#include <linux/mm.h>
51#include <linux/types.h>
52#include <linux/device.h>
53#include <linux/dmapool.h>
54#include <linux/slab.h>
55#include <linux/list.h>
56#include <linux/highmem.h>
57#include <linux/io.h>
58#include <linux/uio.h>
59#include <linux/rbtree.h>
60#include <linux/spinlock.h>
61#include <linux/delay.h>
62#include <linux/kthread.h>
63#include <linux/mmu_context.h>
64#include <linux/module.h>
65#include <linux/vmalloc.h>
66
67#include "hfi.h"
68#include "sdma.h"
69#include "user_sdma.h"
70#include "sdma.h"
71#include "verbs.h" /* for the headers */
72#include "common.h" /* for struct hfi1_tid_info */
73#include "trace.h"
74
75static uint hfi1_sdma_comp_ring_size = 128;
76module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
77MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
78
79/* The maximum number of Data io vectors per message/request */
80#define MAX_VECTORS_PER_REQ 8
81/*
82 * Maximum number of packet to send from each message/request
83 * before moving to the next one.
84 */
85#define MAX_PKTS_PER_QUEUE 16
86
87#define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
88
89#define req_opcode(x) \
90 (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
91#define req_version(x) \
92 (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
93#define req_iovcnt(x) \
94 (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
95
96/* Number of BTH.PSN bits used for sequence number in expected rcvs */
97#define BTH_SEQ_MASK 0x7ffull
98
99/*
100 * Define fields in the KDETH header so we can update the header
101 * template.
102 */
103#define KDETH_OFFSET_SHIFT 0
104#define KDETH_OFFSET_MASK 0x7fff
105#define KDETH_OM_SHIFT 15
106#define KDETH_OM_MASK 0x1
107#define KDETH_TID_SHIFT 16
108#define KDETH_TID_MASK 0x3ff
109#define KDETH_TIDCTRL_SHIFT 26
110#define KDETH_TIDCTRL_MASK 0x3
111#define KDETH_INTR_SHIFT 28
112#define KDETH_INTR_MASK 0x1
113#define KDETH_SH_SHIFT 29
114#define KDETH_SH_MASK 0x1
115#define KDETH_HCRC_UPPER_SHIFT 16
116#define KDETH_HCRC_UPPER_MASK 0xff
117#define KDETH_HCRC_LOWER_SHIFT 24
118#define KDETH_HCRC_LOWER_MASK 0xff
119
120#define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
121#define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
122
123#define KDETH_GET(val, field) \
124 (((le32_to_cpu((val))) >> KDETH_##field##_SHIFT) & KDETH_##field##_MASK)
125#define KDETH_SET(dw, field, val) do { \
126 u32 dwval = le32_to_cpu(dw); \
127 dwval &= ~(KDETH_##field##_MASK << KDETH_##field##_SHIFT); \
128 dwval |= (((val) & KDETH_##field##_MASK) << \
129 KDETH_##field##_SHIFT); \
130 dw = cpu_to_le32(dwval); \
131 } while (0)
132
133#define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \
134 do { \
135 if ((idx) < ARRAY_SIZE((arr))) \
136 (arr)[(idx++)] = sdma_build_ahg_descriptor( \
137 (__force u16)(value), (dw), (bit), \
138 (width)); \
139 else \
140 return -ERANGE; \
141 } while (0)
142
143/* KDETH OM multipliers and switch over point */
144#define KDETH_OM_SMALL 4
145#define KDETH_OM_LARGE 64
146#define KDETH_OM_MAX_SIZE (1 << ((KDETH_OM_LARGE / KDETH_OM_SMALL) + 1))
147
148/* Last packet in the request */
149#define USER_SDMA_TXREQ_FLAGS_LAST_PKT (1 << 0)
150
151#define SDMA_REQ_IN_USE 0
152#define SDMA_REQ_FOR_THREAD 1
153#define SDMA_REQ_SEND_DONE 2
154#define SDMA_REQ_HAVE_AHG 3
155#define SDMA_REQ_HAS_ERROR 4
156#define SDMA_REQ_DONE_ERROR 5
157
158#define SDMA_PKT_Q_INACTIVE (1 << 0)
159#define SDMA_PKT_Q_ACTIVE (1 << 1)
160#define SDMA_PKT_Q_DEFERRED (1 << 2)
161
162/*
163 * Maximum retry attempts to submit a TX request
164 * before putting the process to sleep.
165 */
166#define MAX_DEFER_RETRY_COUNT 1
167
168static unsigned initial_pkt_count = 8;
169
170#define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
171
172struct user_sdma_iovec {
173 struct iovec iov;
174 /* number of pages in this vector */
175 unsigned npages;
176 /* array of pinned pages for this vector */
177 struct page **pages;
178 /* offset into the virtual address space of the vector at
179 * which we last left off. */
180 u64 offset;
181};
182
183struct user_sdma_request {
184 struct sdma_req_info info;
185 struct hfi1_user_sdma_pkt_q *pq;
186 struct hfi1_user_sdma_comp_q *cq;
187 /* This is the original header from user space */
188 struct hfi1_pkt_header hdr;
189 /*
190 * Pointer to the SDMA engine for this request.
191 * Since different request could be on different VLs,
192 * each request will need it's own engine pointer.
193 */
194 struct sdma_engine *sde;
195 u8 ahg_idx;
196 u32 ahg[9];
197 /*
198 * KDETH.Offset (Eager) field
199 * We need to remember the initial value so the headers
200 * can be updated properly.
201 */
202 u32 koffset;
203 /*
204 * KDETH.OFFSET (TID) field
205 * The offset can cover multiple packets, depending on the
206 * size of the TID entry.
207 */
208 u32 tidoffset;
209 /*
210 * KDETH.OM
211 * Remember this because the header template always sets it
212 * to 0.
213 */
214 u8 omfactor;
215 /*
216 * pointer to the user's task_struct. We are going to
217 * get a reference to it so we can process io vectors
218 * at a later time.
219 */
220 struct task_struct *user_proc;
221 /*
222 * pointer to the user's mm_struct. We are going to
223 * get a reference to it so it doesn't get freed
224 * since we might not be in process context when we
225 * are processing the iov's.
226 * Using this mm_struct, we can get vma based on the
227 * iov's address (find_vma()).
228 */
229 struct mm_struct *user_mm;
230 /*
231 * We copy the iovs for this request (based on
232 * info.iovcnt). These are only the data vectors
233 */
234 unsigned data_iovs;
235 /* total length of the data in the request */
236 u32 data_len;
237 /* progress index moving along the iovs array */
238 unsigned iov_idx;
239 struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
240 /* number of elements copied to the tids array */
241 u16 n_tids;
242 /* TID array values copied from the tid_iov vector */
243 u32 *tids;
244 u16 tididx;
245 u32 sent;
246 u64 seqnum;
247 spinlock_t list_lock;
248 struct list_head txps;
249 unsigned long flags;
250};
251
252struct user_sdma_txreq {
253 /* Packet header for the txreq */
254 struct hfi1_pkt_header hdr;
255 struct sdma_txreq txreq;
256 struct user_sdma_request *req;
257 struct user_sdma_iovec *iovec1;
258 struct user_sdma_iovec *iovec2;
259 u16 flags;
260 unsigned busycount;
261 u64 seqnum;
262};
263
264#define SDMA_DBG(req, fmt, ...) \
265 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
266 (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
267 ##__VA_ARGS__)
268#define SDMA_Q_DBG(pq, fmt, ...) \
269 hfi1_cdbg(SDMA, "[%u:%u:%u] " fmt, (pq)->dd->unit, (pq)->ctxt, \
270 (pq)->subctxt, ##__VA_ARGS__)
271
272static int user_sdma_send_pkts(struct user_sdma_request *, unsigned);
273static int num_user_pages(const struct iovec *);
274static void user_sdma_txreq_cb(struct sdma_txreq *, int, int);
275static void user_sdma_free_request(struct user_sdma_request *);
276static int pin_vector_pages(struct user_sdma_request *,
277 struct user_sdma_iovec *);
278static void unpin_vector_pages(struct user_sdma_iovec *);
279static int check_header_template(struct user_sdma_request *,
280 struct hfi1_pkt_header *, u32, u32);
281static int set_txreq_header(struct user_sdma_request *,
282 struct user_sdma_txreq *, u32);
283static int set_txreq_header_ahg(struct user_sdma_request *,
284 struct user_sdma_txreq *, u32);
285static inline void set_comp_state(struct user_sdma_request *,
286 enum hfi1_sdma_comp_state, int);
287static inline u32 set_pkt_bth_psn(__be32, u8, u32);
288static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len);
289
290static int defer_packet_queue(
291 struct sdma_engine *,
292 struct iowait *,
293 struct sdma_txreq *,
294 unsigned seq);
295static void activate_packet_queue(struct iowait *, int);
296
297static inline int iovec_may_free(struct user_sdma_iovec *iovec,
298 void (*free)(struct user_sdma_iovec *))
299{
300 if (ACCESS_ONCE(iovec->offset) == iovec->iov.iov_len) {
301 free(iovec);
302 return 1;
303 }
304 return 0;
305}
306
307static inline void iovec_set_complete(struct user_sdma_iovec *iovec)
308{
309 iovec->offset = iovec->iov.iov_len;
310}
311
312static int defer_packet_queue(
313 struct sdma_engine *sde,
314 struct iowait *wait,
315 struct sdma_txreq *txreq,
316 unsigned seq)
317{
318 struct hfi1_user_sdma_pkt_q *pq =
319 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
320 struct hfi1_ibdev *dev = &pq->dd->verbs_dev;
321 struct user_sdma_txreq *tx =
322 container_of(txreq, struct user_sdma_txreq, txreq);
323
324 if (sdma_progress(sde, seq, txreq)) {
325 if (tx->busycount++ < MAX_DEFER_RETRY_COUNT)
326 goto eagain;
327 }
328 /*
329 * We are assuming that if the list is enqueued somewhere, it
330 * is to the dmawait list since that is the only place where
331 * it is supposed to be enqueued.
332 */
333 xchg(&pq->state, SDMA_PKT_Q_DEFERRED);
334 write_seqlock(&dev->iowait_lock);
335 if (list_empty(&pq->busy.list))
336 list_add_tail(&pq->busy.list, &sde->dmawait);
337 write_sequnlock(&dev->iowait_lock);
338 return -EBUSY;
339eagain:
340 return -EAGAIN;
341}
342
343static void activate_packet_queue(struct iowait *wait, int reason)
344{
345 struct hfi1_user_sdma_pkt_q *pq =
346 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
347 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
348 wake_up(&wait->wait_dma);
349};
350
351static void sdma_kmem_cache_ctor(void *obj)
352{
353 struct user_sdma_txreq *tx = (struct user_sdma_txreq *)obj;
354
355 memset(tx, 0, sizeof(*tx));
356}
357
358int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt, struct file *fp)
359{
360 int ret = 0;
361 unsigned memsize;
362 char buf[64];
363 struct hfi1_devdata *dd;
364 struct hfi1_user_sdma_comp_q *cq;
365 struct hfi1_user_sdma_pkt_q *pq;
366 unsigned long flags;
367
368 if (!uctxt || !fp) {
369 ret = -EBADF;
370 goto done;
371 }
372
373 if (!hfi1_sdma_comp_ring_size) {
374 ret = -EINVAL;
375 goto done;
376 }
377
378 dd = uctxt->dd;
379
380 pq = kzalloc(sizeof(*pq), GFP_KERNEL);
381 if (!pq) {
382 dd_dev_err(dd,
383 "[%u:%u] Failed to allocate SDMA request struct\n",
384 uctxt->ctxt, subctxt_fp(fp));
385 goto pq_nomem;
386 }
387 memsize = sizeof(*pq->reqs) * hfi1_sdma_comp_ring_size;
388 pq->reqs = kmalloc(memsize, GFP_KERNEL);
389 if (!pq->reqs) {
390 dd_dev_err(dd,
391 "[%u:%u] Failed to allocate SDMA request queue (%u)\n",
392 uctxt->ctxt, subctxt_fp(fp), memsize);
393 goto pq_reqs_nomem;
394 }
395 INIT_LIST_HEAD(&pq->list);
396 pq->dd = dd;
397 pq->ctxt = uctxt->ctxt;
398 pq->subctxt = subctxt_fp(fp);
399 pq->n_max_reqs = hfi1_sdma_comp_ring_size;
400 pq->state = SDMA_PKT_Q_INACTIVE;
401 atomic_set(&pq->n_reqs, 0);
402
403 iowait_init(&pq->busy, 0, NULL, defer_packet_queue,
404 activate_packet_queue);
405 pq->reqidx = 0;
406 snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt,
407 subctxt_fp(fp));
408 pq->txreq_cache = kmem_cache_create(buf,
409 sizeof(struct user_sdma_txreq),
410 L1_CACHE_BYTES,
411 SLAB_HWCACHE_ALIGN,
412 sdma_kmem_cache_ctor);
413 if (!pq->txreq_cache) {
414 dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n",
415 uctxt->ctxt);
416 goto pq_txreq_nomem;
417 }
418 user_sdma_pkt_fp(fp) = pq;
419 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
420 if (!cq) {
421 dd_dev_err(dd,
422 "[%u:%u] Failed to allocate SDMA completion queue\n",
423 uctxt->ctxt, subctxt_fp(fp));
424 goto cq_nomem;
425 }
426
427 memsize = ALIGN(sizeof(*cq->comps) * hfi1_sdma_comp_ring_size,
428 PAGE_SIZE);
429 cq->comps = vmalloc_user(memsize);
430 if (!cq->comps) {
431 dd_dev_err(dd,
432 "[%u:%u] Failed to allocate SDMA completion queue entries\n",
433 uctxt->ctxt, subctxt_fp(fp));
434 goto cq_comps_nomem;
435 }
436 cq->nentries = hfi1_sdma_comp_ring_size;
437 user_sdma_comp_fp(fp) = cq;
438
439 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
440 list_add(&pq->list, &uctxt->sdma_queues);
441 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
442 goto done;
443
444cq_comps_nomem:
445 kfree(cq);
446cq_nomem:
447 kmem_cache_destroy(pq->txreq_cache);
448pq_txreq_nomem:
449 kfree(pq->reqs);
450pq_reqs_nomem:
451 kfree(pq);
452 user_sdma_pkt_fp(fp) = NULL;
453pq_nomem:
454 ret = -ENOMEM;
455done:
456 return ret;
457}
458
459int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd)
460{
461 struct hfi1_ctxtdata *uctxt = fd->uctxt;
462 struct hfi1_user_sdma_pkt_q *pq;
463 unsigned long flags;
464
465 hfi1_cdbg(SDMA, "[%u:%u:%u] Freeing user SDMA queues", uctxt->dd->unit,
466 uctxt->ctxt, fd->subctxt);
467 pq = fd->pq;
468 if (pq) {
469 u16 i, j;
470
471 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
472 if (!list_empty(&pq->list))
473 list_del_init(&pq->list);
474 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
475 iowait_sdma_drain(&pq->busy);
476 if (pq->reqs) {
477 for (i = 0, j = 0; i < atomic_read(&pq->n_reqs) &&
478 j < pq->n_max_reqs; j++) {
479 struct user_sdma_request *req = &pq->reqs[j];
480
481 if (test_bit(SDMA_REQ_IN_USE, &req->flags)) {
482 set_comp_state(req, ERROR, -ECOMM);
483 user_sdma_free_request(req);
484 i++;
485 }
486 }
487 kfree(pq->reqs);
488 }
489 if (pq->txreq_cache)
490 kmem_cache_destroy(pq->txreq_cache);
491 kfree(pq);
492 fd->pq = NULL;
493 }
494 if (fd->cq) {
495 if (fd->cq->comps)
496 vfree(fd->cq->comps);
497 kfree(fd->cq);
498 fd->cq = NULL;
499 }
500 return 0;
501}
502
503int hfi1_user_sdma_process_request(struct file *fp, struct iovec *iovec,
504 unsigned long dim, unsigned long *count)
505{
506 int ret = 0, i = 0, sent;
507 struct hfi1_ctxtdata *uctxt = ctxt_fp(fp);
508 struct hfi1_user_sdma_pkt_q *pq = user_sdma_pkt_fp(fp);
509 struct hfi1_user_sdma_comp_q *cq = user_sdma_comp_fp(fp);
510 struct hfi1_devdata *dd = pq->dd;
511 unsigned long idx = 0;
512 u8 pcount = initial_pkt_count;
513 struct sdma_req_info info;
514 struct user_sdma_request *req;
515 u8 opcode, sc, vl;
516
517 if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) {
518 hfi1_cdbg(
519 SDMA,
520 "[%u:%u:%u] First vector not big enough for header %lu/%lu",
521 dd->unit, uctxt->ctxt, subctxt_fp(fp),
522 iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr));
523 ret = -EINVAL;
524 goto done;
525 }
526 ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info));
527 if (ret) {
528 hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)",
529 dd->unit, uctxt->ctxt, subctxt_fp(fp), ret);
530 ret = -EFAULT;
531 goto done;
532 }
533 trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, subctxt_fp(fp),
534 (u16 *)&info);
535 if (cq->comps[info.comp_idx].status == QUEUED) {
536 hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in QUEUED state",
537 dd->unit, uctxt->ctxt, subctxt_fp(fp),
538 info.comp_idx);
539 ret = -EBADSLT;
540 goto done;
541 }
542 if (!info.fragsize) {
543 hfi1_cdbg(SDMA,
544 "[%u:%u:%u:%u] Request does not specify fragsize",
545 dd->unit, uctxt->ctxt, subctxt_fp(fp), info.comp_idx);
546 ret = -EINVAL;
547 goto done;
548 }
549 /*
550 * We've done all the safety checks that we can up to this point,
551 * "allocate" the request entry.
552 */
553 hfi1_cdbg(SDMA, "[%u:%u:%u] Using req/comp entry %u\n", dd->unit,
554 uctxt->ctxt, subctxt_fp(fp), info.comp_idx);
555 req = pq->reqs + info.comp_idx;
556 memset(req, 0, sizeof(*req));
557 /* Mark the request as IN_USE before we start filling it in. */
558 set_bit(SDMA_REQ_IN_USE, &req->flags);
559 req->data_iovs = req_iovcnt(info.ctrl) - 1;
560 req->pq = pq;
561 req->cq = cq;
562 INIT_LIST_HEAD(&req->txps);
563 spin_lock_init(&req->list_lock);
564 memcpy(&req->info, &info, sizeof(info));
565
566 if (req_opcode(info.ctrl) == EXPECTED)
567 req->data_iovs--;
568
569 if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) {
570 SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs,
571 MAX_VECTORS_PER_REQ);
572 ret = -EINVAL;
573 goto done;
574 }
575 /* Copy the header from the user buffer */
576 ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info),
577 sizeof(req->hdr));
578 if (ret) {
579 SDMA_DBG(req, "Failed to copy header template (%d)", ret);
580 ret = -EFAULT;
581 goto free_req;
582 }
583
584 /* If Static rate control is not enabled, sanitize the header. */
585 if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL))
586 req->hdr.pbc[2] = 0;
587
588 /* Validate the opcode. Do not trust packets from user space blindly. */
589 opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff;
590 if ((opcode & USER_OPCODE_CHECK_MASK) !=
591 USER_OPCODE_CHECK_VAL) {
592 SDMA_DBG(req, "Invalid opcode (%d)", opcode);
593 ret = -EINVAL;
594 goto free_req;
595 }
596 /*
597 * Validate the vl. Do not trust packets from user space blindly.
598 * VL comes from PBC, SC comes from LRH, and the VL needs to
599 * match the SC look up.
600 */
601 vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF;
602 sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) |
603 (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4));
604 if (vl >= dd->pport->vls_operational ||
605 vl != sc_to_vlt(dd, sc)) {
606 SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl);
607 ret = -EINVAL;
608 goto free_req;
609 }
610
611 /*
612 * Also should check the BTH.lnh. If it says the next header is GRH then
613 * the RXE parsing will be off and will land in the middle of the KDETH
614 * or miss it entirely.
615 */
616 if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) {
617 SDMA_DBG(req, "User tried to pass in a GRH");
618 ret = -EINVAL;
619 goto free_req;
620 }
621
622 req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]);
623 /* Calculate the initial TID offset based on the values of
624 KDETH.OFFSET and KDETH.OM that are passed in. */
625 req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
626 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
627 KDETH_OM_LARGE : KDETH_OM_SMALL);
628 SDMA_DBG(req, "Initial TID offset %u", req->tidoffset);
629 idx++;
630
631 /* Save all the IO vector structures */
632 while (i < req->data_iovs) {
633 memcpy(&req->iovs[i].iov, iovec + idx++, sizeof(struct iovec));
634 req->iovs[i].offset = 0;
635 req->data_len += req->iovs[i++].iov.iov_len;
636 }
637 SDMA_DBG(req, "total data length %u", req->data_len);
638
639 if (pcount > req->info.npkts)
640 pcount = req->info.npkts;
641 /*
642 * Copy any TID info
643 * User space will provide the TID info only when the
644 * request type is EXPECTED. This is true even if there is
645 * only one packet in the request and the header is already
646 * setup. The reason for the singular TID case is that the
647 * driver needs to perform safety checks.
648 */
649 if (req_opcode(req->info.ctrl) == EXPECTED) {
650 u16 ntids = iovec[idx].iov_len / sizeof(*req->tids);
651
652 if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) {
653 ret = -EINVAL;
654 goto free_req;
655 }
656 req->tids = kcalloc(ntids, sizeof(*req->tids), GFP_KERNEL);
657 if (!req->tids) {
658 ret = -ENOMEM;
659 goto free_req;
660 }
661 /*
662 * We have to copy all of the tids because they may vary
663 * in size and, therefore, the TID count might not be
664 * equal to the pkt count. However, there is no way to
665 * tell at this point.
666 */
667 ret = copy_from_user(req->tids, iovec[idx].iov_base,
668 ntids * sizeof(*req->tids));
669 if (ret) {
670 SDMA_DBG(req, "Failed to copy %d TIDs (%d)",
671 ntids, ret);
672 ret = -EFAULT;
673 goto free_req;
674 }
675 req->n_tids = ntids;
676 idx++;
677 }
678
679 /* Have to select the engine */
680 req->sde = sdma_select_engine_vl(dd,
681 (u32)(uctxt->ctxt + subctxt_fp(fp)),
682 vl);
683 if (!req->sde || !sdma_running(req->sde)) {
684 ret = -ECOMM;
685 goto free_req;
686 }
687
688 /* We don't need an AHG entry if the request contains only one packet */
689 if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG)) {
690 int ahg = sdma_ahg_alloc(req->sde);
691
692 if (likely(ahg >= 0)) {
693 req->ahg_idx = (u8)ahg;
694 set_bit(SDMA_REQ_HAVE_AHG, &req->flags);
695 }
696 }
697
698 set_comp_state(req, QUEUED, 0);
699 /* Send the first N packets in the request to buy us some time */
700 sent = user_sdma_send_pkts(req, pcount);
701 if (unlikely(sent < 0)) {
702 if (sent != -EBUSY) {
703 ret = sent;
704 goto send_err;
705 } else
706 sent = 0;
707 }
708 atomic_inc(&pq->n_reqs);
709
710 if (sent < req->info.npkts) {
711 /* Take the references to the user's task and mm_struct */
712 get_task_struct(current);
713 req->user_proc = current;
714
715 /*
716 * This is a somewhat blocking send implementation.
717 * The driver will block the caller until all packets of the
718 * request have been submitted to the SDMA engine. However, it
719 * will not wait for send completions.
720 */
721 while (!test_bit(SDMA_REQ_SEND_DONE, &req->flags)) {
722 ret = user_sdma_send_pkts(req, pcount);
723 if (ret < 0) {
724 if (ret != -EBUSY)
725 goto send_err;
726 wait_event_interruptible_timeout(
727 pq->busy.wait_dma,
728 (pq->state == SDMA_PKT_Q_ACTIVE),
729 msecs_to_jiffies(
730 SDMA_IOWAIT_TIMEOUT));
731 }
732 }
733
734 }
735 ret = 0;
736 *count += idx;
737 goto done;
738send_err:
739 set_comp_state(req, ERROR, ret);
740free_req:
741 user_sdma_free_request(req);
742done:
743 return ret;
744}
745
746static inline u32 compute_data_length(struct user_sdma_request *req,
747 struct user_sdma_txreq *tx)
748{
749 /*
750 * Determine the proper size of the packet data.
751 * The size of the data of the first packet is in the header
752 * template. However, it includes the header and ICRC, which need
753 * to be subtracted.
754 * The size of the remaining packets is the minimum of the frag
755 * size (MTU) or remaining data in the request.
756 */
757 u32 len;
758
759 if (!req->seqnum) {
760 len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) -
761 (sizeof(tx->hdr) - 4));
762 } else if (req_opcode(req->info.ctrl) == EXPECTED) {
763 u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) *
764 PAGE_SIZE;
765 /* Get the data length based on the remaining space in the
766 * TID pair. */
767 len = min(tidlen - req->tidoffset, (u32)req->info.fragsize);
768 /* If we've filled up the TID pair, move to the next one. */
769 if (unlikely(!len) && ++req->tididx < req->n_tids &&
770 req->tids[req->tididx]) {
771 tidlen = EXP_TID_GET(req->tids[req->tididx],
772 LEN) * PAGE_SIZE;
773 req->tidoffset = 0;
774 len = min_t(u32, tidlen, req->info.fragsize);
775 }
776 /* Since the TID pairs map entire pages, make sure that we
777 * are not going to try to send more data that we have
778 * remaining. */
779 len = min(len, req->data_len - req->sent);
780 } else
781 len = min(req->data_len - req->sent, (u32)req->info.fragsize);
782 SDMA_DBG(req, "Data Length = %u", len);
783 return len;
784}
785
786static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len)
787{
788 /* (Size of complete header - size of PBC) + 4B ICRC + data length */
789 return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len);
790}
791
792static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts)
793{
794 int ret = 0;
795 unsigned npkts = 0;
796 struct user_sdma_txreq *tx = NULL;
797 struct hfi1_user_sdma_pkt_q *pq = NULL;
798 struct user_sdma_iovec *iovec = NULL;
799
800 if (!req->pq) {
801 ret = -EINVAL;
802 goto done;
803 }
804
805 pq = req->pq;
806
807 /*
808 * Check if we might have sent the entire request already
809 */
810 if (unlikely(req->seqnum == req->info.npkts)) {
811 if (!list_empty(&req->txps))
812 goto dosend;
813 goto done;
814 }
815
816 if (!maxpkts || maxpkts > req->info.npkts - req->seqnum)
817 maxpkts = req->info.npkts - req->seqnum;
818
819 while (npkts < maxpkts) {
820 u32 datalen = 0, queued = 0, data_sent = 0;
821 u64 iov_offset = 0;
822
823 /*
824 * Check whether any of the completions have come back
825 * with errors. If so, we are not going to process any
826 * more packets from this request.
827 */
828 if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) {
829 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
830 ret = -EFAULT;
831 goto done;
832 }
833
834 tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL);
835 if (!tx) {
836 ret = -ENOMEM;
837 goto done;
838 }
839 tx->flags = 0;
840 tx->req = req;
841 tx->busycount = 0;
842 tx->iovec1 = NULL;
843 tx->iovec2 = NULL;
844
845 if (req->seqnum == req->info.npkts - 1)
846 tx->flags |= USER_SDMA_TXREQ_FLAGS_LAST_PKT;
847
848 /*
849 * Calculate the payload size - this is min of the fragment
850 * (MTU) size or the remaining bytes in the request but only
851 * if we have payload data.
852 */
853 if (req->data_len) {
854 iovec = &req->iovs[req->iov_idx];
855 if (ACCESS_ONCE(iovec->offset) == iovec->iov.iov_len) {
856 if (++req->iov_idx == req->data_iovs) {
857 ret = -EFAULT;
858 goto free_txreq;
859 }
860 iovec = &req->iovs[req->iov_idx];
861 WARN_ON(iovec->offset);
862 }
863
864 /*
865 * This request might include only a header and no user
866 * data, so pin pages only if there is data and it the
867 * pages have not been pinned already.
868 */
869 if (unlikely(!iovec->pages && iovec->iov.iov_len)) {
870 ret = pin_vector_pages(req, iovec);
871 if (ret)
872 goto free_tx;
873 }
874
875 tx->iovec1 = iovec;
876 datalen = compute_data_length(req, tx);
877 if (!datalen) {
878 SDMA_DBG(req,
879 "Request has data but pkt len is 0");
880 ret = -EFAULT;
881 goto free_tx;
882 }
883 }
884
885 if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags)) {
886 if (!req->seqnum) {
887 u16 pbclen = le16_to_cpu(req->hdr.pbc[0]);
888 u32 lrhlen = get_lrh_len(req->hdr, datalen);
889 /*
890 * Copy the request header into the tx header
891 * because the HW needs a cacheline-aligned
892 * address.
893 * This copy can be optimized out if the hdr
894 * member of user_sdma_request were also
895 * cacheline aligned.
896 */
897 memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr));
898 if (PBC2LRH(pbclen) != lrhlen) {
899 pbclen = (pbclen & 0xf000) |
900 LRH2PBC(lrhlen);
901 tx->hdr.pbc[0] = cpu_to_le16(pbclen);
902 }
903 ret = sdma_txinit_ahg(&tx->txreq,
904 SDMA_TXREQ_F_AHG_COPY,
905 sizeof(tx->hdr) + datalen,
906 req->ahg_idx, 0, NULL, 0,
907 user_sdma_txreq_cb);
908 if (ret)
909 goto free_tx;
910 ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq,
911 &tx->hdr,
912 sizeof(tx->hdr));
913 if (ret)
914 goto free_txreq;
915 } else {
916 int changes;
917
918 changes = set_txreq_header_ahg(req, tx,
919 datalen);
920 if (changes < 0)
921 goto free_tx;
922 sdma_txinit_ahg(&tx->txreq,
923 SDMA_TXREQ_F_USE_AHG,
924 datalen, req->ahg_idx, changes,
925 req->ahg, sizeof(req->hdr),
926 user_sdma_txreq_cb);
927 }
928 } else {
929 ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
930 datalen, user_sdma_txreq_cb);
931 if (ret)
932 goto free_tx;
933 /*
934 * Modify the header for this packet. This only needs
935 * to be done if we are not going to use AHG. Otherwise,
936 * the HW will do it based on the changes we gave it
937 * during sdma_txinit_ahg().
938 */
939 ret = set_txreq_header(req, tx, datalen);
940 if (ret)
941 goto free_txreq;
942 }
943
944 /*
945 * If the request contains any data vectors, add up to
946 * fragsize bytes to the descriptor.
947 */
948 while (queued < datalen &&
949 (req->sent + data_sent) < req->data_len) {
950 unsigned long base, offset;
951 unsigned pageidx, len;
952
953 base = (unsigned long)iovec->iov.iov_base;
954 offset = ((base + iovec->offset + iov_offset) &
955 ~PAGE_MASK);
956 pageidx = (((iovec->offset + iov_offset +
957 base) - (base & PAGE_MASK)) >> PAGE_SHIFT);
958 len = offset + req->info.fragsize > PAGE_SIZE ?
959 PAGE_SIZE - offset : req->info.fragsize;
960 len = min((datalen - queued), len);
961 ret = sdma_txadd_page(pq->dd, &tx->txreq,
962 iovec->pages[pageidx],
963 offset, len);
964 if (ret) {
965 dd_dev_err(pq->dd,
966 "SDMA txreq add page failed %d\n",
967 ret);
968 iovec_set_complete(iovec);
969 goto free_txreq;
970 }
971 iov_offset += len;
972 queued += len;
973 data_sent += len;
974 if (unlikely(queued < datalen &&
975 pageidx == iovec->npages &&
976 req->iov_idx < req->data_iovs - 1)) {
977 iovec->offset += iov_offset;
978 iovec = &req->iovs[++req->iov_idx];
979 if (!iovec->pages) {
980 ret = pin_vector_pages(req, iovec);
981 if (ret)
982 goto free_txreq;
983 }
984 iov_offset = 0;
985 tx->iovec2 = iovec;
986
987 }
988 }
989 /*
990 * The txreq was submitted successfully so we can update
991 * the counters.
992 */
993 req->koffset += datalen;
994 if (req_opcode(req->info.ctrl) == EXPECTED)
995 req->tidoffset += datalen;
996 req->sent += data_sent;
997 if (req->data_len) {
998 if (tx->iovec1 && !tx->iovec2)
999 tx->iovec1->offset += iov_offset;
1000 else if (tx->iovec2)
1001 tx->iovec2->offset += iov_offset;
1002 }
1003 /*
1004 * It is important to increment this here as it is used to
1005 * generate the BTH.PSN and, therefore, can't be bulk-updated
1006 * outside of the loop.
1007 */
1008 tx->seqnum = req->seqnum++;
1009 list_add_tail(&tx->txreq.list, &req->txps);
1010 npkts++;
1011 }
1012dosend:
1013 ret = sdma_send_txlist(req->sde, &pq->busy, &req->txps);
1014 if (list_empty(&req->txps))
1015 if (req->seqnum == req->info.npkts) {
1016 set_bit(SDMA_REQ_SEND_DONE, &req->flags);
1017 /*
1018 * The txreq has already been submitted to the HW queue
1019 * so we can free the AHG entry now. Corruption will not
1020 * happen due to the sequential manner in which
1021 * descriptors are processed.
1022 */
1023 if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags))
1024 sdma_ahg_free(req->sde, req->ahg_idx);
1025 }
1026 goto done;
1027free_txreq:
1028 sdma_txclean(pq->dd, &tx->txreq);
1029free_tx:
1030 kmem_cache_free(pq->txreq_cache, tx);
1031done:
1032 return ret;
1033}
1034
1035/*
1036 * How many pages in this iovec element?
1037 */
1038static inline int num_user_pages(const struct iovec *iov)
1039{
1040 const unsigned long addr = (unsigned long) iov->iov_base;
1041 const unsigned long len = iov->iov_len;
1042 const unsigned long spage = addr & PAGE_MASK;
1043 const unsigned long epage = (addr + len - 1) & PAGE_MASK;
1044
1045 return 1 + ((epage - spage) >> PAGE_SHIFT);
1046}
1047
1048static int pin_vector_pages(struct user_sdma_request *req,
1049 struct user_sdma_iovec *iovec) {
1050 int ret = 0;
1051 unsigned pinned;
1052
1053 iovec->npages = num_user_pages(&iovec->iov);
1054 iovec->pages = kzalloc(sizeof(*iovec->pages) *
1055 iovec->npages, GFP_KERNEL);
1056 if (!iovec->pages) {
1057 SDMA_DBG(req, "Failed page array alloc");
1058 ret = -ENOMEM;
1059 goto done;
1060 }
1061 /* If called by the kernel thread, use the user's mm */
1062 if (current->flags & PF_KTHREAD)
1063 use_mm(req->user_proc->mm);
1064 pinned = get_user_pages_fast(
1065 (unsigned long)iovec->iov.iov_base,
1066 iovec->npages, 0, iovec->pages);
1067 /* If called by the kernel thread, unuse the user's mm */
1068 if (current->flags & PF_KTHREAD)
1069 unuse_mm(req->user_proc->mm);
1070 if (pinned != iovec->npages) {
1071 SDMA_DBG(req, "Failed to pin pages (%u/%u)", pinned,
1072 iovec->npages);
1073 ret = -EFAULT;
1074 goto pfree;
1075 }
1076 goto done;
1077pfree:
1078 unpin_vector_pages(iovec);
1079done:
1080 return ret;
1081}
1082
1083static void unpin_vector_pages(struct user_sdma_iovec *iovec)
1084{
1085 unsigned i;
1086
1087 if (ACCESS_ONCE(iovec->offset) != iovec->iov.iov_len) {
1088 hfi1_cdbg(SDMA,
1089 "the complete vector has not been sent yet %llu %zu",
1090 iovec->offset, iovec->iov.iov_len);
1091 return;
1092 }
1093 for (i = 0; i < iovec->npages; i++)
1094 if (iovec->pages[i])
1095 put_page(iovec->pages[i]);
1096 kfree(iovec->pages);
1097 iovec->pages = NULL;
1098 iovec->npages = 0;
1099 iovec->offset = 0;
1100}
1101
1102static int check_header_template(struct user_sdma_request *req,
1103 struct hfi1_pkt_header *hdr, u32 lrhlen,
1104 u32 datalen)
1105{
1106 /*
1107 * Perform safety checks for any type of packet:
1108 * - transfer size is multiple of 64bytes
1109 * - packet length is multiple of 4bytes
1110 * - entire request length is multiple of 4bytes
1111 * - packet length is not larger than MTU size
1112 *
1113 * These checks are only done for the first packet of the
1114 * transfer since the header is "given" to us by user space.
1115 * For the remainder of the packets we compute the values.
1116 */
1117 if (req->info.fragsize % PIO_BLOCK_SIZE ||
1118 lrhlen & 0x3 || req->data_len & 0x3 ||
1119 lrhlen > get_lrh_len(*hdr, req->info.fragsize))
1120 return -EINVAL;
1121
1122 if (req_opcode(req->info.ctrl) == EXPECTED) {
1123 /*
1124 * The header is checked only on the first packet. Furthermore,
1125 * we ensure that at least one TID entry is copied when the
1126 * request is submitted. Therefore, we don't have to verify that
1127 * tididx points to something sane.
1128 */
1129 u32 tidval = req->tids[req->tididx],
1130 tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE,
1131 tididx = EXP_TID_GET(tidval, IDX),
1132 tidctrl = EXP_TID_GET(tidval, CTRL),
1133 tidoff;
1134 __le32 kval = hdr->kdeth.ver_tid_offset;
1135
1136 tidoff = KDETH_GET(kval, OFFSET) *
1137 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
1138 KDETH_OM_LARGE : KDETH_OM_SMALL);
1139 /*
1140 * Expected receive packets have the following
1141 * additional checks:
1142 * - offset is not larger than the TID size
1143 * - TIDCtrl values match between header and TID array
1144 * - TID indexes match between header and TID array
1145 */
1146 if ((tidoff + datalen > tidlen) ||
1147 KDETH_GET(kval, TIDCTRL) != tidctrl ||
1148 KDETH_GET(kval, TID) != tididx)
1149 return -EINVAL;
1150 }
1151 return 0;
1152}
1153
1154/*
1155 * Correctly set the BTH.PSN field based on type of
1156 * transfer - eager packets can just increment the PSN but
1157 * expected packets encode generation and sequence in the
1158 * BTH.PSN field so just incrementing will result in errors.
1159 */
1160static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags)
1161{
1162 u32 val = be32_to_cpu(bthpsn),
1163 mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull :
1164 0xffffffull),
1165 psn = val & mask;
1166 if (expct)
1167 psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK);
1168 else
1169 psn = psn + frags;
1170 return psn & mask;
1171}
1172
1173static int set_txreq_header(struct user_sdma_request *req,
1174 struct user_sdma_txreq *tx, u32 datalen)
1175{
1176 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1177 struct hfi1_pkt_header *hdr = &tx->hdr;
1178 u16 pbclen;
1179 int ret;
1180 u32 tidval = 0, lrhlen = get_lrh_len(*hdr, datalen);
1181
1182 /* Copy the header template to the request before modification */
1183 memcpy(hdr, &req->hdr, sizeof(*hdr));
1184
1185 /*
1186 * Check if the PBC and LRH length are mismatched. If so
1187 * adjust both in the header.
1188 */
1189 pbclen = le16_to_cpu(hdr->pbc[0]);
1190 if (PBC2LRH(pbclen) != lrhlen) {
1191 pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
1192 hdr->pbc[0] = cpu_to_le16(pbclen);
1193 hdr->lrh[2] = cpu_to_be16(lrhlen >> 2);
1194 /*
1195 * Third packet
1196 * This is the first packet in the sequence that has
1197 * a "static" size that can be used for the rest of
1198 * the packets (besides the last one).
1199 */
1200 if (unlikely(req->seqnum == 2)) {
1201 /*
1202 * From this point on the lengths in both the
1203 * PBC and LRH are the same until the last
1204 * packet.
1205 * Adjust the template so we don't have to update
1206 * every packet
1207 */
1208 req->hdr.pbc[0] = hdr->pbc[0];
1209 req->hdr.lrh[2] = hdr->lrh[2];
1210 }
1211 }
1212 /*
1213 * We only have to modify the header if this is not the
1214 * first packet in the request. Otherwise, we use the
1215 * header given to us.
1216 */
1217 if (unlikely(!req->seqnum)) {
1218 ret = check_header_template(req, hdr, lrhlen, datalen);
1219 if (ret)
1220 return ret;
1221 goto done;
1222
1223 }
1224
1225 hdr->bth[2] = cpu_to_be32(
1226 set_pkt_bth_psn(hdr->bth[2],
1227 (req_opcode(req->info.ctrl) == EXPECTED),
1228 req->seqnum));
1229
1230 /* Set ACK request on last packet */
1231 if (unlikely(tx->flags & USER_SDMA_TXREQ_FLAGS_LAST_PKT))
1232 hdr->bth[2] |= cpu_to_be32(1UL<<31);
1233
1234 /* Set the new offset */
1235 hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset);
1236 /* Expected packets have to fill in the new TID information */
1237 if (req_opcode(req->info.ctrl) == EXPECTED) {
1238 tidval = req->tids[req->tididx];
1239 /*
1240 * If the offset puts us at the end of the current TID,
1241 * advance everything.
1242 */
1243 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1244 PAGE_SIZE)) {
1245 req->tidoffset = 0;
1246 /* Since we don't copy all the TIDs, all at once,
1247 * we have to check again. */
1248 if (++req->tididx > req->n_tids - 1 ||
1249 !req->tids[req->tididx]) {
1250 return -EINVAL;
1251 }
1252 tidval = req->tids[req->tididx];
1253 }
1254 req->omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >=
1255 KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE : KDETH_OM_SMALL;
1256 /* Set KDETH.TIDCtrl based on value for this TID. */
1257 KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL,
1258 EXP_TID_GET(tidval, CTRL));
1259 /* Set KDETH.TID based on value for this TID */
1260 KDETH_SET(hdr->kdeth.ver_tid_offset, TID,
1261 EXP_TID_GET(tidval, IDX));
1262 /* Clear KDETH.SH only on the last packet */
1263 if (unlikely(tx->flags & USER_SDMA_TXREQ_FLAGS_LAST_PKT))
1264 KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0);
1265 /*
1266 * Set the KDETH.OFFSET and KDETH.OM based on size of
1267 * transfer.
1268 */
1269 SDMA_DBG(req, "TID offset %ubytes %uunits om%u",
1270 req->tidoffset, req->tidoffset / req->omfactor,
1271 !!(req->omfactor - KDETH_OM_SMALL));
1272 KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1273 req->tidoffset / req->omfactor);
1274 KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
1275 !!(req->omfactor - KDETH_OM_SMALL));
1276 }
1277done:
1278 trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,
1279 req->info.comp_idx, hdr, tidval);
1280 return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr));
1281}
1282
1283static int set_txreq_header_ahg(struct user_sdma_request *req,
1284 struct user_sdma_txreq *tx, u32 len)
1285{
1286 int diff = 0;
1287 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1288 struct hfi1_pkt_header *hdr = &req->hdr;
1289 u16 pbclen = le16_to_cpu(hdr->pbc[0]);
1290 u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, len);
1291
1292 if (PBC2LRH(pbclen) != lrhlen) {
1293 /* PBC.PbcLengthDWs */
1294 AHG_HEADER_SET(req->ahg, diff, 0, 0, 12,
1295 cpu_to_le16(LRH2PBC(lrhlen)));
1296 /* LRH.PktLen (we need the full 16 bits due to byte swap) */
1297 AHG_HEADER_SET(req->ahg, diff, 3, 0, 16,
1298 cpu_to_be16(lrhlen >> 2));
1299 }
1300
1301 /*
1302 * Do the common updates
1303 */
1304 /* BTH.PSN and BTH.A */
1305 val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) &
1306 (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
1307 if (unlikely(tx->flags & USER_SDMA_TXREQ_FLAGS_LAST_PKT))
1308 val32 |= 1UL << 31;
1309 AHG_HEADER_SET(req->ahg, diff, 6, 0, 16, cpu_to_be16(val32 >> 16));
1310 AHG_HEADER_SET(req->ahg, diff, 6, 16, 16, cpu_to_be16(val32 & 0xffff));
1311 /* KDETH.Offset */
1312 AHG_HEADER_SET(req->ahg, diff, 15, 0, 16,
1313 cpu_to_le16(req->koffset & 0xffff));
1314 AHG_HEADER_SET(req->ahg, diff, 15, 16, 16,
1315 cpu_to_le16(req->koffset >> 16));
1316 if (req_opcode(req->info.ctrl) == EXPECTED) {
1317 __le16 val;
1318
1319 tidval = req->tids[req->tididx];
1320
1321 /*
1322 * If the offset puts us at the end of the current TID,
1323 * advance everything.
1324 */
1325 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1326 PAGE_SIZE)) {
1327 req->tidoffset = 0;
1328 /* Since we don't copy all the TIDs, all at once,
1329 * we have to check again. */
1330 if (++req->tididx > req->n_tids - 1 ||
1331 !req->tids[req->tididx]) {
1332 return -EINVAL;
1333 }
1334 tidval = req->tids[req->tididx];
1335 }
1336 req->omfactor = ((EXP_TID_GET(tidval, LEN) *
1337 PAGE_SIZE) >=
1338 KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE :
1339 KDETH_OM_SMALL;
1340 /* KDETH.OM and KDETH.OFFSET (TID) */
1341 AHG_HEADER_SET(req->ahg, diff, 7, 0, 16,
1342 ((!!(req->omfactor - KDETH_OM_SMALL)) << 15 |
1343 ((req->tidoffset / req->omfactor) & 0x7fff)));
1344 /* KDETH.TIDCtrl, KDETH.TID */
1345 val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) |
1346 (EXP_TID_GET(tidval, IDX) & 0x3ff));
1347 /* Clear KDETH.SH on last packet */
1348 if (unlikely(tx->flags & USER_SDMA_TXREQ_FLAGS_LAST_PKT)) {
1349 val |= cpu_to_le16(KDETH_GET(hdr->kdeth.ver_tid_offset,
1350 INTR) >> 16);
1351 val &= cpu_to_le16(~(1U << 13));
1352 AHG_HEADER_SET(req->ahg, diff, 7, 16, 14, val);
1353 } else
1354 AHG_HEADER_SET(req->ahg, diff, 7, 16, 12, val);
1355 }
1356
1357 trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
1358 req->info.comp_idx, req->sde->this_idx,
1359 req->ahg_idx, req->ahg, diff, tidval);
1360 return diff;
1361}
1362
1363static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status,
1364 int drain)
1365{
1366 struct user_sdma_txreq *tx =
1367 container_of(txreq, struct user_sdma_txreq, txreq);
1368 struct user_sdma_request *req = tx->req;
1369 struct hfi1_user_sdma_pkt_q *pq = req ? req->pq : NULL;
1370 u64 tx_seqnum;
1371
1372 if (unlikely(!req || !pq))
1373 return;
1374
1375 if (tx->iovec1)
1376 iovec_may_free(tx->iovec1, unpin_vector_pages);
1377 if (tx->iovec2)
1378 iovec_may_free(tx->iovec2, unpin_vector_pages);
1379
1380 tx_seqnum = tx->seqnum;
1381 kmem_cache_free(pq->txreq_cache, tx);
1382
1383 if (status != SDMA_TXREQ_S_OK) {
1384 dd_dev_err(pq->dd, "SDMA completion with error %d", status);
1385 set_comp_state(req, ERROR, status);
1386 set_bit(SDMA_REQ_HAS_ERROR, &req->flags);
1387 /* Do not free the request until the sender loop has ack'ed
1388 * the error and we've seen all txreqs. */
1389 if (tx_seqnum == ACCESS_ONCE(req->seqnum) &&
1390 test_bit(SDMA_REQ_DONE_ERROR, &req->flags)) {
1391 atomic_dec(&pq->n_reqs);
1392 user_sdma_free_request(req);
1393 }
1394 } else {
1395 if (tx_seqnum == req->info.npkts - 1) {
1396 /* We've sent and completed all packets in this
1397 * request. Signal completion to the user */
1398 atomic_dec(&pq->n_reqs);
1399 set_comp_state(req, COMPLETE, 0);
1400 user_sdma_free_request(req);
1401 }
1402 }
1403 if (!atomic_read(&pq->n_reqs))
1404 xchg(&pq->state, SDMA_PKT_Q_INACTIVE);
1405}
1406
1407static void user_sdma_free_request(struct user_sdma_request *req)
1408{
1409 if (!list_empty(&req->txps)) {
1410 struct sdma_txreq *t, *p;
1411
1412 list_for_each_entry_safe(t, p, &req->txps, list) {
1413 struct user_sdma_txreq *tx =
1414 container_of(t, struct user_sdma_txreq, txreq);
1415 list_del_init(&t->list);
1416 sdma_txclean(req->pq->dd, t);
1417 kmem_cache_free(req->pq->txreq_cache, tx);
1418 }
1419 }
1420 if (req->data_iovs) {
1421 int i;
1422
1423 for (i = 0; i < req->data_iovs; i++)
1424 if (req->iovs[i].npages && req->iovs[i].pages)
1425 unpin_vector_pages(&req->iovs[i]);
1426 }
1427 if (req->user_proc)
1428 put_task_struct(req->user_proc);
1429 kfree(req->tids);
1430 clear_bit(SDMA_REQ_IN_USE, &req->flags);
1431}
1432
1433static inline void set_comp_state(struct user_sdma_request *req,
1434 enum hfi1_sdma_comp_state state,
1435 int ret)
1436{
1437 SDMA_DBG(req, "Setting completion status %u %d", state, ret);
1438 req->cq->comps[req->info.comp_idx].status = state;
1439 if (state == ERROR)
1440 req->cq->comps[req->info.comp_idx].errcode = -ret;
1441 trace_hfi1_sdma_user_completion(req->pq->dd, req->pq->ctxt,
1442 req->pq->subctxt, req->info.comp_idx,
1443 state, ret);
1444}
Linux kernel - Deliverables
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