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staging: rtl8188eu: add missing delay in polling loops.
[deliverable/linux.git] / drivers / staging / rtl8188eu / hal / rtl8188e_hal_init.c
CommitLineData
615a4d12
LF		 1/******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20#define _HAL_INIT_C_
21
691dd0b7 22#include <linux/firmware.h>
f42f52aa 23#include <linux/vmalloc.h>
615a4d12
LF		 24#include <drv_types.h>
25#include <rtw_efuse.h>
41b77d26 26#include <phy.h>
615a4d12
LF		 27#include <rtl8188e_hal.h>
28
29#include <rtw_iol.h>
30
ee5f8a43 31void iol_mode_enable(struct adapter *padapter, u8 enable)
615a4d12
LF		 32{
33 u8 reg_0xf0 = 0;
34
35 if (enable) {
36 /* Enable initial offload */
c7b2e995 37 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
e76484d0 38 usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
615a4d12
LF		 39
40 if (!padapter->bFWReady) {
41 DBG_88E("bFWReady == false call reset 8051...\n");
42 _8051Reset88E(padapter);
43 }
44
45 } else {
46 /* disable initial offload */
c7b2e995 47 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
e76484d0 48 usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
615a4d12
LF		 49 }
50}
51
ee5f8a43 52s32 iol_execute(struct adapter *padapter, u8 control)
615a4d12
LF		 53{
54 s32 status = _FAIL;
55 u8 reg_0x88 = 0;
ed737494 56 unsigned long start = 0;
615a4d12
LF		 57
58 control = control&0x0f;
c7b2e995 59 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
e76484d0 60 usb_write8(padapter, REG_HMEBOX_E0, reg_0x88|control);
615a4d12 61
c01fb496 62 start = jiffies;
c7b2e995 63 while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
ed737494 64 jiffies_to_msecs(jiffies - start) < 1000) {
3913c19a 65 udelay(5);
615a4d12
LF		 66 }
67
c7b2e995 68 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
615a4d12
LF		 69 status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
70 if (reg_0x88 & control<<4)
71 status = _FAIL;
72 return status;
73}
74
75static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
76{
77 s32 rst = _SUCCESS;
78 iol_mode_enable(padapter, 1);
e76484d0 79 usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
615a4d12
LF		 80 rst = iol_execute(padapter, CMD_INIT_LLT);
81 iol_mode_enable(padapter, 0);
82 return rst;
83}
84
615a4d12
LF		 85
86s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
87{
88 s32 result = _SUCCESS;
89
90 DBG_88E("==> %s\n", __func__);
91 if (rtw_IOL_applied(padapter)) {
92 iol_mode_enable(padapter, 1);
93 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
94 if (result == _SUCCESS)
95 result = iol_execute(padapter, CMD_EFUSE_PATCH);
96
97 iol_mode_enable(padapter, 0);
98 }
99 return result;
100}
101
615a4d12
LF		 102#define MAX_REG_BOLCK_SIZE 196
103
615a4d12
LF		 104void _8051Reset88E(struct adapter *padapter)
105{
106 u8 u1bTmp;
107
c7b2e995 108 u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1);
9c68ed09
AB		 109 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT(2)));
110 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT(2)));
615a4d12
LF		 111 DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
112}
113
615a4d12
LF		 114void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
115{
116 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
117
118 /* Init Fw LPS related. */
119 padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
120
121 /* Init H2C counter. by tynli. 2009.12.09. */
122 pHalData->LastHMEBoxNum = 0;
123}
124
125static void rtl8188e_free_hal_data(struct adapter *padapter)
126{
615a4d12
LF		 127 kfree(padapter->HalData);
128 padapter->HalData = NULL;
615a4d12
LF		 129}
130
4221844a 131static void ReadChipVersion8188E(struct adapter *padapter)
615a4d12
LF		 132{
133 u32 value32;
134 struct HAL_VERSION ChipVersion;
135 struct hal_data_8188e *pHalData;
136
137 pHalData = GET_HAL_DATA(padapter);
138
99ecfb06 139 value32 = usb_read32(padapter, REG_SYS_CFG);
615a4d12 140 ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
615a4d12
LF		 141 ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
142 ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
143
615a4d12
LF		 144 dump_chip_info(ChipVersion);
145
146 pHalData->VersionID = ChipVersion;
3c71dd6c
JS		 147 pHalData->rf_type = RF_1T1R;
148 pHalData->NumTotalRFPath = 1;
615a4d12
LF		 149
150 MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
615a4d12
LF		 151}
152
615a4d12
LF		 153static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
154{
155 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
156 struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
157 switch (eVariable) {
158 case HAL_ODM_STA_INFO:
159 {
08a3d85a 160 struct sta_info *psta = pValue1;
8b21696c 161
615a4d12
LF		 162 if (bSet) {
163 DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
164 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
165 ODM_RAInfo_Init(podmpriv, psta->mac_id);
166 } else {
167 DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
168 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
169 }
170 }
171 break;
172 case HAL_ODM_P2P_STATE:
173 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
174 break;
175 case HAL_ODM_WIFI_DISPLAY_STATE:
176 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
177 break;
178 default:
179 break;
180 }
181}
182
615a4d12
LF		 183static void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
184{
185 if (enable) {
186 DBG_88E("Enable notch filter\n");
9c68ed09 187 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT(1));
615a4d12
LF		 188 } else {
189 DBG_88E("Disable notch filter\n");
9c68ed09 190 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT(1));
615a4d12
LF		 191 }
192}
193void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
194{
195 pHalFunc->free_hal_data = &rtl8188e_free_hal_data;
196
197 pHalFunc->dm_init = &rtl8188e_init_dm_priv;
615a4d12 198
4221844a 199 pHalFunc->read_chip_version = &ReadChipVersion8188E;
615a4d12 200
5f6a5cdb 201 pHalFunc->set_bwmode_handler = &phy_set_bw_mode;
ba50fbc0 202 pHalFunc->set_channel_handler = &phy_sw_chnl;
615a4d12
LF		 203
204 pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog;
205
206 pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid;
615a4d12
LF		 207
208 pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E;
209 pHalFunc->AntDivCompareHandler = &AntDivCompare8188E;
41b77d26 210 pHalFunc->read_rfreg = &phy_query_rf_reg;
615a4d12 211
615a4d12 212 pHalFunc->sreset_init_value = &sreset_init_value;
615a4d12
LF		 213 pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status;
214
615a4d12
LF		 215 pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar;
216
615a4d12
LF		 217 pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
218}
219
615a4d12
LF		 220/* */
221/* */
222/* LLT R/W/Init function */
223/* */
224/* */
225static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
226{
227 s32 status = _SUCCESS;
228 s32 count = 0;
229 u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
230 u16 LLTReg = REG_LLT_INIT;
231
fc158079 232 usb_write32(padapter, LLTReg, value);
615a4d12
LF		 233
234 /* polling */
235 do {
99ecfb06 236 value = usb_read32(padapter, LLTReg);
615a4d12
LF		 237 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
238 break;
239
240 if (count > POLLING_LLT_THRESHOLD) {
241 RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address));
242 status = _FAIL;
243 break;
244 }
3913c19a 245 udelay(5);
615a4d12
LF		 246 } while (count++);
247
248 return status;
249}
250
251s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
252{
253 s32 status = _FAIL;
254 u32 i;
255 u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */
256
257 if (rtw_IOL_applied(padapter)) {
258 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
259 } else {
260 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
261 status = _LLTWrite(padapter, i, i + 1);
262 if (_SUCCESS != status)
263 return status;
264 }
265
266 /* end of list */
267 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
268 if (_SUCCESS != status)
269 return status;
270
271 /* Make the other pages as ring buffer */
272 /* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
273 /* Otherwise used as local loopback buffer. */
274 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
275 status = _LLTWrite(padapter, i, (i + 1));
276 if (_SUCCESS != status)
277 return status;
278 }
279
280 /* Let last entry point to the start entry of ring buffer */
281 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
282 if (_SUCCESS != status) {
283 return status;
284 }
285 }
286
287 return status;
288}
289
290void
291Hal_InitPGData88E(struct adapter *padapter)
292{
293 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
294
295 if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */
296 if (!is_boot_from_eeprom(padapter)) {
297 /* Read EFUSE real map to shadow. */
b0d255c7 298 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
615a4d12
LF		 299 }
300 } else {/* autoload fail */
301 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
302 /* update to default value 0xFF */
303 if (!is_boot_from_eeprom(padapter))
b0d255c7 304 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
615a4d12
LF		 305 }
306}
307
308void
309Hal_EfuseParseIDCode88E(
310 struct adapter *padapter,
311 u8 *hwinfo
312 )
313{
314 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
315 u16 EEPROMId;
316
317 /* Checl 0x8129 again for making sure autoload status!! */
318 EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
319 if (EEPROMId != RTL_EEPROM_ID) {
320 DBG_88E("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
321 pEEPROM->bautoload_fail_flag = true;
322 } else {
323 pEEPROM->bautoload_fail_flag = false;
324 }
325
326 DBG_88E("EEPROM ID = 0x%04x\n", EEPROMId);
327}
328
329static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
330{
331 u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
332
1ce39848 333 memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
615a4d12
LF		 334
335 if (AutoLoadFail) {
336 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
337 /* 2.4G default value */
338 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
339 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
340 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
341 }
342 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
343 if (TxCount == 0) {
344 pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
345 pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
346 } else {
347 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
348 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
349 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
350 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
351 }
352 }
353 }
354 return;
355 }
356
357 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
358 /* 2.4G default value */
359 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
360 pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++];
361 if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
362 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
363 }
364 for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
365 pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++];
366 if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
367 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
368 }
369 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
370 if (TxCount == 0) {
371 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
372 if (PROMContent[eeAddr] == 0xFF) {
373 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
374 } else {
375 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
9c68ed09 376 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 377 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
378 }
379
380 if (PROMContent[eeAddr] == 0xFF) {
381 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF;
382 } else {
383 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
9c68ed09 384 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 385 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
386 }
387 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
388 eeAddr++;
389 } else {
390 if (PROMContent[eeAddr] == 0xFF) {
391 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
392 } else {
393 pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
9c68ed09 394 if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 395 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
396 }
397
398 if (PROMContent[eeAddr] == 0xFF) {
399 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
400 } else {
401 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
9c68ed09 402 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 403 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
404 }
405 eeAddr++;
406
407 if (PROMContent[eeAddr] == 0xFF) {
408 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
409 } else {
410 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
9c68ed09 411 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 412 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
413 }
414
415 if (PROMContent[eeAddr] == 0xFF) {
416 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
417 } else {
418 pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
9c68ed09 419 if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 420 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
421 }
422 eeAddr++;
423 }
424 }
425 }
426}
427
428static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup)
429{
430 u8 bIn24G = true;
431
432 if (chnl <= 14) {
433 bIn24G = true;
434
5e809e50 435 if (chnl < 3) /* Channel 1-2 */
615a4d12
LF		 436 *pGroup = 0;
437 else if (chnl < 6) /* Channel 3-5 */
438 *pGroup = 1;
439 else if (chnl < 9) /* Channel 6-8 */
440 *pGroup = 2;
441 else if (chnl < 12) /* Channel 9-11 */
442 *pGroup = 3;
443 else if (chnl < 14) /* Channel 12-13 */
444 *pGroup = 4;
445 else if (chnl == 14) /* Channel 14 */
446 *pGroup = 5;
447 } else {
32b5844e
IS		 448
449 /* probably, this branch is suitable only for 5 GHz */
450
615a4d12
LF		 451 bIn24G = false;
452
453 if (chnl <= 40)
454 *pGroup = 0;
455 else if (chnl <= 48)
456 *pGroup = 1;
457 else if (chnl <= 56)
458 *pGroup = 2;
459 else if (chnl <= 64)
460 *pGroup = 3;
461 else if (chnl <= 104)
462 *pGroup = 4;
463 else if (chnl <= 112)
464 *pGroup = 5;
465 else if (chnl <= 120)
466 *pGroup = 5;
467 else if (chnl <= 128)
468 *pGroup = 6;
469 else if (chnl <= 136)
470 *pGroup = 7;
471 else if (chnl <= 144)
472 *pGroup = 8;
473 else if (chnl <= 153)
474 *pGroup = 9;
475 else if (chnl <= 161)
476 *pGroup = 10;
477 else if (chnl <= 177)
478 *pGroup = 11;
479 }
480 return bIn24G;
481}
482
483void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
484{
485 if (AutoLoadFail) {
486 padapter->pwrctrlpriv.bHWPowerdown = false;
487 padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
488 } else {
489 /* hw power down mode selection , 0:rf-off / 1:power down */
490
491 if (padapter->registrypriv.hwpdn_mode == 2)
9c68ed09 492 padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
615a4d12
LF		 493 else
494 padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
495
496 /* decide hw if support remote wakeup function */
497 /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
9c68ed09 498 padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
615a4d12
LF		 499
500 DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
501 padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown , padapter->pwrctrlpriv.bSupportRemoteWakeup);
502
503 DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
504 }
505}
506
507void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
508{
509 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
510 struct txpowerinfo24g pwrInfo24G;
511 u8 rfPath, ch, group;
512 u8 bIn24G, TxCount;
513
514 Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
515
516 if (!AutoLoadFail)
517 pHalData->bTXPowerDataReadFromEEPORM = true;
518
519 for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
1ad866e7 520 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
615a4d12
LF		 521 bIn24G = Hal_GetChnlGroup88E(ch, &group);
522 if (bIn24G) {
523 pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
524 if (ch == 14)
525 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
526 else
527 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
528 }
529 if (bIn24G) {
530 DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
531 DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_CCK_Base[rfPath][ch]);
532 DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_BW40_Base[rfPath][ch]);
533 }
534 }
535 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
536 pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
537 pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
538 pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
539 pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
540 DBG_88E("======= TxCount %d =======\n", TxCount);
541 DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
542 DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
543 DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
544 DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
545 }
546 }
547
548 /* 2010/10/19 MH Add Regulator recognize for CU. */
549 if (!AutoLoadFail) {
550 pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); /* bit0~2 */
551 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
552 pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
553 } else {
554 pHalData->EEPROMRegulatory = 0;
555 }
556 DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
557}
558
559void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
560{
561 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
562
563 if (!AutoLoadFail) {
564 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
565 if (pHalData->CrystalCap == 0xFF)
566 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
567 } else {
568 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
569 }
570 DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
571}
572
573void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
574{
575 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
576
577 if (!AutoLoadFail)
07add2d3
AM		 578 pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
579 & 0xE0) >> 5;
615a4d12
LF		 580 else
581 pHalData->BoardType = 0;
582 DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
583}
584
585void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
586{
587 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
588
589 if (!AutoLoadFail) {
590 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
591 if (pHalData->EEPROMVersion == 0xFF)
592 pHalData->EEPROMVersion = EEPROM_Default_Version;
593 } else {
594 pHalData->EEPROMVersion = 1;
595 }
596 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
597 ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
598 pHalData->EEPROMVersion));
599}
600
601void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
602{
603 padapter->mlmepriv.ChannelPlan =
604 hal_com_get_channel_plan(padapter,
605 hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
606 padapter->registrypriv.channel_plan,
607 RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
608
609 DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
610}
611
612void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
613{
614 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
615
616 if (!AutoLoadFail) {
617 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
618 } else {
619 pHalData->EEPROMCustomerID = 0;
620 pHalData->EEPROMSubCustomerID = 0;
621 }
622 DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
623}
624
625void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
626{
627 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
628 struct registry_priv *registry_par = &pAdapter->registrypriv;
629
630 if (!AutoLoadFail) {
631 /* Antenna Diversity setting. */
632 if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */
633 pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
634 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
74772fcf 635 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;
615a4d12
LF		 636 } else {
637 pHalData->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, 2:By EFUSE */
638 }
639
640 if (registry_par->antdiv_type == 0) {
641 /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
642 pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
643 if (pHalData->TRxAntDivType == 0xFF)
644 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
645 } else {
646 pHalData->TRxAntDivType = registry_par->antdiv_type;
647 }
648
649 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
650 pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */
651 } else {
652 pHalData->AntDivCfg = 0;
653 pHalData->TRxAntDivType = pHalData->TRxAntDivType; /* The value in the driver setting of device manager. */
654 }
655 DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
656}
657
658void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
659{
660 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
661
662 /* ThermalMeter from EEPROM */
663 if (!AutoloadFail)
664 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
665 else
666 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
667
668 if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
669 pHalData->bAPKThermalMeterIgnore = true;
670 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
671 }
672 DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
673}
Linux kernel - Deliverables
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