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staging: rtl8192e: Delete dead and commented out code
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8190P / RTL8192E
4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
ecdfa446
GKH		 27
28#undef LOOP_TEST
29#undef RX_DONT_PASS_UL
30#undef DEBUG_EPROM
31#undef DEBUG_RX_VERBOSE
32#undef DUMMY_RX
33#undef DEBUG_ZERO_RX
34#undef DEBUG_RX_SKB
35#undef DEBUG_TX_FRAG
36#undef DEBUG_RX_FRAG
37#undef DEBUG_TX_FILLDESC
38#undef DEBUG_TX
39#undef DEBUG_IRQ
40#undef DEBUG_RX
41#undef DEBUG_RXALLOC
42#undef DEBUG_REGISTERS
43#undef DEBUG_RING
44#undef DEBUG_IRQ_TASKLET
45#undef DEBUG_TX_ALLOC
46#undef DEBUG_TX_DESC
47
48//#define CONFIG_RTL8192_IO_MAP
3d14b518 49#include <linux/vmalloc.h>
5a0e3ad6 50#include <linux/slab.h>
ecdfa446
GKH		 51#include <asm/uaccess.h>
52#include "r8192E_hw.h"
53#include "r8192E.h"
54#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
55#include "r8180_93cx6.h" /* Card EEPROM */
56#include "r8192E_wx.h"
57#include "r819xE_phy.h" //added by WB 4.30.2008
58#include "r819xE_phyreg.h"
59#include "r819xE_cmdpkt.h"
60#include "r8192E_dm.h"
ecdfa446 61
bebdf809 62#ifdef CONFIG_PM
ecdfa446
GKH		 63#include "r8192_pm.h"
64#endif
65
66#ifdef ENABLE_DOT11D
65a43784 67#include "ieee80211/dot11d.h"
ecdfa446
GKH		 68#endif
69
70//set here to open your trace code. //WB
207b58fb 71u32 rt_global_debug_component =
ecdfa446
GKH		 72 // COMP_INIT |
73 // COMP_EPROM |
74 // COMP_PHY |
75 // COMP_RF |
65a43784 76// COMP_FIRMWARE |
ecdfa446
GKH		 77 // COMP_TRACE |
78 // COMP_DOWN |
79 // COMP_SWBW |
80 // COMP_SEC |
81// COMP_QOS |
82// COMP_RATE |
83 // COMP_RECV |
84 // COMP_SEND |
85 // COMP_POWER |
86 // COMP_EVENTS |
87 // COMP_RESET |
88 // COMP_CMDPKT |
89 // COMP_POWER_TRACKING |
90 // COMP_INTR |
91 COMP_ERR ; //always open err flags on
cf3d3d38 92
881a975b 93static const struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
ecdfa446
GKH		 94#ifdef RTL8190P
95 /* Realtek */
96 /* Dlink */
97 { PCI_DEVICE(0x10ec, 0x8190) },
98 /* Corega */
99 { PCI_DEVICE(0x07aa, 0x0045) },
100 { PCI_DEVICE(0x07aa, 0x0046) },
101#else
102 /* Realtek */
103 { PCI_DEVICE(0x10ec, 0x8192) },
104
105 /* Corega */
106 { PCI_DEVICE(0x07aa, 0x0044) },
107 { PCI_DEVICE(0x07aa, 0x0047) },
108#endif
109 {}
110};
111
dca41306 112static char ifname[IFNAMSIZ] = "wlan%d";
ecdfa446
GKH		 113static int hwwep = 1; //default use hw. set 0 to use software security
114static int channels = 0x3fff;
115
116MODULE_LICENSE("GPL");
ecdfa446 117MODULE_VERSION("V 1.1");
ecdfa446
GKH		 118MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
119//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
120MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
121
ecdfa446 122
dca41306 123module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
ecdfa446
GKH		 124//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
125module_param(hwwep,int, S_IRUGO|S_IWUSR);
126module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 127
128MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
129//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
130MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
131MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
132
133static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
134 const struct pci_device_id *id);
135static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
136
137static struct pci_driver rtl8192_pci_driver = {
138 .name = RTL819xE_MODULE_NAME, /* Driver name */
139 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
140 .probe = rtl8192_pci_probe, /* probe fn */
141 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
bebdf809 142#ifdef CONFIG_PM
ecdfa446
GKH		 143 .suspend = rtl8192E_suspend, /* PM suspend fn */
144 .resume = rtl8192E_resume, /* PM resume fn */
145#else
146 .suspend = NULL, /* PM suspend fn */
147 .resume = NULL, /* PM resume fn */
148#endif
ecdfa446
GKH		 149};
150
559fba5e
MM		 151static void rtl8192_start_beacon(struct net_device *dev);
152static void rtl8192_stop_beacon(struct net_device *dev);
153static void rtl819x_watchdog_wqcallback(struct work_struct *work);
154static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
155static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
156static void rtl8192_prepare_beacon(struct r8192_priv *priv);
157static irqreturn_t rtl8192_interrupt(int irq, void *netdev);
158static void rtl8192_try_wake_queue(struct net_device *dev, int pri);
881a975b 159static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb);
5b3b1a7b
MM		 160static void rtl8192_update_ratr_table(struct net_device* dev);
161static void rtl8192_restart(struct work_struct *work);
162static void watch_dog_timer_callback(unsigned long data);
163static int _rtl8192_up(struct net_device *dev);
164static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
559fba5e 165
ecdfa446
GKH		 166#ifdef ENABLE_DOT11D
167
168typedef struct _CHANNEL_LIST
169{
170 u8 Channel[32];
171 u8 Len;
172}CHANNEL_LIST, *PCHANNEL_LIST;
173
ab2161a0 174static const CHANNEL_LIST ChannelPlan[] = {
ecdfa446
GKH		 175 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
176 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
177 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
178 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
179 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
180 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
181 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
182 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
183 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
184 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
185 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
186};
187
188static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
189{
190 int i, max_chan=-1, min_chan=-1;
191 struct ieee80211_device* ieee = priv->ieee80211;
192 switch (channel_plan)
193 {
194 case COUNTRY_CODE_FCC:
195 case COUNTRY_CODE_IC:
196 case COUNTRY_CODE_ETSI:
197 case COUNTRY_CODE_SPAIN:
198 case COUNTRY_CODE_FRANCE:
199 case COUNTRY_CODE_MKK:
200 case COUNTRY_CODE_MKK1:
201 case COUNTRY_CODE_ISRAEL:
202 case COUNTRY_CODE_TELEC:
203 case COUNTRY_CODE_MIC:
204 {
205 Dot11d_Init(ieee);
206 ieee->bGlobalDomain = false;
207 //acturally 8225 & 8256 rf chip only support B,G,24N mode
208 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256))
209 {
210 min_chan = 1;
211 max_chan = 14;
212 }
213 else
214 {
215 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
216 }
217 if (ChannelPlan[channel_plan].Len != 0){
218 // Clear old channel map
219 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
220 // Set new channel map
221 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
222 {
223 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
224 break;
225 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
226 }
227 }
228 break;
229 }
230 case COUNTRY_CODE_GLOBAL_DOMAIN:
231 {
232 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
233 Dot11d_Reset(ieee);
234 ieee->bGlobalDomain = true;
235 break;
236 }
237 default:
238 break;
239 }
240}
241#endif
242
243
244#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
245/* 2007/07/25 MH Defien temp tx fw info. */
5e1ad18a 246static TX_FWINFO_T Tmp_TxFwInfo;
ecdfa446
GKH		 247
248
249#define rx_hal_is_cck_rate(_pdrvinfo)\
250 (_pdrvinfo->RxRate == DESC90_RATE1M ||\
251 _pdrvinfo->RxRate == DESC90_RATE2M ||\
252 _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
253 _pdrvinfo->RxRate == DESC90_RATE11M) &&\
254 !_pdrvinfo->RxHT\
255
256
257void CamResetAllEntry(struct net_device *dev)
258{
259 //u8 ucIndex;
260 u32 ulcommand = 0;
261
262#if 1
263 ulcommand |= BIT31|BIT30;
264 write_nic_dword(dev, RWCAM, ulcommand);
265#else
266 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
267 CAM_mark_invalid(dev, ucIndex);
268 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
269 CAM_empty_entry(dev, ucIndex);
270#endif
271}
272
273
274void write_cam(struct net_device *dev, u8 addr, u32 data)
275{
276 write_nic_dword(dev, WCAMI, data);
277 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
278}
279u32 read_cam(struct net_device *dev, u8 addr)
280{
281 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
282 return read_nic_dword(dev, 0xa8);
283}
284
285////////////////////////////////////////////////////////////
286#ifdef CONFIG_RTL8180_IO_MAP
287
288u8 read_nic_byte(struct net_device *dev, int x)
289{
290 return 0xff&inb(dev->base_addr +x);
291}
292
293u32 read_nic_dword(struct net_device *dev, int x)
294{
295 return inl(dev->base_addr +x);
296}
297
298u16 read_nic_word(struct net_device *dev, int x)
299{
300 return inw(dev->base_addr +x);
301}
302
303void write_nic_byte(struct net_device *dev, int x,u8 y)
304{
305 outb(y&0xff,dev->base_addr +x);
306}
307
308void write_nic_word(struct net_device *dev, int x,u16 y)
309{
310 outw(y,dev->base_addr +x);
311}
312
313void write_nic_dword(struct net_device *dev, int x,u32 y)
314{
315 outl(y,dev->base_addr +x);
316}
317
318#else /* RTL_IO_MAP */
319
320u8 read_nic_byte(struct net_device *dev, int x)
321{
322 return 0xff&readb((u8*)dev->mem_start +x);
323}
324
325u32 read_nic_dword(struct net_device *dev, int x)
326{
327 return readl((u8*)dev->mem_start +x);
328}
329
330u16 read_nic_word(struct net_device *dev, int x)
331{
332 return readw((u8*)dev->mem_start +x);
333}
334
335void write_nic_byte(struct net_device *dev, int x,u8 y)
336{
337 writeb(y,(u8*)dev->mem_start +x);
338 udelay(20);
339}
340
341void write_nic_dword(struct net_device *dev, int x,u32 y)
342{
343 writel(y,(u8*)dev->mem_start +x);
344 udelay(20);
345}
346
347void write_nic_word(struct net_device *dev, int x,u16 y)
348{
349 writew(y,(u8*)dev->mem_start +x);
350 udelay(20);
351}
352
353#endif /* RTL_IO_MAP */
354
65a43784 355u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
356{
357 //struct r8192_priv* priv = ieee80211_priv(dev);
358 //struct ieee80211_device *ieee = priv->ieee80211;
359
4a533365
MM		 360 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
361 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 362 int wpa_ie_len= ieee->wpa_ie_len;
363 struct ieee80211_crypt_data* crypt;
364 int encrypt;
365
366 crypt = ieee->crypt[ieee->tx_keyidx];
367
207b58fb
MM		 368 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
369 (ieee->host_encrypt && crypt && crypt->ops &&
65a43784 370 (0 == strcmp(crypt->ops->name,"WEP")));
371
372 /* simply judge */
373 if(encrypt && (wpa_ie_len == 0)) {
374 // wep encryption, no N mode setting */
375 return SEC_ALG_WEP;
376 } else if((wpa_ie_len != 0)) {
377 // parse pairwise key type */
378 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
379 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
380 return SEC_ALG_CCMP;
381 else
382 return SEC_ALG_TKIP;
383 } else {
384 return SEC_ALG_NONE;
385 }
386}
387
388void
389rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
390{
391 struct r8192_priv* priv = ieee80211_priv(dev);
392
393 switch(variable)
394 {
395
396 case HW_VAR_BSSID:
397 write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]);
398 write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]);
399 break;
400
401 case HW_VAR_MEDIA_STATUS:
402 {
403 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
404 //LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
405 u8 btMsr = read_nic_byte(dev, MSR);
406
407 btMsr &= 0xfc;
408
409 switch(OpMode)
410 {
411 case RT_OP_MODE_INFRASTRUCTURE:
412 btMsr |= MSR_INFRA;
413 //LedAction = LED_CTL_LINK;
414 break;
415
416 case RT_OP_MODE_IBSS:
417 btMsr |= MSR_ADHOC;
935e99fb 418 // led link set separate
65a43784 419 break;
420
421 case RT_OP_MODE_AP:
422 btMsr |= MSR_AP;
423 //LedAction = LED_CTL_LINK;
424 break;
425
426 default:
427 btMsr |= MSR_NOLINK;
428 break;
429 }
430
431 write_nic_byte(dev, MSR, btMsr);
432
433 //priv->ieee80211->LedControlHandler(dev, LedAction);
434 }
435 break;
436
437 case HW_VAR_CECHK_BSSID:
438 {
439 u32 RegRCR, Type;
440
441 Type = ((u8*)(val))[0];
442 //priv->ieee80211->GetHwRegHandler(dev, HW_VAR_RCR, (u8*)(&RegRCR));
443 RegRCR = read_nic_dword(dev,RCR);
444 priv->ReceiveConfig = RegRCR;
445
446 if (Type == true)
447 RegRCR |= (RCR_CBSSID);
448 else if (Type == false)
449 RegRCR &= (~RCR_CBSSID);
450
451 //priv->ieee80211->SetHwRegHandler( dev, HW_VAR_RCR, (u8*)(&RegRCR) );
452 write_nic_dword(dev, RCR,RegRCR);
453 priv->ReceiveConfig = RegRCR;
454
455 }
456 break;
457
458 case HW_VAR_SLOT_TIME:
459 {
460 //PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos;
461 //AC_CODING eACI;
462
463 priv->slot_time = val[0];
464 write_nic_byte(dev, SLOT_TIME, val[0]);
465
466 }
467 break;
468
469 case HW_VAR_ACK_PREAMBLE:
470 {
471 u32 regTmp = 0;
472 priv->short_preamble = (bool)(*(u8*)val );
473 regTmp = priv->basic_rate;
474 if (priv->short_preamble)
475 regTmp |= BRSR_AckShortPmb;
476 write_nic_dword(dev, RRSR, regTmp);
477 }
478 break;
479
480 case HW_VAR_CPU_RST:
481 write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]);
482 break;
483
484 default:
485 break;
486 }
487
488}
489
ecdfa446
GKH		 490
491///////////////////////////////////////////////////////////
492
493//u8 read_phy_cck(struct net_device *dev, u8 adr);
494//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
495/* this might still called in what was the PHY rtl8185/rtl8192 common code
496 * plans are to possibilty turn it again in one common code...
497 */
559fba5e 498void force_pci_posting(struct net_device *dev)
ecdfa446
GKH		 499{
500}
501
502
ecdfa446 503//void rtl8192_rq_tx_ack(struct work_struct *work);
ecdfa446 504
ecdfa446
GKH		 505/****************************************************************************
506 -----------------------------PROCFS STUFF-------------------------
507*****************************************************************************/
508
509static struct proc_dir_entry *rtl8192_proc = NULL;
510
511
512
513static int proc_get_stats_ap(char *page, char **start,
514 off_t offset, int count,
515 int *eof, void *data)
516{
517 struct net_device *dev = data;
518 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
519 struct ieee80211_device *ieee = priv->ieee80211;
520 struct ieee80211_network *target;
521
522 int len = 0;
523
524 list_for_each_entry(target, &ieee->network_list, list) {
525
526 len += snprintf(page + len, count - len,
527 "%s ", target->ssid);
528
529 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
530 len += snprintf(page + len, count - len,
531 "WPA\n");
532 }
533 else{
534 len += snprintf(page + len, count - len,
535 "non_WPA\n");
536 }
537
538 }
539
540 *eof = 1;
541 return len;
542}
543
544static int proc_get_registers(char *page, char **start,
545 off_t offset, int count,
546 int *eof, void *data)
547{
548 struct net_device *dev = data;
549// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
550
551 int len = 0;
552 int i,n;
553
554 int max=0xff;
555
556 /* This dump the current register page */
557 len += snprintf(page + len, count - len,
558 "\n####################page 0##################\n ");
559
560 for(n=0;n<=max;)
561 {
562 //printk( "\nD: %2x> ", n);
563 len += snprintf(page + len, count - len,
564 "\nD: %2x > ",n);
565
566 for(i=0;i<16 && n<=max;i++,n++)
567 len += snprintf(page + len, count - len,
568 "%2x ",read_nic_byte(dev,n));
569
570 // printk("%2x ",read_nic_byte(dev,n));
571 }
572 len += snprintf(page + len, count - len,"\n");
573 len += snprintf(page + len, count - len,
574 "\n####################page 1##################\n ");
575 for(n=0;n<=max;)
576 {
577 //printk( "\nD: %2x> ", n);
578 len += snprintf(page + len, count - len,
579 "\nD: %2x > ",n);
580
581 for(i=0;i<16 && n<=max;i++,n++)
582 len += snprintf(page + len, count - len,
583 "%2x ",read_nic_byte(dev,0x100|n));
584
585 // printk("%2x ",read_nic_byte(dev,n));
586 }
587
588 len += snprintf(page + len, count - len,
589 "\n####################page 3##################\n ");
590 for(n=0;n<=max;)
591 {
592 //printk( "\nD: %2x> ", n);
593 len += snprintf(page + len, count - len,
594 "\nD: %2x > ",n);
595
596 for(i=0;i<16 && n<=max;i++,n++)
597 len += snprintf(page + len, count - len,
598 "%2x ",read_nic_byte(dev,0x300|n));
599
600 // printk("%2x ",read_nic_byte(dev,n));
601 }
602
603
604 *eof = 1;
605 return len;
606
607}
608
609
ecdfa446
GKH		 610
611static int proc_get_stats_tx(char *page, char **start,
612 off_t offset, int count,
613 int *eof, void *data)
614{
615 struct net_device *dev = data;
616 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
617
618 int len = 0;
619
620 len += snprintf(page + len, count - len,
621 "TX VI priority ok int: %lu\n"
622// "TX VI priority error int: %lu\n"
623 "TX VO priority ok int: %lu\n"
624// "TX VO priority error int: %lu\n"
625 "TX BE priority ok int: %lu\n"
626// "TX BE priority error int: %lu\n"
627 "TX BK priority ok int: %lu\n"
628// "TX BK priority error int: %lu\n"
629 "TX MANAGE priority ok int: %lu\n"
630// "TX MANAGE priority error int: %lu\n"
631 "TX BEACON priority ok int: %lu\n"
632 "TX BEACON priority error int: %lu\n"
633 "TX CMDPKT priority ok int: %lu\n"
634// "TX high priority ok int: %lu\n"
635// "TX high priority failed error int: %lu\n"
636// "TX queue resume: %lu\n"
637 "TX queue stopped?: %d\n"
638 "TX fifo overflow: %lu\n"
639// "TX beacon: %lu\n"
640// "TX VI queue: %d\n"
641// "TX VO queue: %d\n"
642// "TX BE queue: %d\n"
643// "TX BK queue: %d\n"
644// "TX HW queue: %d\n"
645// "TX VI dropped: %lu\n"
646// "TX VO dropped: %lu\n"
647// "TX BE dropped: %lu\n"
648// "TX BK dropped: %lu\n"
649 "TX total data packets %lu\n"
650 "TX total data bytes :%lu\n",
651// "TX beacon aborted: %lu\n",
652 priv->stats.txviokint,
653// priv->stats.txvierr,
654 priv->stats.txvookint,
655// priv->stats.txvoerr,
656 priv->stats.txbeokint,
657// priv->stats.txbeerr,
658 priv->stats.txbkokint,
659// priv->stats.txbkerr,
660 priv->stats.txmanageokint,
661// priv->stats.txmanageerr,
662 priv->stats.txbeaconokint,
663 priv->stats.txbeaconerr,
664 priv->stats.txcmdpktokint,
665// priv->stats.txhpokint,
666// priv->stats.txhperr,
667// priv->stats.txresumed,
668 netif_queue_stopped(dev),
669 priv->stats.txoverflow,
670// priv->stats.txbeacon,
671// atomic_read(&(priv->tx_pending[VI_QUEUE])),
672// atomic_read(&(priv->tx_pending[VO_QUEUE])),
673// atomic_read(&(priv->tx_pending[BE_QUEUE])),
674// atomic_read(&(priv->tx_pending[BK_QUEUE])),
675// read_nic_byte(dev, TXFIFOCOUNT),
676// priv->stats.txvidrop,
677// priv->stats.txvodrop,
678 priv->ieee80211->stats.tx_packets,
679 priv->ieee80211->stats.tx_bytes
680
681
682// priv->stats.txbedrop,
683// priv->stats.txbkdrop
684 // priv->stats.txdatapkt
685// priv->stats.txbeaconerr
686 );
687
688 *eof = 1;
689 return len;
690}
691
692
693
694static int proc_get_stats_rx(char *page, char **start,
695 off_t offset, int count,
696 int *eof, void *data)
697{
698 struct net_device *dev = data;
699 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
700
701 int len = 0;
702
703 len += snprintf(page + len, count - len,
704 "RX packets: %lu\n"
705 "RX desc err: %lu\n"
706 "RX rx overflow error: %lu\n"
707 "RX invalid urb error: %lu\n",
708 priv->stats.rxint,
709 priv->stats.rxrdu,
710 priv->stats.rxoverflow,
711 priv->stats.rxurberr);
712
713 *eof = 1;
714 return len;
715}
716
5e1ad18a 717static void rtl8192_proc_module_init(void)
ecdfa446
GKH		 718{
719 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
ecdfa446 720 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 721}
722
723
5e1ad18a 724static void rtl8192_proc_module_remove(void)
ecdfa446 725{
ecdfa446 726 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 727}
728
729
5e1ad18a 730static void rtl8192_proc_remove_one(struct net_device *dev)
ecdfa446
GKH		 731{
732 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
733
734 printk("dev name=======> %s\n",dev->name);
735
736 if (priv->dir_dev) {
737 // remove_proc_entry("stats-hw", priv->dir_dev);
738 remove_proc_entry("stats-tx", priv->dir_dev);
739 remove_proc_entry("stats-rx", priv->dir_dev);
740 // remove_proc_entry("stats-ieee", priv->dir_dev);
741 remove_proc_entry("stats-ap", priv->dir_dev);
742 remove_proc_entry("registers", priv->dir_dev);
743 // remove_proc_entry("cck-registers",priv->dir_dev);
744 // remove_proc_entry("ofdm-registers",priv->dir_dev);
745 //remove_proc_entry(dev->name, rtl8192_proc);
746 remove_proc_entry("wlan0", rtl8192_proc);
747 priv->dir_dev = NULL;
748 }
749}
750
751
5e1ad18a 752static void rtl8192_proc_init_one(struct net_device *dev)
ecdfa446
GKH		 753{
754 struct proc_dir_entry *e;
755 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
756 priv->dir_dev = create_proc_entry(dev->name,
757 S_IFDIR | S_IRUGO | S_IXUGO,
758 rtl8192_proc);
759 if (!priv->dir_dev) {
760 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
761 dev->name);
762 return;
763 }
ecdfa446
GKH		 764 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
765 priv->dir_dev, proc_get_stats_rx, dev);
766
767 if (!e) {
768 RT_TRACE(COMP_ERR,"Unable to initialize "
769 "/proc/net/rtl8192/%s/stats-rx\n",
770 dev->name);
771 }
772
773
774 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
775 priv->dir_dev, proc_get_stats_tx, dev);
776
777 if (!e) {
778 RT_TRACE(COMP_ERR, "Unable to initialize "
779 "/proc/net/rtl8192/%s/stats-tx\n",
780 dev->name);
781 }
ecdfa446
GKH		 782
783 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
784 priv->dir_dev, proc_get_stats_ap, dev);
785
786 if (!e) {
787 RT_TRACE(COMP_ERR, "Unable to initialize "
788 "/proc/net/rtl8192/%s/stats-ap\n",
789 dev->name);
790 }
791
792 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
793 priv->dir_dev, proc_get_registers, dev);
794 if (!e) {
795 RT_TRACE(COMP_ERR, "Unable to initialize "
796 "/proc/net/rtl8192/%s/registers\n",
797 dev->name);
798 }
ecdfa446
GKH		 799}
800/****************************************************************************
801 -----------------------------MISC STUFF-------------------------
802*****************************************************************************/
803
ecdfa446
GKH		 804short check_nic_enough_desc(struct net_device *dev, int prio)
805{
806 struct r8192_priv *priv = ieee80211_priv(dev);
807 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
808
809 /* for now we reserve two free descriptor as a safety boundary
810 * between the tail and the head
811 */
285f660c 812 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
ecdfa446
GKH		 813}
814
5e1ad18a 815static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 816{
817 struct r8192_priv *priv = ieee80211_priv(dev);
818 //rtl8192_commit(dev);
819
ecdfa446 820 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 821 printk("TXTIMEOUT");
822}
823
824
ecdfa446
GKH		 825/****************************************************************************
826 ------------------------------HW STUFF---------------------------
827*****************************************************************************/
828
829
5e1ad18a 830static void rtl8192_irq_enable(struct net_device *dev)
ecdfa446
GKH		 831{
832 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
833 priv->irq_enabled = 1;
834 write_nic_dword(dev,INTA_MASK, priv->irq_mask);
835}
836
837
65a43784 838void rtl8192_irq_disable(struct net_device *dev)
ecdfa446
GKH		 839{
840 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
841
842 write_nic_dword(dev,INTA_MASK,0);
843 force_pci_posting(dev);
844 priv->irq_enabled = 0;
845}
846
847
65a43784 848#if 0
5e1ad18a 849static void rtl8192_set_mode(struct net_device *dev,int mode)
ecdfa446
GKH		 850{
851 u8 ecmd;
852 ecmd=read_nic_byte(dev, EPROM_CMD);
853 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
854 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
855 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
856 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
857 write_nic_byte(dev, EPROM_CMD, ecmd);
858}
65a43784 859#endif
ecdfa446
GKH		 860
861void rtl8192_update_msr(struct net_device *dev)
862{
863 struct r8192_priv *priv = ieee80211_priv(dev);
864 u8 msr;
865
866 msr = read_nic_byte(dev, MSR);
867 msr &= ~ MSR_LINK_MASK;
868
869 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
870 * msr must be updated if the state is ASSOCIATING.
871 * this is intentional and make sense for ad-hoc and
872 * master (see the create BSS/IBSS func)
873 */
874 if (priv->ieee80211->state == IEEE80211_LINKED){
875
876 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
877 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
878 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
879 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
880 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
881 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
882
883 }else
884 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
885
886 write_nic_byte(dev, MSR, msr);
887}
888
889void rtl8192_set_chan(struct net_device *dev,short ch)
890{
891 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
892 RT_TRACE(COMP_RF, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
893 priv->chan=ch;
894#if 0
895 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC ||
896 priv->ieee80211->iw_mode == IW_MODE_MASTER){
897
898 priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;
899 priv->ieee80211->master_chan = ch;
900 rtl8192_update_beacon_ch(dev);
901 }
902#endif
903
904 /* this hack should avoid frame TX during channel setting*/
905
906
907 // tx = read_nic_dword(dev,TX_CONF);
908 // tx &= ~TX_LOOPBACK_MASK;
909
910#ifndef LOOP_TEST
911 //TODO
912 // write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
913
914 //need to implement rf set channel here WB
915
916 if (priv->rf_set_chan)
917 priv->rf_set_chan(dev,priv->chan);
918 // mdelay(10);
919 // write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
920#endif
921}
922
923void rtl8192_rx_enable(struct net_device *dev)
924{
925 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
926 write_nic_dword(dev, RDQDA,priv->rx_ring_dma);
927}
928
929/* the TX_DESC_BASE setting is according to the following queue index
930 * BK_QUEUE ===> 0
931 * BE_QUEUE ===> 1
932 * VI_QUEUE ===> 2
933 * VO_QUEUE ===> 3
934 * HCCA_QUEUE ===> 4
935 * TXCMD_QUEUE ===> 5
936 * MGNT_QUEUE ===> 6
937 * HIGH_QUEUE ===> 7
938 * BEACON_QUEUE ===> 8
939 * */
881a975b 940static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
ecdfa446
GKH		 941void rtl8192_tx_enable(struct net_device *dev)
942{
943 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
944 u32 i;
945 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
946 write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
947
948 ieee80211_reset_queue(priv->ieee80211);
949}
950
ecdfa446
GKH		 951
952static void rtl8192_free_rx_ring(struct net_device *dev)
953{
954 struct r8192_priv *priv = ieee80211_priv(dev);
955 int i;
956
957 for (i = 0; i < priv->rxringcount; i++) {
958 struct sk_buff *skb = priv->rx_buf[i];
959 if (!skb)
960 continue;
961
962 pci_unmap_single(priv->pdev,
963 *((dma_addr_t *)skb->cb),
964 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
965 kfree_skb(skb);
966 }
967
968 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
969 priv->rx_ring, priv->rx_ring_dma);
970 priv->rx_ring = NULL;
971}
972
973static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
974{
975 struct r8192_priv *priv = ieee80211_priv(dev);
976 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
977
978 while (skb_queue_len(&ring->queue)) {
979 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
980 struct sk_buff *skb = __skb_dequeue(&ring->queue);
981
982 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
983 skb->len, PCI_DMA_TODEVICE);
984 kfree_skb(skb);
985 ring->idx = (ring->idx + 1) % ring->entries;
986 }
987
988 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
989 ring->desc, ring->dma);
990 ring->desc = NULL;
991}
992
16d74da0 993void PHY_SetRtl8192eRfOff(struct net_device* dev)
ecdfa446 994{
65a43784 995 //disable RF-Chip A/B
996 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
997 //analog to digital off, for power save
998 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
999 //digital to analog off, for power save
1000 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
1001 //rx antenna off
1002 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
1003 //rx antenna off
1004 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
1005 //analog to digital part2 off, for power save
1006 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
1007 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
1008 // Analog parameter!!Change bias and Lbus control.
1009 write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07);
1010
1011}
ecdfa446 1012
65a43784 1013void rtl8192_halt_adapter(struct net_device *dev, bool reset)
ecdfa446 1014{
65a43784 1015 //u8 cmd;
ecdfa446 1016 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 1017 int i;
1018 u8 OpMode;
1019 u8 u1bTmp;
1020 u32 ulRegRead;
1021
1022 OpMode = RT_OP_MODE_NO_LINK;
1023 priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
ecdfa446 1024
65a43784 1025#if 1
1026 if(!priv->ieee80211->bSupportRemoteWakeUp)
1027 {
1028 u1bTmp = 0x0; // disable tx/rx. In 8185 we write 0x10 (Reset bit), but here we make reference to WMAC and wirte 0x0. 2006.11.21 Emily
1029 //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_COMMAND, &u1bTmp ); // Using HW_VAR_COMMAND instead of writing CMDR directly. Rewrited by Annie, 2006-04-07.
1030 write_nic_byte(dev, CMDR, u1bTmp);
1031 }
1032#else
ecdfa446 1033 cmd=read_nic_byte(dev,CMDR);
65a43784 1034 write_nic_byte(dev, CMDR, cmd &~ (CR_TE|CR_RE));
1035#endif
ecdfa446 1036
65a43784 1037 mdelay(20);
ecdfa446 1038
65a43784 1039 if(!reset)
1040 {
1041 //PlatformStallExecution(150000);
1042 mdelay(150);
1043
1044#ifdef RTL8192E
1045 priv->bHwRfOffAction = 2;
1046#endif
1047
1048 //
1049 // Call MgntActSet_RF_State instead to prevent RF config race condition.
1050 // By Bruce, 2008-01-17.
1051 //
1052 if(!priv->ieee80211->bSupportRemoteWakeUp)
1053 {
1054 //MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_INIT);
1055 //MgntActSet_RF_State(Adapter, eRfOff, Adapter->MgntInfo.RfOffReason);
1056 //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P)
1057
1058 PHY_SetRtl8192eRfOff(dev);
1059
1060 // 2006.11.30. System reset bit
1061 //priv->ieee80211->GetHwRegHandler(dev, HW_VAR_CPU_RST, (u32*)(&ulRegRead) );
1062 ulRegRead = read_nic_dword(dev,CPU_GEN);
1063 ulRegRead|=CPU_GEN_SYSTEM_RESET;
1064 //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_CPU_RST, &ulRegRead);
1065 write_nic_dword(dev,CPU_GEN, ulRegRead);
1066 }
1067 else
1068 {
1069 //2008.06.03 for WOL
1070 write_nic_dword(dev, WFCRC0, 0xffffffff);
1071 write_nic_dword(dev, WFCRC1, 0xffffffff);
1072 write_nic_dword(dev, WFCRC2, 0xffffffff);
1073
1074 //Write PMR register
1075 write_nic_byte(dev, PMR, 0x5);
1076 //Disable tx, enanble rx
1077 write_nic_byte(dev, MacBlkCtrl, 0xa);
1078 }
1079 }
1080
1081 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1082 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
1083 }
1084 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1085 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
1086 }
ecdfa446
GKH		 1087
1088 skb_queue_purge(&priv->skb_queue);
ecdfa446
GKH		 1089}
1090
65a43784 1091#if 0
5e1ad18a 1092static void rtl8192_reset(struct net_device *dev)
ecdfa446
GKH		 1093{
1094 rtl8192_irq_disable(dev);
1095 printk("This is RTL819xP Reset procedure\n");
1096}
65a43784 1097#endif
ecdfa446 1098
881a975b 1099static const u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
ecdfa446
GKH		 1100inline u16 rtl8192_rate2rate(short rate)
1101{
1102 if (rate >11) return 0;
1103 return rtl_rate[rate];
1104}
1105
1106
1107
ecdfa446 1108
5e1ad18a 1109static void rtl8192_data_hard_stop(struct net_device *dev)
ecdfa446
GKH		 1110{
1111 //FIXME !!
1112 #if 0
1113 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1114 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
1115 rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
1116 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1117 rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
1118 #endif
1119}
1120
1121
5e1ad18a 1122static void rtl8192_data_hard_resume(struct net_device *dev)
ecdfa446
GKH		 1123{
1124 // FIXME !!
1125 #if 0
1126 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1127 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
1128 rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
1129 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1130 rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
1131 #endif
1132}
1133
1134/* this function TX data frames when the ieee80211 stack requires this.
1135 * It checks also if we need to stop the ieee tx queue, eventually do it
1136 */
5e1ad18a 1137static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
ecdfa446
GKH		 1138{
1139 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1140 int ret;
1141 //unsigned long flags;
1142 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1143 u8 queue_index = tcb_desc->queue_index;
1144 /* shall not be referred by command packet */
1145 assert(queue_index != TXCMD_QUEUE);
1146
f500e256 1147 if (priv->bHwRadioOff ||(!priv->up))
65a43784 1148 {
1149 kfree_skb(skb);
1150 return;
1151 }
1152
ecdfa446
GKH		 1153 //spin_lock_irqsave(&priv->tx_lock,flags);
1154
1155 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1156#if 0
1157 tcb_desc->RATRIndex = 7;
1158 tcb_desc->bTxDisableRateFallBack = 1;
1159 tcb_desc->bTxUseDriverAssingedRate = 1;
1160 tcb_desc->bTxEnableFwCalcDur = 1;
1161#endif
1162 skb_push(skb, priv->ieee80211->tx_headroom);
1163 ret = rtl8192_tx(dev, skb);
1164 if(ret != 0) {
1165 kfree_skb(skb);
1166 };
1167
1168//
1169 if(queue_index!=MGNT_QUEUE) {
1170 priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1171 priv->ieee80211->stats.tx_packets++;
1172 }
1173
1174 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1175
1176// return ret;
ecdfa446
GKH		 1177}
1178
1179/* This is a rough attempt to TX a frame
1180 * This is called by the ieee 80211 stack to TX management frames.
1181 * If the ring is full packet are dropped (for data frame the queue
1182 * is stopped before this can happen).
1183 */
5e1ad18a 1184static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
ecdfa446
GKH		 1185{
1186 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1187
1188
1189 int ret;
1190 //unsigned long flags;
1191 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1192 u8 queue_index = tcb_desc->queue_index;
1193
65a43784 1194 if(queue_index != TXCMD_QUEUE){
f500e256 1195 if (priv->bHwRadioOff ||(!priv->up))
65a43784 1196 {
1197 kfree_skb(skb);
1198 return 0;
1199 }
1200 }
ecdfa446
GKH		 1201
1202 //spin_lock_irqsave(&priv->tx_lock,flags);
1203
1204 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1205 if(queue_index == TXCMD_QUEUE) {
1206 // skb_push(skb, USB_HWDESC_HEADER_LEN);
1207 rtl819xE_tx_cmd(dev, skb);
1208 ret = 0;
1209 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1210 return ret;
1211 } else {
1212 // RT_TRACE(COMP_SEND, "To send management packet\n");
1213 tcb_desc->RATRIndex = 7;
1214 tcb_desc->bTxDisableRateFallBack = 1;
1215 tcb_desc->bTxUseDriverAssingedRate = 1;
1216 tcb_desc->bTxEnableFwCalcDur = 1;
1217 skb_push(skb, priv->ieee80211->tx_headroom);
1218 ret = rtl8192_tx(dev, skb);
1219 if(ret != 0) {
1220 kfree_skb(skb);
1221 };
1222 }
1223
1224// priv->ieee80211->stats.tx_bytes+=skb->len;
1225// priv->ieee80211->stats.tx_packets++;
1226
1227 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1228
1229 return ret;
1230
1231}
1232
1233
5e1ad18a 1234static void rtl8192_tx_isr(struct net_device *dev, int prio)
ecdfa446
GKH		 1235{
1236 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1237
1238 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
1239
1240 while (skb_queue_len(&ring->queue)) {
1241 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1242 struct sk_buff *skb;
1243
bbc9a991 1244 /* beacon packet will only use the first descriptor defaultly,
ecdfa446
GKH		 1245 * and the OWN may not be cleared by the hardware
1246 * */
1247 if(prio != BEACON_QUEUE) {
1248 if(entry->OWN)
1249 return;
1250 ring->idx = (ring->idx + 1) % ring->entries;
1251 }
1252
1253 skb = __skb_dequeue(&ring->queue);
1254 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1255 skb->len, PCI_DMA_TODEVICE);
1256
1257 kfree_skb(skb);
1258 }
1259 if (prio == MGNT_QUEUE){
1260 if (priv->ieee80211->ack_tx_to_ieee){
1261 if (rtl8192_is_tx_queue_empty(dev)){
1262 priv->ieee80211->ack_tx_to_ieee = 0;
1263 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1264 }
1265 }
1266 }
1267
1268 if(prio != BEACON_QUEUE) {
1269 /* try to deal with the pending packets */
1270 tasklet_schedule(&priv->irq_tx_tasklet);
1271 }
1272
1273}
1274
5e1ad18a 1275static void rtl8192_stop_beacon(struct net_device *dev)
ecdfa446 1276{
ecdfa446
GKH		 1277}
1278
5e1ad18a 1279static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
ecdfa446
GKH		 1280{
1281 struct r8192_priv *priv = ieee80211_priv(dev);
1282 struct ieee80211_network *net;
1283 u8 i=0, basic_rate = 0;
1284 net = & priv->ieee80211->current_network;
1285
1286 for (i=0; i<net->rates_len; i++)
1287 {
1288 basic_rate = net->rates[i]&0x7f;
1289 switch(basic_rate)
1290 {
1291 case MGN_1M: *rate_config |= RRSR_1M; break;
1292 case MGN_2M: *rate_config |= RRSR_2M; break;
1293 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1294 case MGN_11M: *rate_config |= RRSR_11M; break;
1295 case MGN_6M: *rate_config |= RRSR_6M; break;
1296 case MGN_9M: *rate_config |= RRSR_9M; break;
1297 case MGN_12M: *rate_config |= RRSR_12M; break;
1298 case MGN_18M: *rate_config |= RRSR_18M; break;
1299 case MGN_24M: *rate_config |= RRSR_24M; break;
1300 case MGN_36M: *rate_config |= RRSR_36M; break;
1301 case MGN_48M: *rate_config |= RRSR_48M; break;
1302 case MGN_54M: *rate_config |= RRSR_54M; break;
1303 }
1304 }
1305 for (i=0; i<net->rates_ex_len; i++)
1306 {
1307 basic_rate = net->rates_ex[i]&0x7f;
1308 switch(basic_rate)
1309 {
1310 case MGN_1M: *rate_config |= RRSR_1M; break;
1311 case MGN_2M: *rate_config |= RRSR_2M; break;
1312 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1313 case MGN_11M: *rate_config |= RRSR_11M; break;
1314 case MGN_6M: *rate_config |= RRSR_6M; break;
1315 case MGN_9M: *rate_config |= RRSR_9M; break;
1316 case MGN_12M: *rate_config |= RRSR_12M; break;
1317 case MGN_18M: *rate_config |= RRSR_18M; break;
1318 case MGN_24M: *rate_config |= RRSR_24M; break;
1319 case MGN_36M: *rate_config |= RRSR_36M; break;
1320 case MGN_48M: *rate_config |= RRSR_48M; break;
1321 case MGN_54M: *rate_config |= RRSR_54M; break;
1322 }
1323 }
1324}
1325
1326
1327#define SHORT_SLOT_TIME 9
1328#define NON_SHORT_SLOT_TIME 20
1329
5e1ad18a 1330static void rtl8192_update_cap(struct net_device* dev, u16 cap)
ecdfa446
GKH		 1331{
1332 u32 tmp = 0;
1333 struct r8192_priv *priv = ieee80211_priv(dev);
1334 struct ieee80211_network *net = &priv->ieee80211->current_network;
1335 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1336 tmp = priv->basic_rate;
1337 if (priv->short_preamble)
1338 tmp |= BRSR_AckShortPmb;
1339 write_nic_dword(dev, RRSR, tmp);
1340
1341 if (net->mode & (IEEE_G|IEEE_N_24G))
1342 {
1343 u8 slot_time = 0;
1344 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1345 {//short slot time
1346 slot_time = SHORT_SLOT_TIME;
1347 }
1348 else //long slot time
1349 slot_time = NON_SHORT_SLOT_TIME;
1350 priv->slot_time = slot_time;
1351 write_nic_byte(dev, SLOT_TIME, slot_time);
1352 }
1353
1354}
5e1ad18a
GKH		 1355
1356static void rtl8192_net_update(struct net_device *dev)
ecdfa446
GKH		 1357{
1358
1359 struct r8192_priv *priv = ieee80211_priv(dev);
1360 struct ieee80211_network *net;
1361 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1362 u16 rate_config = 0;
1363 net = &priv->ieee80211->current_network;
1364 //update Basic rate: RR, BRSR
1365 rtl8192_config_rate(dev, &rate_config);
1366 // 2007.01.16, by Emily
1367 // Select RRSR (in Legacy-OFDM and CCK)
1368 // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
1369 // We do not use other rates.
1370 priv->basic_rate = rate_config &= 0x15f;
1371 //BSSID
1372 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1373 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1374#if 0
1375 //MSR
1376 rtl8192_update_msr(dev);
1377#endif
1378
1379
1380// rtl8192_update_cap(dev, net->capability);
1381 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1382 {
1383 write_nic_word(dev, ATIMWND, 2);
1384 write_nic_word(dev, BCN_DMATIME, 256);
1385 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1386 // write_nic_word(dev, BcnIntTime, 100);
1387 //BIT15 of BCN_DRV_EARLY_INT will indicate whether software beacon or hw beacon is applied.
1388 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
1389 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1390
1391 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1392 // TODO: BcnIFS may required to be changed on ASIC
1393 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1394
1395 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1396 }
1397
1398
1399}
1400
ecdfa446
GKH		 1401void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1402{
1403 struct r8192_priv *priv = ieee80211_priv(dev);
1404 struct rtl8192_tx_ring *ring;
1405 tx_desc_819x_pci *entry;
1406 unsigned int idx;
1407 dma_addr_t mapping;
1408 cb_desc *tcb_desc;
1409 unsigned long flags;
1410
1411 ring = &priv->tx_ring[TXCMD_QUEUE];
1412 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1413
1414 spin_lock_irqsave(&priv->irq_th_lock,flags);
1415 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1416 entry = &ring->desc[idx];
1417
1418 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1419 memset(entry,0,12);
1420 entry->LINIP = tcb_desc->bLastIniPkt;
1421 entry->FirstSeg = 1;//first segment
1422 entry->LastSeg = 1; //last segment
1423 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1424 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1425 } else {
1426 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1427 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1428 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1429 entry->QueueSelect = QSLT_CMD;
1430 entry->TxFWInfoSize = 0x08;
1431 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1432 }
1433 entry->TxBufferSize = skb->len;
1434 entry->TxBuffAddr = cpu_to_le32(mapping);
1435 entry->OWN = 1;
1436
1437#ifdef JOHN_DUMP_TXDESC
1438 { int i;
1439 tx_desc_819x_pci *entry1 = &ring->desc[0];
1440 unsigned int *ptr= (unsigned int *)entry1;
1441 printk("<Tx descriptor>:\n");
1442 for (i = 0; i < 8; i++)
1443 printk("%8x ", ptr[i]);
1444 printk("\n");
1445 }
1446#endif
1447 __skb_queue_tail(&ring->queue, skb);
1448 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1449
1450 write_nic_byte(dev, TPPoll, TPPoll_CQ);
1451
1452 return;
1453}
1454
1455/*
1456 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1457 * in TxFwInfo data structure
1458 * 2006.10.30 by Emily
1459 *
1460 * \param QUEUEID Software Queue
1461*/
5e1ad18a 1462static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446
GKH		 1463{
1464 u8 QueueSelect = 0x0; //defualt set to
1465
1466 switch(QueueID) {
1467 case BE_QUEUE:
1468 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
1469 break;
1470
1471 case BK_QUEUE:
1472 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
1473 break;
1474
1475 case VO_QUEUE:
1476 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
1477 break;
1478
1479 case VI_QUEUE:
1480 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
1481 break;
1482 case MGNT_QUEUE:
1483 QueueSelect = QSLT_MGNT;
1484 break;
1485
1486 case BEACON_QUEUE:
1487 QueueSelect = QSLT_BEACON;
1488 break;
1489
1490 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
1491 // TODO: Remove Assertions
1492//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
1493 case TXCMD_QUEUE:
1494 QueueSelect = QSLT_CMD;
1495 break;
1496//#endif
1497 case HIGH_QUEUE:
1498 //QueueSelect = QSLT_HIGH;
1499 //break;
1500
1501 default:
1502 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
1503 break;
1504 }
1505 return QueueSelect;
1506}
1507
5e1ad18a 1508static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1509{
1510 u8 ret = DESC90_RATE1M;
1511
1512 switch(rate) {
1513 case MGN_1M: ret = DESC90_RATE1M; break;
1514 case MGN_2M: ret = DESC90_RATE2M; break;
1515 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1516 case MGN_11M: ret = DESC90_RATE11M; break;
1517 case MGN_6M: ret = DESC90_RATE6M; break;
1518 case MGN_9M: ret = DESC90_RATE9M; break;
1519 case MGN_12M: ret = DESC90_RATE12M; break;
1520 case MGN_18M: ret = DESC90_RATE18M; break;
1521 case MGN_24M: ret = DESC90_RATE24M; break;
1522 case MGN_36M: ret = DESC90_RATE36M; break;
1523 case MGN_48M: ret = DESC90_RATE48M; break;
1524 case MGN_54M: ret = DESC90_RATE54M; break;
1525
1526 // HT rate since here
1527 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1528 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1529 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1530 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1531 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1532 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1533 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1534 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1535 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1536 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1537 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1538 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1539 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1540 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1541 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1542 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1543 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1544
1545 default: break;
1546 }
1547 return ret;
1548}
1549
1550
5e1ad18a 1551static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1552{
1553 u8 tmp_Short;
1554
1555 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1556
1557 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1558 tmp_Short = 0;
1559
1560 return tmp_Short;
1561}
1562
1563/*
1564 * The tx procedure is just as following,
1565 * skb->cb will contain all the following information,
1566 * priority, morefrag, rate, &dev.
1567 * */
1568short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
1569{
1570 struct r8192_priv *priv = ieee80211_priv(dev);
1571 struct rtl8192_tx_ring *ring;
1572 unsigned long flags;
1573 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1574 tx_desc_819x_pci *pdesc = NULL;
1575 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1576 dma_addr_t mapping;
1577 bool multi_addr=false,broad_addr=false,uni_addr=false;
1578 u8* pda_addr = NULL;
1579 int idx;
1580
65a43784 1581 if(priv->bdisable_nic){
1582 RT_TRACE(COMP_ERR,"%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n", __FUNCTION__, skb->len, tcb_desc->queue_index);
1583 return skb->len;
1584 }
1585
1586#ifdef ENABLE_LPS
1587 priv->ieee80211->bAwakePktSent = true;
1588#endif
1589
ecdfa446
GKH		 1590 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1591 /* collect the tx packets statitcs */
1592 pda_addr = ((u8*)skb->data) + sizeof(TX_FWINFO_8190PCI);
1593 if(is_multicast_ether_addr(pda_addr))
1594 multi_addr = true;
1595 else if(is_broadcast_ether_addr(pda_addr))
1596 broad_addr = true;
1597 else
1598 uni_addr = true;
1599
1600 if(uni_addr)
1601 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1602 else if(multi_addr)
1603 priv->stats.txbytesmulticast +=(u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1604 else
1605 priv->stats.txbytesbroadcast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1606
1607 /* fill tx firmware */
1608 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1609 memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
1610 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
1611 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1612 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1613 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1614
1615 /* Aggregation related */
1616 if(tcb_desc->bAMPDUEnable) {
1617 pTxFwInfo->AllowAggregation = 1;
1618 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1619 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1620 } else {
1621 pTxFwInfo->AllowAggregation = 0;
1622 pTxFwInfo->RxMF = 0;
1623 pTxFwInfo->RxAMD = 0;
1624 }
1625
1626 //
1627 // Protection mode related
1628 //
1629 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
1630 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
1631 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
1632 pTxFwInfo->RtsHT= (tcb_desc->rts_rate&0x80)?1:0;
1633 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1634 pTxFwInfo->RtsBandwidth = 0;
1635 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1636 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):(tcb_desc->bRTSUseShortGI?1:0);
1637 //
1638 // Set Bandwidth and sub-channel settings.
1639 //
1640 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
1641 {
1642 if(tcb_desc->bPacketBW)
1643 {
1644 pTxFwInfo->TxBandwidth = 1;
1645#ifdef RTL8190P
1646 pTxFwInfo->TxSubCarrier = 3;
1647#else
1648 pTxFwInfo->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode, cosa 04012008
1649#endif
1650 }
1651 else
1652 {
1653 pTxFwInfo->TxBandwidth = 0;
1654 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1655 }
1656 } else {
1657 pTxFwInfo->TxBandwidth = 0;
1658 pTxFwInfo->TxSubCarrier = 0;
1659 }
1660
1661 if (0)
1662 {
1663 /* 2007/07/25 MH Copy current TX FW info.*/
1664 memcpy((void*)(&Tmp_TxFwInfo), (void*)(pTxFwInfo), sizeof(TX_FWINFO_8190PCI));
1665 printk("&&&&&&&&&&&&&&&&&&&&&&====>print out fwinf\n");
1666 printk("===>enable fwcacl:%d\n", Tmp_TxFwInfo.EnableCPUDur);
1667 printk("===>RTS STBC:%d\n", Tmp_TxFwInfo.RtsSTBC);
1668 printk("===>RTS Subcarrier:%d\n", Tmp_TxFwInfo.RtsSubcarrier);
1669 printk("===>Allow Aggregation:%d\n", Tmp_TxFwInfo.AllowAggregation);
1670 printk("===>TX HT bit:%d\n", Tmp_TxFwInfo.TxHT);
1671 printk("===>Tx rate:%d\n", Tmp_TxFwInfo.TxRate);
1672 printk("===>Received AMPDU Density:%d\n", Tmp_TxFwInfo.RxAMD);
1673 printk("===>Received MPDU Factor:%d\n", Tmp_TxFwInfo.RxMF);
1674 printk("===>TxBandwidth:%d\n", Tmp_TxFwInfo.TxBandwidth);
1675 printk("===>TxSubCarrier:%d\n", Tmp_TxFwInfo.TxSubCarrier);
1676
1677 printk("<=====**********************out of print\n");
1678
1679 }
1680 spin_lock_irqsave(&priv->irq_th_lock,flags);
1681 ring = &priv->tx_ring[tcb_desc->queue_index];
1682 if (tcb_desc->queue_index != BEACON_QUEUE) {
1683 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1684 } else {
1685 idx = 0;
1686 }
1687
1688 pdesc = &ring->desc[idx];
1689 if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
207b58fb 1690 RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d,%x",
ecdfa446 1691 tcb_desc->queue_index,ring->idx, idx,skb->len);
65a43784 1692 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446
GKH		 1693 return skb->len;
1694 }
1695
1696 /* fill tx descriptor */
1697 memset((u8*)pdesc,0,12);
1698 /*DWORD 0*/
1699 pdesc->LINIP = 0;
1700 pdesc->CmdInit = 1;
1701 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; //We must add 8!! Emily
1702 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1703
1704 /*DWORD 1*/
1705 pdesc->SecCAMID= 0;
1706 pdesc->RATid = tcb_desc->RATRIndex;
1707
1708
1709 pdesc->NoEnc = 1;
1710 pdesc->SecType = 0x0;
1711 if (tcb_desc->bHwSec) {
ecdfa446
GKH		 1712 switch (priv->ieee80211->pairwise_key_type) {
1713 case KEY_TYPE_WEP40:
1714 case KEY_TYPE_WEP104:
1715 pdesc->SecType = 0x1;
1716 pdesc->NoEnc = 0;
1717 break;
1718 case KEY_TYPE_TKIP:
1719 pdesc->SecType = 0x2;
1720 pdesc->NoEnc = 0;
1721 break;
1722 case KEY_TYPE_CCMP:
1723 pdesc->SecType = 0x3;
1724 pdesc->NoEnc = 0;
1725 break;
1726 case KEY_TYPE_NA:
1727 pdesc->SecType = 0x0;
1728 pdesc->NoEnc = 1;
1729 break;
1730 }
1731 }
1732
1733 //
1734 // Set Packet ID
1735 //
1736 pdesc->PktId = 0x0;
1737
1738 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1739 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1740
1741 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1742 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
1743
1744 pdesc->FirstSeg =1;
1745 pdesc->LastSeg = 1;
1746 pdesc->TxBufferSize = skb->len;
1747
1748 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1749 __skb_queue_tail(&ring->queue, skb);
1750 pdesc->OWN = 1;
1751 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1752 dev->trans_start = jiffies;
1753 write_nic_word(dev,TPPoll,0x01<<tcb_desc->queue_index);
1754 return 0;
1755}
1756
5e1ad18a 1757static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
ecdfa446
GKH		 1758{
1759 struct r8192_priv *priv = ieee80211_priv(dev);
1760 rx_desc_819x_pci *entry = NULL;
1761 int i;
1762
1763 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1764 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1765
1766 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1767 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1768 return -ENOMEM;
1769 }
1770
1771 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1772 priv->rx_idx = 0;
1773
1774 for (i = 0; i < priv->rxringcount; i++) {
1775 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1776 dma_addr_t *mapping;
1777 entry = &priv->rx_ring[i];
1778 if (!skb)
1779 return 0;
1780 priv->rx_buf[i] = skb;
1781 mapping = (dma_addr_t *)skb->cb;
1c7ec2e8 1782 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
ecdfa446
GKH		 1783 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1784
1785 entry->BufferAddress = cpu_to_le32(*mapping);
1786
1787 entry->Length = priv->rxbuffersize;
1788 entry->OWN = 1;
1789 }
1790
1791 entry->EOR = 1;
1792 return 0;
1793}
1794
1795static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
1796 unsigned int prio, unsigned int entries)
1797{
1798 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1799 tx_desc_819x_pci *ring;
1800 dma_addr_t dma;
1801 int i;
1802
1803 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1804 if (!ring || (unsigned long)ring & 0xFF) {
1805 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1806 return -ENOMEM;
1807 }
1808
1809 memset(ring, 0, sizeof(*ring)*entries);
1810 priv->tx_ring[prio].desc = ring;
1811 priv->tx_ring[prio].dma = dma;
1812 priv->tx_ring[prio].idx = 0;
1813 priv->tx_ring[prio].entries = entries;
1814 skb_queue_head_init(&priv->tx_ring[prio].queue);
1815
1816 for (i = 0; i < entries; i++)
1817 ring[i].NextDescAddress =
1818 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1819
1820 return 0;
1821}
1822
1823
5e1ad18a 1824static short rtl8192_pci_initdescring(struct net_device *dev)
ecdfa446
GKH		 1825{
1826 u32 ret;
1827 int i;
1828 struct r8192_priv *priv = ieee80211_priv(dev);
1829
1830 ret = rtl8192_alloc_rx_desc_ring(dev);
1831 if (ret) {
1832 return ret;
1833 }
1834
1835
1836 /* general process for other queue */
1837 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
d6d42dfb
JP		 1838 ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount);
1839 if (ret)
ecdfa446
GKH		 1840 goto err_free_rings;
1841 }
1842
1843#if 0
1844 /* specific process for hardware beacon process */
d6d42dfb
JP		 1845 ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2);
1846 if (ret)
ecdfa446
GKH		 1847 goto err_free_rings;
1848#endif
1849
1850 return 0;
1851
1852err_free_rings:
1853 rtl8192_free_rx_ring(dev);
1854 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1855 if (priv->tx_ring[i].desc)
1856 rtl8192_free_tx_ring(dev, i);
1857 return 1;
1858}
1859
5e1ad18a 1860static void rtl8192_pci_resetdescring(struct net_device *dev)
ecdfa446
GKH		 1861{
1862 struct r8192_priv *priv = ieee80211_priv(dev);
1863 int i;
1864
1865 /* force the rx_idx to the first one */
1866 if(priv->rx_ring) {
1867 rx_desc_819x_pci *entry = NULL;
1868 for (i = 0; i < priv->rxringcount; i++) {
1869 entry = &priv->rx_ring[i];
1870 entry->OWN = 1;
1871 }
1872 priv->rx_idx = 0;
1873 }
1874
1875 /* after reset, release previous pending packet, and force the
1876 * tx idx to the first one */
1877 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1878 if (priv->tx_ring[i].desc) {
1879 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1880
1881 while (skb_queue_len(&ring->queue)) {
1882 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1883 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1884
1885 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1886 skb->len, PCI_DMA_TODEVICE);
1887 kfree_skb(skb);
1888 ring->idx = (ring->idx + 1) % ring->entries;
1889 }
1890 ring->idx = 0;
1891 }
1892 }
1893}
1894
5e1ad18a 1895static void rtl8192_link_change(struct net_device *dev)
ecdfa446 1896{
ecdfa446
GKH		 1897 struct r8192_priv *priv = ieee80211_priv(dev);
1898 struct ieee80211_device* ieee = priv->ieee80211;
1899 //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval);
1900 if (ieee->state == IEEE80211_LINKED)
1901 {
1902 rtl8192_net_update(dev);
1903 rtl8192_update_ratr_table(dev);
1904#if 1
1905 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1906 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1907 EnableHWSecurityConfig8192(dev);
1908#endif
1909 }
1910 else
1911 {
1912 write_nic_byte(dev, 0x173, 0);
1913 }
1914 /*update timing params*/
1915 //rtl8192_set_chan(dev, priv->chan);
1916 //MSR
1917 rtl8192_update_msr(dev);
1918
1919 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1920 // // To set CBSSID bit when link with any AP or STA.
1921 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1922 {
1923 u32 reg = 0;
1924 reg = read_nic_dword(dev, RCR);
1925 if (priv->ieee80211->state == IEEE80211_LINKED)
1926 priv->ReceiveConfig = reg |= RCR_CBSSID;
1927 else
1928 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1929 write_nic_dword(dev, RCR, reg);
1930 }
1931}
ecdfa446
GKH		 1932
1933
5b3b1a7b 1934static const struct ieee80211_qos_parameters def_qos_parameters = {
ecdfa446
GKH		 1935 {3,3,3,3},/* cw_min */
1936 {7,7,7,7},/* cw_max */
1937 {2,2,2,2},/* aifs */
1938 {0,0,0,0},/* flags */
1939 {0,0,0,0} /* tx_op_limit */
1940};
1941
5e1ad18a 1942static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1943{
1944 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1945 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1946 struct ieee80211_device* ieee = priv->ieee80211;
1947 struct ieee80211_network* net = &ieee->current_network;
1948
1949 if (ieee->pHTInfo->bCurrentHTSupport)
1950 HTUpdateSelfAndPeerSetting(ieee, net);
1951 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1952 rtl8192_update_cap(dev, net->capability);
1953}
1954/*
1955* background support to run QoS activate functionality
1956*/
881a975b 1957static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1958static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1959{
1960 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
1961 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1962 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1963 u8 mode = priv->ieee80211->current_network.mode;
ecdfa446
GKH		 1964 u8 u1bAIFS;
1965 u32 u4bAcParam;
1966 int i;
ecdfa446 1967
ecdfa446 1968 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1969 if(priv->ieee80211->state != IEEE80211_LINKED)
1970 goto success;
1971 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1972 /* It better set slot time at first */
1973 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1974 /* update the ac parameter to related registers */
1975 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1976 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1977 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1978 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1979 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1980 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1981 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
65a43784 1982 //printk("===>u4bAcParam:%x, ", u4bAcParam);
ecdfa446
GKH		 1983 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
1984 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
1985 }
1986
1987success:
ecdfa446 1988 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 1989}
1990
1991static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1992 int active_network,
1993 struct ieee80211_network *network)
1994{
1995 int ret = 0;
1996 u32 size = sizeof(struct ieee80211_qos_parameters);
1997
1998 if(priv->ieee80211->state !=IEEE80211_LINKED)
1999 return ret;
2000
2001 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2002 return ret;
2003
2004 if (network->flags & NETWORK_HAS_QOS_MASK) {
2005 if (active_network &&
2006 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2007 network->qos_data.active = network->qos_data.supported;
2008
2009 if ((network->qos_data.active == 1) && (active_network == 1) &&
2010 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2011 (network->qos_data.old_param_count !=
2012 network->qos_data.param_count)) {
2013 network->qos_data.old_param_count =
2014 network->qos_data.param_count;
ecdfa446 2015 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 2016 RT_TRACE (COMP_QOS, "QoS parameters change call "
2017 "qos_activate\n");
2018 }
2019 } else {
207b58fb 2020 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 2021 &def_qos_parameters, size);
2022
2023 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 2024 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 2025 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2026 }
2027 network->qos_data.active = 0;
2028 network->qos_data.supported = 0;
2029 }
2030
2031 return 0;
2032}
2033
2034/* handle manage frame frame beacon and probe response */
2035static int rtl8192_handle_beacon(struct net_device * dev,
2036 struct ieee80211_beacon * beacon,
2037 struct ieee80211_network * network)
2038{
2039 struct r8192_priv *priv = ieee80211_priv(dev);
2040
2041 rtl8192_qos_handle_probe_response(priv,1,network);
2042
ecdfa446 2043 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 2044 return 0;
2045
2046}
2047
2048/*
2049* handling the beaconing responses. if we get different QoS setting
2050* off the network from the associated setting, adjust the QoS
2051* setting
2052*/
2053static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2054 struct ieee80211_network *network)
2055{
2056 int ret = 0;
2057 unsigned long flags;
2058 u32 size = sizeof(struct ieee80211_qos_parameters);
2059 int set_qos_param = 0;
2060
2061 if ((priv == NULL) || (network == NULL))
2062 return ret;
2063
2064 if(priv->ieee80211->state !=IEEE80211_LINKED)
2065 return ret;
2066
2067 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2068 return ret;
2069
2070 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2071 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
207b58fb
MM		 2072 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
2073 &network->qos_data.parameters,
ecdfa446
GKH		 2074 sizeof(struct ieee80211_qos_parameters));
2075 priv->ieee80211->current_network.qos_data.active = 1;
2076#if 0
207b58fb 2077 if((priv->ieee80211->current_network.qos_data.param_count !=
ecdfa446
GKH		 2078 network->qos_data.param_count))
2079#endif
2080 {
2081 set_qos_param = 1;
2082 /* update qos parameter for current network */
207b58fb 2083 priv->ieee80211->current_network.qos_data.old_param_count =
ecdfa446 2084 priv->ieee80211->current_network.qos_data.param_count;
207b58fb 2085 priv->ieee80211->current_network.qos_data.param_count =
ecdfa446
GKH		 2086 network->qos_data.param_count;
2087 }
2088 } else {
207b58fb 2089 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 2090 &def_qos_parameters, size);
2091 priv->ieee80211->current_network.qos_data.active = 0;
2092 priv->ieee80211->current_network.qos_data.supported = 0;
2093 set_qos_param = 1;
2094 }
2095
2096 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2097
2098 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2099 if (set_qos_param == 1)
ecdfa446 2100 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 2101
2102 return ret;
2103}
2104
2105
2106static int rtl8192_handle_assoc_response(struct net_device *dev,
2107 struct ieee80211_assoc_response_frame *resp,
2108 struct ieee80211_network *network)
2109{
2110 struct r8192_priv *priv = ieee80211_priv(dev);
2111 rtl8192_qos_association_resp(priv, network);
2112 return 0;
2113}
2114
2115
2116//updateRATRTabel for MCS only. Basic rate is not implement.
5b3b1a7b 2117static void rtl8192_update_ratr_table(struct net_device* dev)
ecdfa446
GKH		 2118{
2119 struct r8192_priv* priv = ieee80211_priv(dev);
2120 struct ieee80211_device* ieee = priv->ieee80211;
2121 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
ecdfa446
GKH		 2122 u32 ratr_value = 0;
2123 u8 rate_index = 0;
2124
2125 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2126 ratr_value |= (*(u16*)(pMcsRate)) << 12;
16d74da0 2127
ecdfa446
GKH		 2128 switch (ieee->mode)
2129 {
2130 case IEEE_A:
2131 ratr_value &= 0x00000FF0;
2132 break;
2133 case IEEE_B:
2134 ratr_value &= 0x0000000F;
2135 break;
2136 case IEEE_G:
2137 ratr_value &= 0x00000FF7;
2138 break;
2139 case IEEE_N_24G:
2140 case IEEE_N_5G:
2141 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2142 ratr_value &= 0x0007F007;
2143 else{
2144 if (priv->rf_type == RF_1T2R)
2145 ratr_value &= 0x000FF007;
2146 else
2147 ratr_value &= 0x0F81F007;
2148 }
2149 break;
2150 default:
2151 break;
2152 }
2153 ratr_value &= 0x0FFFFFFF;
2154 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2155 ratr_value |= 0x80000000;
2156 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2157 ratr_value |= 0x80000000;
2158 }
2159 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2160 write_nic_byte(dev, UFWP, 1);
2161}
2162
5e1ad18a 2163static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446
GKH		 2164{
2165#if 1
65a43784 2166
2167 struct r8192_priv *priv = ieee80211_priv(dev);
2168 struct ieee80211_device *ieee = priv->ieee80211;
285f660c
MM		 2169 return !(ieee->rtllib_ap_sec_type &&
2170 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
65a43784 2171#else
ecdfa446
GKH		 2172 struct r8192_priv* priv = ieee80211_priv(dev);
2173 struct ieee80211_device* ieee = priv->ieee80211;
2174 int wpa_ie_len= ieee->wpa_ie_len;
2175 struct ieee80211_crypt_data* crypt;
2176 int encrypt;
2177
2178 crypt = ieee->crypt[ieee->tx_keyidx];
2179 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2180
2181 /* simply judge */
2182 if(encrypt && (wpa_ie_len == 0)) {
2183 /* wep encryption, no N mode setting */
2184 return false;
2185// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2186 } else if((wpa_ie_len != 0)) {
2187 /* parse pairwise key type */
2188 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2189 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2190 return true;
2191 else
2192 return false;
2193 } else {
2194 //RT_TRACE(COMP_ERR,"In %s The GroupEncAlgorithm is [4]\n",__FUNCTION__ );
2195 return true;
2196 }
2197
ecdfa446
GKH		 2198 return true;
2199#endif
2200}
2201
5e1ad18a 2202static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 2203{
2204 struct ieee80211_device* ieee = priv->ieee80211;
2205 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2206 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2207 {
2208 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2209 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2210 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2211 }
2212 else
2213 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
ecdfa446
GKH		 2214}
2215
5e1ad18a 2216static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
ecdfa446
GKH		 2217{
2218 struct r8192_priv *priv = ieee80211_priv(dev);
2219 u8 ret = 0;
2220 switch(priv->rf_chip)
2221 {
2222 case RF_8225:
2223 case RF_8256:
2224 case RF_PSEUDO_11N:
2225 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2226 break;
2227 case RF_8258:
2228 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2229 break;
2230 default:
2231 ret = WIRELESS_MODE_B;
2232 break;
2233 }
2234 return ret;
2235}
5e1ad18a
GKH		 2236
2237static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 2238{
2239 struct r8192_priv *priv = ieee80211_priv(dev);
2240 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2241
2242#if 1
2243 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2244 {
2245 if(bSupportMode & WIRELESS_MODE_N_24G)
2246 {
2247 wireless_mode = WIRELESS_MODE_N_24G;
2248 }
2249 else if(bSupportMode & WIRELESS_MODE_N_5G)
2250 {
2251 wireless_mode = WIRELESS_MODE_N_5G;
2252 }
2253 else if((bSupportMode & WIRELESS_MODE_A))
2254 {
2255 wireless_mode = WIRELESS_MODE_A;
2256 }
2257 else if((bSupportMode & WIRELESS_MODE_G))
2258 {
2259 wireless_mode = WIRELESS_MODE_G;
2260 }
2261 else if((bSupportMode & WIRELESS_MODE_B))
2262 {
2263 wireless_mode = WIRELESS_MODE_B;
2264 }
2265 else{
2266 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2267 wireless_mode = WIRELESS_MODE_B;
2268 }
2269 }
39cfb97b 2270#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA
ecdfa446
GKH		 2271 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2272#endif
2273 priv->ieee80211->mode = wireless_mode;
2274
2275 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2276 priv->ieee80211->pHTInfo->bEnableHT = 1;
2277 else
2278 priv->ieee80211->pHTInfo->bEnableHT = 0;
2279 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2280 rtl8192_refresh_supportrate(priv);
2281#endif
2282
2283}
2284//init priv variables here
2285
5e1ad18a 2286static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446 2287{
ecdfa446
GKH		 2288 struct r8192_priv* priv = ieee80211_priv(dev);
2289 struct ieee80211_device* ieee = priv->ieee80211;
2290
285f660c 2291 return ieee->bHalfWirelessN24GMode;
ecdfa446
GKH		 2292}
2293
2294short rtl8192_is_tx_queue_empty(struct net_device *dev)
2295{
2296 int i=0;
2297 struct r8192_priv *priv = ieee80211_priv(dev);
2298 for (i=0; i<=MGNT_QUEUE; i++)
2299 {
2300 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2301 continue;
2302 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
2303 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
2304 return 0;
2305 }
2306 }
2307 return 1;
2308}
16d74da0 2309
5e1ad18a 2310static void rtl8192_hw_sleep_down(struct net_device *dev)
ecdfa446 2311{
65a43784 2312 struct r8192_priv *priv = ieee80211_priv(dev);
2313 unsigned long flags = 0;
2314
2315 spin_lock_irqsave(&priv->rf_ps_lock,flags);
2316 if (priv->RFChangeInProgress) {
2317 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
2318 RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n");
2319 printk("rtl8192_hw_sleep_down(): RF Change in progress!\n");
2320 return;
2321 }
2322 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
65a43784 2323
ecdfa446
GKH		 2324 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
2325}
16d74da0 2326
5e1ad18a 2327static void rtl8192_hw_sleep_wq (struct work_struct *work)
ecdfa446 2328{
ecdfa446
GKH		 2329 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2330 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
2331 struct net_device *dev = ieee->dev;
65a43784 2332
ecdfa446
GKH		 2333 rtl8192_hw_sleep_down(dev);
2334}
65a43784 2335
5e1ad18a 2336static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446 2337{
65a43784 2338 struct r8192_priv *priv = ieee80211_priv(dev);
2339 unsigned long flags = 0;
2340
2341 spin_lock_irqsave(&priv->rf_ps_lock,flags);
2342 if (priv->RFChangeInProgress) {
2343 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
2344 RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n");
2345 printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n");
2346 queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20
2347 return;
2348 }
2349 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
ecdfa446 2350
ecdfa446 2351 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
ecdfa446 2352}
65a43784 2353
ecdfa446
GKH		 2354void rtl8192_hw_wakeup_wq (struct work_struct *work)
2355{
ecdfa446
GKH		 2356 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2357 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
2358 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 2359 rtl8192_hw_wakeup(dev);
2360
2361}
2362
2363#define MIN_SLEEP_TIME 50
2364#define MAX_SLEEP_TIME 10000
5e1ad18a 2365static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446 2366{
ecdfa446
GKH		 2367 struct r8192_priv *priv = ieee80211_priv(dev);
2368
2369 u32 rb = jiffies;
2370 unsigned long flags;
2371
2372 spin_lock_irqsave(&priv->ps_lock,flags);
2373
65a43784 2374 // Writing HW register with 0 equals to disable
2375 // the timer, that is not really what we want
2376 //
2377 tl -= MSECS(8+16+7);
ecdfa446 2378
65a43784 2379 // If the interval in witch we are requested to sleep is too
2380 // short then give up and remain awake
2381 // when we sleep after send null frame, the timer will be too short to sleep.
2382 //
ecdfa446 2383 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
65a43784 2384 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
ecdfa446 2385 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 2386 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
ecdfa446
GKH		 2387 return;
2388 }
2389
ecdfa446 2390 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
65a43784 2391 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
2392 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
ecdfa446
GKH		 2393 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
2394 spin_unlock_irqrestore(&priv->ps_lock,flags);
2395 return;
2396 }
65a43784 2397 {
2398 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
2399 queue_delayed_work(priv->ieee80211->wq,
2400 &priv->ieee80211->hw_wakeup_wq,tmp);
2401 //PowerSave not supported when kernel version less 2.6.20
2402 }
2403 queue_delayed_work(priv->ieee80211->wq,
2404 (void *)&priv->ieee80211->hw_sleep_wq,0);
ecdfa446 2405 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 2406
ecdfa446
GKH		 2407}
2408static void rtl8192_init_priv_variable(struct net_device* dev)
2409{
2410 struct r8192_priv *priv = ieee80211_priv(dev);
2411 u8 i;
65a43784 2412 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
2413
2414 // Default Halt the NIC if RF is OFF.
2415 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
2416 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
2417 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
2418 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
2419 pPSC->bLeisurePs = true;
2420 pPSC->RegMaxLPSAwakeIntvl = 5;
2421 priv->bHwRadioOff = false;
2422
ecdfa446
GKH		 2423 priv->being_init_adapter = false;
2424 priv->txbuffsize = 1600;//1024;
2425 priv->txfwbuffersize = 4096;
2426 priv->txringcount = 64;//32;
2427 //priv->txbeaconcount = priv->txringcount;
2428 priv->txbeaconcount = 2;
2429 priv->rxbuffersize = 9100;//2048;//1024;
2430 priv->rxringcount = MAX_RX_COUNT;//64;
2431 priv->irq_enabled=0;
2432 priv->card_8192 = NIC_8192E;
2433 priv->rx_skb_complete = 1;
2434 priv->chan = 1; //set to channel 1
2435 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
2436 priv->RegChannelPlan = 0xf;
2437 priv->nrxAMPDU_size = 0;
2438 priv->nrxAMPDU_aggr_num = 0;
2439 priv->last_rxdesc_tsf_high = 0;
2440 priv->last_rxdesc_tsf_low = 0;
2441 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
2442 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2443 priv->ieee80211->ieee_up=0;
2444 priv->retry_rts = DEFAULT_RETRY_RTS;
2445 priv->retry_data = DEFAULT_RETRY_DATA;
2446 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
2447 priv->ieee80211->rate = 110; //11 mbps
2448 priv->ieee80211->short_slot = 1;
2449 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
2450 priv->bcck_in_ch14 = false;
2451 priv->bfsync_processing = false;
2452 priv->CCKPresentAttentuation = 0;
2453 priv->rfa_txpowertrackingindex = 0;
2454 priv->rfc_txpowertrackingindex = 0;
2455 priv->CckPwEnl = 6;
2456 priv->ScanDelay = 50;//for Scan TODO
2457 //added by amy for silent reset
2458 priv->ResetProgress = RESET_TYPE_NORESET;
2459 priv->bForcedSilentReset = 0;
2460 priv->bDisableNormalResetCheck = false;
2461 priv->force_reset = false;
2462 //added by amy for power save
2463 priv->RegRfOff = 0;
2464 priv->ieee80211->RfOffReason = 0;
2465 priv->RFChangeInProgress = false;
2466 priv->bHwRfOffAction = 0;
2467 priv->SetRFPowerStateInProgress = false;
2468 priv->ieee80211->PowerSaveControl.bInactivePs = true;
2469 priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
2470 //just for debug
2471 priv->txpower_checkcnt = 0;
2472 priv->thermal_readback_index =0;
2473 priv->txpower_tracking_callback_cnt = 0;
2474 priv->ccktxpower_adjustcnt_ch14 = 0;
2475 priv->ccktxpower_adjustcnt_not_ch14 = 0;
2476
2477 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2478 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2479 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2480 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2481 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
2482 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
2483
2484 priv->ieee80211->active_scan = 1;
2485 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
2486 priv->ieee80211->host_encrypt = 1;
2487 priv->ieee80211->host_decrypt = 1;
2488 //priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
2489 //priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
2490 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
2491 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
2492 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
2493 priv->ieee80211->set_chan = rtl8192_set_chan;
2494 priv->ieee80211->link_change = rtl8192_link_change;
2495 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
2496 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
2497 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
2498 priv->ieee80211->init_wmmparam_flag = 0;
2499 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2500 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
2501 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2502 priv->ieee80211->qos_support = 1;
2503 priv->ieee80211->dot11PowerSaveMode = 0;
2504 //added by WB
2505// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
2506 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
2507 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
2508 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
2509
2510 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
2511// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
2512 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
2513 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
2514 //added by david
2515 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
2516 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
2517 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
2518
2519 //added by amy
2520 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
2521
65a43784 2522#ifdef ENABLE_IPS
2523 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
2524 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
2525#endif
2526#ifdef ENABLE_LPS
2527 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
16d74da0 2528#endif
65a43784 2529
2530 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
2531 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
2532
ecdfa446
GKH		 2533 priv->card_type = USB;
2534 {
2535 priv->ShortRetryLimit = 0x30;
2536 priv->LongRetryLimit = 0x30;
2537 }
2538 priv->EarlyRxThreshold = 7;
2539 priv->enable_gpio0 = 0;
2540
2541 priv->TransmitConfig = 0;
2542
2543 priv->ReceiveConfig = RCR_ADD3 |
2544 RCR_AMF | RCR_ADF | //accept management/data
2545 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
2546 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
2547 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2548 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2549
207b58fb
MM		 2550 priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
2551 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
2552 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
ecdfa446
GKH		 2553 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2554
2555 priv->AcmControl = 0;
2556 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
2557 if (priv->pFirmware)
2558 memset(priv->pFirmware, 0, sizeof(rt_firmware));
2559
2560 /* rx related queue */
2561 skb_queue_head_init(&priv->rx_queue);
2562 skb_queue_head_init(&priv->skb_queue);
2563
2564 /* Tx related queue */
2565 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2566 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
2567 }
2568 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2569 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
2570 }
2571 priv->rf_set_chan = rtl8192_phy_SwChnl;
2572}
2573
2574//init lock here
2575static void rtl8192_init_priv_lock(struct r8192_priv* priv)
2576{
2577 spin_lock_init(&priv->tx_lock);
2578 spin_lock_init(&priv->irq_lock);//added by thomas
2579 spin_lock_init(&priv->irq_th_lock);
2580 spin_lock_init(&priv->rf_ps_lock);
2581 spin_lock_init(&priv->ps_lock);
2582 //spin_lock_init(&priv->rf_lock);
2583 sema_init(&priv->wx_sem,1);
2584 sema_init(&priv->rf_sem,1);
ecdfa446 2585 mutex_init(&priv->mutex);
ecdfa446
GKH		 2586}
2587
ecdfa446
GKH		 2588//init tasklet and wait_queue here. only 2.6 above kernel is considered
2589#define DRV_NAME "wlan0"
2590static void rtl8192_init_priv_task(struct net_device* dev)
2591{
2592 struct r8192_priv *priv = ieee80211_priv(dev);
2593
ecdfa446
GKH		 2594#ifdef PF_SYNCTHREAD
2595 priv->priv_wq = create_workqueue(DRV_NAME,0);
2596#else
2597 priv->priv_wq = create_workqueue(DRV_NAME);
2598#endif
ecdfa446 2599
65a43784 2600#ifdef ENABLE_IPS
2601 INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq);
2602#endif
2603
ecdfa446
GKH		 2604// INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart);
2605 INIT_WORK(&priv->reset_wq, rtl8192_restart);
2606// INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
2607 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2608 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2609 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2610 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
2611 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
2612 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
2613 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
2614 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
2615 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
2616
ecdfa446
GKH		 2617 tasklet_init(&priv->irq_rx_tasklet,
2618 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
2619 (unsigned long)priv);
2620 tasklet_init(&priv->irq_tx_tasklet,
2621 (void(*)(unsigned long))rtl8192_irq_tx_tasklet,
2622 (unsigned long)priv);
2623 tasklet_init(&priv->irq_prepare_beacon_tasklet,
2624 (void(*)(unsigned long))rtl8192_prepare_beacon,
2625 (unsigned long)priv);
2626}
2627
2628static void rtl8192_get_eeprom_size(struct net_device* dev)
2629{
2630 u16 curCR = 0;
2631 struct r8192_priv *priv = ieee80211_priv(dev);
2632 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
2633 curCR = read_nic_dword(dev, EPROM_CMD);
2634 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2635 //whether need I consider BIT5?
2636 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2637 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2638}
2639
2640//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
2641static inline u16 endian_swap(u16* data)
2642{
2643 u16 tmp = *data;
2644 *data = (tmp >> 8) | (tmp << 8);
2645 return *data;
2646}
2647
2648/*
2649 * Note: Adapter->EEPROMAddressSize should be set before this function call.
2650 * EEPROM address size can be got through GetEEPROMSize8185()
2651*/
2652static void rtl8192_read_eeprom_info(struct net_device* dev)
2653{
2654 struct r8192_priv *priv = ieee80211_priv(dev);
2655
2656 u8 tempval;
2657#ifdef RTL8192E
2658 u8 ICVer8192, ICVer8256;
2659#endif
2660 u16 i,usValue, IC_Version;
2661 u16 EEPROMId;
2662#ifdef RTL8190P
16d74da0 2663 u8 offset;
ecdfa446
GKH		 2664 u8 EepromTxPower[100];
2665#endif
2666 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2667 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2668
2669
2670 // TODO: I don't know if we need to apply EF function to EEPROM read function
2671
2672 //2 Read EEPROM ID to make sure autoload is success
2673 EEPROMId = eprom_read(dev, 0);
2674 if( EEPROMId != RTL8190_EEPROM_ID )
2675 {
2676 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2677 priv->AutoloadFailFlag=true;
2678 }
2679 else
2680 {
2681 priv->AutoloadFailFlag=false;
2682 }
2683
2684 //
2685 // Assign Chip Version ID
2686 //
2687 // Read IC Version && Channel Plan
2688 if(!priv->AutoloadFailFlag)
2689 {
2690 // VID, PID
2691 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
2692 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
2693
2694 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2695 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2696 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
2697 priv->eeprom_ChannelPlan = usValue&0xff;
2698 IC_Version = ((usValue&0xff00)>>8);
2699
2700#ifdef RTL8190P
2701 priv->card_8192_version = (VERSION_8190)(IC_Version);
2702#else
2703 #ifdef RTL8192E
2704 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2705 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2706 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
2707 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
2708 if(ICVer8192 == 0x2) //B-cut
2709 {
2710 if(ICVer8256 == 0x5) //E-cut
2711 priv->card_8192_version= VERSION_8190_BE;
2712 }
2713 #endif
2714#endif
2715 switch(priv->card_8192_version)
2716 {
2717 case VERSION_8190_BD:
2718 case VERSION_8190_BE:
2719 break;
2720 default:
2721 priv->card_8192_version = VERSION_8190_BD;
2722 break;
2723 }
2724 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2725 }
2726 else
2727 {
2728 priv->card_8192_version = VERSION_8190_BD;
2729 priv->eeprom_vid = 0;
2730 priv->eeprom_did = 0;
2731 priv->eeprom_CustomerID = 0;
2732 priv->eeprom_ChannelPlan = 0;
2733 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
2734 }
2735
2736 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2737 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2738 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2739
2740 //2 Read Permanent MAC address
2741 if(!priv->AutoloadFailFlag)
2742 {
2743 for(i = 0; i < 6; i += 2)
2744 {
2745 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2746 *(u16*)(&dev->dev_addr[i]) = usValue;
2747 }
2748 } else {
2749 // when auto load failed, the last address byte set to be a random one.
2750 // added by david woo.2007/11/7
2751 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2752 }
2753
820793c3 2754 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
ecdfa446
GKH		 2755
2756 //2 TX Power Check EEPROM Fail or not
2757 if(priv->card_8192_version > VERSION_8190_BD) {
2758 priv->bTXPowerDataReadFromEEPORM = true;
2759 } else {
2760 priv->bTXPowerDataReadFromEEPORM = false;
2761 }
2762
bbc9a991 2763 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
ecdfa446
GKH		 2764 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2765
2766 if(priv->card_8192_version > VERSION_8190_BD)
2767 {
2768 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2769 if(!priv->AutoloadFailFlag)
2770 {
2771 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2772 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2773
2774 if (tempval&0x80) //RF-indication, bit[7]
2775 priv->rf_type = RF_1T2R;
2776 else
2777 priv->rf_type = RF_2T4R;
2778 }
2779 else
2780 {
2781 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2782 }
2783 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2784 priv->EEPROMLegacyHTTxPowerDiff);
2785
2786 // Read ThermalMeter from EEPROM
2787 if(!priv->AutoloadFailFlag)
2788 {
2789 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2790 }
2791 else
2792 {
2793 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2794 }
2795 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2796 //vivi, for tx power track
2797 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2798
2799 if(priv->epromtype == EPROM_93c46)
2800 {
2801 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2802 if(!priv->AutoloadFailFlag)
2803 {
2804 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
2805 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2806 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2807 }
2808 else
2809 {
2810 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2811 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2812 }
2813 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2814 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2815
2816 //
2817 // Get per-channel Tx Power Level
2818 //
2819 for(i=0; i<14; i+=2)
2820 {
2821 if(!priv->AutoloadFailFlag)
2822 {
2823 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2824 }
2825 else
2826 {
2827 usValue = EEPROM_Default_TxPower;
2828 }
2829 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2830 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2831 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2832 }
2833 for(i=0; i<14; i+=2)
2834 {
2835 if(!priv->AutoloadFailFlag)
2836 {
2837 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2838 }
2839 else
2840 {
2841 usValue = EEPROM_Default_TxPower;
2842 }
2843 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2844 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2845 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2846 }
2847 }
2848 else if(priv->epromtype== EPROM_93c56)
2849 {
2850 #ifdef RTL8190P
2851 // Read CrystalCap from EEPROM
2852 if(!priv->AutoloadFailFlag)
2853 {
2854 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2855 priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12);
2856 }
2857 else
2858 {
2859 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2860 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2861 }
2862 RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2863 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2864
2865 // Get Tx Power Level by Channel
2866 if(!priv->AutoloadFailFlag)
2867 {
2868 // Read Tx power of Channel 1 ~ 14 from EEPROM.
2869 for(i = 0; i < 12; i+=2)
2870 {
2871 if (i <6)
2872 offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i;
2873 else
2874 offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6;
2875 usValue = eprom_read(dev, (offset>>1));
2876 *((u16*)(&EepromTxPower[i])) = usValue;
2877 }
2878
2879 for(i = 0; i < 12; i++)
2880 {
2881 if (i <= 2)
2882 priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i];
2883 else if ((i >=3 )&&(i <= 5))
2884 priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i];
2885 else if ((i >=6 )&&(i <= 8))
2886 priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i];
2887 else
2888 priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i];
2889 }
2890 }
2891 else
2892 {
2893 priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2894 priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2895 priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2896
2897 priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2898 priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2899 priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2900
2901 priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2902 priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2903 priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2904
2905 priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2906 priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2907 priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2908 }
2909 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]);
2910 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]);
2911 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]);
2912 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]);
2913 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]);
2914 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]);
2915 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]);
2916 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]);
2917 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]);
2918 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]);
2919 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]);
2920 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]);
2921#endif
2922
2923 }
2924 //
2925 // Update HAL variables.
2926 //
2927 if(priv->epromtype == EPROM_93c46)
2928 {
2929 for(i=0; i<14; i++)
2930 {
2931 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2932 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2933 }
2934 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2935 // Antenna B gain offset to antenna A, bit0~3
2936 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2937 // Antenna C gain offset to antenna A, bit4~7
2938 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2939 // Antenna D gain offset to antenna A, bit8~11
2940 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2941 // CrystalCap, bit12~15
2942 priv->CrystalCap = priv->EEPROMCrystalCap;
2943 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2944 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2945 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2946 }
2947 else if(priv->epromtype == EPROM_93c56)
2948 {
2949 //char cck_pwr_diff_a=0, cck_pwr_diff_c=0;
2950
2951 //cck_pwr_diff_a = pHalData->EEPROMRfACCKChnl7TxPwLevel - pHalData->EEPROMRfAOfdmChnlTxPwLevel[1];
2952 //cck_pwr_diff_c = pHalData->EEPROMRfCCCKChnl7TxPwLevel - pHalData->EEPROMRfCOfdmChnlTxPwLevel[1];
2953 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2954 {
2955 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2956 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2957 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2958 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2959 }
2960 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2961 {
2962 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2963 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2964 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2965 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2966 }
2967 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2968 {
2969 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2970 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2971 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2972 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2973 }
2974 for(i=0; i<14; i++)
2975 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2976 for(i=0; i<14; i++)
2977 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2978 for(i=0; i<14; i++)
2979 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2980 for(i=0; i<14; i++)
2981 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2982 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2983 priv->AntennaTxPwDiff[0] = 0;
2984 priv->AntennaTxPwDiff[1] = 0;
2985 priv->AntennaTxPwDiff[2] = 0;
2986 priv->CrystalCap = priv->EEPROMCrystalCap;
2987 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2988 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2989 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2990 }
2991 }
2992
2993 if(priv->rf_type == RF_1T2R)
2994 {
2995 RT_TRACE(COMP_INIT, "\n1T2R config\n");
2996 }
2997 else if (priv->rf_type == RF_2T4R)
2998 {
2999 RT_TRACE(COMP_INIT, "\n2T4R config\n");
3000 }
3001
3002 // 2008/01/16 MH We can only know RF type in the function. So we have to init
3003 // DIG RATR table again.
3004 init_rate_adaptive(dev);
3005
3006 //1 Make a copy for following variables and we can change them if we want
3007
3008 priv->rf_chip= RF_8256;
3009
3010 if(priv->RegChannelPlan == 0xf)
3011 {
3012 priv->ChannelPlan = priv->eeprom_ChannelPlan;
3013 }
3014 else
3015 {
3016 priv->ChannelPlan = priv->RegChannelPlan;
3017 }
3018
3019 //
3020 // Used PID and DID to Set CustomerID
3021 //
3022 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
3023 {
3024 priv->CustomerID = RT_CID_DLINK;
3025 }
3026
3027 switch(priv->eeprom_CustomerID)
3028 {
3029 case EEPROM_CID_DEFAULT:
3030 priv->CustomerID = RT_CID_DEFAULT;
3031 break;
3032 case EEPROM_CID_CAMEO:
3033 priv->CustomerID = RT_CID_819x_CAMEO;
3034 break;
3035 case EEPROM_CID_RUNTOP:
3036 priv->CustomerID = RT_CID_819x_RUNTOP;
3037 break;
3038 case EEPROM_CID_NetCore:
3039 priv->CustomerID = RT_CID_819x_Netcore;
3040 break;
3041 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
3042 priv->CustomerID = RT_CID_TOSHIBA;
3043 if(priv->eeprom_ChannelPlan&0x80)
3044 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
3045 else
3046 priv->ChannelPlan = 0x0;
3047 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
3048 priv->ChannelPlan);
3049 break;
3050 case EEPROM_CID_Nettronix:
3051 priv->ScanDelay = 100; //cosa add for scan
3052 priv->CustomerID = RT_CID_Nettronix;
3053 break;
3054 case EEPROM_CID_Pronet:
3055 priv->CustomerID = RT_CID_PRONET;
3056 break;
3057 case EEPROM_CID_DLINK:
3058 priv->CustomerID = RT_CID_DLINK;
3059 break;
3060
3061 case EEPROM_CID_WHQL:
3062 //Adapter->bInHctTest = TRUE;//do not supported
3063
3064 //priv->bSupportTurboMode = FALSE;
3065 //priv->bAutoTurboBy8186 = FALSE;
3066
3067 //pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3068 //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3069 //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3070
3071 break;
3072 default:
3073 // value from RegCustomerID
3074 break;
3075 }
3076
3077 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
3078 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
3079 priv->ChannelPlan = 0; //FCC
3080
3081 switch(priv->CustomerID)
3082 {
3083 case RT_CID_DEFAULT:
3084 #ifdef RTL8190P
3085 priv->LedStrategy = HW_LED;
3086 #else
3087 #ifdef RTL8192E
3088 priv->LedStrategy = SW_LED_MODE1;
3089 #endif
3090 #endif
3091 break;
3092
3093 case RT_CID_819x_CAMEO:
3094 priv->LedStrategy = SW_LED_MODE2;
3095 break;
3096
3097 case RT_CID_819x_RUNTOP:
3098 priv->LedStrategy = SW_LED_MODE3;
3099 break;
3100
3101 case RT_CID_819x_Netcore:
3102 priv->LedStrategy = SW_LED_MODE4;
3103 break;
3104
3105 case RT_CID_Nettronix:
3106 priv->LedStrategy = SW_LED_MODE5;
3107 break;
3108
3109 case RT_CID_PRONET:
3110 priv->LedStrategy = SW_LED_MODE6;
3111 break;
3112
3113 case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
3114 // Do nothing.
3115 //break;
3116
3117 default:
3118 #ifdef RTL8190P
3119 priv->LedStrategy = HW_LED;
3120 #else
3121 #ifdef RTL8192E
3122 priv->LedStrategy = SW_LED_MODE1;
3123 #endif
3124 #endif
3125 break;
3126 }
65a43784 3127
3128
ecdfa446 3129 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
65a43784 3130 priv->ieee80211->bSupportRemoteWakeUp = true;
ecdfa446 3131 else
65a43784 3132 priv->ieee80211->bSupportRemoteWakeUp = false;
3133
3134
ecdfa446
GKH		 3135 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
3136 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
3137 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
3138 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
3139
3140 return ;
3141}
3142
3143
5e1ad18a 3144static short rtl8192_get_channel_map(struct net_device * dev)
ecdfa446
GKH		 3145{
3146 struct r8192_priv *priv = ieee80211_priv(dev);
3147#ifdef ENABLE_DOT11D
3148 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
3149 printk("rtl8180_init:Error channel plan! Set to default.\n");
3150 priv->ChannelPlan= 0;
3151 }
3152 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
3153
3154 rtl819x_set_channel_map(priv->ChannelPlan, priv);
3155#else
3156 int ch,i;
3157 //Set Default Channel Plan
3158 if(!channels){
3159 DMESG("No channels, aborting");
3160 return -1;
3161 }
3162 ch=channels;
3163 priv->ChannelPlan= 0;//hikaru
3164 // set channels 1..14 allowed in given locale
3165 for (i=1; i<=14; i++) {
3166 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
3167 ch >>= 1;
3168 }
3169#endif
3170 return 0;
3171}
5e1ad18a
GKH		 3172
3173static short rtl8192_init(struct net_device *dev)
ecdfa446
GKH		 3174{
3175 struct r8192_priv *priv = ieee80211_priv(dev);
3176 memset(&(priv->stats),0,sizeof(struct Stats));
3177 rtl8192_init_priv_variable(dev);
3178 rtl8192_init_priv_lock(priv);
3179 rtl8192_init_priv_task(dev);
3180 rtl8192_get_eeprom_size(dev);
3181 rtl8192_read_eeprom_info(dev);
3182 rtl8192_get_channel_map(dev);
3183 init_hal_dm(dev);
3184 init_timer(&priv->watch_dog_timer);
3185 priv->watch_dog_timer.data = (unsigned long)dev;
3186 priv->watch_dog_timer.function = watch_dog_timer_callback;
3187#if defined(IRQF_SHARED)
3188 if(request_irq(dev->irq, (void*)rtl8192_interrupt, IRQF_SHARED, dev->name, dev)){
3189#else
3190 if(request_irq(dev->irq, (void *)rtl8192_interrupt, SA_SHIRQ, dev->name, dev)){
3191#endif
3192 printk("Error allocating IRQ %d",dev->irq);
3193 return -1;
3194 }else{
3195 priv->irq=dev->irq;
3196 printk("IRQ %d",dev->irq);
3197 }
3198 if(rtl8192_pci_initdescring(dev)!=0){
3199 printk("Endopoints initialization failed");
3200 return -1;
3201 }
3202
3203 //rtl8192_rx_enable(dev);
3204 //rtl8192_adapter_start(dev);
ecdfa446
GKH		 3205 return 0;
3206}
3207
3208/******************************************************************************
3209 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
3210 * not to do all the hw config as its name says
3211 * input: net_device dev
3212 * output: none
3213 * return: none
3214 * notice: This part need to modified according to the rate set we filtered
3215 * ****************************************************************************/
5e1ad18a 3216static void rtl8192_hwconfig(struct net_device* dev)
ecdfa446
GKH		 3217{
3218 u32 regRATR = 0, regRRSR = 0;
3219 u8 regBwOpMode = 0, regTmp = 0;
3220 struct r8192_priv *priv = ieee80211_priv(dev);
3221
3222// Set RRSR, RATR, and BW_OPMODE registers
3223 //
3224 switch(priv->ieee80211->mode)
3225 {
3226 case WIRELESS_MODE_B:
3227 regBwOpMode = BW_OPMODE_20MHZ;
3228 regRATR = RATE_ALL_CCK;
3229 regRRSR = RATE_ALL_CCK;
3230 break;
3231 case WIRELESS_MODE_A:
3232 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
3233 regRATR = RATE_ALL_OFDM_AG;
3234 regRRSR = RATE_ALL_OFDM_AG;
3235 break;
3236 case WIRELESS_MODE_G:
3237 regBwOpMode = BW_OPMODE_20MHZ;
3238 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3239 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3240 break;
3241 case WIRELESS_MODE_AUTO:
3242 case WIRELESS_MODE_N_24G:
3243 // It support CCK rate by default.
3244 // CCK rate will be filtered out only when associated AP does not support it.
3245 regBwOpMode = BW_OPMODE_20MHZ;
3246 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3247 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3248 break;
3249 case WIRELESS_MODE_N_5G:
3250 regBwOpMode = BW_OPMODE_5G;
3251 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3252 regRRSR = RATE_ALL_OFDM_AG;
3253 break;
3254 }
3255
3256 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
3257 {
3258 u32 ratr_value = 0;
3259 ratr_value = regRATR;
3260 if (priv->rf_type == RF_1T2R)
3261 {
3262 ratr_value &= ~(RATE_ALL_OFDM_2SS);
3263 }
3264 write_nic_dword(dev, RATR0, ratr_value);
3265 write_nic_byte(dev, UFWP, 1);
3266 }
3267 regTmp = read_nic_byte(dev, 0x313);
3268 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3269 write_nic_dword(dev, RRSR, regRRSR);
3270
3271 //
3272 // Set Retry Limit here
3273 //
3274 write_nic_word(dev, RETRY_LIMIT,
207b58fb 3275 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
ecdfa446
GKH		 3276 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
3277 // Set Contention Window here
3278
3279 // Set Tx AGC
3280
3281 // Set Tx Antenna including Feedback control
3282
3283 // Set Auto Rate fallback control
3284
3285
3286}
3287
3288
5e1ad18a 3289static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
ecdfa446
GKH		 3290{
3291 struct r8192_priv *priv = ieee80211_priv(dev);
3292// struct ieee80211_device *ieee = priv->ieee80211;
3293 u32 ulRegRead;
3294 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
ecdfa446
GKH		 3295 //u8 eRFPath;
3296 u8 tmpvalue;
3297#ifdef RTL8192E
3298 u8 ICVersion,SwitchingRegulatorOutput;
3299#endif
3300 bool bfirmwareok = true;
3301#ifdef RTL8190P
3302 u8 ucRegRead;
3303#endif
3304 u32 tmpRegA, tmpRegC, TempCCk;
3305 int i =0;
ecdfa446
GKH		 3306
3307 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
3308 priv->being_init_adapter = true;
3309 rtl8192_pci_resetdescring(dev);
3310 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
3311 priv->Rf_Mode = RF_OP_By_SW_3wire;
3312#ifdef RTL8192E
3313 //dPLL on
3314 if(priv->ResetProgress == RESET_TYPE_NORESET)
3315 {
3316 write_nic_byte(dev, ANAPAR, 0x37);
3317 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
3318 // Joseph increae the time to prevent firmware download fail
3319 mdelay(500);
3320 }
3321#endif
3322 //PlatformSleepUs(10000);
3323 // For any kind of InitializeAdapter process, we shall use system now!!
3324 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
3325
3326 // Set to eRfoff in order not to count receive count.
3327 if(priv->RegRfOff == TRUE)
3328 priv->ieee80211->eRFPowerState = eRfOff;
3329
3330 //
3331 //3 //Config CPUReset Register
3332 //3//
3333 //3 Firmware Reset Or Not
3334 ulRegRead = read_nic_dword(dev, CPU_GEN);
3335 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
3336 { //called from MPInitialized. do nothing
3337 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3338 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
3339 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
3340 else
3341 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
3342
3343#ifdef RTL8190P
3344 //2008.06.03, for WOL 90 hw bug
3345 ulRegRead &= (~(CPU_GEN_GPIO_UART));
3346#endif
3347
3348 write_nic_dword(dev, CPU_GEN, ulRegRead);
3349 //mdelay(100);
3350
3351#ifdef RTL8192E
3352
3353 //3//
3354 //3 //Fix the issue of E-cut high temperature issue
3355 //3//
3356 // TODO: E cut only
3357 ICVersion = read_nic_byte(dev, IC_VERRSION);
3358 if(ICVersion >= 0x4) //E-cut only
3359 {
3360 // HW SD suggest that we should not wirte this register too often, so driver
3361 // should readback this register. This register will be modified only when
3362 // power on reset
3363 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
3364 if(SwitchingRegulatorOutput != 0xb8)
3365 {
3366 write_nic_byte(dev, SWREGULATOR, 0xa8);
3367 mdelay(1);
3368 write_nic_byte(dev, SWREGULATOR, 0xb8);
3369 }
3370 }
3371#endif
3372
3373
3374 //3//
3375 //3// Initialize BB before MAC
3376 //3//
ecdfa446
GKH		 3377 RT_TRACE(COMP_INIT, "BB Config Start!\n");
3378 rtStatus = rtl8192_BBConfig(dev);
3379 if(rtStatus != RT_STATUS_SUCCESS)
3380 {
3381 RT_TRACE(COMP_ERR, "BB Config failed\n");
3382 return rtStatus;
3383 }
3384 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
3385
ecdfa446
GKH		 3386 //3//Set Loopback mode or Normal mode
3387 //3//
3388 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
3389 // because setting of System_Reset bit reset MAC to default transmission mode.
3390 //Loopback mode or not
3391 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
3392 //priv->LoopbackMode = RTL819X_MAC_LOOPBACK;
3393 if(priv->ResetProgress == RESET_TYPE_NORESET)
3394 {
3395 ulRegRead = read_nic_dword(dev, CPU_GEN);
3396 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
3397 {
3398 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
3399 }
3400 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
3401 {
3402 ulRegRead |= CPU_CCK_LOOPBACK;
3403 }
3404 else
3405 {
3406 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
3407 }
3408
3409 //2008.06.03, for WOL
3410 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3411 write_nic_dword(dev, CPU_GEN, ulRegRead);
3412
3413 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
3414 udelay(500);
3415 }
3416 //3Set Hardware(Do nothing now)
3417 rtl8192_hwconfig(dev);
3418 //2=======================================================
3419 // Common Setting for all of the FPGA platform. (part 1)
3420 //2=======================================================
3421 // If there is changes, please make sure it applies to all of the FPGA version
3422 //3 Turn on Tx/Rx
3423 write_nic_byte(dev, CMDR, CR_RE|CR_TE);
3424
3425 //2Set Tx dma burst
3426#ifdef RTL8190P
207b58fb
MM		 3427 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
3428 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) |
3429 (1<<MULRW_SHIFT)));
ecdfa446
GKH		 3430#else
3431 #ifdef RTL8192E
207b58fb 3432 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
ecdfa446
GKH		 3433 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
3434 #endif
3435#endif
3436 //set IDR0 here
3437 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
3438 write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
3439 //set RCR
3440 write_nic_dword(dev, RCR, priv->ReceiveConfig);
3441
3442 //3 Initialize Number of Reserved Pages in Firmware Queue
3443 #ifdef TO_DO_LIST
3444 if(priv->bInHctTest)
3445 {
207b58fb
MM		 3446 PlatformEFIOWrite4Byte(Adapter, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
3447 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
3448 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446
GKH		 3449 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3450 PlatformEFIOWrite4Byte(Adapter, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
207b58fb
MM		 3451 PlatformEFIOWrite4Byte(Adapter, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
3452 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 3453 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3454 }
3455 else
3456 #endif
3457 {
207b58fb
MM		 3458 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
3459 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
3460 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446
GKH		 3461 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3462 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
207b58fb
MM		 3463 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
3464 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 3465 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3466 }
3467
3468 rtl8192_tx_enable(dev);
3469 rtl8192_rx_enable(dev);
3470 //3Set Response Rate Setting Register
3471 // CCK rate is supported by default.
3472 // CCK rate will be filtered out only when associated AP does not support it.
3473 ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
3474 write_nic_dword(dev, RRSR, ulRegRead);
3475 write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
3476
3477 //2Set AckTimeout
3478 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3479 write_nic_byte(dev, ACK_TIMEOUT, 0x30);
3480
3481 //rtl8192_actset_wirelessmode(dev,priv->RegWirelessMode);
3482 if(priv->ResetProgress == RESET_TYPE_NORESET)
3483 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
3484 //-----------------------------------------------------------------------------
3485 // Set up security related. 070106, by rcnjko:
3486 // 1. Clear all H/W keys.
3487 // 2. Enable H/W encryption/decryption.
3488 //-----------------------------------------------------------------------------
3489 CamResetAllEntry(dev);
3490 {
3491 u8 SECR_value = 0x0;
3492 SECR_value |= SCR_TxEncEnable;
3493 SECR_value |= SCR_RxDecEnable;
3494 SECR_value |= SCR_NoSKMC;
3495 write_nic_byte(dev, SECR, SECR_value);
3496 }
3497 //3Beacon related
3498 write_nic_word(dev, ATIMWND, 2);
3499 write_nic_word(dev, BCN_INTERVAL, 100);
5e1ad18a 3500 for (i=0; i<QOS_QUEUE_NUM; i++)
ecdfa446 3501 write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 3502 //
3503 // Switching regulator controller: This is set temporarily.
3504 // It's not sure if this can be removed in the future.
3505 // PJ advised to leave it by default.
3506 //
3507 write_nic_byte(dev, 0xbe, 0xc0);
3508
3509 //2=======================================================
3510 // Set PHY related configuration defined in MAC register bank
3511 //2=======================================================
3512 rtl8192_phy_configmac(dev);
3513
3514 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
3515 rtl8192_phy_getTxPower(dev);
3516 rtl8192_phy_setTxPower(dev, priv->chan);
3517 }
3518
3519 //if D or C cut
3520 tmpvalue = read_nic_byte(dev, IC_VERRSION);
3521 priv->IC_Cut = tmpvalue;
3522 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
3523 if(priv->IC_Cut >= IC_VersionCut_D)
3524 {
3525 //pHalData->bDcut = TRUE;
3526 if(priv->IC_Cut == IC_VersionCut_D)
3527 RT_TRACE(COMP_INIT, "D-cut\n");
3528 if(priv->IC_Cut == IC_VersionCut_E)
3529 {
3530 RT_TRACE(COMP_INIT, "E-cut\n");
3531 // HW SD suggest that we should not wirte this register too often, so driver
3532 // should readback this register. This register will be modified only when
3533 // power on reset
3534 }
3535 }
3536 else
3537 {
3538 //pHalData->bDcut = FALSE;
3539 RT_TRACE(COMP_INIT, "Before C-cut\n");
3540 }
3541
3542#if 1
3543 //Firmware download
3544 RT_TRACE(COMP_INIT, "Load Firmware!\n");
3545 bfirmwareok = init_firmware(dev);
3546 if(bfirmwareok != true) {
3547 rtStatus = RT_STATUS_FAILURE;
3548 return rtStatus;
3549 }
3550 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
3551#endif
3552 //RF config
3553 if(priv->ResetProgress == RESET_TYPE_NORESET)
3554 {
3555 RT_TRACE(COMP_INIT, "RF Config Started!\n");
3556 rtStatus = rtl8192_phy_RFConfig(dev);
3557 if(rtStatus != RT_STATUS_SUCCESS)
3558 {
3559 RT_TRACE(COMP_ERR, "RF Config failed\n");
3560 return rtStatus;
3561 }
3562 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
3563 }
3564 rtl8192_phy_updateInitGain(dev);
3565
3566 /*---- Set CCK and OFDM Block "ON"----*/
3567 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
3568 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
3569
3570#ifdef RTL8192E
3571 //Enable Led
3572 write_nic_byte(dev, 0x87, 0x0);
3573#endif
3574#ifdef RTL8190P
3575 //2008.06.03, for WOL
3576 ucRegRead = read_nic_byte(dev, GPE);
3577 ucRegRead |= BIT0;
3578 write_nic_byte(dev, GPE, ucRegRead);
3579
3580 ucRegRead = read_nic_byte(dev, GPO);
3581 ucRegRead &= ~BIT0;
3582 write_nic_byte(dev, GPO, ucRegRead);
3583#endif
3584
3585 //2=======================================================
3586 // RF Power Save
3587 //2=======================================================
3588#ifdef ENABLE_IPS
3589
3590{
3591 if(priv->RegRfOff == TRUE)
3592 { // User disable RF via registry.
3593 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__FUNCTION__);
3594 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
3595#if 0//cosa, ask SD3 willis and he doesn't know what is this for
3596 // Those action will be discard in MgntActSet_RF_State because off the same state
3597 for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
3598 PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
3599#endif
3600 }
3601 else if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
3602 { // H/W or S/W RF OFF before sleep.
3603 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3604 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3605 }
3606 else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
3607 { // H/W or S/W RF OFF before sleep.
3608 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3609 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3610 }
3611 else
3612 {
3613 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
3614 priv->ieee80211->eRFPowerState = eRfOn;
3615 priv->ieee80211->RfOffReason = 0;
3616 //DrvIFIndicateCurrentPhyStatus(Adapter);
3617 // LED control
3618 //Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_ON);
3619
3620 //
3621 // If inactive power mode is enabled, disable rf while in disconnected state.
3622 // But we should still tell upper layer we are in rf on state.
3623 // 2007.07.16, by shien chang.
3624 //
3625 //if(!Adapter->bInHctTest)
3626 //IPSEnter(Adapter);
3627
3628 }
3629}
3630#endif
3631 if(1){
3632#ifdef RTL8192E
3633 // We can force firmware to do RF-R/W
3634 if(priv->ieee80211->FwRWRF)
3635 priv->Rf_Mode = RF_OP_By_FW;
3636 else
3637 priv->Rf_Mode = RF_OP_By_SW_3wire;
3638#else
3639 priv->Rf_Mode = RF_OP_By_SW_3wire;
3640#endif
3641 }
3642#ifdef RTL8190P
3643 if(priv->ResetProgress == RESET_TYPE_NORESET)
3644 {
3645 dm_initialize_txpower_tracking(dev);
3646
3647 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3648 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3649
3650 if(priv->rf_type == RF_2T4R){
3651 for(i = 0; i<TxBBGainTableLength; i++)
3652 {
3653 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3654 {
3655 priv->rfa_txpowertrackingindex= (u8)i;
3656 priv->rfa_txpowertrackingindex_real= (u8)i;
3657 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3658 break;
3659 }
3660 }
3661 }
3662 for(i = 0; i<TxBBGainTableLength; i++)
3663 {
3664 if(tmpRegC == priv->txbbgain_table[i].txbbgain_value)
3665 {
3666 priv->rfc_txpowertrackingindex= (u8)i;
3667 priv->rfc_txpowertrackingindex_real= (u8)i;
3668 priv->rfc_txpowertracking_default = priv->rfc_txpowertrackingindex;
3669 break;
3670 }
3671 }
3672 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3673
3674 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3675 {
3676 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3677 {
3678 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3679 break;
3680 }
3681 }
3682 priv->CCKPresentAttentuation_40Mdefault = 0;
3683 priv->CCKPresentAttentuation_difference = 0;
3684 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3685 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3686 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3687 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_initial = %d\n", priv->rfc_txpowertrackingindex);
3688 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real_initial = %d\n", priv->rfc_txpowertrackingindex_real);
3689 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3690 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3691 }
3692#else
3693 #ifdef RTL8192E
3694 if(priv->ResetProgress == RESET_TYPE_NORESET)
3695 {
3696 dm_initialize_txpower_tracking(dev);
3697
3698 if(priv->IC_Cut >= IC_VersionCut_D)
3699 {
3700 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3701 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3702 for(i = 0; i<TxBBGainTableLength; i++)
3703 {
3704 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3705 {
3706 priv->rfa_txpowertrackingindex= (u8)i;
3707 priv->rfa_txpowertrackingindex_real= (u8)i;
3708 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3709 break;
3710 }
3711 }
3712
3713 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3714
3715 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3716 {
3717 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3718 {
3719 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3720 break;
3721 }
3722 }
3723 priv->CCKPresentAttentuation_40Mdefault = 0;
3724 priv->CCKPresentAttentuation_difference = 0;
3725 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3726 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3727 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3728 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3729 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3730 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
3731 }
3732 }
3733 #endif
3734#endif
3735 rtl8192_irq_enable(dev);
3736 priv->being_init_adapter = false;
3737 return rtStatus;
3738
3739}
3740
559fba5e 3741static void rtl8192_prepare_beacon(struct r8192_priv *priv)
ecdfa446
GKH		 3742{
3743 struct sk_buff *skb;
3744 //unsigned long flags;
3745 cb_desc *tcb_desc;
3746
3747 skb = ieee80211_get_beacon(priv->ieee80211);
3748 tcb_desc = (cb_desc *)(skb->cb + 8);
ecdfa446
GKH		 3749 //spin_lock_irqsave(&priv->tx_lock,flags);
3750 /* prepare misc info for the beacon xmit */
3751 tcb_desc->queue_index = BEACON_QUEUE;
bbc9a991 3752 /* IBSS does not support HT yet, use 1M defaultly */
ecdfa446
GKH		 3753 tcb_desc->data_rate = 2;
3754 tcb_desc->RATRIndex = 7;
3755 tcb_desc->bTxDisableRateFallBack = 1;
3756 tcb_desc->bTxUseDriverAssingedRate = 1;
3757
3758 skb_push(skb, priv->ieee80211->tx_headroom);
3759 if(skb){
3760 rtl8192_tx(priv->ieee80211->dev,skb);
3761 }
3762 //spin_unlock_irqrestore (&priv->tx_lock, flags);
3763}
3764
ecdfa446
GKH		 3765
3766/* this configures registers for beacon tx and enables it via
3767 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
3768 * be used to stop beacon transmission
3769 */
559fba5e 3770static void rtl8192_start_beacon(struct net_device *dev)
ecdfa446
GKH		 3771{
3772 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3773 struct ieee80211_network *net = &priv->ieee80211->current_network;
3774 u16 BcnTimeCfg = 0;
3775 u16 BcnCW = 6;
3776 u16 BcnIFS = 0xf;
3777
3778 DMESG("Enabling beacon TX");
3779 //rtl8192_prepare_beacon(dev);
3780 rtl8192_irq_disable(dev);
3781 //rtl8192_beacon_tx_enable(dev);
3782
3783 /* ATIM window */
3784 write_nic_word(dev, ATIMWND, 2);
3785
3786 /* Beacon interval (in unit of TU) */
3787 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
3788
3789 /*
3790 * DrvErlyInt (in unit of TU).
3791 * (Time to send interrupt to notify driver to c
3792 * hange beacon content)
3793 * */
3794 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
3795
3796 /*
3797 * BcnDMATIM(in unit of us).
3798 * Indicates the time before TBTT to perform beacon queue DMA
3799 * */
3800 write_nic_word(dev, BCN_DMATIME, 256);
3801
3802 /*
3803 * Force beacon frame transmission even after receiving
3804 * beacon frame from other ad hoc STA
3805 * */
3806 write_nic_byte(dev, BCN_ERR_THRESH, 100);
3807
3808 /* Set CW and IFS */
3809 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
3810 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3811 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
3812
3813
3814 /* enable the interrupt for ad-hoc process */
3815 rtl8192_irq_enable(dev);
3816}
3817/***************************************************************************
3818 -------------------------------NET STUFF---------------------------
3819***************************************************************************/
ecdfa446
GKH		 3820
3821
3822
5e1ad18a 3823static bool HalTxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3824{
3825 u16 RegTxCounter = read_nic_word(dev, 0x128);
3826 struct r8192_priv *priv = ieee80211_priv(dev);
3827 bool bStuck = FALSE;
3828 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
3829 if(priv->TxCounter==RegTxCounter)
3830 bStuck = TRUE;
3831
3832 priv->TxCounter = RegTxCounter;
3833
3834 return bStuck;
3835}
3836
3837/*
3838* <Assumption: RT_TX_SPINLOCK is acquired.>
3839* First added: 2006.11.19 by emily
3840*/
5e1ad18a 3841static RESET_TYPE
ecdfa446
GKH		 3842TxCheckStuck(struct net_device *dev)
3843{
3844 struct r8192_priv *priv = ieee80211_priv(dev);
3845 u8 QueueID;
3846 ptx_ring head=NULL,tail=NULL,txring = NULL;
3847 u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3848 bool bCheckFwTxCnt = false;
ecdfa446
GKH		 3849
3850 //
3851 // Decide Stuch threshold according to current power save mode
3852 //
ecdfa446
GKH		 3853 switch (priv->ieee80211->dot11PowerSaveMode)
3854 {
3855 // The threshold value may required to be adjusted .
3856 case eActive: // Active/Continuous access.
3857 ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
3858 break;
3859 case eMaxPs: // Max power save mode.
3860 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3861 break;
3862 case eFastPs: // Fast power save mode.
3863 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3864 break;
3865 }
3866
3867 //
3868 // Check whether specific tcb has been queued for a specific time
3869 //
3870 for(QueueID = 0; QueueID < MAX_TX_QUEUE; QueueID++)
3871 {
3872
3873
3874 if(QueueID == TXCMD_QUEUE)
3875 continue;
3876
3877 switch(QueueID) {
3878 case MGNT_QUEUE:
3879 tail=priv->txmapringtail;
3880 head=priv->txmapringhead;
3881 break;
3882
3883 case BK_QUEUE:
3884 tail=priv->txbkpringtail;
3885 head=priv->txbkpringhead;
3886 break;
3887
3888 case BE_QUEUE:
3889 tail=priv->txbepringtail;
3890 head=priv->txbepringhead;
3891 break;
3892
3893 case VI_QUEUE:
3894 tail=priv->txvipringtail;
3895 head=priv->txvipringhead;
3896 break;
3897
3898 case VO_QUEUE:
3899 tail=priv->txvopringtail;
3900 head=priv->txvopringhead;
3901 break;
3902
3903 default:
3904 tail=head=NULL;
3905 break;
3906 }
3907
3908 if(tail == head)
3909 continue;
3910 else
3911 {
3912 txring = head;
3913 if(txring == NULL)
3914 {
3915 RT_TRACE(COMP_ERR,"%s():txring is NULL , BUG!\n",__FUNCTION__);
3916 continue;
3917 }
3918 txring->nStuckCount++;
ecdfa446
GKH		 3919 bCheckFwTxCnt = TRUE;
3920 }
3921 }
3922#if 1
3923 if(bCheckFwTxCnt)
3924 {
3925 if(HalTxCheckStuck8190Pci(dev))
3926 {
3927 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
3928 return RESET_TYPE_SILENT;
3929 }
3930 }
3931#endif
3932 return RESET_TYPE_NORESET;
3933}
3934
3935
5e1ad18a 3936static bool HalRxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3937{
3938 struct r8192_priv *priv = ieee80211_priv(dev);
3939 u16 RegRxCounter = read_nic_word(dev, 0x130);
3940 bool bStuck = FALSE;
3941 static u8 rx_chk_cnt = 0;
3942 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
3943 // If rssi is small, we should check rx for long time because of bad rx.
3944 // or maybe it will continuous silent reset every 2 seconds.
3945 rx_chk_cnt++;
3946 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
3947 {
3948 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
3949 }
3950 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
3951 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
3952 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
3953
3954 {
3955 if(rx_chk_cnt < 2)
3956 {
3957 return bStuck;
3958 }
3959 else
3960 {
3961 rx_chk_cnt = 0;
3962 }
3963 }
3964 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
3965 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
3966 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
3967 {
3968 if(rx_chk_cnt < 4)
3969 {
3970 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
3971 return bStuck;
3972 }
3973 else
3974 {
3975 rx_chk_cnt = 0;
3976 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
3977 }
3978 }
3979 else
3980 {
3981 if(rx_chk_cnt < 8)
3982 {
3983 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
3984 return bStuck;
3985 }
3986 else
3987 {
3988 rx_chk_cnt = 0;
3989 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
3990 }
3991 }
ecdfa446
GKH		 3992 if(priv->RxCounter==RegRxCounter)
3993 bStuck = TRUE;
3994
3995 priv->RxCounter = RegRxCounter;
3996
3997 return bStuck;
3998}
3999
5e1ad18a 4000static RESET_TYPE RxCheckStuck(struct net_device *dev)
ecdfa446
GKH		 4001{
4002
4003 if(HalRxCheckStuck8190Pci(dev))
4004 {
4005 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
4006 return RESET_TYPE_SILENT;
4007 }
4008
4009 return RESET_TYPE_NORESET;
4010}
4011
5e1ad18a 4012static RESET_TYPE
ecdfa446
GKH		 4013rtl819x_ifcheck_resetornot(struct net_device *dev)
4014{
4015 struct r8192_priv *priv = ieee80211_priv(dev);
4016 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
4017 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
4018 RT_RF_POWER_STATE rfState;
4019
4020 rfState = priv->ieee80211->eRFPowerState;
4021
4022 TxResetType = TxCheckStuck(dev);
4023#if 1
4024 if( rfState != eRfOff &&
4025 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
4026 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
4027 {
4028 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
4029 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
4030 // if driver is in firmware download failure status, driver should initialize RF in the following
4031 // silent reset procedure Emily, 2008.01.21
4032
4033 // Driver should not check RX stuck in IBSS mode because it is required to
4034 // set Check BSSID in order to send beacon, however, if check BSSID is
4035 // set, STA cannot hear any packet a all. Emily, 2008.04.12
4036 RxResetType = RxCheckStuck(dev);
4037 }
4038#endif
4039
4040 RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
4041 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
4042 return RESET_TYPE_NORMAL;
4043 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
4044 return RESET_TYPE_SILENT;
4045 else
4046 return RESET_TYPE_NORESET;
4047
4048}
4049
4050
5e1ad18a 4051static void CamRestoreAllEntry(struct net_device *dev)
ecdfa446
GKH		 4052{
4053 u8 EntryId = 0;
4054 struct r8192_priv *priv = ieee80211_priv(dev);
881a975b 4055 const u8* MacAddr = priv->ieee80211->current_network.bssid;
ecdfa446 4056
881a975b 4057 static const u8 CAM_CONST_ADDR[4][6] = {
ecdfa446
GKH		 4058 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
4059 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
4060 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
4061 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
881a975b 4062 static const u8 CAM_CONST_BROAD[] =
ecdfa446
GKH		 4063 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
4064
4065 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
4066
4067
4068 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
4069 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
4070 {
4071
4072 for(EntryId=0; EntryId<4; EntryId++)
4073 {
4074 {
4075 MacAddr = CAM_CONST_ADDR[EntryId];
4076 setKey(dev,
4077 EntryId ,
4078 EntryId,
4079 priv->ieee80211->pairwise_key_type,
4080 MacAddr,
4081 0,
4082 NULL);
4083 }
4084 }
4085
4086 }
4087 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
4088 {
4089
4090 {
4091 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4092 setKey(dev,
4093 4,
4094 0,
4095 priv->ieee80211->pairwise_key_type,
4096 (u8*)dev->dev_addr,
4097 0,
4098 NULL);
4099 else
4100 setKey(dev,
4101 4,
4102 0,
4103 priv->ieee80211->pairwise_key_type,
4104 MacAddr,
4105 0,
4106 NULL);
4107 }
4108 }
4109 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
4110 {
4111
4112 {
4113 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4114 setKey(dev,
4115 4,
4116 0,
4117 priv->ieee80211->pairwise_key_type,
4118 (u8*)dev->dev_addr,
4119 0,
4120 NULL);
4121 else
4122 setKey(dev,
4123 4,
4124 0,
4125 priv->ieee80211->pairwise_key_type,
4126 MacAddr,
4127 0,
4128 NULL);
4129 }
4130 }
4131
4132
4133
4134 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
4135 {
4136 MacAddr = CAM_CONST_BROAD;
4137 for(EntryId=1 ; EntryId<4 ; EntryId++)
4138 {
4139 {
4140 setKey(dev,
4141 EntryId,
4142 EntryId,
4143 priv->ieee80211->group_key_type,
4144 MacAddr,
4145 0,
4146 NULL);
4147 }
4148 }
4149 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4150 setKey(dev,
4151 0,
4152 0,
4153 priv->ieee80211->group_key_type,
4154 CAM_CONST_ADDR[0],
4155 0,
4156 NULL);
4157 }
4158 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
4159 {
4160 MacAddr = CAM_CONST_BROAD;
4161 for(EntryId=1; EntryId<4 ; EntryId++)
4162 {
4163 {
4164 setKey(dev,
4165 EntryId ,
4166 EntryId,
4167 priv->ieee80211->group_key_type,
4168 MacAddr,
4169 0,
4170 NULL);
4171 }
4172 }
4173
4174 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4175 setKey(dev,
4176 0 ,
4177 0,
4178 priv->ieee80211->group_key_type,
4179 CAM_CONST_ADDR[0],
4180 0,
4181 NULL);
4182 }
4183}
4184
ecdfa446
GKH		 4185/*
4186 * This function is used to fix Tx/Rx stop bug temporarily.
4187 * This function will do "system reset" to NIC when Tx or Rx is stuck.
4188 * The method checking Tx/Rx stuck of this function is supported by FW,
4189 * which reports Tx and Rx counter to register 0x128 and 0x130.
4190 * */
5e1ad18a 4191static void rtl819x_ifsilentreset(struct net_device *dev)
ecdfa446
GKH		 4192{
4193 struct r8192_priv *priv = ieee80211_priv(dev);
4194 u8 reset_times = 0;
4195 int reset_status = 0;
4196 struct ieee80211_device *ieee = priv->ieee80211;
4197
4198
65a43784 4199 return;
4200
ecdfa446
GKH		 4201 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
4202 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
4203
4204 if(priv->ResetProgress==RESET_TYPE_NORESET)
4205 {
4206RESET_START:
65a43784 4207#ifdef ENABLE_LPS
4208 //LZM for PS-Poll AID issue. 090429
4209 if(priv->ieee80211->state == IEEE80211_LINKED)
4210 LeisurePSLeave(dev);
4211#endif
ecdfa446
GKH		 4212
4213 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
4214
4215 // Set the variable for reset.
4216 priv->ResetProgress = RESET_TYPE_SILENT;
4217// rtl8192_close(dev);
4218#if 1
4219 down(&priv->wx_sem);
4220 if(priv->up == 0)
4221 {
4222 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
4223 up(&priv->wx_sem);
4224 return ;
4225 }
4226 priv->up = 0;
4227 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
4228 if(!netif_queue_stopped(dev))
4229 netif_stop_queue(dev);
4230
4231 dm_backup_dynamic_mechanism_state(dev);
4232
4233 rtl8192_irq_disable(dev);
4234 rtl8192_cancel_deferred_work(priv);
4235 deinit_hal_dm(dev);
4236 del_timer_sync(&priv->watch_dog_timer);
4237 ieee->sync_scan_hurryup = 1;
4238 if(ieee->state == IEEE80211_LINKED)
4239 {
4240 down(&ieee->wx_sem);
4241 printk("ieee->state is IEEE80211_LINKED\n");
4242 ieee80211_stop_send_beacons(priv->ieee80211);
4243 del_timer_sync(&ieee->associate_timer);
ecdfa446 4244 cancel_delayed_work(&ieee->associate_retry_wq);
ecdfa446 4245 ieee80211_stop_scan(ieee);
ecdfa446
GKH		 4246 up(&ieee->wx_sem);
4247 }
4248 else{
4249 printk("ieee->state is NOT LINKED\n");
65a43784 4250 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446 4251 }
65a43784 4252 rtl8192_halt_adapter(dev, true);
ecdfa446
GKH		 4253 up(&priv->wx_sem);
4254 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
4255 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
4256 reset_status = _rtl8192_up(dev);
4257
4258 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
4259 if(reset_status == -1)
4260 {
4261 if(reset_times < 3)
4262 {
4263 reset_times++;
4264 goto RESET_START;
4265 }
4266 else
4267 {
4268 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__FUNCTION__);
4269 }
4270 }
4271#endif
4272 ieee->is_silent_reset = 1;
4273#if 1
4274 EnableHWSecurityConfig8192(dev);
4275#if 1
4276 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4277 {
4278 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4279
4280#if 1
ecdfa446 4281 queue_work(ieee->wq, &ieee->associate_complete_wq);
ecdfa446
GKH		 4282#endif
4283
4284 }
4285 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
4286 {
4287 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4288 ieee->link_change(ieee->dev);
4289
4290 // notify_wx_assoc_event(ieee);
4291
4292 ieee80211_start_send_beacons(ieee);
4293
4294 if (ieee->data_hard_resume)
4295 ieee->data_hard_resume(ieee->dev);
4296 netif_carrier_on(ieee->dev);
4297 }
4298#endif
4299
4300 CamRestoreAllEntry(dev);
4301
4302 // Restore the previous setting for all dynamic mechanism
4303 dm_restore_dynamic_mechanism_state(dev);
4304
4305 priv->ResetProgress = RESET_TYPE_NORESET;
4306 priv->reset_count++;
4307
4308 priv->bForcedSilentReset =false;
4309 priv->bResetInProgress = false;
4310
4311 // For test --> force write UFWP.
4312 write_nic_byte(dev, UFWP, 1);
4313 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
4314#endif
4315 }
4316}
4317
4318#ifdef ENABLE_IPS
4319void InactivePsWorkItemCallback(struct net_device *dev)
4320{
4321 struct r8192_priv *priv = ieee80211_priv(dev);
4322 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
ecdfa446
GKH		 4323
4324 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n");
4325 //
4326 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
4327 // is really scheduled.
4328 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
4329 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
4330 // blocks the IPS procedure of switching RF.
4331 // By Bruce, 2007-12-25.
4332 //
4333 pPSC->bSwRfProcessing = TRUE;
4334
207b58fb 4335 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
ecdfa446
GKH		 4336 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
4337
4338
4339 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
4340
4341 //
4342 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
4343 //
ecdfa446
GKH		 4344 pPSC->bSwRfProcessing = FALSE;
4345 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n");
4346}
4347
65a43784 4348#ifdef ENABLE_LPS
4349//
4350// Change current and default preamble mode.
4351// 2005.01.06, by rcnjko.
4352//
4353bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode)
4354{
4355 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 4356
4357 // Currently, we do not change power save mode on IBSS mode.
4358 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4359 {
4360 return false;
4361 }
4362
4363 //
4364 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
4365 // some AP will not response to our mgnt frames with PwrMgt bit set,
4366 // e.g. cannot associate the AP.
4367 // So I commented out it. 2005.02.16, by rcnjko.
4368 //
4369// // Change device's power save mode.
4370// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
4371
4372 // Update power save mode configured.
4373 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
4374 if(!priv->ps_force) {
4375 priv->ieee80211->ps = rtPsMode;
4376 }
4377
4378 // Awake immediately
4379 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
4380 {
4381 unsigned long flags;
4382
4383 //PlatformSetTimer(Adapter, &(pMgntInfo->AwakeTimer), 0);
4384 // Notify the AP we awke.
4385 rtl8192_hw_wakeup(dev);
4386 priv->ieee80211->sta_sleep = 0;
4387
4388 spin_lock_irqsave(&(priv->ieee80211->mgmt_tx_lock), flags);
4389 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
4390 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
4391 spin_unlock_irqrestore(&(priv->ieee80211->mgmt_tx_lock), flags);
4392 }
4393
4394 return true;
4395}
4396
4397//================================================================================
4398// Leisure Power Save in linked state.
4399//================================================================================
4400
4401//
4402// Description:
4403// Enter the leisure power save mode.
4404//
4405void LeisurePSEnter(struct net_device *dev)
4406{
4407 struct r8192_priv *priv = ieee80211_priv(dev);
4408 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4409
4410 //RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
4411 //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
4412 // pPSC->bLeisurePs, priv->ieee80211->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD);
4413
4414 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
4415 (priv->ieee80211->state == IEEE80211_LINKED)) ||
4416 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
4417 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
4418 return;
4419
4420 if (pPSC->bLeisurePs)
4421 {
4422 // Idle for a while if we connect to AP a while ago.
4423 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
4424 {
4425
4426 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
4427 {
4428
4429 //RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n");
4430 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
4431
4432 }
4433 }
4434 else
4435 pPSC->LpsIdleCount++;
4436 }
4437}
4438
4439
4440//
4441// Description:
4442// Leave the leisure power save mode.
4443//
4444void LeisurePSLeave(struct net_device *dev)
4445{
4446 struct r8192_priv *priv = ieee80211_priv(dev);
4447 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4448
65a43784 4449 if (pPSC->bLeisurePs)
4450 {
4451 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
4452 {
4453 // move to lps_wakecomplete()
4454 //RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
4455 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED);
4456
4457 }
4458 }
4459}
4460#endif
4461
4462
ecdfa446
GKH		 4463//
4464// Description:
4465// Enter the inactive power save mode. RF will be off
4466// 2007.08.17, by shien chang.
4467//
4468void
4469IPSEnter(struct net_device *dev)
4470{
4471 struct r8192_priv *priv = ieee80211_priv(dev);
4472 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4473 RT_RF_POWER_STATE rtState;
4474
4475 if (pPSC->bInactivePs)
4476 {
4477 rtState = priv->ieee80211->eRFPowerState;
4478 //
4479 // Added by Bruce, 2007-12-25.
4480 // Do not enter IPS in the following conditions:
4481 // (1) RF is already OFF or Sleep
4482 // (2) bSwRfProcessing (indicates the IPS is still under going)
4483 // (3) Connectted (only disconnected can trigger IPS)
4484 // (4) IBSS (send Beacon)
4485 // (5) AP mode (send Beacon)
4486 //
4487 if (rtState == eRfOn && !pPSC->bSwRfProcessing
4488 && (priv->ieee80211->state != IEEE80211_LINKED) )
4489 {
4490 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
65a43784 4491 //printk("IPSEnter(): Turn off RF.\n");
ecdfa446
GKH		 4492 pPSC->eInactivePowerState = eRfOff;
4493// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4494 InactivePsWorkItemCallback(dev);
4495 }
4496 }
4497}
4498
4499//
4500// Description:
4501// Leave the inactive power save mode, RF will be on.
4502// 2007.08.17, by shien chang.
4503//
4504void
4505IPSLeave(struct net_device *dev)
4506{
4507 struct r8192_priv *priv = ieee80211_priv(dev);
4508 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4509 RT_RF_POWER_STATE rtState;
4510
4511 if (pPSC->bInactivePs)
4512 {
4513 rtState = priv->ieee80211->eRFPowerState;
4514 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
4515 {
4516 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
65a43784 4517 //printk("IPSLeave(): Turn on RF.\n");
ecdfa446
GKH		 4518 pPSC->eInactivePowerState = eRfOn;
4519// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4520 InactivePsWorkItemCallback(dev);
4521 }
4522 }
4523}
65a43784 4524
4525void IPSLeave_wq(void *data)
4526{
4527 struct ieee80211_device *ieee = container_of(data,struct ieee80211_device,ips_leave_wq);
4528 struct net_device *dev = ieee->dev;
4529
4530 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4531 down(&priv->ieee80211->ips_sem);
4532 IPSLeave(dev);
4533 up(&priv->ieee80211->ips_sem);
4534}
4535
4536void ieee80211_ips_leave_wq(struct net_device *dev)
4537{
4538 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4539 RT_RF_POWER_STATE rtState;
4540 rtState = priv->ieee80211->eRFPowerState;
4541
4542 if(priv->ieee80211->PowerSaveControl.bInactivePs){
4543 if(rtState == eRfOff){
4544 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
4545 {
4546 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
4547 return;
4548 }
4549 else{
4550 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
4551 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
4552 }
4553 }
4554 }
4555}
4556//added by amy 090331 end
4557void ieee80211_ips_leave(struct net_device *dev)
4558{
4559 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4560 down(&priv->ieee80211->ips_sem);
4561 IPSLeave(dev);
4562 up(&priv->ieee80211->ips_sem);
4563}
ecdfa446 4564#endif
ecdfa446 4565
5e1ad18a 4566static void rtl819x_update_rxcounts(
ecdfa446
GKH		 4567 struct r8192_priv *priv,
4568 u32* TotalRxBcnNum,
4569 u32* TotalRxDataNum
4570)
4571{
4572 u16 SlotIndex;
4573 u8 i;
4574
4575 *TotalRxBcnNum = 0;
4576 *TotalRxDataNum = 0;
4577
4578 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
4579 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
4580 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
4581 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
4582 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
4583 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
4584 }
4585}
4586
4587
559fba5e 4588static void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 4589{
4590 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
4591 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
4592 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4593 struct ieee80211_device* ieee = priv->ieee80211;
4594 RESET_TYPE ResetType = RESET_TYPE_NORESET;
4595 static u8 check_reset_cnt=0;
4596 unsigned long flags;
4597 bool bBusyTraffic = false;
4598 static u8 last_time = 0;
65a43784 4599 bool bEnterPS = false;
4600
f500e256 4601 if ((!priv->up) || priv->bHwRadioOff)
65a43784 4602 return;
4603
ecdfa446
GKH		 4604 if(!priv->up)
4605 return;
4606 hal_dm_watchdog(dev);
4607#ifdef ENABLE_IPS
4608// printk("watch_dog ENABLE_IPS\n");
4609 if(ieee->actscanning == false){
65a43784 4610 //printk("%d,%d,%d,%d\n", ieee->eRFPowerState, ieee->is_set_key, ieee->proto_stoppping, ieee->wx_set_enc);
207b58fb
MM		 4611 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
4612 (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&
65a43784 4613 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
ecdfa446 4614 if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
65a43784 4615 //printk("====================>haha:IPSEnter()\n");
ecdfa446
GKH		 4616 IPSEnter(dev);
4617 //ieee80211_stop_scan(priv->ieee80211);
4618 }
4619 }
4620 }
4621#endif
4622 {//to get busy traffic condition
4623 if(ieee->state == IEEE80211_LINKED)
4624 {
65a43784 4625 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
4626 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
ecdfa446
GKH		 4627 bBusyTraffic = true;
4628 }
4629
65a43784 4630#ifdef ENABLE_LPS
4631 //added by amy for Leisure PS
4632 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
4633 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
4634 {
4635 //printk("ieee->LinkDetectInfo.NumRxUnicastOkInPeriod is %d,ieee->LinkDetectInfo.NumTxOkInPeriod is %d\n",
4636 // ieee->LinkDetectInfo.NumRxUnicastOkInPeriod,ieee->LinkDetectInfo.NumTxOkInPeriod);
4637 bEnterPS= false;
4638 }
4639 else
4640 {
4641 bEnterPS= true;
4642 }
4643
4644 //printk("***bEnterPS = %d\n", bEnterPS);
4645 // LeisurePS only work in infra mode.
4646 if(bEnterPS)
4647 {
4648 LeisurePSEnter(dev);
4649 }
4650 else
4651 {
4652 LeisurePSLeave(dev);
4653 }
4654#endif
4655
4656 }
4657 else
4658 {
4659#ifdef ENABLE_LPS
4660 //RT_TRACE(COMP_LPS,"====>no link LPS leave\n");
4661 LeisurePSLeave(dev);
4662#endif
ecdfa446 4663 }
65a43784 4664
ecdfa446
GKH		 4665 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
4666 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
65a43784 4667 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
ecdfa446
GKH		 4668 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
4669 }
4670
4671
4672 //added by amy for AP roaming
4673 if (1)
4674 {
4675 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4676 {
4677 u32 TotalRxBcnNum = 0;
4678 u32 TotalRxDataNum = 0;
4679
4680 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
4681 if((TotalRxBcnNum+TotalRxDataNum) == 0)
4682 {
4683 if( ieee->eRFPowerState == eRfOff)
4684 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
4685 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
65a43784 4686 // Dot11d_Reset(dev);
ecdfa446
GKH		 4687 ieee->state = IEEE80211_ASSOCIATING;
4688 notify_wx_assoc_event(priv->ieee80211);
65a43784 4689 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
ecdfa446
GKH		 4690 ieee->is_roaming = true;
4691 ieee->is_set_key = false;
65a43784 4692 ieee->link_change(dev);
4693 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 4694 }
4695 }
4696 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
4697 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
4698
4699 }
ecdfa446
GKH		 4700 //check if reset the driver
4701 spin_lock_irqsave(&priv->tx_lock,flags);
4702 if(check_reset_cnt++ >= 3 && !ieee->is_roaming && (last_time != 1))
4703 {
4704 ResetType = rtl819x_ifcheck_resetornot(dev);
4705 check_reset_cnt = 3;
4706 //DbgPrint("Start to check silent reset\n");
4707 }
4708 spin_unlock_irqrestore(&priv->tx_lock,flags);
4709 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
4710 {
4711 priv->ResetProgress = RESET_TYPE_NORMAL;
4712 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
4713 return;
4714 }
4715 /* disable silent reset temply 2008.9.11*/
4716#if 1
4717 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
4718 {
4719 last_time = 1;
4720 rtl819x_ifsilentreset(dev);
4721 }
4722 else
4723 last_time = 0;
4724#endif
4725 priv->force_reset = false;
4726 priv->bForcedSilentReset = false;
4727 priv->bResetInProgress = false;
4728 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
4729
4730}
4731
4732void watch_dog_timer_callback(unsigned long data)
4733{
4734 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
ecdfa446 4735 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 4736 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
4737
4738}
5b3b1a7b
MM		 4739
4740static int _rtl8192_up(struct net_device *dev)
ecdfa446
GKH		 4741{
4742 struct r8192_priv *priv = ieee80211_priv(dev);
4743 //int i;
4744 RT_STATUS init_status = RT_STATUS_SUCCESS;
4745 priv->up=1;
4746 priv->ieee80211->ieee_up=1;
65a43784 4747 priv->bdisable_nic = false; //YJ,add,091111
ecdfa446
GKH		 4748 RT_TRACE(COMP_INIT, "Bringing up iface");
4749
4750 init_status = rtl8192_adapter_start(dev);
4751 if(init_status != RT_STATUS_SUCCESS)
4752 {
4753 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
4754 return -1;
4755 }
4756 RT_TRACE(COMP_INIT, "start adapter finished\n");
4757#ifdef RTL8192E
4758 if(priv->ieee80211->eRFPowerState!=eRfOn)
4759 MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
4760#endif
4761 if(priv->ieee80211->state != IEEE80211_LINKED)
4762 ieee80211_softmac_start_protocol(priv->ieee80211);
4763 ieee80211_reset_queue(priv->ieee80211);
4764 watch_dog_timer_callback((unsigned long) dev);
4765 if(!netif_queue_stopped(dev))
4766 netif_start_queue(dev);
4767 else
4768 netif_wake_queue(dev);
4769
4770 return 0;
4771}
4772
4773
5e1ad18a 4774static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 4775{
4776 struct r8192_priv *priv = ieee80211_priv(dev);
4777 int ret;
4778
4779 down(&priv->wx_sem);
4780 ret = rtl8192_up(dev);
4781 up(&priv->wx_sem);
4782 return ret;
4783
4784}
4785
4786
4787int rtl8192_up(struct net_device *dev)
4788{
4789 struct r8192_priv *priv = ieee80211_priv(dev);
4790
4791 if (priv->up == 1) return -1;
4792
4793 return _rtl8192_up(dev);
4794}
4795
4796
5e1ad18a 4797static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 4798{
4799 struct r8192_priv *priv = ieee80211_priv(dev);
4800 int ret;
4801
4802 down(&priv->wx_sem);
4803
4804 ret = rtl8192_down(dev);
4805
4806 up(&priv->wx_sem);
4807
4808 return ret;
4809
4810}
4811
4812int rtl8192_down(struct net_device *dev)
4813{
4814 struct r8192_priv *priv = ieee80211_priv(dev);
16d74da0 4815
ecdfa446
GKH		 4816 if (priv->up == 0) return -1;
4817
65a43784 4818#ifdef ENABLE_LPS
4819 //LZM for PS-Poll AID issue. 090429
4820 if(priv->ieee80211->state == IEEE80211_LINKED)
4821 LeisurePSLeave(dev);
4822#endif
4823
ecdfa446
GKH		 4824 priv->up=0;
4825 priv->ieee80211->ieee_up = 0;
4826 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
4827/* FIXME */
4828 if (!netif_queue_stopped(dev))
4829 netif_stop_queue(dev);
4830
4831 rtl8192_irq_disable(dev);
ecdfa446
GKH		 4832 rtl8192_cancel_deferred_work(priv);
4833 deinit_hal_dm(dev);
4834 del_timer_sync(&priv->watch_dog_timer);
4835
65a43784 4836 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
4837
4838 rtl8192_halt_adapter(dev,false);
ecdfa446
GKH		 4839 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
4840
4841 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
4842
16d74da0 4843 return 0;
ecdfa446
GKH		 4844}
4845
4846
4847void rtl8192_commit(struct net_device *dev)
4848{
4849 struct r8192_priv *priv = ieee80211_priv(dev);
4850
4851 if (priv->up == 0) return ;
4852
4853
65a43784 4854 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446
GKH		 4855
4856 rtl8192_irq_disable(dev);
65a43784 4857 rtl8192_halt_adapter(dev,true);
ecdfa446
GKH		 4858 _rtl8192_up(dev);
4859}
4860
5b3b1a7b 4861static void rtl8192_restart(struct work_struct *work)
ecdfa446
GKH		 4862{
4863 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
4864 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4865
4866 down(&priv->wx_sem);
4867
4868 rtl8192_commit(dev);
4869
4870 up(&priv->wx_sem);
4871}
4872
4873static void r8192_set_multicast(struct net_device *dev)
4874{
4875 struct r8192_priv *priv = ieee80211_priv(dev);
4876 short promisc;
4877
4878 //down(&priv->wx_sem);
4879
4880 /* FIXME FIXME */
4881
4882 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4883
4884 if (promisc != priv->promisc) {
4885 ;
4886 // rtl8192_commit(dev);
4887 }
4888
4889 priv->promisc = promisc;
4890
4891 //schedule_work(&priv->reset_wq);
4892 //up(&priv->wx_sem);
4893}
4894
4895
5e1ad18a 4896static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 4897{
4898 struct r8192_priv *priv = ieee80211_priv(dev);
4899 struct sockaddr *addr = mac;
4900
4901 down(&priv->wx_sem);
4902
4903 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
4904
ecdfa446 4905 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 4906 up(&priv->wx_sem);
4907
4908 return 0;
4909}
4910
4911/* based on ipw2200 driver */
5e1ad18a 4912static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 4913{
4914 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4915 struct iwreq *wrq = (struct iwreq *)rq;
4916 int ret=-1;
4917 struct ieee80211_device *ieee = priv->ieee80211;
4918 u32 key[4];
4919 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
4920 struct iw_point *p = &wrq->u.data;
4921 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
4922
4923 down(&priv->wx_sem);
4924
4925
4926 if (p->length < sizeof(struct ieee_param) || !p->pointer){
4927 ret = -EINVAL;
4928 goto out;
4929 }
4930
32414878 4931 ipw = kmalloc(p->length, GFP_KERNEL);
ecdfa446
GKH		 4932 if (ipw == NULL){
4933 ret = -ENOMEM;
4934 goto out;
4935 }
4936 if (copy_from_user(ipw, p->pointer, p->length)) {
4937 kfree(ipw);
4938 ret = -EFAULT;
4939 goto out;
4940 }
4941
4942 switch (cmd) {
4943 case RTL_IOCTL_WPA_SUPPLICANT:
4944 //parse here for HW security
4945 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
4946 {
4947 if (ipw->u.crypt.set_tx)
4948 {
4949 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4950 ieee->pairwise_key_type = KEY_TYPE_CCMP;
4951 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4952 ieee->pairwise_key_type = KEY_TYPE_TKIP;
4953 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4954 {
4955 if (ipw->u.crypt.key_len == 13)
4956 ieee->pairwise_key_type = KEY_TYPE_WEP104;
4957 else if (ipw->u.crypt.key_len == 5)
4958 ieee->pairwise_key_type = KEY_TYPE_WEP40;
4959 }
4960 else
4961 ieee->pairwise_key_type = KEY_TYPE_NA;
4962
4963 if (ieee->pairwise_key_type)
4964 {
4965 memcpy((u8*)key, ipw->u.crypt.key, 16);
4966 EnableHWSecurityConfig8192(dev);
4967 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
4968 //added by WB.
4969 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4970 if (ieee->auth_mode != 2) //LEAP WEP will never set this.
4971 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4972 }
4973 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
4974 write_nic_byte(dev, 0x173, 1); //fix aes bug
4975 }
4976
4977 }
4978 else //if (ipw->u.crypt.idx) //group key use idx > 0
4979 {
4980 memcpy((u8*)key, ipw->u.crypt.key, 16);
4981 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4982 ieee->group_key_type= KEY_TYPE_CCMP;
4983 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4984 ieee->group_key_type = KEY_TYPE_TKIP;
4985 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4986 {
4987 if (ipw->u.crypt.key_len == 13)
4988 ieee->group_key_type = KEY_TYPE_WEP104;
4989 else if (ipw->u.crypt.key_len == 5)
4990 ieee->group_key_type = KEY_TYPE_WEP40;
4991 }
4992 else
4993 ieee->group_key_type = KEY_TYPE_NA;
4994
4995 if (ieee->group_key_type)
4996 {
4997 setKey( dev,
4998 ipw->u.crypt.idx,
4999 ipw->u.crypt.idx, //KeyIndex
5000 ieee->group_key_type, //KeyType
5001 broadcast_addr, //MacAddr
5002 0, //DefaultKey
5003 key); //KeyContent
5004 }
5005 }
5006 }
5007#ifdef JOHN_DEBUG
5008 //john's test 0711
5009 {
5010 int i;
5011 printk("@@ wrq->u pointer = ");
5012 for(i=0;i<wrq->u.data.length;i++){
5013 if(i%10==0) printk("\n");
5014 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5015 }
5016 printk("\n");
5017 }
5018#endif /*JOHN_DEBUG*/
5019 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5020 break;
5021
5022 default:
5023 ret = -EOPNOTSUPP;
5024 break;
5025 }
5026
5027 kfree(ipw);
5028out:
5029 up(&priv->wx_sem);
5030
5031 return ret;
5032}
5033
5e1ad18a 5034static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 5035{
5036 u8 ret_rate = 0x02;
5037
5038 if(!bIsHT) {
5039 switch(rate) {
5040 case DESC90_RATE1M: ret_rate = MGN_1M; break;
5041 case DESC90_RATE2M: ret_rate = MGN_2M; break;
5042 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
5043 case DESC90_RATE11M: ret_rate = MGN_11M; break;
5044 case DESC90_RATE6M: ret_rate = MGN_6M; break;
5045 case DESC90_RATE9M: ret_rate = MGN_9M; break;
5046 case DESC90_RATE12M: ret_rate = MGN_12M; break;
5047 case DESC90_RATE18M: ret_rate = MGN_18M; break;
5048 case DESC90_RATE24M: ret_rate = MGN_24M; break;
5049 case DESC90_RATE36M: ret_rate = MGN_36M; break;
5050 case DESC90_RATE48M: ret_rate = MGN_48M; break;
5051 case DESC90_RATE54M: ret_rate = MGN_54M; break;
5052
5053 default:
5054 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5055 break;
5056 }
5057
5058 } else {
5059 switch(rate) {
5060 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
5061 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
5062 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
5063 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
5064 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
5065 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
5066 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
5067 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
5068 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
5069 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
5070 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
5071 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
5072 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
5073 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
5074 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
5075 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
5076 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
5077
5078 default:
5079 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
5080 break;
5081 }
5082 }
5083
5084 return ret_rate;
5085}
5086
5087/**
5088 * Function: UpdateRxPktTimeStamp
5089 * Overview: Recored down the TSF time stamp when receiving a packet
5090 *
5091 * Input:
5092 * PADAPTER Adapter
5093 * PRT_RFD pRfd,
5094 *
5095 * Output:
5096 * PRT_RFD pRfd
5097 * (pRfd->Status.TimeStampHigh is updated)
5098 * (pRfd->Status.TimeStampLow is updated)
5099 * Return:
5100 * None
5101 */
5e1ad18a 5102static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
ecdfa446
GKH		 5103{
5104 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5105
5106 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
5107 stats->mac_time[0] = priv->LastRxDescTSFLow;
5108 stats->mac_time[1] = priv->LastRxDescTSFHigh;
5109 } else {
5110 priv->LastRxDescTSFLow = stats->mac_time[0];
5111 priv->LastRxDescTSFHigh = stats->mac_time[1];
5112 }
5113}
5114
5e1ad18a 5115static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 5116{
5117 long signal_power; // in dBm.
5118
5119 // Translate to dBm (x=0.5y-95).
5120 signal_power = (long)((signal_strength_index + 1) >> 1);
5121 signal_power -= 95;
5122
5123 return signal_power;
5124}
5125
5126//
5127// Description:
5128// Update Rx signal related information in the packet reeived
5129// to RxStats. User application can query RxStats to realize
5130// current Rx signal status.
5131//
5132// Assumption:
5133// In normal operation, user only care about the information of the BSS
5134// and we shall invoke this function if the packet received is from the BSS.
5135//
5e1ad18a 5136static void
ecdfa446
GKH		 5137rtl819x_update_rxsignalstatistics8190pci(
5138 struct r8192_priv * priv,
5139 struct ieee80211_rx_stats * pprevious_stats
5140 )
5141{
5142 int weighting = 0;
5143
5144 //2 <ToDo> Update Rx Statistics (such as signal strength and signal quality).
5145
5146 // Initila state
5147 if(priv->stats.recv_signal_power == 0)
5148 priv->stats.recv_signal_power = pprevious_stats->RecvSignalPower;
5149
5150 // To avoid the past result restricting the statistics sensitivity, weight the current power (5/6) to speed up the
5151 // reaction of smoothed Signal Power.
5152 if(pprevious_stats->RecvSignalPower > priv->stats.recv_signal_power)
5153 weighting = 5;
5154 else if(pprevious_stats->RecvSignalPower < priv->stats.recv_signal_power)
5155 weighting = (-5);
5156 //
5157 // We need more correct power of received packets and the "SignalStrength" of RxStats have been beautified or translated,
5158 // so we record the correct power in Dbm here. By Bruce, 2008-03-07.
5159 //
5160 priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pprevious_stats->RecvSignalPower + weighting) / 6;
5161}
5162
5e1ad18a 5163static void
ecdfa446
GKH		 5164rtl8190_process_cck_rxpathsel(
5165 struct r8192_priv * priv,
5166 struct ieee80211_rx_stats * pprevious_stats
5167 )
5168{
5169#ifdef RTL8190P //Only 90P 2T4R need to check
5170 char last_cck_adc_pwdb[4]={0,0,0,0};
5171 u8 i;
5172//cosa add for Rx path selection
5173 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
5174 {
5175 if(pprevious_stats->bIsCCK &&
5176 (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
5177 {
5178 /* record the cck adc_pwdb to the sliding window. */
5179 if(priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
5180 {
5181 priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
5182 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5183 {
5184 last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
5185 priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
5186 }
5187 }
5188 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5189 {
5190 priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
5191 priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
5192 }
5193 priv->stats.cck_adc_pwdb.index++;
5194 if(priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
5195 priv->stats.cck_adc_pwdb.index = 0;
5196
5197 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5198 {
5199 DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
5200 }
5201
5202 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5203 {
5204 if(pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
5205 {
5206 priv->undecorated_smoothed_cck_adc_pwdb[i] =
5207 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
5208 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
5209 priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
5210 }
5211 else
5212 {
5213 priv->undecorated_smoothed_cck_adc_pwdb[i] =
5214 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
5215 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
5216 }
5217 }
5218 }
5219 }
5220#endif
5221}
5222
5223
5224/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
5225 be a local static. Otherwise, it may increase when we return from S3/S4. The
5226 value will be kept in memory or disk. We must delcare the value in adapter
5227 and it will be reinitialized when return from S3/S4. */
5e1ad18a 5228static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 5229{
5230 bool bcheck = false;
5231 u8 rfpath;
5232 u32 nspatial_stream, tmp_val;
5233 //u8 i;
5234 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
5235 static u32 slide_evm_index=0, slide_evm_statistics=0;
5236 static u32 last_rssi=0, last_evm=0;
5237 //cosa add for rx path selection
5238// static long slide_cck_adc_pwdb_index=0, slide_cck_adc_pwdb_statistics=0;
5239// static char last_cck_adc_pwdb[4]={0,0,0,0};
5240 //cosa add for beacon rssi smoothing
5241 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
5242 static u32 last_beacon_adc_pwdb=0;
5243
5244 struct ieee80211_hdr_3addr *hdr;
5245 u16 sc ;
5246 unsigned int frag,seq;
5247 hdr = (struct ieee80211_hdr_3addr *)buffer;
5248 sc = le16_to_cpu(hdr->seq_ctl);
5249 frag = WLAN_GET_SEQ_FRAG(sc);
5250 seq = WLAN_GET_SEQ_SEQ(sc);
5251 //cosa add 04292008 to record the sequence number
5252 pcurrent_stats->Seq_Num = seq;
5253 //
5254 // Check whether we should take the previous packet into accounting
5255 //
5256 if(!pprevious_stats->bIsAMPDU)
5257 {
5258 // if previous packet is not aggregated packet
5259 bcheck = true;
5260 }else
5261 {
5262//remve for that we don't use AMPDU to calculate PWDB,because the reported PWDB of some AP is fault.
5263#if 0
5264 // if previous packet is aggregated packet, and current packet
5265 // (1) is not AMPDU
5266 // (2) is the first packet of one AMPDU
5267 // that means the previous packet is the last one aggregated packet
5268 if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
5269 bcheck = true;
5270#endif
5271 }
5272
5273 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
5274 {
5275 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
5276 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
5277 priv->stats.slide_rssi_total -= last_rssi;
5278 }
5279 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
5280
5281 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
5282 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
5283 slide_rssi_index = 0;
5284
5285 // <1> Showed on UI for user, in dbm
5286 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
5287 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
5288 pcurrent_stats->rssi = priv->stats.signal_strength;
5289 //
5290 // If the previous packet does not match the criteria, neglect it
5291 //
5292 if(!pprevious_stats->bPacketMatchBSSID)
5293 {
5294 if(!pprevious_stats->bToSelfBA)
5295 return;
5296 }
5297
5298 if(!bcheck)
5299 return;
5300
5301 rtl8190_process_cck_rxpathsel(priv,pprevious_stats);
5302
5303 //
5304 // Check RSSI
5305 //
5306 priv->stats.num_process_phyinfo++;
5307#if 0
5308 /* record the general signal strength to the sliding window. */
5309 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
5310 {
5311 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
5312 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
5313 priv->stats.slide_rssi_total -= last_rssi;
5314 }
5315 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
5316
5317 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
5318 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
5319 slide_rssi_index = 0;
5320
5321 // <1> Showed on UI for user, in dbm
5322 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
5323 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
5324
5325#endif
5326 // <2> Showed on UI for engineering
5327 // hardware does not provide rssi information for each rf path in CCK
5328 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
5329 {
5330 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
5331 {
5332 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
5333 continue;
5334 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
5335 //Fixed by Jacken 2008-03-20
5336 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
5337 {
5338 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
5339 //DbgPrint("MIMO RSSI initialize \n");
5340 }
5341 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
5342 {
5343 priv->stats.rx_rssi_percentage[rfpath] =
5344 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
5345 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
5346 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
5347 }
5348 else
5349 {
5350 priv->stats.rx_rssi_percentage[rfpath] =
5351 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
5352 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
5353 }
5354 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
5355 }
5356 }
5357
5358
5359 //
5360 // Check PWDB.
5361 //
5362 //cosa add for beacon rssi smoothing by average.
5363 if(pprevious_stats->bPacketBeacon)
5364 {
5365 /* record the beacon pwdb to the sliding window. */
5366 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
5367 {
5368 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
5369 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
5370 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
5371 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
5372 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
5373 }
5374 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
5375 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
5376 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
5377 slide_beacon_adc_pwdb_index++;
5378 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
5379 slide_beacon_adc_pwdb_index = 0;
5380 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
5381 if(pprevious_stats->RxPWDBAll >= 3)
5382 pprevious_stats->RxPWDBAll -= 3;
5383 }
5384
5385 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
5386 pprevious_stats->bIsCCK? "CCK": "OFDM",
5387 pprevious_stats->RxPWDBAll);
5388
5389 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5390 {
5391 if(priv->undecorated_smoothed_pwdb < 0) // initialize
5392 {
5393 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
5394 //DbgPrint("First pwdb initialize \n");
5395 }
5396#if 1
5397 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
5398 {
5399 priv->undecorated_smoothed_pwdb =
5400 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5401 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5402 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
5403 }
5404 else
5405 {
5406 priv->undecorated_smoothed_pwdb =
5407 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5408 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5409 }
5410#else
5411 //Fixed by Jacken 2008-03-20
5412 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
5413 {
5414 pHalData->UndecoratedSmoothedPWDB =
5415 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5416 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
5417 }
5418 else
5419 {
5420 pHalData->UndecoratedSmoothedPWDB =
5421 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5422 }
5423#endif
5424 rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
5425 }
5426
5427 //
5428 // Check EVM
5429 //
5430 /* record the general EVM to the sliding window. */
5431 if(pprevious_stats->SignalQuality == 0)
5432 {
5433 }
5434 else
5435 {
5436 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
5437 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
5438 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
5439 last_evm = priv->stats.slide_evm[slide_evm_index];
5440 priv->stats.slide_evm_total -= last_evm;
5441 }
5442
5443 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
5444
5445 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
5446 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
5447 slide_evm_index = 0;
5448
5449 // <1> Showed on UI for user, in percentage.
5450 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
5451 priv->stats.signal_quality = tmp_val;
5452 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
5453 priv->stats.last_signal_strength_inpercent = tmp_val;
5454 }
5455
5456 // <2> Showed on UI for engineering
5457 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5458 {
5459 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
5460 {
5461 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
5462 {
5463 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
5464 {
5465 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
5466 }
5467 priv->stats.rx_evm_percentage[nspatial_stream] =
5468 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
5469 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
5470 }
5471 }
5472 }
5473 }
5474
5475}
5476
5477/*-----------------------------------------------------------------------------
5478 * Function: rtl819x_query_rxpwrpercentage()
5479 *
5480 * Overview:
5481 *
5482 * Input: char antpower
5483 *
5484 * Output: NONE
5485 *
5486 * Return: 0-100 percentage
5487 *
5488 * Revised History:
5489 * When Who Remark
5490 * 05/26/2008 amy Create Version 0 porting from windows code.
5491 *
5492 *---------------------------------------------------------------------------*/
5493static u8 rtl819x_query_rxpwrpercentage(
5494 char antpower
5495 )
5496{
5497 if ((antpower <= -100) || (antpower >= 20))
5498 {
5499 return 0;
5500 }
5501 else if (antpower >= 0)
5502 {
5503 return 100;
5504 }
5505 else
5506 {
5507 return (100+antpower);
5508 }
5509
d5abdf72 5510}
ecdfa446
GKH		 5511
5512static u8
5513rtl819x_evm_dbtopercentage(
5514 char value
5515 )
5516{
5517 char ret_val;
5518
5519 ret_val = value;
5520
5521 if(ret_val >= 0)
5522 ret_val = 0;
5523 if(ret_val <= -33)
5524 ret_val = -33;
5525 ret_val = 0 - ret_val;
5526 ret_val*=3;
5527 if(ret_val == 99)
5528 ret_val = 100;
c6eae677 5529 return ret_val;
ecdfa446
GKH		 5530}
5531
5532//
5533// Description:
5534// We want good-looking for signal strength/quality
5535// 2007/7/19 01:09, by cosa.
5536//
5e1ad18a 5537static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 5538{
5539 long retsig;
5540
5541 // Step 1. Scale mapping.
5542 if(currsig >= 61 && currsig <= 100)
5543 {
5544 retsig = 90 + ((currsig - 60) / 4);
5545 }
5546 else if(currsig >= 41 && currsig <= 60)
5547 {
5548 retsig = 78 + ((currsig - 40) / 2);
5549 }
5550 else if(currsig >= 31 && currsig <= 40)
5551 {
5552 retsig = 66 + (currsig - 30);
5553 }
5554 else if(currsig >= 21 && currsig <= 30)
5555 {
5556 retsig = 54 + (currsig - 20);
5557 }
5558 else if(currsig >= 5 && currsig <= 20)
5559 {
5560 retsig = 42 + (((currsig - 5) * 2) / 3);
5561 }
5562 else if(currsig == 4)
5563 {
5564 retsig = 36;
5565 }
5566 else if(currsig == 3)
5567 {
5568 retsig = 27;
5569 }
5570 else if(currsig == 2)
5571 {
5572 retsig = 18;
5573 }
5574 else if(currsig == 1)
5575 {
5576 retsig = 9;
5577 }
5578 else
5579 {
5580 retsig = currsig;
5581 }
5582
5583 return retsig;
5584}
5585
5586static void rtl8192_query_rxphystatus(
5587 struct r8192_priv * priv,
5588 struct ieee80211_rx_stats * pstats,
5589 prx_desc_819x_pci pdesc,
5590 prx_fwinfo_819x_pci pdrvinfo,
5591 struct ieee80211_rx_stats * precord_stats,
5592 bool bpacket_match_bssid,
5593 bool bpacket_toself,
5594 bool bPacketBeacon,
5595 bool bToSelfBA
5596 )
5597{
5598 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
5599 phy_sts_ofdm_819xpci_t* pofdm_buf;
5600 phy_sts_cck_819xpci_t * pcck_buf;
5601 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
5602 u8 *prxpkt;
5603 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
5604 char rx_pwr[4], rx_pwr_all=0;
5605 //long rx_avg_pwr = 0;
5606 char rx_snrX, rx_evmX;
5607 u8 evm, pwdb_all;
5608 u32 RSSI, total_rssi=0;//, total_evm=0;
5609// long signal_strength_index = 0;
5610 u8 is_cck_rate=0;
5611 u8 rf_rx_num = 0;
5612
5613 /* 2007/07/04 MH For OFDM RSSI. For high power or not. */
5614 static u8 check_reg824 = 0;
5615 static u32 reg824_bit9 = 0;
5616
5617 priv->stats.numqry_phystatus++;
5618
5619 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
5620
5621 // Record it for next packet processing
5622 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
5623 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
5624 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
5625 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
5626 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
5627 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
5628 /*2007.08.30 requested by SD3 Jerry */
5629 if(check_reg824 == 0)
5630 {
5631 reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
5632 check_reg824 = 1;
5633 }
5634
5635
5636 prxpkt = (u8*)pdrvinfo;
5637
5638 /* Move pointer to the 16th bytes. Phy status start address. */
5639 prxpkt += sizeof(rx_fwinfo_819x_pci);
5640
5641 /* Initial the cck and ofdm buffer pointer */
5642 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
5643 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
5644
5645 pstats->RxMIMOSignalQuality[0] = -1;
5646 pstats->RxMIMOSignalQuality[1] = -1;
5647 precord_stats->RxMIMOSignalQuality[0] = -1;
5648 precord_stats->RxMIMOSignalQuality[1] = -1;
5649
5650 if(is_cck_rate)
5651 {
5652 //
5653 // (1)Hardware does not provide RSSI for CCK
5654 //
5655
5656 //
5657 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5658 //
5659 u8 report;//, cck_agc_rpt;
5660#ifdef RTL8190P
5661 u8 tmp_pwdb;
5662 char cck_adc_pwdb[4];
5663#endif
5664 priv->stats.numqry_phystatusCCK++;
5665
5666#ifdef RTL8190P //Only 90P 2T4R need to check
5667 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid)
5668 {
5669 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5670 {
5671 tmp_pwdb = pcck_buf->adc_pwdb_X[i];
5672 cck_adc_pwdb[i] = (char)tmp_pwdb;
5673 cck_adc_pwdb[i] /= 2;
5674 pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i];
5675 //DbgPrint("RF-%d tmp_pwdb = 0x%x, cck_adc_pwdb = %d", i, tmp_pwdb, cck_adc_pwdb[i]);
5676 }
5677 }
5678#endif
5679
5680 if(!reg824_bit9)
5681 {
5682 report = pcck_buf->cck_agc_rpt & 0xc0;
5683 report = report>>6;
5684 switch(report)
5685 {
5686 //Fixed by Jacken from Bryant 2008-03-20
5687 //Original value is -38 , -26 , -14 , -2
5688 //Fixed value is -35 , -23 , -11 , 6
5689 case 0x3:
5690 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
5691 break;
5692 case 0x2:
5693 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
5694 break;
5695 case 0x1:
5696 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
5697 break;
5698 case 0x0:
5699 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
5700 break;
5701 }
5702 }
5703 else
5704 {
5705 report = pcck_buf->cck_agc_rpt & 0x60;
5706 report = report>>5;
5707 switch(report)
5708 {
5709 case 0x3:
5710 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5711 break;
5712 case 0x2:
5713 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
5714 break;
5715 case 0x1:
5716 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5717 break;
5718 case 0x0:
5719 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5720 break;
5721 }
5722 }
5723
5724 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5725 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5726 pstats->RecvSignalPower = rx_pwr_all;
5727
5728 //
5729 // (3) Get Signal Quality (EVM)
5730 //
5731 if(bpacket_match_bssid)
5732 {
5733 u8 sq;
5734
5735 if(pstats->RxPWDBAll > 40)
5736 {
5737 sq = 100;
5738 }else
5739 {
5740 sq = pcck_buf->sq_rpt;
5741
5742 if(pcck_buf->sq_rpt > 64)
5743 sq = 0;
5744 else if (pcck_buf->sq_rpt < 20)
5745 sq = 100;
5746 else
5747 sq = ((64-sq) * 100) / 44;
5748 }
5749 pstats->SignalQuality = precord_stats->SignalQuality = sq;
5750 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
5751 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
5752 }
5753 }
5754 else
5755 {
5756 priv->stats.numqry_phystatusHT++;
5757 //
5758 // (1)Get RSSI for HT rate
5759 //
5760 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5761 {
5762 // 2008/01/30 MH we will judge RF RX path now.
5763 if (priv->brfpath_rxenable[i])
5764 rf_rx_num++;
5765 //else
5766 //continue;
5767
5768 //Fixed by Jacken from Bryant 2008-03-20
5769 //Original value is 106
5770#ifdef RTL8190P //Modify by Jacken 2008/03/31
5771 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
5772#else
5773 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
5774#endif
5775
5776 //Get Rx snr value in DB
5777 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
5778 rx_snrX = (char)(tmp_rxsnr);
5779 rx_snrX /= 2;
5780 priv->stats.rxSNRdB[i] = (long)rx_snrX;
5781
5782 /* Translate DBM to percentage. */
5783 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
5784 if (priv->brfpath_rxenable[i])
5785 total_rssi += RSSI;
5786
5787 /* Record Signal Strength for next packet */
5788 if(bpacket_match_bssid)
5789 {
5790 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
5791 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
5792 }
5793 }
5794
5795
5796 //
5797 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5798 //
5799 //Fixed by Jacken from Bryant 2008-03-20
5800 //Original value is 106
5801 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
5802 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5803
5804 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5805 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
5806 pstats->RecvSignalPower = rx_pwr_all;
5807 //
5808 // (3)EVM of HT rate
5809 //
5810 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
5811 pdrvinfo->RxRate<=DESC90_RATEMCS15)
5812 max_spatial_stream = 2; //both spatial stream make sense
5813 else
5814 max_spatial_stream = 1; //only spatial stream 1 makes sense
5815
5816 for(i=0; i<max_spatial_stream; i++)
5817 {
5818 tmp_rxevm = pofdm_buf->rxevm_X[i];
5819 rx_evmX = (char)(tmp_rxevm);
5820
5821 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
5822 // fill most significant bit to "zero" when doing shifting operation which may change a negative
5823 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
5824 rx_evmX /= 2; //dbm
5825
5826 evm = rtl819x_evm_dbtopercentage(rx_evmX);
5827#if 0
5828 EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100
5829#endif
5830 if(bpacket_match_bssid)
5831 {
5832 if(i==0) // Fill value in RFD, Get the first spatial stream only
5833 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
5834 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
5835 }
5836 }
5837
5838
5839 /* record rx statistics for debug */
5840 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
5841 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
5842 if(pdrvinfo->BW) //40M channel
5843 priv->stats.received_bwtype[1+prxsc->rxsc]++;
5844 else //20M channel
5845 priv->stats.received_bwtype[0]++;
5846 }
5847
5848 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
5849 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
5850 if(is_cck_rate)
5851 {
5852 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
5853
5854 }
5855 else
5856 {
5857 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
5858 // We can judge RX path number now.
5859 if (rf_rx_num != 0)
5860 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
5861 }
d5abdf72 5862}
ecdfa446 5863
5e1ad18a 5864static void
ecdfa446
GKH		 5865rtl8192_record_rxdesc_forlateruse(
5866 struct ieee80211_rx_stats * psrc_stats,
5867 struct ieee80211_rx_stats * ptarget_stats
5868)
5869{
5870 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
5871 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
5872 //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
5873}
5874
5875
5876
5e1ad18a 5877static void TranslateRxSignalStuff819xpci(struct net_device *dev,
ecdfa446
GKH		 5878 struct sk_buff *skb,
5879 struct ieee80211_rx_stats * pstats,
5880 prx_desc_819x_pci pdesc,
5881 prx_fwinfo_819x_pci pdrvinfo)
5882{
5883 // TODO: We must only check packet for current MAC address. Not finish
5884 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5885 bool bpacket_match_bssid, bpacket_toself;
5886 bool bPacketBeacon=false, bToSelfBA=false;
5887 static struct ieee80211_rx_stats previous_stats;
5888 struct ieee80211_hdr_3addr *hdr;
5889 u16 fc,type;
5890
5891 // Get Signal Quality for only RX data queue (but not command queue)
5892
5893 u8* tmp_buf;
5894 u8 *praddr;
5895
5896 /* Get MAC frame start address. */
5897 tmp_buf = skb->data;
5898
5899 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
5900 fc = le16_to_cpu(hdr->frame_ctl);
5901 type = WLAN_FC_GET_TYPE(fc);
5902 praddr = hdr->addr1;
5903
5904 /* Check if the received packet is acceptabe. */
5905 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
5906 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
5907 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
5908 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5909#if 1//cosa
5910 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
5911 {
5912 bPacketBeacon = true;
5913 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
5914 }
5915 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
5916 {
5917 if((eqMacAddr(praddr,dev->dev_addr)))
5918 bToSelfBA = true;
5919 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
5920 }
5921
5922#endif
5923 if(bpacket_match_bssid)
5924 {
5925 priv->stats.numpacket_matchbssid++;
5926 }
5927 if(bpacket_toself){
5928 priv->stats.numpacket_toself++;
5929 }
5930 //
5931 // Process PHY information for previous packet (RSSI/PWDB/EVM)
5932 //
5933 // Because phy information is contained in the last packet of AMPDU only, so driver
5934 // should process phy information of previous packet
5935 rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
5936 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
5937 bpacket_toself ,bPacketBeacon, bToSelfBA);
5938 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
5939
5940}
5941
5942
5e1ad18a 5943static void rtl8192_tx_resume(struct net_device *dev)
ecdfa446
GKH		 5944{
5945 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5946 struct ieee80211_device *ieee = priv->ieee80211;
5947 struct sk_buff *skb;
5948 int queue_index;
5949
5950 for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
5951 while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
5952 (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
5953 /* 1. dequeue the packet from the wait queue */
5954 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
5955 /* 2. tx the packet directly */
5956 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
5957 #if 0
5958 if(queue_index!=MGNT_QUEUE) {
5959 ieee->stats.tx_packets++;
5960 ieee->stats.tx_bytes += skb->len;
5961 }
5962 #endif
5963 }
5964 }
5965}
5966
559fba5e 5967static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv)
ecdfa446
GKH		 5968{
5969 rtl8192_tx_resume(priv->ieee80211->dev);
5970}
5971
5972/**
5973* Function: UpdateReceivedRateHistogramStatistics
5974* Overview: Recored down the received data rate
5975*
5976* Input:
5977* PADAPTER Adapter
5978* PRT_RFD pRfd,
5979*
5980* Output:
5981* PRT_TCB Adapter
5982* (Adapter->RxStats.ReceivedRateHistogram[] is updated)
5983* Return:
5984* None
5985*/
5e1ad18a 5986static void UpdateReceivedRateHistogramStatistics8190(
ecdfa446
GKH		 5987 struct net_device *dev,
5988 struct ieee80211_rx_stats* pstats
5989 )
5990{
5991 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5992 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
5993 u32 rateIndex;
5994 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
5995
5996 /* 2007/03/09 MH We will not update rate of packet from rx cmd queue. */
5997 #if 0
5998 if (pRfd->queue_id == CMPK_RX_QUEUE_ID)
5999 return;
6000 #endif
6001 if(pstats->bCRC)
6002 rcvType = 2;
6003 else if(pstats->bICV)
6004 rcvType = 3;
6005
6006 if(pstats->bShortPreamble)
6007 preamble_guardinterval = 1;// short
6008 else
6009 preamble_guardinterval = 0;// long
6010
6011 switch(pstats->rate)
6012 {
6013 //
6014 // CCK rate
6015 //
6016 case MGN_1M: rateIndex = 0; break;
6017 case MGN_2M: rateIndex = 1; break;
6018 case MGN_5_5M: rateIndex = 2; break;
6019 case MGN_11M: rateIndex = 3; break;
6020 //
6021 // Legacy OFDM rate
6022 //
6023 case MGN_6M: rateIndex = 4; break;
6024 case MGN_9M: rateIndex = 5; break;
6025 case MGN_12M: rateIndex = 6; break;
6026 case MGN_18M: rateIndex = 7; break;
6027 case MGN_24M: rateIndex = 8; break;
6028 case MGN_36M: rateIndex = 9; break;
6029 case MGN_48M: rateIndex = 10; break;
6030 case MGN_54M: rateIndex = 11; break;
6031 //
6032 // 11n High throughput rate
6033 //
6034 case MGN_MCS0: rateIndex = 12; break;
6035 case MGN_MCS1: rateIndex = 13; break;
6036 case MGN_MCS2: rateIndex = 14; break;
6037 case MGN_MCS3: rateIndex = 15; break;
6038 case MGN_MCS4: rateIndex = 16; break;
6039 case MGN_MCS5: rateIndex = 17; break;
6040 case MGN_MCS6: rateIndex = 18; break;
6041 case MGN_MCS7: rateIndex = 19; break;
6042 case MGN_MCS8: rateIndex = 20; break;
6043 case MGN_MCS9: rateIndex = 21; break;
6044 case MGN_MCS10: rateIndex = 22; break;
6045 case MGN_MCS11: rateIndex = 23; break;
6046 case MGN_MCS12: rateIndex = 24; break;
6047 case MGN_MCS13: rateIndex = 25; break;
6048 case MGN_MCS14: rateIndex = 26; break;
6049 case MGN_MCS15: rateIndex = 27; break;
6050 default: rateIndex = 28; break;
6051 }
6052 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6053 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6054 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6055}
6056
5e1ad18a 6057static void rtl8192_rx(struct net_device *dev)
ecdfa446
GKH		 6058{
6059 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6060 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
6061 bool unicast_packet = false;
6062 struct ieee80211_rx_stats stats = {
6063 .signal = 0,
6064 .noise = -98,
6065 .rate = 0,
6066 .freq = IEEE80211_24GHZ_BAND,
6067 };
6068 unsigned int count = priv->rxringcount;
6069
6070 stats.nic_type = NIC_8192E;
6071
6072 while (count--) {
6073 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
6074 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
6075
6076 if (pdesc->OWN){
6077 /* wait data to be filled by hardware */
6078 return;
6079 } else {
6080 stats.bICV = pdesc->ICV;
6081 stats.bCRC = pdesc->CRC32;
6082 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
6083
6084 stats.Length = pdesc->Length;
6085 if(stats.Length < 24)
6086 stats.bHwError |= 1;
6087
6088 if(stats.bHwError) {
6089 stats.bShift = false;
6090
6091 if(pdesc->CRC32) {
6092 if (pdesc->Length <500)
6093 priv->stats.rxcrcerrmin++;
6094 else if (pdesc->Length >1000)
6095 priv->stats.rxcrcerrmax++;
6096 else
6097 priv->stats.rxcrcerrmid++;
6098 }
6099 goto done;
6100 } else {
6101 prx_fwinfo_819x_pci pDrvInfo = NULL;
6102 struct sk_buff *new_skb = dev_alloc_skb(priv->rxbuffersize);
6103
6104 if (unlikely(!new_skb)) {
6105 goto done;
6106 }
6107
6108 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
6109 stats.RxBufShift = ((pdesc->Shift)&0x03);
6110 stats.Decrypted = !pdesc->SWDec;
6111
ecdfa446 6112 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 6113 *((dma_addr_t *)skb->cb),
6114 priv->rxbuffersize,
6115 PCI_DMA_FROMDEVICE);
6116 skb_put(skb, pdesc->Length);
6117 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
6118 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
6119
6120 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
6121 stats.bShortPreamble = pDrvInfo->SPLCP;
6122
6123 /* it is debug only. It should be disabled in released driver.
6124 * 2007.1.11 by Emily
6125 * */
6126 UpdateReceivedRateHistogramStatistics8190(dev, &stats);
6127
6128 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
6129 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
6130
6131 stats.TimeStampLow = pDrvInfo->TSFL;
6132 stats.TimeStampHigh = read_nic_dword(dev, TSFR+4);
6133
6134 UpdateRxPktTimeStamp8190(dev, &stats);
6135
6136 //
6137 // Get Total offset of MPDU Frame Body
6138 //
6139 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
6140 stats.bShift = 1;
6141
6142 stats.RxIs40MHzPacket = pDrvInfo->BW;
6143
6144 /* ???? */
6145 TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
6146
6147 /* Rx A-MPDU */
6148 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
6149 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
6150 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
6151 skb_trim(skb, skb->len - 4/*sCrcLng*/);
6152 /* rx packets statistics */
6153 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
6154 unicast_packet = false;
6155
6156 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
6157 //TODO
6158 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
6159 //TODO
6160 }else {
6161 /* unicast packet */
6162 unicast_packet = true;
6163 }
6164
6165 stats.packetlength = stats.Length-4;
6166 stats.fraglength = stats.packetlength;
6167 stats.fragoffset = 0;
6168 stats.ntotalfrag = 1;
6169
fb5fe277 6170 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
ecdfa446
GKH		 6171 dev_kfree_skb_any(skb);
6172 } else {
6173 priv->stats.rxok++;
6174 if(unicast_packet) {
6175 priv->stats.rxbytesunicast += skb->len;
6176 }
6177 }
6178
6179 skb = new_skb;
6180 priv->rx_buf[priv->rx_idx] = skb;
1c7ec2e8 6181 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
ecdfa446
GKH		 6182 }
6183
6184 }
6185done:
6186 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
6187 pdesc->OWN = 1;
6188 pdesc->Length = priv->rxbuffersize;
6189 if (priv->rx_idx == priv->rxringcount-1)
6190 pdesc->EOR = 1;
6191 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
6192 }
6193
6194}
6195
559fba5e 6196static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
ecdfa446
GKH		 6197{
6198 rtl8192_rx(priv->ieee80211->dev);
6199 /* unmask RDU */
6200 write_nic_dword(priv->ieee80211->dev, INTA_MASK,read_nic_dword(priv->ieee80211->dev, INTA_MASK) | IMR_RDU);
6201}
6202
6203static const struct net_device_ops rtl8192_netdev_ops = {
6204 .ndo_open = rtl8192_open,
6205 .ndo_stop = rtl8192_close,
ecdfa446
GKH		 6206 .ndo_tx_timeout = tx_timeout,
6207 .ndo_do_ioctl = rtl8192_ioctl,
6208 .ndo_set_multicast_list = r8192_set_multicast,
6209 .ndo_set_mac_address = r8192_set_mac_adr,
fb5fe277 6210 .ndo_start_xmit = ieee80211_rtl_xmit,
ecdfa446
GKH		 6211};
6212
6213/****************************************************************************
6214 ---------------------------- PCI_STUFF---------------------------
6215*****************************************************************************/
6216
6217static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
6218 const struct pci_device_id *id)
6219{
6220 unsigned long ioaddr = 0;
6221 struct net_device *dev = NULL;
6222 struct r8192_priv *priv= NULL;
6223 u8 unit = 0;
3a8f2d3c 6224 int ret = -ENODEV;
ecdfa446
GKH		 6225
6226#ifdef CONFIG_RTL8192_IO_MAP
6227 unsigned long pio_start, pio_len, pio_flags;
6228#else
6229 unsigned long pmem_start, pmem_len, pmem_flags;
6230#endif //end #ifdef RTL_IO_MAP
6231
6232 RT_TRACE(COMP_INIT,"Configuring chip resources");
6233
6234 if( pci_enable_device (pdev) ){
6235 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
6236 return -EIO;
6237 }
6238
6239 pci_set_master(pdev);
6240 //pci_set_wmi(pdev);
6241 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 6242 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446 6243 dev = alloc_ieee80211(sizeof(struct r8192_priv));
3a8f2d3c
KV		 6244 if (!dev) {
6245 ret = -ENOMEM;
6246 goto fail_free;
6247 }
ecdfa446 6248
ecdfa446 6249 pci_set_drvdata(pdev, dev);
ecdfa446 6250 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 6251 priv = ieee80211_priv(dev);
ecdfa446 6252 priv->ieee80211 = netdev_priv(dev);
ecdfa446 6253 priv->pdev=pdev;
ecdfa446
GKH		 6254 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
6255 priv->ieee80211->bSupportRemoteWakeUp = 1;
6256 } else
ecdfa446
GKH		 6257 {
6258 priv->ieee80211->bSupportRemoteWakeUp = 0;
6259 }
6260
6261#ifdef CONFIG_RTL8192_IO_MAP
6262
6263 pio_start = (unsigned long)pci_resource_start (pdev, 0);
6264 pio_len = (unsigned long)pci_resource_len (pdev, 0);
6265 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
6266
6267 if (!(pio_flags & IORESOURCE_IO)) {
6268 RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
6269 goto fail;
6270 }
6271
6272 //DMESG("IO space @ 0x%08lx", pio_start );
6273 if( ! request_region( pio_start, pio_len, RTL819xE_MODULE_NAME ) ){
6274 RT_TRACE(COMP_ERR,"request_region failed!");
6275 goto fail;
6276 }
6277
6278 ioaddr = pio_start;
6279 dev->base_addr = ioaddr; // device I/O address
6280
6281#else
6282
6283 pmem_start = pci_resource_start(pdev, 1);
6284 pmem_len = pci_resource_len(pdev, 1);
6285 pmem_flags = pci_resource_flags (pdev, 1);
6286
6287 if (!(pmem_flags & IORESOURCE_MEM)) {
6288 RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
6289 goto fail;
6290 }
6291
6292 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
6293 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
6294 RT_TRACE(COMP_ERR,"request_mem_region failed!");
6295 goto fail;
6296 }
6297
6298
6299 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
6300 if( ioaddr == (unsigned long)NULL ){
6301 RT_TRACE(COMP_ERR,"ioremap failed!");
6302 // release_mem_region( pmem_start, pmem_len );
6303 goto fail1;
6304 }
6305
6306 dev->mem_start = ioaddr; // shared mem start
6307 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
6308
6309#endif //end #ifdef RTL_IO_MAP
6310
6311 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6312 * PCI Tx retries from interfering with C3 CPU state */
6313 pci_write_config_byte(pdev, 0x41, 0x00);
6314
6315
6316 pci_read_config_byte(pdev, 0x05, &unit);
6317 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
6318
6319 dev->irq = pdev->irq;
6320 priv->irq = 0;
6321
6322 dev->netdev_ops = &rtl8192_netdev_ops;
6323#if 0
6324 dev->open = rtl8192_open;
6325 dev->stop = rtl8192_close;
6326 //dev->hard_start_xmit = rtl8192_8023_hard_start_xmit;
6327 dev->tx_timeout = tx_timeout;
6328 //dev->wireless_handlers = &r8192_wx_handlers_def;
6329 dev->do_ioctl = rtl8192_ioctl;
6330 dev->set_multicast_list = r8192_set_multicast;
6331 dev->set_mac_address = r8192_set_mac_adr;
6332#endif
6333
6334 //DMESG("Oops: i'm coming\n");
6335#if WIRELESS_EXT >= 12
6336#if WIRELESS_EXT < 17
6337 dev->get_wireless_stats = r8192_get_wireless_stats;
6338#endif
6339 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
6340#endif
6341 //dev->get_wireless_stats = r8192_get_wireless_stats;
6342 dev->type=ARPHRD_ETHER;
6343
6344 dev->watchdog_timeo = HZ*3; //modified by john, 0805
6345
6346 if (dev_alloc_name(dev, ifname) < 0){
6347 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
dca41306 6348 strcpy(ifname, "wlan%d");
ecdfa446
GKH		 6349 dev_alloc_name(dev, ifname);
6350 }
6351
6352 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
6353 if(rtl8192_init(dev)!=0){
6354 RT_TRACE(COMP_ERR, "Initialization failed");
6355 goto fail;
6356 }
6357
6358 netif_carrier_off(dev);
6359 netif_stop_queue(dev);
6360
6361 register_netdev(dev);
6362 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
6363 rtl8192_proc_init_one(dev);
6364
6365
6366 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 6367 return 0;
ecdfa446
GKH		 6368
6369fail1:
6370
6371#ifdef CONFIG_RTL8180_IO_MAP
6372
6373 if( dev->base_addr != 0 ){
6374
6375 release_region(dev->base_addr,
6376 pci_resource_len(pdev, 0) );
6377 }
6378#else
6379 if( dev->mem_start != (unsigned long)NULL ){
6380 iounmap( (void *)dev->mem_start );
6381 release_mem_region( pci_resource_start(pdev, 1),
6382 pci_resource_len(pdev, 1) );
6383 }
6384#endif //end #ifdef RTL_IO_MAP
6385
6386fail:
6387 if(dev){
6388
6389 if (priv->irq) {
6390 free_irq(dev->irq, dev);
6391 dev->irq=0;
6392 }
6393 free_ieee80211(dev);
6394 }
6395
3a8f2d3c 6396fail_free:
ecdfa446
GKH		 6397 pci_disable_device(pdev);
6398
6399 DMESG("wlan driver load failed\n");
6400 pci_set_drvdata(pdev, NULL);
3a8f2d3c 6401 return ret;
ecdfa446
GKH		 6402
6403}
6404
6405/* detach all the work and timer structure declared or inititialized
6406 * in r8192_init function.
6407 * */
5b3b1a7b 6408static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
ecdfa446
GKH		 6409{
6410 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
6411 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
6412 * Otherwise call cancel_delayed_work is enough.
39cfb97b 6413 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
ecdfa446 6414 * */
ecdfa446
GKH		 6415 cancel_delayed_work(&priv->watch_dog_wq);
6416 cancel_delayed_work(&priv->update_beacon_wq);
6417 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
6418 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
6419#ifdef RTL8192E
6420 cancel_delayed_work(&priv->gpio_change_rf_wq);
6421#endif
ecdfa446
GKH		 6422 cancel_work_sync(&priv->reset_wq);
6423 cancel_work_sync(&priv->qos_activate);
6424 //cancel_work_sync(&priv->SetBWModeWorkItem);
6425 //cancel_work_sync(&priv->SwChnlWorkItem);
ecdfa446
GKH		 6426
6427}
6428
6429
6430static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
6431{
6432 struct net_device *dev = pci_get_drvdata(pdev);
6433 struct r8192_priv *priv ;
6434
6435 if(dev){
6436
6437 unregister_netdev(dev);
6438
6439 priv=ieee80211_priv(dev);
6440
6441 rtl8192_proc_remove_one(dev);
6442
6443 rtl8192_down(dev);
6444 if (priv->pFirmware)
6445 {
6446 vfree(priv->pFirmware);
6447 priv->pFirmware = NULL;
6448 }
6449 // priv->rf_close(dev);
6450 // rtl8192_usb_deleteendpoints(dev);
ecdfa446 6451 destroy_workqueue(priv->priv_wq);
ecdfa446
GKH		 6452 /* redundant with rtl8192_down */
6453 // rtl8192_irq_disable(dev);
6454 // rtl8192_reset(dev);
6455 // mdelay(10);
6456 {
6457 u32 i;
6458 /* free tx/rx rings */
6459 rtl8192_free_rx_ring(dev);
6460 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
6461 rtl8192_free_tx_ring(dev, i);
6462 }
6463 }
6464 if(priv->irq){
6465
6466 printk("Freeing irq %d\n",dev->irq);
6467 free_irq(dev->irq, dev);
6468 priv->irq=0;
6469
6470 }
6471
6472
6473
6474 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6475
6476#ifdef CONFIG_RTL8180_IO_MAP
6477
6478 if( dev->base_addr != 0 ){
6479
6480 release_region(dev->base_addr,
6481 pci_resource_len(pdev, 0) );
6482 }
6483#else
6484 if( dev->mem_start != (unsigned long)NULL ){
6485 iounmap( (void *)dev->mem_start );
6486 release_mem_region( pci_resource_start(pdev, 1),
6487 pci_resource_len(pdev, 1) );
6488 }
6489#endif /*end #ifdef RTL_IO_MAP*/
6490 free_ieee80211(dev);
6491
6492 }
6493
6494 pci_disable_device(pdev);
6495 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
6496}
6497
fb5fe277
GK		 6498extern int ieee80211_rtl_init(void);
6499extern void ieee80211_rtl_exit(void);
ecdfa446
GKH		 6500
6501static int __init rtl8192_pci_module_init(void)
6502{
6503 int retval;
6504
fb5fe277 6505 retval = ieee80211_rtl_init();
ecdfa446
GKH		 6506 if (retval)
6507 return retval;
6508
6509 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
6510 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
6511 RT_TRACE(COMP_INIT, "Initializing module");
6512 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
6513 rtl8192_proc_module_init();
ecdfa446 6514 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 6515 {
6516 DMESG("No device found");
6517 /*pci_unregister_driver (&rtl8192_pci_driver);*/
6518 return -ENODEV;
6519 }
6520 return 0;
6521}
6522
6523
6524static void __exit rtl8192_pci_module_exit(void)
6525{
6526 pci_unregister_driver(&rtl8192_pci_driver);
6527
6528 RT_TRACE(COMP_DOWN, "Exiting");
6529 rtl8192_proc_module_remove();
fb5fe277 6530 ieee80211_rtl_exit();
ecdfa446
GKH		 6531}
6532
6533//warning message WB
559fba5e 6534static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446
GKH		 6535{
6536 struct net_device *dev = (struct net_device *) netdev;
6537 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6538 unsigned long flags;
6539 u32 inta;
6540 /* We should return IRQ_NONE, but for now let me keep this */
6541 if(priv->irq_enabled == 0){
ecdfa446 6542 return IRQ_HANDLED;
ecdfa446
GKH		 6543 }
6544
6545 spin_lock_irqsave(&priv->irq_th_lock,flags);
6546
6547 //ISR: 4bytes
6548
6549 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6550 write_nic_dword(dev,ISR,inta); // reset int situation
6551
6552 priv->stats.shints++;
6553 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6554 if(!inta){
6555 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6556 return IRQ_HANDLED;
ecdfa446
GKH		 6557 /*
6558 most probably we can safely return IRQ_NONE,
6559 but for now is better to avoid problems
6560 */
6561 }
6562
6563 if(inta == 0xffff){
6564 /* HW disappared */
6565 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6566 return IRQ_HANDLED;
ecdfa446
GKH		 6567 }
6568
6569 priv->stats.ints++;
6570#ifdef DEBUG_IRQ
6571 DMESG("NIC irq %x",inta);
6572#endif
6573 //priv->irqpending = inta;
6574
6575
6576 if(!netif_running(dev)) {
6577 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6578 return IRQ_HANDLED;
ecdfa446
GKH		 6579 }
6580
6581 if(inta & IMR_TIMEOUT0){
6582 // write_nic_dword(dev, TimerInt, 0);
6583 //DMESG("=================>waking up");
6584 // rtl8180_hw_wakeup(dev);
6585 }
6586
6587 if(inta & IMR_TBDOK){
6588 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6589 rtl8192_tx_isr(dev, BEACON_QUEUE);
6590 priv->stats.txbeaconokint++;
6591 }
6592
6593 if(inta & IMR_TBDER){
6594 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6595 rtl8192_tx_isr(dev, BEACON_QUEUE);
6596 priv->stats.txbeaconerr++;
6597 }
6598
6599 if(inta & IMR_MGNTDOK ) {
6600 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
6601 priv->stats.txmanageokint++;
6602 rtl8192_tx_isr(dev,MGNT_QUEUE);
6603
6604 }
6605
6606 if(inta & IMR_COMDOK)
6607 {
6608 priv->stats.txcmdpktokint++;
6609 rtl8192_tx_isr(dev,TXCMD_QUEUE);
6610 }
6611
6612 if(inta & IMR_ROK){
6613#ifdef DEBUG_RX
6614 DMESG("Frame arrived !");
6615#endif
6616 priv->stats.rxint++;
6617 tasklet_schedule(&priv->irq_rx_tasklet);
6618 }
6619
6620 if(inta & IMR_BcnInt) {
6621 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
6622 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
6623 }
6624
6625 if(inta & IMR_RDU){
6626 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
6627 priv->stats.rxrdu++;
6628 /* reset int situation */
6629 write_nic_dword(dev,INTA_MASK,read_nic_dword(dev, INTA_MASK) & ~IMR_RDU);
6630 tasklet_schedule(&priv->irq_rx_tasklet);
6631 }
6632
6633 if(inta & IMR_RXFOVW){
6634 RT_TRACE(COMP_INTR, "rx overflow !\n");
6635 priv->stats.rxoverflow++;
6636 tasklet_schedule(&priv->irq_rx_tasklet);
6637 }
6638
6639 if(inta & IMR_TXFOVW) priv->stats.txoverflow++;
6640
6641 if(inta & IMR_BKDOK){
6642 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
6643 priv->stats.txbkokint++;
6644 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6645 rtl8192_tx_isr(dev,BK_QUEUE);
6646 rtl8192_try_wake_queue(dev, BK_QUEUE);
6647 }
6648
6649 if(inta & IMR_BEDOK){
6650 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
6651 priv->stats.txbeokint++;
6652 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6653 rtl8192_tx_isr(dev,BE_QUEUE);
6654 rtl8192_try_wake_queue(dev, BE_QUEUE);
6655 }
6656
6657 if(inta & IMR_VIDOK){
6658 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
6659 priv->stats.txviokint++;
6660 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6661 rtl8192_tx_isr(dev,VI_QUEUE);
6662 rtl8192_try_wake_queue(dev, VI_QUEUE);
6663 }
6664
6665 if(inta & IMR_VODOK){
6666 priv->stats.txvookint++;
6667 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6668 rtl8192_tx_isr(dev,VO_QUEUE);
6669 rtl8192_try_wake_queue(dev, VO_QUEUE);
6670 }
6671
6672 force_pci_posting(dev);
6673 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6674
ecdfa446 6675 return IRQ_HANDLED;
ecdfa446
GKH		 6676}
6677
559fba5e 6678static void rtl8192_try_wake_queue(struct net_device *dev, int pri)
ecdfa446 6679{
ecdfa446
GKH		 6680}
6681
6682
6683void EnableHWSecurityConfig8192(struct net_device *dev)
6684{
6685 u8 SECR_value = 0x0;
ecdfa446 6686 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
16d74da0
MM		 6687 struct ieee80211_device* ieee = priv->ieee80211;
6688
ecdfa446
GKH		 6689 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
6690#if 1
6691 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
6692 {
6693 SECR_value |= SCR_RxUseDK;
6694 SECR_value |= SCR_TxUseDK;
6695 }
6696 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
6697 {
6698 SECR_value |= SCR_RxUseDK;
6699 SECR_value |= SCR_TxUseDK;
6700 }
6701
6702#endif
6703
6704 //add HWSec active enable here.
6705//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
6706 ieee->hwsec_active = 1;
6707
6708 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
6709 {
6710 ieee->hwsec_active = 0;
6711 SECR_value &= ~SCR_RxDecEnable;
6712 }
6713
207b58fb 6714 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
ecdfa446
GKH		 6715 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
6716 {
6717 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
6718 }
6719
6720}
6721#define TOTAL_CAM_ENTRY 32
6722//#define CAM_CONTENT_COUNT 8
6723void setKey( struct net_device *dev,
6724 u8 EntryNo,
6725 u8 KeyIndex,
6726 u16 KeyType,
881a975b 6727 const u8 *MacAddr,
ecdfa446
GKH		 6728 u8 DefaultKey,
6729 u32 *KeyContent )
6730{
6731 u32 TargetCommand = 0;
6732 u32 TargetContent = 0;
6733 u16 usConfig = 0;
6734 u8 i;
6735#ifdef ENABLE_IPS
6736 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6737 RT_RF_POWER_STATE rtState;
6738 rtState = priv->ieee80211->eRFPowerState;
6739 if(priv->ieee80211->PowerSaveControl.bInactivePs){
6740 if(rtState == eRfOff){
6741 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
6742 {
6743 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
65a43784 6744 //up(&priv->wx_sem);
ecdfa446
GKH		 6745 return ;
6746 }
6747 else{
65a43784 6748 down(&priv->ieee80211->ips_sem);
ecdfa446 6749 IPSLeave(dev);
65a43784 6750 up(&priv->ieee80211->ips_sem);
ecdfa446
GKH		 6751 }
6752 }
6753 }
6754 priv->ieee80211->is_set_key = true;
6755#endif
6756 if (EntryNo >= TOTAL_CAM_ENTRY)
6757 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
6758
0ee9f67c 6759 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
ecdfa446
GKH		 6760
6761 if (DefaultKey)
6762 usConfig |= BIT15 | (KeyType<<2);
6763 else
6764 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
6765// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
6766
6767
6768 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
6769 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
6770 TargetCommand |= BIT31|BIT16;
6771
6772 if(i==0){//MAC|Config
6773 TargetContent = (u32)(*(MacAddr+0)) << 16|
6774 (u32)(*(MacAddr+1)) << 24|
6775 (u32)usConfig;
6776
6777 write_nic_dword(dev, WCAMI, TargetContent);
6778 write_nic_dword(dev, RWCAM, TargetCommand);
6779 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
6780 }
6781 else if(i==1){//MAC
6782 TargetContent = (u32)(*(MacAddr+2)) |
6783 (u32)(*(MacAddr+3)) << 8|
6784 (u32)(*(MacAddr+4)) << 16|
6785 (u32)(*(MacAddr+5)) << 24;
6786 write_nic_dword(dev, WCAMI, TargetContent);
6787 write_nic_dword(dev, RWCAM, TargetCommand);
6788 }
6789 else { //Key Material
6790 if(KeyContent != NULL)
6791 {
6792 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
6793 write_nic_dword(dev, RWCAM, TargetCommand);
6794 }
6795 }
6796 }
6797 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446 6798}
ecdfa446 6799
65a43784 6800bool NicIFEnableNIC(struct net_device* dev)
6801{
6802 RT_STATUS init_status = RT_STATUS_SUCCESS;
6803 struct r8192_priv* priv = ieee80211_priv(dev);
6804 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
6805
6806 //YJ,add,091109
6807 if (priv->up == 0){
6808 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
6809 priv->bdisable_nic = false; //YJ,add,091111
6810 return false;
6811 }
6812 // <1> Reset memory: descriptor, buffer,..
6813 //NicIFResetMemory(Adapter);
6814
6815 // <2> Enable Adapter
65a43784 6816 //priv->bfirst_init = true;
6817 init_status = rtl8192_adapter_start(dev);
6818 if (init_status != RT_STATUS_SUCCESS) {
6819 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
6820 priv->bdisable_nic = false; //YJ,add,091111
6821 return -1;
6822 }
6823 //printk("start adapter finished\n");
6824 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
6825 //priv->bfirst_init = false;
6826
6827 // <3> Enable Interrupt
6828 rtl8192_irq_enable(dev);
6829 priv->bdisable_nic = false;
16d74da0 6830
c6eae677 6831 return (init_status == RT_STATUS_SUCCESS);
65a43784 6832}
6833bool NicIFDisableNIC(struct net_device* dev)
6834{
6835 bool status = true;
6836 struct r8192_priv* priv = ieee80211_priv(dev);
6837 u8 tmp_state = 0;
6838 // <1> Disable Interrupt
16d74da0 6839
65a43784 6840 priv->bdisable_nic = true; //YJ,move,091109
6841 tmp_state = priv->ieee80211->state;
6842
6843 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
6844
6845 priv->ieee80211->state = tmp_state;
6846 rtl8192_cancel_deferred_work(priv);
6847 rtl8192_irq_disable(dev);
6848 // <2> Stop all timer
6849
6850 // <3> Disable Adapter
6851 rtl8192_halt_adapter(dev, false);
6852// priv->bdisable_nic = true;
65a43784 6853
6854 return status;
6855}
6856
ecdfa446
GKH		 6857
6858/***************************************************************************
6859 ------------------- module init / exit stubs ----------------
6860****************************************************************************/
6861module_init(rtl8192_pci_module_init);
6862module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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