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Staging: iio: Don't build on s390
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8190P / RTL8192E
4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
ecdfa446
GKH		 27
28#undef LOOP_TEST
29#undef RX_DONT_PASS_UL
30#undef DEBUG_EPROM
31#undef DEBUG_RX_VERBOSE
32#undef DUMMY_RX
33#undef DEBUG_ZERO_RX
34#undef DEBUG_RX_SKB
35#undef DEBUG_TX_FRAG
36#undef DEBUG_RX_FRAG
37#undef DEBUG_TX_FILLDESC
38#undef DEBUG_TX
39#undef DEBUG_IRQ
40#undef DEBUG_RX
41#undef DEBUG_RXALLOC
42#undef DEBUG_REGISTERS
43#undef DEBUG_RING
44#undef DEBUG_IRQ_TASKLET
45#undef DEBUG_TX_ALLOC
46#undef DEBUG_TX_DESC
47
48//#define CONFIG_RTL8192_IO_MAP
49#include <asm/uaccess.h>
50#include "r8192E_hw.h"
51#include "r8192E.h"
52#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
53#include "r8180_93cx6.h" /* Card EEPROM */
54#include "r8192E_wx.h"
55#include "r819xE_phy.h" //added by WB 4.30.2008
56#include "r819xE_phyreg.h"
57#include "r819xE_cmdpkt.h"
58#include "r8192E_dm.h"
59//#include "r8192xU_phyreg.h"
60//#include <linux/usb.h>
61// FIXME: check if 2.6.7 is ok
62
63#ifdef CONFIG_PM_RTL
64#include "r8192_pm.h"
65#endif
66
67#ifdef ENABLE_DOT11D
68#include "dot11d.h"
69#endif
70
71//set here to open your trace code. //WB
72u32 rt_global_debug_component = \
73 // COMP_INIT |
74 // COMP_EPROM |
75 // COMP_PHY |
76 // COMP_RF |
77 COMP_FIRMWARE |
78 // COMP_TRACE |
79 // COMP_DOWN |
80 // COMP_SWBW |
81 // COMP_SEC |
82// COMP_QOS |
83// COMP_RATE |
84 // COMP_RECV |
85 // COMP_SEND |
86 // COMP_POWER |
87 // COMP_EVENTS |
88 // COMP_RESET |
89 // COMP_CMDPKT |
90 // COMP_POWER_TRACKING |
91 // COMP_INTR |
92 COMP_ERR ; //always open err flags on
93#ifndef PCI_DEVICE
94#define PCI_DEVICE(vend,dev)\
95 .vendor=(vend),.device=(dev),\
96 .subvendor=PCI_ANY_ID,.subdevice=PCI_ANY_ID
97#endif
98static struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
99#ifdef RTL8190P
100 /* Realtek */
101 /* Dlink */
102 { PCI_DEVICE(0x10ec, 0x8190) },
103 /* Corega */
104 { PCI_DEVICE(0x07aa, 0x0045) },
105 { PCI_DEVICE(0x07aa, 0x0046) },
106#else
107 /* Realtek */
108 { PCI_DEVICE(0x10ec, 0x8192) },
109
110 /* Corega */
111 { PCI_DEVICE(0x07aa, 0x0044) },
112 { PCI_DEVICE(0x07aa, 0x0047) },
113#endif
114 {}
115};
116
117static char* ifname = "wlan%d";
ecdfa446
GKH		 118static int hwwep = 1; //default use hw. set 0 to use software security
119static int channels = 0x3fff;
120
121MODULE_LICENSE("GPL");
ecdfa446 122MODULE_VERSION("V 1.1");
ecdfa446
GKH		 123MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
124//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
125MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
126
ecdfa446 127
ecdfa446
GKH		 128module_param(ifname, charp, S_IRUGO|S_IWUSR );
129//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
130module_param(hwwep,int, S_IRUGO|S_IWUSR);
131module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 132
133MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
134//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
135MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
136MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
137
138static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
139 const struct pci_device_id *id);
140static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
141
142static struct pci_driver rtl8192_pci_driver = {
143 .name = RTL819xE_MODULE_NAME, /* Driver name */
144 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
145 .probe = rtl8192_pci_probe, /* probe fn */
146 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
ecdfa446
GKH		 147#ifdef CONFIG_PM_RTL
148 .suspend = rtl8192E_suspend, /* PM suspend fn */
149 .resume = rtl8192E_resume, /* PM resume fn */
150#else
151 .suspend = NULL, /* PM suspend fn */
152 .resume = NULL, /* PM resume fn */
153#endif
ecdfa446
GKH		 154};
155
156#ifdef ENABLE_DOT11D
157
158typedef struct _CHANNEL_LIST
159{
160 u8 Channel[32];
161 u8 Len;
162}CHANNEL_LIST, *PCHANNEL_LIST;
163
164static CHANNEL_LIST ChannelPlan[] = {
165 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
166 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
167 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
168 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
169 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
170 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
171 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
172 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
173 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
174 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
175 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
176};
177
178static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
179{
180 int i, max_chan=-1, min_chan=-1;
181 struct ieee80211_device* ieee = priv->ieee80211;
182 switch (channel_plan)
183 {
184 case COUNTRY_CODE_FCC:
185 case COUNTRY_CODE_IC:
186 case COUNTRY_CODE_ETSI:
187 case COUNTRY_CODE_SPAIN:
188 case COUNTRY_CODE_FRANCE:
189 case COUNTRY_CODE_MKK:
190 case COUNTRY_CODE_MKK1:
191 case COUNTRY_CODE_ISRAEL:
192 case COUNTRY_CODE_TELEC:
193 case COUNTRY_CODE_MIC:
194 {
195 Dot11d_Init(ieee);
196 ieee->bGlobalDomain = false;
197 //acturally 8225 & 8256 rf chip only support B,G,24N mode
198 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256))
199 {
200 min_chan = 1;
201 max_chan = 14;
202 }
203 else
204 {
205 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
206 }
207 if (ChannelPlan[channel_plan].Len != 0){
208 // Clear old channel map
209 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
210 // Set new channel map
211 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
212 {
213 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
214 break;
215 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
216 }
217 }
218 break;
219 }
220 case COUNTRY_CODE_GLOBAL_DOMAIN:
221 {
222 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
223 Dot11d_Reset(ieee);
224 ieee->bGlobalDomain = true;
225 break;
226 }
227 default:
228 break;
229 }
230}
231#endif
232
233
234#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
235/* 2007/07/25 MH Defien temp tx fw info. */
5e1ad18a 236static TX_FWINFO_T Tmp_TxFwInfo;
ecdfa446
GKH		 237
238
239#define rx_hal_is_cck_rate(_pdrvinfo)\
240 (_pdrvinfo->RxRate == DESC90_RATE1M ||\
241 _pdrvinfo->RxRate == DESC90_RATE2M ||\
242 _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
243 _pdrvinfo->RxRate == DESC90_RATE11M) &&\
244 !_pdrvinfo->RxHT\
245
246
247void CamResetAllEntry(struct net_device *dev)
248{
249 //u8 ucIndex;
250 u32 ulcommand = 0;
251
252#if 1
253 ulcommand |= BIT31|BIT30;
254 write_nic_dword(dev, RWCAM, ulcommand);
255#else
256 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
257 CAM_mark_invalid(dev, ucIndex);
258 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
259 CAM_empty_entry(dev, ucIndex);
260#endif
261}
262
263
264void write_cam(struct net_device *dev, u8 addr, u32 data)
265{
266 write_nic_dword(dev, WCAMI, data);
267 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
268}
269u32 read_cam(struct net_device *dev, u8 addr)
270{
271 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
272 return read_nic_dword(dev, 0xa8);
273}
274
275////////////////////////////////////////////////////////////
276#ifdef CONFIG_RTL8180_IO_MAP
277
278u8 read_nic_byte(struct net_device *dev, int x)
279{
280 return 0xff&inb(dev->base_addr +x);
281}
282
283u32 read_nic_dword(struct net_device *dev, int x)
284{
285 return inl(dev->base_addr +x);
286}
287
288u16 read_nic_word(struct net_device *dev, int x)
289{
290 return inw(dev->base_addr +x);
291}
292
293void write_nic_byte(struct net_device *dev, int x,u8 y)
294{
295 outb(y&0xff,dev->base_addr +x);
296}
297
298void write_nic_word(struct net_device *dev, int x,u16 y)
299{
300 outw(y,dev->base_addr +x);
301}
302
303void write_nic_dword(struct net_device *dev, int x,u32 y)
304{
305 outl(y,dev->base_addr +x);
306}
307
308#else /* RTL_IO_MAP */
309
310u8 read_nic_byte(struct net_device *dev, int x)
311{
312 return 0xff&readb((u8*)dev->mem_start +x);
313}
314
315u32 read_nic_dword(struct net_device *dev, int x)
316{
317 return readl((u8*)dev->mem_start +x);
318}
319
320u16 read_nic_word(struct net_device *dev, int x)
321{
322 return readw((u8*)dev->mem_start +x);
323}
324
325void write_nic_byte(struct net_device *dev, int x,u8 y)
326{
327 writeb(y,(u8*)dev->mem_start +x);
328 udelay(20);
329}
330
331void write_nic_dword(struct net_device *dev, int x,u32 y)
332{
333 writel(y,(u8*)dev->mem_start +x);
334 udelay(20);
335}
336
337void write_nic_word(struct net_device *dev, int x,u16 y)
338{
339 writew(y,(u8*)dev->mem_start +x);
340 udelay(20);
341}
342
343#endif /* RTL_IO_MAP */
344
345
346///////////////////////////////////////////////////////////
347
348//u8 read_phy_cck(struct net_device *dev, u8 adr);
349//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
350/* this might still called in what was the PHY rtl8185/rtl8192 common code
351 * plans are to possibilty turn it again in one common code...
352 */
353inline void force_pci_posting(struct net_device *dev)
354{
355}
356
357
358//warning message WB
ecdfa446 359irqreturn_t rtl8192_interrupt(int irq, void *netdev);
ecdfa446
GKH		 360//static struct net_device_stats *rtl8192_stats(struct net_device *dev);
361void rtl8192_commit(struct net_device *dev);
362//void rtl8192_restart(struct net_device *dev);
ecdfa446
GKH		 363void rtl8192_restart(struct work_struct *work);
364//void rtl8192_rq_tx_ack(struct work_struct *work);
ecdfa446
GKH		 365
366void watch_dog_timer_callback(unsigned long data);
367#ifdef ENABLE_IPS
368void IPSEnter(struct net_device *dev);
369void IPSLeave(struct net_device *dev);
370void InactivePsWorkItemCallback(struct net_device *dev);
371#endif
372/****************************************************************************
373 -----------------------------PROCFS STUFF-------------------------
374*****************************************************************************/
375
376static struct proc_dir_entry *rtl8192_proc = NULL;
377
378
379
380static int proc_get_stats_ap(char *page, char **start,
381 off_t offset, int count,
382 int *eof, void *data)
383{
384 struct net_device *dev = data;
385 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
386 struct ieee80211_device *ieee = priv->ieee80211;
387 struct ieee80211_network *target;
388
389 int len = 0;
390
391 list_for_each_entry(target, &ieee->network_list, list) {
392
393 len += snprintf(page + len, count - len,
394 "%s ", target->ssid);
395
396 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
397 len += snprintf(page + len, count - len,
398 "WPA\n");
399 }
400 else{
401 len += snprintf(page + len, count - len,
402 "non_WPA\n");
403 }
404
405 }
406
407 *eof = 1;
408 return len;
409}
410
411static int proc_get_registers(char *page, char **start,
412 off_t offset, int count,
413 int *eof, void *data)
414{
415 struct net_device *dev = data;
416// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
417
418 int len = 0;
419 int i,n;
420
421 int max=0xff;
422
423 /* This dump the current register page */
424 len += snprintf(page + len, count - len,
425 "\n####################page 0##################\n ");
426
427 for(n=0;n<=max;)
428 {
429 //printk( "\nD: %2x> ", n);
430 len += snprintf(page + len, count - len,
431 "\nD: %2x > ",n);
432
433 for(i=0;i<16 && n<=max;i++,n++)
434 len += snprintf(page + len, count - len,
435 "%2x ",read_nic_byte(dev,n));
436
437 // printk("%2x ",read_nic_byte(dev,n));
438 }
439 len += snprintf(page + len, count - len,"\n");
440 len += snprintf(page + len, count - len,
441 "\n####################page 1##################\n ");
442 for(n=0;n<=max;)
443 {
444 //printk( "\nD: %2x> ", n);
445 len += snprintf(page + len, count - len,
446 "\nD: %2x > ",n);
447
448 for(i=0;i<16 && n<=max;i++,n++)
449 len += snprintf(page + len, count - len,
450 "%2x ",read_nic_byte(dev,0x100|n));
451
452 // printk("%2x ",read_nic_byte(dev,n));
453 }
454
455 len += snprintf(page + len, count - len,
456 "\n####################page 3##################\n ");
457 for(n=0;n<=max;)
458 {
459 //printk( "\nD: %2x> ", n);
460 len += snprintf(page + len, count - len,
461 "\nD: %2x > ",n);
462
463 for(i=0;i<16 && n<=max;i++,n++)
464 len += snprintf(page + len, count - len,
465 "%2x ",read_nic_byte(dev,0x300|n));
466
467 // printk("%2x ",read_nic_byte(dev,n));
468 }
469
470
471 *eof = 1;
472 return len;
473
474}
475
476
ecdfa446
GKH		 477
478static int proc_get_stats_tx(char *page, char **start,
479 off_t offset, int count,
480 int *eof, void *data)
481{
482 struct net_device *dev = data;
483 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
484
485 int len = 0;
486
487 len += snprintf(page + len, count - len,
488 "TX VI priority ok int: %lu\n"
489// "TX VI priority error int: %lu\n"
490 "TX VO priority ok int: %lu\n"
491// "TX VO priority error int: %lu\n"
492 "TX BE priority ok int: %lu\n"
493// "TX BE priority error int: %lu\n"
494 "TX BK priority ok int: %lu\n"
495// "TX BK priority error int: %lu\n"
496 "TX MANAGE priority ok int: %lu\n"
497// "TX MANAGE priority error int: %lu\n"
498 "TX BEACON priority ok int: %lu\n"
499 "TX BEACON priority error int: %lu\n"
500 "TX CMDPKT priority ok int: %lu\n"
501// "TX high priority ok int: %lu\n"
502// "TX high priority failed error int: %lu\n"
503// "TX queue resume: %lu\n"
504 "TX queue stopped?: %d\n"
505 "TX fifo overflow: %lu\n"
506// "TX beacon: %lu\n"
507// "TX VI queue: %d\n"
508// "TX VO queue: %d\n"
509// "TX BE queue: %d\n"
510// "TX BK queue: %d\n"
511// "TX HW queue: %d\n"
512// "TX VI dropped: %lu\n"
513// "TX VO dropped: %lu\n"
514// "TX BE dropped: %lu\n"
515// "TX BK dropped: %lu\n"
516 "TX total data packets %lu\n"
517 "TX total data bytes :%lu\n",
518// "TX beacon aborted: %lu\n",
519 priv->stats.txviokint,
520// priv->stats.txvierr,
521 priv->stats.txvookint,
522// priv->stats.txvoerr,
523 priv->stats.txbeokint,
524// priv->stats.txbeerr,
525 priv->stats.txbkokint,
526// priv->stats.txbkerr,
527 priv->stats.txmanageokint,
528// priv->stats.txmanageerr,
529 priv->stats.txbeaconokint,
530 priv->stats.txbeaconerr,
531 priv->stats.txcmdpktokint,
532// priv->stats.txhpokint,
533// priv->stats.txhperr,
534// priv->stats.txresumed,
535 netif_queue_stopped(dev),
536 priv->stats.txoverflow,
537// priv->stats.txbeacon,
538// atomic_read(&(priv->tx_pending[VI_QUEUE])),
539// atomic_read(&(priv->tx_pending[VO_QUEUE])),
540// atomic_read(&(priv->tx_pending[BE_QUEUE])),
541// atomic_read(&(priv->tx_pending[BK_QUEUE])),
542// read_nic_byte(dev, TXFIFOCOUNT),
543// priv->stats.txvidrop,
544// priv->stats.txvodrop,
545 priv->ieee80211->stats.tx_packets,
546 priv->ieee80211->stats.tx_bytes
547
548
549// priv->stats.txbedrop,
550// priv->stats.txbkdrop
551 // priv->stats.txdatapkt
552// priv->stats.txbeaconerr
553 );
554
555 *eof = 1;
556 return len;
557}
558
559
560
561static int proc_get_stats_rx(char *page, char **start,
562 off_t offset, int count,
563 int *eof, void *data)
564{
565 struct net_device *dev = data;
566 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
567
568 int len = 0;
569
570 len += snprintf(page + len, count - len,
571 "RX packets: %lu\n"
572 "RX desc err: %lu\n"
573 "RX rx overflow error: %lu\n"
574 "RX invalid urb error: %lu\n",
575 priv->stats.rxint,
576 priv->stats.rxrdu,
577 priv->stats.rxoverflow,
578 priv->stats.rxurberr);
579
580 *eof = 1;
581 return len;
582}
583
5e1ad18a 584static void rtl8192_proc_module_init(void)
ecdfa446
GKH		 585{
586 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
ecdfa446 587 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 588}
589
590
5e1ad18a 591static void rtl8192_proc_module_remove(void)
ecdfa446 592{
ecdfa446 593 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 594}
595
596
5e1ad18a 597static void rtl8192_proc_remove_one(struct net_device *dev)
ecdfa446
GKH		 598{
599 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
600
601 printk("dev name=======> %s\n",dev->name);
602
603 if (priv->dir_dev) {
604 // remove_proc_entry("stats-hw", priv->dir_dev);
605 remove_proc_entry("stats-tx", priv->dir_dev);
606 remove_proc_entry("stats-rx", priv->dir_dev);
607 // remove_proc_entry("stats-ieee", priv->dir_dev);
608 remove_proc_entry("stats-ap", priv->dir_dev);
609 remove_proc_entry("registers", priv->dir_dev);
610 // remove_proc_entry("cck-registers",priv->dir_dev);
611 // remove_proc_entry("ofdm-registers",priv->dir_dev);
612 //remove_proc_entry(dev->name, rtl8192_proc);
613 remove_proc_entry("wlan0", rtl8192_proc);
614 priv->dir_dev = NULL;
615 }
616}
617
618
5e1ad18a 619static void rtl8192_proc_init_one(struct net_device *dev)
ecdfa446
GKH		 620{
621 struct proc_dir_entry *e;
622 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
623 priv->dir_dev = create_proc_entry(dev->name,
624 S_IFDIR | S_IRUGO | S_IXUGO,
625 rtl8192_proc);
626 if (!priv->dir_dev) {
627 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
628 dev->name);
629 return;
630 }
ecdfa446
GKH		 631 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
632 priv->dir_dev, proc_get_stats_rx, dev);
633
634 if (!e) {
635 RT_TRACE(COMP_ERR,"Unable to initialize "
636 "/proc/net/rtl8192/%s/stats-rx\n",
637 dev->name);
638 }
639
640
641 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
642 priv->dir_dev, proc_get_stats_tx, dev);
643
644 if (!e) {
645 RT_TRACE(COMP_ERR, "Unable to initialize "
646 "/proc/net/rtl8192/%s/stats-tx\n",
647 dev->name);
648 }
ecdfa446
GKH		 649
650 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
651 priv->dir_dev, proc_get_stats_ap, dev);
652
653 if (!e) {
654 RT_TRACE(COMP_ERR, "Unable to initialize "
655 "/proc/net/rtl8192/%s/stats-ap\n",
656 dev->name);
657 }
658
659 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
660 priv->dir_dev, proc_get_registers, dev);
661 if (!e) {
662 RT_TRACE(COMP_ERR, "Unable to initialize "
663 "/proc/net/rtl8192/%s/registers\n",
664 dev->name);
665 }
ecdfa446
GKH		 666}
667/****************************************************************************
668 -----------------------------MISC STUFF-------------------------
669*****************************************************************************/
670
ecdfa446
GKH		 671short check_nic_enough_desc(struct net_device *dev, int prio)
672{
673 struct r8192_priv *priv = ieee80211_priv(dev);
674 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
675
676 /* for now we reserve two free descriptor as a safety boundary
677 * between the tail and the head
678 */
679 if (ring->entries - skb_queue_len(&ring->queue) >= 2) {
680 return 1;
681 } else {
682 return 0;
683 }
684}
685
5e1ad18a 686static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 687{
688 struct r8192_priv *priv = ieee80211_priv(dev);
689 //rtl8192_commit(dev);
690
ecdfa446 691 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 692 printk("TXTIMEOUT");
693}
694
695
ecdfa446
GKH		 696/****************************************************************************
697 ------------------------------HW STUFF---------------------------
698*****************************************************************************/
699
700
5e1ad18a 701static void rtl8192_irq_enable(struct net_device *dev)
ecdfa446
GKH		 702{
703 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
704 priv->irq_enabled = 1;
705 write_nic_dword(dev,INTA_MASK, priv->irq_mask);
706}
707
708
5e1ad18a 709static void rtl8192_irq_disable(struct net_device *dev)
ecdfa446
GKH		 710{
711 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
712
713 write_nic_dword(dev,INTA_MASK,0);
714 force_pci_posting(dev);
715 priv->irq_enabled = 0;
716}
717
718
5e1ad18a 719static void rtl8192_set_mode(struct net_device *dev,int mode)
ecdfa446
GKH		 720{
721 u8 ecmd;
722 ecmd=read_nic_byte(dev, EPROM_CMD);
723 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
724 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
725 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
726 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
727 write_nic_byte(dev, EPROM_CMD, ecmd);
728}
729
730
731void rtl8192_update_msr(struct net_device *dev)
732{
733 struct r8192_priv *priv = ieee80211_priv(dev);
734 u8 msr;
735
736 msr = read_nic_byte(dev, MSR);
737 msr &= ~ MSR_LINK_MASK;
738
739 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
740 * msr must be updated if the state is ASSOCIATING.
741 * this is intentional and make sense for ad-hoc and
742 * master (see the create BSS/IBSS func)
743 */
744 if (priv->ieee80211->state == IEEE80211_LINKED){
745
746 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
747 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
748 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
749 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
750 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
751 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
752
753 }else
754 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
755
756 write_nic_byte(dev, MSR, msr);
757}
758
759void rtl8192_set_chan(struct net_device *dev,short ch)
760{
761 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
762 RT_TRACE(COMP_RF, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
763 priv->chan=ch;
764#if 0
765 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC ||
766 priv->ieee80211->iw_mode == IW_MODE_MASTER){
767
768 priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;
769 priv->ieee80211->master_chan = ch;
770 rtl8192_update_beacon_ch(dev);
771 }
772#endif
773
774 /* this hack should avoid frame TX during channel setting*/
775
776
777 // tx = read_nic_dword(dev,TX_CONF);
778 // tx &= ~TX_LOOPBACK_MASK;
779
780#ifndef LOOP_TEST
781 //TODO
782 // write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
783
784 //need to implement rf set channel here WB
785
786 if (priv->rf_set_chan)
787 priv->rf_set_chan(dev,priv->chan);
788 // mdelay(10);
789 // write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
790#endif
791}
792
793void rtl8192_rx_enable(struct net_device *dev)
794{
795 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
796 write_nic_dword(dev, RDQDA,priv->rx_ring_dma);
797}
798
799/* the TX_DESC_BASE setting is according to the following queue index
800 * BK_QUEUE ===> 0
801 * BE_QUEUE ===> 1
802 * VI_QUEUE ===> 2
803 * VO_QUEUE ===> 3
804 * HCCA_QUEUE ===> 4
805 * TXCMD_QUEUE ===> 5
806 * MGNT_QUEUE ===> 6
807 * HIGH_QUEUE ===> 7
808 * BEACON_QUEUE ===> 8
809 * */
5e1ad18a 810static u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
ecdfa446
GKH		 811void rtl8192_tx_enable(struct net_device *dev)
812{
813 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
814 u32 i;
815 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
816 write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
817
818 ieee80211_reset_queue(priv->ieee80211);
819}
820
ecdfa446
GKH		 821
822static void rtl8192_free_rx_ring(struct net_device *dev)
823{
824 struct r8192_priv *priv = ieee80211_priv(dev);
825 int i;
826
827 for (i = 0; i < priv->rxringcount; i++) {
828 struct sk_buff *skb = priv->rx_buf[i];
829 if (!skb)
830 continue;
831
832 pci_unmap_single(priv->pdev,
833 *((dma_addr_t *)skb->cb),
834 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
835 kfree_skb(skb);
836 }
837
838 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
839 priv->rx_ring, priv->rx_ring_dma);
840 priv->rx_ring = NULL;
841}
842
843static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
844{
845 struct r8192_priv *priv = ieee80211_priv(dev);
846 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
847
848 while (skb_queue_len(&ring->queue)) {
849 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
850 struct sk_buff *skb = __skb_dequeue(&ring->queue);
851
852 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
853 skb->len, PCI_DMA_TODEVICE);
854 kfree_skb(skb);
855 ring->idx = (ring->idx + 1) % ring->entries;
856 }
857
858 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
859 ring->desc, ring->dma);
860 ring->desc = NULL;
861}
862
863
5e1ad18a 864static void rtl8192_beacon_disable(struct net_device *dev)
ecdfa446
GKH		 865{
866 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
867 u32 reg;
868
869 reg = read_nic_dword(priv->ieee80211->dev,INTA_MASK);
870
871 /* disable Beacon realted interrupt signal */
872 reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
873 write_nic_dword(priv->ieee80211->dev, INTA_MASK, reg);
874}
875
876void rtl8192_rtx_disable(struct net_device *dev)
877{
878 u8 cmd;
879 struct r8192_priv *priv = ieee80211_priv(dev);
880 int i;
881
882 cmd=read_nic_byte(dev,CMDR);
883// if(!priv->ieee80211->bSupportRemoteWakeUp) {
884 write_nic_byte(dev, CMDR, cmd &~ \
885 (CR_TE|CR_RE));
886// }
887 force_pci_posting(dev);
888 mdelay(30);
889
890 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
891 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
892 }
893 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
894 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
895 }
896
897
898 skb_queue_purge(&priv->skb_queue);
899 return;
900}
901
5e1ad18a 902static void rtl8192_reset(struct net_device *dev)
ecdfa446
GKH		 903{
904 rtl8192_irq_disable(dev);
905 printk("This is RTL819xP Reset procedure\n");
906}
907
908static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
909inline u16 rtl8192_rate2rate(short rate)
910{
911 if (rate >11) return 0;
912 return rtl_rate[rate];
913}
914
915
916
ecdfa446 917
5e1ad18a 918static void rtl8192_data_hard_stop(struct net_device *dev)
ecdfa446
GKH		 919{
920 //FIXME !!
921 #if 0
922 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
923 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
924 rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
925 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
926 rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
927 #endif
928}
929
930
5e1ad18a 931static void rtl8192_data_hard_resume(struct net_device *dev)
ecdfa446
GKH		 932{
933 // FIXME !!
934 #if 0
935 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
936 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
937 rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
938 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
939 rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
940 #endif
941}
942
943/* this function TX data frames when the ieee80211 stack requires this.
944 * It checks also if we need to stop the ieee tx queue, eventually do it
945 */
5e1ad18a 946static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
ecdfa446
GKH		 947{
948 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
949 int ret;
950 //unsigned long flags;
951 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
952 u8 queue_index = tcb_desc->queue_index;
953 /* shall not be referred by command packet */
954 assert(queue_index != TXCMD_QUEUE);
955
956 //spin_lock_irqsave(&priv->tx_lock,flags);
957
958 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
959#if 0
960 tcb_desc->RATRIndex = 7;
961 tcb_desc->bTxDisableRateFallBack = 1;
962 tcb_desc->bTxUseDriverAssingedRate = 1;
963 tcb_desc->bTxEnableFwCalcDur = 1;
964#endif
965 skb_push(skb, priv->ieee80211->tx_headroom);
966 ret = rtl8192_tx(dev, skb);
967 if(ret != 0) {
968 kfree_skb(skb);
969 };
970
971//
972 if(queue_index!=MGNT_QUEUE) {
973 priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
974 priv->ieee80211->stats.tx_packets++;
975 }
976
977 //spin_unlock_irqrestore(&priv->tx_lock,flags);
978
979// return ret;
980 return;
981}
982
983/* This is a rough attempt to TX a frame
984 * This is called by the ieee 80211 stack to TX management frames.
985 * If the ring is full packet are dropped (for data frame the queue
986 * is stopped before this can happen).
987 */
5e1ad18a 988static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
ecdfa446
GKH		 989{
990 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
991
992
993 int ret;
994 //unsigned long flags;
995 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
996 u8 queue_index = tcb_desc->queue_index;
997
998
999 //spin_lock_irqsave(&priv->tx_lock,flags);
1000
1001 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1002 if(queue_index == TXCMD_QUEUE) {
1003 // skb_push(skb, USB_HWDESC_HEADER_LEN);
1004 rtl819xE_tx_cmd(dev, skb);
1005 ret = 0;
1006 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1007 return ret;
1008 } else {
1009 // RT_TRACE(COMP_SEND, "To send management packet\n");
1010 tcb_desc->RATRIndex = 7;
1011 tcb_desc->bTxDisableRateFallBack = 1;
1012 tcb_desc->bTxUseDriverAssingedRate = 1;
1013 tcb_desc->bTxEnableFwCalcDur = 1;
1014 skb_push(skb, priv->ieee80211->tx_headroom);
1015 ret = rtl8192_tx(dev, skb);
1016 if(ret != 0) {
1017 kfree_skb(skb);
1018 };
1019 }
1020
1021// priv->ieee80211->stats.tx_bytes+=skb->len;
1022// priv->ieee80211->stats.tx_packets++;
1023
1024 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1025
1026 return ret;
1027
1028}
1029
1030
1031void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1032
5e1ad18a 1033static void rtl8192_tx_isr(struct net_device *dev, int prio)
ecdfa446
GKH		 1034{
1035 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1036
1037 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
1038
1039 while (skb_queue_len(&ring->queue)) {
1040 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1041 struct sk_buff *skb;
1042
1043 /* beacon packet will only use the first descriptor defautly,
1044 * and the OWN may not be cleared by the hardware
1045 * */
1046 if(prio != BEACON_QUEUE) {
1047 if(entry->OWN)
1048 return;
1049 ring->idx = (ring->idx + 1) % ring->entries;
1050 }
1051
1052 skb = __skb_dequeue(&ring->queue);
1053 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1054 skb->len, PCI_DMA_TODEVICE);
1055
1056 kfree_skb(skb);
1057 }
1058 if (prio == MGNT_QUEUE){
1059 if (priv->ieee80211->ack_tx_to_ieee){
1060 if (rtl8192_is_tx_queue_empty(dev)){
1061 priv->ieee80211->ack_tx_to_ieee = 0;
1062 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1063 }
1064 }
1065 }
1066
1067 if(prio != BEACON_QUEUE) {
1068 /* try to deal with the pending packets */
1069 tasklet_schedule(&priv->irq_tx_tasklet);
1070 }
1071
1072}
1073
5e1ad18a 1074static void rtl8192_stop_beacon(struct net_device *dev)
ecdfa446
GKH		 1075{
1076 //rtl8192_beacon_disable(dev);
1077}
1078
5e1ad18a 1079static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
ecdfa446
GKH		 1080{
1081 struct r8192_priv *priv = ieee80211_priv(dev);
1082 struct ieee80211_network *net;
1083 u8 i=0, basic_rate = 0;
1084 net = & priv->ieee80211->current_network;
1085
1086 for (i=0; i<net->rates_len; i++)
1087 {
1088 basic_rate = net->rates[i]&0x7f;
1089 switch(basic_rate)
1090 {
1091 case MGN_1M: *rate_config |= RRSR_1M; break;
1092 case MGN_2M: *rate_config |= RRSR_2M; break;
1093 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1094 case MGN_11M: *rate_config |= RRSR_11M; break;
1095 case MGN_6M: *rate_config |= RRSR_6M; break;
1096 case MGN_9M: *rate_config |= RRSR_9M; break;
1097 case MGN_12M: *rate_config |= RRSR_12M; break;
1098 case MGN_18M: *rate_config |= RRSR_18M; break;
1099 case MGN_24M: *rate_config |= RRSR_24M; break;
1100 case MGN_36M: *rate_config |= RRSR_36M; break;
1101 case MGN_48M: *rate_config |= RRSR_48M; break;
1102 case MGN_54M: *rate_config |= RRSR_54M; break;
1103 }
1104 }
1105 for (i=0; i<net->rates_ex_len; i++)
1106 {
1107 basic_rate = net->rates_ex[i]&0x7f;
1108 switch(basic_rate)
1109 {
1110 case MGN_1M: *rate_config |= RRSR_1M; break;
1111 case MGN_2M: *rate_config |= RRSR_2M; break;
1112 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1113 case MGN_11M: *rate_config |= RRSR_11M; break;
1114 case MGN_6M: *rate_config |= RRSR_6M; break;
1115 case MGN_9M: *rate_config |= RRSR_9M; break;
1116 case MGN_12M: *rate_config |= RRSR_12M; break;
1117 case MGN_18M: *rate_config |= RRSR_18M; break;
1118 case MGN_24M: *rate_config |= RRSR_24M; break;
1119 case MGN_36M: *rate_config |= RRSR_36M; break;
1120 case MGN_48M: *rate_config |= RRSR_48M; break;
1121 case MGN_54M: *rate_config |= RRSR_54M; break;
1122 }
1123 }
1124}
1125
1126
1127#define SHORT_SLOT_TIME 9
1128#define NON_SHORT_SLOT_TIME 20
1129
5e1ad18a 1130static void rtl8192_update_cap(struct net_device* dev, u16 cap)
ecdfa446
GKH		 1131{
1132 u32 tmp = 0;
1133 struct r8192_priv *priv = ieee80211_priv(dev);
1134 struct ieee80211_network *net = &priv->ieee80211->current_network;
1135 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1136 tmp = priv->basic_rate;
1137 if (priv->short_preamble)
1138 tmp |= BRSR_AckShortPmb;
1139 write_nic_dword(dev, RRSR, tmp);
1140
1141 if (net->mode & (IEEE_G|IEEE_N_24G))
1142 {
1143 u8 slot_time = 0;
1144 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1145 {//short slot time
1146 slot_time = SHORT_SLOT_TIME;
1147 }
1148 else //long slot time
1149 slot_time = NON_SHORT_SLOT_TIME;
1150 priv->slot_time = slot_time;
1151 write_nic_byte(dev, SLOT_TIME, slot_time);
1152 }
1153
1154}
5e1ad18a
GKH		 1155
1156static void rtl8192_net_update(struct net_device *dev)
ecdfa446
GKH		 1157{
1158
1159 struct r8192_priv *priv = ieee80211_priv(dev);
1160 struct ieee80211_network *net;
1161 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1162 u16 rate_config = 0;
1163 net = &priv->ieee80211->current_network;
1164 //update Basic rate: RR, BRSR
1165 rtl8192_config_rate(dev, &rate_config);
1166 // 2007.01.16, by Emily
1167 // Select RRSR (in Legacy-OFDM and CCK)
1168 // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
1169 // We do not use other rates.
1170 priv->basic_rate = rate_config &= 0x15f;
1171 //BSSID
1172 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1173 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1174#if 0
1175 //MSR
1176 rtl8192_update_msr(dev);
1177#endif
1178
1179
1180// rtl8192_update_cap(dev, net->capability);
1181 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1182 {
1183 write_nic_word(dev, ATIMWND, 2);
1184 write_nic_word(dev, BCN_DMATIME, 256);
1185 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1186 // write_nic_word(dev, BcnIntTime, 100);
1187 //BIT15 of BCN_DRV_EARLY_INT will indicate whether software beacon or hw beacon is applied.
1188 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
1189 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1190
1191 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1192 // TODO: BcnIFS may required to be changed on ASIC
1193 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1194
1195 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1196 }
1197
1198
1199}
1200
ecdfa446
GKH		 1201void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1202{
1203 struct r8192_priv *priv = ieee80211_priv(dev);
1204 struct rtl8192_tx_ring *ring;
1205 tx_desc_819x_pci *entry;
1206 unsigned int idx;
1207 dma_addr_t mapping;
1208 cb_desc *tcb_desc;
1209 unsigned long flags;
1210
1211 ring = &priv->tx_ring[TXCMD_QUEUE];
1212 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1213
1214 spin_lock_irqsave(&priv->irq_th_lock,flags);
1215 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1216 entry = &ring->desc[idx];
1217
1218 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1219 memset(entry,0,12);
1220 entry->LINIP = tcb_desc->bLastIniPkt;
1221 entry->FirstSeg = 1;//first segment
1222 entry->LastSeg = 1; //last segment
1223 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1224 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1225 } else {
1226 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1227 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1228 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1229 entry->QueueSelect = QSLT_CMD;
1230 entry->TxFWInfoSize = 0x08;
1231 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1232 }
1233 entry->TxBufferSize = skb->len;
1234 entry->TxBuffAddr = cpu_to_le32(mapping);
1235 entry->OWN = 1;
1236
1237#ifdef JOHN_DUMP_TXDESC
1238 { int i;
1239 tx_desc_819x_pci *entry1 = &ring->desc[0];
1240 unsigned int *ptr= (unsigned int *)entry1;
1241 printk("<Tx descriptor>:\n");
1242 for (i = 0; i < 8; i++)
1243 printk("%8x ", ptr[i]);
1244 printk("\n");
1245 }
1246#endif
1247 __skb_queue_tail(&ring->queue, skb);
1248 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1249
1250 write_nic_byte(dev, TPPoll, TPPoll_CQ);
1251
1252 return;
1253}
1254
1255/*
1256 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1257 * in TxFwInfo data structure
1258 * 2006.10.30 by Emily
1259 *
1260 * \param QUEUEID Software Queue
1261*/
5e1ad18a 1262static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446
GKH		 1263{
1264 u8 QueueSelect = 0x0; //defualt set to
1265
1266 switch(QueueID) {
1267 case BE_QUEUE:
1268 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
1269 break;
1270
1271 case BK_QUEUE:
1272 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
1273 break;
1274
1275 case VO_QUEUE:
1276 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
1277 break;
1278
1279 case VI_QUEUE:
1280 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
1281 break;
1282 case MGNT_QUEUE:
1283 QueueSelect = QSLT_MGNT;
1284 break;
1285
1286 case BEACON_QUEUE:
1287 QueueSelect = QSLT_BEACON;
1288 break;
1289
1290 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
1291 // TODO: Remove Assertions
1292//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
1293 case TXCMD_QUEUE:
1294 QueueSelect = QSLT_CMD;
1295 break;
1296//#endif
1297 case HIGH_QUEUE:
1298 //QueueSelect = QSLT_HIGH;
1299 //break;
1300
1301 default:
1302 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
1303 break;
1304 }
1305 return QueueSelect;
1306}
1307
5e1ad18a 1308static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1309{
1310 u8 ret = DESC90_RATE1M;
1311
1312 switch(rate) {
1313 case MGN_1M: ret = DESC90_RATE1M; break;
1314 case MGN_2M: ret = DESC90_RATE2M; break;
1315 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1316 case MGN_11M: ret = DESC90_RATE11M; break;
1317 case MGN_6M: ret = DESC90_RATE6M; break;
1318 case MGN_9M: ret = DESC90_RATE9M; break;
1319 case MGN_12M: ret = DESC90_RATE12M; break;
1320 case MGN_18M: ret = DESC90_RATE18M; break;
1321 case MGN_24M: ret = DESC90_RATE24M; break;
1322 case MGN_36M: ret = DESC90_RATE36M; break;
1323 case MGN_48M: ret = DESC90_RATE48M; break;
1324 case MGN_54M: ret = DESC90_RATE54M; break;
1325
1326 // HT rate since here
1327 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1328 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1329 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1330 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1331 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1332 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1333 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1334 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1335 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1336 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1337 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1338 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1339 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1340 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1341 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1342 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1343 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1344
1345 default: break;
1346 }
1347 return ret;
1348}
1349
1350
5e1ad18a 1351static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1352{
1353 u8 tmp_Short;
1354
1355 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1356
1357 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1358 tmp_Short = 0;
1359
1360 return tmp_Short;
1361}
1362
1363/*
1364 * The tx procedure is just as following,
1365 * skb->cb will contain all the following information,
1366 * priority, morefrag, rate, &dev.
1367 * */
1368short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
1369{
1370 struct r8192_priv *priv = ieee80211_priv(dev);
1371 struct rtl8192_tx_ring *ring;
1372 unsigned long flags;
1373 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1374 tx_desc_819x_pci *pdesc = NULL;
1375 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1376 dma_addr_t mapping;
1377 bool multi_addr=false,broad_addr=false,uni_addr=false;
1378 u8* pda_addr = NULL;
1379 int idx;
1380
1381 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1382 /* collect the tx packets statitcs */
1383 pda_addr = ((u8*)skb->data) + sizeof(TX_FWINFO_8190PCI);
1384 if(is_multicast_ether_addr(pda_addr))
1385 multi_addr = true;
1386 else if(is_broadcast_ether_addr(pda_addr))
1387 broad_addr = true;
1388 else
1389 uni_addr = true;
1390
1391 if(uni_addr)
1392 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1393 else if(multi_addr)
1394 priv->stats.txbytesmulticast +=(u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1395 else
1396 priv->stats.txbytesbroadcast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1397
1398 /* fill tx firmware */
1399 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1400 memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
1401 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
1402 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1403 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1404 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1405
1406 /* Aggregation related */
1407 if(tcb_desc->bAMPDUEnable) {
1408 pTxFwInfo->AllowAggregation = 1;
1409 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1410 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1411 } else {
1412 pTxFwInfo->AllowAggregation = 0;
1413 pTxFwInfo->RxMF = 0;
1414 pTxFwInfo->RxAMD = 0;
1415 }
1416
1417 //
1418 // Protection mode related
1419 //
1420 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
1421 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
1422 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
1423 pTxFwInfo->RtsHT= (tcb_desc->rts_rate&0x80)?1:0;
1424 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1425 pTxFwInfo->RtsBandwidth = 0;
1426 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1427 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):(tcb_desc->bRTSUseShortGI?1:0);
1428 //
1429 // Set Bandwidth and sub-channel settings.
1430 //
1431 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
1432 {
1433 if(tcb_desc->bPacketBW)
1434 {
1435 pTxFwInfo->TxBandwidth = 1;
1436#ifdef RTL8190P
1437 pTxFwInfo->TxSubCarrier = 3;
1438#else
1439 pTxFwInfo->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode, cosa 04012008
1440#endif
1441 }
1442 else
1443 {
1444 pTxFwInfo->TxBandwidth = 0;
1445 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1446 }
1447 } else {
1448 pTxFwInfo->TxBandwidth = 0;
1449 pTxFwInfo->TxSubCarrier = 0;
1450 }
1451
1452 if (0)
1453 {
1454 /* 2007/07/25 MH Copy current TX FW info.*/
1455 memcpy((void*)(&Tmp_TxFwInfo), (void*)(pTxFwInfo), sizeof(TX_FWINFO_8190PCI));
1456 printk("&&&&&&&&&&&&&&&&&&&&&&====>print out fwinf\n");
1457 printk("===>enable fwcacl:%d\n", Tmp_TxFwInfo.EnableCPUDur);
1458 printk("===>RTS STBC:%d\n", Tmp_TxFwInfo.RtsSTBC);
1459 printk("===>RTS Subcarrier:%d\n", Tmp_TxFwInfo.RtsSubcarrier);
1460 printk("===>Allow Aggregation:%d\n", Tmp_TxFwInfo.AllowAggregation);
1461 printk("===>TX HT bit:%d\n", Tmp_TxFwInfo.TxHT);
1462 printk("===>Tx rate:%d\n", Tmp_TxFwInfo.TxRate);
1463 printk("===>Received AMPDU Density:%d\n", Tmp_TxFwInfo.RxAMD);
1464 printk("===>Received MPDU Factor:%d\n", Tmp_TxFwInfo.RxMF);
1465 printk("===>TxBandwidth:%d\n", Tmp_TxFwInfo.TxBandwidth);
1466 printk("===>TxSubCarrier:%d\n", Tmp_TxFwInfo.TxSubCarrier);
1467
1468 printk("<=====**********************out of print\n");
1469
1470 }
1471 spin_lock_irqsave(&priv->irq_th_lock,flags);
1472 ring = &priv->tx_ring[tcb_desc->queue_index];
1473 if (tcb_desc->queue_index != BEACON_QUEUE) {
1474 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1475 } else {
1476 idx = 0;
1477 }
1478
1479 pdesc = &ring->desc[idx];
1480 if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
1481 RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d,%x", \
1482 tcb_desc->queue_index,ring->idx, idx,skb->len);
1483 return skb->len;
1484 }
1485
1486 /* fill tx descriptor */
1487 memset((u8*)pdesc,0,12);
1488 /*DWORD 0*/
1489 pdesc->LINIP = 0;
1490 pdesc->CmdInit = 1;
1491 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; //We must add 8!! Emily
1492 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1493
1494 /*DWORD 1*/
1495 pdesc->SecCAMID= 0;
1496 pdesc->RATid = tcb_desc->RATRIndex;
1497
1498
1499 pdesc->NoEnc = 1;
1500 pdesc->SecType = 0x0;
1501 if (tcb_desc->bHwSec) {
1502 static u8 tmp =0;
1503 if (!tmp) {
1504 printk("==>================hw sec\n");
1505 tmp = 1;
1506 }
1507 switch (priv->ieee80211->pairwise_key_type) {
1508 case KEY_TYPE_WEP40:
1509 case KEY_TYPE_WEP104:
1510 pdesc->SecType = 0x1;
1511 pdesc->NoEnc = 0;
1512 break;
1513 case KEY_TYPE_TKIP:
1514 pdesc->SecType = 0x2;
1515 pdesc->NoEnc = 0;
1516 break;
1517 case KEY_TYPE_CCMP:
1518 pdesc->SecType = 0x3;
1519 pdesc->NoEnc = 0;
1520 break;
1521 case KEY_TYPE_NA:
1522 pdesc->SecType = 0x0;
1523 pdesc->NoEnc = 1;
1524 break;
1525 }
1526 }
1527
1528 //
1529 // Set Packet ID
1530 //
1531 pdesc->PktId = 0x0;
1532
1533 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1534 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1535
1536 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1537 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
1538
1539 pdesc->FirstSeg =1;
1540 pdesc->LastSeg = 1;
1541 pdesc->TxBufferSize = skb->len;
1542
1543 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1544 __skb_queue_tail(&ring->queue, skb);
1545 pdesc->OWN = 1;
1546 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1547 dev->trans_start = jiffies;
1548 write_nic_word(dev,TPPoll,0x01<<tcb_desc->queue_index);
1549 return 0;
1550}
1551
5e1ad18a 1552static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
ecdfa446
GKH		 1553{
1554 struct r8192_priv *priv = ieee80211_priv(dev);
1555 rx_desc_819x_pci *entry = NULL;
1556 int i;
1557
1558 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1559 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1560
1561 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1562 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1563 return -ENOMEM;
1564 }
1565
1566 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1567 priv->rx_idx = 0;
1568
1569 for (i = 0; i < priv->rxringcount; i++) {
1570 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1571 dma_addr_t *mapping;
1572 entry = &priv->rx_ring[i];
1573 if (!skb)
1574 return 0;
1575 priv->rx_buf[i] = skb;
1576 mapping = (dma_addr_t *)skb->cb;
1577 *mapping = pci_map_single(priv->pdev, skb->tail,//skb_tail_pointer(skb),
1578 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1579
1580 entry->BufferAddress = cpu_to_le32(*mapping);
1581
1582 entry->Length = priv->rxbuffersize;
1583 entry->OWN = 1;
1584 }
1585
1586 entry->EOR = 1;
1587 return 0;
1588}
1589
1590static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
1591 unsigned int prio, unsigned int entries)
1592{
1593 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1594 tx_desc_819x_pci *ring;
1595 dma_addr_t dma;
1596 int i;
1597
1598 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1599 if (!ring || (unsigned long)ring & 0xFF) {
1600 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1601 return -ENOMEM;
1602 }
1603
1604 memset(ring, 0, sizeof(*ring)*entries);
1605 priv->tx_ring[prio].desc = ring;
1606 priv->tx_ring[prio].dma = dma;
1607 priv->tx_ring[prio].idx = 0;
1608 priv->tx_ring[prio].entries = entries;
1609 skb_queue_head_init(&priv->tx_ring[prio].queue);
1610
1611 for (i = 0; i < entries; i++)
1612 ring[i].NextDescAddress =
1613 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1614
1615 return 0;
1616}
1617
1618
5e1ad18a 1619static short rtl8192_pci_initdescring(struct net_device *dev)
ecdfa446
GKH		 1620{
1621 u32 ret;
1622 int i;
1623 struct r8192_priv *priv = ieee80211_priv(dev);
1624
1625 ret = rtl8192_alloc_rx_desc_ring(dev);
1626 if (ret) {
1627 return ret;
1628 }
1629
1630
1631 /* general process for other queue */
1632 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1633 if ((ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount)))
1634 goto err_free_rings;
1635 }
1636
1637#if 0
1638 /* specific process for hardware beacon process */
1639 if ((ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2)))
1640 goto err_free_rings;
1641#endif
1642
1643 return 0;
1644
1645err_free_rings:
1646 rtl8192_free_rx_ring(dev);
1647 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1648 if (priv->tx_ring[i].desc)
1649 rtl8192_free_tx_ring(dev, i);
1650 return 1;
1651}
1652
5e1ad18a 1653static void rtl8192_pci_resetdescring(struct net_device *dev)
ecdfa446
GKH		 1654{
1655 struct r8192_priv *priv = ieee80211_priv(dev);
1656 int i;
1657
1658 /* force the rx_idx to the first one */
1659 if(priv->rx_ring) {
1660 rx_desc_819x_pci *entry = NULL;
1661 for (i = 0; i < priv->rxringcount; i++) {
1662 entry = &priv->rx_ring[i];
1663 entry->OWN = 1;
1664 }
1665 priv->rx_idx = 0;
1666 }
1667
1668 /* after reset, release previous pending packet, and force the
1669 * tx idx to the first one */
1670 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1671 if (priv->tx_ring[i].desc) {
1672 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1673
1674 while (skb_queue_len(&ring->queue)) {
1675 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1676 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1677
1678 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1679 skb->len, PCI_DMA_TODEVICE);
1680 kfree_skb(skb);
1681 ring->idx = (ring->idx + 1) % ring->entries;
1682 }
1683 ring->idx = 0;
1684 }
1685 }
1686}
1687
1688#if 1
1689extern void rtl8192_update_ratr_table(struct net_device* dev);
5e1ad18a 1690static void rtl8192_link_change(struct net_device *dev)
ecdfa446
GKH		 1691{
1692// int i;
1693
1694 struct r8192_priv *priv = ieee80211_priv(dev);
1695 struct ieee80211_device* ieee = priv->ieee80211;
1696 //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval);
1697 if (ieee->state == IEEE80211_LINKED)
1698 {
1699 rtl8192_net_update(dev);
1700 rtl8192_update_ratr_table(dev);
1701#if 1
1702 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1703 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1704 EnableHWSecurityConfig8192(dev);
1705#endif
1706 }
1707 else
1708 {
1709 write_nic_byte(dev, 0x173, 0);
1710 }
1711 /*update timing params*/
1712 //rtl8192_set_chan(dev, priv->chan);
1713 //MSR
1714 rtl8192_update_msr(dev);
1715
1716 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1717 // // To set CBSSID bit when link with any AP or STA.
1718 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1719 {
1720 u32 reg = 0;
1721 reg = read_nic_dword(dev, RCR);
1722 if (priv->ieee80211->state == IEEE80211_LINKED)
1723 priv->ReceiveConfig = reg |= RCR_CBSSID;
1724 else
1725 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1726 write_nic_dword(dev, RCR, reg);
1727 }
1728}
1729#endif
1730
1731
1732static struct ieee80211_qos_parameters def_qos_parameters = {
1733 {3,3,3,3},/* cw_min */
1734 {7,7,7,7},/* cw_max */
1735 {2,2,2,2},/* aifs */
1736 {0,0,0,0},/* flags */
1737 {0,0,0,0} /* tx_op_limit */
1738};
1739
5e1ad18a 1740static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1741{
1742 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1743 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1744 struct ieee80211_device* ieee = priv->ieee80211;
1745 struct ieee80211_network* net = &ieee->current_network;
1746
1747 if (ieee->pHTInfo->bCurrentHTSupport)
1748 HTUpdateSelfAndPeerSetting(ieee, net);
1749 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1750 rtl8192_update_cap(dev, net->capability);
1751}
1752/*
1753* background support to run QoS activate functionality
1754*/
5e1ad18a 1755static int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1756static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1757{
1758 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
1759 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1760 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1761 u8 mode = priv->ieee80211->current_network.mode;
1762// u32 size = sizeof(struct ieee80211_qos_parameters);
1763 u8 u1bAIFS;
1764 u32 u4bAcParam;
1765 int i;
ecdfa446 1766
ecdfa446 1767 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1768 if(priv->ieee80211->state != IEEE80211_LINKED)
1769 goto success;
1770 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1771 /* It better set slot time at first */
1772 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1773 /* update the ac parameter to related registers */
1774 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1775 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1776 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1777 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1778 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1779 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1780 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
1781 printk("===>u4bAcParam:%x, ", u4bAcParam);
1782 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
1783 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
1784 }
1785
1786success:
ecdfa446 1787 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 1788}
1789
1790static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1791 int active_network,
1792 struct ieee80211_network *network)
1793{
1794 int ret = 0;
1795 u32 size = sizeof(struct ieee80211_qos_parameters);
1796
1797 if(priv->ieee80211->state !=IEEE80211_LINKED)
1798 return ret;
1799
1800 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1801 return ret;
1802
1803 if (network->flags & NETWORK_HAS_QOS_MASK) {
1804 if (active_network &&
1805 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1806 network->qos_data.active = network->qos_data.supported;
1807
1808 if ((network->qos_data.active == 1) && (active_network == 1) &&
1809 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1810 (network->qos_data.old_param_count !=
1811 network->qos_data.param_count)) {
1812 network->qos_data.old_param_count =
1813 network->qos_data.param_count;
ecdfa446 1814 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1815 RT_TRACE (COMP_QOS, "QoS parameters change call "
1816 "qos_activate\n");
1817 }
1818 } else {
1819 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
1820 &def_qos_parameters, size);
1821
1822 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 1823 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1824 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
1825 }
1826 network->qos_data.active = 0;
1827 network->qos_data.supported = 0;
1828 }
1829
1830 return 0;
1831}
1832
1833/* handle manage frame frame beacon and probe response */
1834static int rtl8192_handle_beacon(struct net_device * dev,
1835 struct ieee80211_beacon * beacon,
1836 struct ieee80211_network * network)
1837{
1838 struct r8192_priv *priv = ieee80211_priv(dev);
1839
1840 rtl8192_qos_handle_probe_response(priv,1,network);
1841
ecdfa446 1842 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 1843 return 0;
1844
1845}
1846
1847/*
1848* handling the beaconing responses. if we get different QoS setting
1849* off the network from the associated setting, adjust the QoS
1850* setting
1851*/
1852static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1853 struct ieee80211_network *network)
1854{
1855 int ret = 0;
1856 unsigned long flags;
1857 u32 size = sizeof(struct ieee80211_qos_parameters);
1858 int set_qos_param = 0;
1859
1860 if ((priv == NULL) || (network == NULL))
1861 return ret;
1862
1863 if(priv->ieee80211->state !=IEEE80211_LINKED)
1864 return ret;
1865
1866 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1867 return ret;
1868
1869 spin_lock_irqsave(&priv->ieee80211->lock, flags);
1870 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
1871 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
1872 &network->qos_data.parameters,\
1873 sizeof(struct ieee80211_qos_parameters));
1874 priv->ieee80211->current_network.qos_data.active = 1;
1875#if 0
1876 if((priv->ieee80211->current_network.qos_data.param_count != \
1877 network->qos_data.param_count))
1878#endif
1879 {
1880 set_qos_param = 1;
1881 /* update qos parameter for current network */
1882 priv->ieee80211->current_network.qos_data.old_param_count = \
1883 priv->ieee80211->current_network.qos_data.param_count;
1884 priv->ieee80211->current_network.qos_data.param_count = \
1885 network->qos_data.param_count;
1886 }
1887 } else {
1888 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
1889 &def_qos_parameters, size);
1890 priv->ieee80211->current_network.qos_data.active = 0;
1891 priv->ieee80211->current_network.qos_data.supported = 0;
1892 set_qos_param = 1;
1893 }
1894
1895 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
1896
1897 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
1898 if (set_qos_param == 1)
ecdfa446 1899 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1900
1901 return ret;
1902}
1903
1904
1905static int rtl8192_handle_assoc_response(struct net_device *dev,
1906 struct ieee80211_assoc_response_frame *resp,
1907 struct ieee80211_network *network)
1908{
1909 struct r8192_priv *priv = ieee80211_priv(dev);
1910 rtl8192_qos_association_resp(priv, network);
1911 return 0;
1912}
1913
1914
1915//updateRATRTabel for MCS only. Basic rate is not implement.
1916void rtl8192_update_ratr_table(struct net_device* dev)
1917 // POCTET_STRING posLegacyRate,
1918 // u8* pMcsRate)
1919 // PRT_WLAN_STA pEntry)
1920{
1921 struct r8192_priv* priv = ieee80211_priv(dev);
1922 struct ieee80211_device* ieee = priv->ieee80211;
1923 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
1924 //struct ieee80211_network *net = &ieee->current_network;
1925 u32 ratr_value = 0;
1926 u8 rate_index = 0;
1927
1928 rtl8192_config_rate(dev, (u16*)(&ratr_value));
1929 ratr_value |= (*(u16*)(pMcsRate)) << 12;
1930// switch (net->mode)
1931 switch (ieee->mode)
1932 {
1933 case IEEE_A:
1934 ratr_value &= 0x00000FF0;
1935 break;
1936 case IEEE_B:
1937 ratr_value &= 0x0000000F;
1938 break;
1939 case IEEE_G:
1940 ratr_value &= 0x00000FF7;
1941 break;
1942 case IEEE_N_24G:
1943 case IEEE_N_5G:
1944 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1945 ratr_value &= 0x0007F007;
1946 else{
1947 if (priv->rf_type == RF_1T2R)
1948 ratr_value &= 0x000FF007;
1949 else
1950 ratr_value &= 0x0F81F007;
1951 }
1952 break;
1953 default:
1954 break;
1955 }
1956 ratr_value &= 0x0FFFFFFF;
1957 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1958 ratr_value |= 0x80000000;
1959 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1960 ratr_value |= 0x80000000;
1961 }
1962 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
1963 write_nic_byte(dev, UFWP, 1);
1964}
1965
1966static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
1967static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
5e1ad18a 1968static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446
GKH		 1969{
1970#if 1
1971 struct r8192_priv* priv = ieee80211_priv(dev);
1972 struct ieee80211_device* ieee = priv->ieee80211;
1973 int wpa_ie_len= ieee->wpa_ie_len;
1974 struct ieee80211_crypt_data* crypt;
1975 int encrypt;
1976
1977 crypt = ieee->crypt[ieee->tx_keyidx];
1978 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
1979
1980 /* simply judge */
1981 if(encrypt && (wpa_ie_len == 0)) {
1982 /* wep encryption, no N mode setting */
1983 return false;
1984// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
1985 } else if((wpa_ie_len != 0)) {
1986 /* parse pairwise key type */
1987 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
1988 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
1989 return true;
1990 else
1991 return false;
1992 } else {
1993 //RT_TRACE(COMP_ERR,"In %s The GroupEncAlgorithm is [4]\n",__FUNCTION__ );
1994 return true;
1995 }
1996
1997#if 0
1998 //In here we discuss with SD4 David. He think we still can send TKIP in broadcast group key in MCS rate.
1999 //We can't force in G mode if Pairwie key is AES and group key is TKIP
2000 if((pSecInfo->GroupEncAlgorithm == WEP104_Encryption) || (pSecInfo->GroupEncAlgorithm == WEP40_Encryption) ||
2001 (pSecInfo->PairwiseEncAlgorithm == WEP104_Encryption) ||
2002 (pSecInfo->PairwiseEncAlgorithm == WEP40_Encryption) || (pSecInfo->PairwiseEncAlgorithm == TKIP_Encryption))
2003 {
2004 return false;
2005 }
2006 else
2007 return true;
2008#endif
2009 return true;
2010#endif
2011}
2012
5e1ad18a 2013static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 2014{
2015 struct ieee80211_device* ieee = priv->ieee80211;
2016 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2017 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2018 {
2019 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2020 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2021 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2022 }
2023 else
2024 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2025 return;
2026}
2027
5e1ad18a 2028static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
ecdfa446
GKH		 2029{
2030 struct r8192_priv *priv = ieee80211_priv(dev);
2031 u8 ret = 0;
2032 switch(priv->rf_chip)
2033 {
2034 case RF_8225:
2035 case RF_8256:
2036 case RF_PSEUDO_11N:
2037 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2038 break;
2039 case RF_8258:
2040 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2041 break;
2042 default:
2043 ret = WIRELESS_MODE_B;
2044 break;
2045 }
2046 return ret;
2047}
5e1ad18a
GKH		 2048
2049static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 2050{
2051 struct r8192_priv *priv = ieee80211_priv(dev);
2052 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2053
2054#if 1
2055 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2056 {
2057 if(bSupportMode & WIRELESS_MODE_N_24G)
2058 {
2059 wireless_mode = WIRELESS_MODE_N_24G;
2060 }
2061 else if(bSupportMode & WIRELESS_MODE_N_5G)
2062 {
2063 wireless_mode = WIRELESS_MODE_N_5G;
2064 }
2065 else if((bSupportMode & WIRELESS_MODE_A))
2066 {
2067 wireless_mode = WIRELESS_MODE_A;
2068 }
2069 else if((bSupportMode & WIRELESS_MODE_G))
2070 {
2071 wireless_mode = WIRELESS_MODE_G;
2072 }
2073 else if((bSupportMode & WIRELESS_MODE_B))
2074 {
2075 wireless_mode = WIRELESS_MODE_B;
2076 }
2077 else{
2078 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2079 wireless_mode = WIRELESS_MODE_B;
2080 }
2081 }
2082#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA
2083 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2084#endif
2085 priv->ieee80211->mode = wireless_mode;
2086
2087 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2088 priv->ieee80211->pHTInfo->bEnableHT = 1;
2089 else
2090 priv->ieee80211->pHTInfo->bEnableHT = 0;
2091 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2092 rtl8192_refresh_supportrate(priv);
2093#endif
2094
2095}
2096//init priv variables here
2097
5e1ad18a 2098static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446
GKH		 2099{
2100 bool Reval;
2101 struct r8192_priv* priv = ieee80211_priv(dev);
2102 struct ieee80211_device* ieee = priv->ieee80211;
2103
2104 if(ieee->bHalfWirelessN24GMode == true)
2105 Reval = true;
2106 else
2107 Reval = false;
2108
2109 return Reval;
2110}
2111
2112short rtl8192_is_tx_queue_empty(struct net_device *dev)
2113{
2114 int i=0;
2115 struct r8192_priv *priv = ieee80211_priv(dev);
2116 for (i=0; i<=MGNT_QUEUE; i++)
2117 {
2118 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2119 continue;
2120 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
2121 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
2122 return 0;
2123 }
2124 }
2125 return 1;
2126}
5e1ad18a 2127static void rtl8192_hw_sleep_down(struct net_device *dev)
ecdfa446
GKH		 2128{
2129 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
2130 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
2131}
5e1ad18a 2132static void rtl8192_hw_sleep_wq (struct work_struct *work)
ecdfa446
GKH		 2133{
2134// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
2135// struct ieee80211_device * ieee = (struct ieee80211_device*)
2136// container_of(work, struct ieee80211_device, watch_dog_wq);
2137 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2138 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
2139 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 2140 //printk("=========>%s()\n", __FUNCTION__);
2141 rtl8192_hw_sleep_down(dev);
2142}
2143// printk("dev is %d\n",dev);
2144// printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
5e1ad18a 2145static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446
GKH		 2146{
2147// u32 flags = 0;
2148
2149// spin_lock_irqsave(&priv->ps_lock,flags);
2150 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
2151 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
2152 //FIXME: will we send package stored while nic is sleep?
2153// spin_unlock_irqrestore(&priv->ps_lock,flags);
2154}
ecdfa446
GKH		 2155void rtl8192_hw_wakeup_wq (struct work_struct *work)
2156{
2157// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
2158// struct ieee80211_device * ieee = (struct ieee80211_device*)
2159// container_of(work, struct ieee80211_device, watch_dog_wq);
2160 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2161 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
2162 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 2163 rtl8192_hw_wakeup(dev);
2164
2165}
2166
2167#define MIN_SLEEP_TIME 50
2168#define MAX_SLEEP_TIME 10000
5e1ad18a 2169static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446
GKH		 2170{
2171
2172 struct r8192_priv *priv = ieee80211_priv(dev);
2173
2174 u32 rb = jiffies;
2175 unsigned long flags;
2176
2177 spin_lock_irqsave(&priv->ps_lock,flags);
2178
2179 /* Writing HW register with 0 equals to disable
2180 * the timer, that is not really what we want
2181 */
2182 tl -= MSECS(4+16+7);
2183
2184 //if(tl == 0) tl = 1;
2185
2186 /* FIXME HACK FIXME HACK */
2187// force_pci_posting(dev);
2188 //mdelay(1);
2189
2190// rb = read_nic_dword(dev, TSFTR);
2191
2192 /* If the interval in witch we are requested to sleep is too
2193 * short then give up and remain awake
2194 */
2195 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2196 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2197 spin_unlock_irqrestore(&priv->ps_lock,flags);
2198 printk("too short to sleep\n");
2199 return;
2200 }
2201
2202// write_nic_dword(dev, TimerInt, tl);
2203// rb = read_nic_dword(dev, TSFTR);
2204 {
2205 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
2206 // if (tl<rb)
2207 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
2208 }
2209 /* if we suspect the TimerInt is gone beyond tl
2210 * while setting it, then give up
2211 */
2212#if 1
2213 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
2214 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2215 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
2216 spin_unlock_irqrestore(&priv->ps_lock,flags);
2217 return;
2218 }
2219#endif
2220// if(priv->rf_sleep)
2221// priv->rf_sleep(dev);
2222
2223 //printk("<=========%s()\n", __FUNCTION__);
2224 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
2225 spin_unlock_irqrestore(&priv->ps_lock,flags);
2226}
2227static void rtl8192_init_priv_variable(struct net_device* dev)
2228{
2229 struct r8192_priv *priv = ieee80211_priv(dev);
2230 u8 i;
2231 priv->being_init_adapter = false;
2232 priv->txbuffsize = 1600;//1024;
2233 priv->txfwbuffersize = 4096;
2234 priv->txringcount = 64;//32;
2235 //priv->txbeaconcount = priv->txringcount;
2236 priv->txbeaconcount = 2;
2237 priv->rxbuffersize = 9100;//2048;//1024;
2238 priv->rxringcount = MAX_RX_COUNT;//64;
2239 priv->irq_enabled=0;
2240 priv->card_8192 = NIC_8192E;
2241 priv->rx_skb_complete = 1;
2242 priv->chan = 1; //set to channel 1
2243 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
2244 priv->RegChannelPlan = 0xf;
2245 priv->nrxAMPDU_size = 0;
2246 priv->nrxAMPDU_aggr_num = 0;
2247 priv->last_rxdesc_tsf_high = 0;
2248 priv->last_rxdesc_tsf_low = 0;
2249 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
2250 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2251 priv->ieee80211->ieee_up=0;
2252 priv->retry_rts = DEFAULT_RETRY_RTS;
2253 priv->retry_data = DEFAULT_RETRY_DATA;
2254 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
2255 priv->ieee80211->rate = 110; //11 mbps
2256 priv->ieee80211->short_slot = 1;
2257 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
2258 priv->bcck_in_ch14 = false;
2259 priv->bfsync_processing = false;
2260 priv->CCKPresentAttentuation = 0;
2261 priv->rfa_txpowertrackingindex = 0;
2262 priv->rfc_txpowertrackingindex = 0;
2263 priv->CckPwEnl = 6;
2264 priv->ScanDelay = 50;//for Scan TODO
2265 //added by amy for silent reset
2266 priv->ResetProgress = RESET_TYPE_NORESET;
2267 priv->bForcedSilentReset = 0;
2268 priv->bDisableNormalResetCheck = false;
2269 priv->force_reset = false;
2270 //added by amy for power save
2271 priv->RegRfOff = 0;
2272 priv->ieee80211->RfOffReason = 0;
2273 priv->RFChangeInProgress = false;
2274 priv->bHwRfOffAction = 0;
2275 priv->SetRFPowerStateInProgress = false;
2276 priv->ieee80211->PowerSaveControl.bInactivePs = true;
2277 priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
2278 //just for debug
2279 priv->txpower_checkcnt = 0;
2280 priv->thermal_readback_index =0;
2281 priv->txpower_tracking_callback_cnt = 0;
2282 priv->ccktxpower_adjustcnt_ch14 = 0;
2283 priv->ccktxpower_adjustcnt_not_ch14 = 0;
2284
2285 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2286 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2287 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2288 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2289 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
2290 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
2291
2292 priv->ieee80211->active_scan = 1;
2293 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
2294 priv->ieee80211->host_encrypt = 1;
2295 priv->ieee80211->host_decrypt = 1;
2296 //priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
2297 //priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
2298 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
2299 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
2300 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
2301 priv->ieee80211->set_chan = rtl8192_set_chan;
2302 priv->ieee80211->link_change = rtl8192_link_change;
2303 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
2304 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
2305 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
2306 priv->ieee80211->init_wmmparam_flag = 0;
2307 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2308 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
2309 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2310 priv->ieee80211->qos_support = 1;
2311 priv->ieee80211->dot11PowerSaveMode = 0;
2312 //added by WB
2313// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
2314 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
2315 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
2316 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
2317
2318 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
2319// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
2320 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
2321 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
2322 //added by david
2323 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
2324 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
2325 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
2326
2327 //added by amy
2328 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
2329
2330 priv->card_type = USB;
2331 {
2332 priv->ShortRetryLimit = 0x30;
2333 priv->LongRetryLimit = 0x30;
2334 }
2335 priv->EarlyRxThreshold = 7;
2336 priv->enable_gpio0 = 0;
2337
2338 priv->TransmitConfig = 0;
2339
2340 priv->ReceiveConfig = RCR_ADD3 |
2341 RCR_AMF | RCR_ADF | //accept management/data
2342 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
2343 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
2344 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2345 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2346
2347 priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |\
2348 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |\
2349 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |\
2350 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2351
2352 priv->AcmControl = 0;
2353 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
2354 if (priv->pFirmware)
2355 memset(priv->pFirmware, 0, sizeof(rt_firmware));
2356
2357 /* rx related queue */
2358 skb_queue_head_init(&priv->rx_queue);
2359 skb_queue_head_init(&priv->skb_queue);
2360
2361 /* Tx related queue */
2362 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2363 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
2364 }
2365 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2366 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
2367 }
2368 priv->rf_set_chan = rtl8192_phy_SwChnl;
2369}
2370
2371//init lock here
2372static void rtl8192_init_priv_lock(struct r8192_priv* priv)
2373{
2374 spin_lock_init(&priv->tx_lock);
2375 spin_lock_init(&priv->irq_lock);//added by thomas
2376 spin_lock_init(&priv->irq_th_lock);
2377 spin_lock_init(&priv->rf_ps_lock);
2378 spin_lock_init(&priv->ps_lock);
2379 //spin_lock_init(&priv->rf_lock);
2380 sema_init(&priv->wx_sem,1);
2381 sema_init(&priv->rf_sem,1);
ecdfa446 2382 mutex_init(&priv->mutex);
ecdfa446
GKH		 2383}
2384
ecdfa446 2385extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
ecdfa446
GKH		 2386
2387void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
2388void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
2389void rtl8192_prepare_beacon(struct r8192_priv *priv);
2390//init tasklet and wait_queue here. only 2.6 above kernel is considered
2391#define DRV_NAME "wlan0"
2392static void rtl8192_init_priv_task(struct net_device* dev)
2393{
2394 struct r8192_priv *priv = ieee80211_priv(dev);
2395
ecdfa446
GKH		 2396#ifdef PF_SYNCTHREAD
2397 priv->priv_wq = create_workqueue(DRV_NAME,0);
2398#else
2399 priv->priv_wq = create_workqueue(DRV_NAME);
2400#endif
ecdfa446 2401
ecdfa446
GKH		 2402// INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart);
2403 INIT_WORK(&priv->reset_wq, rtl8192_restart);
2404// INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
2405 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2406 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2407 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2408 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
2409 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
2410 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
2411 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
2412 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
2413 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
2414
ecdfa446
GKH		 2415 tasklet_init(&priv->irq_rx_tasklet,
2416 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
2417 (unsigned long)priv);
2418 tasklet_init(&priv->irq_tx_tasklet,
2419 (void(*)(unsigned long))rtl8192_irq_tx_tasklet,
2420 (unsigned long)priv);
2421 tasklet_init(&priv->irq_prepare_beacon_tasklet,
2422 (void(*)(unsigned long))rtl8192_prepare_beacon,
2423 (unsigned long)priv);
2424}
2425
2426static void rtl8192_get_eeprom_size(struct net_device* dev)
2427{
2428 u16 curCR = 0;
2429 struct r8192_priv *priv = ieee80211_priv(dev);
2430 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
2431 curCR = read_nic_dword(dev, EPROM_CMD);
2432 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2433 //whether need I consider BIT5?
2434 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2435 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2436}
2437
2438//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
2439static inline u16 endian_swap(u16* data)
2440{
2441 u16 tmp = *data;
2442 *data = (tmp >> 8) | (tmp << 8);
2443 return *data;
2444}
2445
2446/*
2447 * Note: Adapter->EEPROMAddressSize should be set before this function call.
2448 * EEPROM address size can be got through GetEEPROMSize8185()
2449*/
2450static void rtl8192_read_eeprom_info(struct net_device* dev)
2451{
2452 struct r8192_priv *priv = ieee80211_priv(dev);
2453
2454 u8 tempval;
2455#ifdef RTL8192E
2456 u8 ICVer8192, ICVer8256;
2457#endif
2458 u16 i,usValue, IC_Version;
2459 u16 EEPROMId;
2460#ifdef RTL8190P
2461 u8 offset;//, tmpAFR;
2462 u8 EepromTxPower[100];
2463#endif
2464 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2465 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2466
2467
2468 // TODO: I don't know if we need to apply EF function to EEPROM read function
2469
2470 //2 Read EEPROM ID to make sure autoload is success
2471 EEPROMId = eprom_read(dev, 0);
2472 if( EEPROMId != RTL8190_EEPROM_ID )
2473 {
2474 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2475 priv->AutoloadFailFlag=true;
2476 }
2477 else
2478 {
2479 priv->AutoloadFailFlag=false;
2480 }
2481
2482 //
2483 // Assign Chip Version ID
2484 //
2485 // Read IC Version && Channel Plan
2486 if(!priv->AutoloadFailFlag)
2487 {
2488 // VID, PID
2489 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
2490 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
2491
2492 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2493 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2494 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
2495 priv->eeprom_ChannelPlan = usValue&0xff;
2496 IC_Version = ((usValue&0xff00)>>8);
2497
2498#ifdef RTL8190P
2499 priv->card_8192_version = (VERSION_8190)(IC_Version);
2500#else
2501 #ifdef RTL8192E
2502 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2503 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2504 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
2505 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
2506 if(ICVer8192 == 0x2) //B-cut
2507 {
2508 if(ICVer8256 == 0x5) //E-cut
2509 priv->card_8192_version= VERSION_8190_BE;
2510 }
2511 #endif
2512#endif
2513 switch(priv->card_8192_version)
2514 {
2515 case VERSION_8190_BD:
2516 case VERSION_8190_BE:
2517 break;
2518 default:
2519 priv->card_8192_version = VERSION_8190_BD;
2520 break;
2521 }
2522 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2523 }
2524 else
2525 {
2526 priv->card_8192_version = VERSION_8190_BD;
2527 priv->eeprom_vid = 0;
2528 priv->eeprom_did = 0;
2529 priv->eeprom_CustomerID = 0;
2530 priv->eeprom_ChannelPlan = 0;
2531 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
2532 }
2533
2534 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2535 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2536 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2537
2538 //2 Read Permanent MAC address
2539 if(!priv->AutoloadFailFlag)
2540 {
2541 for(i = 0; i < 6; i += 2)
2542 {
2543 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2544 *(u16*)(&dev->dev_addr[i]) = usValue;
2545 }
2546 } else {
2547 // when auto load failed, the last address byte set to be a random one.
2548 // added by david woo.2007/11/7
2549 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2550 }
2551
2552 RT_TRACE(COMP_INIT, "Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
2553 dev->dev_addr[0], dev->dev_addr[1],
2554 dev->dev_addr[2], dev->dev_addr[3],
2555 dev->dev_addr[4], dev->dev_addr[5]);
2556
2557 //2 TX Power Check EEPROM Fail or not
2558 if(priv->card_8192_version > VERSION_8190_BD) {
2559 priv->bTXPowerDataReadFromEEPORM = true;
2560 } else {
2561 priv->bTXPowerDataReadFromEEPORM = false;
2562 }
2563
2564 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE dafault=1T2R
2565 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2566
2567 if(priv->card_8192_version > VERSION_8190_BD)
2568 {
2569 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2570 if(!priv->AutoloadFailFlag)
2571 {
2572 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2573 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2574
2575 if (tempval&0x80) //RF-indication, bit[7]
2576 priv->rf_type = RF_1T2R;
2577 else
2578 priv->rf_type = RF_2T4R;
2579 }
2580 else
2581 {
2582 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2583 }
2584 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2585 priv->EEPROMLegacyHTTxPowerDiff);
2586
2587 // Read ThermalMeter from EEPROM
2588 if(!priv->AutoloadFailFlag)
2589 {
2590 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2591 }
2592 else
2593 {
2594 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2595 }
2596 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2597 //vivi, for tx power track
2598 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2599
2600 if(priv->epromtype == EPROM_93c46)
2601 {
2602 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2603 if(!priv->AutoloadFailFlag)
2604 {
2605 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
2606 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2607 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2608 }
2609 else
2610 {
2611 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2612 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2613 }
2614 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2615 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2616
2617 //
2618 // Get per-channel Tx Power Level
2619 //
2620 for(i=0; i<14; i+=2)
2621 {
2622 if(!priv->AutoloadFailFlag)
2623 {
2624 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2625 }
2626 else
2627 {
2628 usValue = EEPROM_Default_TxPower;
2629 }
2630 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2631 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2632 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2633 }
2634 for(i=0; i<14; i+=2)
2635 {
2636 if(!priv->AutoloadFailFlag)
2637 {
2638 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2639 }
2640 else
2641 {
2642 usValue = EEPROM_Default_TxPower;
2643 }
2644 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2645 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2646 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2647 }
2648 }
2649 else if(priv->epromtype== EPROM_93c56)
2650 {
2651 #ifdef RTL8190P
2652 // Read CrystalCap from EEPROM
2653 if(!priv->AutoloadFailFlag)
2654 {
2655 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2656 priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12);
2657 }
2658 else
2659 {
2660 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2661 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2662 }
2663 RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2664 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2665
2666 // Get Tx Power Level by Channel
2667 if(!priv->AutoloadFailFlag)
2668 {
2669 // Read Tx power of Channel 1 ~ 14 from EEPROM.
2670 for(i = 0; i < 12; i+=2)
2671 {
2672 if (i <6)
2673 offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i;
2674 else
2675 offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6;
2676 usValue = eprom_read(dev, (offset>>1));
2677 *((u16*)(&EepromTxPower[i])) = usValue;
2678 }
2679
2680 for(i = 0; i < 12; i++)
2681 {
2682 if (i <= 2)
2683 priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i];
2684 else if ((i >=3 )&&(i <= 5))
2685 priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i];
2686 else if ((i >=6 )&&(i <= 8))
2687 priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i];
2688 else
2689 priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i];
2690 }
2691 }
2692 else
2693 {
2694 priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2695 priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2696 priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2697
2698 priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2699 priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2700 priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2701
2702 priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2703 priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2704 priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2705
2706 priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2707 priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2708 priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2709 }
2710 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]);
2711 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]);
2712 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]);
2713 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]);
2714 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]);
2715 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]);
2716 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]);
2717 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]);
2718 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]);
2719 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]);
2720 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]);
2721 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]);
2722#endif
2723
2724 }
2725 //
2726 // Update HAL variables.
2727 //
2728 if(priv->epromtype == EPROM_93c46)
2729 {
2730 for(i=0; i<14; i++)
2731 {
2732 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2733 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2734 }
2735 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2736 // Antenna B gain offset to antenna A, bit0~3
2737 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2738 // Antenna C gain offset to antenna A, bit4~7
2739 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2740 // Antenna D gain offset to antenna A, bit8~11
2741 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2742 // CrystalCap, bit12~15
2743 priv->CrystalCap = priv->EEPROMCrystalCap;
2744 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2745 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2746 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2747 }
2748 else if(priv->epromtype == EPROM_93c56)
2749 {
2750 //char cck_pwr_diff_a=0, cck_pwr_diff_c=0;
2751
2752 //cck_pwr_diff_a = pHalData->EEPROMRfACCKChnl7TxPwLevel - pHalData->EEPROMRfAOfdmChnlTxPwLevel[1];
2753 //cck_pwr_diff_c = pHalData->EEPROMRfCCCKChnl7TxPwLevel - pHalData->EEPROMRfCOfdmChnlTxPwLevel[1];
2754 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2755 {
2756 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2757 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2758 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2759 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2760 }
2761 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2762 {
2763 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2764 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2765 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2766 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2767 }
2768 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2769 {
2770 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2771 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2772 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2773 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2774 }
2775 for(i=0; i<14; i++)
2776 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2777 for(i=0; i<14; i++)
2778 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2779 for(i=0; i<14; i++)
2780 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2781 for(i=0; i<14; i++)
2782 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2783 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2784 priv->AntennaTxPwDiff[0] = 0;
2785 priv->AntennaTxPwDiff[1] = 0;
2786 priv->AntennaTxPwDiff[2] = 0;
2787 priv->CrystalCap = priv->EEPROMCrystalCap;
2788 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2789 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2790 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2791 }
2792 }
2793
2794 if(priv->rf_type == RF_1T2R)
2795 {
2796 RT_TRACE(COMP_INIT, "\n1T2R config\n");
2797 }
2798 else if (priv->rf_type == RF_2T4R)
2799 {
2800 RT_TRACE(COMP_INIT, "\n2T4R config\n");
2801 }
2802
2803 // 2008/01/16 MH We can only know RF type in the function. So we have to init
2804 // DIG RATR table again.
2805 init_rate_adaptive(dev);
2806
2807 //1 Make a copy for following variables and we can change them if we want
2808
2809 priv->rf_chip= RF_8256;
2810
2811 if(priv->RegChannelPlan == 0xf)
2812 {
2813 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2814 }
2815 else
2816 {
2817 priv->ChannelPlan = priv->RegChannelPlan;
2818 }
2819
2820 //
2821 // Used PID and DID to Set CustomerID
2822 //
2823 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2824 {
2825 priv->CustomerID = RT_CID_DLINK;
2826 }
2827
2828 switch(priv->eeprom_CustomerID)
2829 {
2830 case EEPROM_CID_DEFAULT:
2831 priv->CustomerID = RT_CID_DEFAULT;
2832 break;
2833 case EEPROM_CID_CAMEO:
2834 priv->CustomerID = RT_CID_819x_CAMEO;
2835 break;
2836 case EEPROM_CID_RUNTOP:
2837 priv->CustomerID = RT_CID_819x_RUNTOP;
2838 break;
2839 case EEPROM_CID_NetCore:
2840 priv->CustomerID = RT_CID_819x_Netcore;
2841 break;
2842 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2843 priv->CustomerID = RT_CID_TOSHIBA;
2844 if(priv->eeprom_ChannelPlan&0x80)
2845 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2846 else
2847 priv->ChannelPlan = 0x0;
2848 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2849 priv->ChannelPlan);
2850 break;
2851 case EEPROM_CID_Nettronix:
2852 priv->ScanDelay = 100; //cosa add for scan
2853 priv->CustomerID = RT_CID_Nettronix;
2854 break;
2855 case EEPROM_CID_Pronet:
2856 priv->CustomerID = RT_CID_PRONET;
2857 break;
2858 case EEPROM_CID_DLINK:
2859 priv->CustomerID = RT_CID_DLINK;
2860 break;
2861
2862 case EEPROM_CID_WHQL:
2863 //Adapter->bInHctTest = TRUE;//do not supported
2864
2865 //priv->bSupportTurboMode = FALSE;
2866 //priv->bAutoTurboBy8186 = FALSE;
2867
2868 //pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
2869 //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
2870 //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
2871
2872 break;
2873 default:
2874 // value from RegCustomerID
2875 break;
2876 }
2877
2878 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2879 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2880 priv->ChannelPlan = 0; //FCC
2881
2882 switch(priv->CustomerID)
2883 {
2884 case RT_CID_DEFAULT:
2885 #ifdef RTL8190P
2886 priv->LedStrategy = HW_LED;
2887 #else
2888 #ifdef RTL8192E
2889 priv->LedStrategy = SW_LED_MODE1;
2890 #endif
2891 #endif
2892 break;
2893
2894 case RT_CID_819x_CAMEO:
2895 priv->LedStrategy = SW_LED_MODE2;
2896 break;
2897
2898 case RT_CID_819x_RUNTOP:
2899 priv->LedStrategy = SW_LED_MODE3;
2900 break;
2901
2902 case RT_CID_819x_Netcore:
2903 priv->LedStrategy = SW_LED_MODE4;
2904 break;
2905
2906 case RT_CID_Nettronix:
2907 priv->LedStrategy = SW_LED_MODE5;
2908 break;
2909
2910 case RT_CID_PRONET:
2911 priv->LedStrategy = SW_LED_MODE6;
2912 break;
2913
2914 case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
2915 // Do nothing.
2916 //break;
2917
2918 default:
2919 #ifdef RTL8190P
2920 priv->LedStrategy = HW_LED;
2921 #else
2922 #ifdef RTL8192E
2923 priv->LedStrategy = SW_LED_MODE1;
2924 #endif
2925 #endif
2926 break;
2927 }
2928/*
2929 //2008.06.03, for WOL
2930 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
2931 priv->ieee80211->bSupportRemoteWakeUp = TRUE;
2932 else
2933 priv->ieee80211->bSupportRemoteWakeUp = FALSE;
2934*/
2935 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
2936 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
2937 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
2938 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
2939
2940 return ;
2941}
2942
2943
5e1ad18a 2944static short rtl8192_get_channel_map(struct net_device * dev)
ecdfa446
GKH		 2945{
2946 struct r8192_priv *priv = ieee80211_priv(dev);
2947#ifdef ENABLE_DOT11D
2948 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2949 printk("rtl8180_init:Error channel plan! Set to default.\n");
2950 priv->ChannelPlan= 0;
2951 }
2952 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2953
2954 rtl819x_set_channel_map(priv->ChannelPlan, priv);
2955#else
2956 int ch,i;
2957 //Set Default Channel Plan
2958 if(!channels){
2959 DMESG("No channels, aborting");
2960 return -1;
2961 }
2962 ch=channels;
2963 priv->ChannelPlan= 0;//hikaru
2964 // set channels 1..14 allowed in given locale
2965 for (i=1; i<=14; i++) {
2966 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2967 ch >>= 1;
2968 }
2969#endif
2970 return 0;
2971}
5e1ad18a
GKH		 2972
2973static short rtl8192_init(struct net_device *dev)
ecdfa446
GKH		 2974{
2975 struct r8192_priv *priv = ieee80211_priv(dev);
2976 memset(&(priv->stats),0,sizeof(struct Stats));
2977 rtl8192_init_priv_variable(dev);
2978 rtl8192_init_priv_lock(priv);
2979 rtl8192_init_priv_task(dev);
2980 rtl8192_get_eeprom_size(dev);
2981 rtl8192_read_eeprom_info(dev);
2982 rtl8192_get_channel_map(dev);
2983 init_hal_dm(dev);
2984 init_timer(&priv->watch_dog_timer);
2985 priv->watch_dog_timer.data = (unsigned long)dev;
2986 priv->watch_dog_timer.function = watch_dog_timer_callback;
2987#if defined(IRQF_SHARED)
2988 if(request_irq(dev->irq, (void*)rtl8192_interrupt, IRQF_SHARED, dev->name, dev)){
2989#else
2990 if(request_irq(dev->irq, (void *)rtl8192_interrupt, SA_SHIRQ, dev->name, dev)){
2991#endif
2992 printk("Error allocating IRQ %d",dev->irq);
2993 return -1;
2994 }else{
2995 priv->irq=dev->irq;
2996 printk("IRQ %d",dev->irq);
2997 }
2998 if(rtl8192_pci_initdescring(dev)!=0){
2999 printk("Endopoints initialization failed");
3000 return -1;
3001 }
3002
3003 //rtl8192_rx_enable(dev);
3004 //rtl8192_adapter_start(dev);
ecdfa446
GKH		 3005 return 0;
3006}
3007
3008/******************************************************************************
3009 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
3010 * not to do all the hw config as its name says
3011 * input: net_device dev
3012 * output: none
3013 * return: none
3014 * notice: This part need to modified according to the rate set we filtered
3015 * ****************************************************************************/
5e1ad18a 3016static void rtl8192_hwconfig(struct net_device* dev)
ecdfa446
GKH		 3017{
3018 u32 regRATR = 0, regRRSR = 0;
3019 u8 regBwOpMode = 0, regTmp = 0;
3020 struct r8192_priv *priv = ieee80211_priv(dev);
3021
3022// Set RRSR, RATR, and BW_OPMODE registers
3023 //
3024 switch(priv->ieee80211->mode)
3025 {
3026 case WIRELESS_MODE_B:
3027 regBwOpMode = BW_OPMODE_20MHZ;
3028 regRATR = RATE_ALL_CCK;
3029 regRRSR = RATE_ALL_CCK;
3030 break;
3031 case WIRELESS_MODE_A:
3032 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
3033 regRATR = RATE_ALL_OFDM_AG;
3034 regRRSR = RATE_ALL_OFDM_AG;
3035 break;
3036 case WIRELESS_MODE_G:
3037 regBwOpMode = BW_OPMODE_20MHZ;
3038 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3039 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3040 break;
3041 case WIRELESS_MODE_AUTO:
3042 case WIRELESS_MODE_N_24G:
3043 // It support CCK rate by default.
3044 // CCK rate will be filtered out only when associated AP does not support it.
3045 regBwOpMode = BW_OPMODE_20MHZ;
3046 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3047 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3048 break;
3049 case WIRELESS_MODE_N_5G:
3050 regBwOpMode = BW_OPMODE_5G;
3051 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3052 regRRSR = RATE_ALL_OFDM_AG;
3053 break;
3054 }
3055
3056 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
3057 {
3058 u32 ratr_value = 0;
3059 ratr_value = regRATR;
3060 if (priv->rf_type == RF_1T2R)
3061 {
3062 ratr_value &= ~(RATE_ALL_OFDM_2SS);
3063 }
3064 write_nic_dword(dev, RATR0, ratr_value);
3065 write_nic_byte(dev, UFWP, 1);
3066 }
3067 regTmp = read_nic_byte(dev, 0x313);
3068 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3069 write_nic_dword(dev, RRSR, regRRSR);
3070
3071 //
3072 // Set Retry Limit here
3073 //
3074 write_nic_word(dev, RETRY_LIMIT,
3075 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
3076 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
3077 // Set Contention Window here
3078
3079 // Set Tx AGC
3080
3081 // Set Tx Antenna including Feedback control
3082
3083 // Set Auto Rate fallback control
3084
3085
3086}
3087
3088
5e1ad18a 3089static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
ecdfa446
GKH		 3090{
3091 struct r8192_priv *priv = ieee80211_priv(dev);
3092// struct ieee80211_device *ieee = priv->ieee80211;
3093 u32 ulRegRead;
3094 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
3095// static char szMACPHYRegFile[] = RTL819X_PHY_MACPHY_REG;
3096// static char szMACPHYRegPGFile[] = RTL819X_PHY_MACPHY_REG_PG;
3097 //u8 eRFPath;
3098 u8 tmpvalue;
3099#ifdef RTL8192E
3100 u8 ICVersion,SwitchingRegulatorOutput;
3101#endif
3102 bool bfirmwareok = true;
3103#ifdef RTL8190P
3104 u8 ucRegRead;
3105#endif
3106 u32 tmpRegA, tmpRegC, TempCCk;
3107 int i =0;
3108// u32 dwRegRead = 0;
3109
3110 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
3111 priv->being_init_adapter = true;
3112 rtl8192_pci_resetdescring(dev);
3113 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
3114 priv->Rf_Mode = RF_OP_By_SW_3wire;
3115#ifdef RTL8192E
3116 //dPLL on
3117 if(priv->ResetProgress == RESET_TYPE_NORESET)
3118 {
3119 write_nic_byte(dev, ANAPAR, 0x37);
3120 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
3121 // Joseph increae the time to prevent firmware download fail
3122 mdelay(500);
3123 }
3124#endif
3125 //PlatformSleepUs(10000);
3126 // For any kind of InitializeAdapter process, we shall use system now!!
3127 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
3128
3129 // Set to eRfoff in order not to count receive count.
3130 if(priv->RegRfOff == TRUE)
3131 priv->ieee80211->eRFPowerState = eRfOff;
3132
3133 //
3134 //3 //Config CPUReset Register
3135 //3//
3136 //3 Firmware Reset Or Not
3137 ulRegRead = read_nic_dword(dev, CPU_GEN);
3138 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
3139 { //called from MPInitialized. do nothing
3140 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3141 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
3142 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
3143 else
3144 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
3145
3146#ifdef RTL8190P
3147 //2008.06.03, for WOL 90 hw bug
3148 ulRegRead &= (~(CPU_GEN_GPIO_UART));
3149#endif
3150
3151 write_nic_dword(dev, CPU_GEN, ulRegRead);
3152 //mdelay(100);
3153
3154#ifdef RTL8192E
3155
3156 //3//
3157 //3 //Fix the issue of E-cut high temperature issue
3158 //3//
3159 // TODO: E cut only
3160 ICVersion = read_nic_byte(dev, IC_VERRSION);
3161 if(ICVersion >= 0x4) //E-cut only
3162 {
3163 // HW SD suggest that we should not wirte this register too often, so driver
3164 // should readback this register. This register will be modified only when
3165 // power on reset
3166 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
3167 if(SwitchingRegulatorOutput != 0xb8)
3168 {
3169 write_nic_byte(dev, SWREGULATOR, 0xa8);
3170 mdelay(1);
3171 write_nic_byte(dev, SWREGULATOR, 0xb8);
3172 }
3173 }
3174#endif
3175
3176
3177 //3//
3178 //3// Initialize BB before MAC
3179 //3//
ecdfa446
GKH		 3180 RT_TRACE(COMP_INIT, "BB Config Start!\n");
3181 rtStatus = rtl8192_BBConfig(dev);
3182 if(rtStatus != RT_STATUS_SUCCESS)
3183 {
3184 RT_TRACE(COMP_ERR, "BB Config failed\n");
3185 return rtStatus;
3186 }
3187 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
3188
ecdfa446
GKH		 3189 //3//Set Loopback mode or Normal mode
3190 //3//
3191 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
3192 // because setting of System_Reset bit reset MAC to default transmission mode.
3193 //Loopback mode or not
3194 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
3195 //priv->LoopbackMode = RTL819X_MAC_LOOPBACK;
3196 if(priv->ResetProgress == RESET_TYPE_NORESET)
3197 {
3198 ulRegRead = read_nic_dword(dev, CPU_GEN);
3199 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
3200 {
3201 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
3202 }
3203 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
3204 {
3205 ulRegRead |= CPU_CCK_LOOPBACK;
3206 }
3207 else
3208 {
3209 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
3210 }
3211
3212 //2008.06.03, for WOL
3213 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3214 write_nic_dword(dev, CPU_GEN, ulRegRead);
3215
3216 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
3217 udelay(500);
3218 }
3219 //3Set Hardware(Do nothing now)
3220 rtl8192_hwconfig(dev);
3221 //2=======================================================
3222 // Common Setting for all of the FPGA platform. (part 1)
3223 //2=======================================================
3224 // If there is changes, please make sure it applies to all of the FPGA version
3225 //3 Turn on Tx/Rx
3226 write_nic_byte(dev, CMDR, CR_RE|CR_TE);
3227
3228 //2Set Tx dma burst
3229#ifdef RTL8190P
3230 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | \
3231 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) | \
3232 (1<<MULRW_SHIFT)));
3233#else
3234 #ifdef RTL8192E
3235 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |\
3236 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
3237 #endif
3238#endif
3239 //set IDR0 here
3240 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
3241 write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
3242 //set RCR
3243 write_nic_dword(dev, RCR, priv->ReceiveConfig);
3244
3245 //3 Initialize Number of Reserved Pages in Firmware Queue
3246 #ifdef TO_DO_LIST
3247 if(priv->bInHctTest)
3248 {
3249 PlatformEFIOWrite4Byte(Adapter, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
3250 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
3251 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
3252 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3253 PlatformEFIOWrite4Byte(Adapter, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
3254 PlatformEFIOWrite4Byte(Adapter, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
3255 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
3256 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3257 }
3258 else
3259 #endif
3260 {
3261 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
3262 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
3263 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
3264 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3265 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
3266 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
3267 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
3268 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3269 }
3270
3271 rtl8192_tx_enable(dev);
3272 rtl8192_rx_enable(dev);
3273 //3Set Response Rate Setting Register
3274 // CCK rate is supported by default.
3275 // CCK rate will be filtered out only when associated AP does not support it.
3276 ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
3277 write_nic_dword(dev, RRSR, ulRegRead);
3278 write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
3279
3280 //2Set AckTimeout
3281 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3282 write_nic_byte(dev, ACK_TIMEOUT, 0x30);
3283
3284 //rtl8192_actset_wirelessmode(dev,priv->RegWirelessMode);
3285 if(priv->ResetProgress == RESET_TYPE_NORESET)
3286 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
3287 //-----------------------------------------------------------------------------
3288 // Set up security related. 070106, by rcnjko:
3289 // 1. Clear all H/W keys.
3290 // 2. Enable H/W encryption/decryption.
3291 //-----------------------------------------------------------------------------
3292 CamResetAllEntry(dev);
3293 {
3294 u8 SECR_value = 0x0;
3295 SECR_value |= SCR_TxEncEnable;
3296 SECR_value |= SCR_RxDecEnable;
3297 SECR_value |= SCR_NoSKMC;
3298 write_nic_byte(dev, SECR, SECR_value);
3299 }
3300 //3Beacon related
3301 write_nic_word(dev, ATIMWND, 2);
3302 write_nic_word(dev, BCN_INTERVAL, 100);
5e1ad18a 3303 for (i=0; i<QOS_QUEUE_NUM; i++)
ecdfa446 3304 write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 3305 //
3306 // Switching regulator controller: This is set temporarily.
3307 // It's not sure if this can be removed in the future.
3308 // PJ advised to leave it by default.
3309 //
3310 write_nic_byte(dev, 0xbe, 0xc0);
3311
3312 //2=======================================================
3313 // Set PHY related configuration defined in MAC register bank
3314 //2=======================================================
3315 rtl8192_phy_configmac(dev);
3316
3317 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
3318 rtl8192_phy_getTxPower(dev);
3319 rtl8192_phy_setTxPower(dev, priv->chan);
3320 }
3321
3322 //if D or C cut
3323 tmpvalue = read_nic_byte(dev, IC_VERRSION);
3324 priv->IC_Cut = tmpvalue;
3325 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
3326 if(priv->IC_Cut >= IC_VersionCut_D)
3327 {
3328 //pHalData->bDcut = TRUE;
3329 if(priv->IC_Cut == IC_VersionCut_D)
3330 RT_TRACE(COMP_INIT, "D-cut\n");
3331 if(priv->IC_Cut == IC_VersionCut_E)
3332 {
3333 RT_TRACE(COMP_INIT, "E-cut\n");
3334 // HW SD suggest that we should not wirte this register too often, so driver
3335 // should readback this register. This register will be modified only when
3336 // power on reset
3337 }
3338 }
3339 else
3340 {
3341 //pHalData->bDcut = FALSE;
3342 RT_TRACE(COMP_INIT, "Before C-cut\n");
3343 }
3344
3345#if 1
3346 //Firmware download
3347 RT_TRACE(COMP_INIT, "Load Firmware!\n");
3348 bfirmwareok = init_firmware(dev);
3349 if(bfirmwareok != true) {
3350 rtStatus = RT_STATUS_FAILURE;
3351 return rtStatus;
3352 }
3353 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
3354#endif
3355 //RF config
3356 if(priv->ResetProgress == RESET_TYPE_NORESET)
3357 {
3358 RT_TRACE(COMP_INIT, "RF Config Started!\n");
3359 rtStatus = rtl8192_phy_RFConfig(dev);
3360 if(rtStatus != RT_STATUS_SUCCESS)
3361 {
3362 RT_TRACE(COMP_ERR, "RF Config failed\n");
3363 return rtStatus;
3364 }
3365 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
3366 }
3367 rtl8192_phy_updateInitGain(dev);
3368
3369 /*---- Set CCK and OFDM Block "ON"----*/
3370 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
3371 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
3372
3373#ifdef RTL8192E
3374 //Enable Led
3375 write_nic_byte(dev, 0x87, 0x0);
3376#endif
3377#ifdef RTL8190P
3378 //2008.06.03, for WOL
3379 ucRegRead = read_nic_byte(dev, GPE);
3380 ucRegRead |= BIT0;
3381 write_nic_byte(dev, GPE, ucRegRead);
3382
3383 ucRegRead = read_nic_byte(dev, GPO);
3384 ucRegRead &= ~BIT0;
3385 write_nic_byte(dev, GPO, ucRegRead);
3386#endif
3387
3388 //2=======================================================
3389 // RF Power Save
3390 //2=======================================================
3391#ifdef ENABLE_IPS
3392
3393{
3394 if(priv->RegRfOff == TRUE)
3395 { // User disable RF via registry.
3396 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__FUNCTION__);
3397 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
3398#if 0//cosa, ask SD3 willis and he doesn't know what is this for
3399 // Those action will be discard in MgntActSet_RF_State because off the same state
3400 for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
3401 PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
3402#endif
3403 }
3404 else if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
3405 { // H/W or S/W RF OFF before sleep.
3406 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3407 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3408 }
3409 else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
3410 { // H/W or S/W RF OFF before sleep.
3411 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3412 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3413 }
3414 else
3415 {
3416 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
3417 priv->ieee80211->eRFPowerState = eRfOn;
3418 priv->ieee80211->RfOffReason = 0;
3419 //DrvIFIndicateCurrentPhyStatus(Adapter);
3420 // LED control
3421 //Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_ON);
3422
3423 //
3424 // If inactive power mode is enabled, disable rf while in disconnected state.
3425 // But we should still tell upper layer we are in rf on state.
3426 // 2007.07.16, by shien chang.
3427 //
3428 //if(!Adapter->bInHctTest)
3429 //IPSEnter(Adapter);
3430
3431 }
3432}
3433#endif
3434 if(1){
3435#ifdef RTL8192E
3436 // We can force firmware to do RF-R/W
3437 if(priv->ieee80211->FwRWRF)
3438 priv->Rf_Mode = RF_OP_By_FW;
3439 else
3440 priv->Rf_Mode = RF_OP_By_SW_3wire;
3441#else
3442 priv->Rf_Mode = RF_OP_By_SW_3wire;
3443#endif
3444 }
3445#ifdef RTL8190P
3446 if(priv->ResetProgress == RESET_TYPE_NORESET)
3447 {
3448 dm_initialize_txpower_tracking(dev);
3449
3450 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3451 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3452
3453 if(priv->rf_type == RF_2T4R){
3454 for(i = 0; i<TxBBGainTableLength; i++)
3455 {
3456 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3457 {
3458 priv->rfa_txpowertrackingindex= (u8)i;
3459 priv->rfa_txpowertrackingindex_real= (u8)i;
3460 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3461 break;
3462 }
3463 }
3464 }
3465 for(i = 0; i<TxBBGainTableLength; i++)
3466 {
3467 if(tmpRegC == priv->txbbgain_table[i].txbbgain_value)
3468 {
3469 priv->rfc_txpowertrackingindex= (u8)i;
3470 priv->rfc_txpowertrackingindex_real= (u8)i;
3471 priv->rfc_txpowertracking_default = priv->rfc_txpowertrackingindex;
3472 break;
3473 }
3474 }
3475 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3476
3477 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3478 {
3479 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3480 {
3481 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3482 break;
3483 }
3484 }
3485 priv->CCKPresentAttentuation_40Mdefault = 0;
3486 priv->CCKPresentAttentuation_difference = 0;
3487 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3488 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3489 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3490 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_initial = %d\n", priv->rfc_txpowertrackingindex);
3491 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real_initial = %d\n", priv->rfc_txpowertrackingindex_real);
3492 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3493 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3494 }
3495#else
3496 #ifdef RTL8192E
3497 if(priv->ResetProgress == RESET_TYPE_NORESET)
3498 {
3499 dm_initialize_txpower_tracking(dev);
3500
3501 if(priv->IC_Cut >= IC_VersionCut_D)
3502 {
3503 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3504 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3505 for(i = 0; i<TxBBGainTableLength; i++)
3506 {
3507 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3508 {
3509 priv->rfa_txpowertrackingindex= (u8)i;
3510 priv->rfa_txpowertrackingindex_real= (u8)i;
3511 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3512 break;
3513 }
3514 }
3515
3516 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3517
3518 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3519 {
3520 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3521 {
3522 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3523 break;
3524 }
3525 }
3526 priv->CCKPresentAttentuation_40Mdefault = 0;
3527 priv->CCKPresentAttentuation_difference = 0;
3528 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3529 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3530 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3531 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3532 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3533 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
3534 }
3535 }
3536 #endif
3537#endif
3538 rtl8192_irq_enable(dev);
3539 priv->being_init_adapter = false;
3540 return rtStatus;
3541
3542}
3543
3544void rtl8192_prepare_beacon(struct r8192_priv *priv)
3545{
3546 struct sk_buff *skb;
3547 //unsigned long flags;
3548 cb_desc *tcb_desc;
3549
3550 skb = ieee80211_get_beacon(priv->ieee80211);
3551 tcb_desc = (cb_desc *)(skb->cb + 8);
3552 //printk("===========> %s\n", __FUNCTION__);
3553 //spin_lock_irqsave(&priv->tx_lock,flags);
3554 /* prepare misc info for the beacon xmit */
3555 tcb_desc->queue_index = BEACON_QUEUE;
3556 /* IBSS does not support HT yet, use 1M defautly */
3557 tcb_desc->data_rate = 2;
3558 tcb_desc->RATRIndex = 7;
3559 tcb_desc->bTxDisableRateFallBack = 1;
3560 tcb_desc->bTxUseDriverAssingedRate = 1;
3561
3562 skb_push(skb, priv->ieee80211->tx_headroom);
3563 if(skb){
3564 rtl8192_tx(priv->ieee80211->dev,skb);
3565 }
3566 //spin_unlock_irqrestore (&priv->tx_lock, flags);
3567}
3568
ecdfa446
GKH		 3569
3570/* this configures registers for beacon tx and enables it via
3571 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
3572 * be used to stop beacon transmission
3573 */
3574void rtl8192_start_beacon(struct net_device *dev)
3575{
3576 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3577 struct ieee80211_network *net = &priv->ieee80211->current_network;
3578 u16 BcnTimeCfg = 0;
3579 u16 BcnCW = 6;
3580 u16 BcnIFS = 0xf;
3581
3582 DMESG("Enabling beacon TX");
3583 //rtl8192_prepare_beacon(dev);
3584 rtl8192_irq_disable(dev);
3585 //rtl8192_beacon_tx_enable(dev);
3586
3587 /* ATIM window */
3588 write_nic_word(dev, ATIMWND, 2);
3589
3590 /* Beacon interval (in unit of TU) */
3591 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
3592
3593 /*
3594 * DrvErlyInt (in unit of TU).
3595 * (Time to send interrupt to notify driver to c
3596 * hange beacon content)
3597 * */
3598 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
3599
3600 /*
3601 * BcnDMATIM(in unit of us).
3602 * Indicates the time before TBTT to perform beacon queue DMA
3603 * */
3604 write_nic_word(dev, BCN_DMATIME, 256);
3605
3606 /*
3607 * Force beacon frame transmission even after receiving
3608 * beacon frame from other ad hoc STA
3609 * */
3610 write_nic_byte(dev, BCN_ERR_THRESH, 100);
3611
3612 /* Set CW and IFS */
3613 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
3614 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3615 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
3616
3617
3618 /* enable the interrupt for ad-hoc process */
3619 rtl8192_irq_enable(dev);
3620}
3621/***************************************************************************
3622 -------------------------------NET STUFF---------------------------
3623***************************************************************************/
ecdfa446
GKH		 3624
3625
3626
5e1ad18a 3627static bool HalTxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3628{
3629 u16 RegTxCounter = read_nic_word(dev, 0x128);
3630 struct r8192_priv *priv = ieee80211_priv(dev);
3631 bool bStuck = FALSE;
3632 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
3633 if(priv->TxCounter==RegTxCounter)
3634 bStuck = TRUE;
3635
3636 priv->TxCounter = RegTxCounter;
3637
3638 return bStuck;
3639}
3640
3641/*
3642* <Assumption: RT_TX_SPINLOCK is acquired.>
3643* First added: 2006.11.19 by emily
3644*/
5e1ad18a 3645static RESET_TYPE
ecdfa446
GKH		 3646TxCheckStuck(struct net_device *dev)
3647{
3648 struct r8192_priv *priv = ieee80211_priv(dev);
3649 u8 QueueID;
3650 ptx_ring head=NULL,tail=NULL,txring = NULL;
3651 u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3652 bool bCheckFwTxCnt = false;
3653 //unsigned long flags;
3654
3655 //
3656 // Decide Stuch threshold according to current power save mode
3657 //
3658 //printk("++++++++++++>%s()\n",__FUNCTION__);
3659 switch (priv->ieee80211->dot11PowerSaveMode)
3660 {
3661 // The threshold value may required to be adjusted .
3662 case eActive: // Active/Continuous access.
3663 ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
3664 break;
3665 case eMaxPs: // Max power save mode.
3666 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3667 break;
3668 case eFastPs: // Fast power save mode.
3669 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3670 break;
3671 }
3672
3673 //
3674 // Check whether specific tcb has been queued for a specific time
3675 //
3676 for(QueueID = 0; QueueID < MAX_TX_QUEUE; QueueID++)
3677 {
3678
3679
3680 if(QueueID == TXCMD_QUEUE)
3681 continue;
3682
3683 switch(QueueID) {
3684 case MGNT_QUEUE:
3685 tail=priv->txmapringtail;
3686 head=priv->txmapringhead;
3687 break;
3688
3689 case BK_QUEUE:
3690 tail=priv->txbkpringtail;
3691 head=priv->txbkpringhead;
3692 break;
3693
3694 case BE_QUEUE:
3695 tail=priv->txbepringtail;
3696 head=priv->txbepringhead;
3697 break;
3698
3699 case VI_QUEUE:
3700 tail=priv->txvipringtail;
3701 head=priv->txvipringhead;
3702 break;
3703
3704 case VO_QUEUE:
3705 tail=priv->txvopringtail;
3706 head=priv->txvopringhead;
3707 break;
3708
3709 default:
3710 tail=head=NULL;
3711 break;
3712 }
3713
3714 if(tail == head)
3715 continue;
3716 else
3717 {
3718 txring = head;
3719 if(txring == NULL)
3720 {
3721 RT_TRACE(COMP_ERR,"%s():txring is NULL , BUG!\n",__FUNCTION__);
3722 continue;
3723 }
3724 txring->nStuckCount++;
ecdfa446
GKH		 3725 bCheckFwTxCnt = TRUE;
3726 }
3727 }
3728#if 1
3729 if(bCheckFwTxCnt)
3730 {
3731 if(HalTxCheckStuck8190Pci(dev))
3732 {
3733 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
3734 return RESET_TYPE_SILENT;
3735 }
3736 }
3737#endif
3738 return RESET_TYPE_NORESET;
3739}
3740
3741
5e1ad18a 3742static bool HalRxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3743{
3744 struct r8192_priv *priv = ieee80211_priv(dev);
3745 u16 RegRxCounter = read_nic_word(dev, 0x130);
3746 bool bStuck = FALSE;
3747 static u8 rx_chk_cnt = 0;
3748 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
3749 // If rssi is small, we should check rx for long time because of bad rx.
3750 // or maybe it will continuous silent reset every 2 seconds.
3751 rx_chk_cnt++;
3752 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
3753 {
3754 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
3755 }
3756 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
3757 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
3758 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
3759
3760 {
3761 if(rx_chk_cnt < 2)
3762 {
3763 return bStuck;
3764 }
3765 else
3766 {
3767 rx_chk_cnt = 0;
3768 }
3769 }
3770 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
3771 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
3772 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
3773 {
3774 if(rx_chk_cnt < 4)
3775 {
3776 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
3777 return bStuck;
3778 }
3779 else
3780 {
3781 rx_chk_cnt = 0;
3782 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
3783 }
3784 }
3785 else
3786 {
3787 if(rx_chk_cnt < 8)
3788 {
3789 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
3790 return bStuck;
3791 }
3792 else
3793 {
3794 rx_chk_cnt = 0;
3795 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
3796 }
3797 }
ecdfa446
GKH		 3798 if(priv->RxCounter==RegRxCounter)
3799 bStuck = TRUE;
3800
3801 priv->RxCounter = RegRxCounter;
3802
3803 return bStuck;
3804}
3805
5e1ad18a 3806static RESET_TYPE RxCheckStuck(struct net_device *dev)
ecdfa446
GKH		 3807{
3808
3809 if(HalRxCheckStuck8190Pci(dev))
3810 {
3811 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
3812 return RESET_TYPE_SILENT;
3813 }
3814
3815 return RESET_TYPE_NORESET;
3816}
3817
5e1ad18a 3818static RESET_TYPE
ecdfa446
GKH		 3819rtl819x_ifcheck_resetornot(struct net_device *dev)
3820{
3821 struct r8192_priv *priv = ieee80211_priv(dev);
3822 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
3823 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
3824 RT_RF_POWER_STATE rfState;
3825
3826 rfState = priv->ieee80211->eRFPowerState;
3827
3828 TxResetType = TxCheckStuck(dev);
3829#if 1
3830 if( rfState != eRfOff &&
3831 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
3832 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
3833 {
3834 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
3835 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
3836 // if driver is in firmware download failure status, driver should initialize RF in the following
3837 // silent reset procedure Emily, 2008.01.21
3838
3839 // Driver should not check RX stuck in IBSS mode because it is required to
3840 // set Check BSSID in order to send beacon, however, if check BSSID is
3841 // set, STA cannot hear any packet a all. Emily, 2008.04.12
3842 RxResetType = RxCheckStuck(dev);
3843 }
3844#endif
3845
3846 RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
3847 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
3848 return RESET_TYPE_NORMAL;
3849 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
3850 return RESET_TYPE_SILENT;
3851 else
3852 return RESET_TYPE_NORESET;
3853
3854}
3855
3856
5e1ad18a 3857static void CamRestoreAllEntry(struct net_device *dev)
ecdfa446
GKH		 3858{
3859 u8 EntryId = 0;
3860 struct r8192_priv *priv = ieee80211_priv(dev);
3861 u8* MacAddr = priv->ieee80211->current_network.bssid;
3862
3863 static u8 CAM_CONST_ADDR[4][6] = {
3864 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
3865 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
3866 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
3867 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
3868 static u8 CAM_CONST_BROAD[] =
3869 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
3870
3871 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
3872
3873
3874 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
3875 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
3876 {
3877
3878 for(EntryId=0; EntryId<4; EntryId++)
3879 {
3880 {
3881 MacAddr = CAM_CONST_ADDR[EntryId];
3882 setKey(dev,
3883 EntryId ,
3884 EntryId,
3885 priv->ieee80211->pairwise_key_type,
3886 MacAddr,
3887 0,
3888 NULL);
3889 }
3890 }
3891
3892 }
3893 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
3894 {
3895
3896 {
3897 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3898 setKey(dev,
3899 4,
3900 0,
3901 priv->ieee80211->pairwise_key_type,
3902 (u8*)dev->dev_addr,
3903 0,
3904 NULL);
3905 else
3906 setKey(dev,
3907 4,
3908 0,
3909 priv->ieee80211->pairwise_key_type,
3910 MacAddr,
3911 0,
3912 NULL);
3913 }
3914 }
3915 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
3916 {
3917
3918 {
3919 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3920 setKey(dev,
3921 4,
3922 0,
3923 priv->ieee80211->pairwise_key_type,
3924 (u8*)dev->dev_addr,
3925 0,
3926 NULL);
3927 else
3928 setKey(dev,
3929 4,
3930 0,
3931 priv->ieee80211->pairwise_key_type,
3932 MacAddr,
3933 0,
3934 NULL);
3935 }
3936 }
3937
3938
3939
3940 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
3941 {
3942 MacAddr = CAM_CONST_BROAD;
3943 for(EntryId=1 ; EntryId<4 ; EntryId++)
3944 {
3945 {
3946 setKey(dev,
3947 EntryId,
3948 EntryId,
3949 priv->ieee80211->group_key_type,
3950 MacAddr,
3951 0,
3952 NULL);
3953 }
3954 }
3955 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3956 setKey(dev,
3957 0,
3958 0,
3959 priv->ieee80211->group_key_type,
3960 CAM_CONST_ADDR[0],
3961 0,
3962 NULL);
3963 }
3964 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
3965 {
3966 MacAddr = CAM_CONST_BROAD;
3967 for(EntryId=1; EntryId<4 ; EntryId++)
3968 {
3969 {
3970 setKey(dev,
3971 EntryId ,
3972 EntryId,
3973 priv->ieee80211->group_key_type,
3974 MacAddr,
3975 0,
3976 NULL);
3977 }
3978 }
3979
3980 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3981 setKey(dev,
3982 0 ,
3983 0,
3984 priv->ieee80211->group_key_type,
3985 CAM_CONST_ADDR[0],
3986 0,
3987 NULL);
3988 }
3989}
3990
3991void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
3992int _rtl8192_up(struct net_device *dev);
3993
3994/*
3995 * This function is used to fix Tx/Rx stop bug temporarily.
3996 * This function will do "system reset" to NIC when Tx or Rx is stuck.
3997 * The method checking Tx/Rx stuck of this function is supported by FW,
3998 * which reports Tx and Rx counter to register 0x128 and 0x130.
3999 * */
5e1ad18a 4000static void rtl819x_ifsilentreset(struct net_device *dev)
ecdfa446
GKH		 4001{
4002 struct r8192_priv *priv = ieee80211_priv(dev);
4003 u8 reset_times = 0;
4004 int reset_status = 0;
4005 struct ieee80211_device *ieee = priv->ieee80211;
4006
4007
4008 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
4009 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
4010
4011 if(priv->ResetProgress==RESET_TYPE_NORESET)
4012 {
4013RESET_START:
4014
4015 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
4016
4017 // Set the variable for reset.
4018 priv->ResetProgress = RESET_TYPE_SILENT;
4019// rtl8192_close(dev);
4020#if 1
4021 down(&priv->wx_sem);
4022 if(priv->up == 0)
4023 {
4024 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
4025 up(&priv->wx_sem);
4026 return ;
4027 }
4028 priv->up = 0;
4029 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
4030 if(!netif_queue_stopped(dev))
4031 netif_stop_queue(dev);
4032
4033 dm_backup_dynamic_mechanism_state(dev);
4034
4035 rtl8192_irq_disable(dev);
4036 rtl8192_cancel_deferred_work(priv);
4037 deinit_hal_dm(dev);
4038 del_timer_sync(&priv->watch_dog_timer);
4039 ieee->sync_scan_hurryup = 1;
4040 if(ieee->state == IEEE80211_LINKED)
4041 {
4042 down(&ieee->wx_sem);
4043 printk("ieee->state is IEEE80211_LINKED\n");
4044 ieee80211_stop_send_beacons(priv->ieee80211);
4045 del_timer_sync(&ieee->associate_timer);
ecdfa446 4046 cancel_delayed_work(&ieee->associate_retry_wq);
ecdfa446
GKH		 4047 ieee80211_stop_scan(ieee);
4048 netif_carrier_off(dev);
4049 up(&ieee->wx_sem);
4050 }
4051 else{
4052 printk("ieee->state is NOT LINKED\n");
4053 ieee80211_softmac_stop_protocol(priv->ieee80211);
4054 }
4055 rtl8192_rtx_disable(dev);
4056 up(&priv->wx_sem);
4057 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
4058 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
4059 reset_status = _rtl8192_up(dev);
4060
4061 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
4062 if(reset_status == -1)
4063 {
4064 if(reset_times < 3)
4065 {
4066 reset_times++;
4067 goto RESET_START;
4068 }
4069 else
4070 {
4071 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__FUNCTION__);
4072 }
4073 }
4074#endif
4075 ieee->is_silent_reset = 1;
4076#if 1
4077 EnableHWSecurityConfig8192(dev);
4078#if 1
4079 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4080 {
4081 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4082
4083#if 1
ecdfa446 4084 queue_work(ieee->wq, &ieee->associate_complete_wq);
ecdfa446
GKH		 4085#endif
4086
4087 }
4088 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
4089 {
4090 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4091 ieee->link_change(ieee->dev);
4092
4093 // notify_wx_assoc_event(ieee);
4094
4095 ieee80211_start_send_beacons(ieee);
4096
4097 if (ieee->data_hard_resume)
4098 ieee->data_hard_resume(ieee->dev);
4099 netif_carrier_on(ieee->dev);
4100 }
4101#endif
4102
4103 CamRestoreAllEntry(dev);
4104
4105 // Restore the previous setting for all dynamic mechanism
4106 dm_restore_dynamic_mechanism_state(dev);
4107
4108 priv->ResetProgress = RESET_TYPE_NORESET;
4109 priv->reset_count++;
4110
4111 priv->bForcedSilentReset =false;
4112 priv->bResetInProgress = false;
4113
4114 // For test --> force write UFWP.
4115 write_nic_byte(dev, UFWP, 1);
4116 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
4117#endif
4118 }
4119}
4120
4121#ifdef ENABLE_IPS
4122void InactivePsWorkItemCallback(struct net_device *dev)
4123{
4124 struct r8192_priv *priv = ieee80211_priv(dev);
4125 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4126 //u8 index = 0;
4127
4128 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n");
4129 //
4130 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
4131 // is really scheduled.
4132 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
4133 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
4134 // blocks the IPS procedure of switching RF.
4135 // By Bruce, 2007-12-25.
4136 //
4137 pPSC->bSwRfProcessing = TRUE;
4138
4139 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n", \
4140 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
4141
4142
4143 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
4144
4145 //
4146 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
4147 //
ecdfa446
GKH		 4148 pPSC->bSwRfProcessing = FALSE;
4149 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n");
4150}
4151
4152//
4153// Description:
4154// Enter the inactive power save mode. RF will be off
4155// 2007.08.17, by shien chang.
4156//
4157void
4158IPSEnter(struct net_device *dev)
4159{
4160 struct r8192_priv *priv = ieee80211_priv(dev);
4161 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4162 RT_RF_POWER_STATE rtState;
4163
4164 if (pPSC->bInactivePs)
4165 {
4166 rtState = priv->ieee80211->eRFPowerState;
4167 //
4168 // Added by Bruce, 2007-12-25.
4169 // Do not enter IPS in the following conditions:
4170 // (1) RF is already OFF or Sleep
4171 // (2) bSwRfProcessing (indicates the IPS is still under going)
4172 // (3) Connectted (only disconnected can trigger IPS)
4173 // (4) IBSS (send Beacon)
4174 // (5) AP mode (send Beacon)
4175 //
4176 if (rtState == eRfOn && !pPSC->bSwRfProcessing
4177 && (priv->ieee80211->state != IEEE80211_LINKED) )
4178 {
4179 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
4180 pPSC->eInactivePowerState = eRfOff;
4181// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4182 InactivePsWorkItemCallback(dev);
4183 }
4184 }
4185}
4186
4187//
4188// Description:
4189// Leave the inactive power save mode, RF will be on.
4190// 2007.08.17, by shien chang.
4191//
4192void
4193IPSLeave(struct net_device *dev)
4194{
4195 struct r8192_priv *priv = ieee80211_priv(dev);
4196 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4197 RT_RF_POWER_STATE rtState;
4198
4199 if (pPSC->bInactivePs)
4200 {
4201 rtState = priv->ieee80211->eRFPowerState;
4202 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
4203 {
4204 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
4205 pPSC->eInactivePowerState = eRfOn;
4206// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4207 InactivePsWorkItemCallback(dev);
4208 }
4209 }
4210}
4211#endif
ecdfa446 4212
5e1ad18a 4213static void rtl819x_update_rxcounts(
ecdfa446
GKH		 4214 struct r8192_priv *priv,
4215 u32* TotalRxBcnNum,
4216 u32* TotalRxDataNum
4217)
4218{
4219 u16 SlotIndex;
4220 u8 i;
4221
4222 *TotalRxBcnNum = 0;
4223 *TotalRxDataNum = 0;
4224
4225 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
4226 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
4227 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
4228 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
4229 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
4230 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
4231 }
4232}
4233
4234
5e1ad18a 4235void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 4236{
4237 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
4238 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
4239 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4240 struct ieee80211_device* ieee = priv->ieee80211;
4241 RESET_TYPE ResetType = RESET_TYPE_NORESET;
4242 static u8 check_reset_cnt=0;
4243 unsigned long flags;
4244 bool bBusyTraffic = false;
4245 static u8 last_time = 0;
4246 if(!priv->up)
4247 return;
4248 hal_dm_watchdog(dev);
4249#ifdef ENABLE_IPS
4250// printk("watch_dog ENABLE_IPS\n");
4251 if(ieee->actscanning == false){
4252 if((ieee->iw_mode != IW_MODE_ADHOC) && (ieee->state == IEEE80211_NOLINK) && (ieee->beinretry == false) && (ieee->eRFPowerState == eRfOn) && !ieee->is_set_key){
4253 if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
4254 printk("====================>haha:IPSEnter()\n");
4255 IPSEnter(dev);
4256 //ieee80211_stop_scan(priv->ieee80211);
4257 }
4258 }
4259 }
4260#endif
4261 {//to get busy traffic condition
4262 if(ieee->state == IEEE80211_LINKED)
4263 {
4264 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
4265 ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
4266 bBusyTraffic = true;
4267 }
4268
4269 }
4270 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
4271 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
4272 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
4273 }
4274
4275
4276 //added by amy for AP roaming
4277 if (1)
4278 {
4279 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4280 {
4281 u32 TotalRxBcnNum = 0;
4282 u32 TotalRxDataNum = 0;
4283
4284 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
4285 if((TotalRxBcnNum+TotalRxDataNum) == 0)
4286 {
4287 if( ieee->eRFPowerState == eRfOff)
4288 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
4289 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
4290 // Dot11d_Reset(dev);
4291 ieee->state = IEEE80211_ASSOCIATING;
4292 notify_wx_assoc_event(priv->ieee80211);
4293 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
4294 ieee->is_roaming = true;
4295 ieee->is_set_key = false;
4296 ieee->link_change(dev);
ecdfa446 4297 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 4298 }
4299 }
4300 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
4301 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
4302
4303 }
ecdfa446
GKH		 4304 //check if reset the driver
4305 spin_lock_irqsave(&priv->tx_lock,flags);
4306 if(check_reset_cnt++ >= 3 && !ieee->is_roaming && (last_time != 1))
4307 {
4308 ResetType = rtl819x_ifcheck_resetornot(dev);
4309 check_reset_cnt = 3;
4310 //DbgPrint("Start to check silent reset\n");
4311 }
4312 spin_unlock_irqrestore(&priv->tx_lock,flags);
4313 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
4314 {
4315 priv->ResetProgress = RESET_TYPE_NORMAL;
4316 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
4317 return;
4318 }
4319 /* disable silent reset temply 2008.9.11*/
4320#if 1
4321 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
4322 {
4323 last_time = 1;
4324 rtl819x_ifsilentreset(dev);
4325 }
4326 else
4327 last_time = 0;
4328#endif
4329 priv->force_reset = false;
4330 priv->bForcedSilentReset = false;
4331 priv->bResetInProgress = false;
4332 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
4333
4334}
4335
4336void watch_dog_timer_callback(unsigned long data)
4337{
4338 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
ecdfa446 4339 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 4340 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
4341
4342}
4343int _rtl8192_up(struct net_device *dev)
4344{
4345 struct r8192_priv *priv = ieee80211_priv(dev);
4346 //int i;
4347 RT_STATUS init_status = RT_STATUS_SUCCESS;
4348 priv->up=1;
4349 priv->ieee80211->ieee_up=1;
4350 RT_TRACE(COMP_INIT, "Bringing up iface");
4351
4352 init_status = rtl8192_adapter_start(dev);
4353 if(init_status != RT_STATUS_SUCCESS)
4354 {
4355 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
4356 return -1;
4357 }
4358 RT_TRACE(COMP_INIT, "start adapter finished\n");
4359#ifdef RTL8192E
4360 if(priv->ieee80211->eRFPowerState!=eRfOn)
4361 MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
4362#endif
4363 if(priv->ieee80211->state != IEEE80211_LINKED)
4364 ieee80211_softmac_start_protocol(priv->ieee80211);
4365 ieee80211_reset_queue(priv->ieee80211);
4366 watch_dog_timer_callback((unsigned long) dev);
4367 if(!netif_queue_stopped(dev))
4368 netif_start_queue(dev);
4369 else
4370 netif_wake_queue(dev);
4371
4372 return 0;
4373}
4374
4375
5e1ad18a 4376static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 4377{
4378 struct r8192_priv *priv = ieee80211_priv(dev);
4379 int ret;
4380
4381 down(&priv->wx_sem);
4382 ret = rtl8192_up(dev);
4383 up(&priv->wx_sem);
4384 return ret;
4385
4386}
4387
4388
4389int rtl8192_up(struct net_device *dev)
4390{
4391 struct r8192_priv *priv = ieee80211_priv(dev);
4392
4393 if (priv->up == 1) return -1;
4394
4395 return _rtl8192_up(dev);
4396}
4397
4398
5e1ad18a 4399static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 4400{
4401 struct r8192_priv *priv = ieee80211_priv(dev);
4402 int ret;
4403
4404 down(&priv->wx_sem);
4405
4406 ret = rtl8192_down(dev);
4407
4408 up(&priv->wx_sem);
4409
4410 return ret;
4411
4412}
4413
4414int rtl8192_down(struct net_device *dev)
4415{
4416 struct r8192_priv *priv = ieee80211_priv(dev);
4417// int i;
4418#if 0
4419 u8 ucRegRead;
4420 u32 ulRegRead;
4421#endif
4422 if (priv->up == 0) return -1;
4423
4424 priv->up=0;
4425 priv->ieee80211->ieee_up = 0;
4426 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
4427/* FIXME */
4428 if (!netif_queue_stopped(dev))
4429 netif_stop_queue(dev);
4430
4431 rtl8192_irq_disable(dev);
4432#if 0
4433 if(!priv->ieee80211->bSupportRemoteWakeUp) {
4434 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
4435 // 2006.11.30. System reset bit
4436 ulRegRead = read_nic_dword(dev, CPU_GEN);
4437 ulRegRead|=CPU_GEN_SYSTEM_RESET;
4438 write_nic_dword(dev, CPU_GEN, ulRegRead);
4439 } else {
4440 //2008.06.03 for WOL
4441 write_nic_dword(dev, WFCRC0, 0xffffffff);
4442 write_nic_dword(dev, WFCRC1, 0xffffffff);
4443 write_nic_dword(dev, WFCRC2, 0xffffffff);
4444#ifdef RTL8190P
4445 //GPIO 0 = TRUE
4446 ucRegRead = read_nic_byte(dev, GPO);
4447 ucRegRead |= BIT0;
4448 write_nic_byte(dev, GPO, ucRegRead);
4449#endif
4450 //Write PMR register
4451 write_nic_byte(dev, PMR, 0x5);
4452 //Disable tx, enanble rx
4453 write_nic_byte(dev, MacBlkCtrl, 0xa);
4454 }
4455#endif
4456// flush_scheduled_work();
4457 rtl8192_cancel_deferred_work(priv);
4458 deinit_hal_dm(dev);
4459 del_timer_sync(&priv->watch_dog_timer);
4460
4461 ieee80211_softmac_stop_protocol(priv->ieee80211);
4462#ifdef ENABLE_IPS
4463 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
4464#endif
4465 rtl8192_rtx_disable(dev);
4466 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
4467
4468 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
4469
4470 return 0;
4471}
4472
4473
4474void rtl8192_commit(struct net_device *dev)
4475{
4476 struct r8192_priv *priv = ieee80211_priv(dev);
4477
4478 if (priv->up == 0) return ;
4479
4480
4481 ieee80211_softmac_stop_protocol(priv->ieee80211);
4482
4483 rtl8192_irq_disable(dev);
4484 rtl8192_rtx_disable(dev);
4485 _rtl8192_up(dev);
4486}
4487
ecdfa446
GKH		 4488void rtl8192_restart(struct work_struct *work)
4489{
4490 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
4491 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4492
4493 down(&priv->wx_sem);
4494
4495 rtl8192_commit(dev);
4496
4497 up(&priv->wx_sem);
4498}
4499
4500static void r8192_set_multicast(struct net_device *dev)
4501{
4502 struct r8192_priv *priv = ieee80211_priv(dev);
4503 short promisc;
4504
4505 //down(&priv->wx_sem);
4506
4507 /* FIXME FIXME */
4508
4509 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4510
4511 if (promisc != priv->promisc) {
4512 ;
4513 // rtl8192_commit(dev);
4514 }
4515
4516 priv->promisc = promisc;
4517
4518 //schedule_work(&priv->reset_wq);
4519 //up(&priv->wx_sem);
4520}
4521
4522
5e1ad18a 4523static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 4524{
4525 struct r8192_priv *priv = ieee80211_priv(dev);
4526 struct sockaddr *addr = mac;
4527
4528 down(&priv->wx_sem);
4529
4530 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
4531
ecdfa446 4532 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 4533 up(&priv->wx_sem);
4534
4535 return 0;
4536}
4537
4538/* based on ipw2200 driver */
5e1ad18a 4539static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 4540{
4541 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4542 struct iwreq *wrq = (struct iwreq *)rq;
4543 int ret=-1;
4544 struct ieee80211_device *ieee = priv->ieee80211;
4545 u32 key[4];
4546 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
4547 struct iw_point *p = &wrq->u.data;
4548 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
4549
4550 down(&priv->wx_sem);
4551
4552
4553 if (p->length < sizeof(struct ieee_param) || !p->pointer){
4554 ret = -EINVAL;
4555 goto out;
4556 }
4557
4558 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
4559 if (ipw == NULL){
4560 ret = -ENOMEM;
4561 goto out;
4562 }
4563 if (copy_from_user(ipw, p->pointer, p->length)) {
4564 kfree(ipw);
4565 ret = -EFAULT;
4566 goto out;
4567 }
4568
4569 switch (cmd) {
4570 case RTL_IOCTL_WPA_SUPPLICANT:
4571 //parse here for HW security
4572 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
4573 {
4574 if (ipw->u.crypt.set_tx)
4575 {
4576 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4577 ieee->pairwise_key_type = KEY_TYPE_CCMP;
4578 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4579 ieee->pairwise_key_type = KEY_TYPE_TKIP;
4580 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4581 {
4582 if (ipw->u.crypt.key_len == 13)
4583 ieee->pairwise_key_type = KEY_TYPE_WEP104;
4584 else if (ipw->u.crypt.key_len == 5)
4585 ieee->pairwise_key_type = KEY_TYPE_WEP40;
4586 }
4587 else
4588 ieee->pairwise_key_type = KEY_TYPE_NA;
4589
4590 if (ieee->pairwise_key_type)
4591 {
4592 memcpy((u8*)key, ipw->u.crypt.key, 16);
4593 EnableHWSecurityConfig8192(dev);
4594 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
4595 //added by WB.
4596 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4597 if (ieee->auth_mode != 2) //LEAP WEP will never set this.
4598 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4599 }
4600 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
4601 write_nic_byte(dev, 0x173, 1); //fix aes bug
4602 }
4603
4604 }
4605 else //if (ipw->u.crypt.idx) //group key use idx > 0
4606 {
4607 memcpy((u8*)key, ipw->u.crypt.key, 16);
4608 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4609 ieee->group_key_type= KEY_TYPE_CCMP;
4610 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4611 ieee->group_key_type = KEY_TYPE_TKIP;
4612 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4613 {
4614 if (ipw->u.crypt.key_len == 13)
4615 ieee->group_key_type = KEY_TYPE_WEP104;
4616 else if (ipw->u.crypt.key_len == 5)
4617 ieee->group_key_type = KEY_TYPE_WEP40;
4618 }
4619 else
4620 ieee->group_key_type = KEY_TYPE_NA;
4621
4622 if (ieee->group_key_type)
4623 {
4624 setKey( dev,
4625 ipw->u.crypt.idx,
4626 ipw->u.crypt.idx, //KeyIndex
4627 ieee->group_key_type, //KeyType
4628 broadcast_addr, //MacAddr
4629 0, //DefaultKey
4630 key); //KeyContent
4631 }
4632 }
4633 }
4634#ifdef JOHN_DEBUG
4635 //john's test 0711
4636 {
4637 int i;
4638 printk("@@ wrq->u pointer = ");
4639 for(i=0;i<wrq->u.data.length;i++){
4640 if(i%10==0) printk("\n");
4641 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
4642 }
4643 printk("\n");
4644 }
4645#endif /*JOHN_DEBUG*/
4646 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
4647 break;
4648
4649 default:
4650 ret = -EOPNOTSUPP;
4651 break;
4652 }
4653
4654 kfree(ipw);
4655out:
4656 up(&priv->wx_sem);
4657
4658 return ret;
4659}
4660
5e1ad18a 4661static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 4662{
4663 u8 ret_rate = 0x02;
4664
4665 if(!bIsHT) {
4666 switch(rate) {
4667 case DESC90_RATE1M: ret_rate = MGN_1M; break;
4668 case DESC90_RATE2M: ret_rate = MGN_2M; break;
4669 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
4670 case DESC90_RATE11M: ret_rate = MGN_11M; break;
4671 case DESC90_RATE6M: ret_rate = MGN_6M; break;
4672 case DESC90_RATE9M: ret_rate = MGN_9M; break;
4673 case DESC90_RATE12M: ret_rate = MGN_12M; break;
4674 case DESC90_RATE18M: ret_rate = MGN_18M; break;
4675 case DESC90_RATE24M: ret_rate = MGN_24M; break;
4676 case DESC90_RATE36M: ret_rate = MGN_36M; break;
4677 case DESC90_RATE48M: ret_rate = MGN_48M; break;
4678 case DESC90_RATE54M: ret_rate = MGN_54M; break;
4679
4680 default:
4681 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
4682 break;
4683 }
4684
4685 } else {
4686 switch(rate) {
4687 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
4688 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
4689 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
4690 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
4691 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
4692 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
4693 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
4694 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
4695 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
4696 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
4697 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
4698 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
4699 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
4700 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
4701 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
4702 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
4703 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
4704
4705 default:
4706 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
4707 break;
4708 }
4709 }
4710
4711 return ret_rate;
4712}
4713
4714/**
4715 * Function: UpdateRxPktTimeStamp
4716 * Overview: Recored down the TSF time stamp when receiving a packet
4717 *
4718 * Input:
4719 * PADAPTER Adapter
4720 * PRT_RFD pRfd,
4721 *
4722 * Output:
4723 * PRT_RFD pRfd
4724 * (pRfd->Status.TimeStampHigh is updated)
4725 * (pRfd->Status.TimeStampLow is updated)
4726 * Return:
4727 * None
4728 */
5e1ad18a 4729static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
ecdfa446
GKH		 4730{
4731 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4732
4733 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
4734 stats->mac_time[0] = priv->LastRxDescTSFLow;
4735 stats->mac_time[1] = priv->LastRxDescTSFHigh;
4736 } else {
4737 priv->LastRxDescTSFLow = stats->mac_time[0];
4738 priv->LastRxDescTSFHigh = stats->mac_time[1];
4739 }
4740}
4741
5e1ad18a 4742static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 4743{
4744 long signal_power; // in dBm.
4745
4746 // Translate to dBm (x=0.5y-95).
4747 signal_power = (long)((signal_strength_index + 1) >> 1);
4748 signal_power -= 95;
4749
4750 return signal_power;
4751}
4752
4753//
4754// Description:
4755// Update Rx signal related information in the packet reeived
4756// to RxStats. User application can query RxStats to realize
4757// current Rx signal status.
4758//
4759// Assumption:
4760// In normal operation, user only care about the information of the BSS
4761// and we shall invoke this function if the packet received is from the BSS.
4762//
5e1ad18a 4763static void
ecdfa446
GKH		 4764rtl819x_update_rxsignalstatistics8190pci(
4765 struct r8192_priv * priv,
4766 struct ieee80211_rx_stats * pprevious_stats
4767 )
4768{
4769 int weighting = 0;
4770
4771 //2 <ToDo> Update Rx Statistics (such as signal strength and signal quality).
4772
4773 // Initila state
4774 if(priv->stats.recv_signal_power == 0)
4775 priv->stats.recv_signal_power = pprevious_stats->RecvSignalPower;
4776
4777 // To avoid the past result restricting the statistics sensitivity, weight the current power (5/6) to speed up the
4778 // reaction of smoothed Signal Power.
4779 if(pprevious_stats->RecvSignalPower > priv->stats.recv_signal_power)
4780 weighting = 5;
4781 else if(pprevious_stats->RecvSignalPower < priv->stats.recv_signal_power)
4782 weighting = (-5);
4783 //
4784 // We need more correct power of received packets and the "SignalStrength" of RxStats have been beautified or translated,
4785 // so we record the correct power in Dbm here. By Bruce, 2008-03-07.
4786 //
4787 priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pprevious_stats->RecvSignalPower + weighting) / 6;
4788}
4789
5e1ad18a 4790static void
ecdfa446
GKH		 4791rtl8190_process_cck_rxpathsel(
4792 struct r8192_priv * priv,
4793 struct ieee80211_rx_stats * pprevious_stats
4794 )
4795{
4796#ifdef RTL8190P //Only 90P 2T4R need to check
4797 char last_cck_adc_pwdb[4]={0,0,0,0};
4798 u8 i;
4799//cosa add for Rx path selection
4800 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
4801 {
4802 if(pprevious_stats->bIsCCK &&
4803 (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
4804 {
4805 /* record the cck adc_pwdb to the sliding window. */
4806 if(priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
4807 {
4808 priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
4809 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4810 {
4811 last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
4812 priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
4813 }
4814 }
4815 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4816 {
4817 priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
4818 priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
4819 }
4820 priv->stats.cck_adc_pwdb.index++;
4821 if(priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
4822 priv->stats.cck_adc_pwdb.index = 0;
4823
4824 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4825 {
4826 DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
4827 }
4828
4829 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4830 {
4831 if(pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
4832 {
4833 priv->undecorated_smoothed_cck_adc_pwdb[i] =
4834 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
4835 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
4836 priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
4837 }
4838 else
4839 {
4840 priv->undecorated_smoothed_cck_adc_pwdb[i] =
4841 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
4842 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
4843 }
4844 }
4845 }
4846 }
4847#endif
4848}
4849
4850
4851/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
4852 be a local static. Otherwise, it may increase when we return from S3/S4. The
4853 value will be kept in memory or disk. We must delcare the value in adapter
4854 and it will be reinitialized when return from S3/S4. */
5e1ad18a 4855static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 4856{
4857 bool bcheck = false;
4858 u8 rfpath;
4859 u32 nspatial_stream, tmp_val;
4860 //u8 i;
4861 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
4862 static u32 slide_evm_index=0, slide_evm_statistics=0;
4863 static u32 last_rssi=0, last_evm=0;
4864 //cosa add for rx path selection
4865// static long slide_cck_adc_pwdb_index=0, slide_cck_adc_pwdb_statistics=0;
4866// static char last_cck_adc_pwdb[4]={0,0,0,0};
4867 //cosa add for beacon rssi smoothing
4868 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
4869 static u32 last_beacon_adc_pwdb=0;
4870
4871 struct ieee80211_hdr_3addr *hdr;
4872 u16 sc ;
4873 unsigned int frag,seq;
4874 hdr = (struct ieee80211_hdr_3addr *)buffer;
4875 sc = le16_to_cpu(hdr->seq_ctl);
4876 frag = WLAN_GET_SEQ_FRAG(sc);
4877 seq = WLAN_GET_SEQ_SEQ(sc);
4878 //cosa add 04292008 to record the sequence number
4879 pcurrent_stats->Seq_Num = seq;
4880 //
4881 // Check whether we should take the previous packet into accounting
4882 //
4883 if(!pprevious_stats->bIsAMPDU)
4884 {
4885 // if previous packet is not aggregated packet
4886 bcheck = true;
4887 }else
4888 {
4889//remve for that we don't use AMPDU to calculate PWDB,because the reported PWDB of some AP is fault.
4890#if 0
4891 // if previous packet is aggregated packet, and current packet
4892 // (1) is not AMPDU
4893 // (2) is the first packet of one AMPDU
4894 // that means the previous packet is the last one aggregated packet
4895 if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
4896 bcheck = true;
4897#endif
4898 }
4899
4900 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
4901 {
4902 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
4903 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
4904 priv->stats.slide_rssi_total -= last_rssi;
4905 }
4906 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
4907
4908 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
4909 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
4910 slide_rssi_index = 0;
4911
4912 // <1> Showed on UI for user, in dbm
4913 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
4914 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
4915 pcurrent_stats->rssi = priv->stats.signal_strength;
4916 //
4917 // If the previous packet does not match the criteria, neglect it
4918 //
4919 if(!pprevious_stats->bPacketMatchBSSID)
4920 {
4921 if(!pprevious_stats->bToSelfBA)
4922 return;
4923 }
4924
4925 if(!bcheck)
4926 return;
4927
4928 rtl8190_process_cck_rxpathsel(priv,pprevious_stats);
4929
4930 //
4931 // Check RSSI
4932 //
4933 priv->stats.num_process_phyinfo++;
4934#if 0
4935 /* record the general signal strength to the sliding window. */
4936 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
4937 {
4938 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
4939 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
4940 priv->stats.slide_rssi_total -= last_rssi;
4941 }
4942 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
4943
4944 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
4945 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
4946 slide_rssi_index = 0;
4947
4948 // <1> Showed on UI for user, in dbm
4949 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
4950 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
4951
4952#endif
4953 // <2> Showed on UI for engineering
4954 // hardware does not provide rssi information for each rf path in CCK
4955 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
4956 {
4957 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
4958 {
4959 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
4960 continue;
4961 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
4962 //Fixed by Jacken 2008-03-20
4963 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
4964 {
4965 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
4966 //DbgPrint("MIMO RSSI initialize \n");
4967 }
4968 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
4969 {
4970 priv->stats.rx_rssi_percentage[rfpath] =
4971 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
4972 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
4973 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
4974 }
4975 else
4976 {
4977 priv->stats.rx_rssi_percentage[rfpath] =
4978 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
4979 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
4980 }
4981 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
4982 }
4983 }
4984
4985
4986 //
4987 // Check PWDB.
4988 //
4989 //cosa add for beacon rssi smoothing by average.
4990 if(pprevious_stats->bPacketBeacon)
4991 {
4992 /* record the beacon pwdb to the sliding window. */
4993 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
4994 {
4995 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
4996 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
4997 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
4998 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
4999 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
5000 }
5001 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
5002 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
5003 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
5004 slide_beacon_adc_pwdb_index++;
5005 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
5006 slide_beacon_adc_pwdb_index = 0;
5007 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
5008 if(pprevious_stats->RxPWDBAll >= 3)
5009 pprevious_stats->RxPWDBAll -= 3;
5010 }
5011
5012 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
5013 pprevious_stats->bIsCCK? "CCK": "OFDM",
5014 pprevious_stats->RxPWDBAll);
5015
5016 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5017 {
5018 if(priv->undecorated_smoothed_pwdb < 0) // initialize
5019 {
5020 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
5021 //DbgPrint("First pwdb initialize \n");
5022 }
5023#if 1
5024 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
5025 {
5026 priv->undecorated_smoothed_pwdb =
5027 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5028 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5029 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
5030 }
5031 else
5032 {
5033 priv->undecorated_smoothed_pwdb =
5034 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5035 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5036 }
5037#else
5038 //Fixed by Jacken 2008-03-20
5039 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
5040 {
5041 pHalData->UndecoratedSmoothedPWDB =
5042 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5043 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
5044 }
5045 else
5046 {
5047 pHalData->UndecoratedSmoothedPWDB =
5048 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5049 }
5050#endif
5051 rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
5052 }
5053
5054 //
5055 // Check EVM
5056 //
5057 /* record the general EVM to the sliding window. */
5058 if(pprevious_stats->SignalQuality == 0)
5059 {
5060 }
5061 else
5062 {
5063 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
5064 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
5065 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
5066 last_evm = priv->stats.slide_evm[slide_evm_index];
5067 priv->stats.slide_evm_total -= last_evm;
5068 }
5069
5070 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
5071
5072 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
5073 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
5074 slide_evm_index = 0;
5075
5076 // <1> Showed on UI for user, in percentage.
5077 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
5078 priv->stats.signal_quality = tmp_val;
5079 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
5080 priv->stats.last_signal_strength_inpercent = tmp_val;
5081 }
5082
5083 // <2> Showed on UI for engineering
5084 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5085 {
5086 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
5087 {
5088 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
5089 {
5090 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
5091 {
5092 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
5093 }
5094 priv->stats.rx_evm_percentage[nspatial_stream] =
5095 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
5096 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
5097 }
5098 }
5099 }
5100 }
5101
5102}
5103
5104/*-----------------------------------------------------------------------------
5105 * Function: rtl819x_query_rxpwrpercentage()
5106 *
5107 * Overview:
5108 *
5109 * Input: char antpower
5110 *
5111 * Output: NONE
5112 *
5113 * Return: 0-100 percentage
5114 *
5115 * Revised History:
5116 * When Who Remark
5117 * 05/26/2008 amy Create Version 0 porting from windows code.
5118 *
5119 *---------------------------------------------------------------------------*/
5120static u8 rtl819x_query_rxpwrpercentage(
5121 char antpower
5122 )
5123{
5124 if ((antpower <= -100) || (antpower >= 20))
5125 {
5126 return 0;
5127 }
5128 else if (antpower >= 0)
5129 {
5130 return 100;
5131 }
5132 else
5133 {
5134 return (100+antpower);
5135 }
5136
5137} /* QueryRxPwrPercentage */
5138
5139static u8
5140rtl819x_evm_dbtopercentage(
5141 char value
5142 )
5143{
5144 char ret_val;
5145
5146 ret_val = value;
5147
5148 if(ret_val >= 0)
5149 ret_val = 0;
5150 if(ret_val <= -33)
5151 ret_val = -33;
5152 ret_val = 0 - ret_val;
5153 ret_val*=3;
5154 if(ret_val == 99)
5155 ret_val = 100;
5156 return(ret_val);
5157}
5158
5159//
5160// Description:
5161// We want good-looking for signal strength/quality
5162// 2007/7/19 01:09, by cosa.
5163//
5e1ad18a 5164static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 5165{
5166 long retsig;
5167
5168 // Step 1. Scale mapping.
5169 if(currsig >= 61 && currsig <= 100)
5170 {
5171 retsig = 90 + ((currsig - 60) / 4);
5172 }
5173 else if(currsig >= 41 && currsig <= 60)
5174 {
5175 retsig = 78 + ((currsig - 40) / 2);
5176 }
5177 else if(currsig >= 31 && currsig <= 40)
5178 {
5179 retsig = 66 + (currsig - 30);
5180 }
5181 else if(currsig >= 21 && currsig <= 30)
5182 {
5183 retsig = 54 + (currsig - 20);
5184 }
5185 else if(currsig >= 5 && currsig <= 20)
5186 {
5187 retsig = 42 + (((currsig - 5) * 2) / 3);
5188 }
5189 else if(currsig == 4)
5190 {
5191 retsig = 36;
5192 }
5193 else if(currsig == 3)
5194 {
5195 retsig = 27;
5196 }
5197 else if(currsig == 2)
5198 {
5199 retsig = 18;
5200 }
5201 else if(currsig == 1)
5202 {
5203 retsig = 9;
5204 }
5205 else
5206 {
5207 retsig = currsig;
5208 }
5209
5210 return retsig;
5211}
5212
5213static void rtl8192_query_rxphystatus(
5214 struct r8192_priv * priv,
5215 struct ieee80211_rx_stats * pstats,
5216 prx_desc_819x_pci pdesc,
5217 prx_fwinfo_819x_pci pdrvinfo,
5218 struct ieee80211_rx_stats * precord_stats,
5219 bool bpacket_match_bssid,
5220 bool bpacket_toself,
5221 bool bPacketBeacon,
5222 bool bToSelfBA
5223 )
5224{
5225 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
5226 phy_sts_ofdm_819xpci_t* pofdm_buf;
5227 phy_sts_cck_819xpci_t * pcck_buf;
5228 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
5229 u8 *prxpkt;
5230 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
5231 char rx_pwr[4], rx_pwr_all=0;
5232 //long rx_avg_pwr = 0;
5233 char rx_snrX, rx_evmX;
5234 u8 evm, pwdb_all;
5235 u32 RSSI, total_rssi=0;//, total_evm=0;
5236// long signal_strength_index = 0;
5237 u8 is_cck_rate=0;
5238 u8 rf_rx_num = 0;
5239
5240 /* 2007/07/04 MH For OFDM RSSI. For high power or not. */
5241 static u8 check_reg824 = 0;
5242 static u32 reg824_bit9 = 0;
5243
5244 priv->stats.numqry_phystatus++;
5245
5246 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
5247
5248 // Record it for next packet processing
5249 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
5250 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
5251 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
5252 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
5253 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
5254 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
5255 /*2007.08.30 requested by SD3 Jerry */
5256 if(check_reg824 == 0)
5257 {
5258 reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
5259 check_reg824 = 1;
5260 }
5261
5262
5263 prxpkt = (u8*)pdrvinfo;
5264
5265 /* Move pointer to the 16th bytes. Phy status start address. */
5266 prxpkt += sizeof(rx_fwinfo_819x_pci);
5267
5268 /* Initial the cck and ofdm buffer pointer */
5269 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
5270 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
5271
5272 pstats->RxMIMOSignalQuality[0] = -1;
5273 pstats->RxMIMOSignalQuality[1] = -1;
5274 precord_stats->RxMIMOSignalQuality[0] = -1;
5275 precord_stats->RxMIMOSignalQuality[1] = -1;
5276
5277 if(is_cck_rate)
5278 {
5279 //
5280 // (1)Hardware does not provide RSSI for CCK
5281 //
5282
5283 //
5284 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5285 //
5286 u8 report;//, cck_agc_rpt;
5287#ifdef RTL8190P
5288 u8 tmp_pwdb;
5289 char cck_adc_pwdb[4];
5290#endif
5291 priv->stats.numqry_phystatusCCK++;
5292
5293#ifdef RTL8190P //Only 90P 2T4R need to check
5294 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid)
5295 {
5296 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5297 {
5298 tmp_pwdb = pcck_buf->adc_pwdb_X[i];
5299 cck_adc_pwdb[i] = (char)tmp_pwdb;
5300 cck_adc_pwdb[i] /= 2;
5301 pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i];
5302 //DbgPrint("RF-%d tmp_pwdb = 0x%x, cck_adc_pwdb = %d", i, tmp_pwdb, cck_adc_pwdb[i]);
5303 }
5304 }
5305#endif
5306
5307 if(!reg824_bit9)
5308 {
5309 report = pcck_buf->cck_agc_rpt & 0xc0;
5310 report = report>>6;
5311 switch(report)
5312 {
5313 //Fixed by Jacken from Bryant 2008-03-20
5314 //Original value is -38 , -26 , -14 , -2
5315 //Fixed value is -35 , -23 , -11 , 6
5316 case 0x3:
5317 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
5318 break;
5319 case 0x2:
5320 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
5321 break;
5322 case 0x1:
5323 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
5324 break;
5325 case 0x0:
5326 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
5327 break;
5328 }
5329 }
5330 else
5331 {
5332 report = pcck_buf->cck_agc_rpt & 0x60;
5333 report = report>>5;
5334 switch(report)
5335 {
5336 case 0x3:
5337 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5338 break;
5339 case 0x2:
5340 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
5341 break;
5342 case 0x1:
5343 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5344 break;
5345 case 0x0:
5346 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5347 break;
5348 }
5349 }
5350
5351 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5352 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5353 pstats->RecvSignalPower = rx_pwr_all;
5354
5355 //
5356 // (3) Get Signal Quality (EVM)
5357 //
5358 if(bpacket_match_bssid)
5359 {
5360 u8 sq;
5361
5362 if(pstats->RxPWDBAll > 40)
5363 {
5364 sq = 100;
5365 }else
5366 {
5367 sq = pcck_buf->sq_rpt;
5368
5369 if(pcck_buf->sq_rpt > 64)
5370 sq = 0;
5371 else if (pcck_buf->sq_rpt < 20)
5372 sq = 100;
5373 else
5374 sq = ((64-sq) * 100) / 44;
5375 }
5376 pstats->SignalQuality = precord_stats->SignalQuality = sq;
5377 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
5378 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
5379 }
5380 }
5381 else
5382 {
5383 priv->stats.numqry_phystatusHT++;
5384 //
5385 // (1)Get RSSI for HT rate
5386 //
5387 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5388 {
5389 // 2008/01/30 MH we will judge RF RX path now.
5390 if (priv->brfpath_rxenable[i])
5391 rf_rx_num++;
5392 //else
5393 //continue;
5394
5395 //Fixed by Jacken from Bryant 2008-03-20
5396 //Original value is 106
5397#ifdef RTL8190P //Modify by Jacken 2008/03/31
5398 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
5399#else
5400 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
5401#endif
5402
5403 //Get Rx snr value in DB
5404 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
5405 rx_snrX = (char)(tmp_rxsnr);
5406 rx_snrX /= 2;
5407 priv->stats.rxSNRdB[i] = (long)rx_snrX;
5408
5409 /* Translate DBM to percentage. */
5410 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
5411 if (priv->brfpath_rxenable[i])
5412 total_rssi += RSSI;
5413
5414 /* Record Signal Strength for next packet */
5415 if(bpacket_match_bssid)
5416 {
5417 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
5418 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
5419 }
5420 }
5421
5422
5423 //
5424 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5425 //
5426 //Fixed by Jacken from Bryant 2008-03-20
5427 //Original value is 106
5428 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
5429 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5430
5431 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5432 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
5433 pstats->RecvSignalPower = rx_pwr_all;
5434 //
5435 // (3)EVM of HT rate
5436 //
5437 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
5438 pdrvinfo->RxRate<=DESC90_RATEMCS15)
5439 max_spatial_stream = 2; //both spatial stream make sense
5440 else
5441 max_spatial_stream = 1; //only spatial stream 1 makes sense
5442
5443 for(i=0; i<max_spatial_stream; i++)
5444 {
5445 tmp_rxevm = pofdm_buf->rxevm_X[i];
5446 rx_evmX = (char)(tmp_rxevm);
5447
5448 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
5449 // fill most significant bit to "zero" when doing shifting operation which may change a negative
5450 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
5451 rx_evmX /= 2; //dbm
5452
5453 evm = rtl819x_evm_dbtopercentage(rx_evmX);
5454#if 0
5455 EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100
5456#endif
5457 if(bpacket_match_bssid)
5458 {
5459 if(i==0) // Fill value in RFD, Get the first spatial stream only
5460 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
5461 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
5462 }
5463 }
5464
5465
5466 /* record rx statistics for debug */
5467 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
5468 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
5469 if(pdrvinfo->BW) //40M channel
5470 priv->stats.received_bwtype[1+prxsc->rxsc]++;
5471 else //20M channel
5472 priv->stats.received_bwtype[0]++;
5473 }
5474
5475 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
5476 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
5477 if(is_cck_rate)
5478 {
5479 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
5480
5481 }
5482 else
5483 {
5484 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
5485 // We can judge RX path number now.
5486 if (rf_rx_num != 0)
5487 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
5488 }
5489} /* QueryRxPhyStatus8190Pci */
5490
5e1ad18a 5491static void
ecdfa446
GKH		 5492rtl8192_record_rxdesc_forlateruse(
5493 struct ieee80211_rx_stats * psrc_stats,
5494 struct ieee80211_rx_stats * ptarget_stats
5495)
5496{
5497 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
5498 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
5499 //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
5500}
5501
5502
5503
5e1ad18a 5504static void TranslateRxSignalStuff819xpci(struct net_device *dev,
ecdfa446
GKH		 5505 struct sk_buff *skb,
5506 struct ieee80211_rx_stats * pstats,
5507 prx_desc_819x_pci pdesc,
5508 prx_fwinfo_819x_pci pdrvinfo)
5509{
5510 // TODO: We must only check packet for current MAC address. Not finish
5511 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5512 bool bpacket_match_bssid, bpacket_toself;
5513 bool bPacketBeacon=false, bToSelfBA=false;
5514 static struct ieee80211_rx_stats previous_stats;
5515 struct ieee80211_hdr_3addr *hdr;
5516 u16 fc,type;
5517
5518 // Get Signal Quality for only RX data queue (but not command queue)
5519
5520 u8* tmp_buf;
5521 u8 *praddr;
5522
5523 /* Get MAC frame start address. */
5524 tmp_buf = skb->data;
5525
5526 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
5527 fc = le16_to_cpu(hdr->frame_ctl);
5528 type = WLAN_FC_GET_TYPE(fc);
5529 praddr = hdr->addr1;
5530
5531 /* Check if the received packet is acceptabe. */
5532 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
5533 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
5534 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
5535 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5536#if 1//cosa
5537 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
5538 {
5539 bPacketBeacon = true;
5540 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
5541 }
5542 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
5543 {
5544 if((eqMacAddr(praddr,dev->dev_addr)))
5545 bToSelfBA = true;
5546 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
5547 }
5548
5549#endif
5550 if(bpacket_match_bssid)
5551 {
5552 priv->stats.numpacket_matchbssid++;
5553 }
5554 if(bpacket_toself){
5555 priv->stats.numpacket_toself++;
5556 }
5557 //
5558 // Process PHY information for previous packet (RSSI/PWDB/EVM)
5559 //
5560 // Because phy information is contained in the last packet of AMPDU only, so driver
5561 // should process phy information of previous packet
5562 rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
5563 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
5564 bpacket_toself ,bPacketBeacon, bToSelfBA);
5565 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
5566
5567}
5568
5569
5e1ad18a 5570static void rtl8192_tx_resume(struct net_device *dev)
ecdfa446
GKH		 5571{
5572 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5573 struct ieee80211_device *ieee = priv->ieee80211;
5574 struct sk_buff *skb;
5575 int queue_index;
5576
5577 for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
5578 while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
5579 (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
5580 /* 1. dequeue the packet from the wait queue */
5581 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
5582 /* 2. tx the packet directly */
5583 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
5584 #if 0
5585 if(queue_index!=MGNT_QUEUE) {
5586 ieee->stats.tx_packets++;
5587 ieee->stats.tx_bytes += skb->len;
5588 }
5589 #endif
5590 }
5591 }
5592}
5593
5594void rtl8192_irq_tx_tasklet(struct r8192_priv *priv)
5595{
5596 rtl8192_tx_resume(priv->ieee80211->dev);
5597}
5598
5599/**
5600* Function: UpdateReceivedRateHistogramStatistics
5601* Overview: Recored down the received data rate
5602*
5603* Input:
5604* PADAPTER Adapter
5605* PRT_RFD pRfd,
5606*
5607* Output:
5608* PRT_TCB Adapter
5609* (Adapter->RxStats.ReceivedRateHistogram[] is updated)
5610* Return:
5611* None
5612*/
5e1ad18a 5613static void UpdateReceivedRateHistogramStatistics8190(
ecdfa446
GKH		 5614 struct net_device *dev,
5615 struct ieee80211_rx_stats* pstats
5616 )
5617{
5618 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5619 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
5620 u32 rateIndex;
5621 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
5622
5623 /* 2007/03/09 MH We will not update rate of packet from rx cmd queue. */
5624 #if 0
5625 if (pRfd->queue_id == CMPK_RX_QUEUE_ID)
5626 return;
5627 #endif
5628 if(pstats->bCRC)
5629 rcvType = 2;
5630 else if(pstats->bICV)
5631 rcvType = 3;
5632
5633 if(pstats->bShortPreamble)
5634 preamble_guardinterval = 1;// short
5635 else
5636 preamble_guardinterval = 0;// long
5637
5638 switch(pstats->rate)
5639 {
5640 //
5641 // CCK rate
5642 //
5643 case MGN_1M: rateIndex = 0; break;
5644 case MGN_2M: rateIndex = 1; break;
5645 case MGN_5_5M: rateIndex = 2; break;
5646 case MGN_11M: rateIndex = 3; break;
5647 //
5648 // Legacy OFDM rate
5649 //
5650 case MGN_6M: rateIndex = 4; break;
5651 case MGN_9M: rateIndex = 5; break;
5652 case MGN_12M: rateIndex = 6; break;
5653 case MGN_18M: rateIndex = 7; break;
5654 case MGN_24M: rateIndex = 8; break;
5655 case MGN_36M: rateIndex = 9; break;
5656 case MGN_48M: rateIndex = 10; break;
5657 case MGN_54M: rateIndex = 11; break;
5658 //
5659 // 11n High throughput rate
5660 //
5661 case MGN_MCS0: rateIndex = 12; break;
5662 case MGN_MCS1: rateIndex = 13; break;
5663 case MGN_MCS2: rateIndex = 14; break;
5664 case MGN_MCS3: rateIndex = 15; break;
5665 case MGN_MCS4: rateIndex = 16; break;
5666 case MGN_MCS5: rateIndex = 17; break;
5667 case MGN_MCS6: rateIndex = 18; break;
5668 case MGN_MCS7: rateIndex = 19; break;
5669 case MGN_MCS8: rateIndex = 20; break;
5670 case MGN_MCS9: rateIndex = 21; break;
5671 case MGN_MCS10: rateIndex = 22; break;
5672 case MGN_MCS11: rateIndex = 23; break;
5673 case MGN_MCS12: rateIndex = 24; break;
5674 case MGN_MCS13: rateIndex = 25; break;
5675 case MGN_MCS14: rateIndex = 26; break;
5676 case MGN_MCS15: rateIndex = 27; break;
5677 default: rateIndex = 28; break;
5678 }
5679 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
5680 priv->stats.received_rate_histogram[0][rateIndex]++; //total
5681 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
5682}
5683
5e1ad18a 5684static void rtl8192_rx(struct net_device *dev)
ecdfa446
GKH		 5685{
5686 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5687 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
5688 bool unicast_packet = false;
5689 struct ieee80211_rx_stats stats = {
5690 .signal = 0,
5691 .noise = -98,
5692 .rate = 0,
5693 .freq = IEEE80211_24GHZ_BAND,
5694 };
5695 unsigned int count = priv->rxringcount;
5696
5697 stats.nic_type = NIC_8192E;
5698
5699 while (count--) {
5700 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
5701 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
5702
5703 if (pdesc->OWN){
5704 /* wait data to be filled by hardware */
5705 return;
5706 } else {
5707 stats.bICV = pdesc->ICV;
5708 stats.bCRC = pdesc->CRC32;
5709 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
5710
5711 stats.Length = pdesc->Length;
5712 if(stats.Length < 24)
5713 stats.bHwError |= 1;
5714
5715 if(stats.bHwError) {
5716 stats.bShift = false;
5717
5718 if(pdesc->CRC32) {
5719 if (pdesc->Length <500)
5720 priv->stats.rxcrcerrmin++;
5721 else if (pdesc->Length >1000)
5722 priv->stats.rxcrcerrmax++;
5723 else
5724 priv->stats.rxcrcerrmid++;
5725 }
5726 goto done;
5727 } else {
5728 prx_fwinfo_819x_pci pDrvInfo = NULL;
5729 struct sk_buff *new_skb = dev_alloc_skb(priv->rxbuffersize);
5730
5731 if (unlikely(!new_skb)) {
5732 goto done;
5733 }
5734
5735 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
5736 stats.RxBufShift = ((pdesc->Shift)&0x03);
5737 stats.Decrypted = !pdesc->SWDec;
5738
ecdfa446 5739 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 5740 *((dma_addr_t *)skb->cb),
5741 priv->rxbuffersize,
5742 PCI_DMA_FROMDEVICE);
5743 skb_put(skb, pdesc->Length);
5744 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
5745 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
5746
5747 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
5748 stats.bShortPreamble = pDrvInfo->SPLCP;
5749
5750 /* it is debug only. It should be disabled in released driver.
5751 * 2007.1.11 by Emily
5752 * */
5753 UpdateReceivedRateHistogramStatistics8190(dev, &stats);
5754
5755 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
5756 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
5757
5758 stats.TimeStampLow = pDrvInfo->TSFL;
5759 stats.TimeStampHigh = read_nic_dword(dev, TSFR+4);
5760
5761 UpdateRxPktTimeStamp8190(dev, &stats);
5762
5763 //
5764 // Get Total offset of MPDU Frame Body
5765 //
5766 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
5767 stats.bShift = 1;
5768
5769 stats.RxIs40MHzPacket = pDrvInfo->BW;
5770
5771 /* ???? */
5772 TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
5773
5774 /* Rx A-MPDU */
5775 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
5776 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
5777 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
5778 skb_trim(skb, skb->len - 4/*sCrcLng*/);
5779 /* rx packets statistics */
5780 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
5781 unicast_packet = false;
5782
5783 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
5784 //TODO
5785 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
5786 //TODO
5787 }else {
5788 /* unicast packet */
5789 unicast_packet = true;
5790 }
5791
5792 stats.packetlength = stats.Length-4;
5793 stats.fraglength = stats.packetlength;
5794 stats.fragoffset = 0;
5795 stats.ntotalfrag = 1;
5796
5797 if(!ieee80211_rx(priv->ieee80211, skb, &stats)){
5798 dev_kfree_skb_any(skb);
5799 } else {
5800 priv->stats.rxok++;
5801 if(unicast_packet) {
5802 priv->stats.rxbytesunicast += skb->len;
5803 }
5804 }
5805
5806 skb = new_skb;
5807 priv->rx_buf[priv->rx_idx] = skb;
5808 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb->tail, priv->rxbuffersize, PCI_DMA_FROMDEVICE);
5809// *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
5810 }
5811
5812 }
5813done:
5814 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
5815 pdesc->OWN = 1;
5816 pdesc->Length = priv->rxbuffersize;
5817 if (priv->rx_idx == priv->rxringcount-1)
5818 pdesc->EOR = 1;
5819 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
5820 }
5821
5822}
5823
5824void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
5825{
5826 rtl8192_rx(priv->ieee80211->dev);
5827 /* unmask RDU */
5828 write_nic_dword(priv->ieee80211->dev, INTA_MASK,read_nic_dword(priv->ieee80211->dev, INTA_MASK) | IMR_RDU);
5829}
5830
5831static const struct net_device_ops rtl8192_netdev_ops = {
5832 .ndo_open = rtl8192_open,
5833 .ndo_stop = rtl8192_close,
5834/* .ndo_get_stats = rtl8192_stats, */
5835 .ndo_tx_timeout = tx_timeout,
5836 .ndo_do_ioctl = rtl8192_ioctl,
5837 .ndo_set_multicast_list = r8192_set_multicast,
5838 .ndo_set_mac_address = r8192_set_mac_adr,
5839 .ndo_start_xmit = ieee80211_xmit,
5840};
5841
5842/****************************************************************************
5843 ---------------------------- PCI_STUFF---------------------------
5844*****************************************************************************/
5845
5846static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
5847 const struct pci_device_id *id)
5848{
5849 unsigned long ioaddr = 0;
5850 struct net_device *dev = NULL;
5851 struct r8192_priv *priv= NULL;
5852 u8 unit = 0;
5853
5854#ifdef CONFIG_RTL8192_IO_MAP
5855 unsigned long pio_start, pio_len, pio_flags;
5856#else
5857 unsigned long pmem_start, pmem_len, pmem_flags;
5858#endif //end #ifdef RTL_IO_MAP
5859
5860 RT_TRACE(COMP_INIT,"Configuring chip resources");
5861
5862 if( pci_enable_device (pdev) ){
5863 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
5864 return -EIO;
5865 }
5866
5867 pci_set_master(pdev);
5868 //pci_set_wmi(pdev);
5869 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 5870 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446
GKH		 5871 dev = alloc_ieee80211(sizeof(struct r8192_priv));
5872 if (!dev)
5873 return -ENOMEM;
5874
ecdfa446 5875 pci_set_drvdata(pdev, dev);
ecdfa446 5876 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 5877 priv = ieee80211_priv(dev);
ecdfa446 5878 priv->ieee80211 = netdev_priv(dev);
ecdfa446 5879 priv->pdev=pdev;
ecdfa446
GKH		 5880 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
5881 priv->ieee80211->bSupportRemoteWakeUp = 1;
5882 } else
ecdfa446
GKH		 5883 {
5884 priv->ieee80211->bSupportRemoteWakeUp = 0;
5885 }
5886
5887#ifdef CONFIG_RTL8192_IO_MAP
5888
5889 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5890 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5891 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5892
5893 if (!(pio_flags & IORESOURCE_IO)) {
5894 RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
5895 goto fail;
5896 }
5897
5898 //DMESG("IO space @ 0x%08lx", pio_start );
5899 if( ! request_region( pio_start, pio_len, RTL819xE_MODULE_NAME ) ){
5900 RT_TRACE(COMP_ERR,"request_region failed!");
5901 goto fail;
5902 }
5903
5904 ioaddr = pio_start;
5905 dev->base_addr = ioaddr; // device I/O address
5906
5907#else
5908
5909 pmem_start = pci_resource_start(pdev, 1);
5910 pmem_len = pci_resource_len(pdev, 1);
5911 pmem_flags = pci_resource_flags (pdev, 1);
5912
5913 if (!(pmem_flags & IORESOURCE_MEM)) {
5914 RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
5915 goto fail;
5916 }
5917
5918 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5919 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
5920 RT_TRACE(COMP_ERR,"request_mem_region failed!");
5921 goto fail;
5922 }
5923
5924
5925 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5926 if( ioaddr == (unsigned long)NULL ){
5927 RT_TRACE(COMP_ERR,"ioremap failed!");
5928 // release_mem_region( pmem_start, pmem_len );
5929 goto fail1;
5930 }
5931
5932 dev->mem_start = ioaddr; // shared mem start
5933 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5934
5935#endif //end #ifdef RTL_IO_MAP
5936
5937 /* We disable the RETRY_TIMEOUT register (0x41) to keep
5938 * PCI Tx retries from interfering with C3 CPU state */
5939 pci_write_config_byte(pdev, 0x41, 0x00);
5940
5941
5942 pci_read_config_byte(pdev, 0x05, &unit);
5943 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5944
5945 dev->irq = pdev->irq;
5946 priv->irq = 0;
5947
5948 dev->netdev_ops = &rtl8192_netdev_ops;
5949#if 0
5950 dev->open = rtl8192_open;
5951 dev->stop = rtl8192_close;
5952 //dev->hard_start_xmit = rtl8192_8023_hard_start_xmit;
5953 dev->tx_timeout = tx_timeout;
5954 //dev->wireless_handlers = &r8192_wx_handlers_def;
5955 dev->do_ioctl = rtl8192_ioctl;
5956 dev->set_multicast_list = r8192_set_multicast;
5957 dev->set_mac_address = r8192_set_mac_adr;
5958#endif
5959
5960 //DMESG("Oops: i'm coming\n");
5961#if WIRELESS_EXT >= 12
5962#if WIRELESS_EXT < 17
5963 dev->get_wireless_stats = r8192_get_wireless_stats;
5964#endif
5965 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
5966#endif
5967 //dev->get_wireless_stats = r8192_get_wireless_stats;
5968 dev->type=ARPHRD_ETHER;
5969
5970 dev->watchdog_timeo = HZ*3; //modified by john, 0805
5971
5972 if (dev_alloc_name(dev, ifname) < 0){
5973 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
5974 ifname = "wlan%d";
5975 dev_alloc_name(dev, ifname);
5976 }
5977
5978 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
5979 if(rtl8192_init(dev)!=0){
5980 RT_TRACE(COMP_ERR, "Initialization failed");
5981 goto fail;
5982 }
5983
5984 netif_carrier_off(dev);
5985 netif_stop_queue(dev);
5986
5987 register_netdev(dev);
5988 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
5989 rtl8192_proc_init_one(dev);
5990
5991
5992 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 5993 return 0;
ecdfa446
GKH		 5994
5995fail1:
5996
5997#ifdef CONFIG_RTL8180_IO_MAP
5998
5999 if( dev->base_addr != 0 ){
6000
6001 release_region(dev->base_addr,
6002 pci_resource_len(pdev, 0) );
6003 }
6004#else
6005 if( dev->mem_start != (unsigned long)NULL ){
6006 iounmap( (void *)dev->mem_start );
6007 release_mem_region( pci_resource_start(pdev, 1),
6008 pci_resource_len(pdev, 1) );
6009 }
6010#endif //end #ifdef RTL_IO_MAP
6011
6012fail:
6013 if(dev){
6014
6015 if (priv->irq) {
6016 free_irq(dev->irq, dev);
6017 dev->irq=0;
6018 }
6019 free_ieee80211(dev);
6020 }
6021
6022 pci_disable_device(pdev);
6023
6024 DMESG("wlan driver load failed\n");
6025 pci_set_drvdata(pdev, NULL);
6026 return -ENODEV;
6027
6028}
6029
6030/* detach all the work and timer structure declared or inititialized
6031 * in r8192_init function.
6032 * */
6033void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
6034{
6035 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
6036 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
6037 * Otherwise call cancel_delayed_work is enough.
6038 * FIXME (2.6.20 shoud 2.6.22, work_struct shoud not cancel)
6039 * */
ecdfa446
GKH		 6040 cancel_delayed_work(&priv->watch_dog_wq);
6041 cancel_delayed_work(&priv->update_beacon_wq);
6042 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
6043 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
6044#ifdef RTL8192E
6045 cancel_delayed_work(&priv->gpio_change_rf_wq);
6046#endif
ecdfa446
GKH		 6047 cancel_work_sync(&priv->reset_wq);
6048 cancel_work_sync(&priv->qos_activate);
6049 //cancel_work_sync(&priv->SetBWModeWorkItem);
6050 //cancel_work_sync(&priv->SwChnlWorkItem);
ecdfa446
GKH		 6051
6052}
6053
6054
6055static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
6056{
6057 struct net_device *dev = pci_get_drvdata(pdev);
6058 struct r8192_priv *priv ;
6059
6060 if(dev){
6061
6062 unregister_netdev(dev);
6063
6064 priv=ieee80211_priv(dev);
6065
6066 rtl8192_proc_remove_one(dev);
6067
6068 rtl8192_down(dev);
6069 if (priv->pFirmware)
6070 {
6071 vfree(priv->pFirmware);
6072 priv->pFirmware = NULL;
6073 }
6074 // priv->rf_close(dev);
6075 // rtl8192_usb_deleteendpoints(dev);
ecdfa446 6076 destroy_workqueue(priv->priv_wq);
ecdfa446
GKH		 6077 /* redundant with rtl8192_down */
6078 // rtl8192_irq_disable(dev);
6079 // rtl8192_reset(dev);
6080 // mdelay(10);
6081 {
6082 u32 i;
6083 /* free tx/rx rings */
6084 rtl8192_free_rx_ring(dev);
6085 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
6086 rtl8192_free_tx_ring(dev, i);
6087 }
6088 }
6089 if(priv->irq){
6090
6091 printk("Freeing irq %d\n",dev->irq);
6092 free_irq(dev->irq, dev);
6093 priv->irq=0;
6094
6095 }
6096
6097
6098
6099 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6100
6101#ifdef CONFIG_RTL8180_IO_MAP
6102
6103 if( dev->base_addr != 0 ){
6104
6105 release_region(dev->base_addr,
6106 pci_resource_len(pdev, 0) );
6107 }
6108#else
6109 if( dev->mem_start != (unsigned long)NULL ){
6110 iounmap( (void *)dev->mem_start );
6111 release_mem_region( pci_resource_start(pdev, 1),
6112 pci_resource_len(pdev, 1) );
6113 }
6114#endif /*end #ifdef RTL_IO_MAP*/
6115 free_ieee80211(dev);
6116
6117 }
6118
6119 pci_disable_device(pdev);
6120 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
6121}
6122
6123extern int ieee80211_init(void);
6124extern void ieee80211_exit(void);
6125
6126static int __init rtl8192_pci_module_init(void)
6127{
6128 int retval;
6129
6130 retval = ieee80211_init();
6131 if (retval)
6132 return retval;
6133
6134 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
6135 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
6136 RT_TRACE(COMP_INIT, "Initializing module");
6137 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
6138 rtl8192_proc_module_init();
ecdfa446 6139 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 6140 {
6141 DMESG("No device found");
6142 /*pci_unregister_driver (&rtl8192_pci_driver);*/
6143 return -ENODEV;
6144 }
6145 return 0;
6146}
6147
6148
6149static void __exit rtl8192_pci_module_exit(void)
6150{
6151 pci_unregister_driver(&rtl8192_pci_driver);
6152
6153 RT_TRACE(COMP_DOWN, "Exiting");
6154 rtl8192_proc_module_remove();
6155 ieee80211_exit();
6156}
6157
6158//warning message WB
ecdfa446 6159irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446
GKH		 6160{
6161 struct net_device *dev = (struct net_device *) netdev;
6162 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6163 unsigned long flags;
6164 u32 inta;
6165 /* We should return IRQ_NONE, but for now let me keep this */
6166 if(priv->irq_enabled == 0){
ecdfa446 6167 return IRQ_HANDLED;
ecdfa446
GKH		 6168 }
6169
6170 spin_lock_irqsave(&priv->irq_th_lock,flags);
6171
6172 //ISR: 4bytes
6173
6174 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6175 write_nic_dword(dev,ISR,inta); // reset int situation
6176
6177 priv->stats.shints++;
6178 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6179 if(!inta){
6180 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6181 return IRQ_HANDLED;
ecdfa446
GKH		 6182 /*
6183 most probably we can safely return IRQ_NONE,
6184 but for now is better to avoid problems
6185 */
6186 }
6187
6188 if(inta == 0xffff){
6189 /* HW disappared */
6190 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6191 return IRQ_HANDLED;
ecdfa446
GKH		 6192 }
6193
6194 priv->stats.ints++;
6195#ifdef DEBUG_IRQ
6196 DMESG("NIC irq %x",inta);
6197#endif
6198 //priv->irqpending = inta;
6199
6200
6201 if(!netif_running(dev)) {
6202 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6203 return IRQ_HANDLED;
ecdfa446
GKH		 6204 }
6205
6206 if(inta & IMR_TIMEOUT0){
6207 // write_nic_dword(dev, TimerInt, 0);
6208 //DMESG("=================>waking up");
6209 // rtl8180_hw_wakeup(dev);
6210 }
6211
6212 if(inta & IMR_TBDOK){
6213 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6214 rtl8192_tx_isr(dev, BEACON_QUEUE);
6215 priv->stats.txbeaconokint++;
6216 }
6217
6218 if(inta & IMR_TBDER){
6219 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6220 rtl8192_tx_isr(dev, BEACON_QUEUE);
6221 priv->stats.txbeaconerr++;
6222 }
6223
6224 if(inta & IMR_MGNTDOK ) {
6225 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
6226 priv->stats.txmanageokint++;
6227 rtl8192_tx_isr(dev,MGNT_QUEUE);
6228
6229 }
6230
6231 if(inta & IMR_COMDOK)
6232 {
6233 priv->stats.txcmdpktokint++;
6234 rtl8192_tx_isr(dev,TXCMD_QUEUE);
6235 }
6236
6237 if(inta & IMR_ROK){
6238#ifdef DEBUG_RX
6239 DMESG("Frame arrived !");
6240#endif
6241 priv->stats.rxint++;
6242 tasklet_schedule(&priv->irq_rx_tasklet);
6243 }
6244
6245 if(inta & IMR_BcnInt) {
6246 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
6247 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
6248 }
6249
6250 if(inta & IMR_RDU){
6251 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
6252 priv->stats.rxrdu++;
6253 /* reset int situation */
6254 write_nic_dword(dev,INTA_MASK,read_nic_dword(dev, INTA_MASK) & ~IMR_RDU);
6255 tasklet_schedule(&priv->irq_rx_tasklet);
6256 }
6257
6258 if(inta & IMR_RXFOVW){
6259 RT_TRACE(COMP_INTR, "rx overflow !\n");
6260 priv->stats.rxoverflow++;
6261 tasklet_schedule(&priv->irq_rx_tasklet);
6262 }
6263
6264 if(inta & IMR_TXFOVW) priv->stats.txoverflow++;
6265
6266 if(inta & IMR_BKDOK){
6267 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
6268 priv->stats.txbkokint++;
6269 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6270 rtl8192_tx_isr(dev,BK_QUEUE);
6271 rtl8192_try_wake_queue(dev, BK_QUEUE);
6272 }
6273
6274 if(inta & IMR_BEDOK){
6275 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
6276 priv->stats.txbeokint++;
6277 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6278 rtl8192_tx_isr(dev,BE_QUEUE);
6279 rtl8192_try_wake_queue(dev, BE_QUEUE);
6280 }
6281
6282 if(inta & IMR_VIDOK){
6283 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
6284 priv->stats.txviokint++;
6285 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6286 rtl8192_tx_isr(dev,VI_QUEUE);
6287 rtl8192_try_wake_queue(dev, VI_QUEUE);
6288 }
6289
6290 if(inta & IMR_VODOK){
6291 priv->stats.txvookint++;
6292 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6293 rtl8192_tx_isr(dev,VO_QUEUE);
6294 rtl8192_try_wake_queue(dev, VO_QUEUE);
6295 }
6296
6297 force_pci_posting(dev);
6298 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6299
ecdfa446 6300 return IRQ_HANDLED;
ecdfa446
GKH		 6301}
6302
6303void rtl8192_try_wake_queue(struct net_device *dev, int pri)
6304{
6305#if 0
6306 unsigned long flags;
6307 short enough_desc;
6308 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6309
6310 spin_lock_irqsave(&priv->tx_lock,flags);
6311 enough_desc = check_nic_enough_desc(dev,pri);
6312 spin_unlock_irqrestore(&priv->tx_lock,flags);
6313
6314 if(enough_desc)
6315 ieee80211_wake_queue(priv->ieee80211);
6316#endif
6317}
6318
6319
6320void EnableHWSecurityConfig8192(struct net_device *dev)
6321{
6322 u8 SECR_value = 0x0;
6323 // struct ieee80211_device* ieee1 = container_of(&dev, struct ieee80211_device, dev);
6324 //printk("==>ieee1:%p, dev:%p\n", ieee1, dev);
6325 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6326 struct ieee80211_device* ieee = priv->ieee80211;
6327 //printk("==>ieee:%p, dev:%p\n", ieee, dev);
6328 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
6329#if 1
6330 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
6331 {
6332 SECR_value |= SCR_RxUseDK;
6333 SECR_value |= SCR_TxUseDK;
6334 }
6335 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
6336 {
6337 SECR_value |= SCR_RxUseDK;
6338 SECR_value |= SCR_TxUseDK;
6339 }
6340
6341#endif
6342
6343 //add HWSec active enable here.
6344//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
6345 ieee->hwsec_active = 1;
6346
6347 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
6348 {
6349 ieee->hwsec_active = 0;
6350 SECR_value &= ~SCR_RxDecEnable;
6351 }
6352
6353 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
6354 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
6355 {
6356 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
6357 }
6358
6359}
6360#define TOTAL_CAM_ENTRY 32
6361//#define CAM_CONTENT_COUNT 8
6362void setKey( struct net_device *dev,
6363 u8 EntryNo,
6364 u8 KeyIndex,
6365 u16 KeyType,
6366 u8 *MacAddr,
6367 u8 DefaultKey,
6368 u32 *KeyContent )
6369{
6370 u32 TargetCommand = 0;
6371 u32 TargetContent = 0;
6372 u16 usConfig = 0;
6373 u8 i;
6374#ifdef ENABLE_IPS
6375 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6376 RT_RF_POWER_STATE rtState;
6377 rtState = priv->ieee80211->eRFPowerState;
6378 if(priv->ieee80211->PowerSaveControl.bInactivePs){
6379 if(rtState == eRfOff){
6380 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
6381 {
6382 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
6383 up(&priv->wx_sem);
6384 return ;
6385 }
6386 else{
6387 IPSLeave(dev);
6388 }
6389 }
6390 }
6391 priv->ieee80211->is_set_key = true;
6392#endif
6393 if (EntryNo >= TOTAL_CAM_ENTRY)
6394 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
6395
6396 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr));
6397
6398 if (DefaultKey)
6399 usConfig |= BIT15 | (KeyType<<2);
6400 else
6401 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
6402// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
6403
6404
6405 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
6406 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
6407 TargetCommand |= BIT31|BIT16;
6408
6409 if(i==0){//MAC|Config
6410 TargetContent = (u32)(*(MacAddr+0)) << 16|
6411 (u32)(*(MacAddr+1)) << 24|
6412 (u32)usConfig;
6413
6414 write_nic_dword(dev, WCAMI, TargetContent);
6415 write_nic_dword(dev, RWCAM, TargetCommand);
6416 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
6417 }
6418 else if(i==1){//MAC
6419 TargetContent = (u32)(*(MacAddr+2)) |
6420 (u32)(*(MacAddr+3)) << 8|
6421 (u32)(*(MacAddr+4)) << 16|
6422 (u32)(*(MacAddr+5)) << 24;
6423 write_nic_dword(dev, WCAMI, TargetContent);
6424 write_nic_dword(dev, RWCAM, TargetCommand);
6425 }
6426 else { //Key Material
6427 if(KeyContent != NULL)
6428 {
6429 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
6430 write_nic_dword(dev, RWCAM, TargetCommand);
6431 }
6432 }
6433 }
6434 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446
GKH		 6435}
6436// This function seems not ready! WB
6437void CamPrintDbgReg(struct net_device* dev)
6438{
6439 unsigned long rvalue;
6440 unsigned char ucValue;
6441 write_nic_dword(dev, DCAM, 0x80000000);
6442 msleep(40);
6443 rvalue = read_nic_dword(dev, DCAM); //delay_ms(40);
6444 RT_TRACE(COMP_SEC, " TX CAM=%8lX ",rvalue);
6445 if((rvalue & 0x40000000) != 0x4000000)
6446 RT_TRACE(COMP_SEC, "-->TX Key Not Found ");
6447 msleep(20);
6448 write_nic_dword(dev, DCAM, 0x00000000); //delay_ms(40);
6449 rvalue = read_nic_dword(dev, DCAM); //delay_ms(40);
6450 RT_TRACE(COMP_SEC, "RX CAM=%8lX ",rvalue);
6451 if((rvalue & 0x40000000) != 0x4000000)
6452 RT_TRACE(COMP_SEC, "-->CAM Key Not Found ");
6453 ucValue = read_nic_byte(dev, SECR);
6454 RT_TRACE(COMP_SEC, "WPA_Config=%x \n",ucValue);
6455}
6456
6457
6458/***************************************************************************
6459 ------------------- module init / exit stubs ----------------
6460****************************************************************************/
6461module_init(rtl8192_pci_module_init);
6462module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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