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Staging: rtl8192e: Make functions static
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8190P / RTL8192E
4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
ecdfa446
GKH		 27
28#undef LOOP_TEST
29#undef RX_DONT_PASS_UL
30#undef DEBUG_EPROM
31#undef DEBUG_RX_VERBOSE
32#undef DUMMY_RX
33#undef DEBUG_ZERO_RX
34#undef DEBUG_RX_SKB
35#undef DEBUG_TX_FRAG
36#undef DEBUG_RX_FRAG
37#undef DEBUG_TX_FILLDESC
38#undef DEBUG_TX
39#undef DEBUG_IRQ
40#undef DEBUG_RX
41#undef DEBUG_RXALLOC
42#undef DEBUG_REGISTERS
43#undef DEBUG_RING
44#undef DEBUG_IRQ_TASKLET
45#undef DEBUG_TX_ALLOC
46#undef DEBUG_TX_DESC
47
48//#define CONFIG_RTL8192_IO_MAP
3d14b518 49#include <linux/vmalloc.h>
5a0e3ad6 50#include <linux/slab.h>
ecdfa446
GKH		 51#include <asm/uaccess.h>
52#include "r8192E_hw.h"
53#include "r8192E.h"
54#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
55#include "r8180_93cx6.h" /* Card EEPROM */
56#include "r8192E_wx.h"
57#include "r819xE_phy.h" //added by WB 4.30.2008
58#include "r819xE_phyreg.h"
59#include "r819xE_cmdpkt.h"
60#include "r8192E_dm.h"
61//#include "r8192xU_phyreg.h"
62//#include <linux/usb.h>
63// FIXME: check if 2.6.7 is ok
64
bebdf809 65#ifdef CONFIG_PM
ecdfa446
GKH		 66#include "r8192_pm.h"
67#endif
68
69#ifdef ENABLE_DOT11D
65a43784 70#include "ieee80211/dot11d.h"
ecdfa446
GKH		 71#endif
72
73//set here to open your trace code. //WB
207b58fb 74u32 rt_global_debug_component =
ecdfa446
GKH		 75 // COMP_INIT |
76 // COMP_EPROM |
77 // COMP_PHY |
78 // COMP_RF |
65a43784 79// COMP_FIRMWARE |
ecdfa446
GKH		 80 // COMP_TRACE |
81 // COMP_DOWN |
82 // COMP_SWBW |
83 // COMP_SEC |
84// COMP_QOS |
85// COMP_RATE |
86 // COMP_RECV |
87 // COMP_SEND |
88 // COMP_POWER |
89 // COMP_EVENTS |
90 // COMP_RESET |
91 // COMP_CMDPKT |
92 // COMP_POWER_TRACKING |
93 // COMP_INTR |
94 COMP_ERR ; //always open err flags on
cf3d3d38 95
881a975b 96static const struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
ecdfa446
GKH		 97#ifdef RTL8190P
98 /* Realtek */
99 /* Dlink */
100 { PCI_DEVICE(0x10ec, 0x8190) },
101 /* Corega */
102 { PCI_DEVICE(0x07aa, 0x0045) },
103 { PCI_DEVICE(0x07aa, 0x0046) },
104#else
105 /* Realtek */
106 { PCI_DEVICE(0x10ec, 0x8192) },
107
108 /* Corega */
109 { PCI_DEVICE(0x07aa, 0x0044) },
110 { PCI_DEVICE(0x07aa, 0x0047) },
111#endif
112 {}
113};
114
dca41306 115static char ifname[IFNAMSIZ] = "wlan%d";
ecdfa446
GKH		 116static int hwwep = 1; //default use hw. set 0 to use software security
117static int channels = 0x3fff;
118
119MODULE_LICENSE("GPL");
ecdfa446 120MODULE_VERSION("V 1.1");
ecdfa446
GKH		 121MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
122//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
123MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
124
ecdfa446 125
dca41306 126module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
ecdfa446
GKH		 127//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
128module_param(hwwep,int, S_IRUGO|S_IWUSR);
129module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 130
131MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
132//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
133MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
134MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
135
136static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
137 const struct pci_device_id *id);
138static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
139
140static struct pci_driver rtl8192_pci_driver = {
141 .name = RTL819xE_MODULE_NAME, /* Driver name */
142 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
143 .probe = rtl8192_pci_probe, /* probe fn */
144 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
bebdf809 145#ifdef CONFIG_PM
ecdfa446
GKH		 146 .suspend = rtl8192E_suspend, /* PM suspend fn */
147 .resume = rtl8192E_resume, /* PM resume fn */
148#else
149 .suspend = NULL, /* PM suspend fn */
150 .resume = NULL, /* PM resume fn */
151#endif
ecdfa446
GKH		 152};
153
559fba5e
MM		 154static void rtl8192_start_beacon(struct net_device *dev);
155static void rtl8192_stop_beacon(struct net_device *dev);
156static void rtl819x_watchdog_wqcallback(struct work_struct *work);
157static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
158static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
159static void rtl8192_prepare_beacon(struct r8192_priv *priv);
160static irqreturn_t rtl8192_interrupt(int irq, void *netdev);
161static void rtl8192_try_wake_queue(struct net_device *dev, int pri);
881a975b 162static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb);
5b3b1a7b
MM		 163static void rtl8192_update_ratr_table(struct net_device* dev);
164static void rtl8192_restart(struct work_struct *work);
165static void watch_dog_timer_callback(unsigned long data);
166static int _rtl8192_up(struct net_device *dev);
167static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
559fba5e 168
ecdfa446
GKH		 169#ifdef ENABLE_DOT11D
170
171typedef struct _CHANNEL_LIST
172{
173 u8 Channel[32];
174 u8 Len;
175}CHANNEL_LIST, *PCHANNEL_LIST;
176
ab2161a0 177static const CHANNEL_LIST ChannelPlan[] = {
ecdfa446
GKH		 178 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
179 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
180 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
181 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
182 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
183 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
184 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
185 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
186 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
187 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
188 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
189};
190
191static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
192{
193 int i, max_chan=-1, min_chan=-1;
194 struct ieee80211_device* ieee = priv->ieee80211;
195 switch (channel_plan)
196 {
197 case COUNTRY_CODE_FCC:
198 case COUNTRY_CODE_IC:
199 case COUNTRY_CODE_ETSI:
200 case COUNTRY_CODE_SPAIN:
201 case COUNTRY_CODE_FRANCE:
202 case COUNTRY_CODE_MKK:
203 case COUNTRY_CODE_MKK1:
204 case COUNTRY_CODE_ISRAEL:
205 case COUNTRY_CODE_TELEC:
206 case COUNTRY_CODE_MIC:
207 {
208 Dot11d_Init(ieee);
209 ieee->bGlobalDomain = false;
210 //acturally 8225 & 8256 rf chip only support B,G,24N mode
211 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256))
212 {
213 min_chan = 1;
214 max_chan = 14;
215 }
216 else
217 {
218 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
219 }
220 if (ChannelPlan[channel_plan].Len != 0){
221 // Clear old channel map
222 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
223 // Set new channel map
224 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
225 {
226 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
227 break;
228 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
229 }
230 }
231 break;
232 }
233 case COUNTRY_CODE_GLOBAL_DOMAIN:
234 {
235 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
236 Dot11d_Reset(ieee);
237 ieee->bGlobalDomain = true;
238 break;
239 }
240 default:
241 break;
242 }
243}
244#endif
245
246
247#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
248/* 2007/07/25 MH Defien temp tx fw info. */
5e1ad18a 249static TX_FWINFO_T Tmp_TxFwInfo;
ecdfa446
GKH		 250
251
252#define rx_hal_is_cck_rate(_pdrvinfo)\
253 (_pdrvinfo->RxRate == DESC90_RATE1M ||\
254 _pdrvinfo->RxRate == DESC90_RATE2M ||\
255 _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
256 _pdrvinfo->RxRate == DESC90_RATE11M) &&\
257 !_pdrvinfo->RxHT\
258
259
260void CamResetAllEntry(struct net_device *dev)
261{
262 //u8 ucIndex;
263 u32 ulcommand = 0;
264
265#if 1
266 ulcommand |= BIT31|BIT30;
267 write_nic_dword(dev, RWCAM, ulcommand);
268#else
269 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
270 CAM_mark_invalid(dev, ucIndex);
271 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
272 CAM_empty_entry(dev, ucIndex);
273#endif
274}
275
276
277void write_cam(struct net_device *dev, u8 addr, u32 data)
278{
279 write_nic_dword(dev, WCAMI, data);
280 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
281}
282u32 read_cam(struct net_device *dev, u8 addr)
283{
284 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
285 return read_nic_dword(dev, 0xa8);
286}
287
288////////////////////////////////////////////////////////////
289#ifdef CONFIG_RTL8180_IO_MAP
290
291u8 read_nic_byte(struct net_device *dev, int x)
292{
293 return 0xff&inb(dev->base_addr +x);
294}
295
296u32 read_nic_dword(struct net_device *dev, int x)
297{
298 return inl(dev->base_addr +x);
299}
300
301u16 read_nic_word(struct net_device *dev, int x)
302{
303 return inw(dev->base_addr +x);
304}
305
306void write_nic_byte(struct net_device *dev, int x,u8 y)
307{
308 outb(y&0xff,dev->base_addr +x);
309}
310
311void write_nic_word(struct net_device *dev, int x,u16 y)
312{
313 outw(y,dev->base_addr +x);
314}
315
316void write_nic_dword(struct net_device *dev, int x,u32 y)
317{
318 outl(y,dev->base_addr +x);
319}
320
321#else /* RTL_IO_MAP */
322
323u8 read_nic_byte(struct net_device *dev, int x)
324{
325 return 0xff&readb((u8*)dev->mem_start +x);
326}
327
328u32 read_nic_dword(struct net_device *dev, int x)
329{
330 return readl((u8*)dev->mem_start +x);
331}
332
333u16 read_nic_word(struct net_device *dev, int x)
334{
335 return readw((u8*)dev->mem_start +x);
336}
337
338void write_nic_byte(struct net_device *dev, int x,u8 y)
339{
340 writeb(y,(u8*)dev->mem_start +x);
341 udelay(20);
342}
343
344void write_nic_dword(struct net_device *dev, int x,u32 y)
345{
346 writel(y,(u8*)dev->mem_start +x);
347 udelay(20);
348}
349
350void write_nic_word(struct net_device *dev, int x,u16 y)
351{
352 writew(y,(u8*)dev->mem_start +x);
353 udelay(20);
354}
355
356#endif /* RTL_IO_MAP */
357
65a43784 358u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
359{
360 //struct r8192_priv* priv = ieee80211_priv(dev);
361 //struct ieee80211_device *ieee = priv->ieee80211;
362
4a533365
MM		 363 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
364 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 365 int wpa_ie_len= ieee->wpa_ie_len;
366 struct ieee80211_crypt_data* crypt;
367 int encrypt;
368
369 crypt = ieee->crypt[ieee->tx_keyidx];
370
207b58fb
MM		 371 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
372 (ieee->host_encrypt && crypt && crypt->ops &&
65a43784 373 (0 == strcmp(crypt->ops->name,"WEP")));
374
375 /* simply judge */
376 if(encrypt && (wpa_ie_len == 0)) {
377 // wep encryption, no N mode setting */
378 return SEC_ALG_WEP;
379 } else if((wpa_ie_len != 0)) {
380 // parse pairwise key type */
381 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
382 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
383 return SEC_ALG_CCMP;
384 else
385 return SEC_ALG_TKIP;
386 } else {
387 return SEC_ALG_NONE;
388 }
389}
390
391void
392rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
393{
394 struct r8192_priv* priv = ieee80211_priv(dev);
395
396 switch(variable)
397 {
398
399 case HW_VAR_BSSID:
400 write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]);
401 write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]);
402 break;
403
404 case HW_VAR_MEDIA_STATUS:
405 {
406 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
407 //LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
408 u8 btMsr = read_nic_byte(dev, MSR);
409
410 btMsr &= 0xfc;
411
412 switch(OpMode)
413 {
414 case RT_OP_MODE_INFRASTRUCTURE:
415 btMsr |= MSR_INFRA;
416 //LedAction = LED_CTL_LINK;
417 break;
418
419 case RT_OP_MODE_IBSS:
420 btMsr |= MSR_ADHOC;
935e99fb 421 // led link set separate
65a43784 422 break;
423
424 case RT_OP_MODE_AP:
425 btMsr |= MSR_AP;
426 //LedAction = LED_CTL_LINK;
427 break;
428
429 default:
430 btMsr |= MSR_NOLINK;
431 break;
432 }
433
434 write_nic_byte(dev, MSR, btMsr);
435
436 //priv->ieee80211->LedControlHandler(dev, LedAction);
437 }
438 break;
439
440 case HW_VAR_CECHK_BSSID:
441 {
442 u32 RegRCR, Type;
443
444 Type = ((u8*)(val))[0];
445 //priv->ieee80211->GetHwRegHandler(dev, HW_VAR_RCR, (u8*)(&RegRCR));
446 RegRCR = read_nic_dword(dev,RCR);
447 priv->ReceiveConfig = RegRCR;
448
449 if (Type == true)
450 RegRCR |= (RCR_CBSSID);
451 else if (Type == false)
452 RegRCR &= (~RCR_CBSSID);
453
454 //priv->ieee80211->SetHwRegHandler( dev, HW_VAR_RCR, (u8*)(&RegRCR) );
455 write_nic_dword(dev, RCR,RegRCR);
456 priv->ReceiveConfig = RegRCR;
457
458 }
459 break;
460
461 case HW_VAR_SLOT_TIME:
462 {
463 //PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos;
464 //AC_CODING eACI;
465
466 priv->slot_time = val[0];
467 write_nic_byte(dev, SLOT_TIME, val[0]);
468
469 }
470 break;
471
472 case HW_VAR_ACK_PREAMBLE:
473 {
474 u32 regTmp = 0;
475 priv->short_preamble = (bool)(*(u8*)val );
476 regTmp = priv->basic_rate;
477 if (priv->short_preamble)
478 regTmp |= BRSR_AckShortPmb;
479 write_nic_dword(dev, RRSR, regTmp);
480 }
481 break;
482
483 case HW_VAR_CPU_RST:
484 write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]);
485 break;
486
487 default:
488 break;
489 }
490
491}
492
ecdfa446
GKH		 493
494///////////////////////////////////////////////////////////
495
496//u8 read_phy_cck(struct net_device *dev, u8 adr);
497//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
498/* this might still called in what was the PHY rtl8185/rtl8192 common code
499 * plans are to possibilty turn it again in one common code...
500 */
559fba5e 501void force_pci_posting(struct net_device *dev)
ecdfa446
GKH		 502{
503}
504
505
ecdfa446 506//static struct net_device_stats *rtl8192_stats(struct net_device *dev);
ecdfa446 507//void rtl8192_rq_tx_ack(struct work_struct *work);
ecdfa446 508
ecdfa446
GKH		 509/****************************************************************************
510 -----------------------------PROCFS STUFF-------------------------
511*****************************************************************************/
512
513static struct proc_dir_entry *rtl8192_proc = NULL;
514
515
516
517static int proc_get_stats_ap(char *page, char **start,
518 off_t offset, int count,
519 int *eof, void *data)
520{
521 struct net_device *dev = data;
522 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
523 struct ieee80211_device *ieee = priv->ieee80211;
524 struct ieee80211_network *target;
525
526 int len = 0;
527
528 list_for_each_entry(target, &ieee->network_list, list) {
529
530 len += snprintf(page + len, count - len,
531 "%s ", target->ssid);
532
533 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
534 len += snprintf(page + len, count - len,
535 "WPA\n");
536 }
537 else{
538 len += snprintf(page + len, count - len,
539 "non_WPA\n");
540 }
541
542 }
543
544 *eof = 1;
545 return len;
546}
547
548static int proc_get_registers(char *page, char **start,
549 off_t offset, int count,
550 int *eof, void *data)
551{
552 struct net_device *dev = data;
553// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
554
555 int len = 0;
556 int i,n;
557
558 int max=0xff;
559
560 /* This dump the current register page */
561 len += snprintf(page + len, count - len,
562 "\n####################page 0##################\n ");
563
564 for(n=0;n<=max;)
565 {
566 //printk( "\nD: %2x> ", n);
567 len += snprintf(page + len, count - len,
568 "\nD: %2x > ",n);
569
570 for(i=0;i<16 && n<=max;i++,n++)
571 len += snprintf(page + len, count - len,
572 "%2x ",read_nic_byte(dev,n));
573
574 // printk("%2x ",read_nic_byte(dev,n));
575 }
576 len += snprintf(page + len, count - len,"\n");
577 len += snprintf(page + len, count - len,
578 "\n####################page 1##################\n ");
579 for(n=0;n<=max;)
580 {
581 //printk( "\nD: %2x> ", n);
582 len += snprintf(page + len, count - len,
583 "\nD: %2x > ",n);
584
585 for(i=0;i<16 && n<=max;i++,n++)
586 len += snprintf(page + len, count - len,
587 "%2x ",read_nic_byte(dev,0x100|n));
588
589 // printk("%2x ",read_nic_byte(dev,n));
590 }
591
592 len += snprintf(page + len, count - len,
593 "\n####################page 3##################\n ");
594 for(n=0;n<=max;)
595 {
596 //printk( "\nD: %2x> ", n);
597 len += snprintf(page + len, count - len,
598 "\nD: %2x > ",n);
599
600 for(i=0;i<16 && n<=max;i++,n++)
601 len += snprintf(page + len, count - len,
602 "%2x ",read_nic_byte(dev,0x300|n));
603
604 // printk("%2x ",read_nic_byte(dev,n));
605 }
606
607
608 *eof = 1;
609 return len;
610
611}
612
613
ecdfa446
GKH		 614
615static int proc_get_stats_tx(char *page, char **start,
616 off_t offset, int count,
617 int *eof, void *data)
618{
619 struct net_device *dev = data;
620 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
621
622 int len = 0;
623
624 len += snprintf(page + len, count - len,
625 "TX VI priority ok int: %lu\n"
626// "TX VI priority error int: %lu\n"
627 "TX VO priority ok int: %lu\n"
628// "TX VO priority error int: %lu\n"
629 "TX BE priority ok int: %lu\n"
630// "TX BE priority error int: %lu\n"
631 "TX BK priority ok int: %lu\n"
632// "TX BK priority error int: %lu\n"
633 "TX MANAGE priority ok int: %lu\n"
634// "TX MANAGE priority error int: %lu\n"
635 "TX BEACON priority ok int: %lu\n"
636 "TX BEACON priority error int: %lu\n"
637 "TX CMDPKT priority ok int: %lu\n"
638// "TX high priority ok int: %lu\n"
639// "TX high priority failed error int: %lu\n"
640// "TX queue resume: %lu\n"
641 "TX queue stopped?: %d\n"
642 "TX fifo overflow: %lu\n"
643// "TX beacon: %lu\n"
644// "TX VI queue: %d\n"
645// "TX VO queue: %d\n"
646// "TX BE queue: %d\n"
647// "TX BK queue: %d\n"
648// "TX HW queue: %d\n"
649// "TX VI dropped: %lu\n"
650// "TX VO dropped: %lu\n"
651// "TX BE dropped: %lu\n"
652// "TX BK dropped: %lu\n"
653 "TX total data packets %lu\n"
654 "TX total data bytes :%lu\n",
655// "TX beacon aborted: %lu\n",
656 priv->stats.txviokint,
657// priv->stats.txvierr,
658 priv->stats.txvookint,
659// priv->stats.txvoerr,
660 priv->stats.txbeokint,
661// priv->stats.txbeerr,
662 priv->stats.txbkokint,
663// priv->stats.txbkerr,
664 priv->stats.txmanageokint,
665// priv->stats.txmanageerr,
666 priv->stats.txbeaconokint,
667 priv->stats.txbeaconerr,
668 priv->stats.txcmdpktokint,
669// priv->stats.txhpokint,
670// priv->stats.txhperr,
671// priv->stats.txresumed,
672 netif_queue_stopped(dev),
673 priv->stats.txoverflow,
674// priv->stats.txbeacon,
675// atomic_read(&(priv->tx_pending[VI_QUEUE])),
676// atomic_read(&(priv->tx_pending[VO_QUEUE])),
677// atomic_read(&(priv->tx_pending[BE_QUEUE])),
678// atomic_read(&(priv->tx_pending[BK_QUEUE])),
679// read_nic_byte(dev, TXFIFOCOUNT),
680// priv->stats.txvidrop,
681// priv->stats.txvodrop,
682 priv->ieee80211->stats.tx_packets,
683 priv->ieee80211->stats.tx_bytes
684
685
686// priv->stats.txbedrop,
687// priv->stats.txbkdrop
688 // priv->stats.txdatapkt
689// priv->stats.txbeaconerr
690 );
691
692 *eof = 1;
693 return len;
694}
695
696
697
698static int proc_get_stats_rx(char *page, char **start,
699 off_t offset, int count,
700 int *eof, void *data)
701{
702 struct net_device *dev = data;
703 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
704
705 int len = 0;
706
707 len += snprintf(page + len, count - len,
708 "RX packets: %lu\n"
709 "RX desc err: %lu\n"
710 "RX rx overflow error: %lu\n"
711 "RX invalid urb error: %lu\n",
712 priv->stats.rxint,
713 priv->stats.rxrdu,
714 priv->stats.rxoverflow,
715 priv->stats.rxurberr);
716
717 *eof = 1;
718 return len;
719}
720
5e1ad18a 721static void rtl8192_proc_module_init(void)
ecdfa446
GKH		 722{
723 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
ecdfa446 724 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 725}
726
727
5e1ad18a 728static void rtl8192_proc_module_remove(void)
ecdfa446 729{
ecdfa446 730 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 731}
732
733
5e1ad18a 734static void rtl8192_proc_remove_one(struct net_device *dev)
ecdfa446
GKH		 735{
736 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
737
738 printk("dev name=======> %s\n",dev->name);
739
740 if (priv->dir_dev) {
741 // remove_proc_entry("stats-hw", priv->dir_dev);
742 remove_proc_entry("stats-tx", priv->dir_dev);
743 remove_proc_entry("stats-rx", priv->dir_dev);
744 // remove_proc_entry("stats-ieee", priv->dir_dev);
745 remove_proc_entry("stats-ap", priv->dir_dev);
746 remove_proc_entry("registers", priv->dir_dev);
747 // remove_proc_entry("cck-registers",priv->dir_dev);
748 // remove_proc_entry("ofdm-registers",priv->dir_dev);
749 //remove_proc_entry(dev->name, rtl8192_proc);
750 remove_proc_entry("wlan0", rtl8192_proc);
751 priv->dir_dev = NULL;
752 }
753}
754
755
5e1ad18a 756static void rtl8192_proc_init_one(struct net_device *dev)
ecdfa446
GKH		 757{
758 struct proc_dir_entry *e;
759 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
760 priv->dir_dev = create_proc_entry(dev->name,
761 S_IFDIR | S_IRUGO | S_IXUGO,
762 rtl8192_proc);
763 if (!priv->dir_dev) {
764 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
765 dev->name);
766 return;
767 }
ecdfa446
GKH		 768 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
769 priv->dir_dev, proc_get_stats_rx, dev);
770
771 if (!e) {
772 RT_TRACE(COMP_ERR,"Unable to initialize "
773 "/proc/net/rtl8192/%s/stats-rx\n",
774 dev->name);
775 }
776
777
778 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
779 priv->dir_dev, proc_get_stats_tx, dev);
780
781 if (!e) {
782 RT_TRACE(COMP_ERR, "Unable to initialize "
783 "/proc/net/rtl8192/%s/stats-tx\n",
784 dev->name);
785 }
ecdfa446
GKH		 786
787 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
788 priv->dir_dev, proc_get_stats_ap, dev);
789
790 if (!e) {
791 RT_TRACE(COMP_ERR, "Unable to initialize "
792 "/proc/net/rtl8192/%s/stats-ap\n",
793 dev->name);
794 }
795
796 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
797 priv->dir_dev, proc_get_registers, dev);
798 if (!e) {
799 RT_TRACE(COMP_ERR, "Unable to initialize "
800 "/proc/net/rtl8192/%s/registers\n",
801 dev->name);
802 }
ecdfa446
GKH		 803}
804/****************************************************************************
805 -----------------------------MISC STUFF-------------------------
806*****************************************************************************/
807
ecdfa446
GKH		 808short check_nic_enough_desc(struct net_device *dev, int prio)
809{
810 struct r8192_priv *priv = ieee80211_priv(dev);
811 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
812
813 /* for now we reserve two free descriptor as a safety boundary
814 * between the tail and the head
815 */
285f660c 816 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
ecdfa446
GKH		 817}
818
5e1ad18a 819static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 820{
821 struct r8192_priv *priv = ieee80211_priv(dev);
822 //rtl8192_commit(dev);
823
ecdfa446 824 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 825 printk("TXTIMEOUT");
826}
827
828
ecdfa446
GKH		 829/****************************************************************************
830 ------------------------------HW STUFF---------------------------
831*****************************************************************************/
832
833
5e1ad18a 834static void rtl8192_irq_enable(struct net_device *dev)
ecdfa446
GKH		 835{
836 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
837 priv->irq_enabled = 1;
838 write_nic_dword(dev,INTA_MASK, priv->irq_mask);
839}
840
841
65a43784 842void rtl8192_irq_disable(struct net_device *dev)
ecdfa446
GKH		 843{
844 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
845
846 write_nic_dword(dev,INTA_MASK,0);
847 force_pci_posting(dev);
848 priv->irq_enabled = 0;
849}
850
851
65a43784 852#if 0
5e1ad18a 853static void rtl8192_set_mode(struct net_device *dev,int mode)
ecdfa446
GKH		 854{
855 u8 ecmd;
856 ecmd=read_nic_byte(dev, EPROM_CMD);
857 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
858 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
859 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
860 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
861 write_nic_byte(dev, EPROM_CMD, ecmd);
862}
65a43784 863#endif
ecdfa446
GKH		 864
865void rtl8192_update_msr(struct net_device *dev)
866{
867 struct r8192_priv *priv = ieee80211_priv(dev);
868 u8 msr;
869
870 msr = read_nic_byte(dev, MSR);
871 msr &= ~ MSR_LINK_MASK;
872
873 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
874 * msr must be updated if the state is ASSOCIATING.
875 * this is intentional and make sense for ad-hoc and
876 * master (see the create BSS/IBSS func)
877 */
878 if (priv->ieee80211->state == IEEE80211_LINKED){
879
880 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
881 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
882 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
883 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
884 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
885 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
886
887 }else
888 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
889
890 write_nic_byte(dev, MSR, msr);
891}
892
893void rtl8192_set_chan(struct net_device *dev,short ch)
894{
895 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
896 RT_TRACE(COMP_RF, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
897 priv->chan=ch;
898#if 0
899 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC ||
900 priv->ieee80211->iw_mode == IW_MODE_MASTER){
901
902 priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;
903 priv->ieee80211->master_chan = ch;
904 rtl8192_update_beacon_ch(dev);
905 }
906#endif
907
908 /* this hack should avoid frame TX during channel setting*/
909
910
911 // tx = read_nic_dword(dev,TX_CONF);
912 // tx &= ~TX_LOOPBACK_MASK;
913
914#ifndef LOOP_TEST
915 //TODO
916 // write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
917
918 //need to implement rf set channel here WB
919
920 if (priv->rf_set_chan)
921 priv->rf_set_chan(dev,priv->chan);
922 // mdelay(10);
923 // write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
924#endif
925}
926
927void rtl8192_rx_enable(struct net_device *dev)
928{
929 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
930 write_nic_dword(dev, RDQDA,priv->rx_ring_dma);
931}
932
933/* the TX_DESC_BASE setting is according to the following queue index
934 * BK_QUEUE ===> 0
935 * BE_QUEUE ===> 1
936 * VI_QUEUE ===> 2
937 * VO_QUEUE ===> 3
938 * HCCA_QUEUE ===> 4
939 * TXCMD_QUEUE ===> 5
940 * MGNT_QUEUE ===> 6
941 * HIGH_QUEUE ===> 7
942 * BEACON_QUEUE ===> 8
943 * */
881a975b 944static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
ecdfa446
GKH		 945void rtl8192_tx_enable(struct net_device *dev)
946{
947 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
948 u32 i;
949 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
950 write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
951
952 ieee80211_reset_queue(priv->ieee80211);
953}
954
ecdfa446
GKH		 955
956static void rtl8192_free_rx_ring(struct net_device *dev)
957{
958 struct r8192_priv *priv = ieee80211_priv(dev);
959 int i;
960
961 for (i = 0; i < priv->rxringcount; i++) {
962 struct sk_buff *skb = priv->rx_buf[i];
963 if (!skb)
964 continue;
965
966 pci_unmap_single(priv->pdev,
967 *((dma_addr_t *)skb->cb),
968 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
969 kfree_skb(skb);
970 }
971
972 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
973 priv->rx_ring, priv->rx_ring_dma);
974 priv->rx_ring = NULL;
975}
976
977static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
978{
979 struct r8192_priv *priv = ieee80211_priv(dev);
980 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
981
982 while (skb_queue_len(&ring->queue)) {
983 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
984 struct sk_buff *skb = __skb_dequeue(&ring->queue);
985
986 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
987 skb->len, PCI_DMA_TODEVICE);
988 kfree_skb(skb);
989 ring->idx = (ring->idx + 1) % ring->entries;
990 }
991
992 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
993 ring->desc, ring->dma);
994 ring->desc = NULL;
995}
996
65a43784 997#if 0
5e1ad18a 998static void rtl8192_beacon_disable(struct net_device *dev)
ecdfa446
GKH		 999{
1000 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1001 u32 reg;
1002
1003 reg = read_nic_dword(priv->ieee80211->dev,INTA_MASK);
1004
1005 /* disable Beacon realted interrupt signal */
1006 reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
1007 write_nic_dword(priv->ieee80211->dev, INTA_MASK, reg);
1008}
65a43784 1009#endif
1010
1011void PHY_SetRtl8192eRfOff(struct net_device* dev )
1012{
1013 //struct r8192_priv *priv = ieee80211_priv(dev);
1014
1015 //disable RF-Chip A/B
1016 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
1017 //analog to digital off, for power save
1018 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
1019 //digital to analog off, for power save
1020 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
1021 //rx antenna off
1022 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
1023 //rx antenna off
1024 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
1025 //analog to digital part2 off, for power save
1026 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
1027 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
1028 // Analog parameter!!Change bias and Lbus control.
1029 write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07);
1030
1031}
ecdfa446 1032
65a43784 1033void rtl8192_halt_adapter(struct net_device *dev, bool reset)
ecdfa446 1034{
65a43784 1035 //u8 cmd;
ecdfa446 1036 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 1037 int i;
1038 u8 OpMode;
1039 u8 u1bTmp;
1040 u32 ulRegRead;
1041
1042 OpMode = RT_OP_MODE_NO_LINK;
1043 priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
ecdfa446 1044
65a43784 1045#if 1
1046 if(!priv->ieee80211->bSupportRemoteWakeUp)
1047 {
1048 u1bTmp = 0x0; // disable tx/rx. In 8185 we write 0x10 (Reset bit), but here we make reference to WMAC and wirte 0x0. 2006.11.21 Emily
1049 //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_COMMAND, &u1bTmp ); // Using HW_VAR_COMMAND instead of writing CMDR directly. Rewrited by Annie, 2006-04-07.
1050 write_nic_byte(dev, CMDR, u1bTmp);
1051 }
1052#else
ecdfa446 1053 cmd=read_nic_byte(dev,CMDR);
65a43784 1054 write_nic_byte(dev, CMDR, cmd &~ (CR_TE|CR_RE));
1055#endif
ecdfa446 1056
65a43784 1057 mdelay(20);
ecdfa446 1058
65a43784 1059 if(!reset)
1060 {
1061 //PlatformStallExecution(150000);
1062 mdelay(150);
1063
1064#ifdef RTL8192E
1065 priv->bHwRfOffAction = 2;
1066#endif
1067
1068 //
1069 // Call MgntActSet_RF_State instead to prevent RF config race condition.
1070 // By Bruce, 2008-01-17.
1071 //
1072 if(!priv->ieee80211->bSupportRemoteWakeUp)
1073 {
1074 //MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_INIT);
1075 //MgntActSet_RF_State(Adapter, eRfOff, Adapter->MgntInfo.RfOffReason);
1076 //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P)
1077
1078 PHY_SetRtl8192eRfOff(dev);
1079
1080 // 2006.11.30. System reset bit
1081 //priv->ieee80211->GetHwRegHandler(dev, HW_VAR_CPU_RST, (u32*)(&ulRegRead) );
1082 ulRegRead = read_nic_dword(dev,CPU_GEN);
1083 ulRegRead|=CPU_GEN_SYSTEM_RESET;
1084 //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_CPU_RST, &ulRegRead);
1085 write_nic_dword(dev,CPU_GEN, ulRegRead);
1086 }
1087 else
1088 {
1089 //2008.06.03 for WOL
1090 write_nic_dword(dev, WFCRC0, 0xffffffff);
1091 write_nic_dword(dev, WFCRC1, 0xffffffff);
1092 write_nic_dword(dev, WFCRC2, 0xffffffff);
1093
1094 //Write PMR register
1095 write_nic_byte(dev, PMR, 0x5);
1096 //Disable tx, enanble rx
1097 write_nic_byte(dev, MacBlkCtrl, 0xa);
1098 }
1099 }
1100
1101 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1102 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
1103 }
1104 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1105 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
1106 }
ecdfa446
GKH		 1107
1108 skb_queue_purge(&priv->skb_queue);
1109 return;
1110}
1111
65a43784 1112#if 0
5e1ad18a 1113static void rtl8192_reset(struct net_device *dev)
ecdfa446
GKH		 1114{
1115 rtl8192_irq_disable(dev);
1116 printk("This is RTL819xP Reset procedure\n");
1117}
65a43784 1118#endif
ecdfa446 1119
881a975b 1120static const u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
ecdfa446
GKH		 1121inline u16 rtl8192_rate2rate(short rate)
1122{
1123 if (rate >11) return 0;
1124 return rtl_rate[rate];
1125}
1126
1127
1128
ecdfa446 1129
5e1ad18a 1130static void rtl8192_data_hard_stop(struct net_device *dev)
ecdfa446
GKH		 1131{
1132 //FIXME !!
1133 #if 0
1134 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1135 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
1136 rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
1137 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1138 rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
1139 #endif
1140}
1141
1142
5e1ad18a 1143static void rtl8192_data_hard_resume(struct net_device *dev)
ecdfa446
GKH		 1144{
1145 // FIXME !!
1146 #if 0
1147 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1148 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
1149 rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
1150 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1151 rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
1152 #endif
1153}
1154
1155/* this function TX data frames when the ieee80211 stack requires this.
1156 * It checks also if we need to stop the ieee tx queue, eventually do it
1157 */
5e1ad18a 1158static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
ecdfa446
GKH		 1159{
1160 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1161 int ret;
1162 //unsigned long flags;
1163 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1164 u8 queue_index = tcb_desc->queue_index;
1165 /* shall not be referred by command packet */
1166 assert(queue_index != TXCMD_QUEUE);
1167
65a43784 1168 if((priv->bHwRadioOff == true)||(!priv->up))
1169 {
1170 kfree_skb(skb);
1171 return;
1172 }
1173
ecdfa446
GKH		 1174 //spin_lock_irqsave(&priv->tx_lock,flags);
1175
1176 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1177#if 0
1178 tcb_desc->RATRIndex = 7;
1179 tcb_desc->bTxDisableRateFallBack = 1;
1180 tcb_desc->bTxUseDriverAssingedRate = 1;
1181 tcb_desc->bTxEnableFwCalcDur = 1;
1182#endif
1183 skb_push(skb, priv->ieee80211->tx_headroom);
1184 ret = rtl8192_tx(dev, skb);
1185 if(ret != 0) {
1186 kfree_skb(skb);
1187 };
1188
1189//
1190 if(queue_index!=MGNT_QUEUE) {
1191 priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1192 priv->ieee80211->stats.tx_packets++;
1193 }
1194
1195 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1196
1197// return ret;
ecdfa446
GKH		 1198}
1199
1200/* This is a rough attempt to TX a frame
1201 * This is called by the ieee 80211 stack to TX management frames.
1202 * If the ring is full packet are dropped (for data frame the queue
1203 * is stopped before this can happen).
1204 */
5e1ad18a 1205static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
ecdfa446
GKH		 1206{
1207 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1208
1209
1210 int ret;
1211 //unsigned long flags;
1212 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1213 u8 queue_index = tcb_desc->queue_index;
1214
65a43784 1215 if(queue_index != TXCMD_QUEUE){
1216 if((priv->bHwRadioOff == true)||(!priv->up))
1217 {
1218 kfree_skb(skb);
1219 return 0;
1220 }
1221 }
ecdfa446
GKH		 1222
1223 //spin_lock_irqsave(&priv->tx_lock,flags);
1224
1225 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1226 if(queue_index == TXCMD_QUEUE) {
1227 // skb_push(skb, USB_HWDESC_HEADER_LEN);
1228 rtl819xE_tx_cmd(dev, skb);
1229 ret = 0;
1230 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1231 return ret;
1232 } else {
1233 // RT_TRACE(COMP_SEND, "To send management packet\n");
1234 tcb_desc->RATRIndex = 7;
1235 tcb_desc->bTxDisableRateFallBack = 1;
1236 tcb_desc->bTxUseDriverAssingedRate = 1;
1237 tcb_desc->bTxEnableFwCalcDur = 1;
1238 skb_push(skb, priv->ieee80211->tx_headroom);
1239 ret = rtl8192_tx(dev, skb);
1240 if(ret != 0) {
1241 kfree_skb(skb);
1242 };
1243 }
1244
1245// priv->ieee80211->stats.tx_bytes+=skb->len;
1246// priv->ieee80211->stats.tx_packets++;
1247
1248 //spin_unlock_irqrestore(&priv->tx_lock,flags);
1249
1250 return ret;
1251
1252}
1253
1254
5e1ad18a 1255static void rtl8192_tx_isr(struct net_device *dev, int prio)
ecdfa446
GKH		 1256{
1257 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1258
1259 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
1260
1261 while (skb_queue_len(&ring->queue)) {
1262 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1263 struct sk_buff *skb;
1264
bbc9a991 1265 /* beacon packet will only use the first descriptor defaultly,
ecdfa446
GKH		 1266 * and the OWN may not be cleared by the hardware
1267 * */
1268 if(prio != BEACON_QUEUE) {
1269 if(entry->OWN)
1270 return;
1271 ring->idx = (ring->idx + 1) % ring->entries;
1272 }
1273
1274 skb = __skb_dequeue(&ring->queue);
1275 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1276 skb->len, PCI_DMA_TODEVICE);
1277
1278 kfree_skb(skb);
1279 }
1280 if (prio == MGNT_QUEUE){
1281 if (priv->ieee80211->ack_tx_to_ieee){
1282 if (rtl8192_is_tx_queue_empty(dev)){
1283 priv->ieee80211->ack_tx_to_ieee = 0;
1284 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1285 }
1286 }
1287 }
1288
1289 if(prio != BEACON_QUEUE) {
1290 /* try to deal with the pending packets */
1291 tasklet_schedule(&priv->irq_tx_tasklet);
1292 }
1293
1294}
1295
5e1ad18a 1296static void rtl8192_stop_beacon(struct net_device *dev)
ecdfa446
GKH		 1297{
1298 //rtl8192_beacon_disable(dev);
1299}
1300
5e1ad18a 1301static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
ecdfa446
GKH		 1302{
1303 struct r8192_priv *priv = ieee80211_priv(dev);
1304 struct ieee80211_network *net;
1305 u8 i=0, basic_rate = 0;
1306 net = & priv->ieee80211->current_network;
1307
1308 for (i=0; i<net->rates_len; i++)
1309 {
1310 basic_rate = net->rates[i]&0x7f;
1311 switch(basic_rate)
1312 {
1313 case MGN_1M: *rate_config |= RRSR_1M; break;
1314 case MGN_2M: *rate_config |= RRSR_2M; break;
1315 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1316 case MGN_11M: *rate_config |= RRSR_11M; break;
1317 case MGN_6M: *rate_config |= RRSR_6M; break;
1318 case MGN_9M: *rate_config |= RRSR_9M; break;
1319 case MGN_12M: *rate_config |= RRSR_12M; break;
1320 case MGN_18M: *rate_config |= RRSR_18M; break;
1321 case MGN_24M: *rate_config |= RRSR_24M; break;
1322 case MGN_36M: *rate_config |= RRSR_36M; break;
1323 case MGN_48M: *rate_config |= RRSR_48M; break;
1324 case MGN_54M: *rate_config |= RRSR_54M; break;
1325 }
1326 }
1327 for (i=0; i<net->rates_ex_len; i++)
1328 {
1329 basic_rate = net->rates_ex[i]&0x7f;
1330 switch(basic_rate)
1331 {
1332 case MGN_1M: *rate_config |= RRSR_1M; break;
1333 case MGN_2M: *rate_config |= RRSR_2M; break;
1334 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1335 case MGN_11M: *rate_config |= RRSR_11M; break;
1336 case MGN_6M: *rate_config |= RRSR_6M; break;
1337 case MGN_9M: *rate_config |= RRSR_9M; break;
1338 case MGN_12M: *rate_config |= RRSR_12M; break;
1339 case MGN_18M: *rate_config |= RRSR_18M; break;
1340 case MGN_24M: *rate_config |= RRSR_24M; break;
1341 case MGN_36M: *rate_config |= RRSR_36M; break;
1342 case MGN_48M: *rate_config |= RRSR_48M; break;
1343 case MGN_54M: *rate_config |= RRSR_54M; break;
1344 }
1345 }
1346}
1347
1348
1349#define SHORT_SLOT_TIME 9
1350#define NON_SHORT_SLOT_TIME 20
1351
5e1ad18a 1352static void rtl8192_update_cap(struct net_device* dev, u16 cap)
ecdfa446
GKH		 1353{
1354 u32 tmp = 0;
1355 struct r8192_priv *priv = ieee80211_priv(dev);
1356 struct ieee80211_network *net = &priv->ieee80211->current_network;
1357 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1358 tmp = priv->basic_rate;
1359 if (priv->short_preamble)
1360 tmp |= BRSR_AckShortPmb;
1361 write_nic_dword(dev, RRSR, tmp);
1362
1363 if (net->mode & (IEEE_G|IEEE_N_24G))
1364 {
1365 u8 slot_time = 0;
1366 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1367 {//short slot time
1368 slot_time = SHORT_SLOT_TIME;
1369 }
1370 else //long slot time
1371 slot_time = NON_SHORT_SLOT_TIME;
1372 priv->slot_time = slot_time;
1373 write_nic_byte(dev, SLOT_TIME, slot_time);
1374 }
1375
1376}
5e1ad18a
GKH		 1377
1378static void rtl8192_net_update(struct net_device *dev)
ecdfa446
GKH		 1379{
1380
1381 struct r8192_priv *priv = ieee80211_priv(dev);
1382 struct ieee80211_network *net;
1383 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1384 u16 rate_config = 0;
1385 net = &priv->ieee80211->current_network;
1386 //update Basic rate: RR, BRSR
1387 rtl8192_config_rate(dev, &rate_config);
1388 // 2007.01.16, by Emily
1389 // Select RRSR (in Legacy-OFDM and CCK)
1390 // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
1391 // We do not use other rates.
1392 priv->basic_rate = rate_config &= 0x15f;
1393 //BSSID
1394 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1395 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1396#if 0
1397 //MSR
1398 rtl8192_update_msr(dev);
1399#endif
1400
1401
1402// rtl8192_update_cap(dev, net->capability);
1403 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1404 {
1405 write_nic_word(dev, ATIMWND, 2);
1406 write_nic_word(dev, BCN_DMATIME, 256);
1407 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1408 // write_nic_word(dev, BcnIntTime, 100);
1409 //BIT15 of BCN_DRV_EARLY_INT will indicate whether software beacon or hw beacon is applied.
1410 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
1411 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1412
1413 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1414 // TODO: BcnIFS may required to be changed on ASIC
1415 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1416
1417 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1418 }
1419
1420
1421}
1422
ecdfa446
GKH		 1423void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1424{
1425 struct r8192_priv *priv = ieee80211_priv(dev);
1426 struct rtl8192_tx_ring *ring;
1427 tx_desc_819x_pci *entry;
1428 unsigned int idx;
1429 dma_addr_t mapping;
1430 cb_desc *tcb_desc;
1431 unsigned long flags;
1432
1433 ring = &priv->tx_ring[TXCMD_QUEUE];
1434 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1435
1436 spin_lock_irqsave(&priv->irq_th_lock,flags);
1437 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1438 entry = &ring->desc[idx];
1439
1440 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1441 memset(entry,0,12);
1442 entry->LINIP = tcb_desc->bLastIniPkt;
1443 entry->FirstSeg = 1;//first segment
1444 entry->LastSeg = 1; //last segment
1445 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1446 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1447 } else {
1448 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1449 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1450 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1451 entry->QueueSelect = QSLT_CMD;
1452 entry->TxFWInfoSize = 0x08;
1453 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1454 }
1455 entry->TxBufferSize = skb->len;
1456 entry->TxBuffAddr = cpu_to_le32(mapping);
1457 entry->OWN = 1;
1458
1459#ifdef JOHN_DUMP_TXDESC
1460 { int i;
1461 tx_desc_819x_pci *entry1 = &ring->desc[0];
1462 unsigned int *ptr= (unsigned int *)entry1;
1463 printk("<Tx descriptor>:\n");
1464 for (i = 0; i < 8; i++)
1465 printk("%8x ", ptr[i]);
1466 printk("\n");
1467 }
1468#endif
1469 __skb_queue_tail(&ring->queue, skb);
1470 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1471
1472 write_nic_byte(dev, TPPoll, TPPoll_CQ);
1473
1474 return;
1475}
1476
1477/*
1478 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1479 * in TxFwInfo data structure
1480 * 2006.10.30 by Emily
1481 *
1482 * \param QUEUEID Software Queue
1483*/
5e1ad18a 1484static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446
GKH		 1485{
1486 u8 QueueSelect = 0x0; //defualt set to
1487
1488 switch(QueueID) {
1489 case BE_QUEUE:
1490 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
1491 break;
1492
1493 case BK_QUEUE:
1494 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
1495 break;
1496
1497 case VO_QUEUE:
1498 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
1499 break;
1500
1501 case VI_QUEUE:
1502 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
1503 break;
1504 case MGNT_QUEUE:
1505 QueueSelect = QSLT_MGNT;
1506 break;
1507
1508 case BEACON_QUEUE:
1509 QueueSelect = QSLT_BEACON;
1510 break;
1511
1512 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
1513 // TODO: Remove Assertions
1514//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
1515 case TXCMD_QUEUE:
1516 QueueSelect = QSLT_CMD;
1517 break;
1518//#endif
1519 case HIGH_QUEUE:
1520 //QueueSelect = QSLT_HIGH;
1521 //break;
1522
1523 default:
1524 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
1525 break;
1526 }
1527 return QueueSelect;
1528}
1529
5e1ad18a 1530static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1531{
1532 u8 ret = DESC90_RATE1M;
1533
1534 switch(rate) {
1535 case MGN_1M: ret = DESC90_RATE1M; break;
1536 case MGN_2M: ret = DESC90_RATE2M; break;
1537 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1538 case MGN_11M: ret = DESC90_RATE11M; break;
1539 case MGN_6M: ret = DESC90_RATE6M; break;
1540 case MGN_9M: ret = DESC90_RATE9M; break;
1541 case MGN_12M: ret = DESC90_RATE12M; break;
1542 case MGN_18M: ret = DESC90_RATE18M; break;
1543 case MGN_24M: ret = DESC90_RATE24M; break;
1544 case MGN_36M: ret = DESC90_RATE36M; break;
1545 case MGN_48M: ret = DESC90_RATE48M; break;
1546 case MGN_54M: ret = DESC90_RATE54M; break;
1547
1548 // HT rate since here
1549 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1550 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1551 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1552 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1553 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1554 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1555 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1556 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1557 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1558 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1559 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1560 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1561 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1562 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1563 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1564 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1565 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1566
1567 default: break;
1568 }
1569 return ret;
1570}
1571
1572
5e1ad18a 1573static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1574{
1575 u8 tmp_Short;
1576
1577 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1578
1579 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1580 tmp_Short = 0;
1581
1582 return tmp_Short;
1583}
1584
1585/*
1586 * The tx procedure is just as following,
1587 * skb->cb will contain all the following information,
1588 * priority, morefrag, rate, &dev.
1589 * */
1590short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
1591{
1592 struct r8192_priv *priv = ieee80211_priv(dev);
1593 struct rtl8192_tx_ring *ring;
1594 unsigned long flags;
1595 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1596 tx_desc_819x_pci *pdesc = NULL;
1597 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1598 dma_addr_t mapping;
1599 bool multi_addr=false,broad_addr=false,uni_addr=false;
1600 u8* pda_addr = NULL;
1601 int idx;
1602
65a43784 1603 if(priv->bdisable_nic){
1604 RT_TRACE(COMP_ERR,"%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n", __FUNCTION__, skb->len, tcb_desc->queue_index);
1605 return skb->len;
1606 }
1607
1608#ifdef ENABLE_LPS
1609 priv->ieee80211->bAwakePktSent = true;
1610#endif
1611
ecdfa446
GKH		 1612 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1613 /* collect the tx packets statitcs */
1614 pda_addr = ((u8*)skb->data) + sizeof(TX_FWINFO_8190PCI);
1615 if(is_multicast_ether_addr(pda_addr))
1616 multi_addr = true;
1617 else if(is_broadcast_ether_addr(pda_addr))
1618 broad_addr = true;
1619 else
1620 uni_addr = true;
1621
1622 if(uni_addr)
1623 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1624 else if(multi_addr)
1625 priv->stats.txbytesmulticast +=(u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1626 else
1627 priv->stats.txbytesbroadcast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1628
1629 /* fill tx firmware */
1630 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1631 memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
1632 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
1633 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1634 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1635 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1636
1637 /* Aggregation related */
1638 if(tcb_desc->bAMPDUEnable) {
1639 pTxFwInfo->AllowAggregation = 1;
1640 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1641 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1642 } else {
1643 pTxFwInfo->AllowAggregation = 0;
1644 pTxFwInfo->RxMF = 0;
1645 pTxFwInfo->RxAMD = 0;
1646 }
1647
1648 //
1649 // Protection mode related
1650 //
1651 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
1652 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
1653 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
1654 pTxFwInfo->RtsHT= (tcb_desc->rts_rate&0x80)?1:0;
1655 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1656 pTxFwInfo->RtsBandwidth = 0;
1657 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1658 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):(tcb_desc->bRTSUseShortGI?1:0);
1659 //
1660 // Set Bandwidth and sub-channel settings.
1661 //
1662 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
1663 {
1664 if(tcb_desc->bPacketBW)
1665 {
1666 pTxFwInfo->TxBandwidth = 1;
1667#ifdef RTL8190P
1668 pTxFwInfo->TxSubCarrier = 3;
1669#else
1670 pTxFwInfo->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode, cosa 04012008
1671#endif
1672 }
1673 else
1674 {
1675 pTxFwInfo->TxBandwidth = 0;
1676 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1677 }
1678 } else {
1679 pTxFwInfo->TxBandwidth = 0;
1680 pTxFwInfo->TxSubCarrier = 0;
1681 }
1682
1683 if (0)
1684 {
1685 /* 2007/07/25 MH Copy current TX FW info.*/
1686 memcpy((void*)(&Tmp_TxFwInfo), (void*)(pTxFwInfo), sizeof(TX_FWINFO_8190PCI));
1687 printk("&&&&&&&&&&&&&&&&&&&&&&====>print out fwinf\n");
1688 printk("===>enable fwcacl:%d\n", Tmp_TxFwInfo.EnableCPUDur);
1689 printk("===>RTS STBC:%d\n", Tmp_TxFwInfo.RtsSTBC);
1690 printk("===>RTS Subcarrier:%d\n", Tmp_TxFwInfo.RtsSubcarrier);
1691 printk("===>Allow Aggregation:%d\n", Tmp_TxFwInfo.AllowAggregation);
1692 printk("===>TX HT bit:%d\n", Tmp_TxFwInfo.TxHT);
1693 printk("===>Tx rate:%d\n", Tmp_TxFwInfo.TxRate);
1694 printk("===>Received AMPDU Density:%d\n", Tmp_TxFwInfo.RxAMD);
1695 printk("===>Received MPDU Factor:%d\n", Tmp_TxFwInfo.RxMF);
1696 printk("===>TxBandwidth:%d\n", Tmp_TxFwInfo.TxBandwidth);
1697 printk("===>TxSubCarrier:%d\n", Tmp_TxFwInfo.TxSubCarrier);
1698
1699 printk("<=====**********************out of print\n");
1700
1701 }
1702 spin_lock_irqsave(&priv->irq_th_lock,flags);
1703 ring = &priv->tx_ring[tcb_desc->queue_index];
1704 if (tcb_desc->queue_index != BEACON_QUEUE) {
1705 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1706 } else {
1707 idx = 0;
1708 }
1709
1710 pdesc = &ring->desc[idx];
1711 if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
207b58fb 1712 RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d,%x",
ecdfa446 1713 tcb_desc->queue_index,ring->idx, idx,skb->len);
65a43784 1714 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446
GKH		 1715 return skb->len;
1716 }
1717
1718 /* fill tx descriptor */
1719 memset((u8*)pdesc,0,12);
1720 /*DWORD 0*/
1721 pdesc->LINIP = 0;
1722 pdesc->CmdInit = 1;
1723 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; //We must add 8!! Emily
1724 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1725
1726 /*DWORD 1*/
1727 pdesc->SecCAMID= 0;
1728 pdesc->RATid = tcb_desc->RATRIndex;
1729
1730
1731 pdesc->NoEnc = 1;
1732 pdesc->SecType = 0x0;
1733 if (tcb_desc->bHwSec) {
ecdfa446
GKH		 1734 switch (priv->ieee80211->pairwise_key_type) {
1735 case KEY_TYPE_WEP40:
1736 case KEY_TYPE_WEP104:
1737 pdesc->SecType = 0x1;
1738 pdesc->NoEnc = 0;
1739 break;
1740 case KEY_TYPE_TKIP:
1741 pdesc->SecType = 0x2;
1742 pdesc->NoEnc = 0;
1743 break;
1744 case KEY_TYPE_CCMP:
1745 pdesc->SecType = 0x3;
1746 pdesc->NoEnc = 0;
1747 break;
1748 case KEY_TYPE_NA:
1749 pdesc->SecType = 0x0;
1750 pdesc->NoEnc = 1;
1751 break;
1752 }
1753 }
1754
1755 //
1756 // Set Packet ID
1757 //
1758 pdesc->PktId = 0x0;
1759
1760 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1761 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1762
1763 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1764 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
1765
1766 pdesc->FirstSeg =1;
1767 pdesc->LastSeg = 1;
1768 pdesc->TxBufferSize = skb->len;
1769
1770 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1771 __skb_queue_tail(&ring->queue, skb);
1772 pdesc->OWN = 1;
1773 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1774 dev->trans_start = jiffies;
1775 write_nic_word(dev,TPPoll,0x01<<tcb_desc->queue_index);
1776 return 0;
1777}
1778
5e1ad18a 1779static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
ecdfa446
GKH		 1780{
1781 struct r8192_priv *priv = ieee80211_priv(dev);
1782 rx_desc_819x_pci *entry = NULL;
1783 int i;
1784
1785 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1786 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1787
1788 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1789 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1790 return -ENOMEM;
1791 }
1792
1793 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1794 priv->rx_idx = 0;
1795
1796 for (i = 0; i < priv->rxringcount; i++) {
1797 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1798 dma_addr_t *mapping;
1799 entry = &priv->rx_ring[i];
1800 if (!skb)
1801 return 0;
1802 priv->rx_buf[i] = skb;
1803 mapping = (dma_addr_t *)skb->cb;
1c7ec2e8 1804 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
ecdfa446
GKH		 1805 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1806
1807 entry->BufferAddress = cpu_to_le32(*mapping);
1808
1809 entry->Length = priv->rxbuffersize;
1810 entry->OWN = 1;
1811 }
1812
1813 entry->EOR = 1;
1814 return 0;
1815}
1816
1817static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
1818 unsigned int prio, unsigned int entries)
1819{
1820 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1821 tx_desc_819x_pci *ring;
1822 dma_addr_t dma;
1823 int i;
1824
1825 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1826 if (!ring || (unsigned long)ring & 0xFF) {
1827 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1828 return -ENOMEM;
1829 }
1830
1831 memset(ring, 0, sizeof(*ring)*entries);
1832 priv->tx_ring[prio].desc = ring;
1833 priv->tx_ring[prio].dma = dma;
1834 priv->tx_ring[prio].idx = 0;
1835 priv->tx_ring[prio].entries = entries;
1836 skb_queue_head_init(&priv->tx_ring[prio].queue);
1837
1838 for (i = 0; i < entries; i++)
1839 ring[i].NextDescAddress =
1840 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1841
1842 return 0;
1843}
1844
1845
5e1ad18a 1846static short rtl8192_pci_initdescring(struct net_device *dev)
ecdfa446
GKH		 1847{
1848 u32 ret;
1849 int i;
1850 struct r8192_priv *priv = ieee80211_priv(dev);
1851
1852 ret = rtl8192_alloc_rx_desc_ring(dev);
1853 if (ret) {
1854 return ret;
1855 }
1856
1857
1858 /* general process for other queue */
1859 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
d6d42dfb
JP		 1860 ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount);
1861 if (ret)
ecdfa446
GKH		 1862 goto err_free_rings;
1863 }
1864
1865#if 0
1866 /* specific process for hardware beacon process */
d6d42dfb
JP		 1867 ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2);
1868 if (ret)
ecdfa446
GKH		 1869 goto err_free_rings;
1870#endif
1871
1872 return 0;
1873
1874err_free_rings:
1875 rtl8192_free_rx_ring(dev);
1876 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1877 if (priv->tx_ring[i].desc)
1878 rtl8192_free_tx_ring(dev, i);
1879 return 1;
1880}
1881
5e1ad18a 1882static void rtl8192_pci_resetdescring(struct net_device *dev)
ecdfa446
GKH		 1883{
1884 struct r8192_priv *priv = ieee80211_priv(dev);
1885 int i;
1886
1887 /* force the rx_idx to the first one */
1888 if(priv->rx_ring) {
1889 rx_desc_819x_pci *entry = NULL;
1890 for (i = 0; i < priv->rxringcount; i++) {
1891 entry = &priv->rx_ring[i];
1892 entry->OWN = 1;
1893 }
1894 priv->rx_idx = 0;
1895 }
1896
1897 /* after reset, release previous pending packet, and force the
1898 * tx idx to the first one */
1899 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1900 if (priv->tx_ring[i].desc) {
1901 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1902
1903 while (skb_queue_len(&ring->queue)) {
1904 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1905 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1906
1907 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1908 skb->len, PCI_DMA_TODEVICE);
1909 kfree_skb(skb);
1910 ring->idx = (ring->idx + 1) % ring->entries;
1911 }
1912 ring->idx = 0;
1913 }
1914 }
1915}
1916
1917#if 1
5e1ad18a 1918static void rtl8192_link_change(struct net_device *dev)
ecdfa446
GKH		 1919{
1920// int i;
1921
1922 struct r8192_priv *priv = ieee80211_priv(dev);
1923 struct ieee80211_device* ieee = priv->ieee80211;
1924 //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval);
1925 if (ieee->state == IEEE80211_LINKED)
1926 {
1927 rtl8192_net_update(dev);
1928 rtl8192_update_ratr_table(dev);
1929#if 1
1930 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1931 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1932 EnableHWSecurityConfig8192(dev);
1933#endif
1934 }
1935 else
1936 {
1937 write_nic_byte(dev, 0x173, 0);
1938 }
1939 /*update timing params*/
1940 //rtl8192_set_chan(dev, priv->chan);
1941 //MSR
1942 rtl8192_update_msr(dev);
1943
1944 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1945 // // To set CBSSID bit when link with any AP or STA.
1946 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1947 {
1948 u32 reg = 0;
1949 reg = read_nic_dword(dev, RCR);
1950 if (priv->ieee80211->state == IEEE80211_LINKED)
1951 priv->ReceiveConfig = reg |= RCR_CBSSID;
1952 else
1953 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1954 write_nic_dword(dev, RCR, reg);
1955 }
1956}
1957#endif
1958
1959
5b3b1a7b 1960static const struct ieee80211_qos_parameters def_qos_parameters = {
ecdfa446
GKH		 1961 {3,3,3,3},/* cw_min */
1962 {7,7,7,7},/* cw_max */
1963 {2,2,2,2},/* aifs */
1964 {0,0,0,0},/* flags */
1965 {0,0,0,0} /* tx_op_limit */
1966};
1967
5e1ad18a 1968static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1969{
1970 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1971 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1972 struct ieee80211_device* ieee = priv->ieee80211;
1973 struct ieee80211_network* net = &ieee->current_network;
1974
1975 if (ieee->pHTInfo->bCurrentHTSupport)
1976 HTUpdateSelfAndPeerSetting(ieee, net);
1977 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1978 rtl8192_update_cap(dev, net->capability);
1979}
1980/*
1981* background support to run QoS activate functionality
1982*/
881a975b 1983static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1984static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1985{
1986 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
1987 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1988 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1989 u8 mode = priv->ieee80211->current_network.mode;
1990// u32 size = sizeof(struct ieee80211_qos_parameters);
1991 u8 u1bAIFS;
1992 u32 u4bAcParam;
1993 int i;
ecdfa446 1994
ecdfa446 1995 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1996 if(priv->ieee80211->state != IEEE80211_LINKED)
1997 goto success;
1998 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1999 /* It better set slot time at first */
2000 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2001 /* update the ac parameter to related registers */
2002 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2003 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2004 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2005 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2006 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2007 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2008 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
65a43784 2009 //printk("===>u4bAcParam:%x, ", u4bAcParam);
ecdfa446
GKH		 2010 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2011 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
2012 }
2013
2014success:
ecdfa446 2015 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 2016}
2017
2018static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2019 int active_network,
2020 struct ieee80211_network *network)
2021{
2022 int ret = 0;
2023 u32 size = sizeof(struct ieee80211_qos_parameters);
2024
2025 if(priv->ieee80211->state !=IEEE80211_LINKED)
2026 return ret;
2027
2028 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2029 return ret;
2030
2031 if (network->flags & NETWORK_HAS_QOS_MASK) {
2032 if (active_network &&
2033 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2034 network->qos_data.active = network->qos_data.supported;
2035
2036 if ((network->qos_data.active == 1) && (active_network == 1) &&
2037 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2038 (network->qos_data.old_param_count !=
2039 network->qos_data.param_count)) {
2040 network->qos_data.old_param_count =
2041 network->qos_data.param_count;
ecdfa446 2042 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 2043 RT_TRACE (COMP_QOS, "QoS parameters change call "
2044 "qos_activate\n");
2045 }
2046 } else {
207b58fb 2047 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 2048 &def_qos_parameters, size);
2049
2050 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 2051 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 2052 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2053 }
2054 network->qos_data.active = 0;
2055 network->qos_data.supported = 0;
2056 }
2057
2058 return 0;
2059}
2060
2061/* handle manage frame frame beacon and probe response */
2062static int rtl8192_handle_beacon(struct net_device * dev,
2063 struct ieee80211_beacon * beacon,
2064 struct ieee80211_network * network)
2065{
2066 struct r8192_priv *priv = ieee80211_priv(dev);
2067
2068 rtl8192_qos_handle_probe_response(priv,1,network);
2069
ecdfa446 2070 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 2071 return 0;
2072
2073}
2074
2075/*
2076* handling the beaconing responses. if we get different QoS setting
2077* off the network from the associated setting, adjust the QoS
2078* setting
2079*/
2080static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2081 struct ieee80211_network *network)
2082{
2083 int ret = 0;
2084 unsigned long flags;
2085 u32 size = sizeof(struct ieee80211_qos_parameters);
2086 int set_qos_param = 0;
2087
2088 if ((priv == NULL) || (network == NULL))
2089 return ret;
2090
2091 if(priv->ieee80211->state !=IEEE80211_LINKED)
2092 return ret;
2093
2094 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2095 return ret;
2096
2097 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2098 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
207b58fb
MM		 2099 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
2100 &network->qos_data.parameters,
ecdfa446
GKH		 2101 sizeof(struct ieee80211_qos_parameters));
2102 priv->ieee80211->current_network.qos_data.active = 1;
2103#if 0
207b58fb 2104 if((priv->ieee80211->current_network.qos_data.param_count !=
ecdfa446
GKH		 2105 network->qos_data.param_count))
2106#endif
2107 {
2108 set_qos_param = 1;
2109 /* update qos parameter for current network */
207b58fb 2110 priv->ieee80211->current_network.qos_data.old_param_count =
ecdfa446 2111 priv->ieee80211->current_network.qos_data.param_count;
207b58fb 2112 priv->ieee80211->current_network.qos_data.param_count =
ecdfa446
GKH		 2113 network->qos_data.param_count;
2114 }
2115 } else {
207b58fb 2116 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 2117 &def_qos_parameters, size);
2118 priv->ieee80211->current_network.qos_data.active = 0;
2119 priv->ieee80211->current_network.qos_data.supported = 0;
2120 set_qos_param = 1;
2121 }
2122
2123 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2124
2125 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2126 if (set_qos_param == 1)
ecdfa446 2127 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 2128
2129 return ret;
2130}
2131
2132
2133static int rtl8192_handle_assoc_response(struct net_device *dev,
2134 struct ieee80211_assoc_response_frame *resp,
2135 struct ieee80211_network *network)
2136{
2137 struct r8192_priv *priv = ieee80211_priv(dev);
2138 rtl8192_qos_association_resp(priv, network);
2139 return 0;
2140}
2141
2142
2143//updateRATRTabel for MCS only. Basic rate is not implement.
5b3b1a7b 2144static void rtl8192_update_ratr_table(struct net_device* dev)
ecdfa446
GKH		 2145 // POCTET_STRING posLegacyRate,
2146 // u8* pMcsRate)
2147 // PRT_WLAN_STA pEntry)
2148{
2149 struct r8192_priv* priv = ieee80211_priv(dev);
2150 struct ieee80211_device* ieee = priv->ieee80211;
2151 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2152 //struct ieee80211_network *net = &ieee->current_network;
2153 u32 ratr_value = 0;
2154 u8 rate_index = 0;
2155
2156 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2157 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2158// switch (net->mode)
2159 switch (ieee->mode)
2160 {
2161 case IEEE_A:
2162 ratr_value &= 0x00000FF0;
2163 break;
2164 case IEEE_B:
2165 ratr_value &= 0x0000000F;
2166 break;
2167 case IEEE_G:
2168 ratr_value &= 0x00000FF7;
2169 break;
2170 case IEEE_N_24G:
2171 case IEEE_N_5G:
2172 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2173 ratr_value &= 0x0007F007;
2174 else{
2175 if (priv->rf_type == RF_1T2R)
2176 ratr_value &= 0x000FF007;
2177 else
2178 ratr_value &= 0x0F81F007;
2179 }
2180 break;
2181 default:
2182 break;
2183 }
2184 ratr_value &= 0x0FFFFFFF;
2185 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2186 ratr_value |= 0x80000000;
2187 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2188 ratr_value |= 0x80000000;
2189 }
2190 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2191 write_nic_byte(dev, UFWP, 1);
2192}
2193
65a43784 2194#if 0
ecdfa446
GKH		 2195static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2196static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 2197#endif
2198
5e1ad18a 2199static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446
GKH		 2200{
2201#if 1
65a43784 2202
2203 struct r8192_priv *priv = ieee80211_priv(dev);
2204 struct ieee80211_device *ieee = priv->ieee80211;
285f660c
MM		 2205 return !(ieee->rtllib_ap_sec_type &&
2206 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
65a43784 2207#else
ecdfa446
GKH		 2208 struct r8192_priv* priv = ieee80211_priv(dev);
2209 struct ieee80211_device* ieee = priv->ieee80211;
2210 int wpa_ie_len= ieee->wpa_ie_len;
2211 struct ieee80211_crypt_data* crypt;
2212 int encrypt;
2213
2214 crypt = ieee->crypt[ieee->tx_keyidx];
2215 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2216
2217 /* simply judge */
2218 if(encrypt && (wpa_ie_len == 0)) {
2219 /* wep encryption, no N mode setting */
2220 return false;
2221// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2222 } else if((wpa_ie_len != 0)) {
2223 /* parse pairwise key type */
2224 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2225 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2226 return true;
2227 else
2228 return false;
2229 } else {
2230 //RT_TRACE(COMP_ERR,"In %s The GroupEncAlgorithm is [4]\n",__FUNCTION__ );
2231 return true;
2232 }
2233
ecdfa446
GKH		 2234 return true;
2235#endif
2236}
2237
5e1ad18a 2238static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 2239{
2240 struct ieee80211_device* ieee = priv->ieee80211;
2241 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2242 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2243 {
2244 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2245 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2246 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2247 }
2248 else
2249 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
ecdfa446
GKH		 2250}
2251
5e1ad18a 2252static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
ecdfa446
GKH		 2253{
2254 struct r8192_priv *priv = ieee80211_priv(dev);
2255 u8 ret = 0;
2256 switch(priv->rf_chip)
2257 {
2258 case RF_8225:
2259 case RF_8256:
2260 case RF_PSEUDO_11N:
2261 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2262 break;
2263 case RF_8258:
2264 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2265 break;
2266 default:
2267 ret = WIRELESS_MODE_B;
2268 break;
2269 }
2270 return ret;
2271}
5e1ad18a
GKH		 2272
2273static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 2274{
2275 struct r8192_priv *priv = ieee80211_priv(dev);
2276 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2277
2278#if 1
2279 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2280 {
2281 if(bSupportMode & WIRELESS_MODE_N_24G)
2282 {
2283 wireless_mode = WIRELESS_MODE_N_24G;
2284 }
2285 else if(bSupportMode & WIRELESS_MODE_N_5G)
2286 {
2287 wireless_mode = WIRELESS_MODE_N_5G;
2288 }
2289 else if((bSupportMode & WIRELESS_MODE_A))
2290 {
2291 wireless_mode = WIRELESS_MODE_A;
2292 }
2293 else if((bSupportMode & WIRELESS_MODE_G))
2294 {
2295 wireless_mode = WIRELESS_MODE_G;
2296 }
2297 else if((bSupportMode & WIRELESS_MODE_B))
2298 {
2299 wireless_mode = WIRELESS_MODE_B;
2300 }
2301 else{
2302 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2303 wireless_mode = WIRELESS_MODE_B;
2304 }
2305 }
39cfb97b 2306#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA
ecdfa446
GKH		 2307 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2308#endif
2309 priv->ieee80211->mode = wireless_mode;
2310
2311 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2312 priv->ieee80211->pHTInfo->bEnableHT = 1;
2313 else
2314 priv->ieee80211->pHTInfo->bEnableHT = 0;
2315 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2316 rtl8192_refresh_supportrate(priv);
2317#endif
2318
2319}
2320//init priv variables here
2321
5e1ad18a 2322static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446 2323{
ecdfa446
GKH		 2324 struct r8192_priv* priv = ieee80211_priv(dev);
2325 struct ieee80211_device* ieee = priv->ieee80211;
2326
285f660c 2327 return ieee->bHalfWirelessN24GMode;
ecdfa446
GKH		 2328}
2329
2330short rtl8192_is_tx_queue_empty(struct net_device *dev)
2331{
2332 int i=0;
2333 struct r8192_priv *priv = ieee80211_priv(dev);
2334 for (i=0; i<=MGNT_QUEUE; i++)
2335 {
2336 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2337 continue;
2338 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
2339 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
2340 return 0;
2341 }
2342 }
2343 return 1;
2344}
5e1ad18a 2345static void rtl8192_hw_sleep_down(struct net_device *dev)
ecdfa446 2346{
65a43784 2347 struct r8192_priv *priv = ieee80211_priv(dev);
2348 unsigned long flags = 0;
2349
2350 spin_lock_irqsave(&priv->rf_ps_lock,flags);
2351 if (priv->RFChangeInProgress) {
2352 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
2353 RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n");
2354 printk("rtl8192_hw_sleep_down(): RF Change in progress!\n");
2355 return;
2356 }
2357 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
2358 //RT_TRACE(COMP_PS, "%s()============>come to sleep down\n", __FUNCTION__);
2359
ecdfa446
GKH		 2360 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
2361}
5e1ad18a 2362static void rtl8192_hw_sleep_wq (struct work_struct *work)
ecdfa446
GKH		 2363{
2364// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
2365// struct ieee80211_device * ieee = (struct ieee80211_device*)
2366// container_of(work, struct ieee80211_device, watch_dog_wq);
2367 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2368 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
2369 struct net_device *dev = ieee->dev;
65a43784 2370
ecdfa446
GKH		 2371 rtl8192_hw_sleep_down(dev);
2372}
65a43784 2373
5e1ad18a 2374static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446 2375{
65a43784 2376 struct r8192_priv *priv = ieee80211_priv(dev);
2377 unsigned long flags = 0;
2378
2379 spin_lock_irqsave(&priv->rf_ps_lock,flags);
2380 if (priv->RFChangeInProgress) {
2381 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
2382 RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n");
2383 printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n");
2384 queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20
2385 return;
2386 }
2387 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
ecdfa446 2388
65a43784 2389 //RT_TRACE(COMP_PS, "%s()============>come to wake up\n", __FUNCTION__);
ecdfa446 2390 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
ecdfa446 2391}
65a43784 2392
ecdfa446
GKH		 2393void rtl8192_hw_wakeup_wq (struct work_struct *work)
2394{
2395// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
2396// struct ieee80211_device * ieee = (struct ieee80211_device*)
2397// container_of(work, struct ieee80211_device, watch_dog_wq);
2398 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2399 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
2400 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 2401 rtl8192_hw_wakeup(dev);
2402
2403}
2404
2405#define MIN_SLEEP_TIME 50
2406#define MAX_SLEEP_TIME 10000
5e1ad18a 2407static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446 2408{
ecdfa446
GKH		 2409 struct r8192_priv *priv = ieee80211_priv(dev);
2410
2411 u32 rb = jiffies;
2412 unsigned long flags;
2413
2414 spin_lock_irqsave(&priv->ps_lock,flags);
2415
65a43784 2416 // Writing HW register with 0 equals to disable
2417 // the timer, that is not really what we want
2418 //
2419 tl -= MSECS(8+16+7);
ecdfa446 2420
65a43784 2421 // If the interval in witch we are requested to sleep is too
2422 // short then give up and remain awake
2423 // when we sleep after send null frame, the timer will be too short to sleep.
2424 //
ecdfa446 2425 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
65a43784 2426 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
ecdfa446 2427 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 2428 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
ecdfa446
GKH		 2429 return;
2430 }
2431
ecdfa446 2432 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
65a43784 2433 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
2434 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
ecdfa446
GKH		 2435 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
2436 spin_unlock_irqrestore(&priv->ps_lock,flags);
2437 return;
2438 }
65a43784 2439 {
2440 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
2441 queue_delayed_work(priv->ieee80211->wq,
2442 &priv->ieee80211->hw_wakeup_wq,tmp);
2443 //PowerSave not supported when kernel version less 2.6.20
2444 }
2445 queue_delayed_work(priv->ieee80211->wq,
2446 (void *)&priv->ieee80211->hw_sleep_wq,0);
ecdfa446 2447 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 2448
ecdfa446
GKH		 2449}
2450static void rtl8192_init_priv_variable(struct net_device* dev)
2451{
2452 struct r8192_priv *priv = ieee80211_priv(dev);
2453 u8 i;
65a43784 2454 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
2455
2456 // Default Halt the NIC if RF is OFF.
2457 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
2458 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
2459 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
2460 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
2461 pPSC->bLeisurePs = true;
2462 pPSC->RegMaxLPSAwakeIntvl = 5;
2463 priv->bHwRadioOff = false;
2464
ecdfa446
GKH		 2465 priv->being_init_adapter = false;
2466 priv->txbuffsize = 1600;//1024;
2467 priv->txfwbuffersize = 4096;
2468 priv->txringcount = 64;//32;
2469 //priv->txbeaconcount = priv->txringcount;
2470 priv->txbeaconcount = 2;
2471 priv->rxbuffersize = 9100;//2048;//1024;
2472 priv->rxringcount = MAX_RX_COUNT;//64;
2473 priv->irq_enabled=0;
2474 priv->card_8192 = NIC_8192E;
2475 priv->rx_skb_complete = 1;
2476 priv->chan = 1; //set to channel 1
2477 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
2478 priv->RegChannelPlan = 0xf;
2479 priv->nrxAMPDU_size = 0;
2480 priv->nrxAMPDU_aggr_num = 0;
2481 priv->last_rxdesc_tsf_high = 0;
2482 priv->last_rxdesc_tsf_low = 0;
2483 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
2484 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2485 priv->ieee80211->ieee_up=0;
2486 priv->retry_rts = DEFAULT_RETRY_RTS;
2487 priv->retry_data = DEFAULT_RETRY_DATA;
2488 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
2489 priv->ieee80211->rate = 110; //11 mbps
2490 priv->ieee80211->short_slot = 1;
2491 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
2492 priv->bcck_in_ch14 = false;
2493 priv->bfsync_processing = false;
2494 priv->CCKPresentAttentuation = 0;
2495 priv->rfa_txpowertrackingindex = 0;
2496 priv->rfc_txpowertrackingindex = 0;
2497 priv->CckPwEnl = 6;
2498 priv->ScanDelay = 50;//for Scan TODO
2499 //added by amy for silent reset
2500 priv->ResetProgress = RESET_TYPE_NORESET;
2501 priv->bForcedSilentReset = 0;
2502 priv->bDisableNormalResetCheck = false;
2503 priv->force_reset = false;
2504 //added by amy for power save
2505 priv->RegRfOff = 0;
2506 priv->ieee80211->RfOffReason = 0;
2507 priv->RFChangeInProgress = false;
2508 priv->bHwRfOffAction = 0;
2509 priv->SetRFPowerStateInProgress = false;
2510 priv->ieee80211->PowerSaveControl.bInactivePs = true;
2511 priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
2512 //just for debug
2513 priv->txpower_checkcnt = 0;
2514 priv->thermal_readback_index =0;
2515 priv->txpower_tracking_callback_cnt = 0;
2516 priv->ccktxpower_adjustcnt_ch14 = 0;
2517 priv->ccktxpower_adjustcnt_not_ch14 = 0;
2518
2519 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2520 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2521 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2522 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2523 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
2524 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
2525
2526 priv->ieee80211->active_scan = 1;
2527 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
2528 priv->ieee80211->host_encrypt = 1;
2529 priv->ieee80211->host_decrypt = 1;
2530 //priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
2531 //priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
2532 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
2533 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
2534 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
2535 priv->ieee80211->set_chan = rtl8192_set_chan;
2536 priv->ieee80211->link_change = rtl8192_link_change;
2537 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
2538 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
2539 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
2540 priv->ieee80211->init_wmmparam_flag = 0;
2541 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2542 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
2543 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2544 priv->ieee80211->qos_support = 1;
2545 priv->ieee80211->dot11PowerSaveMode = 0;
2546 //added by WB
2547// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
2548 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
2549 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
2550 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
2551
2552 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
2553// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
2554 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
2555 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
2556 //added by david
2557 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
2558 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
2559 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
2560
2561 //added by amy
2562 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
2563
65a43784 2564#ifdef ENABLE_IPS
2565 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
2566 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
2567#endif
2568#ifdef ENABLE_LPS
2569 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
2570#endif//ENABL
2571
2572 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
2573 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
2574
ecdfa446
GKH		 2575 priv->card_type = USB;
2576 {
2577 priv->ShortRetryLimit = 0x30;
2578 priv->LongRetryLimit = 0x30;
2579 }
2580 priv->EarlyRxThreshold = 7;
2581 priv->enable_gpio0 = 0;
2582
2583 priv->TransmitConfig = 0;
2584
2585 priv->ReceiveConfig = RCR_ADD3 |
2586 RCR_AMF | RCR_ADF | //accept management/data
2587 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
2588 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
2589 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2590 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2591
207b58fb
MM		 2592 priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
2593 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
2594 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
ecdfa446
GKH		 2595 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2596
2597 priv->AcmControl = 0;
2598 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
2599 if (priv->pFirmware)
2600 memset(priv->pFirmware, 0, sizeof(rt_firmware));
2601
2602 /* rx related queue */
2603 skb_queue_head_init(&priv->rx_queue);
2604 skb_queue_head_init(&priv->skb_queue);
2605
2606 /* Tx related queue */
2607 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2608 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
2609 }
2610 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2611 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
2612 }
2613 priv->rf_set_chan = rtl8192_phy_SwChnl;
2614}
2615
2616//init lock here
2617static void rtl8192_init_priv_lock(struct r8192_priv* priv)
2618{
2619 spin_lock_init(&priv->tx_lock);
2620 spin_lock_init(&priv->irq_lock);//added by thomas
2621 spin_lock_init(&priv->irq_th_lock);
2622 spin_lock_init(&priv->rf_ps_lock);
2623 spin_lock_init(&priv->ps_lock);
2624 //spin_lock_init(&priv->rf_lock);
2625 sema_init(&priv->wx_sem,1);
2626 sema_init(&priv->rf_sem,1);
ecdfa446 2627 mutex_init(&priv->mutex);
ecdfa446
GKH		 2628}
2629
ecdfa446
GKH		 2630//init tasklet and wait_queue here. only 2.6 above kernel is considered
2631#define DRV_NAME "wlan0"
2632static void rtl8192_init_priv_task(struct net_device* dev)
2633{
2634 struct r8192_priv *priv = ieee80211_priv(dev);
2635
ecdfa446
GKH		 2636#ifdef PF_SYNCTHREAD
2637 priv->priv_wq = create_workqueue(DRV_NAME,0);
2638#else
2639 priv->priv_wq = create_workqueue(DRV_NAME);
2640#endif
ecdfa446 2641
65a43784 2642#ifdef ENABLE_IPS
2643 INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq);
2644#endif
2645
ecdfa446
GKH		 2646// INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart);
2647 INIT_WORK(&priv->reset_wq, rtl8192_restart);
2648// INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
2649 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2650 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2651 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2652 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
2653 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
2654 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
2655 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
2656 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
2657 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
2658
ecdfa446
GKH		 2659 tasklet_init(&priv->irq_rx_tasklet,
2660 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
2661 (unsigned long)priv);
2662 tasklet_init(&priv->irq_tx_tasklet,
2663 (void(*)(unsigned long))rtl8192_irq_tx_tasklet,
2664 (unsigned long)priv);
2665 tasklet_init(&priv->irq_prepare_beacon_tasklet,
2666 (void(*)(unsigned long))rtl8192_prepare_beacon,
2667 (unsigned long)priv);
2668}
2669
2670static void rtl8192_get_eeprom_size(struct net_device* dev)
2671{
2672 u16 curCR = 0;
2673 struct r8192_priv *priv = ieee80211_priv(dev);
2674 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
2675 curCR = read_nic_dword(dev, EPROM_CMD);
2676 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2677 //whether need I consider BIT5?
2678 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2679 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2680}
2681
2682//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
2683static inline u16 endian_swap(u16* data)
2684{
2685 u16 tmp = *data;
2686 *data = (tmp >> 8) | (tmp << 8);
2687 return *data;
2688}
2689
2690/*
2691 * Note: Adapter->EEPROMAddressSize should be set before this function call.
2692 * EEPROM address size can be got through GetEEPROMSize8185()
2693*/
2694static void rtl8192_read_eeprom_info(struct net_device* dev)
2695{
2696 struct r8192_priv *priv = ieee80211_priv(dev);
2697
2698 u8 tempval;
2699#ifdef RTL8192E
2700 u8 ICVer8192, ICVer8256;
2701#endif
2702 u16 i,usValue, IC_Version;
2703 u16 EEPROMId;
2704#ifdef RTL8190P
2705 u8 offset;//, tmpAFR;
2706 u8 EepromTxPower[100];
2707#endif
2708 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2709 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2710
2711
2712 // TODO: I don't know if we need to apply EF function to EEPROM read function
2713
2714 //2 Read EEPROM ID to make sure autoload is success
2715 EEPROMId = eprom_read(dev, 0);
2716 if( EEPROMId != RTL8190_EEPROM_ID )
2717 {
2718 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2719 priv->AutoloadFailFlag=true;
2720 }
2721 else
2722 {
2723 priv->AutoloadFailFlag=false;
2724 }
2725
2726 //
2727 // Assign Chip Version ID
2728 //
2729 // Read IC Version && Channel Plan
2730 if(!priv->AutoloadFailFlag)
2731 {
2732 // VID, PID
2733 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
2734 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
2735
2736 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2737 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2738 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
2739 priv->eeprom_ChannelPlan = usValue&0xff;
2740 IC_Version = ((usValue&0xff00)>>8);
2741
2742#ifdef RTL8190P
2743 priv->card_8192_version = (VERSION_8190)(IC_Version);
2744#else
2745 #ifdef RTL8192E
2746 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2747 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2748 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
2749 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
2750 if(ICVer8192 == 0x2) //B-cut
2751 {
2752 if(ICVer8256 == 0x5) //E-cut
2753 priv->card_8192_version= VERSION_8190_BE;
2754 }
2755 #endif
2756#endif
2757 switch(priv->card_8192_version)
2758 {
2759 case VERSION_8190_BD:
2760 case VERSION_8190_BE:
2761 break;
2762 default:
2763 priv->card_8192_version = VERSION_8190_BD;
2764 break;
2765 }
2766 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2767 }
2768 else
2769 {
2770 priv->card_8192_version = VERSION_8190_BD;
2771 priv->eeprom_vid = 0;
2772 priv->eeprom_did = 0;
2773 priv->eeprom_CustomerID = 0;
2774 priv->eeprom_ChannelPlan = 0;
2775 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
2776 }
2777
2778 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2779 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2780 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2781
2782 //2 Read Permanent MAC address
2783 if(!priv->AutoloadFailFlag)
2784 {
2785 for(i = 0; i < 6; i += 2)
2786 {
2787 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2788 *(u16*)(&dev->dev_addr[i]) = usValue;
2789 }
2790 } else {
2791 // when auto load failed, the last address byte set to be a random one.
2792 // added by david woo.2007/11/7
2793 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2794 }
2795
820793c3 2796 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
ecdfa446
GKH		 2797
2798 //2 TX Power Check EEPROM Fail or not
2799 if(priv->card_8192_version > VERSION_8190_BD) {
2800 priv->bTXPowerDataReadFromEEPORM = true;
2801 } else {
2802 priv->bTXPowerDataReadFromEEPORM = false;
2803 }
2804
bbc9a991 2805 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
ecdfa446
GKH		 2806 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2807
2808 if(priv->card_8192_version > VERSION_8190_BD)
2809 {
2810 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2811 if(!priv->AutoloadFailFlag)
2812 {
2813 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2814 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2815
2816 if (tempval&0x80) //RF-indication, bit[7]
2817 priv->rf_type = RF_1T2R;
2818 else
2819 priv->rf_type = RF_2T4R;
2820 }
2821 else
2822 {
2823 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2824 }
2825 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2826 priv->EEPROMLegacyHTTxPowerDiff);
2827
2828 // Read ThermalMeter from EEPROM
2829 if(!priv->AutoloadFailFlag)
2830 {
2831 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2832 }
2833 else
2834 {
2835 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2836 }
2837 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2838 //vivi, for tx power track
2839 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2840
2841 if(priv->epromtype == EPROM_93c46)
2842 {
2843 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2844 if(!priv->AutoloadFailFlag)
2845 {
2846 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
2847 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2848 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2849 }
2850 else
2851 {
2852 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2853 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2854 }
2855 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2856 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2857
2858 //
2859 // Get per-channel Tx Power Level
2860 //
2861 for(i=0; i<14; i+=2)
2862 {
2863 if(!priv->AutoloadFailFlag)
2864 {
2865 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2866 }
2867 else
2868 {
2869 usValue = EEPROM_Default_TxPower;
2870 }
2871 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2872 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2873 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2874 }
2875 for(i=0; i<14; i+=2)
2876 {
2877 if(!priv->AutoloadFailFlag)
2878 {
2879 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2880 }
2881 else
2882 {
2883 usValue = EEPROM_Default_TxPower;
2884 }
2885 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2886 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2887 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2888 }
2889 }
2890 else if(priv->epromtype== EPROM_93c56)
2891 {
2892 #ifdef RTL8190P
2893 // Read CrystalCap from EEPROM
2894 if(!priv->AutoloadFailFlag)
2895 {
2896 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2897 priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12);
2898 }
2899 else
2900 {
2901 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2902 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2903 }
2904 RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2905 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2906
2907 // Get Tx Power Level by Channel
2908 if(!priv->AutoloadFailFlag)
2909 {
2910 // Read Tx power of Channel 1 ~ 14 from EEPROM.
2911 for(i = 0; i < 12; i+=2)
2912 {
2913 if (i <6)
2914 offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i;
2915 else
2916 offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6;
2917 usValue = eprom_read(dev, (offset>>1));
2918 *((u16*)(&EepromTxPower[i])) = usValue;
2919 }
2920
2921 for(i = 0; i < 12; i++)
2922 {
2923 if (i <= 2)
2924 priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i];
2925 else if ((i >=3 )&&(i <= 5))
2926 priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i];
2927 else if ((i >=6 )&&(i <= 8))
2928 priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i];
2929 else
2930 priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i];
2931 }
2932 }
2933 else
2934 {
2935 priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2936 priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2937 priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2938
2939 priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2940 priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2941 priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2942
2943 priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2944 priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2945 priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2946
2947 priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2948 priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2949 priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2950 }
2951 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]);
2952 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]);
2953 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]);
2954 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]);
2955 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]);
2956 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]);
2957 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]);
2958 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]);
2959 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]);
2960 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]);
2961 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]);
2962 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]);
2963#endif
2964
2965 }
2966 //
2967 // Update HAL variables.
2968 //
2969 if(priv->epromtype == EPROM_93c46)
2970 {
2971 for(i=0; i<14; i++)
2972 {
2973 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2974 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2975 }
2976 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2977 // Antenna B gain offset to antenna A, bit0~3
2978 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2979 // Antenna C gain offset to antenna A, bit4~7
2980 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2981 // Antenna D gain offset to antenna A, bit8~11
2982 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2983 // CrystalCap, bit12~15
2984 priv->CrystalCap = priv->EEPROMCrystalCap;
2985 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2986 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2987 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2988 }
2989 else if(priv->epromtype == EPROM_93c56)
2990 {
2991 //char cck_pwr_diff_a=0, cck_pwr_diff_c=0;
2992
2993 //cck_pwr_diff_a = pHalData->EEPROMRfACCKChnl7TxPwLevel - pHalData->EEPROMRfAOfdmChnlTxPwLevel[1];
2994 //cck_pwr_diff_c = pHalData->EEPROMRfCCCKChnl7TxPwLevel - pHalData->EEPROMRfCOfdmChnlTxPwLevel[1];
2995 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2996 {
2997 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2998 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2999 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
3000 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
3001 }
3002 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
3003 {
3004 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
3005 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
3006 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
3007 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
3008 }
3009 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
3010 {
3011 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
3012 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
3013 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
3014 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
3015 }
3016 for(i=0; i<14; i++)
3017 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
3018 for(i=0; i<14; i++)
3019 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
3020 for(i=0; i<14; i++)
3021 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
3022 for(i=0; i<14; i++)
3023 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
3024 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
3025 priv->AntennaTxPwDiff[0] = 0;
3026 priv->AntennaTxPwDiff[1] = 0;
3027 priv->AntennaTxPwDiff[2] = 0;
3028 priv->CrystalCap = priv->EEPROMCrystalCap;
3029 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
3030 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
3031 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
3032 }
3033 }
3034
3035 if(priv->rf_type == RF_1T2R)
3036 {
3037 RT_TRACE(COMP_INIT, "\n1T2R config\n");
3038 }
3039 else if (priv->rf_type == RF_2T4R)
3040 {
3041 RT_TRACE(COMP_INIT, "\n2T4R config\n");
3042 }
3043
3044 // 2008/01/16 MH We can only know RF type in the function. So we have to init
3045 // DIG RATR table again.
3046 init_rate_adaptive(dev);
3047
3048 //1 Make a copy for following variables and we can change them if we want
3049
3050 priv->rf_chip= RF_8256;
3051
3052 if(priv->RegChannelPlan == 0xf)
3053 {
3054 priv->ChannelPlan = priv->eeprom_ChannelPlan;
3055 }
3056 else
3057 {
3058 priv->ChannelPlan = priv->RegChannelPlan;
3059 }
3060
3061 //
3062 // Used PID and DID to Set CustomerID
3063 //
3064 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
3065 {
3066 priv->CustomerID = RT_CID_DLINK;
3067 }
3068
3069 switch(priv->eeprom_CustomerID)
3070 {
3071 case EEPROM_CID_DEFAULT:
3072 priv->CustomerID = RT_CID_DEFAULT;
3073 break;
3074 case EEPROM_CID_CAMEO:
3075 priv->CustomerID = RT_CID_819x_CAMEO;
3076 break;
3077 case EEPROM_CID_RUNTOP:
3078 priv->CustomerID = RT_CID_819x_RUNTOP;
3079 break;
3080 case EEPROM_CID_NetCore:
3081 priv->CustomerID = RT_CID_819x_Netcore;
3082 break;
3083 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
3084 priv->CustomerID = RT_CID_TOSHIBA;
3085 if(priv->eeprom_ChannelPlan&0x80)
3086 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
3087 else
3088 priv->ChannelPlan = 0x0;
3089 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
3090 priv->ChannelPlan);
3091 break;
3092 case EEPROM_CID_Nettronix:
3093 priv->ScanDelay = 100; //cosa add for scan
3094 priv->CustomerID = RT_CID_Nettronix;
3095 break;
3096 case EEPROM_CID_Pronet:
3097 priv->CustomerID = RT_CID_PRONET;
3098 break;
3099 case EEPROM_CID_DLINK:
3100 priv->CustomerID = RT_CID_DLINK;
3101 break;
3102
3103 case EEPROM_CID_WHQL:
3104 //Adapter->bInHctTest = TRUE;//do not supported
3105
3106 //priv->bSupportTurboMode = FALSE;
3107 //priv->bAutoTurboBy8186 = FALSE;
3108
3109 //pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3110 //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3111 //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3112
3113 break;
3114 default:
3115 // value from RegCustomerID
3116 break;
3117 }
3118
3119 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
3120 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
3121 priv->ChannelPlan = 0; //FCC
3122
3123 switch(priv->CustomerID)
3124 {
3125 case RT_CID_DEFAULT:
3126 #ifdef RTL8190P
3127 priv->LedStrategy = HW_LED;
3128 #else
3129 #ifdef RTL8192E
3130 priv->LedStrategy = SW_LED_MODE1;
3131 #endif
3132 #endif
3133 break;
3134
3135 case RT_CID_819x_CAMEO:
3136 priv->LedStrategy = SW_LED_MODE2;
3137 break;
3138
3139 case RT_CID_819x_RUNTOP:
3140 priv->LedStrategy = SW_LED_MODE3;
3141 break;
3142
3143 case RT_CID_819x_Netcore:
3144 priv->LedStrategy = SW_LED_MODE4;
3145 break;
3146
3147 case RT_CID_Nettronix:
3148 priv->LedStrategy = SW_LED_MODE5;
3149 break;
3150
3151 case RT_CID_PRONET:
3152 priv->LedStrategy = SW_LED_MODE6;
3153 break;
3154
3155 case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
3156 // Do nothing.
3157 //break;
3158
3159 default:
3160 #ifdef RTL8190P
3161 priv->LedStrategy = HW_LED;
3162 #else
3163 #ifdef RTL8192E
3164 priv->LedStrategy = SW_LED_MODE1;
3165 #endif
3166 #endif
3167 break;
3168 }
65a43784 3169
3170
ecdfa446 3171 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
65a43784 3172 priv->ieee80211->bSupportRemoteWakeUp = true;
ecdfa446 3173 else
65a43784 3174 priv->ieee80211->bSupportRemoteWakeUp = false;
3175
3176
ecdfa446
GKH		 3177 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
3178 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
3179 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
3180 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
3181
3182 return ;
3183}
3184
3185
5e1ad18a 3186static short rtl8192_get_channel_map(struct net_device * dev)
ecdfa446
GKH		 3187{
3188 struct r8192_priv *priv = ieee80211_priv(dev);
3189#ifdef ENABLE_DOT11D
3190 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
3191 printk("rtl8180_init:Error channel plan! Set to default.\n");
3192 priv->ChannelPlan= 0;
3193 }
3194 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
3195
3196 rtl819x_set_channel_map(priv->ChannelPlan, priv);
3197#else
3198 int ch,i;
3199 //Set Default Channel Plan
3200 if(!channels){
3201 DMESG("No channels, aborting");
3202 return -1;
3203 }
3204 ch=channels;
3205 priv->ChannelPlan= 0;//hikaru
3206 // set channels 1..14 allowed in given locale
3207 for (i=1; i<=14; i++) {
3208 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
3209 ch >>= 1;
3210 }
3211#endif
3212 return 0;
3213}
5e1ad18a
GKH		 3214
3215static short rtl8192_init(struct net_device *dev)
ecdfa446
GKH		 3216{
3217 struct r8192_priv *priv = ieee80211_priv(dev);
3218 memset(&(priv->stats),0,sizeof(struct Stats));
3219 rtl8192_init_priv_variable(dev);
3220 rtl8192_init_priv_lock(priv);
3221 rtl8192_init_priv_task(dev);
3222 rtl8192_get_eeprom_size(dev);
3223 rtl8192_read_eeprom_info(dev);
3224 rtl8192_get_channel_map(dev);
3225 init_hal_dm(dev);
3226 init_timer(&priv->watch_dog_timer);
3227 priv->watch_dog_timer.data = (unsigned long)dev;
3228 priv->watch_dog_timer.function = watch_dog_timer_callback;
3229#if defined(IRQF_SHARED)
3230 if(request_irq(dev->irq, (void*)rtl8192_interrupt, IRQF_SHARED, dev->name, dev)){
3231#else
3232 if(request_irq(dev->irq, (void *)rtl8192_interrupt, SA_SHIRQ, dev->name, dev)){
3233#endif
3234 printk("Error allocating IRQ %d",dev->irq);
3235 return -1;
3236 }else{
3237 priv->irq=dev->irq;
3238 printk("IRQ %d",dev->irq);
3239 }
3240 if(rtl8192_pci_initdescring(dev)!=0){
3241 printk("Endopoints initialization failed");
3242 return -1;
3243 }
3244
3245 //rtl8192_rx_enable(dev);
3246 //rtl8192_adapter_start(dev);
ecdfa446
GKH		 3247 return 0;
3248}
3249
3250/******************************************************************************
3251 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
3252 * not to do all the hw config as its name says
3253 * input: net_device dev
3254 * output: none
3255 * return: none
3256 * notice: This part need to modified according to the rate set we filtered
3257 * ****************************************************************************/
5e1ad18a 3258static void rtl8192_hwconfig(struct net_device* dev)
ecdfa446
GKH		 3259{
3260 u32 regRATR = 0, regRRSR = 0;
3261 u8 regBwOpMode = 0, regTmp = 0;
3262 struct r8192_priv *priv = ieee80211_priv(dev);
3263
3264// Set RRSR, RATR, and BW_OPMODE registers
3265 //
3266 switch(priv->ieee80211->mode)
3267 {
3268 case WIRELESS_MODE_B:
3269 regBwOpMode = BW_OPMODE_20MHZ;
3270 regRATR = RATE_ALL_CCK;
3271 regRRSR = RATE_ALL_CCK;
3272 break;
3273 case WIRELESS_MODE_A:
3274 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
3275 regRATR = RATE_ALL_OFDM_AG;
3276 regRRSR = RATE_ALL_OFDM_AG;
3277 break;
3278 case WIRELESS_MODE_G:
3279 regBwOpMode = BW_OPMODE_20MHZ;
3280 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3281 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3282 break;
3283 case WIRELESS_MODE_AUTO:
3284 case WIRELESS_MODE_N_24G:
3285 // It support CCK rate by default.
3286 // CCK rate will be filtered out only when associated AP does not support it.
3287 regBwOpMode = BW_OPMODE_20MHZ;
3288 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3289 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3290 break;
3291 case WIRELESS_MODE_N_5G:
3292 regBwOpMode = BW_OPMODE_5G;
3293 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3294 regRRSR = RATE_ALL_OFDM_AG;
3295 break;
3296 }
3297
3298 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
3299 {
3300 u32 ratr_value = 0;
3301 ratr_value = regRATR;
3302 if (priv->rf_type == RF_1T2R)
3303 {
3304 ratr_value &= ~(RATE_ALL_OFDM_2SS);
3305 }
3306 write_nic_dword(dev, RATR0, ratr_value);
3307 write_nic_byte(dev, UFWP, 1);
3308 }
3309 regTmp = read_nic_byte(dev, 0x313);
3310 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3311 write_nic_dword(dev, RRSR, regRRSR);
3312
3313 //
3314 // Set Retry Limit here
3315 //
3316 write_nic_word(dev, RETRY_LIMIT,
207b58fb 3317 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
ecdfa446
GKH		 3318 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
3319 // Set Contention Window here
3320
3321 // Set Tx AGC
3322
3323 // Set Tx Antenna including Feedback control
3324
3325 // Set Auto Rate fallback control
3326
3327
3328}
3329
3330
5e1ad18a 3331static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
ecdfa446
GKH		 3332{
3333 struct r8192_priv *priv = ieee80211_priv(dev);
3334// struct ieee80211_device *ieee = priv->ieee80211;
3335 u32 ulRegRead;
3336 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
3337// static char szMACPHYRegFile[] = RTL819X_PHY_MACPHY_REG;
3338// static char szMACPHYRegPGFile[] = RTL819X_PHY_MACPHY_REG_PG;
3339 //u8 eRFPath;
3340 u8 tmpvalue;
3341#ifdef RTL8192E
3342 u8 ICVersion,SwitchingRegulatorOutput;
3343#endif
3344 bool bfirmwareok = true;
3345#ifdef RTL8190P
3346 u8 ucRegRead;
3347#endif
3348 u32 tmpRegA, tmpRegC, TempCCk;
3349 int i =0;
3350// u32 dwRegRead = 0;
3351
3352 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
3353 priv->being_init_adapter = true;
3354 rtl8192_pci_resetdescring(dev);
3355 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
3356 priv->Rf_Mode = RF_OP_By_SW_3wire;
3357#ifdef RTL8192E
3358 //dPLL on
3359 if(priv->ResetProgress == RESET_TYPE_NORESET)
3360 {
3361 write_nic_byte(dev, ANAPAR, 0x37);
3362 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
3363 // Joseph increae the time to prevent firmware download fail
3364 mdelay(500);
3365 }
3366#endif
3367 //PlatformSleepUs(10000);
3368 // For any kind of InitializeAdapter process, we shall use system now!!
3369 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
3370
3371 // Set to eRfoff in order not to count receive count.
3372 if(priv->RegRfOff == TRUE)
3373 priv->ieee80211->eRFPowerState = eRfOff;
3374
3375 //
3376 //3 //Config CPUReset Register
3377 //3//
3378 //3 Firmware Reset Or Not
3379 ulRegRead = read_nic_dword(dev, CPU_GEN);
3380 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
3381 { //called from MPInitialized. do nothing
3382 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3383 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
3384 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
3385 else
3386 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
3387
3388#ifdef RTL8190P
3389 //2008.06.03, for WOL 90 hw bug
3390 ulRegRead &= (~(CPU_GEN_GPIO_UART));
3391#endif
3392
3393 write_nic_dword(dev, CPU_GEN, ulRegRead);
3394 //mdelay(100);
3395
3396#ifdef RTL8192E
3397
3398 //3//
3399 //3 //Fix the issue of E-cut high temperature issue
3400 //3//
3401 // TODO: E cut only
3402 ICVersion = read_nic_byte(dev, IC_VERRSION);
3403 if(ICVersion >= 0x4) //E-cut only
3404 {
3405 // HW SD suggest that we should not wirte this register too often, so driver
3406 // should readback this register. This register will be modified only when
3407 // power on reset
3408 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
3409 if(SwitchingRegulatorOutput != 0xb8)
3410 {
3411 write_nic_byte(dev, SWREGULATOR, 0xa8);
3412 mdelay(1);
3413 write_nic_byte(dev, SWREGULATOR, 0xb8);
3414 }
3415 }
3416#endif
3417
3418
3419 //3//
3420 //3// Initialize BB before MAC
3421 //3//
ecdfa446
GKH		 3422 RT_TRACE(COMP_INIT, "BB Config Start!\n");
3423 rtStatus = rtl8192_BBConfig(dev);
3424 if(rtStatus != RT_STATUS_SUCCESS)
3425 {
3426 RT_TRACE(COMP_ERR, "BB Config failed\n");
3427 return rtStatus;
3428 }
3429 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
3430
ecdfa446
GKH		 3431 //3//Set Loopback mode or Normal mode
3432 //3//
3433 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
3434 // because setting of System_Reset bit reset MAC to default transmission mode.
3435 //Loopback mode or not
3436 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
3437 //priv->LoopbackMode = RTL819X_MAC_LOOPBACK;
3438 if(priv->ResetProgress == RESET_TYPE_NORESET)
3439 {
3440 ulRegRead = read_nic_dword(dev, CPU_GEN);
3441 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
3442 {
3443 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
3444 }
3445 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
3446 {
3447 ulRegRead |= CPU_CCK_LOOPBACK;
3448 }
3449 else
3450 {
3451 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
3452 }
3453
3454 //2008.06.03, for WOL
3455 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3456 write_nic_dword(dev, CPU_GEN, ulRegRead);
3457
3458 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
3459 udelay(500);
3460 }
3461 //3Set Hardware(Do nothing now)
3462 rtl8192_hwconfig(dev);
3463 //2=======================================================
3464 // Common Setting for all of the FPGA platform. (part 1)
3465 //2=======================================================
3466 // If there is changes, please make sure it applies to all of the FPGA version
3467 //3 Turn on Tx/Rx
3468 write_nic_byte(dev, CMDR, CR_RE|CR_TE);
3469
3470 //2Set Tx dma burst
3471#ifdef RTL8190P
207b58fb
MM		 3472 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
3473 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) |
3474 (1<<MULRW_SHIFT)));
ecdfa446
GKH		 3475#else
3476 #ifdef RTL8192E
207b58fb 3477 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
ecdfa446
GKH		 3478 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
3479 #endif
3480#endif
3481 //set IDR0 here
3482 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
3483 write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
3484 //set RCR
3485 write_nic_dword(dev, RCR, priv->ReceiveConfig);
3486
3487 //3 Initialize Number of Reserved Pages in Firmware Queue
3488 #ifdef TO_DO_LIST
3489 if(priv->bInHctTest)
3490 {
207b58fb
MM		 3491 PlatformEFIOWrite4Byte(Adapter, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
3492 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
3493 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446
GKH		 3494 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3495 PlatformEFIOWrite4Byte(Adapter, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
207b58fb
MM		 3496 PlatformEFIOWrite4Byte(Adapter, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
3497 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 3498 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3499 }
3500 else
3501 #endif
3502 {
207b58fb
MM		 3503 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
3504 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
3505 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446
GKH		 3506 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3507 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
207b58fb
MM		 3508 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
3509 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 3510 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3511 }
3512
3513 rtl8192_tx_enable(dev);
3514 rtl8192_rx_enable(dev);
3515 //3Set Response Rate Setting Register
3516 // CCK rate is supported by default.
3517 // CCK rate will be filtered out only when associated AP does not support it.
3518 ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
3519 write_nic_dword(dev, RRSR, ulRegRead);
3520 write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
3521
3522 //2Set AckTimeout
3523 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3524 write_nic_byte(dev, ACK_TIMEOUT, 0x30);
3525
3526 //rtl8192_actset_wirelessmode(dev,priv->RegWirelessMode);
3527 if(priv->ResetProgress == RESET_TYPE_NORESET)
3528 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
3529 //-----------------------------------------------------------------------------
3530 // Set up security related. 070106, by rcnjko:
3531 // 1. Clear all H/W keys.
3532 // 2. Enable H/W encryption/decryption.
3533 //-----------------------------------------------------------------------------
3534 CamResetAllEntry(dev);
3535 {
3536 u8 SECR_value = 0x0;
3537 SECR_value |= SCR_TxEncEnable;
3538 SECR_value |= SCR_RxDecEnable;
3539 SECR_value |= SCR_NoSKMC;
3540 write_nic_byte(dev, SECR, SECR_value);
3541 }
3542 //3Beacon related
3543 write_nic_word(dev, ATIMWND, 2);
3544 write_nic_word(dev, BCN_INTERVAL, 100);
5e1ad18a 3545 for (i=0; i<QOS_QUEUE_NUM; i++)
ecdfa446 3546 write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 3547 //
3548 // Switching regulator controller: This is set temporarily.
3549 // It's not sure if this can be removed in the future.
3550 // PJ advised to leave it by default.
3551 //
3552 write_nic_byte(dev, 0xbe, 0xc0);
3553
3554 //2=======================================================
3555 // Set PHY related configuration defined in MAC register bank
3556 //2=======================================================
3557 rtl8192_phy_configmac(dev);
3558
3559 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
3560 rtl8192_phy_getTxPower(dev);
3561 rtl8192_phy_setTxPower(dev, priv->chan);
3562 }
3563
3564 //if D or C cut
3565 tmpvalue = read_nic_byte(dev, IC_VERRSION);
3566 priv->IC_Cut = tmpvalue;
3567 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
3568 if(priv->IC_Cut >= IC_VersionCut_D)
3569 {
3570 //pHalData->bDcut = TRUE;
3571 if(priv->IC_Cut == IC_VersionCut_D)
3572 RT_TRACE(COMP_INIT, "D-cut\n");
3573 if(priv->IC_Cut == IC_VersionCut_E)
3574 {
3575 RT_TRACE(COMP_INIT, "E-cut\n");
3576 // HW SD suggest that we should not wirte this register too often, so driver
3577 // should readback this register. This register will be modified only when
3578 // power on reset
3579 }
3580 }
3581 else
3582 {
3583 //pHalData->bDcut = FALSE;
3584 RT_TRACE(COMP_INIT, "Before C-cut\n");
3585 }
3586
3587#if 1
3588 //Firmware download
3589 RT_TRACE(COMP_INIT, "Load Firmware!\n");
3590 bfirmwareok = init_firmware(dev);
3591 if(bfirmwareok != true) {
3592 rtStatus = RT_STATUS_FAILURE;
3593 return rtStatus;
3594 }
3595 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
3596#endif
3597 //RF config
3598 if(priv->ResetProgress == RESET_TYPE_NORESET)
3599 {
3600 RT_TRACE(COMP_INIT, "RF Config Started!\n");
3601 rtStatus = rtl8192_phy_RFConfig(dev);
3602 if(rtStatus != RT_STATUS_SUCCESS)
3603 {
3604 RT_TRACE(COMP_ERR, "RF Config failed\n");
3605 return rtStatus;
3606 }
3607 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
3608 }
3609 rtl8192_phy_updateInitGain(dev);
3610
3611 /*---- Set CCK and OFDM Block "ON"----*/
3612 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
3613 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
3614
3615#ifdef RTL8192E
3616 //Enable Led
3617 write_nic_byte(dev, 0x87, 0x0);
3618#endif
3619#ifdef RTL8190P
3620 //2008.06.03, for WOL
3621 ucRegRead = read_nic_byte(dev, GPE);
3622 ucRegRead |= BIT0;
3623 write_nic_byte(dev, GPE, ucRegRead);
3624
3625 ucRegRead = read_nic_byte(dev, GPO);
3626 ucRegRead &= ~BIT0;
3627 write_nic_byte(dev, GPO, ucRegRead);
3628#endif
3629
3630 //2=======================================================
3631 // RF Power Save
3632 //2=======================================================
3633#ifdef ENABLE_IPS
3634
3635{
3636 if(priv->RegRfOff == TRUE)
3637 { // User disable RF via registry.
3638 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__FUNCTION__);
3639 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
3640#if 0//cosa, ask SD3 willis and he doesn't know what is this for
3641 // Those action will be discard in MgntActSet_RF_State because off the same state
3642 for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
3643 PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
3644#endif
3645 }
3646 else if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
3647 { // H/W or S/W RF OFF before sleep.
3648 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3649 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3650 }
3651 else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
3652 { // H/W or S/W RF OFF before sleep.
3653 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3654 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3655 }
3656 else
3657 {
3658 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
3659 priv->ieee80211->eRFPowerState = eRfOn;
3660 priv->ieee80211->RfOffReason = 0;
3661 //DrvIFIndicateCurrentPhyStatus(Adapter);
3662 // LED control
3663 //Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_ON);
3664
3665 //
3666 // If inactive power mode is enabled, disable rf while in disconnected state.
3667 // But we should still tell upper layer we are in rf on state.
3668 // 2007.07.16, by shien chang.
3669 //
3670 //if(!Adapter->bInHctTest)
3671 //IPSEnter(Adapter);
3672
3673 }
3674}
3675#endif
3676 if(1){
3677#ifdef RTL8192E
3678 // We can force firmware to do RF-R/W
3679 if(priv->ieee80211->FwRWRF)
3680 priv->Rf_Mode = RF_OP_By_FW;
3681 else
3682 priv->Rf_Mode = RF_OP_By_SW_3wire;
3683#else
3684 priv->Rf_Mode = RF_OP_By_SW_3wire;
3685#endif
3686 }
3687#ifdef RTL8190P
3688 if(priv->ResetProgress == RESET_TYPE_NORESET)
3689 {
3690 dm_initialize_txpower_tracking(dev);
3691
3692 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3693 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3694
3695 if(priv->rf_type == RF_2T4R){
3696 for(i = 0; i<TxBBGainTableLength; i++)
3697 {
3698 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3699 {
3700 priv->rfa_txpowertrackingindex= (u8)i;
3701 priv->rfa_txpowertrackingindex_real= (u8)i;
3702 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3703 break;
3704 }
3705 }
3706 }
3707 for(i = 0; i<TxBBGainTableLength; i++)
3708 {
3709 if(tmpRegC == priv->txbbgain_table[i].txbbgain_value)
3710 {
3711 priv->rfc_txpowertrackingindex= (u8)i;
3712 priv->rfc_txpowertrackingindex_real= (u8)i;
3713 priv->rfc_txpowertracking_default = priv->rfc_txpowertrackingindex;
3714 break;
3715 }
3716 }
3717 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3718
3719 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3720 {
3721 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3722 {
3723 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3724 break;
3725 }
3726 }
3727 priv->CCKPresentAttentuation_40Mdefault = 0;
3728 priv->CCKPresentAttentuation_difference = 0;
3729 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3730 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3731 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3732 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_initial = %d\n", priv->rfc_txpowertrackingindex);
3733 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real_initial = %d\n", priv->rfc_txpowertrackingindex_real);
3734 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3735 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3736 }
3737#else
3738 #ifdef RTL8192E
3739 if(priv->ResetProgress == RESET_TYPE_NORESET)
3740 {
3741 dm_initialize_txpower_tracking(dev);
3742
3743 if(priv->IC_Cut >= IC_VersionCut_D)
3744 {
3745 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3746 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3747 for(i = 0; i<TxBBGainTableLength; i++)
3748 {
3749 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3750 {
3751 priv->rfa_txpowertrackingindex= (u8)i;
3752 priv->rfa_txpowertrackingindex_real= (u8)i;
3753 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3754 break;
3755 }
3756 }
3757
3758 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3759
3760 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3761 {
3762 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3763 {
3764 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3765 break;
3766 }
3767 }
3768 priv->CCKPresentAttentuation_40Mdefault = 0;
3769 priv->CCKPresentAttentuation_difference = 0;
3770 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3771 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3772 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3773 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3774 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3775 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
3776 }
3777 }
3778 #endif
3779#endif
3780 rtl8192_irq_enable(dev);
3781 priv->being_init_adapter = false;
3782 return rtStatus;
3783
3784}
3785
559fba5e 3786static void rtl8192_prepare_beacon(struct r8192_priv *priv)
ecdfa446
GKH		 3787{
3788 struct sk_buff *skb;
3789 //unsigned long flags;
3790 cb_desc *tcb_desc;
3791
3792 skb = ieee80211_get_beacon(priv->ieee80211);
3793 tcb_desc = (cb_desc *)(skb->cb + 8);
3794 //printk("===========> %s\n", __FUNCTION__);
3795 //spin_lock_irqsave(&priv->tx_lock,flags);
3796 /* prepare misc info for the beacon xmit */
3797 tcb_desc->queue_index = BEACON_QUEUE;
bbc9a991 3798 /* IBSS does not support HT yet, use 1M defaultly */
ecdfa446
GKH		 3799 tcb_desc->data_rate = 2;
3800 tcb_desc->RATRIndex = 7;
3801 tcb_desc->bTxDisableRateFallBack = 1;
3802 tcb_desc->bTxUseDriverAssingedRate = 1;
3803
3804 skb_push(skb, priv->ieee80211->tx_headroom);
3805 if(skb){
3806 rtl8192_tx(priv->ieee80211->dev,skb);
3807 }
3808 //spin_unlock_irqrestore (&priv->tx_lock, flags);
3809}
3810
ecdfa446
GKH		 3811
3812/* this configures registers for beacon tx and enables it via
3813 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
3814 * be used to stop beacon transmission
3815 */
559fba5e 3816static void rtl8192_start_beacon(struct net_device *dev)
ecdfa446
GKH		 3817{
3818 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3819 struct ieee80211_network *net = &priv->ieee80211->current_network;
3820 u16 BcnTimeCfg = 0;
3821 u16 BcnCW = 6;
3822 u16 BcnIFS = 0xf;
3823
3824 DMESG("Enabling beacon TX");
3825 //rtl8192_prepare_beacon(dev);
3826 rtl8192_irq_disable(dev);
3827 //rtl8192_beacon_tx_enable(dev);
3828
3829 /* ATIM window */
3830 write_nic_word(dev, ATIMWND, 2);
3831
3832 /* Beacon interval (in unit of TU) */
3833 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
3834
3835 /*
3836 * DrvErlyInt (in unit of TU).
3837 * (Time to send interrupt to notify driver to c
3838 * hange beacon content)
3839 * */
3840 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
3841
3842 /*
3843 * BcnDMATIM(in unit of us).
3844 * Indicates the time before TBTT to perform beacon queue DMA
3845 * */
3846 write_nic_word(dev, BCN_DMATIME, 256);
3847
3848 /*
3849 * Force beacon frame transmission even after receiving
3850 * beacon frame from other ad hoc STA
3851 * */
3852 write_nic_byte(dev, BCN_ERR_THRESH, 100);
3853
3854 /* Set CW and IFS */
3855 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
3856 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3857 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
3858
3859
3860 /* enable the interrupt for ad-hoc process */
3861 rtl8192_irq_enable(dev);
3862}
3863/***************************************************************************
3864 -------------------------------NET STUFF---------------------------
3865***************************************************************************/
ecdfa446
GKH		 3866
3867
3868
5e1ad18a 3869static bool HalTxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3870{
3871 u16 RegTxCounter = read_nic_word(dev, 0x128);
3872 struct r8192_priv *priv = ieee80211_priv(dev);
3873 bool bStuck = FALSE;
3874 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
3875 if(priv->TxCounter==RegTxCounter)
3876 bStuck = TRUE;
3877
3878 priv->TxCounter = RegTxCounter;
3879
3880 return bStuck;
3881}
3882
3883/*
3884* <Assumption: RT_TX_SPINLOCK is acquired.>
3885* First added: 2006.11.19 by emily
3886*/
5e1ad18a 3887static RESET_TYPE
ecdfa446
GKH		 3888TxCheckStuck(struct net_device *dev)
3889{
3890 struct r8192_priv *priv = ieee80211_priv(dev);
3891 u8 QueueID;
3892 ptx_ring head=NULL,tail=NULL,txring = NULL;
3893 u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3894 bool bCheckFwTxCnt = false;
3895 //unsigned long flags;
3896
3897 //
3898 // Decide Stuch threshold according to current power save mode
3899 //
3900 //printk("++++++++++++>%s()\n",__FUNCTION__);
3901 switch (priv->ieee80211->dot11PowerSaveMode)
3902 {
3903 // The threshold value may required to be adjusted .
3904 case eActive: // Active/Continuous access.
3905 ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
3906 break;
3907 case eMaxPs: // Max power save mode.
3908 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3909 break;
3910 case eFastPs: // Fast power save mode.
3911 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3912 break;
3913 }
3914
3915 //
3916 // Check whether specific tcb has been queued for a specific time
3917 //
3918 for(QueueID = 0; QueueID < MAX_TX_QUEUE; QueueID++)
3919 {
3920
3921
3922 if(QueueID == TXCMD_QUEUE)
3923 continue;
3924
3925 switch(QueueID) {
3926 case MGNT_QUEUE:
3927 tail=priv->txmapringtail;
3928 head=priv->txmapringhead;
3929 break;
3930
3931 case BK_QUEUE:
3932 tail=priv->txbkpringtail;
3933 head=priv->txbkpringhead;
3934 break;
3935
3936 case BE_QUEUE:
3937 tail=priv->txbepringtail;
3938 head=priv->txbepringhead;
3939 break;
3940
3941 case VI_QUEUE:
3942 tail=priv->txvipringtail;
3943 head=priv->txvipringhead;
3944 break;
3945
3946 case VO_QUEUE:
3947 tail=priv->txvopringtail;
3948 head=priv->txvopringhead;
3949 break;
3950
3951 default:
3952 tail=head=NULL;
3953 break;
3954 }
3955
3956 if(tail == head)
3957 continue;
3958 else
3959 {
3960 txring = head;
3961 if(txring == NULL)
3962 {
3963 RT_TRACE(COMP_ERR,"%s():txring is NULL , BUG!\n",__FUNCTION__);
3964 continue;
3965 }
3966 txring->nStuckCount++;
ecdfa446
GKH		 3967 bCheckFwTxCnt = TRUE;
3968 }
3969 }
3970#if 1
3971 if(bCheckFwTxCnt)
3972 {
3973 if(HalTxCheckStuck8190Pci(dev))
3974 {
3975 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
3976 return RESET_TYPE_SILENT;
3977 }
3978 }
3979#endif
3980 return RESET_TYPE_NORESET;
3981}
3982
3983
5e1ad18a 3984static bool HalRxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3985{
3986 struct r8192_priv *priv = ieee80211_priv(dev);
3987 u16 RegRxCounter = read_nic_word(dev, 0x130);
3988 bool bStuck = FALSE;
3989 static u8 rx_chk_cnt = 0;
3990 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
3991 // If rssi is small, we should check rx for long time because of bad rx.
3992 // or maybe it will continuous silent reset every 2 seconds.
3993 rx_chk_cnt++;
3994 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
3995 {
3996 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
3997 }
3998 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
3999 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
4000 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
4001
4002 {
4003 if(rx_chk_cnt < 2)
4004 {
4005 return bStuck;
4006 }
4007 else
4008 {
4009 rx_chk_cnt = 0;
4010 }
4011 }
4012 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
4013 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
4014 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
4015 {
4016 if(rx_chk_cnt < 4)
4017 {
4018 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
4019 return bStuck;
4020 }
4021 else
4022 {
4023 rx_chk_cnt = 0;
4024 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
4025 }
4026 }
4027 else
4028 {
4029 if(rx_chk_cnt < 8)
4030 {
4031 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
4032 return bStuck;
4033 }
4034 else
4035 {
4036 rx_chk_cnt = 0;
4037 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
4038 }
4039 }
ecdfa446
GKH		 4040 if(priv->RxCounter==RegRxCounter)
4041 bStuck = TRUE;
4042
4043 priv->RxCounter = RegRxCounter;
4044
4045 return bStuck;
4046}
4047
5e1ad18a 4048static RESET_TYPE RxCheckStuck(struct net_device *dev)
ecdfa446
GKH		 4049{
4050
4051 if(HalRxCheckStuck8190Pci(dev))
4052 {
4053 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
4054 return RESET_TYPE_SILENT;
4055 }
4056
4057 return RESET_TYPE_NORESET;
4058}
4059
5e1ad18a 4060static RESET_TYPE
ecdfa446
GKH		 4061rtl819x_ifcheck_resetornot(struct net_device *dev)
4062{
4063 struct r8192_priv *priv = ieee80211_priv(dev);
4064 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
4065 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
4066 RT_RF_POWER_STATE rfState;
4067
4068 rfState = priv->ieee80211->eRFPowerState;
4069
4070 TxResetType = TxCheckStuck(dev);
4071#if 1
4072 if( rfState != eRfOff &&
4073 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
4074 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
4075 {
4076 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
4077 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
4078 // if driver is in firmware download failure status, driver should initialize RF in the following
4079 // silent reset procedure Emily, 2008.01.21
4080
4081 // Driver should not check RX stuck in IBSS mode because it is required to
4082 // set Check BSSID in order to send beacon, however, if check BSSID is
4083 // set, STA cannot hear any packet a all. Emily, 2008.04.12
4084 RxResetType = RxCheckStuck(dev);
4085 }
4086#endif
4087
4088 RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
4089 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
4090 return RESET_TYPE_NORMAL;
4091 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
4092 return RESET_TYPE_SILENT;
4093 else
4094 return RESET_TYPE_NORESET;
4095
4096}
4097
4098
5e1ad18a 4099static void CamRestoreAllEntry(struct net_device *dev)
ecdfa446
GKH		 4100{
4101 u8 EntryId = 0;
4102 struct r8192_priv *priv = ieee80211_priv(dev);
881a975b 4103 const u8* MacAddr = priv->ieee80211->current_network.bssid;
ecdfa446 4104
881a975b 4105 static const u8 CAM_CONST_ADDR[4][6] = {
ecdfa446
GKH		 4106 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
4107 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
4108 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
4109 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
881a975b 4110 static const u8 CAM_CONST_BROAD[] =
ecdfa446
GKH		 4111 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
4112
4113 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
4114
4115
4116 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
4117 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
4118 {
4119
4120 for(EntryId=0; EntryId<4; EntryId++)
4121 {
4122 {
4123 MacAddr = CAM_CONST_ADDR[EntryId];
4124 setKey(dev,
4125 EntryId ,
4126 EntryId,
4127 priv->ieee80211->pairwise_key_type,
4128 MacAddr,
4129 0,
4130 NULL);
4131 }
4132 }
4133
4134 }
4135 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
4136 {
4137
4138 {
4139 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4140 setKey(dev,
4141 4,
4142 0,
4143 priv->ieee80211->pairwise_key_type,
4144 (u8*)dev->dev_addr,
4145 0,
4146 NULL);
4147 else
4148 setKey(dev,
4149 4,
4150 0,
4151 priv->ieee80211->pairwise_key_type,
4152 MacAddr,
4153 0,
4154 NULL);
4155 }
4156 }
4157 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
4158 {
4159
4160 {
4161 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4162 setKey(dev,
4163 4,
4164 0,
4165 priv->ieee80211->pairwise_key_type,
4166 (u8*)dev->dev_addr,
4167 0,
4168 NULL);
4169 else
4170 setKey(dev,
4171 4,
4172 0,
4173 priv->ieee80211->pairwise_key_type,
4174 MacAddr,
4175 0,
4176 NULL);
4177 }
4178 }
4179
4180
4181
4182 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
4183 {
4184 MacAddr = CAM_CONST_BROAD;
4185 for(EntryId=1 ; EntryId<4 ; EntryId++)
4186 {
4187 {
4188 setKey(dev,
4189 EntryId,
4190 EntryId,
4191 priv->ieee80211->group_key_type,
4192 MacAddr,
4193 0,
4194 NULL);
4195 }
4196 }
4197 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4198 setKey(dev,
4199 0,
4200 0,
4201 priv->ieee80211->group_key_type,
4202 CAM_CONST_ADDR[0],
4203 0,
4204 NULL);
4205 }
4206 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
4207 {
4208 MacAddr = CAM_CONST_BROAD;
4209 for(EntryId=1; EntryId<4 ; EntryId++)
4210 {
4211 {
4212 setKey(dev,
4213 EntryId ,
4214 EntryId,
4215 priv->ieee80211->group_key_type,
4216 MacAddr,
4217 0,
4218 NULL);
4219 }
4220 }
4221
4222 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4223 setKey(dev,
4224 0 ,
4225 0,
4226 priv->ieee80211->group_key_type,
4227 CAM_CONST_ADDR[0],
4228 0,
4229 NULL);
4230 }
4231}
4232
ecdfa446
GKH		 4233/*
4234 * This function is used to fix Tx/Rx stop bug temporarily.
4235 * This function will do "system reset" to NIC when Tx or Rx is stuck.
4236 * The method checking Tx/Rx stuck of this function is supported by FW,
4237 * which reports Tx and Rx counter to register 0x128 and 0x130.
4238 * */
5e1ad18a 4239static void rtl819x_ifsilentreset(struct net_device *dev)
ecdfa446
GKH		 4240{
4241 struct r8192_priv *priv = ieee80211_priv(dev);
4242 u8 reset_times = 0;
4243 int reset_status = 0;
4244 struct ieee80211_device *ieee = priv->ieee80211;
4245
4246
65a43784 4247 return;
4248
ecdfa446
GKH		 4249 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
4250 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
4251
4252 if(priv->ResetProgress==RESET_TYPE_NORESET)
4253 {
4254RESET_START:
65a43784 4255#ifdef ENABLE_LPS
4256 //LZM for PS-Poll AID issue. 090429
4257 if(priv->ieee80211->state == IEEE80211_LINKED)
4258 LeisurePSLeave(dev);
4259#endif
ecdfa446
GKH		 4260
4261 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
4262
4263 // Set the variable for reset.
4264 priv->ResetProgress = RESET_TYPE_SILENT;
4265// rtl8192_close(dev);
4266#if 1
4267 down(&priv->wx_sem);
4268 if(priv->up == 0)
4269 {
4270 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
4271 up(&priv->wx_sem);
4272 return ;
4273 }
4274 priv->up = 0;
4275 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
4276 if(!netif_queue_stopped(dev))
4277 netif_stop_queue(dev);
4278
4279 dm_backup_dynamic_mechanism_state(dev);
4280
4281 rtl8192_irq_disable(dev);
4282 rtl8192_cancel_deferred_work(priv);
4283 deinit_hal_dm(dev);
4284 del_timer_sync(&priv->watch_dog_timer);
4285 ieee->sync_scan_hurryup = 1;
4286 if(ieee->state == IEEE80211_LINKED)
4287 {
4288 down(&ieee->wx_sem);
4289 printk("ieee->state is IEEE80211_LINKED\n");
4290 ieee80211_stop_send_beacons(priv->ieee80211);
4291 del_timer_sync(&ieee->associate_timer);
ecdfa446 4292 cancel_delayed_work(&ieee->associate_retry_wq);
ecdfa446 4293 ieee80211_stop_scan(ieee);
ecdfa446
GKH		 4294 up(&ieee->wx_sem);
4295 }
4296 else{
4297 printk("ieee->state is NOT LINKED\n");
65a43784 4298 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446 4299 }
65a43784 4300 rtl8192_halt_adapter(dev, true);
ecdfa446
GKH		 4301 up(&priv->wx_sem);
4302 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
4303 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
4304 reset_status = _rtl8192_up(dev);
4305
4306 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
4307 if(reset_status == -1)
4308 {
4309 if(reset_times < 3)
4310 {
4311 reset_times++;
4312 goto RESET_START;
4313 }
4314 else
4315 {
4316 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__FUNCTION__);
4317 }
4318 }
4319#endif
4320 ieee->is_silent_reset = 1;
4321#if 1
4322 EnableHWSecurityConfig8192(dev);
4323#if 1
4324 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4325 {
4326 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4327
4328#if 1
ecdfa446 4329 queue_work(ieee->wq, &ieee->associate_complete_wq);
ecdfa446
GKH		 4330#endif
4331
4332 }
4333 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
4334 {
4335 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4336 ieee->link_change(ieee->dev);
4337
4338 // notify_wx_assoc_event(ieee);
4339
4340 ieee80211_start_send_beacons(ieee);
4341
4342 if (ieee->data_hard_resume)
4343 ieee->data_hard_resume(ieee->dev);
4344 netif_carrier_on(ieee->dev);
4345 }
4346#endif
4347
4348 CamRestoreAllEntry(dev);
4349
4350 // Restore the previous setting for all dynamic mechanism
4351 dm_restore_dynamic_mechanism_state(dev);
4352
4353 priv->ResetProgress = RESET_TYPE_NORESET;
4354 priv->reset_count++;
4355
4356 priv->bForcedSilentReset =false;
4357 priv->bResetInProgress = false;
4358
4359 // For test --> force write UFWP.
4360 write_nic_byte(dev, UFWP, 1);
4361 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
4362#endif
4363 }
4364}
4365
4366#ifdef ENABLE_IPS
4367void InactivePsWorkItemCallback(struct net_device *dev)
4368{
4369 struct r8192_priv *priv = ieee80211_priv(dev);
4370 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4371 //u8 index = 0;
4372
4373 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n");
4374 //
4375 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
4376 // is really scheduled.
4377 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
4378 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
4379 // blocks the IPS procedure of switching RF.
4380 // By Bruce, 2007-12-25.
4381 //
4382 pPSC->bSwRfProcessing = TRUE;
4383
207b58fb 4384 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
ecdfa446
GKH		 4385 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
4386
4387
4388 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
4389
4390 //
4391 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
4392 //
ecdfa446
GKH		 4393 pPSC->bSwRfProcessing = FALSE;
4394 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n");
4395}
4396
65a43784 4397#ifdef ENABLE_LPS
4398//
4399// Change current and default preamble mode.
4400// 2005.01.06, by rcnjko.
4401//
4402bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode)
4403{
4404 struct r8192_priv *priv = ieee80211_priv(dev);
4405 //PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4406 //u8 RpwmVal, FwPwrMode;
4407
4408 // Currently, we do not change power save mode on IBSS mode.
4409 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4410 {
4411 return false;
4412 }
4413
4414 //
4415 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
4416 // some AP will not response to our mgnt frames with PwrMgt bit set,
4417 // e.g. cannot associate the AP.
4418 // So I commented out it. 2005.02.16, by rcnjko.
4419 //
4420// // Change device's power save mode.
4421// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
4422
4423 // Update power save mode configured.
4424 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
4425 if(!priv->ps_force) {
4426 priv->ieee80211->ps = rtPsMode;
4427 }
4428
4429 // Awake immediately
4430 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
4431 {
4432 unsigned long flags;
4433
4434 //PlatformSetTimer(Adapter, &(pMgntInfo->AwakeTimer), 0);
4435 // Notify the AP we awke.
4436 rtl8192_hw_wakeup(dev);
4437 priv->ieee80211->sta_sleep = 0;
4438
4439 spin_lock_irqsave(&(priv->ieee80211->mgmt_tx_lock), flags);
4440 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
4441 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
4442 spin_unlock_irqrestore(&(priv->ieee80211->mgmt_tx_lock), flags);
4443 }
4444
4445 return true;
4446}
4447
4448//================================================================================
4449// Leisure Power Save in linked state.
4450//================================================================================
4451
4452//
4453// Description:
4454// Enter the leisure power save mode.
4455//
4456void LeisurePSEnter(struct net_device *dev)
4457{
4458 struct r8192_priv *priv = ieee80211_priv(dev);
4459 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4460
4461 //RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
4462 //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
4463 // pPSC->bLeisurePs, priv->ieee80211->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD);
4464
4465 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
4466 (priv->ieee80211->state == IEEE80211_LINKED)) ||
4467 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
4468 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
4469 return;
4470
4471 if (pPSC->bLeisurePs)
4472 {
4473 // Idle for a while if we connect to AP a while ago.
4474 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
4475 {
4476
4477 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
4478 {
4479
4480 //RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n");
4481 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
4482
4483 }
4484 }
4485 else
4486 pPSC->LpsIdleCount++;
4487 }
4488}
4489
4490
4491//
4492// Description:
4493// Leave the leisure power save mode.
4494//
4495void LeisurePSLeave(struct net_device *dev)
4496{
4497 struct r8192_priv *priv = ieee80211_priv(dev);
4498 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4499
4500
4501 //RT_TRACE(COMP_PS, "LeisurePSLeave()...\n");
4502 //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d\n",
4503 // pPSC->bLeisurePs, priv->ieee80211->ps);
4504
4505 if (pPSC->bLeisurePs)
4506 {
4507 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
4508 {
4509 // move to lps_wakecomplete()
4510 //RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
4511 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED);
4512
4513 }
4514 }
4515}
4516#endif
4517
4518
ecdfa446
GKH		 4519//
4520// Description:
4521// Enter the inactive power save mode. RF will be off
4522// 2007.08.17, by shien chang.
4523//
4524void
4525IPSEnter(struct net_device *dev)
4526{
4527 struct r8192_priv *priv = ieee80211_priv(dev);
4528 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4529 RT_RF_POWER_STATE rtState;
4530
4531 if (pPSC->bInactivePs)
4532 {
4533 rtState = priv->ieee80211->eRFPowerState;
4534 //
4535 // Added by Bruce, 2007-12-25.
4536 // Do not enter IPS in the following conditions:
4537 // (1) RF is already OFF or Sleep
4538 // (2) bSwRfProcessing (indicates the IPS is still under going)
4539 // (3) Connectted (only disconnected can trigger IPS)
4540 // (4) IBSS (send Beacon)
4541 // (5) AP mode (send Beacon)
4542 //
4543 if (rtState == eRfOn && !pPSC->bSwRfProcessing
4544 && (priv->ieee80211->state != IEEE80211_LINKED) )
4545 {
4546 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
65a43784 4547 //printk("IPSEnter(): Turn off RF.\n");
ecdfa446
GKH		 4548 pPSC->eInactivePowerState = eRfOff;
4549// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4550 InactivePsWorkItemCallback(dev);
4551 }
4552 }
4553}
4554
4555//
4556// Description:
4557// Leave the inactive power save mode, RF will be on.
4558// 2007.08.17, by shien chang.
4559//
4560void
4561IPSLeave(struct net_device *dev)
4562{
4563 struct r8192_priv *priv = ieee80211_priv(dev);
4564 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4565 RT_RF_POWER_STATE rtState;
4566
4567 if (pPSC->bInactivePs)
4568 {
4569 rtState = priv->ieee80211->eRFPowerState;
4570 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
4571 {
4572 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
65a43784 4573 //printk("IPSLeave(): Turn on RF.\n");
ecdfa446
GKH		 4574 pPSC->eInactivePowerState = eRfOn;
4575// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4576 InactivePsWorkItemCallback(dev);
4577 }
4578 }
4579}
65a43784 4580
4581void IPSLeave_wq(void *data)
4582{
4583 struct ieee80211_device *ieee = container_of(data,struct ieee80211_device,ips_leave_wq);
4584 struct net_device *dev = ieee->dev;
4585
4586 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4587 down(&priv->ieee80211->ips_sem);
4588 IPSLeave(dev);
4589 up(&priv->ieee80211->ips_sem);
4590}
4591
4592void ieee80211_ips_leave_wq(struct net_device *dev)
4593{
4594 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4595 RT_RF_POWER_STATE rtState;
4596 rtState = priv->ieee80211->eRFPowerState;
4597
4598 if(priv->ieee80211->PowerSaveControl.bInactivePs){
4599 if(rtState == eRfOff){
4600 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
4601 {
4602 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
4603 return;
4604 }
4605 else{
4606 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
4607 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
4608 }
4609 }
4610 }
4611}
4612//added by amy 090331 end
4613void ieee80211_ips_leave(struct net_device *dev)
4614{
4615 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4616 down(&priv->ieee80211->ips_sem);
4617 IPSLeave(dev);
4618 up(&priv->ieee80211->ips_sem);
4619}
ecdfa446 4620#endif
ecdfa446 4621
5e1ad18a 4622static void rtl819x_update_rxcounts(
ecdfa446
GKH		 4623 struct r8192_priv *priv,
4624 u32* TotalRxBcnNum,
4625 u32* TotalRxDataNum
4626)
4627{
4628 u16 SlotIndex;
4629 u8 i;
4630
4631 *TotalRxBcnNum = 0;
4632 *TotalRxDataNum = 0;
4633
4634 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
4635 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
4636 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
4637 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
4638 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
4639 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
4640 }
4641}
4642
4643
559fba5e 4644static void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 4645{
4646 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
4647 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
4648 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4649 struct ieee80211_device* ieee = priv->ieee80211;
4650 RESET_TYPE ResetType = RESET_TYPE_NORESET;
4651 static u8 check_reset_cnt=0;
4652 unsigned long flags;
4653 bool bBusyTraffic = false;
4654 static u8 last_time = 0;
65a43784 4655 bool bEnterPS = false;
4656
4657 if((!priv->up) || (priv->bHwRadioOff == true))
4658 return;
4659
ecdfa446
GKH		 4660 if(!priv->up)
4661 return;
4662 hal_dm_watchdog(dev);
4663#ifdef ENABLE_IPS
4664// printk("watch_dog ENABLE_IPS\n");
4665 if(ieee->actscanning == false){
65a43784 4666 //printk("%d,%d,%d,%d\n", ieee->eRFPowerState, ieee->is_set_key, ieee->proto_stoppping, ieee->wx_set_enc);
207b58fb
MM		 4667 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
4668 (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&
65a43784 4669 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
ecdfa446 4670 if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
65a43784 4671 //printk("====================>haha:IPSEnter()\n");
ecdfa446
GKH		 4672 IPSEnter(dev);
4673 //ieee80211_stop_scan(priv->ieee80211);
4674 }
4675 }
4676 }
4677#endif
4678 {//to get busy traffic condition
4679 if(ieee->state == IEEE80211_LINKED)
4680 {
65a43784 4681 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
4682 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
ecdfa446
GKH		 4683 bBusyTraffic = true;
4684 }
4685
65a43784 4686#ifdef ENABLE_LPS
4687 //added by amy for Leisure PS
4688 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
4689 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
4690 {
4691 //printk("ieee->LinkDetectInfo.NumRxUnicastOkInPeriod is %d,ieee->LinkDetectInfo.NumTxOkInPeriod is %d\n",
4692 // ieee->LinkDetectInfo.NumRxUnicastOkInPeriod,ieee->LinkDetectInfo.NumTxOkInPeriod);
4693 bEnterPS= false;
4694 }
4695 else
4696 {
4697 bEnterPS= true;
4698 }
4699
4700 //printk("***bEnterPS = %d\n", bEnterPS);
4701 // LeisurePS only work in infra mode.
4702 if(bEnterPS)
4703 {
4704 LeisurePSEnter(dev);
4705 }
4706 else
4707 {
4708 LeisurePSLeave(dev);
4709 }
4710#endif
4711
4712 }
4713 else
4714 {
4715#ifdef ENABLE_LPS
4716 //RT_TRACE(COMP_LPS,"====>no link LPS leave\n");
4717 LeisurePSLeave(dev);
4718#endif
ecdfa446 4719 }
65a43784 4720
ecdfa446
GKH		 4721 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
4722 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
65a43784 4723 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
ecdfa446
GKH		 4724 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
4725 }
4726
4727
4728 //added by amy for AP roaming
4729 if (1)
4730 {
4731 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4732 {
4733 u32 TotalRxBcnNum = 0;
4734 u32 TotalRxDataNum = 0;
4735
4736 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
4737 if((TotalRxBcnNum+TotalRxDataNum) == 0)
4738 {
4739 if( ieee->eRFPowerState == eRfOff)
4740 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
4741 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
65a43784 4742 // Dot11d_Reset(dev);
ecdfa446
GKH		 4743 ieee->state = IEEE80211_ASSOCIATING;
4744 notify_wx_assoc_event(priv->ieee80211);
65a43784 4745 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
ecdfa446
GKH		 4746 ieee->is_roaming = true;
4747 ieee->is_set_key = false;
65a43784 4748 ieee->link_change(dev);
4749 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 4750 }
4751 }
4752 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
4753 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
4754
4755 }
ecdfa446
GKH		 4756 //check if reset the driver
4757 spin_lock_irqsave(&priv->tx_lock,flags);
4758 if(check_reset_cnt++ >= 3 && !ieee->is_roaming && (last_time != 1))
4759 {
4760 ResetType = rtl819x_ifcheck_resetornot(dev);
4761 check_reset_cnt = 3;
4762 //DbgPrint("Start to check silent reset\n");
4763 }
4764 spin_unlock_irqrestore(&priv->tx_lock,flags);
4765 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
4766 {
4767 priv->ResetProgress = RESET_TYPE_NORMAL;
4768 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
4769 return;
4770 }
4771 /* disable silent reset temply 2008.9.11*/
4772#if 1
4773 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
4774 {
4775 last_time = 1;
4776 rtl819x_ifsilentreset(dev);
4777 }
4778 else
4779 last_time = 0;
4780#endif
4781 priv->force_reset = false;
4782 priv->bForcedSilentReset = false;
4783 priv->bResetInProgress = false;
4784 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
4785
4786}
4787
4788void watch_dog_timer_callback(unsigned long data)
4789{
4790 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
ecdfa446 4791 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 4792 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
4793
4794}
5b3b1a7b
MM		 4795
4796static int _rtl8192_up(struct net_device *dev)
ecdfa446
GKH		 4797{
4798 struct r8192_priv *priv = ieee80211_priv(dev);
4799 //int i;
4800 RT_STATUS init_status = RT_STATUS_SUCCESS;
4801 priv->up=1;
4802 priv->ieee80211->ieee_up=1;
65a43784 4803 priv->bdisable_nic = false; //YJ,add,091111
ecdfa446
GKH		 4804 RT_TRACE(COMP_INIT, "Bringing up iface");
4805
4806 init_status = rtl8192_adapter_start(dev);
4807 if(init_status != RT_STATUS_SUCCESS)
4808 {
4809 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
4810 return -1;
4811 }
4812 RT_TRACE(COMP_INIT, "start adapter finished\n");
4813#ifdef RTL8192E
4814 if(priv->ieee80211->eRFPowerState!=eRfOn)
4815 MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
4816#endif
4817 if(priv->ieee80211->state != IEEE80211_LINKED)
4818 ieee80211_softmac_start_protocol(priv->ieee80211);
4819 ieee80211_reset_queue(priv->ieee80211);
4820 watch_dog_timer_callback((unsigned long) dev);
4821 if(!netif_queue_stopped(dev))
4822 netif_start_queue(dev);
4823 else
4824 netif_wake_queue(dev);
4825
4826 return 0;
4827}
4828
4829
5e1ad18a 4830static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 4831{
4832 struct r8192_priv *priv = ieee80211_priv(dev);
4833 int ret;
4834
4835 down(&priv->wx_sem);
4836 ret = rtl8192_up(dev);
4837 up(&priv->wx_sem);
4838 return ret;
4839
4840}
4841
4842
4843int rtl8192_up(struct net_device *dev)
4844{
4845 struct r8192_priv *priv = ieee80211_priv(dev);
4846
4847 if (priv->up == 1) return -1;
4848
4849 return _rtl8192_up(dev);
4850}
4851
4852
5e1ad18a 4853static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 4854{
4855 struct r8192_priv *priv = ieee80211_priv(dev);
4856 int ret;
4857
4858 down(&priv->wx_sem);
4859
4860 ret = rtl8192_down(dev);
4861
4862 up(&priv->wx_sem);
4863
4864 return ret;
4865
4866}
4867
4868int rtl8192_down(struct net_device *dev)
4869{
4870 struct r8192_priv *priv = ieee80211_priv(dev);
4871// int i;
4872#if 0
4873 u8 ucRegRead;
4874 u32 ulRegRead;
4875#endif
4876 if (priv->up == 0) return -1;
4877
65a43784 4878#ifdef ENABLE_LPS
4879 //LZM for PS-Poll AID issue. 090429
4880 if(priv->ieee80211->state == IEEE80211_LINKED)
4881 LeisurePSLeave(dev);
4882#endif
4883
ecdfa446
GKH		 4884 priv->up=0;
4885 priv->ieee80211->ieee_up = 0;
4886 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
4887/* FIXME */
4888 if (!netif_queue_stopped(dev))
4889 netif_stop_queue(dev);
4890
4891 rtl8192_irq_disable(dev);
4892#if 0
4893 if(!priv->ieee80211->bSupportRemoteWakeUp) {
4894 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
4895 // 2006.11.30. System reset bit
4896 ulRegRead = read_nic_dword(dev, CPU_GEN);
4897 ulRegRead|=CPU_GEN_SYSTEM_RESET;
4898 write_nic_dword(dev, CPU_GEN, ulRegRead);
4899 } else {
4900 //2008.06.03 for WOL
4901 write_nic_dword(dev, WFCRC0, 0xffffffff);
4902 write_nic_dword(dev, WFCRC1, 0xffffffff);
4903 write_nic_dword(dev, WFCRC2, 0xffffffff);
4904#ifdef RTL8190P
4905 //GPIO 0 = TRUE
4906 ucRegRead = read_nic_byte(dev, GPO);
4907 ucRegRead |= BIT0;
4908 write_nic_byte(dev, GPO, ucRegRead);
4909#endif
4910 //Write PMR register
4911 write_nic_byte(dev, PMR, 0x5);
4912 //Disable tx, enanble rx
4913 write_nic_byte(dev, MacBlkCtrl, 0xa);
4914 }
4915#endif
4916// flush_scheduled_work();
4917 rtl8192_cancel_deferred_work(priv);
4918 deinit_hal_dm(dev);
4919 del_timer_sync(&priv->watch_dog_timer);
4920
65a43784 4921 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
4922
4923 rtl8192_halt_adapter(dev,false);
ecdfa446
GKH		 4924 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
4925
4926 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
4927
4928 return 0;
4929}
4930
4931
4932void rtl8192_commit(struct net_device *dev)
4933{
4934 struct r8192_priv *priv = ieee80211_priv(dev);
4935
4936 if (priv->up == 0) return ;
4937
4938
65a43784 4939 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446
GKH		 4940
4941 rtl8192_irq_disable(dev);
65a43784 4942 rtl8192_halt_adapter(dev,true);
ecdfa446
GKH		 4943 _rtl8192_up(dev);
4944}
4945
5b3b1a7b 4946static void rtl8192_restart(struct work_struct *work)
ecdfa446
GKH		 4947{
4948 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
4949 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4950
4951 down(&priv->wx_sem);
4952
4953 rtl8192_commit(dev);
4954
4955 up(&priv->wx_sem);
4956}
4957
4958static void r8192_set_multicast(struct net_device *dev)
4959{
4960 struct r8192_priv *priv = ieee80211_priv(dev);
4961 short promisc;
4962
4963 //down(&priv->wx_sem);
4964
4965 /* FIXME FIXME */
4966
4967 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4968
4969 if (promisc != priv->promisc) {
4970 ;
4971 // rtl8192_commit(dev);
4972 }
4973
4974 priv->promisc = promisc;
4975
4976 //schedule_work(&priv->reset_wq);
4977 //up(&priv->wx_sem);
4978}
4979
4980
5e1ad18a 4981static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 4982{
4983 struct r8192_priv *priv = ieee80211_priv(dev);
4984 struct sockaddr *addr = mac;
4985
4986 down(&priv->wx_sem);
4987
4988 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
4989
ecdfa446 4990 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 4991 up(&priv->wx_sem);
4992
4993 return 0;
4994}
4995
4996/* based on ipw2200 driver */
5e1ad18a 4997static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 4998{
4999 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5000 struct iwreq *wrq = (struct iwreq *)rq;
5001 int ret=-1;
5002 struct ieee80211_device *ieee = priv->ieee80211;
5003 u32 key[4];
5004 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5005 struct iw_point *p = &wrq->u.data;
5006 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5007
5008 down(&priv->wx_sem);
5009
5010
5011 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5012 ret = -EINVAL;
5013 goto out;
5014 }
5015
32414878 5016 ipw = kmalloc(p->length, GFP_KERNEL);
ecdfa446
GKH		 5017 if (ipw == NULL){
5018 ret = -ENOMEM;
5019 goto out;
5020 }
5021 if (copy_from_user(ipw, p->pointer, p->length)) {
5022 kfree(ipw);
5023 ret = -EFAULT;
5024 goto out;
5025 }
5026
5027 switch (cmd) {
5028 case RTL_IOCTL_WPA_SUPPLICANT:
5029 //parse here for HW security
5030 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5031 {
5032 if (ipw->u.crypt.set_tx)
5033 {
5034 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5035 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5036 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5037 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5038 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5039 {
5040 if (ipw->u.crypt.key_len == 13)
5041 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5042 else if (ipw->u.crypt.key_len == 5)
5043 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5044 }
5045 else
5046 ieee->pairwise_key_type = KEY_TYPE_NA;
5047
5048 if (ieee->pairwise_key_type)
5049 {
5050 memcpy((u8*)key, ipw->u.crypt.key, 16);
5051 EnableHWSecurityConfig8192(dev);
5052 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5053 //added by WB.
5054 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5055 if (ieee->auth_mode != 2) //LEAP WEP will never set this.
5056 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5057 }
5058 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
5059 write_nic_byte(dev, 0x173, 1); //fix aes bug
5060 }
5061
5062 }
5063 else //if (ipw->u.crypt.idx) //group key use idx > 0
5064 {
5065 memcpy((u8*)key, ipw->u.crypt.key, 16);
5066 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5067 ieee->group_key_type= KEY_TYPE_CCMP;
5068 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5069 ieee->group_key_type = KEY_TYPE_TKIP;
5070 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5071 {
5072 if (ipw->u.crypt.key_len == 13)
5073 ieee->group_key_type = KEY_TYPE_WEP104;
5074 else if (ipw->u.crypt.key_len == 5)
5075 ieee->group_key_type = KEY_TYPE_WEP40;
5076 }
5077 else
5078 ieee->group_key_type = KEY_TYPE_NA;
5079
5080 if (ieee->group_key_type)
5081 {
5082 setKey( dev,
5083 ipw->u.crypt.idx,
5084 ipw->u.crypt.idx, //KeyIndex
5085 ieee->group_key_type, //KeyType
5086 broadcast_addr, //MacAddr
5087 0, //DefaultKey
5088 key); //KeyContent
5089 }
5090 }
5091 }
5092#ifdef JOHN_DEBUG
5093 //john's test 0711
5094 {
5095 int i;
5096 printk("@@ wrq->u pointer = ");
5097 for(i=0;i<wrq->u.data.length;i++){
5098 if(i%10==0) printk("\n");
5099 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5100 }
5101 printk("\n");
5102 }
5103#endif /*JOHN_DEBUG*/
5104 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5105 break;
5106
5107 default:
5108 ret = -EOPNOTSUPP;
5109 break;
5110 }
5111
5112 kfree(ipw);
5113out:
5114 up(&priv->wx_sem);
5115
5116 return ret;
5117}
5118
5e1ad18a 5119static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 5120{
5121 u8 ret_rate = 0x02;
5122
5123 if(!bIsHT) {
5124 switch(rate) {
5125 case DESC90_RATE1M: ret_rate = MGN_1M; break;
5126 case DESC90_RATE2M: ret_rate = MGN_2M; break;
5127 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
5128 case DESC90_RATE11M: ret_rate = MGN_11M; break;
5129 case DESC90_RATE6M: ret_rate = MGN_6M; break;
5130 case DESC90_RATE9M: ret_rate = MGN_9M; break;
5131 case DESC90_RATE12M: ret_rate = MGN_12M; break;
5132 case DESC90_RATE18M: ret_rate = MGN_18M; break;
5133 case DESC90_RATE24M: ret_rate = MGN_24M; break;
5134 case DESC90_RATE36M: ret_rate = MGN_36M; break;
5135 case DESC90_RATE48M: ret_rate = MGN_48M; break;
5136 case DESC90_RATE54M: ret_rate = MGN_54M; break;
5137
5138 default:
5139 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5140 break;
5141 }
5142
5143 } else {
5144 switch(rate) {
5145 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
5146 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
5147 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
5148 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
5149 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
5150 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
5151 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
5152 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
5153 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
5154 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
5155 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
5156 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
5157 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
5158 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
5159 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
5160 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
5161 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
5162
5163 default:
5164 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
5165 break;
5166 }
5167 }
5168
5169 return ret_rate;
5170}
5171
5172/**
5173 * Function: UpdateRxPktTimeStamp
5174 * Overview: Recored down the TSF time stamp when receiving a packet
5175 *
5176 * Input:
5177 * PADAPTER Adapter
5178 * PRT_RFD pRfd,
5179 *
5180 * Output:
5181 * PRT_RFD pRfd
5182 * (pRfd->Status.TimeStampHigh is updated)
5183 * (pRfd->Status.TimeStampLow is updated)
5184 * Return:
5185 * None
5186 */
5e1ad18a 5187static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
ecdfa446
GKH		 5188{
5189 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5190
5191 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
5192 stats->mac_time[0] = priv->LastRxDescTSFLow;
5193 stats->mac_time[1] = priv->LastRxDescTSFHigh;
5194 } else {
5195 priv->LastRxDescTSFLow = stats->mac_time[0];
5196 priv->LastRxDescTSFHigh = stats->mac_time[1];
5197 }
5198}
5199
5e1ad18a 5200static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 5201{
5202 long signal_power; // in dBm.
5203
5204 // Translate to dBm (x=0.5y-95).
5205 signal_power = (long)((signal_strength_index + 1) >> 1);
5206 signal_power -= 95;
5207
5208 return signal_power;
5209}
5210
5211//
5212// Description:
5213// Update Rx signal related information in the packet reeived
5214// to RxStats. User application can query RxStats to realize
5215// current Rx signal status.
5216//
5217// Assumption:
5218// In normal operation, user only care about the information of the BSS
5219// and we shall invoke this function if the packet received is from the BSS.
5220//
5e1ad18a 5221static void
ecdfa446
GKH		 5222rtl819x_update_rxsignalstatistics8190pci(
5223 struct r8192_priv * priv,
5224 struct ieee80211_rx_stats * pprevious_stats
5225 )
5226{
5227 int weighting = 0;
5228
5229 //2 <ToDo> Update Rx Statistics (such as signal strength and signal quality).
5230
5231 // Initila state
5232 if(priv->stats.recv_signal_power == 0)
5233 priv->stats.recv_signal_power = pprevious_stats->RecvSignalPower;
5234
5235 // To avoid the past result restricting the statistics sensitivity, weight the current power (5/6) to speed up the
5236 // reaction of smoothed Signal Power.
5237 if(pprevious_stats->RecvSignalPower > priv->stats.recv_signal_power)
5238 weighting = 5;
5239 else if(pprevious_stats->RecvSignalPower < priv->stats.recv_signal_power)
5240 weighting = (-5);
5241 //
5242 // We need more correct power of received packets and the "SignalStrength" of RxStats have been beautified or translated,
5243 // so we record the correct power in Dbm here. By Bruce, 2008-03-07.
5244 //
5245 priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pprevious_stats->RecvSignalPower + weighting) / 6;
5246}
5247
5e1ad18a 5248static void
ecdfa446
GKH		 5249rtl8190_process_cck_rxpathsel(
5250 struct r8192_priv * priv,
5251 struct ieee80211_rx_stats * pprevious_stats
5252 )
5253{
5254#ifdef RTL8190P //Only 90P 2T4R need to check
5255 char last_cck_adc_pwdb[4]={0,0,0,0};
5256 u8 i;
5257//cosa add for Rx path selection
5258 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
5259 {
5260 if(pprevious_stats->bIsCCK &&
5261 (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
5262 {
5263 /* record the cck adc_pwdb to the sliding window. */
5264 if(priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
5265 {
5266 priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
5267 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5268 {
5269 last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
5270 priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
5271 }
5272 }
5273 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5274 {
5275 priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
5276 priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
5277 }
5278 priv->stats.cck_adc_pwdb.index++;
5279 if(priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
5280 priv->stats.cck_adc_pwdb.index = 0;
5281
5282 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5283 {
5284 DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
5285 }
5286
5287 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5288 {
5289 if(pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
5290 {
5291 priv->undecorated_smoothed_cck_adc_pwdb[i] =
5292 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
5293 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
5294 priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
5295 }
5296 else
5297 {
5298 priv->undecorated_smoothed_cck_adc_pwdb[i] =
5299 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
5300 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
5301 }
5302 }
5303 }
5304 }
5305#endif
5306}
5307
5308
5309/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
5310 be a local static. Otherwise, it may increase when we return from S3/S4. The
5311 value will be kept in memory or disk. We must delcare the value in adapter
5312 and it will be reinitialized when return from S3/S4. */
5e1ad18a 5313static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 5314{
5315 bool bcheck = false;
5316 u8 rfpath;
5317 u32 nspatial_stream, tmp_val;
5318 //u8 i;
5319 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
5320 static u32 slide_evm_index=0, slide_evm_statistics=0;
5321 static u32 last_rssi=0, last_evm=0;
5322 //cosa add for rx path selection
5323// static long slide_cck_adc_pwdb_index=0, slide_cck_adc_pwdb_statistics=0;
5324// static char last_cck_adc_pwdb[4]={0,0,0,0};
5325 //cosa add for beacon rssi smoothing
5326 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
5327 static u32 last_beacon_adc_pwdb=0;
5328
5329 struct ieee80211_hdr_3addr *hdr;
5330 u16 sc ;
5331 unsigned int frag,seq;
5332 hdr = (struct ieee80211_hdr_3addr *)buffer;
5333 sc = le16_to_cpu(hdr->seq_ctl);
5334 frag = WLAN_GET_SEQ_FRAG(sc);
5335 seq = WLAN_GET_SEQ_SEQ(sc);
5336 //cosa add 04292008 to record the sequence number
5337 pcurrent_stats->Seq_Num = seq;
5338 //
5339 // Check whether we should take the previous packet into accounting
5340 //
5341 if(!pprevious_stats->bIsAMPDU)
5342 {
5343 // if previous packet is not aggregated packet
5344 bcheck = true;
5345 }else
5346 {
5347//remve for that we don't use AMPDU to calculate PWDB,because the reported PWDB of some AP is fault.
5348#if 0
5349 // if previous packet is aggregated packet, and current packet
5350 // (1) is not AMPDU
5351 // (2) is the first packet of one AMPDU
5352 // that means the previous packet is the last one aggregated packet
5353 if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
5354 bcheck = true;
5355#endif
5356 }
5357
5358 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
5359 {
5360 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
5361 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
5362 priv->stats.slide_rssi_total -= last_rssi;
5363 }
5364 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
5365
5366 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
5367 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
5368 slide_rssi_index = 0;
5369
5370 // <1> Showed on UI for user, in dbm
5371 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
5372 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
5373 pcurrent_stats->rssi = priv->stats.signal_strength;
5374 //
5375 // If the previous packet does not match the criteria, neglect it
5376 //
5377 if(!pprevious_stats->bPacketMatchBSSID)
5378 {
5379 if(!pprevious_stats->bToSelfBA)
5380 return;
5381 }
5382
5383 if(!bcheck)
5384 return;
5385
5386 rtl8190_process_cck_rxpathsel(priv,pprevious_stats);
5387
5388 //
5389 // Check RSSI
5390 //
5391 priv->stats.num_process_phyinfo++;
5392#if 0
5393 /* record the general signal strength to the sliding window. */
5394 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
5395 {
5396 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
5397 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
5398 priv->stats.slide_rssi_total -= last_rssi;
5399 }
5400 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
5401
5402 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
5403 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
5404 slide_rssi_index = 0;
5405
5406 // <1> Showed on UI for user, in dbm
5407 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
5408 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
5409
5410#endif
5411 // <2> Showed on UI for engineering
5412 // hardware does not provide rssi information for each rf path in CCK
5413 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
5414 {
5415 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
5416 {
5417 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
5418 continue;
5419 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
5420 //Fixed by Jacken 2008-03-20
5421 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
5422 {
5423 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
5424 //DbgPrint("MIMO RSSI initialize \n");
5425 }
5426 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
5427 {
5428 priv->stats.rx_rssi_percentage[rfpath] =
5429 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
5430 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
5431 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
5432 }
5433 else
5434 {
5435 priv->stats.rx_rssi_percentage[rfpath] =
5436 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
5437 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
5438 }
5439 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
5440 }
5441 }
5442
5443
5444 //
5445 // Check PWDB.
5446 //
5447 //cosa add for beacon rssi smoothing by average.
5448 if(pprevious_stats->bPacketBeacon)
5449 {
5450 /* record the beacon pwdb to the sliding window. */
5451 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
5452 {
5453 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
5454 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
5455 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
5456 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
5457 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
5458 }
5459 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
5460 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
5461 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
5462 slide_beacon_adc_pwdb_index++;
5463 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
5464 slide_beacon_adc_pwdb_index = 0;
5465 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
5466 if(pprevious_stats->RxPWDBAll >= 3)
5467 pprevious_stats->RxPWDBAll -= 3;
5468 }
5469
5470 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
5471 pprevious_stats->bIsCCK? "CCK": "OFDM",
5472 pprevious_stats->RxPWDBAll);
5473
5474 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5475 {
5476 if(priv->undecorated_smoothed_pwdb < 0) // initialize
5477 {
5478 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
5479 //DbgPrint("First pwdb initialize \n");
5480 }
5481#if 1
5482 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
5483 {
5484 priv->undecorated_smoothed_pwdb =
5485 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5486 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5487 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
5488 }
5489 else
5490 {
5491 priv->undecorated_smoothed_pwdb =
5492 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5493 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5494 }
5495#else
5496 //Fixed by Jacken 2008-03-20
5497 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
5498 {
5499 pHalData->UndecoratedSmoothedPWDB =
5500 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5501 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
5502 }
5503 else
5504 {
5505 pHalData->UndecoratedSmoothedPWDB =
5506 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5507 }
5508#endif
5509 rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
5510 }
5511
5512 //
5513 // Check EVM
5514 //
5515 /* record the general EVM to the sliding window. */
5516 if(pprevious_stats->SignalQuality == 0)
5517 {
5518 }
5519 else
5520 {
5521 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
5522 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
5523 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
5524 last_evm = priv->stats.slide_evm[slide_evm_index];
5525 priv->stats.slide_evm_total -= last_evm;
5526 }
5527
5528 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
5529
5530 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
5531 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
5532 slide_evm_index = 0;
5533
5534 // <1> Showed on UI for user, in percentage.
5535 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
5536 priv->stats.signal_quality = tmp_val;
5537 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
5538 priv->stats.last_signal_strength_inpercent = tmp_val;
5539 }
5540
5541 // <2> Showed on UI for engineering
5542 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5543 {
5544 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
5545 {
5546 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
5547 {
5548 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
5549 {
5550 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
5551 }
5552 priv->stats.rx_evm_percentage[nspatial_stream] =
5553 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
5554 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
5555 }
5556 }
5557 }
5558 }
5559
5560}
5561
5562/*-----------------------------------------------------------------------------
5563 * Function: rtl819x_query_rxpwrpercentage()
5564 *
5565 * Overview:
5566 *
5567 * Input: char antpower
5568 *
5569 * Output: NONE
5570 *
5571 * Return: 0-100 percentage
5572 *
5573 * Revised History:
5574 * When Who Remark
5575 * 05/26/2008 amy Create Version 0 porting from windows code.
5576 *
5577 *---------------------------------------------------------------------------*/
5578static u8 rtl819x_query_rxpwrpercentage(
5579 char antpower
5580 )
5581{
5582 if ((antpower <= -100) || (antpower >= 20))
5583 {
5584 return 0;
5585 }
5586 else if (antpower >= 0)
5587 {
5588 return 100;
5589 }
5590 else
5591 {
5592 return (100+antpower);
5593 }
5594
5595} /* QueryRxPwrPercentage */
5596
5597static u8
5598rtl819x_evm_dbtopercentage(
5599 char value
5600 )
5601{
5602 char ret_val;
5603
5604 ret_val = value;
5605
5606 if(ret_val >= 0)
5607 ret_val = 0;
5608 if(ret_val <= -33)
5609 ret_val = -33;
5610 ret_val = 0 - ret_val;
5611 ret_val*=3;
5612 if(ret_val == 99)
5613 ret_val = 100;
5614 return(ret_val);
5615}
5616
5617//
5618// Description:
5619// We want good-looking for signal strength/quality
5620// 2007/7/19 01:09, by cosa.
5621//
5e1ad18a 5622static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 5623{
5624 long retsig;
5625
5626 // Step 1. Scale mapping.
5627 if(currsig >= 61 && currsig <= 100)
5628 {
5629 retsig = 90 + ((currsig - 60) / 4);
5630 }
5631 else if(currsig >= 41 && currsig <= 60)
5632 {
5633 retsig = 78 + ((currsig - 40) / 2);
5634 }
5635 else if(currsig >= 31 && currsig <= 40)
5636 {
5637 retsig = 66 + (currsig - 30);
5638 }
5639 else if(currsig >= 21 && currsig <= 30)
5640 {
5641 retsig = 54 + (currsig - 20);
5642 }
5643 else if(currsig >= 5 && currsig <= 20)
5644 {
5645 retsig = 42 + (((currsig - 5) * 2) / 3);
5646 }
5647 else if(currsig == 4)
5648 {
5649 retsig = 36;
5650 }
5651 else if(currsig == 3)
5652 {
5653 retsig = 27;
5654 }
5655 else if(currsig == 2)
5656 {
5657 retsig = 18;
5658 }
5659 else if(currsig == 1)
5660 {
5661 retsig = 9;
5662 }
5663 else
5664 {
5665 retsig = currsig;
5666 }
5667
5668 return retsig;
5669}
5670
5671static void rtl8192_query_rxphystatus(
5672 struct r8192_priv * priv,
5673 struct ieee80211_rx_stats * pstats,
5674 prx_desc_819x_pci pdesc,
5675 prx_fwinfo_819x_pci pdrvinfo,
5676 struct ieee80211_rx_stats * precord_stats,
5677 bool bpacket_match_bssid,
5678 bool bpacket_toself,
5679 bool bPacketBeacon,
5680 bool bToSelfBA
5681 )
5682{
5683 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
5684 phy_sts_ofdm_819xpci_t* pofdm_buf;
5685 phy_sts_cck_819xpci_t * pcck_buf;
5686 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
5687 u8 *prxpkt;
5688 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
5689 char rx_pwr[4], rx_pwr_all=0;
5690 //long rx_avg_pwr = 0;
5691 char rx_snrX, rx_evmX;
5692 u8 evm, pwdb_all;
5693 u32 RSSI, total_rssi=0;//, total_evm=0;
5694// long signal_strength_index = 0;
5695 u8 is_cck_rate=0;
5696 u8 rf_rx_num = 0;
5697
5698 /* 2007/07/04 MH For OFDM RSSI. For high power or not. */
5699 static u8 check_reg824 = 0;
5700 static u32 reg824_bit9 = 0;
5701
5702 priv->stats.numqry_phystatus++;
5703
5704 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
5705
5706 // Record it for next packet processing
5707 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
5708 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
5709 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
5710 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
5711 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
5712 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
5713 /*2007.08.30 requested by SD3 Jerry */
5714 if(check_reg824 == 0)
5715 {
5716 reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
5717 check_reg824 = 1;
5718 }
5719
5720
5721 prxpkt = (u8*)pdrvinfo;
5722
5723 /* Move pointer to the 16th bytes. Phy status start address. */
5724 prxpkt += sizeof(rx_fwinfo_819x_pci);
5725
5726 /* Initial the cck and ofdm buffer pointer */
5727 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
5728 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
5729
5730 pstats->RxMIMOSignalQuality[0] = -1;
5731 pstats->RxMIMOSignalQuality[1] = -1;
5732 precord_stats->RxMIMOSignalQuality[0] = -1;
5733 precord_stats->RxMIMOSignalQuality[1] = -1;
5734
5735 if(is_cck_rate)
5736 {
5737 //
5738 // (1)Hardware does not provide RSSI for CCK
5739 //
5740
5741 //
5742 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5743 //
5744 u8 report;//, cck_agc_rpt;
5745#ifdef RTL8190P
5746 u8 tmp_pwdb;
5747 char cck_adc_pwdb[4];
5748#endif
5749 priv->stats.numqry_phystatusCCK++;
5750
5751#ifdef RTL8190P //Only 90P 2T4R need to check
5752 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid)
5753 {
5754 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5755 {
5756 tmp_pwdb = pcck_buf->adc_pwdb_X[i];
5757 cck_adc_pwdb[i] = (char)tmp_pwdb;
5758 cck_adc_pwdb[i] /= 2;
5759 pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i];
5760 //DbgPrint("RF-%d tmp_pwdb = 0x%x, cck_adc_pwdb = %d", i, tmp_pwdb, cck_adc_pwdb[i]);
5761 }
5762 }
5763#endif
5764
5765 if(!reg824_bit9)
5766 {
5767 report = pcck_buf->cck_agc_rpt & 0xc0;
5768 report = report>>6;
5769 switch(report)
5770 {
5771 //Fixed by Jacken from Bryant 2008-03-20
5772 //Original value is -38 , -26 , -14 , -2
5773 //Fixed value is -35 , -23 , -11 , 6
5774 case 0x3:
5775 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
5776 break;
5777 case 0x2:
5778 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
5779 break;
5780 case 0x1:
5781 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
5782 break;
5783 case 0x0:
5784 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
5785 break;
5786 }
5787 }
5788 else
5789 {
5790 report = pcck_buf->cck_agc_rpt & 0x60;
5791 report = report>>5;
5792 switch(report)
5793 {
5794 case 0x3:
5795 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5796 break;
5797 case 0x2:
5798 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
5799 break;
5800 case 0x1:
5801 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5802 break;
5803 case 0x0:
5804 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5805 break;
5806 }
5807 }
5808
5809 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5810 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5811 pstats->RecvSignalPower = rx_pwr_all;
5812
5813 //
5814 // (3) Get Signal Quality (EVM)
5815 //
5816 if(bpacket_match_bssid)
5817 {
5818 u8 sq;
5819
5820 if(pstats->RxPWDBAll > 40)
5821 {
5822 sq = 100;
5823 }else
5824 {
5825 sq = pcck_buf->sq_rpt;
5826
5827 if(pcck_buf->sq_rpt > 64)
5828 sq = 0;
5829 else if (pcck_buf->sq_rpt < 20)
5830 sq = 100;
5831 else
5832 sq = ((64-sq) * 100) / 44;
5833 }
5834 pstats->SignalQuality = precord_stats->SignalQuality = sq;
5835 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
5836 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
5837 }
5838 }
5839 else
5840 {
5841 priv->stats.numqry_phystatusHT++;
5842 //
5843 // (1)Get RSSI for HT rate
5844 //
5845 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5846 {
5847 // 2008/01/30 MH we will judge RF RX path now.
5848 if (priv->brfpath_rxenable[i])
5849 rf_rx_num++;
5850 //else
5851 //continue;
5852
5853 //Fixed by Jacken from Bryant 2008-03-20
5854 //Original value is 106
5855#ifdef RTL8190P //Modify by Jacken 2008/03/31
5856 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
5857#else
5858 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
5859#endif
5860
5861 //Get Rx snr value in DB
5862 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
5863 rx_snrX = (char)(tmp_rxsnr);
5864 rx_snrX /= 2;
5865 priv->stats.rxSNRdB[i] = (long)rx_snrX;
5866
5867 /* Translate DBM to percentage. */
5868 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
5869 if (priv->brfpath_rxenable[i])
5870 total_rssi += RSSI;
5871
5872 /* Record Signal Strength for next packet */
5873 if(bpacket_match_bssid)
5874 {
5875 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
5876 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
5877 }
5878 }
5879
5880
5881 //
5882 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5883 //
5884 //Fixed by Jacken from Bryant 2008-03-20
5885 //Original value is 106
5886 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
5887 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5888
5889 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5890 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
5891 pstats->RecvSignalPower = rx_pwr_all;
5892 //
5893 // (3)EVM of HT rate
5894 //
5895 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
5896 pdrvinfo->RxRate<=DESC90_RATEMCS15)
5897 max_spatial_stream = 2; //both spatial stream make sense
5898 else
5899 max_spatial_stream = 1; //only spatial stream 1 makes sense
5900
5901 for(i=0; i<max_spatial_stream; i++)
5902 {
5903 tmp_rxevm = pofdm_buf->rxevm_X[i];
5904 rx_evmX = (char)(tmp_rxevm);
5905
5906 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
5907 // fill most significant bit to "zero" when doing shifting operation which may change a negative
5908 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
5909 rx_evmX /= 2; //dbm
5910
5911 evm = rtl819x_evm_dbtopercentage(rx_evmX);
5912#if 0
5913 EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100
5914#endif
5915 if(bpacket_match_bssid)
5916 {
5917 if(i==0) // Fill value in RFD, Get the first spatial stream only
5918 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
5919 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
5920 }
5921 }
5922
5923
5924 /* record rx statistics for debug */
5925 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
5926 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
5927 if(pdrvinfo->BW) //40M channel
5928 priv->stats.received_bwtype[1+prxsc->rxsc]++;
5929 else //20M channel
5930 priv->stats.received_bwtype[0]++;
5931 }
5932
5933 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
5934 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
5935 if(is_cck_rate)
5936 {
5937 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
5938
5939 }
5940 else
5941 {
5942 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
5943 // We can judge RX path number now.
5944 if (rf_rx_num != 0)
5945 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
5946 }
5947} /* QueryRxPhyStatus8190Pci */
5948
5e1ad18a 5949static void
ecdfa446
GKH		 5950rtl8192_record_rxdesc_forlateruse(
5951 struct ieee80211_rx_stats * psrc_stats,
5952 struct ieee80211_rx_stats * ptarget_stats
5953)
5954{
5955 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
5956 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
5957 //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
5958}
5959
5960
5961
5e1ad18a 5962static void TranslateRxSignalStuff819xpci(struct net_device *dev,
ecdfa446
GKH		 5963 struct sk_buff *skb,
5964 struct ieee80211_rx_stats * pstats,
5965 prx_desc_819x_pci pdesc,
5966 prx_fwinfo_819x_pci pdrvinfo)
5967{
5968 // TODO: We must only check packet for current MAC address. Not finish
5969 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5970 bool bpacket_match_bssid, bpacket_toself;
5971 bool bPacketBeacon=false, bToSelfBA=false;
5972 static struct ieee80211_rx_stats previous_stats;
5973 struct ieee80211_hdr_3addr *hdr;
5974 u16 fc,type;
5975
5976 // Get Signal Quality for only RX data queue (but not command queue)
5977
5978 u8* tmp_buf;
5979 u8 *praddr;
5980
5981 /* Get MAC frame start address. */
5982 tmp_buf = skb->data;
5983
5984 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
5985 fc = le16_to_cpu(hdr->frame_ctl);
5986 type = WLAN_FC_GET_TYPE(fc);
5987 praddr = hdr->addr1;
5988
5989 /* Check if the received packet is acceptabe. */
5990 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
5991 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
5992 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
5993 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5994#if 1//cosa
5995 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
5996 {
5997 bPacketBeacon = true;
5998 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
5999 }
6000 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6001 {
6002 if((eqMacAddr(praddr,dev->dev_addr)))
6003 bToSelfBA = true;
6004 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6005 }
6006
6007#endif
6008 if(bpacket_match_bssid)
6009 {
6010 priv->stats.numpacket_matchbssid++;
6011 }
6012 if(bpacket_toself){
6013 priv->stats.numpacket_toself++;
6014 }
6015 //
6016 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6017 //
6018 // Because phy information is contained in the last packet of AMPDU only, so driver
6019 // should process phy information of previous packet
6020 rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
6021 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
6022 bpacket_toself ,bPacketBeacon, bToSelfBA);
6023 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6024
6025}
6026
6027
5e1ad18a 6028static void rtl8192_tx_resume(struct net_device *dev)
ecdfa446
GKH		 6029{
6030 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6031 struct ieee80211_device *ieee = priv->ieee80211;
6032 struct sk_buff *skb;
6033 int queue_index;
6034
6035 for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
6036 while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
6037 (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
6038 /* 1. dequeue the packet from the wait queue */
6039 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
6040 /* 2. tx the packet directly */
6041 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
6042 #if 0
6043 if(queue_index!=MGNT_QUEUE) {
6044 ieee->stats.tx_packets++;
6045 ieee->stats.tx_bytes += skb->len;
6046 }
6047 #endif
6048 }
6049 }
6050}
6051
559fba5e 6052static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv)
ecdfa446
GKH		 6053{
6054 rtl8192_tx_resume(priv->ieee80211->dev);
6055}
6056
6057/**
6058* Function: UpdateReceivedRateHistogramStatistics
6059* Overview: Recored down the received data rate
6060*
6061* Input:
6062* PADAPTER Adapter
6063* PRT_RFD pRfd,
6064*
6065* Output:
6066* PRT_TCB Adapter
6067* (Adapter->RxStats.ReceivedRateHistogram[] is updated)
6068* Return:
6069* None
6070*/
5e1ad18a 6071static void UpdateReceivedRateHistogramStatistics8190(
ecdfa446
GKH		 6072 struct net_device *dev,
6073 struct ieee80211_rx_stats* pstats
6074 )
6075{
6076 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6077 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6078 u32 rateIndex;
6079 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6080
6081 /* 2007/03/09 MH We will not update rate of packet from rx cmd queue. */
6082 #if 0
6083 if (pRfd->queue_id == CMPK_RX_QUEUE_ID)
6084 return;
6085 #endif
6086 if(pstats->bCRC)
6087 rcvType = 2;
6088 else if(pstats->bICV)
6089 rcvType = 3;
6090
6091 if(pstats->bShortPreamble)
6092 preamble_guardinterval = 1;// short
6093 else
6094 preamble_guardinterval = 0;// long
6095
6096 switch(pstats->rate)
6097 {
6098 //
6099 // CCK rate
6100 //
6101 case MGN_1M: rateIndex = 0; break;
6102 case MGN_2M: rateIndex = 1; break;
6103 case MGN_5_5M: rateIndex = 2; break;
6104 case MGN_11M: rateIndex = 3; break;
6105 //
6106 // Legacy OFDM rate
6107 //
6108 case MGN_6M: rateIndex = 4; break;
6109 case MGN_9M: rateIndex = 5; break;
6110 case MGN_12M: rateIndex = 6; break;
6111 case MGN_18M: rateIndex = 7; break;
6112 case MGN_24M: rateIndex = 8; break;
6113 case MGN_36M: rateIndex = 9; break;
6114 case MGN_48M: rateIndex = 10; break;
6115 case MGN_54M: rateIndex = 11; break;
6116 //
6117 // 11n High throughput rate
6118 //
6119 case MGN_MCS0: rateIndex = 12; break;
6120 case MGN_MCS1: rateIndex = 13; break;
6121 case MGN_MCS2: rateIndex = 14; break;
6122 case MGN_MCS3: rateIndex = 15; break;
6123 case MGN_MCS4: rateIndex = 16; break;
6124 case MGN_MCS5: rateIndex = 17; break;
6125 case MGN_MCS6: rateIndex = 18; break;
6126 case MGN_MCS7: rateIndex = 19; break;
6127 case MGN_MCS8: rateIndex = 20; break;
6128 case MGN_MCS9: rateIndex = 21; break;
6129 case MGN_MCS10: rateIndex = 22; break;
6130 case MGN_MCS11: rateIndex = 23; break;
6131 case MGN_MCS12: rateIndex = 24; break;
6132 case MGN_MCS13: rateIndex = 25; break;
6133 case MGN_MCS14: rateIndex = 26; break;
6134 case MGN_MCS15: rateIndex = 27; break;
6135 default: rateIndex = 28; break;
6136 }
6137 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6138 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6139 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6140}
6141
5e1ad18a 6142static void rtl8192_rx(struct net_device *dev)
ecdfa446
GKH		 6143{
6144 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6145 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
6146 bool unicast_packet = false;
6147 struct ieee80211_rx_stats stats = {
6148 .signal = 0,
6149 .noise = -98,
6150 .rate = 0,
6151 .freq = IEEE80211_24GHZ_BAND,
6152 };
6153 unsigned int count = priv->rxringcount;
6154
6155 stats.nic_type = NIC_8192E;
6156
6157 while (count--) {
6158 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
6159 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
6160
6161 if (pdesc->OWN){
6162 /* wait data to be filled by hardware */
6163 return;
6164 } else {
6165 stats.bICV = pdesc->ICV;
6166 stats.bCRC = pdesc->CRC32;
6167 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
6168
6169 stats.Length = pdesc->Length;
6170 if(stats.Length < 24)
6171 stats.bHwError |= 1;
6172
6173 if(stats.bHwError) {
6174 stats.bShift = false;
6175
6176 if(pdesc->CRC32) {
6177 if (pdesc->Length <500)
6178 priv->stats.rxcrcerrmin++;
6179 else if (pdesc->Length >1000)
6180 priv->stats.rxcrcerrmax++;
6181 else
6182 priv->stats.rxcrcerrmid++;
6183 }
6184 goto done;
6185 } else {
6186 prx_fwinfo_819x_pci pDrvInfo = NULL;
6187 struct sk_buff *new_skb = dev_alloc_skb(priv->rxbuffersize);
6188
6189 if (unlikely(!new_skb)) {
6190 goto done;
6191 }
6192
6193 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
6194 stats.RxBufShift = ((pdesc->Shift)&0x03);
6195 stats.Decrypted = !pdesc->SWDec;
6196
ecdfa446 6197 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 6198 *((dma_addr_t *)skb->cb),
6199 priv->rxbuffersize,
6200 PCI_DMA_FROMDEVICE);
6201 skb_put(skb, pdesc->Length);
6202 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
6203 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
6204
6205 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
6206 stats.bShortPreamble = pDrvInfo->SPLCP;
6207
6208 /* it is debug only. It should be disabled in released driver.
6209 * 2007.1.11 by Emily
6210 * */
6211 UpdateReceivedRateHistogramStatistics8190(dev, &stats);
6212
6213 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
6214 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
6215
6216 stats.TimeStampLow = pDrvInfo->TSFL;
6217 stats.TimeStampHigh = read_nic_dword(dev, TSFR+4);
6218
6219 UpdateRxPktTimeStamp8190(dev, &stats);
6220
6221 //
6222 // Get Total offset of MPDU Frame Body
6223 //
6224 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
6225 stats.bShift = 1;
6226
6227 stats.RxIs40MHzPacket = pDrvInfo->BW;
6228
6229 /* ???? */
6230 TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
6231
6232 /* Rx A-MPDU */
6233 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
6234 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
6235 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
6236 skb_trim(skb, skb->len - 4/*sCrcLng*/);
6237 /* rx packets statistics */
6238 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
6239 unicast_packet = false;
6240
6241 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
6242 //TODO
6243 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
6244 //TODO
6245 }else {
6246 /* unicast packet */
6247 unicast_packet = true;
6248 }
6249
6250 stats.packetlength = stats.Length-4;
6251 stats.fraglength = stats.packetlength;
6252 stats.fragoffset = 0;
6253 stats.ntotalfrag = 1;
6254
fb5fe277 6255 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
ecdfa446
GKH		 6256 dev_kfree_skb_any(skb);
6257 } else {
6258 priv->stats.rxok++;
6259 if(unicast_packet) {
6260 priv->stats.rxbytesunicast += skb->len;
6261 }
6262 }
6263
6264 skb = new_skb;
6265 priv->rx_buf[priv->rx_idx] = skb;
1c7ec2e8 6266 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
ecdfa446
GKH		 6267 }
6268
6269 }
6270done:
6271 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
6272 pdesc->OWN = 1;
6273 pdesc->Length = priv->rxbuffersize;
6274 if (priv->rx_idx == priv->rxringcount-1)
6275 pdesc->EOR = 1;
6276 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
6277 }
6278
6279}
6280
559fba5e 6281static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
ecdfa446
GKH		 6282{
6283 rtl8192_rx(priv->ieee80211->dev);
6284 /* unmask RDU */
6285 write_nic_dword(priv->ieee80211->dev, INTA_MASK,read_nic_dword(priv->ieee80211->dev, INTA_MASK) | IMR_RDU);
6286}
6287
6288static const struct net_device_ops rtl8192_netdev_ops = {
6289 .ndo_open = rtl8192_open,
6290 .ndo_stop = rtl8192_close,
6291/* .ndo_get_stats = rtl8192_stats, */
6292 .ndo_tx_timeout = tx_timeout,
6293 .ndo_do_ioctl = rtl8192_ioctl,
6294 .ndo_set_multicast_list = r8192_set_multicast,
6295 .ndo_set_mac_address = r8192_set_mac_adr,
fb5fe277 6296 .ndo_start_xmit = ieee80211_rtl_xmit,
ecdfa446
GKH		 6297};
6298
6299/****************************************************************************
6300 ---------------------------- PCI_STUFF---------------------------
6301*****************************************************************************/
6302
6303static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
6304 const struct pci_device_id *id)
6305{
6306 unsigned long ioaddr = 0;
6307 struct net_device *dev = NULL;
6308 struct r8192_priv *priv= NULL;
6309 u8 unit = 0;
3a8f2d3c 6310 int ret = -ENODEV;
ecdfa446
GKH		 6311
6312#ifdef CONFIG_RTL8192_IO_MAP
6313 unsigned long pio_start, pio_len, pio_flags;
6314#else
6315 unsigned long pmem_start, pmem_len, pmem_flags;
6316#endif //end #ifdef RTL_IO_MAP
6317
6318 RT_TRACE(COMP_INIT,"Configuring chip resources");
6319
6320 if( pci_enable_device (pdev) ){
6321 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
6322 return -EIO;
6323 }
6324
6325 pci_set_master(pdev);
6326 //pci_set_wmi(pdev);
6327 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 6328 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446 6329 dev = alloc_ieee80211(sizeof(struct r8192_priv));
3a8f2d3c
KV		 6330 if (!dev) {
6331 ret = -ENOMEM;
6332 goto fail_free;
6333 }
ecdfa446 6334
ecdfa446 6335 pci_set_drvdata(pdev, dev);
ecdfa446 6336 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 6337 priv = ieee80211_priv(dev);
ecdfa446 6338 priv->ieee80211 = netdev_priv(dev);
ecdfa446 6339 priv->pdev=pdev;
ecdfa446
GKH		 6340 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
6341 priv->ieee80211->bSupportRemoteWakeUp = 1;
6342 } else
ecdfa446
GKH		 6343 {
6344 priv->ieee80211->bSupportRemoteWakeUp = 0;
6345 }
6346
6347#ifdef CONFIG_RTL8192_IO_MAP
6348
6349 pio_start = (unsigned long)pci_resource_start (pdev, 0);
6350 pio_len = (unsigned long)pci_resource_len (pdev, 0);
6351 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
6352
6353 if (!(pio_flags & IORESOURCE_IO)) {
6354 RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
6355 goto fail;
6356 }
6357
6358 //DMESG("IO space @ 0x%08lx", pio_start );
6359 if( ! request_region( pio_start, pio_len, RTL819xE_MODULE_NAME ) ){
6360 RT_TRACE(COMP_ERR,"request_region failed!");
6361 goto fail;
6362 }
6363
6364 ioaddr = pio_start;
6365 dev->base_addr = ioaddr; // device I/O address
6366
6367#else
6368
6369 pmem_start = pci_resource_start(pdev, 1);
6370 pmem_len = pci_resource_len(pdev, 1);
6371 pmem_flags = pci_resource_flags (pdev, 1);
6372
6373 if (!(pmem_flags & IORESOURCE_MEM)) {
6374 RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
6375 goto fail;
6376 }
6377
6378 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
6379 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
6380 RT_TRACE(COMP_ERR,"request_mem_region failed!");
6381 goto fail;
6382 }
6383
6384
6385 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
6386 if( ioaddr == (unsigned long)NULL ){
6387 RT_TRACE(COMP_ERR,"ioremap failed!");
6388 // release_mem_region( pmem_start, pmem_len );
6389 goto fail1;
6390 }
6391
6392 dev->mem_start = ioaddr; // shared mem start
6393 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
6394
6395#endif //end #ifdef RTL_IO_MAP
6396
6397 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6398 * PCI Tx retries from interfering with C3 CPU state */
6399 pci_write_config_byte(pdev, 0x41, 0x00);
6400
6401
6402 pci_read_config_byte(pdev, 0x05, &unit);
6403 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
6404
6405 dev->irq = pdev->irq;
6406 priv->irq = 0;
6407
6408 dev->netdev_ops = &rtl8192_netdev_ops;
6409#if 0
6410 dev->open = rtl8192_open;
6411 dev->stop = rtl8192_close;
6412 //dev->hard_start_xmit = rtl8192_8023_hard_start_xmit;
6413 dev->tx_timeout = tx_timeout;
6414 //dev->wireless_handlers = &r8192_wx_handlers_def;
6415 dev->do_ioctl = rtl8192_ioctl;
6416 dev->set_multicast_list = r8192_set_multicast;
6417 dev->set_mac_address = r8192_set_mac_adr;
6418#endif
6419
6420 //DMESG("Oops: i'm coming\n");
6421#if WIRELESS_EXT >= 12
6422#if WIRELESS_EXT < 17
6423 dev->get_wireless_stats = r8192_get_wireless_stats;
6424#endif
6425 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
6426#endif
6427 //dev->get_wireless_stats = r8192_get_wireless_stats;
6428 dev->type=ARPHRD_ETHER;
6429
6430 dev->watchdog_timeo = HZ*3; //modified by john, 0805
6431
6432 if (dev_alloc_name(dev, ifname) < 0){
6433 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
dca41306 6434 strcpy(ifname, "wlan%d");
ecdfa446
GKH		 6435 dev_alloc_name(dev, ifname);
6436 }
6437
6438 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
6439 if(rtl8192_init(dev)!=0){
6440 RT_TRACE(COMP_ERR, "Initialization failed");
6441 goto fail;
6442 }
6443
6444 netif_carrier_off(dev);
6445 netif_stop_queue(dev);
6446
6447 register_netdev(dev);
6448 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
6449 rtl8192_proc_init_one(dev);
6450
6451
6452 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 6453 return 0;
ecdfa446
GKH		 6454
6455fail1:
6456
6457#ifdef CONFIG_RTL8180_IO_MAP
6458
6459 if( dev->base_addr != 0 ){
6460
6461 release_region(dev->base_addr,
6462 pci_resource_len(pdev, 0) );
6463 }
6464#else
6465 if( dev->mem_start != (unsigned long)NULL ){
6466 iounmap( (void *)dev->mem_start );
6467 release_mem_region( pci_resource_start(pdev, 1),
6468 pci_resource_len(pdev, 1) );
6469 }
6470#endif //end #ifdef RTL_IO_MAP
6471
6472fail:
6473 if(dev){
6474
6475 if (priv->irq) {
6476 free_irq(dev->irq, dev);
6477 dev->irq=0;
6478 }
6479 free_ieee80211(dev);
6480 }
6481
3a8f2d3c 6482fail_free:
ecdfa446
GKH		 6483 pci_disable_device(pdev);
6484
6485 DMESG("wlan driver load failed\n");
6486 pci_set_drvdata(pdev, NULL);
3a8f2d3c 6487 return ret;
ecdfa446
GKH		 6488
6489}
6490
6491/* detach all the work and timer structure declared or inititialized
6492 * in r8192_init function.
6493 * */
5b3b1a7b 6494static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
ecdfa446
GKH		 6495{
6496 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
6497 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
6498 * Otherwise call cancel_delayed_work is enough.
39cfb97b 6499 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
ecdfa446 6500 * */
ecdfa446
GKH		 6501 cancel_delayed_work(&priv->watch_dog_wq);
6502 cancel_delayed_work(&priv->update_beacon_wq);
6503 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
6504 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
6505#ifdef RTL8192E
6506 cancel_delayed_work(&priv->gpio_change_rf_wq);
6507#endif
ecdfa446
GKH		 6508 cancel_work_sync(&priv->reset_wq);
6509 cancel_work_sync(&priv->qos_activate);
6510 //cancel_work_sync(&priv->SetBWModeWorkItem);
6511 //cancel_work_sync(&priv->SwChnlWorkItem);
ecdfa446
GKH		 6512
6513}
6514
6515
6516static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
6517{
6518 struct net_device *dev = pci_get_drvdata(pdev);
6519 struct r8192_priv *priv ;
6520
6521 if(dev){
6522
6523 unregister_netdev(dev);
6524
6525 priv=ieee80211_priv(dev);
6526
6527 rtl8192_proc_remove_one(dev);
6528
6529 rtl8192_down(dev);
6530 if (priv->pFirmware)
6531 {
6532 vfree(priv->pFirmware);
6533 priv->pFirmware = NULL;
6534 }
6535 // priv->rf_close(dev);
6536 // rtl8192_usb_deleteendpoints(dev);
ecdfa446 6537 destroy_workqueue(priv->priv_wq);
ecdfa446
GKH		 6538 /* redundant with rtl8192_down */
6539 // rtl8192_irq_disable(dev);
6540 // rtl8192_reset(dev);
6541 // mdelay(10);
6542 {
6543 u32 i;
6544 /* free tx/rx rings */
6545 rtl8192_free_rx_ring(dev);
6546 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
6547 rtl8192_free_tx_ring(dev, i);
6548 }
6549 }
6550 if(priv->irq){
6551
6552 printk("Freeing irq %d\n",dev->irq);
6553 free_irq(dev->irq, dev);
6554 priv->irq=0;
6555
6556 }
6557
6558
6559
6560 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6561
6562#ifdef CONFIG_RTL8180_IO_MAP
6563
6564 if( dev->base_addr != 0 ){
6565
6566 release_region(dev->base_addr,
6567 pci_resource_len(pdev, 0) );
6568 }
6569#else
6570 if( dev->mem_start != (unsigned long)NULL ){
6571 iounmap( (void *)dev->mem_start );
6572 release_mem_region( pci_resource_start(pdev, 1),
6573 pci_resource_len(pdev, 1) );
6574 }
6575#endif /*end #ifdef RTL_IO_MAP*/
6576 free_ieee80211(dev);
6577
6578 }
6579
6580 pci_disable_device(pdev);
6581 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
6582}
6583
fb5fe277
GK		 6584extern int ieee80211_rtl_init(void);
6585extern void ieee80211_rtl_exit(void);
ecdfa446
GKH		 6586
6587static int __init rtl8192_pci_module_init(void)
6588{
6589 int retval;
6590
fb5fe277 6591 retval = ieee80211_rtl_init();
ecdfa446
GKH		 6592 if (retval)
6593 return retval;
6594
6595 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
6596 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
6597 RT_TRACE(COMP_INIT, "Initializing module");
6598 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
6599 rtl8192_proc_module_init();
ecdfa446 6600 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 6601 {
6602 DMESG("No device found");
6603 /*pci_unregister_driver (&rtl8192_pci_driver);*/
6604 return -ENODEV;
6605 }
6606 return 0;
6607}
6608
6609
6610static void __exit rtl8192_pci_module_exit(void)
6611{
6612 pci_unregister_driver(&rtl8192_pci_driver);
6613
6614 RT_TRACE(COMP_DOWN, "Exiting");
6615 rtl8192_proc_module_remove();
fb5fe277 6616 ieee80211_rtl_exit();
ecdfa446
GKH		 6617}
6618
6619//warning message WB
559fba5e 6620static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446
GKH		 6621{
6622 struct net_device *dev = (struct net_device *) netdev;
6623 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6624 unsigned long flags;
6625 u32 inta;
6626 /* We should return IRQ_NONE, but for now let me keep this */
6627 if(priv->irq_enabled == 0){
ecdfa446 6628 return IRQ_HANDLED;
ecdfa446
GKH		 6629 }
6630
6631 spin_lock_irqsave(&priv->irq_th_lock,flags);
6632
6633 //ISR: 4bytes
6634
6635 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6636 write_nic_dword(dev,ISR,inta); // reset int situation
6637
6638 priv->stats.shints++;
6639 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6640 if(!inta){
6641 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6642 return IRQ_HANDLED;
ecdfa446
GKH		 6643 /*
6644 most probably we can safely return IRQ_NONE,
6645 but for now is better to avoid problems
6646 */
6647 }
6648
6649 if(inta == 0xffff){
6650 /* HW disappared */
6651 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6652 return IRQ_HANDLED;
ecdfa446
GKH		 6653 }
6654
6655 priv->stats.ints++;
6656#ifdef DEBUG_IRQ
6657 DMESG("NIC irq %x",inta);
6658#endif
6659 //priv->irqpending = inta;
6660
6661
6662 if(!netif_running(dev)) {
6663 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6664 return IRQ_HANDLED;
ecdfa446
GKH		 6665 }
6666
6667 if(inta & IMR_TIMEOUT0){
6668 // write_nic_dword(dev, TimerInt, 0);
6669 //DMESG("=================>waking up");
6670 // rtl8180_hw_wakeup(dev);
6671 }
6672
6673 if(inta & IMR_TBDOK){
6674 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6675 rtl8192_tx_isr(dev, BEACON_QUEUE);
6676 priv->stats.txbeaconokint++;
6677 }
6678
6679 if(inta & IMR_TBDER){
6680 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6681 rtl8192_tx_isr(dev, BEACON_QUEUE);
6682 priv->stats.txbeaconerr++;
6683 }
6684
6685 if(inta & IMR_MGNTDOK ) {
6686 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
6687 priv->stats.txmanageokint++;
6688 rtl8192_tx_isr(dev,MGNT_QUEUE);
6689
6690 }
6691
6692 if(inta & IMR_COMDOK)
6693 {
6694 priv->stats.txcmdpktokint++;
6695 rtl8192_tx_isr(dev,TXCMD_QUEUE);
6696 }
6697
6698 if(inta & IMR_ROK){
6699#ifdef DEBUG_RX
6700 DMESG("Frame arrived !");
6701#endif
6702 priv->stats.rxint++;
6703 tasklet_schedule(&priv->irq_rx_tasklet);
6704 }
6705
6706 if(inta & IMR_BcnInt) {
6707 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
6708 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
6709 }
6710
6711 if(inta & IMR_RDU){
6712 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
6713 priv->stats.rxrdu++;
6714 /* reset int situation */
6715 write_nic_dword(dev,INTA_MASK,read_nic_dword(dev, INTA_MASK) & ~IMR_RDU);
6716 tasklet_schedule(&priv->irq_rx_tasklet);
6717 }
6718
6719 if(inta & IMR_RXFOVW){
6720 RT_TRACE(COMP_INTR, "rx overflow !\n");
6721 priv->stats.rxoverflow++;
6722 tasklet_schedule(&priv->irq_rx_tasklet);
6723 }
6724
6725 if(inta & IMR_TXFOVW) priv->stats.txoverflow++;
6726
6727 if(inta & IMR_BKDOK){
6728 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
6729 priv->stats.txbkokint++;
6730 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6731 rtl8192_tx_isr(dev,BK_QUEUE);
6732 rtl8192_try_wake_queue(dev, BK_QUEUE);
6733 }
6734
6735 if(inta & IMR_BEDOK){
6736 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
6737 priv->stats.txbeokint++;
6738 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6739 rtl8192_tx_isr(dev,BE_QUEUE);
6740 rtl8192_try_wake_queue(dev, BE_QUEUE);
6741 }
6742
6743 if(inta & IMR_VIDOK){
6744 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
6745 priv->stats.txviokint++;
6746 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6747 rtl8192_tx_isr(dev,VI_QUEUE);
6748 rtl8192_try_wake_queue(dev, VI_QUEUE);
6749 }
6750
6751 if(inta & IMR_VODOK){
6752 priv->stats.txvookint++;
6753 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6754 rtl8192_tx_isr(dev,VO_QUEUE);
6755 rtl8192_try_wake_queue(dev, VO_QUEUE);
6756 }
6757
6758 force_pci_posting(dev);
6759 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6760
ecdfa446 6761 return IRQ_HANDLED;
ecdfa446
GKH		 6762}
6763
559fba5e 6764static void rtl8192_try_wake_queue(struct net_device *dev, int pri)
ecdfa446
GKH		 6765{
6766#if 0
6767 unsigned long flags;
6768 short enough_desc;
6769 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6770
6771 spin_lock_irqsave(&priv->tx_lock,flags);
6772 enough_desc = check_nic_enough_desc(dev,pri);
6773 spin_unlock_irqrestore(&priv->tx_lock,flags);
6774
6775 if(enough_desc)
fb5fe277 6776 ieee80211_rtl_wake_queue(priv->ieee80211);
ecdfa446
GKH		 6777#endif
6778}
6779
6780
6781void EnableHWSecurityConfig8192(struct net_device *dev)
6782{
6783 u8 SECR_value = 0x0;
6784 // struct ieee80211_device* ieee1 = container_of(&dev, struct ieee80211_device, dev);
6785 //printk("==>ieee1:%p, dev:%p\n", ieee1, dev);
6786 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6787 struct ieee80211_device* ieee = priv->ieee80211;
6788 //printk("==>ieee:%p, dev:%p\n", ieee, dev);
6789 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
6790#if 1
6791 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
6792 {
6793 SECR_value |= SCR_RxUseDK;
6794 SECR_value |= SCR_TxUseDK;
6795 }
6796 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
6797 {
6798 SECR_value |= SCR_RxUseDK;
6799 SECR_value |= SCR_TxUseDK;
6800 }
6801
6802#endif
6803
6804 //add HWSec active enable here.
6805//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
6806 ieee->hwsec_active = 1;
6807
6808 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
6809 {
6810 ieee->hwsec_active = 0;
6811 SECR_value &= ~SCR_RxDecEnable;
6812 }
6813
207b58fb 6814 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
ecdfa446
GKH		 6815 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
6816 {
6817 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
6818 }
6819
6820}
6821#define TOTAL_CAM_ENTRY 32
6822//#define CAM_CONTENT_COUNT 8
6823void setKey( struct net_device *dev,
6824 u8 EntryNo,
6825 u8 KeyIndex,
6826 u16 KeyType,
881a975b 6827 const u8 *MacAddr,
ecdfa446
GKH		 6828 u8 DefaultKey,
6829 u32 *KeyContent )
6830{
6831 u32 TargetCommand = 0;
6832 u32 TargetContent = 0;
6833 u16 usConfig = 0;
6834 u8 i;
6835#ifdef ENABLE_IPS
6836 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6837 RT_RF_POWER_STATE rtState;
6838 rtState = priv->ieee80211->eRFPowerState;
6839 if(priv->ieee80211->PowerSaveControl.bInactivePs){
6840 if(rtState == eRfOff){
6841 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
6842 {
6843 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
65a43784 6844 //up(&priv->wx_sem);
ecdfa446
GKH		 6845 return ;
6846 }
6847 else{
65a43784 6848 down(&priv->ieee80211->ips_sem);
ecdfa446 6849 IPSLeave(dev);
65a43784 6850 up(&priv->ieee80211->ips_sem);
ecdfa446
GKH		 6851 }
6852 }
6853 }
6854 priv->ieee80211->is_set_key = true;
6855#endif
6856 if (EntryNo >= TOTAL_CAM_ENTRY)
6857 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
6858
0ee9f67c 6859 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
ecdfa446
GKH		 6860
6861 if (DefaultKey)
6862 usConfig |= BIT15 | (KeyType<<2);
6863 else
6864 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
6865// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
6866
6867
6868 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
6869 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
6870 TargetCommand |= BIT31|BIT16;
6871
6872 if(i==0){//MAC|Config
6873 TargetContent = (u32)(*(MacAddr+0)) << 16|
6874 (u32)(*(MacAddr+1)) << 24|
6875 (u32)usConfig;
6876
6877 write_nic_dword(dev, WCAMI, TargetContent);
6878 write_nic_dword(dev, RWCAM, TargetCommand);
6879 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
6880 }
6881 else if(i==1){//MAC
6882 TargetContent = (u32)(*(MacAddr+2)) |
6883 (u32)(*(MacAddr+3)) << 8|
6884 (u32)(*(MacAddr+4)) << 16|
6885 (u32)(*(MacAddr+5)) << 24;
6886 write_nic_dword(dev, WCAMI, TargetContent);
6887 write_nic_dword(dev, RWCAM, TargetCommand);
6888 }
6889 else { //Key Material
6890 if(KeyContent != NULL)
6891 {
6892 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
6893 write_nic_dword(dev, RWCAM, TargetCommand);
6894 }
6895 }
6896 }
6897 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446
GKH		 6898}
6899// This function seems not ready! WB
6900void CamPrintDbgReg(struct net_device* dev)
6901{
6902 unsigned long rvalue;
6903 unsigned char ucValue;
6904 write_nic_dword(dev, DCAM, 0x80000000);
6905 msleep(40);
6906 rvalue = read_nic_dword(dev, DCAM); //delay_ms(40);
6907 RT_TRACE(COMP_SEC, " TX CAM=%8lX ",rvalue);
6908 if((rvalue & 0x40000000) != 0x4000000)
6909 RT_TRACE(COMP_SEC, "-->TX Key Not Found ");
6910 msleep(20);
6911 write_nic_dword(dev, DCAM, 0x00000000); //delay_ms(40);
6912 rvalue = read_nic_dword(dev, DCAM); //delay_ms(40);
6913 RT_TRACE(COMP_SEC, "RX CAM=%8lX ",rvalue);
6914 if((rvalue & 0x40000000) != 0x4000000)
6915 RT_TRACE(COMP_SEC, "-->CAM Key Not Found ");
6916 ucValue = read_nic_byte(dev, SECR);
6917 RT_TRACE(COMP_SEC, "WPA_Config=%x \n",ucValue);
6918}
6919
65a43784 6920bool NicIFEnableNIC(struct net_device* dev)
6921{
6922 RT_STATUS init_status = RT_STATUS_SUCCESS;
6923 struct r8192_priv* priv = ieee80211_priv(dev);
6924 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
6925
6926 //YJ,add,091109
6927 if (priv->up == 0){
6928 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
6929 priv->bdisable_nic = false; //YJ,add,091111
6930 return false;
6931 }
6932 // <1> Reset memory: descriptor, buffer,..
6933 //NicIFResetMemory(Adapter);
6934
6935 // <2> Enable Adapter
6936 //printk("===========>%s()\n",__FUNCTION__);
6937 //priv->bfirst_init = true;
6938 init_status = rtl8192_adapter_start(dev);
6939 if (init_status != RT_STATUS_SUCCESS) {
6940 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
6941 priv->bdisable_nic = false; //YJ,add,091111
6942 return -1;
6943 }
6944 //printk("start adapter finished\n");
6945 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
6946 //priv->bfirst_init = false;
6947
6948 // <3> Enable Interrupt
6949 rtl8192_irq_enable(dev);
6950 priv->bdisable_nic = false;
6951 //RT_TRACE(COMP_PS,"<===========%s()\n",__FUNCTION__);
6952 return (init_status == RT_STATUS_SUCCESS) ? true:false;
6953}
6954bool NicIFDisableNIC(struct net_device* dev)
6955{
6956 bool status = true;
6957 struct r8192_priv* priv = ieee80211_priv(dev);
6958 u8 tmp_state = 0;
6959 // <1> Disable Interrupt
6960 //RT_TRACE(COMP_PS, "=========>%s()\n",__FUNCTION__);
6961 priv->bdisable_nic = true; //YJ,move,091109
6962 tmp_state = priv->ieee80211->state;
6963
6964 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
6965
6966 priv->ieee80211->state = tmp_state;
6967 rtl8192_cancel_deferred_work(priv);
6968 rtl8192_irq_disable(dev);
6969 // <2> Stop all timer
6970
6971 // <3> Disable Adapter
6972 rtl8192_halt_adapter(dev, false);
6973// priv->bdisable_nic = true;
6974 //RT_TRACE(COMP_PS, "<=========%s()\n",__FUNCTION__);
6975
6976 return status;
6977}
6978
ecdfa446
GKH		 6979
6980/***************************************************************************
6981 ------------------- module init / exit stubs ----------------
6982****************************************************************************/
6983module_init(rtl8192_pci_module_init);
6984module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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