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staging: rtl8192e: Pass ieee80211_device to callbacks
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4803ef77 3 * Linux device driver for RTL8192E
ecdfa446
GKH		 4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
97a6688a 27
3d14b518 28#include <linux/vmalloc.h>
5a0e3ad6 29#include <linux/slab.h>
ecdfa446
GKH		 30#include <asm/uaccess.h>
31#include "r8192E_hw.h"
32#include "r8192E.h"
33#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
34#include "r8180_93cx6.h" /* Card EEPROM */
35#include "r8192E_wx.h"
36#include "r819xE_phy.h" //added by WB 4.30.2008
37#include "r819xE_phyreg.h"
38#include "r819xE_cmdpkt.h"
39#include "r8192E_dm.h"
ecdfa446 40
bebdf809 41#ifdef CONFIG_PM
ecdfa446
GKH		 42#include "r8192_pm.h"
43#endif
44
45#ifdef ENABLE_DOT11D
65a43784 46#include "ieee80211/dot11d.h"
ecdfa446
GKH		 47#endif
48
49//set here to open your trace code. //WB
57be9583 50u32 rt_global_debug_component = COMP_ERR ; //always open err flags on
cf3d3d38 51
5eaa53de 52static DEFINE_PCI_DEVICE_TABLE(rtl8192_pci_id_tbl) = {
ecdfa446
GKH		 53 /* Realtek */
54 { PCI_DEVICE(0x10ec, 0x8192) },
55
56 /* Corega */
57 { PCI_DEVICE(0x07aa, 0x0044) },
58 { PCI_DEVICE(0x07aa, 0x0047) },
ecdfa446
GKH		 59 {}
60};
61
dca41306 62static char ifname[IFNAMSIZ] = "wlan%d";
ecdfa446
GKH		 63static int hwwep = 1; //default use hw. set 0 to use software security
64static int channels = 0x3fff;
65
66MODULE_LICENSE("GPL");
ecdfa446 67MODULE_VERSION("V 1.1");
ecdfa446
GKH		 68MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
69//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
70MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
71
ecdfa446 72
dca41306 73module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
ecdfa446
GKH		 74module_param(hwwep,int, S_IRUGO|S_IWUSR);
75module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 76
77MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
ecdfa446
GKH		 78MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
79MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
80
81static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
82 const struct pci_device_id *id);
83static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
84
85static struct pci_driver rtl8192_pci_driver = {
86 .name = RTL819xE_MODULE_NAME, /* Driver name */
87 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
88 .probe = rtl8192_pci_probe, /* probe fn */
89 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
bebdf809 90#ifdef CONFIG_PM
ecdfa446
GKH		 91 .suspend = rtl8192E_suspend, /* PM suspend fn */
92 .resume = rtl8192E_resume, /* PM resume fn */
93#else
94 .suspend = NULL, /* PM suspend fn */
214985a6 95 .resume = NULL, /* PM resume fn */
ecdfa446 96#endif
ecdfa446
GKH		 97};
98
09145962
MM		 99static void rtl8192_start_beacon(struct ieee80211_device *ieee80211);
100static void rtl8192_stop_beacon(struct ieee80211_device *ieee80211);
559fba5e 101static void rtl819x_watchdog_wqcallback(struct work_struct *work);
80a4dead
MM		 102static void rtl8192_irq_rx_tasklet(unsigned long arg);
103static void rtl8192_irq_tx_tasklet(unsigned long arg);
104static void rtl8192_prepare_beacon(unsigned long arg);
559fba5e 105static irqreturn_t rtl8192_interrupt(int irq, void *netdev);
762bf6de 106static void rtl819xE_tx_cmd(struct r8192_priv *priv, struct sk_buff *skb);
480ab9dc 107static void rtl8192_update_ratr_table(struct r8192_priv *priv);
5b3b1a7b
MM		 108static void rtl8192_restart(struct work_struct *work);
109static void watch_dog_timer_callback(unsigned long data);
af59c39d 110static int _rtl8192_up(struct r8192_priv *priv);
5b3b1a7b 111static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
af59c39d 112static short rtl8192_tx(struct r8192_priv *priv, struct sk_buff* skb);
559fba5e 113
ecdfa446
GKH		 114#ifdef ENABLE_DOT11D
115
116typedef struct _CHANNEL_LIST
117{
118 u8 Channel[32];
119 u8 Len;
120}CHANNEL_LIST, *PCHANNEL_LIST;
121
ab2161a0 122static const CHANNEL_LIST ChannelPlan[] = {
ecdfa446
GKH		 123 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
124 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
125 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
126 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
127 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
128 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
129 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
130 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
131 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
132 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
133 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
134};
135
136static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
137{
138 int i, max_chan=-1, min_chan=-1;
139 struct ieee80211_device* ieee = priv->ieee80211;
140 switch (channel_plan)
141 {
142 case COUNTRY_CODE_FCC:
143 case COUNTRY_CODE_IC:
144 case COUNTRY_CODE_ETSI:
145 case COUNTRY_CODE_SPAIN:
146 case COUNTRY_CODE_FRANCE:
147 case COUNTRY_CODE_MKK:
148 case COUNTRY_CODE_MKK1:
149 case COUNTRY_CODE_ISRAEL:
150 case COUNTRY_CODE_TELEC:
151 case COUNTRY_CODE_MIC:
152 {
153 Dot11d_Init(ieee);
154 ieee->bGlobalDomain = false;
155 //acturally 8225 & 8256 rf chip only support B,G,24N mode
6f304eb2
MM		 156 min_chan = 1;
157 max_chan = 14;
158
ecdfa446
GKH		 159 if (ChannelPlan[channel_plan].Len != 0){
160 // Clear old channel map
161 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
162 // Set new channel map
163 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
164 {
165 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
166 break;
167 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
168 }
169 }
170 break;
171 }
172 case COUNTRY_CODE_GLOBAL_DOMAIN:
173 {
174 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
175 Dot11d_Reset(ieee);
176 ieee->bGlobalDomain = true;
177 break;
178 }
179 default:
180 break;
181 }
182}
183#endif
184
52cab756
MM		 185static inline bool rx_hal_is_cck_rate(prx_fwinfo_819x_pci pdrvinfo)
186{
187 return (pdrvinfo->RxRate == DESC90_RATE1M ||
188 pdrvinfo->RxRate == DESC90_RATE2M ||
189 pdrvinfo->RxRate == DESC90_RATE5_5M ||
190 pdrvinfo->RxRate == DESC90_RATE11M) &&
191 !pdrvinfo->RxHT;
192}
ecdfa446 193
480ab9dc 194void CamResetAllEntry(struct r8192_priv* priv)
ecdfa446 195{
3f9ab1ee 196 write_nic_dword(priv, RWCAM, BIT31|BIT30);
ecdfa446
GKH		 197}
198
3f9ab1ee 199void write_cam(struct r8192_priv *priv, u8 addr, u32 data)
ecdfa446 200{
3f9ab1ee
MM		 201 write_nic_dword(priv, WCAMI, data);
202 write_nic_dword(priv, RWCAM, BIT31|BIT16|(addr&0xff) );
ecdfa446 203}
3f9ab1ee
MM		 204
205u32 read_cam(struct r8192_priv *priv, u8 addr)
ecdfa446 206{
3f9ab1ee
MM		 207 write_nic_dword(priv, RWCAM, 0x80000000|(addr&0xff) );
208 return read_nic_dword(priv, 0xa8);
ecdfa446
GKH		 209}
210
3f9ab1ee 211u8 read_nic_byte(struct r8192_priv *priv, int x)
ecdfa446 212{
9a77bd58 213 return 0xff & readb(priv->mem_start + x);
ecdfa446
GKH		 214}
215
3f9ab1ee 216u32 read_nic_dword(struct r8192_priv *priv, int x)
ecdfa446 217{
9a77bd58 218 return readl(priv->mem_start + x);
ecdfa446
GKH		 219}
220
3f9ab1ee 221u16 read_nic_word(struct r8192_priv *priv, int x)
ecdfa446 222{
9a77bd58 223 return readw(priv->mem_start + x);
ecdfa446
GKH		 224}
225
3f9ab1ee 226void write_nic_byte(struct r8192_priv *priv, int x,u8 y)
ecdfa446 227{
9a77bd58 228 writeb(y, priv->mem_start + x);
ecdfa446
GKH		 229 udelay(20);
230}
231
3f9ab1ee 232void write_nic_dword(struct r8192_priv *priv, int x,u32 y)
ecdfa446 233{
9a77bd58 234 writel(y, priv->mem_start + x);
ecdfa446
GKH		 235 udelay(20);
236}
237
3f9ab1ee 238void write_nic_word(struct r8192_priv *priv, int x,u16 y)
ecdfa446 239{
9a77bd58 240 writew(y, priv->mem_start + x);
ecdfa446
GKH		 241 udelay(20);
242}
243
65a43784 244u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
245{
4a533365
MM		 246 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
247 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 248 int wpa_ie_len= ieee->wpa_ie_len;
249 struct ieee80211_crypt_data* crypt;
250 int encrypt;
251
252 crypt = ieee->crypt[ieee->tx_keyidx];
253
207b58fb
MM		 254 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
255 (ieee->host_encrypt && crypt && crypt->ops &&
65a43784 256 (0 == strcmp(crypt->ops->name,"WEP")));
257
258 /* simply judge */
259 if(encrypt && (wpa_ie_len == 0)) {
260 // wep encryption, no N mode setting */
261 return SEC_ALG_WEP;
262 } else if((wpa_ie_len != 0)) {
263 // parse pairwise key type */
264 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
265 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
266 return SEC_ALG_CCMP;
267 else
268 return SEC_ALG_TKIP;
269 } else {
270 return SEC_ALG_NONE;
271 }
272}
273
d1c580aa 274void rtl8192e_SetHwReg(struct ieee80211_device *ieee80211, u8 variable, u8 *val)
65a43784 275{
d1c580aa 276 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
65a43784 277
278 switch(variable)
279 {
280
281 case HW_VAR_BSSID:
3f9ab1ee
MM		 282 write_nic_dword(priv, BSSIDR, ((u32*)(val))[0]);
283 write_nic_word(priv, BSSIDR+2, ((u16*)(val+2))[0]);
65a43784 284 break;
285
286 case HW_VAR_MEDIA_STATUS:
287 {
288 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
3f9ab1ee 289 u8 btMsr = read_nic_byte(priv, MSR);
65a43784 290
291 btMsr &= 0xfc;
292
293 switch(OpMode)
294 {
295 case RT_OP_MODE_INFRASTRUCTURE:
296 btMsr |= MSR_INFRA;
65a43784 297 break;
298
299 case RT_OP_MODE_IBSS:
300 btMsr |= MSR_ADHOC;
65a43784 301 break;
302
303 case RT_OP_MODE_AP:
304 btMsr |= MSR_AP;
65a43784 305 break;
306
307 default:
308 btMsr |= MSR_NOLINK;
309 break;
310 }
311
3f9ab1ee 312 write_nic_byte(priv, MSR, btMsr);
65a43784 313 }
314 break;
315
951fc8ed 316 case HW_VAR_CHECK_BSSID:
65a43784 317 {
318 u32 RegRCR, Type;
319
320 Type = ((u8*)(val))[0];
3f9ab1ee 321 RegRCR = read_nic_dword(priv, RCR);
65a43784 322 priv->ReceiveConfig = RegRCR;
323
324 if (Type == true)
325 RegRCR |= (RCR_CBSSID);
326 else if (Type == false)
327 RegRCR &= (~RCR_CBSSID);
328
3f9ab1ee 329 write_nic_dword(priv, RCR,RegRCR);
65a43784 330 priv->ReceiveConfig = RegRCR;
331
332 }
333 break;
334
335 case HW_VAR_SLOT_TIME:
336 {
65a43784 337 priv->slot_time = val[0];
3f9ab1ee 338 write_nic_byte(priv, SLOT_TIME, val[0]);
65a43784 339
340 }
341 break;
342
343 case HW_VAR_ACK_PREAMBLE:
344 {
345 u32 regTmp = 0;
346 priv->short_preamble = (bool)(*(u8*)val );
347 regTmp = priv->basic_rate;
348 if (priv->short_preamble)
349 regTmp |= BRSR_AckShortPmb;
3f9ab1ee 350 write_nic_dword(priv, RRSR, regTmp);
65a43784 351 }
352 break;
353
354 case HW_VAR_CPU_RST:
3f9ab1ee 355 write_nic_dword(priv, CPU_GEN, ((u32*)(val))[0]);
65a43784 356 break;
357
358 default:
359 break;
360 }
361
362}
363
ecdfa446
GKH		 364static struct proc_dir_entry *rtl8192_proc = NULL;
365
ecdfa446
GKH		 366static int proc_get_stats_ap(char *page, char **start,
367 off_t offset, int count,
368 int *eof, void *data)
369{
de69ba32 370 struct r8192_priv *priv = data;
ecdfa446
GKH		 371 struct ieee80211_device *ieee = priv->ieee80211;
372 struct ieee80211_network *target;
ecdfa446
GKH		 373 int len = 0;
374
375 list_for_each_entry(target, &ieee->network_list, list) {
376
377 len += snprintf(page + len, count - len,
378 "%s ", target->ssid);
379
380 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
381 len += snprintf(page + len, count - len,
382 "WPA\n");
383 }
384 else{
385 len += snprintf(page + len, count - len,
386 "non_WPA\n");
387 }
388
389 }
390
391 *eof = 1;
392 return len;
393}
394
395static int proc_get_registers(char *page, char **start,
396 off_t offset, int count,
397 int *eof, void *data)
398{
de69ba32 399 struct r8192_priv *priv = data;
ecdfa446
GKH		 400 int len = 0;
401 int i,n;
ecdfa446
GKH		 402 int max=0xff;
403
404 /* This dump the current register page */
405 len += snprintf(page + len, count - len,
406 "\n####################page 0##################\n ");
407
408 for(n=0;n<=max;)
409 {
ecdfa446
GKH		 410 len += snprintf(page + len, count - len,
411 "\nD: %2x > ",n);
412
413 for(i=0;i<16 && n<=max;i++,n++)
414 len += snprintf(page + len, count - len,
3f9ab1ee 415 "%2x ",read_nic_byte(priv,n));
ecdfa446
GKH		 416 }
417 len += snprintf(page + len, count - len,"\n");
418 len += snprintf(page + len, count - len,
419 "\n####################page 1##################\n ");
420 for(n=0;n<=max;)
421 {
ecdfa446
GKH		 422 len += snprintf(page + len, count - len,
423 "\nD: %2x > ",n);
424
425 for(i=0;i<16 && n<=max;i++,n++)
426 len += snprintf(page + len, count - len,
3f9ab1ee 427 "%2x ",read_nic_byte(priv,0x100|n));
ecdfa446
GKH		 428 }
429
430 len += snprintf(page + len, count - len,
431 "\n####################page 3##################\n ");
432 for(n=0;n<=max;)
433 {
ecdfa446
GKH		 434 len += snprintf(page + len, count - len,
435 "\nD: %2x > ",n);
436
437 for(i=0;i<16 && n<=max;i++,n++)
438 len += snprintf(page + len, count - len,
3f9ab1ee 439 "%2x ",read_nic_byte(priv,0x300|n));
ecdfa446
GKH		 440 }
441
ecdfa446
GKH		 442 *eof = 1;
443 return len;
444
445}
446
ecdfa446
GKH		 447static int proc_get_stats_tx(char *page, char **start,
448 off_t offset, int count,
449 int *eof, void *data)
450{
de69ba32 451 struct r8192_priv *priv = data;
ecdfa446
GKH		 452
453 int len = 0;
454
455 len += snprintf(page + len, count - len,
456 "TX VI priority ok int: %lu\n"
ecdfa446 457 "TX VO priority ok int: %lu\n"
ecdfa446 458 "TX BE priority ok int: %lu\n"
ecdfa446 459 "TX BK priority ok int: %lu\n"
ecdfa446 460 "TX MANAGE priority ok int: %lu\n"
ecdfa446
GKH		 461 "TX BEACON priority ok int: %lu\n"
462 "TX BEACON priority error int: %lu\n"
463 "TX CMDPKT priority ok int: %lu\n"
ecdfa446
GKH		 464 "TX queue stopped?: %d\n"
465 "TX fifo overflow: %lu\n"
ecdfa446
GKH		 466 "TX total data packets %lu\n"
467 "TX total data bytes :%lu\n",
ecdfa446 468 priv->stats.txviokint,
ecdfa446 469 priv->stats.txvookint,
ecdfa446 470 priv->stats.txbeokint,
ecdfa446 471 priv->stats.txbkokint,
ecdfa446 472 priv->stats.txmanageokint,
ecdfa446
GKH		 473 priv->stats.txbeaconokint,
474 priv->stats.txbeaconerr,
475 priv->stats.txcmdpktokint,
de69ba32 476 netif_queue_stopped(priv->ieee80211->dev),
ecdfa446 477 priv->stats.txoverflow,
ecdfa446 478 priv->ieee80211->stats.tx_packets,
3059f2de 479 priv->ieee80211->stats.tx_bytes);
ecdfa446
GKH		 480
481 *eof = 1;
482 return len;
483}
484
485
486
487static int proc_get_stats_rx(char *page, char **start,
488 off_t offset, int count,
489 int *eof, void *data)
490{
de69ba32 491 struct r8192_priv *priv = data;
ecdfa446
GKH		 492 int len = 0;
493
494 len += snprintf(page + len, count - len,
495 "RX packets: %lu\n"
496 "RX desc err: %lu\n"
c282f2e3 497 "RX rx overflow error: %lu\n",
ecdfa446
GKH		 498 priv->stats.rxint,
499 priv->stats.rxrdu,
c282f2e3 500 priv->stats.rxoverflow);
ecdfa446
GKH		 501
502 *eof = 1;
503 return len;
504}
505
5e1ad18a 506static void rtl8192_proc_module_init(void)
ecdfa446 507{
703fdcc3 508 RT_TRACE(COMP_INIT, "Initializing proc filesystem\n");
ecdfa446 509 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 510}
511
512
5e1ad18a 513static void rtl8192_proc_module_remove(void)
ecdfa446 514{
ecdfa446 515 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 516}
517
518
af59c39d 519static void rtl8192_proc_remove_one(struct r8192_priv *priv)
ecdfa446 520{
af59c39d 521 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 522
523 printk("dev name=======> %s\n",dev->name);
524
525 if (priv->dir_dev) {
ecdfa446
GKH		 526 remove_proc_entry("stats-tx", priv->dir_dev);
527 remove_proc_entry("stats-rx", priv->dir_dev);
ecdfa446
GKH		 528 remove_proc_entry("stats-ap", priv->dir_dev);
529 remove_proc_entry("registers", priv->dir_dev);
ecdfa446
GKH		 530 remove_proc_entry("wlan0", rtl8192_proc);
531 priv->dir_dev = NULL;
532 }
533}
534
535
af59c39d 536static void rtl8192_proc_init_one(struct r8192_priv *priv)
ecdfa446 537{
af59c39d 538 struct net_device *dev = priv->ieee80211->dev;
ecdfa446 539 struct proc_dir_entry *e;
af59c39d 540
ecdfa446
GKH		 541 priv->dir_dev = create_proc_entry(dev->name,
542 S_IFDIR | S_IRUGO | S_IXUGO,
543 rtl8192_proc);
544 if (!priv->dir_dev) {
545 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
546 dev->name);
547 return;
548 }
ecdfa446 549 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
de69ba32 550 priv->dir_dev, proc_get_stats_rx, priv);
ecdfa446
GKH		 551
552 if (!e) {
553 RT_TRACE(COMP_ERR,"Unable to initialize "
554 "/proc/net/rtl8192/%s/stats-rx\n",
555 dev->name);
556 }
557
558
559 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
de69ba32 560 priv->dir_dev, proc_get_stats_tx, priv);
ecdfa446
GKH		 561
562 if (!e) {
563 RT_TRACE(COMP_ERR, "Unable to initialize "
564 "/proc/net/rtl8192/%s/stats-tx\n",
565 dev->name);
566 }
ecdfa446
GKH		 567
568 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
de69ba32 569 priv->dir_dev, proc_get_stats_ap, priv);
ecdfa446
GKH		 570
571 if (!e) {
572 RT_TRACE(COMP_ERR, "Unable to initialize "
573 "/proc/net/rtl8192/%s/stats-ap\n",
574 dev->name);
575 }
576
577 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
de69ba32 578 priv->dir_dev, proc_get_registers, priv);
ecdfa446
GKH		 579 if (!e) {
580 RT_TRACE(COMP_ERR, "Unable to initialize "
581 "/proc/net/rtl8192/%s/registers\n",
582 dev->name);
583 }
ecdfa446 584}
ecdfa446 585
9f17b076 586static short check_nic_enough_desc(struct net_device *dev, int prio)
ecdfa446
GKH		 587{
588 struct r8192_priv *priv = ieee80211_priv(dev);
589 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
590
591 /* for now we reserve two free descriptor as a safety boundary
592 * between the tail and the head
593 */
285f660c 594 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
ecdfa446
GKH		 595}
596
5e1ad18a 597static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 598{
599 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 600
ecdfa446 601 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 602 printk("TXTIMEOUT");
603}
604
480ab9dc 605static void rtl8192_irq_enable(struct r8192_priv *priv)
ecdfa446 606{
ae9f66da
MM		 607 u32 mask;
608
609 mask = IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
610 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
611 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
612 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER;
613
614 write_nic_dword(priv, INTA_MASK, mask);
ecdfa446
GKH		 615}
616
af59c39d 617static void rtl8192_irq_disable(struct r8192_priv *priv)
ecdfa446 618{
3f9ab1ee 619 write_nic_dword(priv, INTA_MASK, 0);
af59c39d 620 synchronize_irq(priv->irq);
ecdfa446
GKH		 621}
622
480ab9dc 623static void rtl8192_update_msr(struct r8192_priv *priv)
ecdfa446 624{
ecdfa446
GKH		 625 u8 msr;
626
3f9ab1ee 627 msr = read_nic_byte(priv, MSR);
ecdfa446
GKH		 628 msr &= ~ MSR_LINK_MASK;
629
630 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
631 * msr must be updated if the state is ASSOCIATING.
632 * this is intentional and make sense for ad-hoc and
633 * master (see the create BSS/IBSS func)
634 */
635 if (priv->ieee80211->state == IEEE80211_LINKED){
636
637 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
638 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
639 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
640 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
641 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
642 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
643
644 }else
645 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
646
3f9ab1ee 647 write_nic_byte(priv, MSR, msr);
ecdfa446
GKH		 648}
649
09145962 650static void rtl8192_set_chan(struct ieee80211_device *ieee80211, short ch)
ecdfa446 651{
09145962 652 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
ecdfa446 653
61d0e67a 654 priv->chan = ch;
ecdfa446 655
61d0e67a 656 /* need to implement rf set channel here WB */
ecdfa446 657
61d0e67a 658 if (priv->rf_set_chan)
09145962 659 priv->rf_set_chan(ieee80211, priv->chan);
ecdfa446
GKH		 660}
661
480ab9dc 662static void rtl8192_rx_enable(struct r8192_priv *priv)
ecdfa446 663{
480ab9dc 664 write_nic_dword(priv, RDQDA, priv->rx_ring_dma);
ecdfa446
GKH		 665}
666
667/* the TX_DESC_BASE setting is according to the following queue index
668 * BK_QUEUE ===> 0
669 * BE_QUEUE ===> 1
670 * VI_QUEUE ===> 2
671 * VO_QUEUE ===> 3
672 * HCCA_QUEUE ===> 4
673 * TXCMD_QUEUE ===> 5
674 * MGNT_QUEUE ===> 6
675 * HIGH_QUEUE ===> 7
676 * BEACON_QUEUE ===> 8
677 * */
881a975b 678static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
480ab9dc 679static void rtl8192_tx_enable(struct r8192_priv *priv)
ecdfa446 680{
7aed48d9 681 u32 i;
ecdfa446 682
7aed48d9 683 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
3f9ab1ee 684 write_nic_dword(priv, TX_DESC_BASE[i], priv->tx_ring[i].dma);
7aed48d9
MM		 685
686 ieee80211_reset_queue(priv->ieee80211);
ecdfa446
GKH		 687}
688
ecdfa446 689
af59c39d 690static void rtl8192_free_rx_ring(struct r8192_priv *priv)
ecdfa446 691{
7aed48d9 692 int i;
ecdfa446 693
7aed48d9
MM		 694 for (i = 0; i < priv->rxringcount; i++) {
695 struct sk_buff *skb = priv->rx_buf[i];
696 if (!skb)
697 continue;
ecdfa446 698
7aed48d9
MM		 699 pci_unmap_single(priv->pdev,
700 *((dma_addr_t *)skb->cb),
701 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
702 kfree_skb(skb);
703 }
ecdfa446 704
7aed48d9
MM		 705 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
706 priv->rx_ring, priv->rx_ring_dma);
707 priv->rx_ring = NULL;
ecdfa446
GKH		 708}
709
af59c39d 710static void rtl8192_free_tx_ring(struct r8192_priv *priv, unsigned int prio)
ecdfa446 711{
7aed48d9 712 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 713
7aed48d9
MM		 714 while (skb_queue_len(&ring->queue)) {
715 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
716 struct sk_buff *skb = __skb_dequeue(&ring->queue);
ecdfa446 717
7aed48d9
MM		 718 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
719 skb->len, PCI_DMA_TODEVICE);
720 kfree_skb(skb);
721 ring->idx = (ring->idx + 1) % ring->entries;
722 }
ecdfa446 723
7aed48d9
MM		 724 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
725 ring->desc, ring->dma);
726 ring->desc = NULL;
ecdfa446
GKH		 727}
728
480ab9dc 729void PHY_SetRtl8192eRfOff(struct r8192_priv *priv)
ecdfa446 730{
65a43784 731 //disable RF-Chip A/B
d9ffa6c2 732 rtl8192_setBBreg(priv, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
65a43784 733 //analog to digital off, for power save
d9ffa6c2 734 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter4, 0x300, 0x0);
65a43784 735 //digital to analog off, for power save
d9ffa6c2 736 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x18, 0x0);
65a43784 737 //rx antenna off
d9ffa6c2 738 rtl8192_setBBreg(priv, rOFDM0_TRxPathEnable, 0xf, 0x0);
65a43784 739 //rx antenna off
d9ffa6c2 740 rtl8192_setBBreg(priv, rOFDM1_TRxPathEnable, 0xf, 0x0);
65a43784 741 //analog to digital part2 off, for power save
d9ffa6c2
MM		 742 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x60, 0x0);
743 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x4, 0x0);
65a43784 744 // Analog parameter!!Change bias and Lbus control.
3f9ab1ee 745 write_nic_byte(priv, ANAPAR_FOR_8192PciE, 0x07);
65a43784 746}
ecdfa446 747
af59c39d 748static void rtl8192_halt_adapter(struct r8192_priv *priv, bool reset)
ecdfa446 749{
65a43784 750 int i;
932f4b3a
MM		 751 u8 OpMode;
752 u32 ulRegRead;
65a43784 753
754 OpMode = RT_OP_MODE_NO_LINK;
d1c580aa 755 priv->ieee80211->SetHwRegHandler(priv->ieee80211, HW_VAR_MEDIA_STATUS, &OpMode);
ecdfa446 756
932f4b3a
MM		 757 if (!priv->ieee80211->bSupportRemoteWakeUp) {
758 /*
759 * disable tx/rx. In 8185 we write 0x10 (Reset bit),
760 * but here we make reference to WMAC and wirte 0x0
761 */
3f9ab1ee 762 write_nic_byte(priv, CMDR, 0);
65a43784 763 }
ecdfa446 764
65a43784 765 mdelay(20);
ecdfa446 766
932f4b3a 767 if (!reset) {
65a43784 768 mdelay(150);
769
932f4b3a 770 priv->bHwRfOffAction = 2;
65a43784 771
932f4b3a
MM		 772 /*
773 * Call MgntActSet_RF_State instead to
774 * prevent RF config race condition.
775 */
776 if (!priv->ieee80211->bSupportRemoteWakeUp) {
480ab9dc 777 PHY_SetRtl8192eRfOff(priv);
3f9ab1ee 778 ulRegRead = read_nic_dword(priv, CPU_GEN);
932f4b3a 779 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3f9ab1ee 780 write_nic_dword(priv,CPU_GEN, ulRegRead);
932f4b3a
MM		 781 } else {
782 /* for WOL */
3f9ab1ee
MM		 783 write_nic_dword(priv, WFCRC0, 0xffffffff);
784 write_nic_dword(priv, WFCRC1, 0xffffffff);
785 write_nic_dword(priv, WFCRC2, 0xffffffff);
65a43784 786
932f4b3a 787 /* Write PMR register */
3f9ab1ee 788 write_nic_byte(priv, PMR, 0x5);
932f4b3a 789 /* Disable tx, enanble rx */
3f9ab1ee 790 write_nic_byte(priv, MacBlkCtrl, 0xa);
65a43784 791 }
792 }
793
794 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
795 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
796 }
797 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
798 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
799 }
ecdfa446
GKH		 800
801 skb_queue_purge(&priv->skb_queue);
ecdfa446
GKH		 802}
803
09145962 804static void rtl8192_data_hard_stop(struct ieee80211_device *ieee80211)
ecdfa446 805{
ecdfa446
GKH		 806}
807
09145962 808static void rtl8192_data_hard_resume(struct ieee80211_device *ieee80211)
ecdfa446 809{
ecdfa446
GKH		 810}
811
214985a6
MM		 812/*
813 * this function TX data frames when the ieee80211 stack requires this.
ecdfa446
GKH		 814 * It checks also if we need to stop the ieee tx queue, eventually do it
815 */
09145962
MM		 816static void rtl8192_hard_data_xmit(struct sk_buff *skb,
817 struct ieee80211_device *ieee80211, int rate)
ecdfa446 818{
09145962 819 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
ecdfa446 820 int ret;
ecdfa446
GKH		 821 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
822 u8 queue_index = tcb_desc->queue_index;
dcf663fb 823
ecdfa446 824 /* shall not be referred by command packet */
5d33549a 825 BUG_ON(queue_index == TXCMD_QUEUE);
ecdfa446 826
dcf663fb 827 if (priv->bHwRadioOff || (!priv->up))
65a43784 828 {
829 kfree_skb(skb);
830 return;
831 }
832
09145962 833 memcpy(skb->cb, &ieee80211->dev, sizeof(ieee80211->dev));
ecdfa446 834
ecdfa446 835 skb_push(skb, priv->ieee80211->tx_headroom);
af59c39d 836 ret = rtl8192_tx(priv, skb);
dcf663fb 837 if (ret != 0) {
ecdfa446 838 kfree_skb(skb);
ecdfa446
GKH		 839 }
840
dcf663fb
MM		 841 if (queue_index != MGNT_QUEUE) {
842 priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom);
843 priv->ieee80211->stats.tx_packets++;
844 }
ecdfa446
GKH		 845}
846
214985a6
MM		 847/*
848 * This is a rough attempt to TX a frame
ecdfa446
GKH		 849 * This is called by the ieee 80211 stack to TX management frames.
850 * If the ring is full packet are dropped (for data frame the queue
851 * is stopped before this can happen).
852 */
09145962 853static int rtl8192_hard_start_xmit(struct sk_buff *skb, struct ieee80211_device *ieee80211)
ecdfa446 854{
09145962 855 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
ecdfa446 856 int ret;
ecdfa446
GKH		 857 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
858 u8 queue_index = tcb_desc->queue_index;
859
162f535f
MM		 860 if (queue_index != TXCMD_QUEUE) {
861 if (priv->bHwRadioOff || (!priv->up))
65a43784 862 {
162f535f
MM		 863 kfree_skb(skb);
864 return 0;
865 }
65a43784 866 }
ecdfa446 867
09145962 868 memcpy(skb->cb, &ieee80211->dev, sizeof(ieee80211->dev));
162f535f 869 if (queue_index == TXCMD_QUEUE) {
762bf6de 870 rtl819xE_tx_cmd(priv, skb);
ecdfa446 871 ret = 0;
ecdfa446
GKH		 872 return ret;
873 } else {
ecdfa446
GKH		 874 tcb_desc->RATRIndex = 7;
875 tcb_desc->bTxDisableRateFallBack = 1;
876 tcb_desc->bTxUseDriverAssingedRate = 1;
877 tcb_desc->bTxEnableFwCalcDur = 1;
09145962 878 skb_push(skb, ieee80211->tx_headroom);
af59c39d 879 ret = rtl8192_tx(priv, skb);
162f535f 880 if (ret != 0) {
ecdfa446 881 kfree_skb(skb);
162f535f 882 }
ecdfa446
GKH		 883 }
884
ecdfa446 885 return ret;
ecdfa446
GKH		 886}
887
888
af59c39d 889static void rtl8192_tx_isr(struct r8192_priv *priv, int prio)
ecdfa446 890{
a922a4b7 891 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 892
a922a4b7
MM		 893 while (skb_queue_len(&ring->queue)) {
894 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
895 struct sk_buff *skb;
ecdfa446 896
a922a4b7
MM		 897 /*
898 * beacon packet will only use the first descriptor defaultly,
899 * and the OWN may not be cleared by the hardware
900 */
901 if (prio != BEACON_QUEUE) {
902 if (entry->OWN)
903 return;
904 ring->idx = (ring->idx + 1) % ring->entries;
905 }
ecdfa446 906
a922a4b7
MM		 907 skb = __skb_dequeue(&ring->queue);
908 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
909 skb->len, PCI_DMA_TODEVICE);
ecdfa446 910
a922a4b7
MM		 911 kfree_skb(skb);
912 }
ecdfa446 913
a922a4b7
MM		 914 if (prio != BEACON_QUEUE) {
915 /* try to deal with the pending packets */
916 tasklet_schedule(&priv->irq_tx_tasklet);
917 }
ecdfa446
GKH		 918}
919
09145962 920static void rtl8192_stop_beacon(struct ieee80211_device *ieee80211)
ecdfa446 921{
ecdfa446
GKH		 922}
923
480ab9dc 924static void rtl8192_config_rate(struct r8192_priv *priv, u16* rate_config)
ecdfa446 925{
ecdfa446
GKH		 926 struct ieee80211_network *net;
927 u8 i=0, basic_rate = 0;
928 net = & priv->ieee80211->current_network;
929
930 for (i=0; i<net->rates_len; i++)
931 {
932 basic_rate = net->rates[i]&0x7f;
933 switch(basic_rate)
934 {
935 case MGN_1M: *rate_config |= RRSR_1M; break;
936 case MGN_2M: *rate_config |= RRSR_2M; break;
937 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
938 case MGN_11M: *rate_config |= RRSR_11M; break;
939 case MGN_6M: *rate_config |= RRSR_6M; break;
940 case MGN_9M: *rate_config |= RRSR_9M; break;
941 case MGN_12M: *rate_config |= RRSR_12M; break;
942 case MGN_18M: *rate_config |= RRSR_18M; break;
943 case MGN_24M: *rate_config |= RRSR_24M; break;
944 case MGN_36M: *rate_config |= RRSR_36M; break;
945 case MGN_48M: *rate_config |= RRSR_48M; break;
946 case MGN_54M: *rate_config |= RRSR_54M; break;
947 }
948 }
949 for (i=0; i<net->rates_ex_len; i++)
950 {
951 basic_rate = net->rates_ex[i]&0x7f;
952 switch(basic_rate)
953 {
954 case MGN_1M: *rate_config |= RRSR_1M; break;
955 case MGN_2M: *rate_config |= RRSR_2M; break;
956 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
957 case MGN_11M: *rate_config |= RRSR_11M; break;
958 case MGN_6M: *rate_config |= RRSR_6M; break;
959 case MGN_9M: *rate_config |= RRSR_9M; break;
960 case MGN_12M: *rate_config |= RRSR_12M; break;
961 case MGN_18M: *rate_config |= RRSR_18M; break;
962 case MGN_24M: *rate_config |= RRSR_24M; break;
963 case MGN_36M: *rate_config |= RRSR_36M; break;
964 case MGN_48M: *rate_config |= RRSR_48M; break;
965 case MGN_54M: *rate_config |= RRSR_54M; break;
966 }
967 }
968}
969
970
971#define SHORT_SLOT_TIME 9
972#define NON_SHORT_SLOT_TIME 20
973
480ab9dc 974static void rtl8192_update_cap(struct r8192_priv *priv, u16 cap)
ecdfa446
GKH		 975{
976 u32 tmp = 0;
ecdfa446 977 struct ieee80211_network *net = &priv->ieee80211->current_network;
480ab9dc 978
ecdfa446
GKH		 979 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
980 tmp = priv->basic_rate;
981 if (priv->short_preamble)
982 tmp |= BRSR_AckShortPmb;
3f9ab1ee 983 write_nic_dword(priv, RRSR, tmp);
ecdfa446
GKH		 984
985 if (net->mode & (IEEE_G|IEEE_N_24G))
986 {
987 u8 slot_time = 0;
988 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
989 {//short slot time
990 slot_time = SHORT_SLOT_TIME;
991 }
992 else //long slot time
993 slot_time = NON_SHORT_SLOT_TIME;
994 priv->slot_time = slot_time;
3f9ab1ee 995 write_nic_byte(priv, SLOT_TIME, slot_time);
ecdfa446
GKH		 996 }
997
998}
5e1ad18a 999
480ab9dc 1000static void rtl8192_net_update(struct r8192_priv *priv)
ecdfa446 1001{
ecdfa446
GKH		 1002 struct ieee80211_network *net;
1003 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1004 u16 rate_config = 0;
1005 net = &priv->ieee80211->current_network;
eb40aeac
MM		 1006
1007 /* update Basic rate: RR, BRSR */
480ab9dc 1008 rtl8192_config_rate(priv, &rate_config);
ecdfa446 1009
eb40aeac
MM		 1010 /*
1011 * Select RRSR (in Legacy-OFDM and CCK)
1012 * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M,
1013 * 2M, and 1M from the Basic rate.
1014 * We do not use other rates.
1015 */
1016 priv->basic_rate = rate_config &= 0x15f;
1017
1018 /* BSSID */
3f9ab1ee
MM		 1019 write_nic_dword(priv, BSSIDR, ((u32 *)net->bssid)[0]);
1020 write_nic_word(priv, BSSIDR+4, ((u16 *)net->bssid)[2]);
ecdfa446 1021
ecdfa446
GKH		 1022 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1023 {
3f9ab1ee
MM		 1024 write_nic_word(priv, ATIMWND, 2);
1025 write_nic_word(priv, BCN_DMATIME, 256);
1026 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
eb40aeac
MM		 1027 /*
1028 * BIT15 of BCN_DRV_EARLY_INT will indicate
1029 * whether software beacon or hw beacon is applied.
1030 */
3f9ab1ee
MM		 1031 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
1032 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 1033
1034 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
eb40aeac
MM		 1035 /* TODO: BcnIFS may required to be changed on ASIC */
1036 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 1037 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446 1038 }
ecdfa446
GKH		 1039}
1040
762bf6de 1041static void rtl819xE_tx_cmd(struct r8192_priv *priv, struct sk_buff *skb)
ecdfa446 1042{
ecdfa446
GKH		 1043 struct rtl8192_tx_ring *ring;
1044 tx_desc_819x_pci *entry;
1045 unsigned int idx;
1046 dma_addr_t mapping;
1047 cb_desc *tcb_desc;
1048 unsigned long flags;
1049
1050 ring = &priv->tx_ring[TXCMD_QUEUE];
1051 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1052
1053 spin_lock_irqsave(&priv->irq_th_lock,flags);
1054 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1055 entry = &ring->desc[idx];
1056
1057 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1058 memset(entry,0,12);
1059 entry->LINIP = tcb_desc->bLastIniPkt;
1060 entry->FirstSeg = 1;//first segment
1061 entry->LastSeg = 1; //last segment
1062 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1063 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1064 } else {
1065 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1066 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1067 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1068 entry->QueueSelect = QSLT_CMD;
1069 entry->TxFWInfoSize = 0x08;
1070 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1071 }
1072 entry->TxBufferSize = skb->len;
1073 entry->TxBuffAddr = cpu_to_le32(mapping);
1074 entry->OWN = 1;
1075
ecdfa446
GKH		 1076 __skb_queue_tail(&ring->queue, skb);
1077 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1078
3f9ab1ee 1079 write_nic_byte(priv, TPPoll, TPPoll_CQ);
ecdfa446
GKH		 1080
1081 return;
1082}
1083
1084/*
1085 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1086 * in TxFwInfo data structure
214985a6 1087 */
5e1ad18a 1088static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446 1089{
f72b6a50 1090 u8 QueueSelect = 0;
ecdfa446 1091
f72b6a50
MM		 1092 switch (QueueID) {
1093 case BE_QUEUE:
1094 QueueSelect = QSLT_BE;
1095 break;
ecdfa446 1096
f72b6a50
MM		 1097 case BK_QUEUE:
1098 QueueSelect = QSLT_BK;
1099 break;
ecdfa446 1100
f72b6a50
MM		 1101 case VO_QUEUE:
1102 QueueSelect = QSLT_VO;
1103 break;
ecdfa446 1104
f72b6a50
MM		 1105 case VI_QUEUE:
1106 QueueSelect = QSLT_VI;
1107 break;
ecdfa446 1108
f72b6a50
MM		 1109 case MGNT_QUEUE:
1110 QueueSelect = QSLT_MGNT;
1111 break;
ecdfa446 1112
f72b6a50
MM		 1113 case BEACON_QUEUE:
1114 QueueSelect = QSLT_BEACON;
1115 break;
ecdfa446 1116
f72b6a50
MM		 1117 case TXCMD_QUEUE:
1118 QueueSelect = QSLT_CMD;
1119 break;
1120
1121 case HIGH_QUEUE:
1122 default:
1123 RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID);
1124 break;
ecdfa446
GKH		 1125 }
1126 return QueueSelect;
1127}
1128
5e1ad18a 1129static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1130{
1131 u8 ret = DESC90_RATE1M;
1132
1133 switch(rate) {
1134 case MGN_1M: ret = DESC90_RATE1M; break;
1135 case MGN_2M: ret = DESC90_RATE2M; break;
1136 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1137 case MGN_11M: ret = DESC90_RATE11M; break;
1138 case MGN_6M: ret = DESC90_RATE6M; break;
1139 case MGN_9M: ret = DESC90_RATE9M; break;
1140 case MGN_12M: ret = DESC90_RATE12M; break;
1141 case MGN_18M: ret = DESC90_RATE18M; break;
1142 case MGN_24M: ret = DESC90_RATE24M; break;
1143 case MGN_36M: ret = DESC90_RATE36M; break;
1144 case MGN_48M: ret = DESC90_RATE48M; break;
1145 case MGN_54M: ret = DESC90_RATE54M; break;
1146
1147 // HT rate since here
1148 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1149 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1150 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1151 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1152 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1153 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1154 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1155 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1156 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1157 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1158 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1159 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1160 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1161 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1162 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1163 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1164 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1165
1166 default: break;
1167 }
1168 return ret;
1169}
1170
1171
5e1ad18a 1172static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1173{
1174 u8 tmp_Short;
1175
1176 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1177
1178 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1179 tmp_Short = 0;
1180
1181 return tmp_Short;
1182}
1183
1184/*
1185 * The tx procedure is just as following,
1186 * skb->cb will contain all the following information,
1187 * priority, morefrag, rate, &dev.
214985a6 1188 */
af59c39d 1189static short rtl8192_tx(struct r8192_priv *priv, struct sk_buff* skb)
ecdfa446 1190{
067ba6cf
MM		 1191 struct rtl8192_tx_ring *ring;
1192 unsigned long flags;
1193 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1194 tx_desc_819x_pci *pdesc = NULL;
1195 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1196 dma_addr_t mapping;
1197 bool multi_addr = false, broad_addr = false, uni_addr = false;
1198 u8 *pda_addr = NULL;
1199 int idx;
1200
1201 if (priv->bdisable_nic) {
1202 RT_TRACE(COMP_ERR, "Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
1203 skb->len, tcb_desc->queue_index);
65a43784 1204 return skb->len;
067ba6cf 1205 }
65a43784 1206
1207#ifdef ENABLE_LPS
1208 priv->ieee80211->bAwakePktSent = true;
1209#endif
1210
067ba6cf
MM		 1211 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1212
1213 /* collect the tx packets statitcs */
1214 pda_addr = ((u8 *)skb->data) + sizeof(TX_FWINFO_8190PCI);
1215 if (is_multicast_ether_addr(pda_addr))
1216 multi_addr = true;
1217 else if (is_broadcast_ether_addr(pda_addr))
1218 broad_addr = true;
1219 else
1220 uni_addr = true;
1221
1222 if (uni_addr)
1223 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
067ba6cf
MM		 1224
1225 /* fill tx firmware */
1226 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1227 memset(pTxFwInfo, 0, sizeof(TX_FWINFO_8190PCI));
1228 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
1229 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1230 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1231 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1232
1233 /* Aggregation related */
1234 if (tcb_desc->bAMPDUEnable) {
1235 pTxFwInfo->AllowAggregation = 1;
1236 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1237 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1238 } else {
1239 pTxFwInfo->AllowAggregation = 0;
1240 pTxFwInfo->RxMF = 0;
1241 pTxFwInfo->RxAMD = 0;
1242 }
ecdfa446 1243
067ba6cf
MM		 1244 /* Protection mode related */
1245 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
1246 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
1247 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
1248 pTxFwInfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
1249 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1250 pTxFwInfo->RtsBandwidth = 0;
1251 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1252 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) : (tcb_desc->bRTSUseShortGI? 1 : 0);
1253
1254 /* Set Bandwidth and sub-channel settings. */
1255 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
1256 if (tcb_desc->bPacketBW) {
1257 pTxFwInfo->TxBandwidth = 1;
067ba6cf
MM		 1258 /* use duplicated mode */
1259 pTxFwInfo->TxSubCarrier = 0;
067ba6cf
MM		 1260 } else {
1261 pTxFwInfo->TxBandwidth = 0;
1262 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1263 }
1264 } else {
1265 pTxFwInfo->TxBandwidth = 0;
1266 pTxFwInfo->TxSubCarrier = 0;
1267 }
ecdfa446 1268
067ba6cf
MM		 1269 spin_lock_irqsave(&priv->irq_th_lock, flags);
1270 ring = &priv->tx_ring[tcb_desc->queue_index];
1271 if (tcb_desc->queue_index != BEACON_QUEUE)
1272 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1273 else
1274 idx = 0;
1275
1276 pdesc = &ring->desc[idx];
1277 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
703fdcc3 1278 RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d,idx = %d,%x\n",
067ba6cf
MM		 1279 tcb_desc->queue_index, ring->idx, idx, skb->len);
1280 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1281 return skb->len;
1282 }
ecdfa446 1283
067ba6cf
MM		 1284 /* fill tx descriptor */
1285 memset(pdesc, 0, 12);
1286
1287 /*DWORD 0*/
1288 pdesc->LINIP = 0;
1289 pdesc->CmdInit = 1;
1290 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; /* We must add 8!! */
1291 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1292
1293 /*DWORD 1*/
1294 pdesc->SecCAMID = 0;
1295 pdesc->RATid = tcb_desc->RATRIndex;
1296
1297 pdesc->NoEnc = 1;
1298 pdesc->SecType = 0x0;
1299 if (tcb_desc->bHwSec) {
1300 switch (priv->ieee80211->pairwise_key_type) {
1301 case KEY_TYPE_WEP40:
1302 case KEY_TYPE_WEP104:
1303 pdesc->SecType = 0x1;
1304 pdesc->NoEnc = 0;
1305 break;
1306 case KEY_TYPE_TKIP:
1307 pdesc->SecType = 0x2;
1308 pdesc->NoEnc = 0;
1309 break;
1310 case KEY_TYPE_CCMP:
1311 pdesc->SecType = 0x3;
1312 pdesc->NoEnc = 0;
1313 break;
1314 case KEY_TYPE_NA:
1315 pdesc->SecType = 0x0;
1316 pdesc->NoEnc = 1;
1317 break;
1318 }
1319 }
ecdfa446 1320
067ba6cf
MM		 1321 /* Set Packet ID */
1322 pdesc->PktId = 0x0;
ecdfa446 1323
067ba6cf
MM		 1324 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1325 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
ecdfa446 1326
067ba6cf
MM		 1327 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1328 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
ecdfa446 1329
067ba6cf
MM		 1330 pdesc->FirstSeg = 1;
1331 pdesc->LastSeg = 1;
1332 pdesc->TxBufferSize = skb->len;
ecdfa446 1333
067ba6cf
MM		 1334 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1335 __skb_queue_tail(&ring->queue, skb);
1336 pdesc->OWN = 1;
1337 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
af59c39d 1338 priv->ieee80211->dev->trans_start = jiffies;
3f9ab1ee 1339 write_nic_word(priv, TPPoll, 0x01<<tcb_desc->queue_index);
067ba6cf 1340 return 0;
ecdfa446
GKH		 1341}
1342
af59c39d 1343static short rtl8192_alloc_rx_desc_ring(struct r8192_priv *priv)
ecdfa446 1344{
ecdfa446
GKH		 1345 rx_desc_819x_pci *entry = NULL;
1346 int i;
1347
1348 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1349 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1350
1351 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1352 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1353 return -ENOMEM;
1354 }
1355
1356 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1357 priv->rx_idx = 0;
1358
1359 for (i = 0; i < priv->rxringcount; i++) {
1360 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1361 dma_addr_t *mapping;
1362 entry = &priv->rx_ring[i];
1363 if (!skb)
1364 return 0;
1365 priv->rx_buf[i] = skb;
1366 mapping = (dma_addr_t *)skb->cb;
1c7ec2e8 1367 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
ecdfa446
GKH		 1368 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1369
1370 entry->BufferAddress = cpu_to_le32(*mapping);
1371
1372 entry->Length = priv->rxbuffersize;
1373 entry->OWN = 1;
1374 }
1375
1376 entry->EOR = 1;
1377 return 0;
1378}
1379
af59c39d 1380static int rtl8192_alloc_tx_desc_ring(struct r8192_priv *priv,
ecdfa446
GKH		 1381 unsigned int prio, unsigned int entries)
1382{
ecdfa446
GKH		 1383 tx_desc_819x_pci *ring;
1384 dma_addr_t dma;
1385 int i;
1386
1387 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1388 if (!ring || (unsigned long)ring & 0xFF) {
1389 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1390 return -ENOMEM;
1391 }
1392
1393 memset(ring, 0, sizeof(*ring)*entries);
1394 priv->tx_ring[prio].desc = ring;
1395 priv->tx_ring[prio].dma = dma;
1396 priv->tx_ring[prio].idx = 0;
1397 priv->tx_ring[prio].entries = entries;
1398 skb_queue_head_init(&priv->tx_ring[prio].queue);
1399
1400 for (i = 0; i < entries; i++)
1401 ring[i].NextDescAddress =
1402 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1403
1404 return 0;
1405}
1406
af59c39d 1407static short rtl8192_pci_initdescring(struct r8192_priv *priv)
ecdfa446 1408{
1f1f19ff
MM		 1409 u32 ret;
1410 int i;
ecdfa446 1411
af59c39d 1412 ret = rtl8192_alloc_rx_desc_ring(priv);
1f1f19ff
MM		 1413 if (ret)
1414 return ret;
ecdfa446 1415
1f1f19ff
MM		 1416 /* general process for other queue */
1417 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
af59c39d 1418 ret = rtl8192_alloc_tx_desc_ring(priv, i, priv->txringcount);
1f1f19ff
MM		 1419 if (ret)
1420 goto err_free_rings;
1421 }
ecdfa446 1422
1f1f19ff 1423 return 0;
ecdfa446
GKH		 1424
1425err_free_rings:
af59c39d 1426 rtl8192_free_rx_ring(priv);
1f1f19ff
MM		 1427 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1428 if (priv->tx_ring[i].desc)
af59c39d 1429 rtl8192_free_tx_ring(priv, i);
1f1f19ff 1430 return 1;
ecdfa446
GKH		 1431}
1432
480ab9dc 1433static void rtl8192_pci_resetdescring(struct r8192_priv *priv)
ecdfa446 1434{
ecdfa446
GKH		 1435 int i;
1436
1437 /* force the rx_idx to the first one */
1438 if(priv->rx_ring) {
1439 rx_desc_819x_pci *entry = NULL;
1440 for (i = 0; i < priv->rxringcount; i++) {
1441 entry = &priv->rx_ring[i];
1442 entry->OWN = 1;
1443 }
1444 priv->rx_idx = 0;
1445 }
1446
1447 /* after reset, release previous pending packet, and force the
1448 * tx idx to the first one */
1449 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1450 if (priv->tx_ring[i].desc) {
1451 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1452
1453 while (skb_queue_len(&ring->queue)) {
1454 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1455 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1456
1457 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1458 skb->len, PCI_DMA_TODEVICE);
1459 kfree_skb(skb);
1460 ring->idx = (ring->idx + 1) % ring->entries;
1461 }
1462 ring->idx = 0;
1463 }
1464 }
1465}
1466
5e1ad18a 1467static void rtl8192_link_change(struct net_device *dev)
ecdfa446 1468{
ecdfa446
GKH		 1469 struct r8192_priv *priv = ieee80211_priv(dev);
1470 struct ieee80211_device* ieee = priv->ieee80211;
11a861d9 1471
ecdfa446
GKH		 1472 if (ieee->state == IEEE80211_LINKED)
1473 {
480ab9dc
MM		 1474 rtl8192_net_update(priv);
1475 rtl8192_update_ratr_table(priv);
11aacc28 1476
ecdfa446
GKH		 1477 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1478 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
282fa9f3 1479 EnableHWSecurityConfig8192(priv);
ecdfa446
GKH		 1480 }
1481 else
1482 {
3f9ab1ee 1483 write_nic_byte(priv, 0x173, 0);
ecdfa446 1484 }
11a861d9 1485
480ab9dc 1486 rtl8192_update_msr(priv);
ecdfa446
GKH		 1487
1488 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1489 // // To set CBSSID bit when link with any AP or STA.
1490 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1491 {
1492 u32 reg = 0;
3f9ab1ee 1493 reg = read_nic_dword(priv, RCR);
ecdfa446
GKH		 1494 if (priv->ieee80211->state == IEEE80211_LINKED)
1495 priv->ReceiveConfig = reg |= RCR_CBSSID;
1496 else
1497 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
3f9ab1ee 1498 write_nic_dword(priv, RCR, reg);
ecdfa446
GKH		 1499 }
1500}
ecdfa446
GKH		 1501
1502
5b3b1a7b 1503static const struct ieee80211_qos_parameters def_qos_parameters = {
ecdfa446
GKH		 1504 {3,3,3,3},/* cw_min */
1505 {7,7,7,7},/* cw_max */
1506 {2,2,2,2},/* aifs */
1507 {0,0,0,0},/* flags */
1508 {0,0,0,0} /* tx_op_limit */
1509};
1510
5e1ad18a 1511static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1512{
1513 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
ecdfa446
GKH		 1514 struct ieee80211_device* ieee = priv->ieee80211;
1515 struct ieee80211_network* net = &ieee->current_network;
1516
1517 if (ieee->pHTInfo->bCurrentHTSupport)
1518 HTUpdateSelfAndPeerSetting(ieee, net);
1519 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
480ab9dc 1520 rtl8192_update_cap(priv, net->capability);
ecdfa446 1521}
214985a6 1522
ecdfa446
GKH		 1523/*
1524* background support to run QoS activate functionality
1525*/
881a975b 1526static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1527static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1528{
1529 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
ecdfa446
GKH		 1530 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1531 u8 mode = priv->ieee80211->current_network.mode;
ecdfa446
GKH		 1532 u8 u1bAIFS;
1533 u32 u4bAcParam;
1534 int i;
ecdfa446 1535
ecdfa446 1536 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1537 if(priv->ieee80211->state != IEEE80211_LINKED)
1538 goto success;
1539 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1540 /* It better set slot time at first */
1541 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1542 /* update the ac parameter to related registers */
1543 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1544 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1545 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1546 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1547 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1548 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1549 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
3f9ab1ee 1550 write_nic_dword(priv, WDCAPARA_ADD[i], u4bAcParam);
ecdfa446
GKH		 1551 }
1552
1553success:
ecdfa446 1554 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 1555}
1556
1557static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1558 int active_network,
1559 struct ieee80211_network *network)
1560{
1561 int ret = 0;
1562 u32 size = sizeof(struct ieee80211_qos_parameters);
1563
1564 if(priv->ieee80211->state !=IEEE80211_LINKED)
1565 return ret;
1566
1567 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1568 return ret;
1569
1570 if (network->flags & NETWORK_HAS_QOS_MASK) {
1571 if (active_network &&
1572 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1573 network->qos_data.active = network->qos_data.supported;
1574
1575 if ((network->qos_data.active == 1) && (active_network == 1) &&
1576 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1577 (network->qos_data.old_param_count !=
1578 network->qos_data.param_count)) {
1579 network->qos_data.old_param_count =
1580 network->qos_data.param_count;
ecdfa446 1581 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1582 RT_TRACE (COMP_QOS, "QoS parameters change call "
1583 "qos_activate\n");
1584 }
1585 } else {
207b58fb 1586 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1587 &def_qos_parameters, size);
1588
1589 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 1590 queue_work(priv->priv_wq, &priv->qos_activate);
703fdcc3 1591 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate\n");
ecdfa446
GKH		 1592 }
1593 network->qos_data.active = 0;
1594 network->qos_data.supported = 0;
1595 }
1596
1597 return 0;
1598}
1599
1600/* handle manage frame frame beacon and probe response */
1601static int rtl8192_handle_beacon(struct net_device * dev,
1602 struct ieee80211_beacon * beacon,
1603 struct ieee80211_network * network)
1604{
1605 struct r8192_priv *priv = ieee80211_priv(dev);
1606
1607 rtl8192_qos_handle_probe_response(priv,1,network);
1608
ecdfa446 1609 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 1610 return 0;
1611
1612}
1613
1614/*
214985a6
MM		 1615 * handling the beaconing responses. if we get different QoS setting
1616 * off the network from the associated setting, adjust the QoS setting
1617 */
ecdfa446
GKH		 1618static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1619 struct ieee80211_network *network)
1620{
b72cb94f
MM		 1621 int ret = 0;
1622 unsigned long flags;
1623 u32 size = sizeof(struct ieee80211_qos_parameters);
1624 int set_qos_param = 0;
ecdfa446 1625
b72cb94f
MM		 1626 if ((priv == NULL) || (network == NULL))
1627 return ret;
ecdfa446 1628
b72cb94f
MM		 1629 if (priv->ieee80211->state != IEEE80211_LINKED)
1630 return ret;
ecdfa446 1631
b72cb94f
MM		 1632 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1633 return ret;
ecdfa446 1634
b72cb94f
MM		 1635 spin_lock_irqsave(&priv->ieee80211->lock, flags);
1636 if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
207b58fb
MM		 1637 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1638 &network->qos_data.parameters,
ecdfa446
GKH		 1639 sizeof(struct ieee80211_qos_parameters));
1640 priv->ieee80211->current_network.qos_data.active = 1;
b72cb94f
MM		 1641 set_qos_param = 1;
1642 /* update qos parameter for current network */
1643 priv->ieee80211->current_network.qos_data.old_param_count =
1644 priv->ieee80211->current_network.qos_data.param_count;
1645 priv->ieee80211->current_network.qos_data.param_count =
1646 network->qos_data.param_count;
1647
1648 } else {
207b58fb 1649 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1650 &def_qos_parameters, size);
1651 priv->ieee80211->current_network.qos_data.active = 0;
1652 priv->ieee80211->current_network.qos_data.supported = 0;
b72cb94f
MM		 1653 set_qos_param = 1;
1654 }
ecdfa446 1655
b72cb94f 1656 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
ecdfa446 1657
b72cb94f
MM		 1658 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
1659 network->flags, priv->ieee80211->current_network.qos_data.active);
ecdfa446 1660 if (set_qos_param == 1)
ecdfa446 1661 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446 1662
b72cb94f 1663 return ret;
ecdfa446
GKH		 1664}
1665
1666
1667static int rtl8192_handle_assoc_response(struct net_device *dev,
1668 struct ieee80211_assoc_response_frame *resp,
1669 struct ieee80211_network *network)
1670{
1671 struct r8192_priv *priv = ieee80211_priv(dev);
1672 rtl8192_qos_association_resp(priv, network);
1673 return 0;
1674}
1675
1676
214985a6 1677/* updateRATRTabel for MCS only. Basic rate is not implemented. */
480ab9dc 1678static void rtl8192_update_ratr_table(struct r8192_priv* priv)
ecdfa446 1679{
ecdfa446
GKH		 1680 struct ieee80211_device* ieee = priv->ieee80211;
1681 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
ecdfa446
GKH		 1682 u32 ratr_value = 0;
1683 u8 rate_index = 0;
1684
480ab9dc 1685 rtl8192_config_rate(priv, (u16*)(&ratr_value));
ecdfa446 1686 ratr_value |= (*(u16*)(pMcsRate)) << 12;
16d74da0 1687
ecdfa446
GKH		 1688 switch (ieee->mode)
1689 {
1690 case IEEE_A:
1691 ratr_value &= 0x00000FF0;
1692 break;
1693 case IEEE_B:
1694 ratr_value &= 0x0000000F;
1695 break;
1696 case IEEE_G:
1697 ratr_value &= 0x00000FF7;
1698 break;
1699 case IEEE_N_24G:
1700 case IEEE_N_5G:
1701 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1702 ratr_value &= 0x0007F007;
1703 else{
1704 if (priv->rf_type == RF_1T2R)
1705 ratr_value &= 0x000FF007;
1706 else
1707 ratr_value &= 0x0F81F007;
1708 }
1709 break;
1710 default:
1711 break;
1712 }
1713 ratr_value &= 0x0FFFFFFF;
1714 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1715 ratr_value |= 0x80000000;
1716 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1717 ratr_value |= 0x80000000;
1718 }
3f9ab1ee
MM		 1719 write_nic_dword(priv, RATR0+rate_index*4, ratr_value);
1720 write_nic_byte(priv, UFWP, 1);
ecdfa446
GKH		 1721}
1722
5e1ad18a 1723static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446 1724{
65a43784 1725 struct r8192_priv *priv = ieee80211_priv(dev);
1726 struct ieee80211_device *ieee = priv->ieee80211;
ecdfa446 1727
f8acdc3d
MM		 1728 return !(ieee->rtllib_ap_sec_type &&
1729 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
ecdfa446
GKH		 1730}
1731
5e1ad18a 1732static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 1733{
1734 struct ieee80211_device* ieee = priv->ieee80211;
1735 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
1736 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
1737 {
1738 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
ecdfa446
GKH		 1739 }
1740 else
1741 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
ecdfa446
GKH		 1742}
1743
af59c39d 1744static u8 rtl8192_getSupportedWireleeMode(void)
ecdfa446 1745{
6f304eb2 1746 return (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
ecdfa446 1747}
5e1ad18a
GKH		 1748
1749static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 1750{
1751 struct r8192_priv *priv = ieee80211_priv(dev);
af59c39d 1752 u8 bSupportMode = rtl8192_getSupportedWireleeMode();
ecdfa446 1753
ecdfa446
GKH		 1754 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
1755 {
1756 if(bSupportMode & WIRELESS_MODE_N_24G)
1757 {
1758 wireless_mode = WIRELESS_MODE_N_24G;
1759 }
1760 else if(bSupportMode & WIRELESS_MODE_N_5G)
1761 {
1762 wireless_mode = WIRELESS_MODE_N_5G;
1763 }
1764 else if((bSupportMode & WIRELESS_MODE_A))
1765 {
1766 wireless_mode = WIRELESS_MODE_A;
1767 }
1768 else if((bSupportMode & WIRELESS_MODE_G))
1769 {
1770 wireless_mode = WIRELESS_MODE_G;
1771 }
1772 else if((bSupportMode & WIRELESS_MODE_B))
1773 {
1774 wireless_mode = WIRELESS_MODE_B;
1775 }
1776 else{
1777 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
1778 wireless_mode = WIRELESS_MODE_B;
1779 }
1780 }
ecdfa446
GKH		 1781 priv->ieee80211->mode = wireless_mode;
1782
1783 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
1784 priv->ieee80211->pHTInfo->bEnableHT = 1;
1785 else
1786 priv->ieee80211->pHTInfo->bEnableHT = 0;
1787 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
1788 rtl8192_refresh_supportrate(priv);
ecdfa446 1789}
ecdfa446 1790
5e1ad18a 1791static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446 1792{
ecdfa446
GKH		 1793 struct r8192_priv* priv = ieee80211_priv(dev);
1794 struct ieee80211_device* ieee = priv->ieee80211;
1795
285f660c 1796 return ieee->bHalfWirelessN24GMode;
ecdfa446
GKH		 1797}
1798
9f17b076 1799static short rtl8192_is_tx_queue_empty(struct net_device *dev)
ecdfa446
GKH		 1800{
1801 int i=0;
1802 struct r8192_priv *priv = ieee80211_priv(dev);
1803 for (i=0; i<=MGNT_QUEUE; i++)
1804 {
1805 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
1806 continue;
1807 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
1808 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
1809 return 0;
1810 }
1811 }
1812 return 1;
1813}
16d74da0 1814
176e8dc1 1815static void rtl8192_hw_sleep_down(struct r8192_priv *priv)
ecdfa446 1816{
262cd816 1817 MgntActSet_RF_State(priv, eRfSleep, RF_CHANGE_BY_PS);
ecdfa446 1818}
16d74da0 1819
5e1ad18a 1820static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446 1821{
262cd816
MM		 1822 struct r8192_priv *priv = ieee80211_priv(dev);
1823 MgntActSet_RF_State(priv, eRfOn, RF_CHANGE_BY_PS);
ecdfa446 1824}
65a43784 1825
9f17b076 1826static void rtl8192_hw_wakeup_wq (struct work_struct *work)
ecdfa446 1827{
ecdfa446
GKH		 1828 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1829 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
1830 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 1831 rtl8192_hw_wakeup(dev);
1832
1833}
1834
1835#define MIN_SLEEP_TIME 50
1836#define MAX_SLEEP_TIME 10000
5e1ad18a 1837static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446 1838{
ecdfa446 1839 struct r8192_priv *priv = ieee80211_priv(dev);
9236928f 1840 u32 tmp;
ecdfa446 1841 u32 rb = jiffies;
ecdfa446 1842
65a43784 1843 // Writing HW register with 0 equals to disable
1844 // the timer, that is not really what we want
1845 //
1846 tl -= MSECS(8+16+7);
ecdfa446 1847
65a43784 1848 // If the interval in witch we are requested to sleep is too
1849 // short then give up and remain awake
1850 // when we sleep after send null frame, the timer will be too short to sleep.
1851 //
ecdfa446 1852 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
65a43784 1853 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
65a43784 1854 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
0d65112a 1855 return;
ecdfa446
GKH		 1856 }
1857
ecdfa446 1858 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
65a43784 1859 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
1860 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
ecdfa446 1861 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
0d65112a 1862 return;
65a43784 1863 }
9236928f
MM		 1864
1865 tmp = (tl>rb)?(tl-rb):(rb-tl);
65a43784 1866 queue_delayed_work(priv->ieee80211->wq,
9236928f 1867 &priv->ieee80211->hw_wakeup_wq,tmp);
65a43784 1868
176e8dc1 1869 rtl8192_hw_sleep_down(priv);
ecdfa446 1870}
214985a6 1871
af59c39d 1872static void rtl8192_init_priv_variable(struct r8192_priv *priv)
ecdfa446 1873{
ecdfa446 1874 u8 i;
31d664e5 1875 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
65a43784 1876
1877 // Default Halt the NIC if RF is OFF.
1878 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
1879 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
1880 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
1881 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
1882 pPSC->bLeisurePs = true;
774dee1c 1883 priv->ieee80211->RegMaxLPSAwakeIntvl = 5;
65a43784 1884 priv->bHwRadioOff = false;
1885
ecdfa446 1886 priv->being_init_adapter = false;
ecdfa446 1887 priv->txringcount = 64;//32;
ecdfa446
GKH		 1888 priv->rxbuffersize = 9100;//2048;//1024;
1889 priv->rxringcount = MAX_RX_COUNT;//64;
ecdfa446
GKH		 1890 priv->chan = 1; //set to channel 1
1891 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
1892 priv->RegChannelPlan = 0xf;
ecdfa446
GKH		 1893 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
1894 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1895 priv->ieee80211->ieee_up=0;
1896 priv->retry_rts = DEFAULT_RETRY_RTS;
1897 priv->retry_data = DEFAULT_RETRY_DATA;
1898 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
1899 priv->ieee80211->rate = 110; //11 mbps
1900 priv->ieee80211->short_slot = 1;
af59c39d 1901 priv->promisc = (priv->ieee80211->dev->flags & IFF_PROMISC) ? 1:0;
ecdfa446 1902 priv->bcck_in_ch14 = false;
ecdfa446
GKH		 1903 priv->CCKPresentAttentuation = 0;
1904 priv->rfa_txpowertrackingindex = 0;
1905 priv->rfc_txpowertrackingindex = 0;
1906 priv->CckPwEnl = 6;
ecdfa446
GKH		 1907 //added by amy for silent reset
1908 priv->ResetProgress = RESET_TYPE_NORESET;
1909 priv->bForcedSilentReset = 0;
1910 priv->bDisableNormalResetCheck = false;
1911 priv->force_reset = false;
1912 //added by amy for power save
181d1dff 1913 priv->RfOffReason = 0;
ecdfa446 1914 priv->bHwRfOffAction = 0;
31d664e5
MM		 1915 priv->PowerSaveControl.bInactivePs = true;
1916 priv->PowerSaveControl.bIPSModeBackup = false;
ecdfa446
GKH		 1917
1918 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
1919 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1920 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
1921 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
1922 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
1923 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
1924
1925 priv->ieee80211->active_scan = 1;
1926 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
1927 priv->ieee80211->host_encrypt = 1;
1928 priv->ieee80211->host_decrypt = 1;
09145962
MM		 1929 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;
1930 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;
ecdfa446
GKH		 1931 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
1932 priv->ieee80211->set_chan = rtl8192_set_chan;
1933 priv->ieee80211->link_change = rtl8192_link_change;
1934 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
1935 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
1936 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
1937 priv->ieee80211->init_wmmparam_flag = 0;
1938 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
1939 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
1940 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
1941 priv->ieee80211->qos_support = 1;
ecdfa446
GKH		 1942 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
1943 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
1944 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
1945
1946 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
ecdfa446
GKH		 1947 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
1948 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
ecdfa446
GKH		 1949 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
1950 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
1951 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
1952
ecdfa446
GKH		 1953 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
1954
65a43784 1955#ifdef ENABLE_IPS
1956 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
1957 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
1958#endif
1959#ifdef ENABLE_LPS
1960 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
16d74da0 1961#endif
65a43784 1962
1963 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
1964 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
1965
395aa640
MM		 1966 priv->ShortRetryLimit = 0x30;
1967 priv->LongRetryLimit = 0x30;
ecdfa446
GKH		 1968
1969 priv->ReceiveConfig = RCR_ADD3 |
1970 RCR_AMF | RCR_ADF | //accept management/data
1971 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
1972 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
1973 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
1974 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
1975
5b84cc78 1976 priv->pFirmware = vzalloc(sizeof(rt_firmware));
ecdfa446
GKH		 1977
1978 /* rx related queue */
ecdfa446
GKH		 1979 skb_queue_head_init(&priv->skb_queue);
1980
1981 /* Tx related queue */
1982 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1983 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
1984 }
1985 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1986 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
1987 }
1988 priv->rf_set_chan = rtl8192_phy_SwChnl;
1989}
1990
ecdfa446
GKH		 1991static void rtl8192_init_priv_lock(struct r8192_priv* priv)
1992{
ecdfa446
GKH		 1993 spin_lock_init(&priv->irq_th_lock);
1994 spin_lock_init(&priv->rf_ps_lock);
ecdfa446
GKH		 1995 sema_init(&priv->wx_sem,1);
1996 sema_init(&priv->rf_sem,1);
ecdfa446 1997 mutex_init(&priv->mutex);
ecdfa446
GKH		 1998}
1999
214985a6 2000/* init tasklet and wait_queue here */
ecdfa446 2001#define DRV_NAME "wlan0"
af59c39d 2002static void rtl8192_init_priv_task(struct r8192_priv *priv)
ecdfa446 2003{
ecdfa446 2004 priv->priv_wq = create_workqueue(DRV_NAME);
ecdfa446 2005
65a43784 2006#ifdef ENABLE_IPS
80a4dead 2007 INIT_WORK(&priv->ieee80211->ips_leave_wq, IPSLeave_wq);
65a43784 2008#endif
2009
ecdfa446 2010 INIT_WORK(&priv->reset_wq, rtl8192_restart);
ecdfa446
GKH		 2011 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2012 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2013 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2014 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
ecdfa446 2015 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
80a4dead 2016 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, rtl8192_hw_wakeup_wq);
ecdfa446 2017
80a4dead
MM		 2018 tasklet_init(&priv->irq_rx_tasklet, rtl8192_irq_rx_tasklet,
2019 (unsigned long) priv);
2020 tasklet_init(&priv->irq_tx_tasklet, rtl8192_irq_tx_tasklet,
2021 (unsigned long) priv);
2022 tasklet_init(&priv->irq_prepare_beacon_tasklet, rtl8192_prepare_beacon,
2023 (unsigned long) priv);
ecdfa446
GKH		 2024}
2025
af59c39d 2026static void rtl8192_get_eeprom_size(struct r8192_priv *priv)
ecdfa446
GKH		 2027{
2028 u16 curCR = 0;
ecdfa446 2029 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
3f9ab1ee 2030 curCR = read_nic_dword(priv, EPROM_CMD);
ecdfa446
GKH		 2031 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2032 //whether need I consider BIT5?
2033 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2034 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2035}
2036
ecdfa446 2037/*
214985a6
MM		 2038 * Adapter->EEPROMAddressSize should be set before this function call.
2039 * EEPROM address size can be got through GetEEPROMSize8185()
2040 */
3f9ab1ee 2041static void rtl8192_read_eeprom_info(struct r8192_priv *priv)
ecdfa446 2042{
3f9ab1ee 2043 struct net_device *dev = priv->ieee80211->dev;
ecdfa446 2044 u8 tempval;
ecdfa446 2045 u8 ICVer8192, ICVer8256;
ecdfa446
GKH		 2046 u16 i,usValue, IC_Version;
2047 u16 EEPROMId;
ecdfa446
GKH		 2048 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2049 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2050
2051
2052 // TODO: I don't know if we need to apply EF function to EEPROM read function
2053
2054 //2 Read EEPROM ID to make sure autoload is success
5aa68752 2055 EEPROMId = eprom_read(priv, 0);
ecdfa446
GKH		 2056 if( EEPROMId != RTL8190_EEPROM_ID )
2057 {
2058 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2059 priv->AutoloadFailFlag=true;
2060 }
2061 else
2062 {
2063 priv->AutoloadFailFlag=false;
2064 }
2065
2066 //
2067 // Assign Chip Version ID
2068 //
2069 // Read IC Version && Channel Plan
2070 if(!priv->AutoloadFailFlag)
2071 {
2072 // VID, PID
5aa68752
MM		 2073 priv->eeprom_vid = eprom_read(priv, (EEPROM_VID >> 1));
2074 priv->eeprom_did = eprom_read(priv, (EEPROM_DID >> 1));
ecdfa446 2075
5aa68752 2076 usValue = eprom_read(priv, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
ecdfa446 2077 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
5aa68752 2078 usValue = eprom_read(priv, (EEPROM_ICVersion_ChannelPlan>>1));
ecdfa446
GKH		 2079 priv->eeprom_ChannelPlan = usValue&0xff;
2080 IC_Version = ((usValue&0xff00)>>8);
2081
ecdfa446
GKH		 2082 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2083 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
703fdcc3
MM		 2084 RT_TRACE(COMP_INIT, "ICVer8192 = 0x%x\n", ICVer8192);
2085 RT_TRACE(COMP_INIT, "ICVer8256 = 0x%x\n", ICVer8256);
ecdfa446
GKH		 2086 if(ICVer8192 == 0x2) //B-cut
2087 {
2088 if(ICVer8256 == 0x5) //E-cut
2089 priv->card_8192_version= VERSION_8190_BE;
2090 }
4803ef77 2091
ecdfa446
GKH		 2092 switch(priv->card_8192_version)
2093 {
2094 case VERSION_8190_BD:
2095 case VERSION_8190_BE:
2096 break;
2097 default:
2098 priv->card_8192_version = VERSION_8190_BD;
2099 break;
2100 }
2101 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2102 }
2103 else
2104 {
2105 priv->card_8192_version = VERSION_8190_BD;
2106 priv->eeprom_vid = 0;
2107 priv->eeprom_did = 0;
2108 priv->eeprom_CustomerID = 0;
2109 priv->eeprom_ChannelPlan = 0;
703fdcc3 2110 RT_TRACE(COMP_INIT, "IC Version = 0x%x\n", 0xff);
ecdfa446
GKH		 2111 }
2112
2113 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2114 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2115 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2116
2117 //2 Read Permanent MAC address
2118 if(!priv->AutoloadFailFlag)
2119 {
2120 for(i = 0; i < 6; i += 2)
2121 {
5aa68752 2122 usValue = eprom_read(priv, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
ecdfa446
GKH		 2123 *(u16*)(&dev->dev_addr[i]) = usValue;
2124 }
2125 } else {
2126 // when auto load failed, the last address byte set to be a random one.
2127 // added by david woo.2007/11/7
2128 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2129 }
2130
820793c3 2131 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
ecdfa446
GKH		 2132
2133 //2 TX Power Check EEPROM Fail or not
2134 if(priv->card_8192_version > VERSION_8190_BD) {
2135 priv->bTXPowerDataReadFromEEPORM = true;
2136 } else {
2137 priv->bTXPowerDataReadFromEEPORM = false;
2138 }
2139
bbc9a991 2140 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
ecdfa446
GKH		 2141 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2142
2143 if(priv->card_8192_version > VERSION_8190_BD)
2144 {
2145 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2146 if(!priv->AutoloadFailFlag)
2147 {
5aa68752 2148 tempval = (eprom_read(priv, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
ecdfa446
GKH		 2149 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2150
2151 if (tempval&0x80) //RF-indication, bit[7]
2152 priv->rf_type = RF_1T2R;
2153 else
2154 priv->rf_type = RF_2T4R;
2155 }
2156 else
2157 {
2158 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2159 }
2160 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2161 priv->EEPROMLegacyHTTxPowerDiff);
2162
2163 // Read ThermalMeter from EEPROM
2164 if(!priv->AutoloadFailFlag)
2165 {
5aa68752 2166 priv->EEPROMThermalMeter = (u8)(((eprom_read(priv, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
ecdfa446
GKH		 2167 }
2168 else
2169 {
2170 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2171 }
2172 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2173 //vivi, for tx power track
2174 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2175
2176 if(priv->epromtype == EPROM_93c46)
2177 {
2178 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2179 if(!priv->AutoloadFailFlag)
2180 {
5aa68752 2181 usValue = eprom_read(priv, (EEPROM_TxPwDiff_CrystalCap>>1));
ecdfa446
GKH		 2182 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2183 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2184 }
2185 else
2186 {
2187 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2188 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2189 }
2190 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2191 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2192
2193 //
2194 // Get per-channel Tx Power Level
2195 //
2196 for(i=0; i<14; i+=2)
2197 {
2198 if(!priv->AutoloadFailFlag)
2199 {
5aa68752 2200 usValue = eprom_read(priv, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
ecdfa446
GKH		 2201 }
2202 else
2203 {
2204 usValue = EEPROM_Default_TxPower;
2205 }
2206 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2207 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2208 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2209 }
2210 for(i=0; i<14; i+=2)
2211 {
2212 if(!priv->AutoloadFailFlag)
2213 {
5aa68752 2214 usValue = eprom_read(priv, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
ecdfa446
GKH		 2215 }
2216 else
2217 {
2218 usValue = EEPROM_Default_TxPower;
2219 }
2220 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2221 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2222 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2223 }
2224 }
ecdfa446 2225
ecdfa446
GKH		 2226 //
2227 // Update HAL variables.
2228 //
2229 if(priv->epromtype == EPROM_93c46)
2230 {
2231 for(i=0; i<14; i++)
2232 {
2233 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2234 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2235 }
2236 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2237 // Antenna B gain offset to antenna A, bit0~3
2238 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2239 // Antenna C gain offset to antenna A, bit4~7
2240 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2241 // Antenna D gain offset to antenna A, bit8~11
2242 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2243 // CrystalCap, bit12~15
2244 priv->CrystalCap = priv->EEPROMCrystalCap;
2245 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2246 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2247 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2248 }
2249 else if(priv->epromtype == EPROM_93c56)
2250 {
ecdfa446
GKH		 2251 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2252 {
2253 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2254 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2255 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2256 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2257 }
2258 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2259 {
2260 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2261 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2262 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2263 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2264 }
2265 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2266 {
2267 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2268 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2269 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2270 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2271 }
2272 for(i=0; i<14; i++)
2273 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2274 for(i=0; i<14; i++)
2275 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2276 for(i=0; i<14; i++)
2277 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2278 for(i=0; i<14; i++)
2279 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2280 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2281 priv->AntennaTxPwDiff[0] = 0;
2282 priv->AntennaTxPwDiff[1] = 0;
2283 priv->AntennaTxPwDiff[2] = 0;
2284 priv->CrystalCap = priv->EEPROMCrystalCap;
2285 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2286 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2287 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2288 }
2289 }
2290
2291 if(priv->rf_type == RF_1T2R)
2292 {
703fdcc3 2293 RT_TRACE(COMP_INIT, "1T2R config\n");
ecdfa446
GKH		 2294 }
2295 else if (priv->rf_type == RF_2T4R)
2296 {
703fdcc3 2297 RT_TRACE(COMP_INIT, "2T4R config\n");
ecdfa446
GKH		 2298 }
2299
2300 // 2008/01/16 MH We can only know RF type in the function. So we have to init
2301 // DIG RATR table again.
2302 init_rate_adaptive(dev);
2303
2304 //1 Make a copy for following variables and we can change them if we want
2305
ecdfa446
GKH		 2306 if(priv->RegChannelPlan == 0xf)
2307 {
2308 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2309 }
2310 else
2311 {
2312 priv->ChannelPlan = priv->RegChannelPlan;
2313 }
2314
2315 //
2316 // Used PID and DID to Set CustomerID
2317 //
2318 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2319 {
2320 priv->CustomerID = RT_CID_DLINK;
2321 }
2322
2323 switch(priv->eeprom_CustomerID)
2324 {
2325 case EEPROM_CID_DEFAULT:
2326 priv->CustomerID = RT_CID_DEFAULT;
2327 break;
2328 case EEPROM_CID_CAMEO:
2329 priv->CustomerID = RT_CID_819x_CAMEO;
2330 break;
2331 case EEPROM_CID_RUNTOP:
2332 priv->CustomerID = RT_CID_819x_RUNTOP;
2333 break;
2334 case EEPROM_CID_NetCore:
2335 priv->CustomerID = RT_CID_819x_Netcore;
2336 break;
2337 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2338 priv->CustomerID = RT_CID_TOSHIBA;
2339 if(priv->eeprom_ChannelPlan&0x80)
2340 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2341 else
2342 priv->ChannelPlan = 0x0;
2343 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2344 priv->ChannelPlan);
2345 break;
2346 case EEPROM_CID_Nettronix:
ecdfa446
GKH		 2347 priv->CustomerID = RT_CID_Nettronix;
2348 break;
2349 case EEPROM_CID_Pronet:
2350 priv->CustomerID = RT_CID_PRONET;
2351 break;
2352 case EEPROM_CID_DLINK:
2353 priv->CustomerID = RT_CID_DLINK;
2354 break;
2355
2356 case EEPROM_CID_WHQL:
ecdfa446
GKH		 2357 break;
2358 default:
2359 // value from RegCustomerID
2360 break;
2361 }
2362
2363 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2364 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2365 priv->ChannelPlan = 0; //FCC
2366
ecdfa446 2367 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
65a43784 2368 priv->ieee80211->bSupportRemoteWakeUp = true;
ecdfa446 2369 else
65a43784 2370 priv->ieee80211->bSupportRemoteWakeUp = false;
2371
2372
ecdfa446 2373 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
703fdcc3 2374 RT_TRACE(COMP_INIT, "ChannelPlan = %d\n", priv->ChannelPlan);
ecdfa446 2375 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
ecdfa446
GKH		 2376}
2377
2378
af59c39d 2379static short rtl8192_get_channel_map(struct r8192_priv *priv)
ecdfa446 2380{
ecdfa446
GKH		 2381#ifdef ENABLE_DOT11D
2382 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2383 printk("rtl8180_init:Error channel plan! Set to default.\n");
2384 priv->ChannelPlan= 0;
2385 }
2386 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2387
2388 rtl819x_set_channel_map(priv->ChannelPlan, priv);
2389#else
2390 int ch,i;
2391 //Set Default Channel Plan
2392 if(!channels){
2393 DMESG("No channels, aborting");
2394 return -1;
2395 }
2396 ch=channels;
2397 priv->ChannelPlan= 0;//hikaru
2398 // set channels 1..14 allowed in given locale
2399 for (i=1; i<=14; i++) {
2400 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2401 ch >>= 1;
2402 }
2403#endif
2404 return 0;
2405}
5e1ad18a 2406
c62fdce2 2407static short rtl8192_init(struct r8192_priv *priv)
ecdfa446 2408{
c62fdce2
MM		 2409 struct net_device *dev = priv->ieee80211->dev;
2410
ecdfa446 2411 memset(&(priv->stats),0,sizeof(struct Stats));
af59c39d 2412 rtl8192_init_priv_variable(priv);
ecdfa446 2413 rtl8192_init_priv_lock(priv);
af59c39d
MM		 2414 rtl8192_init_priv_task(priv);
2415 rtl8192_get_eeprom_size(priv);
3f9ab1ee 2416 rtl8192_read_eeprom_info(priv);
af59c39d 2417 rtl8192_get_channel_map(priv);
ecdfa446
GKH		 2418 init_hal_dm(dev);
2419 init_timer(&priv->watch_dog_timer);
1f0e4270 2420 priv->watch_dog_timer.data = (unsigned long)priv;
ecdfa446 2421 priv->watch_dog_timer.function = watch_dog_timer_callback;
7bb5e823 2422 if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED, dev->name, dev)) {
ecdfa446
GKH		 2423 printk("Error allocating IRQ %d",dev->irq);
2424 return -1;
2425 }else{
2426 priv->irq=dev->irq;
2427 printk("IRQ %d",dev->irq);
2428 }
af59c39d 2429 if (rtl8192_pci_initdescring(priv) != 0){
ecdfa446
GKH		 2430 printk("Endopoints initialization failed");
2431 return -1;
2432 }
2433
ecdfa446
GKH		 2434 return 0;
2435}
2436
214985a6
MM		 2437/*
2438 * Actually only set RRSR, RATR and BW_OPMODE registers
2439 * not to do all the hw config as its name says
2440 * This part need to modified according to the rate set we filtered
2441 */
480ab9dc 2442static void rtl8192_hwconfig(struct r8192_priv *priv)
ecdfa446
GKH		 2443{
2444 u32 regRATR = 0, regRRSR = 0;
2445 u8 regBwOpMode = 0, regTmp = 0;
ecdfa446
GKH		 2446
2447// Set RRSR, RATR, and BW_OPMODE registers
2448 //
480ab9dc 2449 switch (priv->ieee80211->mode)
ecdfa446
GKH		 2450 {
2451 case WIRELESS_MODE_B:
2452 regBwOpMode = BW_OPMODE_20MHZ;
2453 regRATR = RATE_ALL_CCK;
2454 regRRSR = RATE_ALL_CCK;
2455 break;
2456 case WIRELESS_MODE_A:
2457 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
2458 regRATR = RATE_ALL_OFDM_AG;
2459 regRRSR = RATE_ALL_OFDM_AG;
2460 break;
2461 case WIRELESS_MODE_G:
2462 regBwOpMode = BW_OPMODE_20MHZ;
2463 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2464 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2465 break;
2466 case WIRELESS_MODE_AUTO:
2467 case WIRELESS_MODE_N_24G:
2468 // It support CCK rate by default.
2469 // CCK rate will be filtered out only when associated AP does not support it.
2470 regBwOpMode = BW_OPMODE_20MHZ;
2471 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2472 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2473 break;
2474 case WIRELESS_MODE_N_5G:
2475 regBwOpMode = BW_OPMODE_5G;
2476 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2477 regRRSR = RATE_ALL_OFDM_AG;
2478 break;
2479 }
2480
3f9ab1ee 2481 write_nic_byte(priv, BW_OPMODE, regBwOpMode);
ecdfa446
GKH		 2482 {
2483 u32 ratr_value = 0;
2484 ratr_value = regRATR;
2485 if (priv->rf_type == RF_1T2R)
2486 {
2487 ratr_value &= ~(RATE_ALL_OFDM_2SS);
2488 }
3f9ab1ee
MM		 2489 write_nic_dword(priv, RATR0, ratr_value);
2490 write_nic_byte(priv, UFWP, 1);
ecdfa446 2491 }
3f9ab1ee 2492 regTmp = read_nic_byte(priv, 0x313);
ecdfa446 2493 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3f9ab1ee 2494 write_nic_dword(priv, RRSR, regRRSR);
ecdfa446
GKH		 2495
2496 //
2497 // Set Retry Limit here
2498 //
3f9ab1ee 2499 write_nic_word(priv, RETRY_LIMIT,
207b58fb 2500 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
ecdfa446
GKH		 2501 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
2502 // Set Contention Window here
2503
2504 // Set Tx AGC
2505
2506 // Set Tx Antenna including Feedback control
2507
2508 // Set Auto Rate fallback control
2509
2510
2511}
2512
2513
af59c39d 2514static RT_STATUS rtl8192_adapter_start(struct r8192_priv *priv)
ecdfa446 2515{
af59c39d 2516 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 2517 u32 ulRegRead;
2518 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
ecdfa446 2519 u8 tmpvalue;
ecdfa446 2520 u8 ICVersion,SwitchingRegulatorOutput;
ecdfa446 2521 bool bfirmwareok = true;
ecdfa446
GKH		 2522 u32 tmpRegA, tmpRegC, TempCCk;
2523 int i =0;
ecdfa446
GKH		 2524
2525 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
2526 priv->being_init_adapter = true;
480ab9dc 2527 rtl8192_pci_resetdescring(priv);
ecdfa446
GKH		 2528 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
2529 priv->Rf_Mode = RF_OP_By_SW_3wire;
4803ef77 2530
ecdfa446
GKH		 2531 //dPLL on
2532 if(priv->ResetProgress == RESET_TYPE_NORESET)
2533 {
3f9ab1ee 2534 write_nic_byte(priv, ANAPAR, 0x37);
ecdfa446
GKH		 2535 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
2536 // Joseph increae the time to prevent firmware download fail
2537 mdelay(500);
2538 }
4803ef77 2539
ecdfa446
GKH		 2540 //PlatformSleepUs(10000);
2541 // For any kind of InitializeAdapter process, we shall use system now!!
2542 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
2543
ecdfa446
GKH		 2544 //
2545 //3 //Config CPUReset Register
2546 //3//
2547 //3 Firmware Reset Or Not
3f9ab1ee 2548 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2549 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
2550 { //called from MPInitialized. do nothing
2551 ulRegRead |= CPU_GEN_SYSTEM_RESET;
2552 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
2553 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
2554 else
2555 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
2556
3f9ab1ee 2557 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446 2558
ecdfa446
GKH		 2559 //3//
2560 //3 //Fix the issue of E-cut high temperature issue
2561 //3//
2562 // TODO: E cut only
3f9ab1ee 2563 ICVersion = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2564 if(ICVersion >= 0x4) //E-cut only
2565 {
2566 // HW SD suggest that we should not wirte this register too often, so driver
2567 // should readback this register. This register will be modified only when
2568 // power on reset
3f9ab1ee 2569 SwitchingRegulatorOutput = read_nic_byte(priv, SWREGULATOR);
ecdfa446
GKH		 2570 if(SwitchingRegulatorOutput != 0xb8)
2571 {
3f9ab1ee 2572 write_nic_byte(priv, SWREGULATOR, 0xa8);
ecdfa446 2573 mdelay(1);
3f9ab1ee 2574 write_nic_byte(priv, SWREGULATOR, 0xb8);
ecdfa446
GKH		 2575 }
2576 }
ecdfa446
GKH		 2577
2578 //3//
2579 //3// Initialize BB before MAC
2580 //3//
ecdfa446 2581 RT_TRACE(COMP_INIT, "BB Config Start!\n");
d9ffa6c2 2582 rtStatus = rtl8192_BBConfig(priv);
ecdfa446
GKH		 2583 if(rtStatus != RT_STATUS_SUCCESS)
2584 {
2585 RT_TRACE(COMP_ERR, "BB Config failed\n");
2586 return rtStatus;
2587 }
2588 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
2589
ecdfa446
GKH		 2590 //3//Set Loopback mode or Normal mode
2591 //3//
2592 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
2593 // because setting of System_Reset bit reset MAC to default transmission mode.
2594 //Loopback mode or not
2595 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
ecdfa446
GKH		 2596 if(priv->ResetProgress == RESET_TYPE_NORESET)
2597 {
3f9ab1ee 2598 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2599 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
2600 {
2601 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
2602 }
2603 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
2604 {
2605 ulRegRead |= CPU_CCK_LOOPBACK;
2606 }
2607 else
2608 {
2609 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
2610 }
2611
2612 //2008.06.03, for WOL
2613 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3f9ab1ee 2614 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446
GKH		 2615
2616 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
2617 udelay(500);
2618 }
2619 //3Set Hardware(Do nothing now)
480ab9dc 2620 rtl8192_hwconfig(priv);
ecdfa446
GKH		 2621 //2=======================================================
2622 // Common Setting for all of the FPGA platform. (part 1)
2623 //2=======================================================
2624 // If there is changes, please make sure it applies to all of the FPGA version
2625 //3 Turn on Tx/Rx
3f9ab1ee 2626 write_nic_byte(priv, CMDR, CR_RE|CR_TE);
ecdfa446
GKH		 2627
2628 //2Set Tx dma burst
3f9ab1ee 2629 write_nic_byte(priv, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
ecdfa446 2630 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
4803ef77 2631
ecdfa446 2632 //set IDR0 here
3f9ab1ee
MM		 2633 write_nic_dword(priv, MAC0, ((u32*)dev->dev_addr)[0]);
2634 write_nic_word(priv, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
ecdfa446 2635 //set RCR
3f9ab1ee 2636 write_nic_dword(priv, RCR, priv->ReceiveConfig);
ecdfa446
GKH		 2637
2638 //3 Initialize Number of Reserved Pages in Firmware Queue
3f9ab1ee 2639 write_nic_dword(priv, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
207b58fb
MM		 2640 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
2641 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446 2642 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3f9ab1ee
MM		 2643 write_nic_dword(priv, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
2644 write_nic_dword(priv, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
207b58fb 2645 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446 2646 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
ecdfa446 2647
480ab9dc
MM		 2648 rtl8192_tx_enable(priv);
2649 rtl8192_rx_enable(priv);
ecdfa446
GKH		 2650 //3Set Response Rate Setting Register
2651 // CCK rate is supported by default.
2652 // CCK rate will be filtered out only when associated AP does not support it.
3f9ab1ee
MM		 2653 ulRegRead = (0xFFF00000 & read_nic_dword(priv, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
2654 write_nic_dword(priv, RRSR, ulRegRead);
2655 write_nic_dword(priv, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
ecdfa446
GKH		 2656
2657 //2Set AckTimeout
2658 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3f9ab1ee 2659 write_nic_byte(priv, ACK_TIMEOUT, 0x30);
ecdfa446 2660
ecdfa446
GKH		 2661 if(priv->ResetProgress == RESET_TYPE_NORESET)
2662 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
2663 //-----------------------------------------------------------------------------
2664 // Set up security related. 070106, by rcnjko:
2665 // 1. Clear all H/W keys.
2666 // 2. Enable H/W encryption/decryption.
2667 //-----------------------------------------------------------------------------
480ab9dc 2668 CamResetAllEntry(priv);
ecdfa446
GKH		 2669 {
2670 u8 SECR_value = 0x0;
2671 SECR_value |= SCR_TxEncEnable;
2672 SECR_value |= SCR_RxDecEnable;
2673 SECR_value |= SCR_NoSKMC;
3f9ab1ee 2674 write_nic_byte(priv, SECR, SECR_value);
ecdfa446
GKH		 2675 }
2676 //3Beacon related
3f9ab1ee
MM		 2677 write_nic_word(priv, ATIMWND, 2);
2678 write_nic_word(priv, BCN_INTERVAL, 100);
5e1ad18a 2679 for (i=0; i<QOS_QUEUE_NUM; i++)
3f9ab1ee 2680 write_nic_dword(priv, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 2681 //
2682 // Switching regulator controller: This is set temporarily.
2683 // It's not sure if this can be removed in the future.
2684 // PJ advised to leave it by default.
2685 //
3f9ab1ee 2686 write_nic_byte(priv, 0xbe, 0xc0);
ecdfa446
GKH		 2687
2688 //2=======================================================
2689 // Set PHY related configuration defined in MAC register bank
2690 //2=======================================================
d9ffa6c2 2691 rtl8192_phy_configmac(priv);
ecdfa446
GKH		 2692
2693 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
d9ffa6c2
MM		 2694 rtl8192_phy_getTxPower(priv);
2695 rtl8192_phy_setTxPower(priv, priv->chan);
ecdfa446
GKH		 2696 }
2697
2698 //if D or C cut
3f9ab1ee 2699 tmpvalue = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2700 priv->IC_Cut = tmpvalue;
2701 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
2702 if(priv->IC_Cut >= IC_VersionCut_D)
2703 {
2704 //pHalData->bDcut = TRUE;
2705 if(priv->IC_Cut == IC_VersionCut_D)
2706 RT_TRACE(COMP_INIT, "D-cut\n");
2707 if(priv->IC_Cut == IC_VersionCut_E)
2708 {
2709 RT_TRACE(COMP_INIT, "E-cut\n");
2710 // HW SD suggest that we should not wirte this register too often, so driver
2711 // should readback this register. This register will be modified only when
2712 // power on reset
2713 }
2714 }
2715 else
2716 {
2717 //pHalData->bDcut = FALSE;
2718 RT_TRACE(COMP_INIT, "Before C-cut\n");
2719 }
2720
ecdfa446
GKH		 2721 //Firmware download
2722 RT_TRACE(COMP_INIT, "Load Firmware!\n");
2723 bfirmwareok = init_firmware(dev);
2724 if(bfirmwareok != true) {
2725 rtStatus = RT_STATUS_FAILURE;
2726 return rtStatus;
2727 }
2728 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
11aacc28 2729
ecdfa446
GKH		 2730 //RF config
2731 if(priv->ResetProgress == RESET_TYPE_NORESET)
2732 {
2733 RT_TRACE(COMP_INIT, "RF Config Started!\n");
d9ffa6c2 2734 rtStatus = rtl8192_phy_RFConfig(priv);
ecdfa446
GKH		 2735 if(rtStatus != RT_STATUS_SUCCESS)
2736 {
2737 RT_TRACE(COMP_ERR, "RF Config failed\n");
2738 return rtStatus;
2739 }
2740 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
2741 }
d9ffa6c2 2742 rtl8192_phy_updateInitGain(priv);
ecdfa446
GKH		 2743
2744 /*---- Set CCK and OFDM Block "ON"----*/
d9ffa6c2
MM		 2745 rtl8192_setBBreg(priv, rFPGA0_RFMOD, bCCKEn, 0x1);
2746 rtl8192_setBBreg(priv, rFPGA0_RFMOD, bOFDMEn, 0x1);
ecdfa446 2747
ecdfa446 2748 //Enable Led
3f9ab1ee 2749 write_nic_byte(priv, 0x87, 0x0);
ecdfa446
GKH		 2750
2751 //2=======================================================
2752 // RF Power Save
2753 //2=======================================================
2754#ifdef ENABLE_IPS
2755
2756{
181d1dff 2757 if(priv->RfOffReason > RF_CHANGE_BY_PS)
ecdfa446 2758 { // H/W or S/W RF OFF before sleep.
181d1dff 2759 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__,priv->RfOffReason);
262cd816 2760 MgntActSet_RF_State(priv, eRfOff, priv->RfOffReason);
ecdfa446 2761 }
181d1dff 2762 else if(priv->RfOffReason >= RF_CHANGE_BY_IPS)
ecdfa446 2763 { // H/W or S/W RF OFF before sleep.
181d1dff 2764 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__, priv->RfOffReason);
262cd816 2765 MgntActSet_RF_State(priv, eRfOff, priv->RfOffReason);
ecdfa446
GKH		 2766 }
2767 else
2768 {
2769 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
4559854d 2770 priv->eRFPowerState = eRfOn;
181d1dff 2771 priv->RfOffReason = 0;
ecdfa446
GKH		 2772 }
2773}
2774#endif
4803ef77
MM		 2775 // We can force firmware to do RF-R/W
2776 if(priv->ieee80211->FwRWRF)
2777 priv->Rf_Mode = RF_OP_By_FW;
2778 else
2779 priv->Rf_Mode = RF_OP_By_SW_3wire;
ecdfa446 2780
ecdfa446
GKH		 2781 if(priv->ResetProgress == RESET_TYPE_NORESET)
2782 {
7088dfb6 2783 dm_initialize_txpower_tracking(priv);
ecdfa446
GKH		 2784
2785 if(priv->IC_Cut >= IC_VersionCut_D)
2786 {
d9ffa6c2
MM		 2787 tmpRegA = rtl8192_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord);
2788 tmpRegC = rtl8192_QueryBBReg(priv, rOFDM0_XCTxIQImbalance, bMaskDWord);
ecdfa446
GKH		 2789 for(i = 0; i<TxBBGainTableLength; i++)
2790 {
2791 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
2792 {
2793 priv->rfa_txpowertrackingindex= (u8)i;
2794 priv->rfa_txpowertrackingindex_real= (u8)i;
2795 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
2796 break;
2797 }
2798 }
2799
d9ffa6c2 2800 TempCCk = rtl8192_QueryBBReg(priv, rCCK0_TxFilter1, bMaskByte2);
ecdfa446
GKH		 2801
2802 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
2803 {
2804 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
2805 {
2806 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
2807 break;
2808 }
2809 }
2810 priv->CCKPresentAttentuation_40Mdefault = 0;
2811 priv->CCKPresentAttentuation_difference = 0;
2812 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
2813 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
2814 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
2815 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
2816 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
2817 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
2818 }
2819 }
4803ef77 2820
480ab9dc 2821 rtl8192_irq_enable(priv);
ecdfa446
GKH		 2822 priv->being_init_adapter = false;
2823 return rtStatus;
2824
2825}
2826
80a4dead 2827static void rtl8192_prepare_beacon(unsigned long arg)
ecdfa446 2828{
80a4dead 2829 struct r8192_priv *priv = (struct r8192_priv*) arg;
ecdfa446 2830 struct sk_buff *skb;
ecdfa446
GKH		 2831 cb_desc *tcb_desc;
2832
2833 skb = ieee80211_get_beacon(priv->ieee80211);
2834 tcb_desc = (cb_desc *)(skb->cb + 8);
ecdfa446
GKH		 2835 /* prepare misc info for the beacon xmit */
2836 tcb_desc->queue_index = BEACON_QUEUE;
bbc9a991 2837 /* IBSS does not support HT yet, use 1M defaultly */
ecdfa446
GKH		 2838 tcb_desc->data_rate = 2;
2839 tcb_desc->RATRIndex = 7;
2840 tcb_desc->bTxDisableRateFallBack = 1;
2841 tcb_desc->bTxUseDriverAssingedRate = 1;
2842
2843 skb_push(skb, priv->ieee80211->tx_headroom);
2844 if(skb){
af59c39d 2845 rtl8192_tx(priv, skb);
ecdfa446 2846 }
ecdfa446
GKH		 2847}
2848
ecdfa446 2849
214985a6
MM		 2850/*
2851 * configure registers for beacon tx and enables it via
ecdfa446
GKH		 2852 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
2853 * be used to stop beacon transmission
2854 */
09145962 2855static void rtl8192_start_beacon(struct ieee80211_device *ieee80211)
ecdfa446 2856{
09145962 2857 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
ecdfa446
GKH		 2858 struct ieee80211_network *net = &priv->ieee80211->current_network;
2859 u16 BcnTimeCfg = 0;
2860 u16 BcnCW = 6;
2861 u16 BcnIFS = 0xf;
2862
2863 DMESG("Enabling beacon TX");
af59c39d 2864 rtl8192_irq_disable(priv);
ecdfa446
GKH		 2865 //rtl8192_beacon_tx_enable(dev);
2866
2867 /* ATIM window */
3f9ab1ee 2868 write_nic_word(priv, ATIMWND, 2);
ecdfa446
GKH		 2869
2870 /* Beacon interval (in unit of TU) */
3f9ab1ee 2871 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
ecdfa446
GKH		 2872
2873 /*
2874 * DrvErlyInt (in unit of TU).
2875 * (Time to send interrupt to notify driver to c
2876 * hange beacon content)
2877 * */
3f9ab1ee 2878 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
ecdfa446
GKH		 2879
2880 /*
2881 * BcnDMATIM(in unit of us).
2882 * Indicates the time before TBTT to perform beacon queue DMA
2883 * */
3f9ab1ee 2884 write_nic_word(priv, BCN_DMATIME, 256);
ecdfa446
GKH		 2885
2886 /*
2887 * Force beacon frame transmission even after receiving
2888 * beacon frame from other ad hoc STA
2889 * */
3f9ab1ee 2890 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 2891
2892 /* Set CW and IFS */
2893 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
2894 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 2895 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446
GKH		 2896
2897
2898 /* enable the interrupt for ad-hoc process */
480ab9dc 2899 rtl8192_irq_enable(priv);
ecdfa446 2900}
ecdfa446 2901
af59c39d 2902static bool HalRxCheckStuck8190Pci(struct r8192_priv *priv)
ecdfa446 2903{
3f9ab1ee 2904 u16 RegRxCounter = read_nic_word(priv, 0x130);
ecdfa446 2905 bool bStuck = FALSE;
935ce899 2906
ecdfa446
GKH		 2907 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
2908 // If rssi is small, we should check rx for long time because of bad rx.
2909 // or maybe it will continuous silent reset every 2 seconds.
935ce899 2910 priv->rx_chk_cnt++;
ecdfa446
GKH		 2911 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
2912 {
935ce899 2913 priv->rx_chk_cnt = 0; /* high rssi, check rx stuck right now. */
ecdfa446
GKH		 2914 }
2915 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
2916 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
2917 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
2918
2919 {
935ce899 2920 if(priv->rx_chk_cnt < 2)
ecdfa446
GKH		 2921 {
2922 return bStuck;
2923 }
2924 else
2925 {
935ce899 2926 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 2927 }
2928 }
2929 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
2930 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
2931 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
2932 {
935ce899 2933 if(priv->rx_chk_cnt < 4)
ecdfa446 2934 {
ecdfa446
GKH		 2935 return bStuck;
2936 }
2937 else
2938 {
935ce899 2939 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 2940 }
2941 }
2942 else
2943 {
935ce899 2944 if(priv->rx_chk_cnt < 8)
ecdfa446 2945 {
ecdfa446
GKH		 2946 return bStuck;
2947 }
2948 else
2949 {
935ce899 2950 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 2951 }
2952 }
ecdfa446
GKH		 2953 if(priv->RxCounter==RegRxCounter)
2954 bStuck = TRUE;
2955
2956 priv->RxCounter = RegRxCounter;
2957
2958 return bStuck;
2959}
2960
af59c39d 2961static RESET_TYPE RxCheckStuck(struct r8192_priv *priv)
ecdfa446
GKH		 2962{
2963
af59c39d 2964 if(HalRxCheckStuck8190Pci(priv))
ecdfa446
GKH		 2965 {
2966 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
2967 return RESET_TYPE_SILENT;
2968 }
2969
2970 return RESET_TYPE_NORESET;
2971}
2972
45a43a84 2973static RESET_TYPE rtl819x_check_reset(struct r8192_priv *priv)
ecdfa446 2974{
45a43a84
MM		 2975 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
2976 RT_RF_POWER_STATE rfState;
ecdfa446 2977
4559854d 2978 rfState = priv->eRFPowerState;
ecdfa446 2979
45a43a84
MM		 2980 if (rfState != eRfOff && (priv->ieee80211->iw_mode != IW_MODE_ADHOC)) {
2981 /*
2982 * If driver is in the status of firmware download failure,
2983 * driver skips RF initialization and RF is in turned off state.
2984 * Driver should check whether Rx stuck and do silent reset. And
2985 * if driver is in firmware download failure status, driver
2986 * should initialize RF in the following silent reset procedure
2987 *
2988 * Driver should not check RX stuck in IBSS mode because it is
2989 * required to set Check BSSID in order to send beacon, however,
2990 * if check BSSID is set, STA cannot hear any packet a all.
2991 */
af59c39d 2992 RxResetType = RxCheckStuck(priv);
ecdfa446 2993 }
ecdfa446 2994
45a43a84 2995 RT_TRACE(COMP_RESET, "%s(): RxResetType is %d\n", __FUNCTION__, RxResetType);
ecdfa446 2996
45a43a84 2997 return RxResetType;
ecdfa446
GKH		 2998}
2999
ecdfa446 3000#ifdef ENABLE_IPS
af59c39d 3001static void InactivePsWorkItemCallback(struct r8192_priv *priv)
ecdfa446 3002{
31d664e5 3003 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
ecdfa446 3004
703fdcc3 3005 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() --------->\n");
ecdfa446
GKH		 3006 //
3007 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
3008 // is really scheduled.
3009 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
3010 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
3011 // blocks the IPS procedure of switching RF.
3012 // By Bruce, 2007-12-25.
3013 //
3014 pPSC->bSwRfProcessing = TRUE;
3015
207b58fb 3016 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
ecdfa446
GKH		 3017 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
3018
3019
262cd816 3020 MgntActSet_RF_State(priv, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
ecdfa446
GKH		 3021
3022 //
3023 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
3024 //
ecdfa446 3025 pPSC->bSwRfProcessing = FALSE;
703fdcc3 3026 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <---------\n");
ecdfa446
GKH		 3027}
3028
65a43784 3029#ifdef ENABLE_LPS
214985a6 3030/* Change current and default preamble mode. */
679a2494 3031bool MgntActSet_802_11_PowerSaveMode(struct r8192_priv *priv, u8 rtPsMode)
65a43784 3032{
65a43784 3033
3034 // Currently, we do not change power save mode on IBSS mode.
3035 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3036 {
3037 return false;
3038 }
3039
3040 //
3041 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
3042 // some AP will not response to our mgnt frames with PwrMgt bit set,
3043 // e.g. cannot associate the AP.
3044 // So I commented out it. 2005.02.16, by rcnjko.
3045 //
3046// // Change device's power save mode.
3047// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
3048
3049 // Update power save mode configured.
3050 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
3051 if(!priv->ps_force) {
3052 priv->ieee80211->ps = rtPsMode;
3053 }
3054
3055 // Awake immediately
3056 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
3057 {
65a43784 3058 // Notify the AP we awke.
679a2494 3059 rtl8192_hw_wakeup(priv->ieee80211->dev);
65a43784 3060 priv->ieee80211->sta_sleep = 0;
3061
0cfc6185 3062 spin_lock(&priv->ieee80211->mgmt_tx_lock);
65a43784 3063 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
3064 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
0cfc6185 3065 spin_unlock(&priv->ieee80211->mgmt_tx_lock);
65a43784 3066 }
3067
3068 return true;
3069}
3070
214985a6 3071/* Enter the leisure power save mode. */
d1c580aa 3072void LeisurePSEnter(struct ieee80211_device *ieee80211)
65a43784 3073{
d1c580aa 3074 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
31d664e5 3075 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
65a43784 3076
65a43784 3077 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
3078 (priv->ieee80211->state == IEEE80211_LINKED)) ||
3079 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
3080 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
3081 return;
3082
3083 if (pPSC->bLeisurePs)
3084 {
3085 // Idle for a while if we connect to AP a while ago.
3086 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
3087 {
3088
3089 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3090 {
679a2494 3091 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
65a43784 3092
3093 }
3094 }
3095 else
3096 pPSC->LpsIdleCount++;
3097 }
3098}
3099
3100
214985a6 3101/* Leave leisure power save mode. */
d1c580aa 3102void LeisurePSLeave(struct ieee80211_device *ieee80211)
65a43784 3103{
d1c580aa 3104 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
31d664e5 3105 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
65a43784 3106
65a43784 3107 if (pPSC->bLeisurePs)
3108 {
3109 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3110 {
3111 // move to lps_wakecomplete()
679a2494 3112 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
65a43784 3113
3114 }
3115 }
3116}
3117#endif
3118
3119
214985a6 3120/* Enter the inactive power save mode. RF will be off */
e676ae58 3121void IPSEnter(struct r8192_priv *priv)
ecdfa446 3122{
31d664e5 3123 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
ecdfa446
GKH		 3124 RT_RF_POWER_STATE rtState;
3125
3126 if (pPSC->bInactivePs)
3127 {
4559854d 3128 rtState = priv->eRFPowerState;
ecdfa446
GKH		 3129 //
3130 // Added by Bruce, 2007-12-25.
3131 // Do not enter IPS in the following conditions:
3132 // (1) RF is already OFF or Sleep
3133 // (2) bSwRfProcessing (indicates the IPS is still under going)
3134 // (3) Connectted (only disconnected can trigger IPS)
3135 // (4) IBSS (send Beacon)
3136 // (5) AP mode (send Beacon)
3137 //
3138 if (rtState == eRfOn && !pPSC->bSwRfProcessing
3139 && (priv->ieee80211->state != IEEE80211_LINKED) )
3140 {
3141 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
3142 pPSC->eInactivePowerState = eRfOff;
3143// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
af59c39d 3144 InactivePsWorkItemCallback(priv);
ecdfa446
GKH		 3145 }
3146 }
3147}
3148
3149//
3150// Description:
3151// Leave the inactive power save mode, RF will be on.
3152// 2007.08.17, by shien chang.
3153//
58f6b58e 3154void IPSLeave(struct r8192_priv *priv)
ecdfa446 3155{
31d664e5 3156 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
ecdfa446
GKH		 3157 RT_RF_POWER_STATE rtState;
3158
3159 if (pPSC->bInactivePs)
3160 {
4559854d 3161 rtState = priv->eRFPowerState;
181d1dff 3162 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->RfOffReason <= RF_CHANGE_BY_IPS)
ecdfa446
GKH		 3163 {
3164 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
3165 pPSC->eInactivePowerState = eRfOn;
af59c39d 3166 InactivePsWorkItemCallback(priv);
ecdfa446
GKH		 3167 }
3168 }
3169}
65a43784 3170
80a4dead 3171void IPSLeave_wq(struct work_struct *work)
65a43784 3172{
80a4dead 3173 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ips_leave_wq);
65a43784 3174 struct net_device *dev = ieee->dev;
3175
3176 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3177 down(&priv->ieee80211->ips_sem);
58f6b58e 3178 IPSLeave(priv);
65a43784 3179 up(&priv->ieee80211->ips_sem);
3180}
3181
d1c580aa 3182void ieee80211_ips_leave_wq(struct ieee80211_device *ieee80211)
65a43784 3183{
d1c580aa 3184 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
65a43784 3185 RT_RF_POWER_STATE rtState;
4559854d 3186 rtState = priv->eRFPowerState;
65a43784 3187
31d664e5 3188 if (priv->PowerSaveControl.bInactivePs){
65a43784 3189 if(rtState == eRfOff){
181d1dff 3190 if(priv->RfOffReason > RF_CHANGE_BY_IPS)
65a43784 3191 {
3192 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
3193 return;
3194 }
3195 else{
3196 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
3197 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
3198 }
3199 }
3200 }
3201}
3202//added by amy 090331 end
d1c580aa 3203void ieee80211_ips_leave(struct ieee80211_device *ieee80211)
65a43784 3204{
d1c580aa
MM		 3205 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3206 down(&ieee80211->ips_sem);
58f6b58e 3207 IPSLeave(priv);
d1c580aa 3208 up(&ieee80211->ips_sem);
65a43784 3209}
ecdfa446 3210#endif
ecdfa446 3211
5e1ad18a 3212static void rtl819x_update_rxcounts(
ecdfa446
GKH		 3213 struct r8192_priv *priv,
3214 u32* TotalRxBcnNum,
3215 u32* TotalRxDataNum
3216)
3217{
3218 u16 SlotIndex;
3219 u8 i;
3220
3221 *TotalRxBcnNum = 0;
3222 *TotalRxDataNum = 0;
3223
3224 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
3225 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
3226 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
3227 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
3228 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
3229 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
3230 }
3231}
3232
3233
559fba5e 3234static void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 3235{
3236 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3237 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
af59c39d 3238 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 3239 struct ieee80211_device* ieee = priv->ieee80211;
3240 RESET_TYPE ResetType = RESET_TYPE_NORESET;
ecdfa446 3241 bool bBusyTraffic = false;
65a43784 3242 bool bEnterPS = false;
3243
f500e256 3244 if ((!priv->up) || priv->bHwRadioOff)
65a43784 3245 return;
3246
ecdfa446
GKH		 3247 if(!priv->up)
3248 return;
3249 hal_dm_watchdog(dev);
3250#ifdef ENABLE_IPS
ecdfa446 3251 if(ieee->actscanning == false){
207b58fb 3252 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
4559854d 3253 (priv->eRFPowerState == eRfOn) && !ieee->is_set_key &&
65a43784 3254 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
31d664e5 3255 if (priv->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
e676ae58 3256 IPSEnter(priv);
ecdfa446
GKH		 3257 }
3258 }
3259 }
3260#endif
3261 {//to get busy traffic condition
3262 if(ieee->state == IEEE80211_LINKED)
3263 {
65a43784 3264 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
3265 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
ecdfa446
GKH		 3266 bBusyTraffic = true;
3267 }
3268
65a43784 3269#ifdef ENABLE_LPS
3270 //added by amy for Leisure PS
3271 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
3272 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
3273 {
65a43784 3274 bEnterPS= false;
3275 }
3276 else
3277 {
3278 bEnterPS= true;
3279 }
3280
65a43784 3281 // LeisurePS only work in infra mode.
3282 if(bEnterPS)
3283 {
d1c580aa 3284 LeisurePSEnter(priv->ieee80211);
65a43784 3285 }
3286 else
3287 {
d1c580aa 3288 LeisurePSLeave(priv->ieee80211);
65a43784 3289 }
3290#endif
3291
3292 }
3293 else
3294 {
3295#ifdef ENABLE_LPS
d1c580aa 3296 LeisurePSLeave(priv->ieee80211);
65a43784 3297#endif
ecdfa446 3298 }
65a43784 3299
ecdfa446
GKH		 3300 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
3301 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
65a43784 3302 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
ecdfa446
GKH		 3303 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
3304 }
3305
3306
3307 //added by amy for AP roaming
ecdfa446
GKH		 3308 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
3309 {
3310 u32 TotalRxBcnNum = 0;
3311 u32 TotalRxDataNum = 0;
3312
3313 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
3314 if((TotalRxBcnNum+TotalRxDataNum) == 0)
3315 {
4559854d 3316 if (priv->eRFPowerState == eRfOff)
ecdfa446
GKH		 3317 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
3318 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
65a43784 3319 // Dot11d_Reset(dev);
ecdfa446
GKH		 3320 ieee->state = IEEE80211_ASSOCIATING;
3321 notify_wx_assoc_event(priv->ieee80211);
65a43784 3322 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
ecdfa446
GKH		 3323 ieee->is_roaming = true;
3324 ieee->is_set_key = false;
65a43784 3325 ieee->link_change(dev);
3326 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 3327 }
3328 }
3329 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
3330 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
3331
ecdfa446 3332 //check if reset the driver
d5fdaa3a
MM		 3333 if (priv->watchdog_check_reset_cnt++ >= 3 && !ieee->is_roaming &&
3334 priv->watchdog_last_time != 1)
ecdfa446 3335 {
45a43a84 3336 ResetType = rtl819x_check_reset(priv);
d5fdaa3a 3337 priv->watchdog_check_reset_cnt = 3;
ecdfa446 3338 }
ecdfa446
GKH		 3339 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
3340 {
3341 priv->ResetProgress = RESET_TYPE_NORMAL;
3342 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
3343 return;
3344 }
3345 /* disable silent reset temply 2008.9.11*/
11aacc28 3346
ecdfa446
GKH		 3347 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
3348 {
d5fdaa3a 3349 priv->watchdog_last_time = 1;
ecdfa446
GKH		 3350 }
3351 else
d5fdaa3a 3352 priv->watchdog_last_time = 0;
11aacc28 3353
ecdfa446
GKH		 3354 priv->force_reset = false;
3355 priv->bForcedSilentReset = false;
3356 priv->bResetInProgress = false;
3357 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
3358
3359}
3360
3361void watch_dog_timer_callback(unsigned long data)
3362{
1f0e4270 3363 struct r8192_priv *priv = (struct r8192_priv *) data;
ecdfa446 3364 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 3365 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
3366
3367}
5b3b1a7b 3368
af59c39d 3369static int _rtl8192_up(struct r8192_priv *priv)
ecdfa446 3370{
ecdfa446 3371 RT_STATUS init_status = RT_STATUS_SUCCESS;
af59c39d
MM		 3372 struct net_device *dev = priv->ieee80211->dev;
3373
ecdfa446
GKH		 3374 priv->up=1;
3375 priv->ieee80211->ieee_up=1;
65a43784 3376 priv->bdisable_nic = false; //YJ,add,091111
703fdcc3 3377 RT_TRACE(COMP_INIT, "Bringing up iface\n");
ecdfa446 3378
af59c39d 3379 init_status = rtl8192_adapter_start(priv);
ecdfa446
GKH		 3380 if(init_status != RT_STATUS_SUCCESS)
3381 {
3382 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
3383 return -1;
3384 }
3385 RT_TRACE(COMP_INIT, "start adapter finished\n");
4803ef77 3386
4559854d 3387 if (priv->eRFPowerState != eRfOn)
262cd816 3388 MgntActSet_RF_State(priv, eRfOn, priv->RfOffReason);
4803ef77 3389
ecdfa446
GKH		 3390 if(priv->ieee80211->state != IEEE80211_LINKED)
3391 ieee80211_softmac_start_protocol(priv->ieee80211);
3392 ieee80211_reset_queue(priv->ieee80211);
1f0e4270 3393 watch_dog_timer_callback((unsigned long) priv);
ecdfa446
GKH		 3394 if(!netif_queue_stopped(dev))
3395 netif_start_queue(dev);
3396 else
3397 netif_wake_queue(dev);
3398
3399 return 0;
3400}
3401
3402
5e1ad18a 3403static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 3404{
3405 struct r8192_priv *priv = ieee80211_priv(dev);
3406 int ret;
3407
3408 down(&priv->wx_sem);
3409 ret = rtl8192_up(dev);
3410 up(&priv->wx_sem);
3411 return ret;
3412
3413}
3414
3415
3416int rtl8192_up(struct net_device *dev)
3417{
3418 struct r8192_priv *priv = ieee80211_priv(dev);
3419
3420 if (priv->up == 1) return -1;
3421
af59c39d 3422 return _rtl8192_up(priv);
ecdfa446
GKH		 3423}
3424
3425
5e1ad18a 3426static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 3427{
3428 struct r8192_priv *priv = ieee80211_priv(dev);
3429 int ret;
3430
3431 down(&priv->wx_sem);
3432
3433 ret = rtl8192_down(dev);
3434
3435 up(&priv->wx_sem);
3436
3437 return ret;
3438
3439}
3440
3441int rtl8192_down(struct net_device *dev)
3442{
3443 struct r8192_priv *priv = ieee80211_priv(dev);
16d74da0 3444
ecdfa446
GKH		 3445 if (priv->up == 0) return -1;
3446
65a43784 3447#ifdef ENABLE_LPS
3448 //LZM for PS-Poll AID issue. 090429
3449 if(priv->ieee80211->state == IEEE80211_LINKED)
d1c580aa 3450 LeisurePSLeave(priv->ieee80211);
65a43784 3451#endif
3452
ecdfa446
GKH		 3453 priv->up=0;
3454 priv->ieee80211->ieee_up = 0;
3455 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
3456/* FIXME */
3457 if (!netif_queue_stopped(dev))
3458 netif_stop_queue(dev);
3459
af59c39d 3460 rtl8192_irq_disable(priv);
ecdfa446
GKH		 3461 rtl8192_cancel_deferred_work(priv);
3462 deinit_hal_dm(dev);
3463 del_timer_sync(&priv->watch_dog_timer);
3464
65a43784 3465 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
3466
af59c39d 3467 rtl8192_halt_adapter(priv, false);
ecdfa446
GKH		 3468 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
3469
3470 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
3471
16d74da0 3472 return 0;
ecdfa446
GKH		 3473}
3474
3475
af59c39d 3476void rtl8192_commit(struct r8192_priv *priv)
ecdfa446 3477{
ecdfa446
GKH		 3478 if (priv->up == 0) return ;
3479
3480
65a43784 3481 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446 3482
af59c39d
MM		 3483 rtl8192_irq_disable(priv);
3484 rtl8192_halt_adapter(priv, true);
3485 _rtl8192_up(priv);
ecdfa446
GKH		 3486}
3487
5b3b1a7b 3488static void rtl8192_restart(struct work_struct *work)
ecdfa446
GKH		 3489{
3490 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
ecdfa446
GKH		 3491
3492 down(&priv->wx_sem);
3493
af59c39d 3494 rtl8192_commit(priv);
ecdfa446
GKH		 3495
3496 up(&priv->wx_sem);
3497}
3498
3499static void r8192_set_multicast(struct net_device *dev)
3500{
3501 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 3502
109ded2b 3503 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
ecdfa446
GKH		 3504}
3505
3506
5e1ad18a 3507static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 3508{
3509 struct r8192_priv *priv = ieee80211_priv(dev);
3510 struct sockaddr *addr = mac;
3511
3512 down(&priv->wx_sem);
3513
3514 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3515
ecdfa446 3516 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 3517 up(&priv->wx_sem);
3518
3519 return 0;
3520}
3521
4573d145
MM		 3522static void r8192e_set_hw_key(struct r8192_priv *priv, struct ieee_param *ipw)
3523{
3524 struct ieee80211_device *ieee = priv->ieee80211;
4573d145
MM		 3525 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
3526 u32 key[4];
3527
3528 if (ipw->u.crypt.set_tx) {
3529 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3530 ieee->pairwise_key_type = KEY_TYPE_CCMP;
3531 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3532 ieee->pairwise_key_type = KEY_TYPE_TKIP;
3533 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3534 if (ipw->u.crypt.key_len == 13)
3535 ieee->pairwise_key_type = KEY_TYPE_WEP104;
3536 else if (ipw->u.crypt.key_len == 5)
3537 ieee->pairwise_key_type = KEY_TYPE_WEP40;
3538 } else
3539 ieee->pairwise_key_type = KEY_TYPE_NA;
3540
3541 if (ieee->pairwise_key_type) {
3542 memcpy(key, ipw->u.crypt.key, 16);
282fa9f3 3543 EnableHWSecurityConfig8192(priv);
4573d145
MM		 3544 /*
3545 * We fill both index entry and 4th entry for pairwise
3546 * key as in IPW interface, adhoc will only get here,
3547 * so we need index entry for its default key serching!
3548 */
043dfdd3 3549 setKey(priv, 4, ipw->u.crypt.idx,
4573d145
MM		 3550 ieee->pairwise_key_type,
3551 (u8*)ieee->ap_mac_addr, 0, key);
3552
3553 /* LEAP WEP will never set this. */
3554 if (ieee->auth_mode != 2)
043dfdd3 3555 setKey(priv, ipw->u.crypt.idx, ipw->u.crypt.idx,
4573d145
MM		 3556 ieee->pairwise_key_type,
3557 (u8*)ieee->ap_mac_addr, 0, key);
3558 }
3559 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) &&
3560 ieee->pHTInfo->bCurrentHTSupport) {
3561 write_nic_byte(priv, 0x173, 1); /* fix aes bug */
3562 }
3563 } else {
3564 memcpy(key, ipw->u.crypt.key, 16);
3565 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3566 ieee->group_key_type= KEY_TYPE_CCMP;
3567 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3568 ieee->group_key_type = KEY_TYPE_TKIP;
3569 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3570 if (ipw->u.crypt.key_len == 13)
3571 ieee->group_key_type = KEY_TYPE_WEP104;
3572 else if (ipw->u.crypt.key_len == 5)
3573 ieee->group_key_type = KEY_TYPE_WEP40;
3574 } else
3575 ieee->group_key_type = KEY_TYPE_NA;
3576
3577 if (ieee->group_key_type) {
043dfdd3 3578 setKey(priv, ipw->u.crypt.idx, ipw->u.crypt.idx,
4573d145
MM		 3579 ieee->group_key_type, broadcast_addr, 0, key);
3580 }
3581 }
3582}
3583
ecdfa446 3584/* based on ipw2200 driver */
5e1ad18a 3585static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 3586{
3587 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3588 struct iwreq *wrq = (struct iwreq *)rq;
3589 int ret=-1;
ecdfa446
GKH		 3590 struct iw_point *p = &wrq->u.data;
3591 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
3592
3593 down(&priv->wx_sem);
3594
3595
3596 if (p->length < sizeof(struct ieee_param) || !p->pointer){
3597 ret = -EINVAL;
3598 goto out;
3599 }
3600
32414878 3601 ipw = kmalloc(p->length, GFP_KERNEL);
ecdfa446
GKH		 3602 if (ipw == NULL){
3603 ret = -ENOMEM;
3604 goto out;
3605 }
3606 if (copy_from_user(ipw, p->pointer, p->length)) {
3607 kfree(ipw);
3608 ret = -EFAULT;
3609 goto out;
3610 }
3611
3612 switch (cmd) {
4573d145
MM		 3613 case RTL_IOCTL_WPA_SUPPLICANT:
3614 /* parse here for HW security */
3615 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
3616 r8192e_set_hw_key(priv, ipw);
ecdfa446
GKH		 3617 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3618 break;
3619
4573d145 3620 default:
ecdfa446
GKH		 3621 ret = -EOPNOTSUPP;
3622 break;
3623 }
3624
3625 kfree(ipw);
3626out:
3627 up(&priv->wx_sem);
3628
3629 return ret;
3630}
3631
5e1ad18a 3632static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 3633{
3634 u8 ret_rate = 0x02;
3635
3636 if(!bIsHT) {
3637 switch(rate) {
3638 case DESC90_RATE1M: ret_rate = MGN_1M; break;
3639 case DESC90_RATE2M: ret_rate = MGN_2M; break;
3640 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
3641 case DESC90_RATE11M: ret_rate = MGN_11M; break;
3642 case DESC90_RATE6M: ret_rate = MGN_6M; break;
3643 case DESC90_RATE9M: ret_rate = MGN_9M; break;
3644 case DESC90_RATE12M: ret_rate = MGN_12M; break;
3645 case DESC90_RATE18M: ret_rate = MGN_18M; break;
3646 case DESC90_RATE24M: ret_rate = MGN_24M; break;
3647 case DESC90_RATE36M: ret_rate = MGN_36M; break;
3648 case DESC90_RATE48M: ret_rate = MGN_48M; break;
3649 case DESC90_RATE54M: ret_rate = MGN_54M; break;
3650
3651 default:
3652 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
3653 break;
3654 }
3655
3656 } else {
3657 switch(rate) {
3658 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
3659 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
3660 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
3661 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
3662 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
3663 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
3664 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
3665 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
3666 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
3667 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
3668 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
3669 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
3670 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
3671 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
3672 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
3673 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
3674 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
3675
3676 default:
3677 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
3678 break;
3679 }
3680 }
3681
3682 return ret_rate;
3683}
3684
214985a6 3685/* Record the TSF time stamp when receiving a packet */
95a9a653 3686static void UpdateRxPktTimeStamp8190(struct r8192_priv *priv, struct ieee80211_rx_stats *stats)
ecdfa446 3687{
ecdfa446
GKH		 3688
3689 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
3690 stats->mac_time[0] = priv->LastRxDescTSFLow;
3691 stats->mac_time[1] = priv->LastRxDescTSFHigh;
3692 } else {
3693 priv->LastRxDescTSFLow = stats->mac_time[0];
3694 priv->LastRxDescTSFHigh = stats->mac_time[1];
3695 }
3696}
3697
5e1ad18a 3698static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 3699{
3700 long signal_power; // in dBm.
3701
3702 // Translate to dBm (x=0.5y-95).
3703 signal_power = (long)((signal_strength_index + 1) >> 1);
3704 signal_power -= 95;
3705
3706 return signal_power;
3707}
3708
ecdfa446
GKH		 3709/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
3710 be a local static. Otherwise, it may increase when we return from S3/S4. The
3711 value will be kept in memory or disk. We must delcare the value in adapter
3712 and it will be reinitialized when return from S3/S4. */
5e1ad18a 3713static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 3714{
3715 bool bcheck = false;
3716 u8 rfpath;
3717 u32 nspatial_stream, tmp_val;
ecdfa446
GKH		 3718 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
3719 static u32 slide_evm_index=0, slide_evm_statistics=0;
3720 static u32 last_rssi=0, last_evm=0;
ecdfa446
GKH		 3721 //cosa add for beacon rssi smoothing
3722 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
3723 static u32 last_beacon_adc_pwdb=0;
3724
3725 struct ieee80211_hdr_3addr *hdr;
3726 u16 sc ;
3727 unsigned int frag,seq;
3728 hdr = (struct ieee80211_hdr_3addr *)buffer;
3729 sc = le16_to_cpu(hdr->seq_ctl);
3730 frag = WLAN_GET_SEQ_FRAG(sc);
3731 seq = WLAN_GET_SEQ_SEQ(sc);
a7827534 3732
ecdfa446
GKH		 3733 //
3734 // Check whether we should take the previous packet into accounting
3735 //
3736 if(!pprevious_stats->bIsAMPDU)
3737 {
3738 // if previous packet is not aggregated packet
3739 bcheck = true;
ecdfa446
GKH		 3740 }
3741
3742 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
3743 {
3744 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
3745 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
3746 priv->stats.slide_rssi_total -= last_rssi;
3747 }
3748 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
3749
3750 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
3751 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
3752 slide_rssi_index = 0;
3753
3754 // <1> Showed on UI for user, in dbm
3755 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
3756 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
3757 pcurrent_stats->rssi = priv->stats.signal_strength;
3758 //
3759 // If the previous packet does not match the criteria, neglect it
3760 //
3761 if(!pprevious_stats->bPacketMatchBSSID)
3762 {
3763 if(!pprevious_stats->bToSelfBA)
3764 return;
3765 }
3766
3767 if(!bcheck)
3768 return;
3769
ecdfa446
GKH		 3770 // <2> Showed on UI for engineering
3771 // hardware does not provide rssi information for each rf path in CCK
3772 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
3773 {
3774 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
3775 {
d9ffa6c2 3776 if (!rtl8192_phy_CheckIsLegalRFPath(priv, rfpath))
ecdfa446 3777 continue;
703fdcc3 3778 RT_TRACE(COMP_DBG, "pPreviousstats->RxMIMOSignalStrength[rfpath] = %d\n", pprevious_stats->RxMIMOSignalStrength[rfpath]);
ecdfa446
GKH		 3779 //Fixed by Jacken 2008-03-20
3780 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
3781 {
3782 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
ecdfa446
GKH		 3783 }
3784 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
3785 {
3786 priv->stats.rx_rssi_percentage[rfpath] =
3787 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3788 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3789 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
3790 }
3791 else
3792 {
3793 priv->stats.rx_rssi_percentage[rfpath] =
3794 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3795 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3796 }
703fdcc3 3797 RT_TRACE(COMP_DBG, "priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" , priv->stats.rx_rssi_percentage[rfpath]);
ecdfa446
GKH		 3798 }
3799 }
3800
3801
3802 //
3803 // Check PWDB.
3804 //
3805 //cosa add for beacon rssi smoothing by average.
3806 if(pprevious_stats->bPacketBeacon)
3807 {
3808 /* record the beacon pwdb to the sliding window. */
3809 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3810 {
3811 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
3812 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
3813 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
ecdfa446
GKH		 3814 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
3815 }
3816 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
3817 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
ecdfa446
GKH		 3818 slide_beacon_adc_pwdb_index++;
3819 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3820 slide_beacon_adc_pwdb_index = 0;
3821 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
3822 if(pprevious_stats->RxPWDBAll >= 3)
3823 pprevious_stats->RxPWDBAll -= 3;
3824 }
3825
3826 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
3827 pprevious_stats->bIsCCK? "CCK": "OFDM",
3828 pprevious_stats->RxPWDBAll);
3829
3830 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3831 {
3832 if(priv->undecorated_smoothed_pwdb < 0) // initialize
3833 {
3834 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
ecdfa446 3835 }
11aacc28 3836
ecdfa446
GKH		 3837 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
3838 {
3839 priv->undecorated_smoothed_pwdb =
3840 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3841 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3842 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
3843 }
3844 else
3845 {
3846 priv->undecorated_smoothed_pwdb =
3847 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3848 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3849 }
ecdfa446
GKH		 3850 }
3851
3852 //
3853 // Check EVM
3854 //
3855 /* record the general EVM to the sliding window. */
3856 if(pprevious_stats->SignalQuality == 0)
3857 {
3858 }
3859 else
3860 {
3861 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
3862 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
3863 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
3864 last_evm = priv->stats.slide_evm[slide_evm_index];
3865 priv->stats.slide_evm_total -= last_evm;
3866 }
3867
3868 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
3869
3870 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
3871 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
3872 slide_evm_index = 0;
3873
3874 // <1> Showed on UI for user, in percentage.
3875 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
ecdfa446 3876 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
ecdfa446
GKH		 3877 }
3878
3879 // <2> Showed on UI for engineering
3880 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3881 {
3882 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
3883 {
3884 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
3885 {
3886 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
3887 {
3888 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
3889 }
3890 priv->stats.rx_evm_percentage[nspatial_stream] =
3891 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
3892 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
3893 }
3894 }
3895 }
3896 }
3897
3898}
3899
ecdfa446
GKH		 3900static u8 rtl819x_query_rxpwrpercentage(
3901 char antpower
3902 )
3903{
3904 if ((antpower <= -100) || (antpower >= 20))
3905 {
3906 return 0;
3907 }
3908 else if (antpower >= 0)
3909 {
3910 return 100;
3911 }
3912 else
3913 {
3914 return (100+antpower);
3915 }
3916
d5abdf72 3917}
ecdfa446
GKH		 3918
3919static u8
3920rtl819x_evm_dbtopercentage(
3921 char value
3922 )
3923{
3924 char ret_val;
3925
3926 ret_val = value;
3927
3928 if(ret_val >= 0)
3929 ret_val = 0;
3930 if(ret_val <= -33)
3931 ret_val = -33;
3932 ret_val = 0 - ret_val;
3933 ret_val*=3;
3934 if(ret_val == 99)
3935 ret_val = 100;
c6eae677 3936 return ret_val;
ecdfa446
GKH		 3937}
3938
214985a6 3939/* We want good-looking for signal strength/quality */
5e1ad18a 3940static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 3941{
3942 long retsig;
3943
3944 // Step 1. Scale mapping.
3945 if(currsig >= 61 && currsig <= 100)
3946 {
3947 retsig = 90 + ((currsig - 60) / 4);
3948 }
3949 else if(currsig >= 41 && currsig <= 60)
3950 {
3951 retsig = 78 + ((currsig - 40) / 2);
3952 }
3953 else if(currsig >= 31 && currsig <= 40)
3954 {
3955 retsig = 66 + (currsig - 30);
3956 }
3957 else if(currsig >= 21 && currsig <= 30)
3958 {
3959 retsig = 54 + (currsig - 20);
3960 }
3961 else if(currsig >= 5 && currsig <= 20)
3962 {
3963 retsig = 42 + (((currsig - 5) * 2) / 3);
3964 }
3965 else if(currsig == 4)
3966 {
3967 retsig = 36;
3968 }
3969 else if(currsig == 3)
3970 {
3971 retsig = 27;
3972 }
3973 else if(currsig == 2)
3974 {
3975 retsig = 18;
3976 }
3977 else if(currsig == 1)
3978 {
3979 retsig = 9;
3980 }
3981 else
3982 {
3983 retsig = currsig;
3984 }
3985
3986 return retsig;
3987}
3988
3989static void rtl8192_query_rxphystatus(
3990 struct r8192_priv * priv,
3991 struct ieee80211_rx_stats * pstats,
3992 prx_desc_819x_pci pdesc,
3993 prx_fwinfo_819x_pci pdrvinfo,
3994 struct ieee80211_rx_stats * precord_stats,
3995 bool bpacket_match_bssid,
3996 bool bpacket_toself,
3997 bool bPacketBeacon,
3998 bool bToSelfBA
3999 )
4000{
4001 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
4002 phy_sts_ofdm_819xpci_t* pofdm_buf;
4003 phy_sts_cck_819xpci_t * pcck_buf;
4004 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
4005 u8 *prxpkt;
4006 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
4007 char rx_pwr[4], rx_pwr_all=0;
4008 //long rx_avg_pwr = 0;
4009 char rx_snrX, rx_evmX;
4010 u8 evm, pwdb_all;
4011 u32 RSSI, total_rssi=0;//, total_evm=0;
4012// long signal_strength_index = 0;
4013 u8 is_cck_rate=0;
4014 u8 rf_rx_num = 0;
4015
ecdfa446
GKH		 4016 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
4017
4018 // Record it for next packet processing
4019 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
4020 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
4021 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
4022 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
4023 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
4024 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
4025 /*2007.08.30 requested by SD3 Jerry */
d163f324 4026 if (priv->phy_check_reg824 == 0)
ecdfa446 4027 {
d9ffa6c2 4028 priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv, rFPGA0_XA_HSSIParameter2, 0x200);
d163f324 4029 priv->phy_check_reg824 = 1;
ecdfa446
GKH		 4030 }
4031
4032
4033 prxpkt = (u8*)pdrvinfo;
4034
4035 /* Move pointer to the 16th bytes. Phy status start address. */
4036 prxpkt += sizeof(rx_fwinfo_819x_pci);
4037
4038 /* Initial the cck and ofdm buffer pointer */
4039 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
4040 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
4041
4042 pstats->RxMIMOSignalQuality[0] = -1;
4043 pstats->RxMIMOSignalQuality[1] = -1;
4044 precord_stats->RxMIMOSignalQuality[0] = -1;
4045 precord_stats->RxMIMOSignalQuality[1] = -1;
4046
4047 if(is_cck_rate)
4048 {
4049 //
4050 // (1)Hardware does not provide RSSI for CCK
4051 //
4052
4053 //
4054 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4055 //
4056 u8 report;//, cck_agc_rpt;
ecdfa446 4057
d163f324 4058 if (!priv->phy_reg824_bit9)
ecdfa446
GKH		 4059 {
4060 report = pcck_buf->cck_agc_rpt & 0xc0;
4061 report = report>>6;
4062 switch(report)
4063 {
4064 //Fixed by Jacken from Bryant 2008-03-20
4065 //Original value is -38 , -26 , -14 , -2
4066 //Fixed value is -35 , -23 , -11 , 6
4067 case 0x3:
4068 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
4069 break;
4070 case 0x2:
4071 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
4072 break;
4073 case 0x1:
4074 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
4075 break;
4076 case 0x0:
4077 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
4078 break;
4079 }
4080 }
4081 else
4082 {
4083 report = pcck_buf->cck_agc_rpt & 0x60;
4084 report = report>>5;
4085 switch(report)
4086 {
4087 case 0x3:
4088 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4089 break;
4090 case 0x2:
4091 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
4092 break;
4093 case 0x1:
4094 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4095 break;
4096 case 0x0:
4097 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4098 break;
4099 }
4100 }
4101
4102 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4103 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4104 pstats->RecvSignalPower = rx_pwr_all;
4105
4106 //
4107 // (3) Get Signal Quality (EVM)
4108 //
4109 if(bpacket_match_bssid)
4110 {
4111 u8 sq;
4112
4113 if(pstats->RxPWDBAll > 40)
4114 {
4115 sq = 100;
4116 }else
4117 {
4118 sq = pcck_buf->sq_rpt;
4119
4120 if(pcck_buf->sq_rpt > 64)
4121 sq = 0;
4122 else if (pcck_buf->sq_rpt < 20)
4123 sq = 100;
4124 else
4125 sq = ((64-sq) * 100) / 44;
4126 }
4127 pstats->SignalQuality = precord_stats->SignalQuality = sq;
4128 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
4129 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
4130 }
4131 }
4132 else
4133 {
ecdfa446
GKH		 4134 //
4135 // (1)Get RSSI for HT rate
4136 //
4137 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4138 {
4139 // 2008/01/30 MH we will judge RF RX path now.
4140 if (priv->brfpath_rxenable[i])
4141 rf_rx_num++;
4142 //else
4143 //continue;
4144
4145 //Fixed by Jacken from Bryant 2008-03-20
4146 //Original value is 106
ecdfa446 4147 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
ecdfa446
GKH		 4148
4149 //Get Rx snr value in DB
4150 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
4151 rx_snrX = (char)(tmp_rxsnr);
4152 rx_snrX /= 2;
ecdfa446
GKH		 4153
4154 /* Translate DBM to percentage. */
4155 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
4156 if (priv->brfpath_rxenable[i])
4157 total_rssi += RSSI;
4158
4159 /* Record Signal Strength for next packet */
4160 if(bpacket_match_bssid)
4161 {
4162 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
4163 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
4164 }
4165 }
4166
4167
4168 //
4169 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4170 //
4171 //Fixed by Jacken from Bryant 2008-03-20
4172 //Original value is 106
4173 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
4174 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4175
4176 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4177 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
4178 pstats->RecvSignalPower = rx_pwr_all;
4179 //
4180 // (3)EVM of HT rate
4181 //
4182 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
4183 pdrvinfo->RxRate<=DESC90_RATEMCS15)
4184 max_spatial_stream = 2; //both spatial stream make sense
4185 else
4186 max_spatial_stream = 1; //only spatial stream 1 makes sense
4187
4188 for(i=0; i<max_spatial_stream; i++)
4189 {
4190 tmp_rxevm = pofdm_buf->rxevm_X[i];
4191 rx_evmX = (char)(tmp_rxevm);
4192
4193 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
4194 // fill most significant bit to "zero" when doing shifting operation which may change a negative
4195 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
4196 rx_evmX /= 2; //dbm
4197
4198 evm = rtl819x_evm_dbtopercentage(rx_evmX);
ecdfa446
GKH		 4199 if(bpacket_match_bssid)
4200 {
4201 if(i==0) // Fill value in RFD, Get the first spatial stream only
4202 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
4203 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
4204 }
4205 }
4206
4207
4208 /* record rx statistics for debug */
4209 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
4210 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
ecdfa446
GKH		 4211 }
4212
4213 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
4214 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
4215 if(is_cck_rate)
4216 {
4217 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
4218
4219 }
4220 else
4221 {
4222 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
4223 // We can judge RX path number now.
4224 if (rf_rx_num != 0)
4225 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
4226 }
d5abdf72 4227}
ecdfa446 4228
5e1ad18a 4229static void
ecdfa446
GKH		 4230rtl8192_record_rxdesc_forlateruse(
4231 struct ieee80211_rx_stats * psrc_stats,
4232 struct ieee80211_rx_stats * ptarget_stats
4233)
4234{
4235 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
4236 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
ecdfa446
GKH		 4237}
4238
4239
4240
9633608f 4241static void TranslateRxSignalStuff819xpci(struct r8192_priv *priv,
ecdfa446
GKH		 4242 struct sk_buff *skb,
4243 struct ieee80211_rx_stats * pstats,
4244 prx_desc_819x_pci pdesc,
4245 prx_fwinfo_819x_pci pdrvinfo)
4246{
4247 // TODO: We must only check packet for current MAC address. Not finish
ecdfa446
GKH		 4248 bool bpacket_match_bssid, bpacket_toself;
4249 bool bPacketBeacon=false, bToSelfBA=false;
ecdfa446
GKH		 4250 struct ieee80211_hdr_3addr *hdr;
4251 u16 fc,type;
4252
4253 // Get Signal Quality for only RX data queue (but not command queue)
4254
4255 u8* tmp_buf;
4256 u8 *praddr;
4257
4258 /* Get MAC frame start address. */
4259 tmp_buf = skb->data;
4260
4261 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
4262 fc = le16_to_cpu(hdr->frame_ctl);
4263 type = WLAN_FC_GET_TYPE(fc);
4264 praddr = hdr->addr1;
4265
4266 /* Check if the received packet is acceptabe. */
4267 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
03996954 4268 (!compare_ether_addr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
ecdfa446 4269 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
03996954 4270 bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr));
11aacc28 4271
ecdfa446
GKH		 4272 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
4273 {
4274 bPacketBeacon = true;
ecdfa446
GKH		 4275 }
4276 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
4277 {
9633608f 4278 if (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr))
ecdfa446 4279 bToSelfBA = true;
ecdfa446
GKH		 4280 }
4281
ecdfa446
GKH		 4282 //
4283 // Process PHY information for previous packet (RSSI/PWDB/EVM)
4284 //
4285 // Because phy information is contained in the last packet of AMPDU only, so driver
4286 // should process phy information of previous packet
83184e69
MM		 4287 rtl8192_process_phyinfo(priv, tmp_buf, &priv->previous_stats, pstats);
4288 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &priv->previous_stats, bpacket_match_bssid,
ecdfa446 4289 bpacket_toself ,bPacketBeacon, bToSelfBA);
83184e69 4290 rtl8192_record_rxdesc_forlateruse(pstats, &priv->previous_stats);
ecdfa446
GKH		 4291
4292}
4293
4294
7703f04d 4295static void rtl8192_tx_resume(struct r8192_priv *priv)
ecdfa446 4296{
ecdfa446 4297 struct ieee80211_device *ieee = priv->ieee80211;
7703f04d 4298 struct net_device *dev = priv->ieee80211->dev;
ecdfa446 4299 struct sk_buff *skb;
db386800 4300 int i;
ecdfa446 4301
db386800
MM		 4302 for (i = BK_QUEUE; i < TXCMD_QUEUE; i++) {
4303 while ((!skb_queue_empty(&ieee->skb_waitQ[i])) &&
4304 (priv->ieee80211->check_nic_enough_desc(dev, i) > 0)) {
ecdfa446 4305 /* 1. dequeue the packet from the wait queue */
db386800 4306 skb = skb_dequeue(&ieee->skb_waitQ[i]);
ecdfa446 4307 /* 2. tx the packet directly */
09145962 4308 ieee->softmac_data_hard_start_xmit(skb, ieee, 0);
ecdfa446
GKH		 4309 }
4310 }
4311}
4312
80a4dead 4313static void rtl8192_irq_tx_tasklet(unsigned long arg)
ecdfa446 4314{
80a4dead 4315 struct r8192_priv *priv = (struct r8192_priv*) arg;
1348dc08
MM		 4316 struct rtl8192_tx_ring *mgnt_ring = &priv->tx_ring[MGNT_QUEUE];
4317 struct net_device *dev = priv->ieee80211->dev;
4318 unsigned long flags;
4319
4320 /* check if we need to report that the management queue is drained */
4321 spin_lock_irqsave(&priv->irq_th_lock, flags);
4322
4323 if (!skb_queue_len(&mgnt_ring->queue) &&
4324 priv->ieee80211->ack_tx_to_ieee &&
4325 rtl8192_is_tx_queue_empty(dev)) {
4326 priv->ieee80211->ack_tx_to_ieee = 0;
4327 ieee80211_ps_tx_ack(priv->ieee80211, 1);
4328 }
4329
4330 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4331
7703f04d 4332 rtl8192_tx_resume(priv);
ecdfa446
GKH		 4333}
4334
214985a6 4335/* Record the received data rate */
5e1ad18a 4336static void UpdateReceivedRateHistogramStatistics8190(
e2617486 4337 struct r8192_priv *priv,
ecdfa446
GKH		 4338 struct ieee80211_rx_stats* pstats
4339 )
4340{
ecdfa446
GKH		 4341 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
4342 u32 rateIndex;
4343 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
4344
ecdfa446
GKH		 4345 if(pstats->bCRC)
4346 rcvType = 2;
4347 else if(pstats->bICV)
4348 rcvType = 3;
4349
4350 if(pstats->bShortPreamble)
4351 preamble_guardinterval = 1;// short
4352 else
4353 preamble_guardinterval = 0;// long
4354
4355 switch(pstats->rate)
4356 {
4357 //
4358 // CCK rate
4359 //
4360 case MGN_1M: rateIndex = 0; break;
4361 case MGN_2M: rateIndex = 1; break;
4362 case MGN_5_5M: rateIndex = 2; break;
4363 case MGN_11M: rateIndex = 3; break;
4364 //
4365 // Legacy OFDM rate
4366 //
4367 case MGN_6M: rateIndex = 4; break;
4368 case MGN_9M: rateIndex = 5; break;
4369 case MGN_12M: rateIndex = 6; break;
4370 case MGN_18M: rateIndex = 7; break;
4371 case MGN_24M: rateIndex = 8; break;
4372 case MGN_36M: rateIndex = 9; break;
4373 case MGN_48M: rateIndex = 10; break;
4374 case MGN_54M: rateIndex = 11; break;
4375 //
4376 // 11n High throughput rate
4377 //
4378 case MGN_MCS0: rateIndex = 12; break;
4379 case MGN_MCS1: rateIndex = 13; break;
4380 case MGN_MCS2: rateIndex = 14; break;
4381 case MGN_MCS3: rateIndex = 15; break;
4382 case MGN_MCS4: rateIndex = 16; break;
4383 case MGN_MCS5: rateIndex = 17; break;
4384 case MGN_MCS6: rateIndex = 18; break;
4385 case MGN_MCS7: rateIndex = 19; break;
4386 case MGN_MCS8: rateIndex = 20; break;
4387 case MGN_MCS9: rateIndex = 21; break;
4388 case MGN_MCS10: rateIndex = 22; break;
4389 case MGN_MCS11: rateIndex = 23; break;
4390 case MGN_MCS12: rateIndex = 24; break;
4391 case MGN_MCS13: rateIndex = 25; break;
4392 case MGN_MCS14: rateIndex = 26; break;
4393 case MGN_MCS15: rateIndex = 27; break;
4394 default: rateIndex = 28; break;
4395 }
ecdfa446
GKH		 4396 priv->stats.received_rate_histogram[0][rateIndex]++; //total
4397 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
4398}
4399
ddd877b2 4400static void rtl8192_rx(struct r8192_priv *priv)
ecdfa446 4401{
ecdfa446
GKH		 4402 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
4403 bool unicast_packet = false;
4404 struct ieee80211_rx_stats stats = {
4405 .signal = 0,
4406 .noise = -98,
4407 .rate = 0,
4408 .freq = IEEE80211_24GHZ_BAND,
4409 };
4410 unsigned int count = priv->rxringcount;
79b03af6
MM		 4411 prx_fwinfo_819x_pci pDrvInfo = NULL;
4412 struct sk_buff *new_skb;
ecdfa446 4413
ecdfa446
GKH		 4414 while (count--) {
4415 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
4416 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
4417
79b03af6 4418 if (pdesc->OWN)
ecdfa446
GKH		 4419 /* wait data to be filled by hardware */
4420 return;
79b03af6 4421
ecdfa446
GKH		 4422 stats.bICV = pdesc->ICV;
4423 stats.bCRC = pdesc->CRC32;
4424 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
4425
4426 stats.Length = pdesc->Length;
4427 if(stats.Length < 24)
4428 stats.bHwError |= 1;
4429
4430 if(stats.bHwError) {
4431 stats.bShift = false;
ecdfa446 4432 goto done;
79b03af6
MM		 4433 }
4434 pDrvInfo = NULL;
4435 new_skb = dev_alloc_skb(priv->rxbuffersize);
ecdfa446 4436
79b03af6 4437 if (unlikely(!new_skb))
ecdfa446 4438 goto done;
ecdfa446
GKH		 4439
4440 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
4441 stats.RxBufShift = ((pdesc->Shift)&0x03);
4442 stats.Decrypted = !pdesc->SWDec;
4443
ecdfa446 4444 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 4445 *((dma_addr_t *)skb->cb),
4446 priv->rxbuffersize,
4447 PCI_DMA_FROMDEVICE);
4448 skb_put(skb, pdesc->Length);
4449 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
4450 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
4451
4452 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
4453 stats.bShortPreamble = pDrvInfo->SPLCP;
4454
4455 /* it is debug only. It should be disabled in released driver.
4456 * 2007.1.11 by Emily
4457 * */
e2617486 4458 UpdateReceivedRateHistogramStatistics8190(priv, &stats);
ecdfa446
GKH		 4459
4460 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
4461 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
4462
4463 stats.TimeStampLow = pDrvInfo->TSFL;
3f9ab1ee 4464 stats.TimeStampHigh = read_nic_dword(priv, TSFR+4);
ecdfa446 4465
95a9a653 4466 UpdateRxPktTimeStamp8190(priv, &stats);
ecdfa446
GKH		 4467
4468 //
4469 // Get Total offset of MPDU Frame Body
4470 //
4471 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
4472 stats.bShift = 1;
4473
ecdfa446 4474 /* ???? */
9633608f 4475 TranslateRxSignalStuff819xpci(priv, skb, &stats, pdesc, pDrvInfo);
ecdfa446
GKH		 4476
4477 /* Rx A-MPDU */
4478 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
4479 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
4480 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
4481 skb_trim(skb, skb->len - 4/*sCrcLng*/);
4482 /* rx packets statistics */
4483 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
4484 unicast_packet = false;
4485
4486 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
4487 //TODO
4488 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
4489 //TODO
4490 }else {
4491 /* unicast packet */
4492 unicast_packet = true;
4493 }
4494
fb5fe277 4495 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
ecdfa446
GKH		 4496 dev_kfree_skb_any(skb);
4497 } else {
4498 priv->stats.rxok++;
4499 if(unicast_packet) {
4500 priv->stats.rxbytesunicast += skb->len;
4501 }
4502 }
4503
43f88d53
DL		 4504 pci_unmap_single(priv->pdev, *((dma_addr_t *) skb->cb),
4505 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
4506
ecdfa446
GKH		 4507 skb = new_skb;
4508 priv->rx_buf[priv->rx_idx] = skb;
1c7ec2e8 4509 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
ecdfa446 4510
ecdfa446
GKH		 4511done:
4512 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
4513 pdesc->OWN = 1;
4514 pdesc->Length = priv->rxbuffersize;
4515 if (priv->rx_idx == priv->rxringcount-1)
4516 pdesc->EOR = 1;
4517 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
4518 }
4519
4520}
4521
80a4dead 4522static void rtl8192_irq_rx_tasklet(unsigned long arg)
ecdfa446 4523{
80a4dead 4524 struct r8192_priv *priv = (struct r8192_priv*) arg;
ddd877b2 4525 rtl8192_rx(priv);
ecdfa446 4526 /* unmask RDU */
3f9ab1ee 4527 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) | IMR_RDU);
ecdfa446
GKH		 4528}
4529
4530static const struct net_device_ops rtl8192_netdev_ops = {
4531 .ndo_open = rtl8192_open,
4532 .ndo_stop = rtl8192_close,
ecdfa446
GKH		 4533 .ndo_tx_timeout = tx_timeout,
4534 .ndo_do_ioctl = rtl8192_ioctl,
4535 .ndo_set_multicast_list = r8192_set_multicast,
4536 .ndo_set_mac_address = r8192_set_mac_adr,
fb5fe277 4537 .ndo_start_xmit = ieee80211_rtl_xmit,
ecdfa446
GKH		 4538};
4539
ecdfa446
GKH		 4540static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
4541 const struct pci_device_id *id)
4542{
ecdfa446
GKH		 4543 struct net_device *dev = NULL;
4544 struct r8192_priv *priv= NULL;
4545 u8 unit = 0;
3a8f2d3c 4546 int ret = -ENODEV;
ecdfa446 4547 unsigned long pmem_start, pmem_len, pmem_flags;
ecdfa446 4548
703fdcc3 4549 RT_TRACE(COMP_INIT,"Configuring chip resources\n");
ecdfa446
GKH		 4550
4551 if( pci_enable_device (pdev) ){
4552 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
4553 return -EIO;
4554 }
4555
4556 pci_set_master(pdev);
4557 //pci_set_wmi(pdev);
4558 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 4559 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446 4560 dev = alloc_ieee80211(sizeof(struct r8192_priv));
3a8f2d3c
KV		 4561 if (!dev) {
4562 ret = -ENOMEM;
4563 goto fail_free;
4564 }
ecdfa446 4565
ecdfa446 4566 pci_set_drvdata(pdev, dev);
ecdfa446 4567 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 4568 priv = ieee80211_priv(dev);
ecdfa446 4569 priv->ieee80211 = netdev_priv(dev);
ecdfa446 4570 priv->pdev=pdev;
ecdfa446
GKH		 4571 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
4572 priv->ieee80211->bSupportRemoteWakeUp = 1;
4573 } else
ecdfa446
GKH		 4574 {
4575 priv->ieee80211->bSupportRemoteWakeUp = 0;
4576 }
4577
ecdfa446
GKH		 4578 pmem_start = pci_resource_start(pdev, 1);
4579 pmem_len = pci_resource_len(pdev, 1);
4580 pmem_flags = pci_resource_flags (pdev, 1);
4581
4582 if (!(pmem_flags & IORESOURCE_MEM)) {
703fdcc3 4583 RT_TRACE(COMP_ERR, "region #1 not a MMIO resource, aborting\n");
ecdfa446
GKH		 4584 goto fail;
4585 }
4586
4587 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
4588 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
703fdcc3 4589 RT_TRACE(COMP_ERR,"request_mem_region failed!\n");
ecdfa446
GKH		 4590 goto fail;
4591 }
4592
9a77bd58
MM		 4593 priv->mem_start = ioremap_nocache(pmem_start, pmem_len);
4594 if (!priv->mem_start) {
703fdcc3 4595 RT_TRACE(COMP_ERR,"ioremap failed!\n");
ecdfa446
GKH		 4596 goto fail1;
4597 }
4598
9a77bd58
MM		 4599 dev->mem_start = (unsigned long) priv->mem_start;
4600 dev->mem_end = (unsigned long) (priv->mem_start +
4601 pci_resource_len(pdev, 0));
ecdfa446 4602
ecdfa446
GKH		 4603 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4604 * PCI Tx retries from interfering with C3 CPU state */
4605 pci_write_config_byte(pdev, 0x41, 0x00);
4606
4607
4608 pci_read_config_byte(pdev, 0x05, &unit);
4609 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
4610
4611 dev->irq = pdev->irq;
4612 priv->irq = 0;
4613
4614 dev->netdev_ops = &rtl8192_netdev_ops;
ecdfa446 4615
890a6850 4616 dev->wireless_handlers = &r8192_wx_handlers_def;
ecdfa446
GKH		 4617 dev->type=ARPHRD_ETHER;
4618
890a6850 4619 dev->watchdog_timeo = HZ*3;
ecdfa446
GKH		 4620
4621 if (dev_alloc_name(dev, ifname) < 0){
4622 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
dca41306 4623 strcpy(ifname, "wlan%d");
ecdfa446
GKH		 4624 dev_alloc_name(dev, ifname);
4625 }
4626
4627 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
c62fdce2 4628 if (rtl8192_init(priv)!=0) {
703fdcc3 4629 RT_TRACE(COMP_ERR, "Initialization failed\n");
ecdfa446
GKH		 4630 goto fail;
4631 }
4632
ecdfa446
GKH		 4633 register_netdev(dev);
4634 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
af59c39d 4635 rtl8192_proc_init_one(priv);
ecdfa446
GKH		 4636
4637
4638 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 4639 return 0;
ecdfa446
GKH		 4640
4641fail1:
4642
9a77bd58
MM		 4643 if (priv->mem_start) {
4644 iounmap(priv->mem_start);
ecdfa446
GKH		 4645 release_mem_region( pci_resource_start(pdev, 1),
4646 pci_resource_len(pdev, 1) );
4647 }
ecdfa446
GKH		 4648
4649fail:
4650 if(dev){
4651
4652 if (priv->irq) {
4653 free_irq(dev->irq, dev);
4654 dev->irq=0;
4655 }
4656 free_ieee80211(dev);
4657 }
4658
3a8f2d3c 4659fail_free:
ecdfa446
GKH		 4660 pci_disable_device(pdev);
4661
4662 DMESG("wlan driver load failed\n");
4663 pci_set_drvdata(pdev, NULL);
3a8f2d3c 4664 return ret;
ecdfa446
GKH		 4665
4666}
4667
4668/* detach all the work and timer structure declared or inititialized
4669 * in r8192_init function.
4670 * */
5b3b1a7b 4671static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
ecdfa446
GKH		 4672{
4673 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
4674 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
4675 * Otherwise call cancel_delayed_work is enough.
39cfb97b 4676 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
ecdfa446 4677 * */
ecdfa446
GKH		 4678 cancel_delayed_work(&priv->watch_dog_wq);
4679 cancel_delayed_work(&priv->update_beacon_wq);
4680 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
ecdfa446 4681 cancel_delayed_work(&priv->gpio_change_rf_wq);
ecdfa446
GKH		 4682 cancel_work_sync(&priv->reset_wq);
4683 cancel_work_sync(&priv->qos_activate);
ecdfa446
GKH		 4684}
4685
4686
4687static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
4688{
4689 struct net_device *dev = pci_get_drvdata(pdev);
4690 struct r8192_priv *priv ;
fb53c2b7 4691 u32 i;
ecdfa446 4692
fb53c2b7 4693 if (dev) {
ecdfa446
GKH		 4694
4695 unregister_netdev(dev);
4696
fb53c2b7 4697 priv = ieee80211_priv(dev);
ecdfa446 4698
af59c39d 4699 rtl8192_proc_remove_one(priv);
ecdfa446
GKH		 4700
4701 rtl8192_down(dev);
4702 if (priv->pFirmware)
4703 {
4704 vfree(priv->pFirmware);
4705 priv->pFirmware = NULL;
4706 }
ecdfa446 4707 destroy_workqueue(priv->priv_wq);
ecdfa446 4708
fb53c2b7 4709 /* free tx/rx rings */
af59c39d 4710 rtl8192_free_rx_ring(priv);
fb53c2b7 4711 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
af59c39d 4712 rtl8192_free_tx_ring(priv, i);
fb53c2b7
MM		 4713
4714 if (priv->irq) {
ecdfa446
GKH		 4715 printk("Freeing irq %d\n",dev->irq);
4716 free_irq(dev->irq, dev);
4717 priv->irq=0;
ecdfa446
GKH		 4718 }
4719
9a77bd58
MM		 4720 if (priv->mem_start) {
4721 iounmap(priv->mem_start);
ecdfa446
GKH		 4722 release_mem_region( pci_resource_start(pdev, 1),
4723 pci_resource_len(pdev, 1) );
4724 }
ecdfa446 4725
97a6688a 4726 free_ieee80211(dev);
ecdfa446
GKH		 4727 }
4728
4729 pci_disable_device(pdev);
4730 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
4731}
4732
fb5fe277
GK		 4733extern int ieee80211_rtl_init(void);
4734extern void ieee80211_rtl_exit(void);
ecdfa446
GKH		 4735
4736static int __init rtl8192_pci_module_init(void)
4737{
4738 int retval;
4739
fb5fe277 4740 retval = ieee80211_rtl_init();
ecdfa446
GKH		 4741 if (retval)
4742 return retval;
4743
4744 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
4745 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
703fdcc3 4746 RT_TRACE(COMP_INIT, "Initializing module\n");
ecdfa446 4747 rtl8192_proc_module_init();
ecdfa446 4748 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 4749 {
4750 DMESG("No device found");
4751 /*pci_unregister_driver (&rtl8192_pci_driver);*/
4752 return -ENODEV;
4753 }
4754 return 0;
4755}
4756
4757
4758static void __exit rtl8192_pci_module_exit(void)
4759{
4760 pci_unregister_driver(&rtl8192_pci_driver);
4761
703fdcc3 4762 RT_TRACE(COMP_DOWN, "Exiting\n");
ecdfa446 4763 rtl8192_proc_module_remove();
fb5fe277 4764 ieee80211_rtl_exit();
ecdfa446
GKH		 4765}
4766
559fba5e 4767static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446 4768{
b2cf8d48
MM		 4769 struct net_device *dev = (struct net_device *) netdev;
4770 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4771 unsigned long flags;
4772 u32 inta;
f8129a95
MM		 4773 irqreturn_t ret = IRQ_HANDLED;
4774
4775 spin_lock_irqsave(&priv->irq_th_lock, flags);
ecdfa446 4776
b2cf8d48 4777 /* ISR: 4bytes */
ecdfa446 4778
3f9ab1ee
MM		 4779 inta = read_nic_dword(priv, ISR); /* & priv->IntrMask; */
4780 write_nic_dword(priv, ISR, inta); /* reset int situation */
ecdfa446 4781
b2cf8d48 4782 if (!inta) {
b2cf8d48
MM		 4783 /*
4784 * most probably we can safely return IRQ_NONE,
4785 * but for now is better to avoid problems
4786 */
f8129a95 4787 goto out_unlock;
b2cf8d48 4788 }
ecdfa446 4789
b2cf8d48
MM		 4790 if (inta == 0xffff) {
4791 /* HW disappared */
f8129a95 4792 goto out_unlock;
b2cf8d48
MM		 4793 }
4794
f8129a95
MM		 4795 if (!netif_running(dev))
4796 goto out_unlock;
ecdfa446 4797
b2cf8d48
MM		 4798 if (inta & IMR_TBDOK) {
4799 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
af59c39d 4800 rtl8192_tx_isr(priv, BEACON_QUEUE);
b2cf8d48
MM		 4801 priv->stats.txbeaconokint++;
4802 }
ecdfa446 4803
b2cf8d48
MM		 4804 if (inta & IMR_TBDER) {
4805 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
af59c39d 4806 rtl8192_tx_isr(priv, BEACON_QUEUE);
b2cf8d48
MM		 4807 priv->stats.txbeaconerr++;
4808 }
ecdfa446 4809
b2cf8d48
MM		 4810 if (inta & IMR_MGNTDOK ) {
4811 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
4812 priv->stats.txmanageokint++;
af59c39d 4813 rtl8192_tx_isr(priv, MGNT_QUEUE);
b2cf8d48 4814 }
ecdfa446 4815
b2cf8d48
MM		 4816 if (inta & IMR_COMDOK)
4817 {
4818 priv->stats.txcmdpktokint++;
af59c39d 4819 rtl8192_tx_isr(priv, TXCMD_QUEUE);
b2cf8d48 4820 }
ecdfa446 4821
b2cf8d48 4822 if (inta & IMR_ROK) {
b2cf8d48
MM		 4823 priv->stats.rxint++;
4824 tasklet_schedule(&priv->irq_rx_tasklet);
4825 }
ecdfa446 4826
b2cf8d48
MM		 4827 if (inta & IMR_BcnInt) {
4828 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
4829 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
4830 }
ecdfa446 4831
b2cf8d48
MM		 4832 if (inta & IMR_RDU) {
4833 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
4834 priv->stats.rxrdu++;
4835 /* reset int situation */
3f9ab1ee 4836 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) & ~IMR_RDU);
b2cf8d48
MM		 4837 tasklet_schedule(&priv->irq_rx_tasklet);
4838 }
ecdfa446 4839
b2cf8d48
MM		 4840 if (inta & IMR_RXFOVW) {
4841 RT_TRACE(COMP_INTR, "rx overflow !\n");
4842 priv->stats.rxoverflow++;
4843 tasklet_schedule(&priv->irq_rx_tasklet);
4844 }
ecdfa446 4845
b2cf8d48
MM		 4846 if (inta & IMR_TXFOVW)
4847 priv->stats.txoverflow++;
ecdfa446 4848
b2cf8d48
MM		 4849 if (inta & IMR_BKDOK) {
4850 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
4851 priv->stats.txbkokint++;
4852 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
af59c39d 4853 rtl8192_tx_isr(priv, BK_QUEUE);
b2cf8d48 4854 }
ecdfa446 4855
b2cf8d48
MM		 4856 if (inta & IMR_BEDOK) {
4857 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
4858 priv->stats.txbeokint++;
4859 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
af59c39d 4860 rtl8192_tx_isr(priv, BE_QUEUE);
b2cf8d48 4861 }
ecdfa446 4862
b2cf8d48
MM		 4863 if (inta & IMR_VIDOK) {
4864 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
4865 priv->stats.txviokint++;
4866 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
af59c39d 4867 rtl8192_tx_isr(priv, VI_QUEUE);
b2cf8d48 4868 }
ecdfa446 4869
b2cf8d48
MM		 4870 if (inta & IMR_VODOK) {
4871 priv->stats.txvookint++;
4872 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
af59c39d 4873 rtl8192_tx_isr(priv, VO_QUEUE);
b2cf8d48 4874 }
ecdfa446 4875
f8129a95 4876out_unlock:
b2cf8d48 4877 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
ecdfa446 4878
f8129a95 4879 return ret;
ecdfa446
GKH		 4880}
4881
282fa9f3 4882void EnableHWSecurityConfig8192(struct r8192_priv *priv)
ecdfa446
GKH		 4883{
4884 u8 SECR_value = 0x0;
16d74da0
MM		 4885 struct ieee80211_device* ieee = priv->ieee80211;
4886
ecdfa446 4887 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
11aacc28 4888
ecdfa446
GKH		 4889 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
4890 {
4891 SECR_value |= SCR_RxUseDK;
4892 SECR_value |= SCR_TxUseDK;
4893 }
4894 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
4895 {
4896 SECR_value |= SCR_RxUseDK;
4897 SECR_value |= SCR_TxUseDK;
4898 }
4899
ecdfa446
GKH		 4900 //add HWSec active enable here.
4901//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
4902 ieee->hwsec_active = 1;
4903
4904 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
4905 {
4906 ieee->hwsec_active = 0;
4907 SECR_value &= ~SCR_RxDecEnable;
4908 }
4909
207b58fb 4910 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
ecdfa446
GKH		 4911 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
4912 {
3f9ab1ee 4913 write_nic_byte(priv, SECR, SECR_value);//SECR_value | SCR_UseDK );
ecdfa446
GKH		 4914 }
4915
4916}
4917#define TOTAL_CAM_ENTRY 32
4918//#define CAM_CONTENT_COUNT 8
043dfdd3
MM		 4919void setKey(struct r8192_priv *priv, u8 EntryNo, u8 KeyIndex, u16 KeyType,
4920 const u8 *MacAddr, u8 DefaultKey, u32 *KeyContent)
ecdfa446
GKH		 4921{
4922 u32 TargetCommand = 0;
4923 u32 TargetContent = 0;
4924 u16 usConfig = 0;
4925 u8 i;
4926#ifdef ENABLE_IPS
ecdfa446 4927 RT_RF_POWER_STATE rtState;
043dfdd3 4928
4559854d 4929 rtState = priv->eRFPowerState;
31d664e5 4930 if (priv->PowerSaveControl.bInactivePs){
ecdfa446 4931 if(rtState == eRfOff){
181d1dff 4932 if(priv->RfOffReason > RF_CHANGE_BY_IPS)
ecdfa446
GKH		 4933 {
4934 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
65a43784 4935 //up(&priv->wx_sem);
ecdfa446
GKH		 4936 return ;
4937 }
4938 else{
65a43784 4939 down(&priv->ieee80211->ips_sem);
58f6b58e 4940 IPSLeave(priv);
65a43784 4941 up(&priv->ieee80211->ips_sem);
ecdfa446
GKH		 4942 }
4943 }
4944 }
4945 priv->ieee80211->is_set_key = true;
4946#endif
4947 if (EntryNo >= TOTAL_CAM_ENTRY)
4948 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
4949
043dfdd3 4950 RT_TRACE(COMP_SEC, "====>to setKey(), priv:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", priv, EntryNo, KeyIndex, KeyType, MacAddr);
ecdfa446
GKH		 4951
4952 if (DefaultKey)
4953 usConfig |= BIT15 | (KeyType<<2);
4954 else
4955 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
4956// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
4957
4958
4959 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
4960 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
4961 TargetCommand |= BIT31|BIT16;
4962
4963 if(i==0){//MAC|Config
4964 TargetContent = (u32)(*(MacAddr+0)) << 16|
4965 (u32)(*(MacAddr+1)) << 24|
4966 (u32)usConfig;
4967
3f9ab1ee
MM		 4968 write_nic_dword(priv, WCAMI, TargetContent);
4969 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 4970 }
4971 else if(i==1){//MAC
4972 TargetContent = (u32)(*(MacAddr+2)) |
4973 (u32)(*(MacAddr+3)) << 8|
4974 (u32)(*(MacAddr+4)) << 16|
4975 (u32)(*(MacAddr+5)) << 24;
3f9ab1ee
MM		 4976 write_nic_dword(priv, WCAMI, TargetContent);
4977 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 4978 }
4979 else { //Key Material
4980 if(KeyContent != NULL)
4981 {
3f9ab1ee
MM		 4982 write_nic_dword(priv, WCAMI, (u32)(*(KeyContent+i-2)) );
4983 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 4984 }
4985 }
4986 }
4987 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446 4988}
ecdfa446 4989
480ab9dc 4990bool NicIFEnableNIC(struct r8192_priv *priv)
65a43784 4991{
4992 RT_STATUS init_status = RT_STATUS_SUCCESS;
31d664e5 4993 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
65a43784 4994
4995 //YJ,add,091109
4996 if (priv->up == 0){
4997 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
4998 priv->bdisable_nic = false; //YJ,add,091111
4999 return false;
5000 }
5001 // <1> Reset memory: descriptor, buffer,..
5002 //NicIFResetMemory(Adapter);
5003
5004 // <2> Enable Adapter
65a43784 5005 //priv->bfirst_init = true;
af59c39d 5006 init_status = rtl8192_adapter_start(priv);
65a43784 5007 if (init_status != RT_STATUS_SUCCESS) {
5008 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
5009 priv->bdisable_nic = false; //YJ,add,091111
5010 return -1;
5011 }
65a43784 5012 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
5013 //priv->bfirst_init = false;
5014
5015 // <3> Enable Interrupt
480ab9dc 5016 rtl8192_irq_enable(priv);
65a43784 5017 priv->bdisable_nic = false;
16d74da0 5018
c6eae677 5019 return (init_status == RT_STATUS_SUCCESS);
65a43784 5020}
214985a6 5021
480ab9dc 5022bool NicIFDisableNIC(struct r8192_priv *priv)
65a43784 5023{
5024 bool status = true;
65a43784 5025 u8 tmp_state = 0;
5026 // <1> Disable Interrupt
16d74da0 5027
65a43784 5028 priv->bdisable_nic = true; //YJ,move,091109
5029 tmp_state = priv->ieee80211->state;
5030
5031 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
5032
5033 priv->ieee80211->state = tmp_state;
5034 rtl8192_cancel_deferred_work(priv);
af59c39d 5035 rtl8192_irq_disable(priv);
65a43784 5036 // <2> Stop all timer
5037
5038 // <3> Disable Adapter
af59c39d 5039 rtl8192_halt_adapter(priv, false);
65a43784 5040// priv->bdisable_nic = true;
65a43784 5041
5042 return status;
5043}
5044
ecdfa446
GKH		 5045module_init(rtl8192_pci_module_init);
5046module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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