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staging: rtl8192e: Avoid casting function pointers
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4803ef77 3 * Linux device driver for RTL8192E
ecdfa446
GKH		 4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
ecdfa446 27//#define CONFIG_RTL8192_IO_MAP
3d14b518 28#include <linux/vmalloc.h>
5a0e3ad6 29#include <linux/slab.h>
ecdfa446
GKH		 30#include <asm/uaccess.h>
31#include "r8192E_hw.h"
32#include "r8192E.h"
33#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
34#include "r8180_93cx6.h" /* Card EEPROM */
35#include "r8192E_wx.h"
36#include "r819xE_phy.h" //added by WB 4.30.2008
37#include "r819xE_phyreg.h"
38#include "r819xE_cmdpkt.h"
39#include "r8192E_dm.h"
ecdfa446 40
bebdf809 41#ifdef CONFIG_PM
ecdfa446
GKH		 42#include "r8192_pm.h"
43#endif
44
45#ifdef ENABLE_DOT11D
65a43784 46#include "ieee80211/dot11d.h"
ecdfa446
GKH		 47#endif
48
49//set here to open your trace code. //WB
57be9583 50u32 rt_global_debug_component = COMP_ERR ; //always open err flags on
cf3d3d38 51
5eaa53de 52static DEFINE_PCI_DEVICE_TABLE(rtl8192_pci_id_tbl) = {
ecdfa446
GKH		 53 /* Realtek */
54 { PCI_DEVICE(0x10ec, 0x8192) },
55
56 /* Corega */
57 { PCI_DEVICE(0x07aa, 0x0044) },
58 { PCI_DEVICE(0x07aa, 0x0047) },
ecdfa446
GKH		 59 {}
60};
61
dca41306 62static char ifname[IFNAMSIZ] = "wlan%d";
ecdfa446
GKH		 63static int hwwep = 1; //default use hw. set 0 to use software security
64static int channels = 0x3fff;
65
66MODULE_LICENSE("GPL");
ecdfa446 67MODULE_VERSION("V 1.1");
ecdfa446
GKH		 68MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
69//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
70MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
71
ecdfa446 72
dca41306 73module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
ecdfa446
GKH		 74module_param(hwwep,int, S_IRUGO|S_IWUSR);
75module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 76
77MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
ecdfa446
GKH		 78MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
79MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
80
81static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
82 const struct pci_device_id *id);
83static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
84
85static struct pci_driver rtl8192_pci_driver = {
86 .name = RTL819xE_MODULE_NAME, /* Driver name */
87 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
88 .probe = rtl8192_pci_probe, /* probe fn */
89 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
bebdf809 90#ifdef CONFIG_PM
ecdfa446
GKH		 91 .suspend = rtl8192E_suspend, /* PM suspend fn */
92 .resume = rtl8192E_resume, /* PM resume fn */
93#else
94 .suspend = NULL, /* PM suspend fn */
214985a6 95 .resume = NULL, /* PM resume fn */
ecdfa446 96#endif
ecdfa446
GKH		 97};
98
559fba5e
MM		 99static void rtl8192_start_beacon(struct net_device *dev);
100static void rtl8192_stop_beacon(struct net_device *dev);
101static void rtl819x_watchdog_wqcallback(struct work_struct *work);
80a4dead
MM		 102static void rtl8192_irq_rx_tasklet(unsigned long arg);
103static void rtl8192_irq_tx_tasklet(unsigned long arg);
104static void rtl8192_prepare_beacon(unsigned long arg);
559fba5e 105static irqreturn_t rtl8192_interrupt(int irq, void *netdev);
881a975b 106static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb);
5b3b1a7b
MM		 107static void rtl8192_update_ratr_table(struct net_device* dev);
108static void rtl8192_restart(struct work_struct *work);
109static void watch_dog_timer_callback(unsigned long data);
110static int _rtl8192_up(struct net_device *dev);
111static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
559fba5e 112
ecdfa446
GKH		 113#ifdef ENABLE_DOT11D
114
115typedef struct _CHANNEL_LIST
116{
117 u8 Channel[32];
118 u8 Len;
119}CHANNEL_LIST, *PCHANNEL_LIST;
120
ab2161a0 121static const CHANNEL_LIST ChannelPlan[] = {
ecdfa446
GKH		 122 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
123 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
124 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
125 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
126 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
127 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
128 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
129 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
130 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
131 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
132 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
133};
134
135static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
136{
137 int i, max_chan=-1, min_chan=-1;
138 struct ieee80211_device* ieee = priv->ieee80211;
139 switch (channel_plan)
140 {
141 case COUNTRY_CODE_FCC:
142 case COUNTRY_CODE_IC:
143 case COUNTRY_CODE_ETSI:
144 case COUNTRY_CODE_SPAIN:
145 case COUNTRY_CODE_FRANCE:
146 case COUNTRY_CODE_MKK:
147 case COUNTRY_CODE_MKK1:
148 case COUNTRY_CODE_ISRAEL:
149 case COUNTRY_CODE_TELEC:
150 case COUNTRY_CODE_MIC:
151 {
152 Dot11d_Init(ieee);
153 ieee->bGlobalDomain = false;
154 //acturally 8225 & 8256 rf chip only support B,G,24N mode
155 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256))
156 {
157 min_chan = 1;
158 max_chan = 14;
159 }
160 else
161 {
162 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
163 }
164 if (ChannelPlan[channel_plan].Len != 0){
165 // Clear old channel map
166 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
167 // Set new channel map
168 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
169 {
170 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
171 break;
172 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
173 }
174 }
175 break;
176 }
177 case COUNTRY_CODE_GLOBAL_DOMAIN:
178 {
179 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
180 Dot11d_Reset(ieee);
181 ieee->bGlobalDomain = true;
182 break;
183 }
184 default:
185 break;
186 }
187}
188#endif
189
52cab756
MM		 190static inline bool rx_hal_is_cck_rate(prx_fwinfo_819x_pci pdrvinfo)
191{
192 return (pdrvinfo->RxRate == DESC90_RATE1M ||
193 pdrvinfo->RxRate == DESC90_RATE2M ||
194 pdrvinfo->RxRate == DESC90_RATE5_5M ||
195 pdrvinfo->RxRate == DESC90_RATE11M) &&
196 !pdrvinfo->RxHT;
197}
ecdfa446
GKH		 198
199void CamResetAllEntry(struct net_device *dev)
200{
3f9ab1ee
MM		 201 struct r8192_priv* priv = ieee80211_priv(dev);
202 write_nic_dword(priv, RWCAM, BIT31|BIT30);
ecdfa446
GKH		 203}
204
3f9ab1ee 205void write_cam(struct r8192_priv *priv, u8 addr, u32 data)
ecdfa446 206{
3f9ab1ee
MM		 207 write_nic_dword(priv, WCAMI, data);
208 write_nic_dword(priv, RWCAM, BIT31|BIT16|(addr&0xff) );
ecdfa446 209}
3f9ab1ee
MM		 210
211u32 read_cam(struct r8192_priv *priv, u8 addr)
ecdfa446 212{
3f9ab1ee
MM		 213 write_nic_dword(priv, RWCAM, 0x80000000|(addr&0xff) );
214 return read_nic_dword(priv, 0xa8);
ecdfa446
GKH		 215}
216
ecdfa446
GKH		 217#ifdef CONFIG_RTL8180_IO_MAP
218
3f9ab1ee 219u8 read_nic_byte(struct r8192_priv *priv, int x)
ecdfa446 220{
3f9ab1ee 221 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 222 return 0xff&inb(dev->base_addr +x);
223}
224
3f9ab1ee 225u32 read_nic_dword(struct r8192_priv *priv, int x)
ecdfa446 226{
3f9ab1ee 227 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 228 return inl(dev->base_addr +x);
229}
230
3f9ab1ee 231u16 read_nic_word(struct r8192_priv *priv, int x)
ecdfa446 232{
3f9ab1ee 233 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 234 return inw(dev->base_addr +x);
235}
236
3f9ab1ee 237void write_nic_byte(struct r8192_priv *priv, int x,u8 y)
ecdfa446 238{
3f9ab1ee 239 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 240 outb(y&0xff,dev->base_addr +x);
241}
242
3f9ab1ee 243void write_nic_word(struct r8192_priv *priv, int x,u16 y)
ecdfa446 244{
3f9ab1ee 245 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 246 outw(y,dev->base_addr +x);
247}
248
3f9ab1ee 249void write_nic_dword(struct r8192_priv *priv, int x,u32 y)
ecdfa446 250{
3f9ab1ee 251 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 252 outl(y,dev->base_addr +x);
253}
254
255#else /* RTL_IO_MAP */
256
3f9ab1ee 257u8 read_nic_byte(struct r8192_priv *priv, int x)
ecdfa446 258{
3f9ab1ee 259 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 260 return 0xff&readb((u8*)dev->mem_start +x);
261}
262
3f9ab1ee 263u32 read_nic_dword(struct r8192_priv *priv, int x)
ecdfa446 264{
3f9ab1ee 265 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 266 return readl((u8*)dev->mem_start +x);
267}
268
3f9ab1ee 269u16 read_nic_word(struct r8192_priv *priv, int x)
ecdfa446 270{
3f9ab1ee 271 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 272 return readw((u8*)dev->mem_start +x);
273}
274
3f9ab1ee 275void write_nic_byte(struct r8192_priv *priv, int x,u8 y)
ecdfa446 276{
3f9ab1ee 277 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 278 writeb(y,(u8*)dev->mem_start +x);
279 udelay(20);
280}
281
3f9ab1ee 282void write_nic_dword(struct r8192_priv *priv, int x,u32 y)
ecdfa446 283{
3f9ab1ee 284 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 285 writel(y,(u8*)dev->mem_start +x);
286 udelay(20);
287}
288
3f9ab1ee 289void write_nic_word(struct r8192_priv *priv, int x,u16 y)
ecdfa446 290{
3f9ab1ee 291 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 292 writew(y,(u8*)dev->mem_start +x);
293 udelay(20);
294}
295
296#endif /* RTL_IO_MAP */
297
65a43784 298u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
299{
4a533365
MM		 300 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
301 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 302 int wpa_ie_len= ieee->wpa_ie_len;
303 struct ieee80211_crypt_data* crypt;
304 int encrypt;
305
306 crypt = ieee->crypt[ieee->tx_keyidx];
307
207b58fb
MM		 308 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
309 (ieee->host_encrypt && crypt && crypt->ops &&
65a43784 310 (0 == strcmp(crypt->ops->name,"WEP")));
311
312 /* simply judge */
313 if(encrypt && (wpa_ie_len == 0)) {
314 // wep encryption, no N mode setting */
315 return SEC_ALG_WEP;
316 } else if((wpa_ie_len != 0)) {
317 // parse pairwise key type */
318 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
319 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
320 return SEC_ALG_CCMP;
321 else
322 return SEC_ALG_TKIP;
323 } else {
324 return SEC_ALG_NONE;
325 }
326}
327
328void
329rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
330{
331 struct r8192_priv* priv = ieee80211_priv(dev);
332
333 switch(variable)
334 {
335
336 case HW_VAR_BSSID:
3f9ab1ee
MM		 337 write_nic_dword(priv, BSSIDR, ((u32*)(val))[0]);
338 write_nic_word(priv, BSSIDR+2, ((u16*)(val+2))[0]);
65a43784 339 break;
340
341 case HW_VAR_MEDIA_STATUS:
342 {
343 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
3f9ab1ee 344 u8 btMsr = read_nic_byte(priv, MSR);
65a43784 345
346 btMsr &= 0xfc;
347
348 switch(OpMode)
349 {
350 case RT_OP_MODE_INFRASTRUCTURE:
351 btMsr |= MSR_INFRA;
65a43784 352 break;
353
354 case RT_OP_MODE_IBSS:
355 btMsr |= MSR_ADHOC;
65a43784 356 break;
357
358 case RT_OP_MODE_AP:
359 btMsr |= MSR_AP;
65a43784 360 break;
361
362 default:
363 btMsr |= MSR_NOLINK;
364 break;
365 }
366
3f9ab1ee 367 write_nic_byte(priv, MSR, btMsr);
65a43784 368 }
369 break;
370
951fc8ed 371 case HW_VAR_CHECK_BSSID:
65a43784 372 {
373 u32 RegRCR, Type;
374
375 Type = ((u8*)(val))[0];
3f9ab1ee 376 RegRCR = read_nic_dword(priv, RCR);
65a43784 377 priv->ReceiveConfig = RegRCR;
378
379 if (Type == true)
380 RegRCR |= (RCR_CBSSID);
381 else if (Type == false)
382 RegRCR &= (~RCR_CBSSID);
383
3f9ab1ee 384 write_nic_dword(priv, RCR,RegRCR);
65a43784 385 priv->ReceiveConfig = RegRCR;
386
387 }
388 break;
389
390 case HW_VAR_SLOT_TIME:
391 {
65a43784 392 priv->slot_time = val[0];
3f9ab1ee 393 write_nic_byte(priv, SLOT_TIME, val[0]);
65a43784 394
395 }
396 break;
397
398 case HW_VAR_ACK_PREAMBLE:
399 {
400 u32 regTmp = 0;
401 priv->short_preamble = (bool)(*(u8*)val );
402 regTmp = priv->basic_rate;
403 if (priv->short_preamble)
404 regTmp |= BRSR_AckShortPmb;
3f9ab1ee 405 write_nic_dword(priv, RRSR, regTmp);
65a43784 406 }
407 break;
408
409 case HW_VAR_CPU_RST:
3f9ab1ee 410 write_nic_dword(priv, CPU_GEN, ((u32*)(val))[0]);
65a43784 411 break;
412
413 default:
414 break;
415 }
416
417}
418
ecdfa446
GKH		 419static struct proc_dir_entry *rtl8192_proc = NULL;
420
ecdfa446
GKH		 421static int proc_get_stats_ap(char *page, char **start,
422 off_t offset, int count,
423 int *eof, void *data)
424{
425 struct net_device *dev = data;
426 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
427 struct ieee80211_device *ieee = priv->ieee80211;
428 struct ieee80211_network *target;
ecdfa446
GKH		 429 int len = 0;
430
431 list_for_each_entry(target, &ieee->network_list, list) {
432
433 len += snprintf(page + len, count - len,
434 "%s ", target->ssid);
435
436 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
437 len += snprintf(page + len, count - len,
438 "WPA\n");
439 }
440 else{
441 len += snprintf(page + len, count - len,
442 "non_WPA\n");
443 }
444
445 }
446
447 *eof = 1;
448 return len;
449}
450
451static int proc_get_registers(char *page, char **start,
452 off_t offset, int count,
453 int *eof, void *data)
454{
455 struct net_device *dev = data;
3f9ab1ee 456 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 457 int len = 0;
458 int i,n;
ecdfa446
GKH		 459 int max=0xff;
460
461 /* This dump the current register page */
462 len += snprintf(page + len, count - len,
463 "\n####################page 0##################\n ");
464
465 for(n=0;n<=max;)
466 {
ecdfa446
GKH		 467 len += snprintf(page + len, count - len,
468 "\nD: %2x > ",n);
469
470 for(i=0;i<16 && n<=max;i++,n++)
471 len += snprintf(page + len, count - len,
3f9ab1ee 472 "%2x ",read_nic_byte(priv,n));
ecdfa446
GKH		 473 }
474 len += snprintf(page + len, count - len,"\n");
475 len += snprintf(page + len, count - len,
476 "\n####################page 1##################\n ");
477 for(n=0;n<=max;)
478 {
ecdfa446
GKH		 479 len += snprintf(page + len, count - len,
480 "\nD: %2x > ",n);
481
482 for(i=0;i<16 && n<=max;i++,n++)
483 len += snprintf(page + len, count - len,
3f9ab1ee 484 "%2x ",read_nic_byte(priv,0x100|n));
ecdfa446
GKH		 485 }
486
487 len += snprintf(page + len, count - len,
488 "\n####################page 3##################\n ");
489 for(n=0;n<=max;)
490 {
ecdfa446
GKH		 491 len += snprintf(page + len, count - len,
492 "\nD: %2x > ",n);
493
494 for(i=0;i<16 && n<=max;i++,n++)
495 len += snprintf(page + len, count - len,
3f9ab1ee 496 "%2x ",read_nic_byte(priv,0x300|n));
ecdfa446
GKH		 497 }
498
ecdfa446
GKH		 499 *eof = 1;
500 return len;
501
502}
503
ecdfa446
GKH		 504static int proc_get_stats_tx(char *page, char **start,
505 off_t offset, int count,
506 int *eof, void *data)
507{
508 struct net_device *dev = data;
509 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
510
511 int len = 0;
512
513 len += snprintf(page + len, count - len,
514 "TX VI priority ok int: %lu\n"
ecdfa446 515 "TX VO priority ok int: %lu\n"
ecdfa446 516 "TX BE priority ok int: %lu\n"
ecdfa446 517 "TX BK priority ok int: %lu\n"
ecdfa446 518 "TX MANAGE priority ok int: %lu\n"
ecdfa446
GKH		 519 "TX BEACON priority ok int: %lu\n"
520 "TX BEACON priority error int: %lu\n"
521 "TX CMDPKT priority ok int: %lu\n"
ecdfa446
GKH		 522 "TX queue stopped?: %d\n"
523 "TX fifo overflow: %lu\n"
ecdfa446
GKH		 524 "TX total data packets %lu\n"
525 "TX total data bytes :%lu\n",
ecdfa446 526 priv->stats.txviokint,
ecdfa446 527 priv->stats.txvookint,
ecdfa446 528 priv->stats.txbeokint,
ecdfa446 529 priv->stats.txbkokint,
ecdfa446 530 priv->stats.txmanageokint,
ecdfa446
GKH		 531 priv->stats.txbeaconokint,
532 priv->stats.txbeaconerr,
533 priv->stats.txcmdpktokint,
ecdfa446
GKH		 534 netif_queue_stopped(dev),
535 priv->stats.txoverflow,
ecdfa446 536 priv->ieee80211->stats.tx_packets,
3059f2de 537 priv->ieee80211->stats.tx_bytes);
ecdfa446
GKH		 538
539 *eof = 1;
540 return len;
541}
542
543
544
545static int proc_get_stats_rx(char *page, char **start,
546 off_t offset, int count,
547 int *eof, void *data)
548{
549 struct net_device *dev = data;
550 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
551
552 int len = 0;
553
554 len += snprintf(page + len, count - len,
555 "RX packets: %lu\n"
556 "RX desc err: %lu\n"
c282f2e3 557 "RX rx overflow error: %lu\n",
ecdfa446
GKH		 558 priv->stats.rxint,
559 priv->stats.rxrdu,
c282f2e3 560 priv->stats.rxoverflow);
ecdfa446
GKH		 561
562 *eof = 1;
563 return len;
564}
565
5e1ad18a 566static void rtl8192_proc_module_init(void)
ecdfa446
GKH		 567{
568 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
ecdfa446 569 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 570}
571
572
5e1ad18a 573static void rtl8192_proc_module_remove(void)
ecdfa446 574{
ecdfa446 575 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 576}
577
578
5e1ad18a 579static void rtl8192_proc_remove_one(struct net_device *dev)
ecdfa446
GKH		 580{
581 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
582
583 printk("dev name=======> %s\n",dev->name);
584
585 if (priv->dir_dev) {
586 // remove_proc_entry("stats-hw", priv->dir_dev);
587 remove_proc_entry("stats-tx", priv->dir_dev);
588 remove_proc_entry("stats-rx", priv->dir_dev);
589 // remove_proc_entry("stats-ieee", priv->dir_dev);
590 remove_proc_entry("stats-ap", priv->dir_dev);
591 remove_proc_entry("registers", priv->dir_dev);
592 // remove_proc_entry("cck-registers",priv->dir_dev);
593 // remove_proc_entry("ofdm-registers",priv->dir_dev);
594 //remove_proc_entry(dev->name, rtl8192_proc);
595 remove_proc_entry("wlan0", rtl8192_proc);
596 priv->dir_dev = NULL;
597 }
598}
599
600
5e1ad18a 601static void rtl8192_proc_init_one(struct net_device *dev)
ecdfa446
GKH		 602{
603 struct proc_dir_entry *e;
604 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
605 priv->dir_dev = create_proc_entry(dev->name,
606 S_IFDIR | S_IRUGO | S_IXUGO,
607 rtl8192_proc);
608 if (!priv->dir_dev) {
609 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
610 dev->name);
611 return;
612 }
ecdfa446
GKH		 613 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
614 priv->dir_dev, proc_get_stats_rx, dev);
615
616 if (!e) {
617 RT_TRACE(COMP_ERR,"Unable to initialize "
618 "/proc/net/rtl8192/%s/stats-rx\n",
619 dev->name);
620 }
621
622
623 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
624 priv->dir_dev, proc_get_stats_tx, dev);
625
626 if (!e) {
627 RT_TRACE(COMP_ERR, "Unable to initialize "
628 "/proc/net/rtl8192/%s/stats-tx\n",
629 dev->name);
630 }
ecdfa446
GKH		 631
632 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
633 priv->dir_dev, proc_get_stats_ap, dev);
634
635 if (!e) {
636 RT_TRACE(COMP_ERR, "Unable to initialize "
637 "/proc/net/rtl8192/%s/stats-ap\n",
638 dev->name);
639 }
640
641 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
642 priv->dir_dev, proc_get_registers, dev);
643 if (!e) {
644 RT_TRACE(COMP_ERR, "Unable to initialize "
645 "/proc/net/rtl8192/%s/registers\n",
646 dev->name);
647 }
ecdfa446 648}
ecdfa446 649
ecdfa446
GKH		 650short check_nic_enough_desc(struct net_device *dev, int prio)
651{
652 struct r8192_priv *priv = ieee80211_priv(dev);
653 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
654
655 /* for now we reserve two free descriptor as a safety boundary
656 * between the tail and the head
657 */
285f660c 658 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
ecdfa446
GKH		 659}
660
5e1ad18a 661static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 662{
663 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 664
ecdfa446 665 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 666 printk("TXTIMEOUT");
667}
668
5e1ad18a 669static void rtl8192_irq_enable(struct net_device *dev)
ecdfa446
GKH		 670{
671 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
672 priv->irq_enabled = 1;
3f9ab1ee 673 write_nic_dword(priv, INTA_MASK, priv->irq_mask);
ecdfa446
GKH		 674}
675
65a43784 676void rtl8192_irq_disable(struct net_device *dev)
ecdfa446
GKH		 677{
678 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
679
3f9ab1ee 680 write_nic_dword(priv, INTA_MASK, 0);
ecdfa446
GKH		 681 priv->irq_enabled = 0;
682}
683
ecdfa446
GKH		 684void rtl8192_update_msr(struct net_device *dev)
685{
686 struct r8192_priv *priv = ieee80211_priv(dev);
687 u8 msr;
688
3f9ab1ee 689 msr = read_nic_byte(priv, MSR);
ecdfa446
GKH		 690 msr &= ~ MSR_LINK_MASK;
691
692 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
693 * msr must be updated if the state is ASSOCIATING.
694 * this is intentional and make sense for ad-hoc and
695 * master (see the create BSS/IBSS func)
696 */
697 if (priv->ieee80211->state == IEEE80211_LINKED){
698
699 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
700 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
701 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
702 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
703 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
704 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
705
706 }else
707 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
708
3f9ab1ee 709 write_nic_byte(priv, MSR, msr);
ecdfa446
GKH		 710}
711
712void rtl8192_set_chan(struct net_device *dev,short ch)
713{
61d0e67a 714 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 715
61d0e67a 716 priv->chan = ch;
ecdfa446 717
61d0e67a 718 /* need to implement rf set channel here WB */
ecdfa446 719
61d0e67a
MM		 720 if (priv->rf_set_chan)
721 priv->rf_set_chan(dev, priv->chan);
ecdfa446
GKH		 722}
723
724void rtl8192_rx_enable(struct net_device *dev)
725{
7aed48d9
MM		 726 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
727
3f9ab1ee 728 write_nic_dword(priv, RDQDA,priv->rx_ring_dma);
ecdfa446
GKH		 729}
730
731/* the TX_DESC_BASE setting is according to the following queue index
732 * BK_QUEUE ===> 0
733 * BE_QUEUE ===> 1
734 * VI_QUEUE ===> 2
735 * VO_QUEUE ===> 3
736 * HCCA_QUEUE ===> 4
737 * TXCMD_QUEUE ===> 5
738 * MGNT_QUEUE ===> 6
739 * HIGH_QUEUE ===> 7
740 * BEACON_QUEUE ===> 8
741 * */
881a975b 742static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
ecdfa446
GKH		 743void rtl8192_tx_enable(struct net_device *dev)
744{
7aed48d9
MM		 745 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
746 u32 i;
ecdfa446 747
7aed48d9 748 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
3f9ab1ee 749 write_nic_dword(priv, TX_DESC_BASE[i], priv->tx_ring[i].dma);
7aed48d9
MM		 750
751 ieee80211_reset_queue(priv->ieee80211);
ecdfa446
GKH		 752}
753
ecdfa446
GKH		 754
755static void rtl8192_free_rx_ring(struct net_device *dev)
756{
7aed48d9
MM		 757 struct r8192_priv *priv = ieee80211_priv(dev);
758 int i;
ecdfa446 759
7aed48d9
MM		 760 for (i = 0; i < priv->rxringcount; i++) {
761 struct sk_buff *skb = priv->rx_buf[i];
762 if (!skb)
763 continue;
ecdfa446 764
7aed48d9
MM		 765 pci_unmap_single(priv->pdev,
766 *((dma_addr_t *)skb->cb),
767 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
768 kfree_skb(skb);
769 }
ecdfa446 770
7aed48d9
MM		 771 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
772 priv->rx_ring, priv->rx_ring_dma);
773 priv->rx_ring = NULL;
ecdfa446
GKH		 774}
775
776static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
777{
7aed48d9
MM		 778 struct r8192_priv *priv = ieee80211_priv(dev);
779 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 780
7aed48d9
MM		 781 while (skb_queue_len(&ring->queue)) {
782 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
783 struct sk_buff *skb = __skb_dequeue(&ring->queue);
ecdfa446 784
7aed48d9
MM		 785 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
786 skb->len, PCI_DMA_TODEVICE);
787 kfree_skb(skb);
788 ring->idx = (ring->idx + 1) % ring->entries;
789 }
ecdfa446 790
7aed48d9
MM		 791 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
792 ring->desc, ring->dma);
793 ring->desc = NULL;
ecdfa446
GKH		 794}
795
16d74da0 796void PHY_SetRtl8192eRfOff(struct net_device* dev)
ecdfa446 797{
3f9ab1ee
MM		 798 struct r8192_priv *priv = ieee80211_priv(dev);
799
65a43784 800 //disable RF-Chip A/B
801 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
802 //analog to digital off, for power save
803 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
804 //digital to analog off, for power save
805 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
806 //rx antenna off
807 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
808 //rx antenna off
809 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
810 //analog to digital part2 off, for power save
811 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
812 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
813 // Analog parameter!!Change bias and Lbus control.
3f9ab1ee 814 write_nic_byte(priv, ANAPAR_FOR_8192PciE, 0x07);
65a43784 815
816}
ecdfa446 817
65a43784 818void rtl8192_halt_adapter(struct net_device *dev, bool reset)
ecdfa446 819{
ecdfa446 820 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 821 int i;
932f4b3a
MM		 822 u8 OpMode;
823 u32 ulRegRead;
65a43784 824
825 OpMode = RT_OP_MODE_NO_LINK;
826 priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
ecdfa446 827
932f4b3a
MM		 828 if (!priv->ieee80211->bSupportRemoteWakeUp) {
829 /*
830 * disable tx/rx. In 8185 we write 0x10 (Reset bit),
831 * but here we make reference to WMAC and wirte 0x0
832 */
3f9ab1ee 833 write_nic_byte(priv, CMDR, 0);
65a43784 834 }
ecdfa446 835
65a43784 836 mdelay(20);
ecdfa446 837
932f4b3a 838 if (!reset) {
65a43784 839 mdelay(150);
840
932f4b3a 841 priv->bHwRfOffAction = 2;
65a43784 842
932f4b3a
MM		 843 /*
844 * Call MgntActSet_RF_State instead to
845 * prevent RF config race condition.
846 */
847 if (!priv->ieee80211->bSupportRemoteWakeUp) {
65a43784 848 PHY_SetRtl8192eRfOff(dev);
3f9ab1ee 849 ulRegRead = read_nic_dword(priv, CPU_GEN);
932f4b3a 850 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3f9ab1ee 851 write_nic_dword(priv,CPU_GEN, ulRegRead);
932f4b3a
MM		 852 } else {
853 /* for WOL */
3f9ab1ee
MM		 854 write_nic_dword(priv, WFCRC0, 0xffffffff);
855 write_nic_dword(priv, WFCRC1, 0xffffffff);
856 write_nic_dword(priv, WFCRC2, 0xffffffff);
65a43784 857
932f4b3a 858 /* Write PMR register */
3f9ab1ee 859 write_nic_byte(priv, PMR, 0x5);
932f4b3a 860 /* Disable tx, enanble rx */
3f9ab1ee 861 write_nic_byte(priv, MacBlkCtrl, 0xa);
65a43784 862 }
863 }
864
865 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
866 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
867 }
868 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
869 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
870 }
ecdfa446
GKH		 871
872 skb_queue_purge(&priv->skb_queue);
ecdfa446
GKH		 873}
874
881a975b 875static const u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
ecdfa446
GKH		 876inline u16 rtl8192_rate2rate(short rate)
877{
878 if (rate >11) return 0;
879 return rtl_rate[rate];
880}
881
5e1ad18a 882static void rtl8192_data_hard_stop(struct net_device *dev)
ecdfa446 883{
ecdfa446
GKH		 884}
885
5e1ad18a 886static void rtl8192_data_hard_resume(struct net_device *dev)
ecdfa446 887{
ecdfa446
GKH		 888}
889
214985a6
MM		 890/*
891 * this function TX data frames when the ieee80211 stack requires this.
ecdfa446
GKH		 892 * It checks also if we need to stop the ieee tx queue, eventually do it
893 */
5e1ad18a 894static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
ecdfa446
GKH		 895{
896 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
897 int ret;
ecdfa446
GKH		 898 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
899 u8 queue_index = tcb_desc->queue_index;
dcf663fb 900
ecdfa446 901 /* shall not be referred by command packet */
5d33549a 902 BUG_ON(queue_index == TXCMD_QUEUE);
ecdfa446 903
dcf663fb 904 if (priv->bHwRadioOff || (!priv->up))
65a43784 905 {
906 kfree_skb(skb);
907 return;
908 }
909
dcf663fb 910 memcpy(skb->cb, &dev, sizeof(dev));
ecdfa446 911
ecdfa446
GKH		 912 skb_push(skb, priv->ieee80211->tx_headroom);
913 ret = rtl8192_tx(dev, skb);
dcf663fb 914 if (ret != 0) {
ecdfa446 915 kfree_skb(skb);
ecdfa446
GKH		 916 }
917
dcf663fb
MM		 918 if (queue_index != MGNT_QUEUE) {
919 priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom);
920 priv->ieee80211->stats.tx_packets++;
921 }
ecdfa446
GKH		 922}
923
214985a6
MM		 924/*
925 * This is a rough attempt to TX a frame
ecdfa446
GKH		 926 * This is called by the ieee 80211 stack to TX management frames.
927 * If the ring is full packet are dropped (for data frame the queue
928 * is stopped before this can happen).
929 */
5e1ad18a 930static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
ecdfa446
GKH		 931{
932 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 933 int ret;
ecdfa446
GKH		 934 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
935 u8 queue_index = tcb_desc->queue_index;
936
162f535f
MM		 937 if (queue_index != TXCMD_QUEUE) {
938 if (priv->bHwRadioOff || (!priv->up))
65a43784 939 {
162f535f
MM		 940 kfree_skb(skb);
941 return 0;
942 }
65a43784 943 }
ecdfa446 944
162f535f
MM		 945 memcpy(skb->cb, &dev, sizeof(dev));
946 if (queue_index == TXCMD_QUEUE) {
ecdfa446
GKH		 947 rtl819xE_tx_cmd(dev, skb);
948 ret = 0;
ecdfa446
GKH		 949 return ret;
950 } else {
ecdfa446
GKH		 951 tcb_desc->RATRIndex = 7;
952 tcb_desc->bTxDisableRateFallBack = 1;
953 tcb_desc->bTxUseDriverAssingedRate = 1;
954 tcb_desc->bTxEnableFwCalcDur = 1;
955 skb_push(skb, priv->ieee80211->tx_headroom);
956 ret = rtl8192_tx(dev, skb);
162f535f 957 if (ret != 0) {
ecdfa446 958 kfree_skb(skb);
162f535f 959 }
ecdfa446
GKH		 960 }
961
ecdfa446 962 return ret;
ecdfa446
GKH		 963}
964
965
5e1ad18a 966static void rtl8192_tx_isr(struct net_device *dev, int prio)
ecdfa446 967{
a922a4b7
MM		 968 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
969 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 970
a922a4b7
MM		 971 while (skb_queue_len(&ring->queue)) {
972 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
973 struct sk_buff *skb;
ecdfa446 974
a922a4b7
MM		 975 /*
976 * beacon packet will only use the first descriptor defaultly,
977 * and the OWN may not be cleared by the hardware
978 */
979 if (prio != BEACON_QUEUE) {
980 if (entry->OWN)
981 return;
982 ring->idx = (ring->idx + 1) % ring->entries;
983 }
ecdfa446 984
a922a4b7
MM		 985 skb = __skb_dequeue(&ring->queue);
986 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
987 skb->len, PCI_DMA_TODEVICE);
ecdfa446 988
a922a4b7
MM		 989 kfree_skb(skb);
990 }
ecdfa446 991
a922a4b7
MM		 992 if (prio != BEACON_QUEUE) {
993 /* try to deal with the pending packets */
994 tasklet_schedule(&priv->irq_tx_tasklet);
995 }
ecdfa446
GKH		 996}
997
5e1ad18a 998static void rtl8192_stop_beacon(struct net_device *dev)
ecdfa446 999{
ecdfa446
GKH		 1000}
1001
5e1ad18a 1002static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
ecdfa446
GKH		 1003{
1004 struct r8192_priv *priv = ieee80211_priv(dev);
1005 struct ieee80211_network *net;
1006 u8 i=0, basic_rate = 0;
1007 net = & priv->ieee80211->current_network;
1008
1009 for (i=0; i<net->rates_len; i++)
1010 {
1011 basic_rate = net->rates[i]&0x7f;
1012 switch(basic_rate)
1013 {
1014 case MGN_1M: *rate_config |= RRSR_1M; break;
1015 case MGN_2M: *rate_config |= RRSR_2M; break;
1016 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1017 case MGN_11M: *rate_config |= RRSR_11M; break;
1018 case MGN_6M: *rate_config |= RRSR_6M; break;
1019 case MGN_9M: *rate_config |= RRSR_9M; break;
1020 case MGN_12M: *rate_config |= RRSR_12M; break;
1021 case MGN_18M: *rate_config |= RRSR_18M; break;
1022 case MGN_24M: *rate_config |= RRSR_24M; break;
1023 case MGN_36M: *rate_config |= RRSR_36M; break;
1024 case MGN_48M: *rate_config |= RRSR_48M; break;
1025 case MGN_54M: *rate_config |= RRSR_54M; break;
1026 }
1027 }
1028 for (i=0; i<net->rates_ex_len; i++)
1029 {
1030 basic_rate = net->rates_ex[i]&0x7f;
1031 switch(basic_rate)
1032 {
1033 case MGN_1M: *rate_config |= RRSR_1M; break;
1034 case MGN_2M: *rate_config |= RRSR_2M; break;
1035 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1036 case MGN_11M: *rate_config |= RRSR_11M; break;
1037 case MGN_6M: *rate_config |= RRSR_6M; break;
1038 case MGN_9M: *rate_config |= RRSR_9M; break;
1039 case MGN_12M: *rate_config |= RRSR_12M; break;
1040 case MGN_18M: *rate_config |= RRSR_18M; break;
1041 case MGN_24M: *rate_config |= RRSR_24M; break;
1042 case MGN_36M: *rate_config |= RRSR_36M; break;
1043 case MGN_48M: *rate_config |= RRSR_48M; break;
1044 case MGN_54M: *rate_config |= RRSR_54M; break;
1045 }
1046 }
1047}
1048
1049
1050#define SHORT_SLOT_TIME 9
1051#define NON_SHORT_SLOT_TIME 20
1052
5e1ad18a 1053static void rtl8192_update_cap(struct net_device* dev, u16 cap)
ecdfa446
GKH		 1054{
1055 u32 tmp = 0;
1056 struct r8192_priv *priv = ieee80211_priv(dev);
1057 struct ieee80211_network *net = &priv->ieee80211->current_network;
1058 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1059 tmp = priv->basic_rate;
1060 if (priv->short_preamble)
1061 tmp |= BRSR_AckShortPmb;
3f9ab1ee 1062 write_nic_dword(priv, RRSR, tmp);
ecdfa446
GKH		 1063
1064 if (net->mode & (IEEE_G|IEEE_N_24G))
1065 {
1066 u8 slot_time = 0;
1067 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1068 {//short slot time
1069 slot_time = SHORT_SLOT_TIME;
1070 }
1071 else //long slot time
1072 slot_time = NON_SHORT_SLOT_TIME;
1073 priv->slot_time = slot_time;
3f9ab1ee 1074 write_nic_byte(priv, SLOT_TIME, slot_time);
ecdfa446
GKH		 1075 }
1076
1077}
5e1ad18a
GKH		 1078
1079static void rtl8192_net_update(struct net_device *dev)
ecdfa446 1080{
ecdfa446
GKH		 1081 struct r8192_priv *priv = ieee80211_priv(dev);
1082 struct ieee80211_network *net;
1083 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1084 u16 rate_config = 0;
1085 net = &priv->ieee80211->current_network;
eb40aeac
MM		 1086
1087 /* update Basic rate: RR, BRSR */
ecdfa446 1088 rtl8192_config_rate(dev, &rate_config);
ecdfa446 1089
eb40aeac
MM		 1090 /*
1091 * Select RRSR (in Legacy-OFDM and CCK)
1092 * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M,
1093 * 2M, and 1M from the Basic rate.
1094 * We do not use other rates.
1095 */
1096 priv->basic_rate = rate_config &= 0x15f;
1097
1098 /* BSSID */
3f9ab1ee
MM		 1099 write_nic_dword(priv, BSSIDR, ((u32 *)net->bssid)[0]);
1100 write_nic_word(priv, BSSIDR+4, ((u16 *)net->bssid)[2]);
ecdfa446 1101
ecdfa446
GKH		 1102 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1103 {
3f9ab1ee
MM		 1104 write_nic_word(priv, ATIMWND, 2);
1105 write_nic_word(priv, BCN_DMATIME, 256);
1106 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
eb40aeac
MM		 1107 /*
1108 * BIT15 of BCN_DRV_EARLY_INT will indicate
1109 * whether software beacon or hw beacon is applied.
1110 */
3f9ab1ee
MM		 1111 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
1112 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 1113
1114 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
eb40aeac
MM		 1115 /* TODO: BcnIFS may required to be changed on ASIC */
1116 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 1117 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446 1118 }
ecdfa446
GKH		 1119}
1120
ecdfa446
GKH		 1121void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1122{
1123 struct r8192_priv *priv = ieee80211_priv(dev);
1124 struct rtl8192_tx_ring *ring;
1125 tx_desc_819x_pci *entry;
1126 unsigned int idx;
1127 dma_addr_t mapping;
1128 cb_desc *tcb_desc;
1129 unsigned long flags;
1130
1131 ring = &priv->tx_ring[TXCMD_QUEUE];
1132 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1133
1134 spin_lock_irqsave(&priv->irq_th_lock,flags);
1135 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1136 entry = &ring->desc[idx];
1137
1138 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1139 memset(entry,0,12);
1140 entry->LINIP = tcb_desc->bLastIniPkt;
1141 entry->FirstSeg = 1;//first segment
1142 entry->LastSeg = 1; //last segment
1143 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1144 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1145 } else {
1146 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1147 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1148 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1149 entry->QueueSelect = QSLT_CMD;
1150 entry->TxFWInfoSize = 0x08;
1151 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1152 }
1153 entry->TxBufferSize = skb->len;
1154 entry->TxBuffAddr = cpu_to_le32(mapping);
1155 entry->OWN = 1;
1156
ecdfa446
GKH		 1157 __skb_queue_tail(&ring->queue, skb);
1158 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1159
3f9ab1ee 1160 write_nic_byte(priv, TPPoll, TPPoll_CQ);
ecdfa446
GKH		 1161
1162 return;
1163}
1164
1165/*
1166 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1167 * in TxFwInfo data structure
214985a6 1168 */
5e1ad18a 1169static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446 1170{
f72b6a50 1171 u8 QueueSelect = 0;
ecdfa446 1172
f72b6a50
MM		 1173 switch (QueueID) {
1174 case BE_QUEUE:
1175 QueueSelect = QSLT_BE;
1176 break;
ecdfa446 1177
f72b6a50
MM		 1178 case BK_QUEUE:
1179 QueueSelect = QSLT_BK;
1180 break;
ecdfa446 1181
f72b6a50
MM		 1182 case VO_QUEUE:
1183 QueueSelect = QSLT_VO;
1184 break;
ecdfa446 1185
f72b6a50
MM		 1186 case VI_QUEUE:
1187 QueueSelect = QSLT_VI;
1188 break;
ecdfa446 1189
f72b6a50
MM		 1190 case MGNT_QUEUE:
1191 QueueSelect = QSLT_MGNT;
1192 break;
ecdfa446 1193
f72b6a50
MM		 1194 case BEACON_QUEUE:
1195 QueueSelect = QSLT_BEACON;
1196 break;
ecdfa446 1197
f72b6a50
MM		 1198 case TXCMD_QUEUE:
1199 QueueSelect = QSLT_CMD;
1200 break;
1201
1202 case HIGH_QUEUE:
1203 default:
1204 RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID);
1205 break;
ecdfa446
GKH		 1206 }
1207 return QueueSelect;
1208}
1209
5e1ad18a 1210static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1211{
1212 u8 ret = DESC90_RATE1M;
1213
1214 switch(rate) {
1215 case MGN_1M: ret = DESC90_RATE1M; break;
1216 case MGN_2M: ret = DESC90_RATE2M; break;
1217 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1218 case MGN_11M: ret = DESC90_RATE11M; break;
1219 case MGN_6M: ret = DESC90_RATE6M; break;
1220 case MGN_9M: ret = DESC90_RATE9M; break;
1221 case MGN_12M: ret = DESC90_RATE12M; break;
1222 case MGN_18M: ret = DESC90_RATE18M; break;
1223 case MGN_24M: ret = DESC90_RATE24M; break;
1224 case MGN_36M: ret = DESC90_RATE36M; break;
1225 case MGN_48M: ret = DESC90_RATE48M; break;
1226 case MGN_54M: ret = DESC90_RATE54M; break;
1227
1228 // HT rate since here
1229 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1230 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1231 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1232 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1233 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1234 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1235 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1236 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1237 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1238 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1239 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1240 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1241 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1242 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1243 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1244 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1245 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1246
1247 default: break;
1248 }
1249 return ret;
1250}
1251
1252
5e1ad18a 1253static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1254{
1255 u8 tmp_Short;
1256
1257 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1258
1259 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1260 tmp_Short = 0;
1261
1262 return tmp_Short;
1263}
1264
1265/*
1266 * The tx procedure is just as following,
1267 * skb->cb will contain all the following information,
1268 * priority, morefrag, rate, &dev.
214985a6 1269 */
ecdfa446
GKH		 1270short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
1271{
067ba6cf
MM		 1272 struct r8192_priv *priv = ieee80211_priv(dev);
1273 struct rtl8192_tx_ring *ring;
1274 unsigned long flags;
1275 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1276 tx_desc_819x_pci *pdesc = NULL;
1277 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1278 dma_addr_t mapping;
1279 bool multi_addr = false, broad_addr = false, uni_addr = false;
1280 u8 *pda_addr = NULL;
1281 int idx;
1282
1283 if (priv->bdisable_nic) {
1284 RT_TRACE(COMP_ERR, "Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
1285 skb->len, tcb_desc->queue_index);
65a43784 1286 return skb->len;
067ba6cf 1287 }
65a43784 1288
1289#ifdef ENABLE_LPS
1290 priv->ieee80211->bAwakePktSent = true;
1291#endif
1292
067ba6cf
MM		 1293 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1294
1295 /* collect the tx packets statitcs */
1296 pda_addr = ((u8 *)skb->data) + sizeof(TX_FWINFO_8190PCI);
1297 if (is_multicast_ether_addr(pda_addr))
1298 multi_addr = true;
1299 else if (is_broadcast_ether_addr(pda_addr))
1300 broad_addr = true;
1301 else
1302 uni_addr = true;
1303
1304 if (uni_addr)
1305 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
067ba6cf
MM		 1306
1307 /* fill tx firmware */
1308 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1309 memset(pTxFwInfo, 0, sizeof(TX_FWINFO_8190PCI));
1310 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
1311 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1312 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1313 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1314
1315 /* Aggregation related */
1316 if (tcb_desc->bAMPDUEnable) {
1317 pTxFwInfo->AllowAggregation = 1;
1318 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1319 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1320 } else {
1321 pTxFwInfo->AllowAggregation = 0;
1322 pTxFwInfo->RxMF = 0;
1323 pTxFwInfo->RxAMD = 0;
1324 }
ecdfa446 1325
067ba6cf
MM		 1326 /* Protection mode related */
1327 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
1328 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
1329 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
1330 pTxFwInfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
1331 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1332 pTxFwInfo->RtsBandwidth = 0;
1333 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1334 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) : (tcb_desc->bRTSUseShortGI? 1 : 0);
1335
1336 /* Set Bandwidth and sub-channel settings. */
1337 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
1338 if (tcb_desc->bPacketBW) {
1339 pTxFwInfo->TxBandwidth = 1;
067ba6cf
MM		 1340 /* use duplicated mode */
1341 pTxFwInfo->TxSubCarrier = 0;
067ba6cf
MM		 1342 } else {
1343 pTxFwInfo->TxBandwidth = 0;
1344 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1345 }
1346 } else {
1347 pTxFwInfo->TxBandwidth = 0;
1348 pTxFwInfo->TxSubCarrier = 0;
1349 }
ecdfa446 1350
067ba6cf
MM		 1351 spin_lock_irqsave(&priv->irq_th_lock, flags);
1352 ring = &priv->tx_ring[tcb_desc->queue_index];
1353 if (tcb_desc->queue_index != BEACON_QUEUE)
1354 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1355 else
1356 idx = 0;
1357
1358 pdesc = &ring->desc[idx];
1359 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
1360 RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d,idx = %d,%x",
1361 tcb_desc->queue_index, ring->idx, idx, skb->len);
1362 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1363 return skb->len;
1364 }
ecdfa446 1365
067ba6cf
MM		 1366 /* fill tx descriptor */
1367 memset(pdesc, 0, 12);
1368
1369 /*DWORD 0*/
1370 pdesc->LINIP = 0;
1371 pdesc->CmdInit = 1;
1372 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; /* We must add 8!! */
1373 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1374
1375 /*DWORD 1*/
1376 pdesc->SecCAMID = 0;
1377 pdesc->RATid = tcb_desc->RATRIndex;
1378
1379 pdesc->NoEnc = 1;
1380 pdesc->SecType = 0x0;
1381 if (tcb_desc->bHwSec) {
1382 switch (priv->ieee80211->pairwise_key_type) {
1383 case KEY_TYPE_WEP40:
1384 case KEY_TYPE_WEP104:
1385 pdesc->SecType = 0x1;
1386 pdesc->NoEnc = 0;
1387 break;
1388 case KEY_TYPE_TKIP:
1389 pdesc->SecType = 0x2;
1390 pdesc->NoEnc = 0;
1391 break;
1392 case KEY_TYPE_CCMP:
1393 pdesc->SecType = 0x3;
1394 pdesc->NoEnc = 0;
1395 break;
1396 case KEY_TYPE_NA:
1397 pdesc->SecType = 0x0;
1398 pdesc->NoEnc = 1;
1399 break;
1400 }
1401 }
ecdfa446 1402
067ba6cf
MM		 1403 /* Set Packet ID */
1404 pdesc->PktId = 0x0;
ecdfa446 1405
067ba6cf
MM		 1406 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1407 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
ecdfa446 1408
067ba6cf
MM		 1409 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1410 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
ecdfa446 1411
067ba6cf
MM		 1412 pdesc->FirstSeg = 1;
1413 pdesc->LastSeg = 1;
1414 pdesc->TxBufferSize = skb->len;
ecdfa446 1415
067ba6cf
MM		 1416 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1417 __skb_queue_tail(&ring->queue, skb);
1418 pdesc->OWN = 1;
1419 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1420 dev->trans_start = jiffies;
3f9ab1ee 1421 write_nic_word(priv, TPPoll, 0x01<<tcb_desc->queue_index);
067ba6cf 1422 return 0;
ecdfa446
GKH		 1423}
1424
5e1ad18a 1425static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
ecdfa446
GKH		 1426{
1427 struct r8192_priv *priv = ieee80211_priv(dev);
1428 rx_desc_819x_pci *entry = NULL;
1429 int i;
1430
1431 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1432 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1433
1434 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1435 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1436 return -ENOMEM;
1437 }
1438
1439 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1440 priv->rx_idx = 0;
1441
1442 for (i = 0; i < priv->rxringcount; i++) {
1443 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1444 dma_addr_t *mapping;
1445 entry = &priv->rx_ring[i];
1446 if (!skb)
1447 return 0;
1448 priv->rx_buf[i] = skb;
1449 mapping = (dma_addr_t *)skb->cb;
1c7ec2e8 1450 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
ecdfa446
GKH		 1451 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1452
1453 entry->BufferAddress = cpu_to_le32(*mapping);
1454
1455 entry->Length = priv->rxbuffersize;
1456 entry->OWN = 1;
1457 }
1458
1459 entry->EOR = 1;
1460 return 0;
1461}
1462
1463static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
1464 unsigned int prio, unsigned int entries)
1465{
1466 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1467 tx_desc_819x_pci *ring;
1468 dma_addr_t dma;
1469 int i;
1470
1471 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1472 if (!ring || (unsigned long)ring & 0xFF) {
1473 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1474 return -ENOMEM;
1475 }
1476
1477 memset(ring, 0, sizeof(*ring)*entries);
1478 priv->tx_ring[prio].desc = ring;
1479 priv->tx_ring[prio].dma = dma;
1480 priv->tx_ring[prio].idx = 0;
1481 priv->tx_ring[prio].entries = entries;
1482 skb_queue_head_init(&priv->tx_ring[prio].queue);
1483
1484 for (i = 0; i < entries; i++)
1485 ring[i].NextDescAddress =
1486 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1487
1488 return 0;
1489}
1490
5e1ad18a 1491static short rtl8192_pci_initdescring(struct net_device *dev)
ecdfa446 1492{
1f1f19ff
MM		 1493 u32 ret;
1494 int i;
1495 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 1496
1f1f19ff
MM		 1497 ret = rtl8192_alloc_rx_desc_ring(dev);
1498 if (ret)
1499 return ret;
ecdfa446 1500
1f1f19ff
MM		 1501 /* general process for other queue */
1502 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1503 ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount);
1504 if (ret)
1505 goto err_free_rings;
1506 }
ecdfa446 1507
1f1f19ff 1508 return 0;
ecdfa446
GKH		 1509
1510err_free_rings:
1f1f19ff
MM		 1511 rtl8192_free_rx_ring(dev);
1512 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1513 if (priv->tx_ring[i].desc)
1514 rtl8192_free_tx_ring(dev, i);
1515 return 1;
ecdfa446
GKH		 1516}
1517
5e1ad18a 1518static void rtl8192_pci_resetdescring(struct net_device *dev)
ecdfa446
GKH		 1519{
1520 struct r8192_priv *priv = ieee80211_priv(dev);
1521 int i;
1522
1523 /* force the rx_idx to the first one */
1524 if(priv->rx_ring) {
1525 rx_desc_819x_pci *entry = NULL;
1526 for (i = 0; i < priv->rxringcount; i++) {
1527 entry = &priv->rx_ring[i];
1528 entry->OWN = 1;
1529 }
1530 priv->rx_idx = 0;
1531 }
1532
1533 /* after reset, release previous pending packet, and force the
1534 * tx idx to the first one */
1535 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1536 if (priv->tx_ring[i].desc) {
1537 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1538
1539 while (skb_queue_len(&ring->queue)) {
1540 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1541 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1542
1543 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1544 skb->len, PCI_DMA_TODEVICE);
1545 kfree_skb(skb);
1546 ring->idx = (ring->idx + 1) % ring->entries;
1547 }
1548 ring->idx = 0;
1549 }
1550 }
1551}
1552
5e1ad18a 1553static void rtl8192_link_change(struct net_device *dev)
ecdfa446 1554{
ecdfa446
GKH		 1555 struct r8192_priv *priv = ieee80211_priv(dev);
1556 struct ieee80211_device* ieee = priv->ieee80211;
3f9ab1ee 1557 //write_nic_word(priv, BCN_INTR_ITV, net->beacon_interval);
ecdfa446
GKH		 1558 if (ieee->state == IEEE80211_LINKED)
1559 {
1560 rtl8192_net_update(dev);
1561 rtl8192_update_ratr_table(dev);
11aacc28 1562
ecdfa446
GKH		 1563 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1564 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1565 EnableHWSecurityConfig8192(dev);
ecdfa446
GKH		 1566 }
1567 else
1568 {
3f9ab1ee 1569 write_nic_byte(priv, 0x173, 0);
ecdfa446
GKH		 1570 }
1571 /*update timing params*/
1572 //rtl8192_set_chan(dev, priv->chan);
1573 //MSR
1574 rtl8192_update_msr(dev);
1575
1576 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1577 // // To set CBSSID bit when link with any AP or STA.
1578 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1579 {
1580 u32 reg = 0;
3f9ab1ee 1581 reg = read_nic_dword(priv, RCR);
ecdfa446
GKH		 1582 if (priv->ieee80211->state == IEEE80211_LINKED)
1583 priv->ReceiveConfig = reg |= RCR_CBSSID;
1584 else
1585 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
3f9ab1ee 1586 write_nic_dword(priv, RCR, reg);
ecdfa446
GKH		 1587 }
1588}
ecdfa446
GKH		 1589
1590
5b3b1a7b 1591static const struct ieee80211_qos_parameters def_qos_parameters = {
ecdfa446
GKH		 1592 {3,3,3,3},/* cw_min */
1593 {7,7,7,7},/* cw_max */
1594 {2,2,2,2},/* aifs */
1595 {0,0,0,0},/* flags */
1596 {0,0,0,0} /* tx_op_limit */
1597};
1598
5e1ad18a 1599static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1600{
1601 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1602 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1603 struct ieee80211_device* ieee = priv->ieee80211;
1604 struct ieee80211_network* net = &ieee->current_network;
1605
1606 if (ieee->pHTInfo->bCurrentHTSupport)
1607 HTUpdateSelfAndPeerSetting(ieee, net);
1608 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1609 rtl8192_update_cap(dev, net->capability);
1610}
214985a6 1611
ecdfa446
GKH		 1612/*
1613* background support to run QoS activate functionality
1614*/
881a975b 1615static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1616static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1617{
1618 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
ecdfa446
GKH		 1619 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1620 u8 mode = priv->ieee80211->current_network.mode;
ecdfa446
GKH		 1621 u8 u1bAIFS;
1622 u32 u4bAcParam;
1623 int i;
ecdfa446 1624
ecdfa446 1625 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1626 if(priv->ieee80211->state != IEEE80211_LINKED)
1627 goto success;
1628 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1629 /* It better set slot time at first */
1630 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1631 /* update the ac parameter to related registers */
1632 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1633 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1634 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1635 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1636 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1637 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1638 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
3f9ab1ee
MM		 1639 write_nic_dword(priv, WDCAPARA_ADD[i], u4bAcParam);
1640 //write_nic_dword(priv, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 1641 }
1642
1643success:
ecdfa446 1644 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 1645}
1646
1647static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1648 int active_network,
1649 struct ieee80211_network *network)
1650{
1651 int ret = 0;
1652 u32 size = sizeof(struct ieee80211_qos_parameters);
1653
1654 if(priv->ieee80211->state !=IEEE80211_LINKED)
1655 return ret;
1656
1657 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1658 return ret;
1659
1660 if (network->flags & NETWORK_HAS_QOS_MASK) {
1661 if (active_network &&
1662 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1663 network->qos_data.active = network->qos_data.supported;
1664
1665 if ((network->qos_data.active == 1) && (active_network == 1) &&
1666 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1667 (network->qos_data.old_param_count !=
1668 network->qos_data.param_count)) {
1669 network->qos_data.old_param_count =
1670 network->qos_data.param_count;
ecdfa446 1671 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1672 RT_TRACE (COMP_QOS, "QoS parameters change call "
1673 "qos_activate\n");
1674 }
1675 } else {
207b58fb 1676 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1677 &def_qos_parameters, size);
1678
1679 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 1680 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1681 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
1682 }
1683 network->qos_data.active = 0;
1684 network->qos_data.supported = 0;
1685 }
1686
1687 return 0;
1688}
1689
1690/* handle manage frame frame beacon and probe response */
1691static int rtl8192_handle_beacon(struct net_device * dev,
1692 struct ieee80211_beacon * beacon,
1693 struct ieee80211_network * network)
1694{
1695 struct r8192_priv *priv = ieee80211_priv(dev);
1696
1697 rtl8192_qos_handle_probe_response(priv,1,network);
1698
ecdfa446 1699 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 1700 return 0;
1701
1702}
1703
1704/*
214985a6
MM		 1705 * handling the beaconing responses. if we get different QoS setting
1706 * off the network from the associated setting, adjust the QoS setting
1707 */
ecdfa446
GKH		 1708static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1709 struct ieee80211_network *network)
1710{
b72cb94f
MM		 1711 int ret = 0;
1712 unsigned long flags;
1713 u32 size = sizeof(struct ieee80211_qos_parameters);
1714 int set_qos_param = 0;
ecdfa446 1715
b72cb94f
MM		 1716 if ((priv == NULL) || (network == NULL))
1717 return ret;
ecdfa446 1718
b72cb94f
MM		 1719 if (priv->ieee80211->state != IEEE80211_LINKED)
1720 return ret;
ecdfa446 1721
b72cb94f
MM		 1722 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1723 return ret;
ecdfa446 1724
b72cb94f
MM		 1725 spin_lock_irqsave(&priv->ieee80211->lock, flags);
1726 if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
207b58fb
MM		 1727 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1728 &network->qos_data.parameters,
ecdfa446
GKH		 1729 sizeof(struct ieee80211_qos_parameters));
1730 priv->ieee80211->current_network.qos_data.active = 1;
b72cb94f
MM		 1731 set_qos_param = 1;
1732 /* update qos parameter for current network */
1733 priv->ieee80211->current_network.qos_data.old_param_count =
1734 priv->ieee80211->current_network.qos_data.param_count;
1735 priv->ieee80211->current_network.qos_data.param_count =
1736 network->qos_data.param_count;
1737
1738 } else {
207b58fb 1739 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1740 &def_qos_parameters, size);
1741 priv->ieee80211->current_network.qos_data.active = 0;
1742 priv->ieee80211->current_network.qos_data.supported = 0;
b72cb94f
MM		 1743 set_qos_param = 1;
1744 }
ecdfa446 1745
b72cb94f 1746 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
ecdfa446 1747
b72cb94f
MM		 1748 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
1749 network->flags, priv->ieee80211->current_network.qos_data.active);
ecdfa446 1750 if (set_qos_param == 1)
ecdfa446 1751 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446 1752
b72cb94f 1753 return ret;
ecdfa446
GKH		 1754}
1755
1756
1757static int rtl8192_handle_assoc_response(struct net_device *dev,
1758 struct ieee80211_assoc_response_frame *resp,
1759 struct ieee80211_network *network)
1760{
1761 struct r8192_priv *priv = ieee80211_priv(dev);
1762 rtl8192_qos_association_resp(priv, network);
1763 return 0;
1764}
1765
1766
214985a6 1767/* updateRATRTabel for MCS only. Basic rate is not implemented. */
5b3b1a7b 1768static void rtl8192_update_ratr_table(struct net_device* dev)
ecdfa446
GKH		 1769{
1770 struct r8192_priv* priv = ieee80211_priv(dev);
1771 struct ieee80211_device* ieee = priv->ieee80211;
1772 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
ecdfa446
GKH		 1773 u32 ratr_value = 0;
1774 u8 rate_index = 0;
1775
1776 rtl8192_config_rate(dev, (u16*)(&ratr_value));
1777 ratr_value |= (*(u16*)(pMcsRate)) << 12;
16d74da0 1778
ecdfa446
GKH		 1779 switch (ieee->mode)
1780 {
1781 case IEEE_A:
1782 ratr_value &= 0x00000FF0;
1783 break;
1784 case IEEE_B:
1785 ratr_value &= 0x0000000F;
1786 break;
1787 case IEEE_G:
1788 ratr_value &= 0x00000FF7;
1789 break;
1790 case IEEE_N_24G:
1791 case IEEE_N_5G:
1792 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1793 ratr_value &= 0x0007F007;
1794 else{
1795 if (priv->rf_type == RF_1T2R)
1796 ratr_value &= 0x000FF007;
1797 else
1798 ratr_value &= 0x0F81F007;
1799 }
1800 break;
1801 default:
1802 break;
1803 }
1804 ratr_value &= 0x0FFFFFFF;
1805 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1806 ratr_value |= 0x80000000;
1807 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1808 ratr_value |= 0x80000000;
1809 }
3f9ab1ee
MM		 1810 write_nic_dword(priv, RATR0+rate_index*4, ratr_value);
1811 write_nic_byte(priv, UFWP, 1);
ecdfa446
GKH		 1812}
1813
5e1ad18a 1814static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446 1815{
65a43784 1816 struct r8192_priv *priv = ieee80211_priv(dev);
1817 struct ieee80211_device *ieee = priv->ieee80211;
ecdfa446 1818
f8acdc3d
MM		 1819 return !(ieee->rtllib_ap_sec_type &&
1820 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
ecdfa446
GKH		 1821}
1822
5e1ad18a 1823static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 1824{
1825 struct ieee80211_device* ieee = priv->ieee80211;
1826 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
1827 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
1828 {
1829 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
ecdfa446
GKH		 1830 }
1831 else
1832 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
ecdfa446
GKH		 1833}
1834
5e1ad18a 1835static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
ecdfa446
GKH		 1836{
1837 struct r8192_priv *priv = ieee80211_priv(dev);
1838 u8 ret = 0;
1839 switch(priv->rf_chip)
1840 {
1841 case RF_8225:
1842 case RF_8256:
1843 case RF_PSEUDO_11N:
1844 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
1845 break;
1846 case RF_8258:
1847 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
1848 break;
1849 default:
1850 ret = WIRELESS_MODE_B;
1851 break;
1852 }
1853 return ret;
1854}
5e1ad18a
GKH		 1855
1856static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 1857{
1858 struct r8192_priv *priv = ieee80211_priv(dev);
1859 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
1860
ecdfa446
GKH		 1861 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
1862 {
1863 if(bSupportMode & WIRELESS_MODE_N_24G)
1864 {
1865 wireless_mode = WIRELESS_MODE_N_24G;
1866 }
1867 else if(bSupportMode & WIRELESS_MODE_N_5G)
1868 {
1869 wireless_mode = WIRELESS_MODE_N_5G;
1870 }
1871 else if((bSupportMode & WIRELESS_MODE_A))
1872 {
1873 wireless_mode = WIRELESS_MODE_A;
1874 }
1875 else if((bSupportMode & WIRELESS_MODE_G))
1876 {
1877 wireless_mode = WIRELESS_MODE_G;
1878 }
1879 else if((bSupportMode & WIRELESS_MODE_B))
1880 {
1881 wireless_mode = WIRELESS_MODE_B;
1882 }
1883 else{
1884 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
1885 wireless_mode = WIRELESS_MODE_B;
1886 }
1887 }
ecdfa446
GKH		 1888 priv->ieee80211->mode = wireless_mode;
1889
1890 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
1891 priv->ieee80211->pHTInfo->bEnableHT = 1;
1892 else
1893 priv->ieee80211->pHTInfo->bEnableHT = 0;
1894 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
1895 rtl8192_refresh_supportrate(priv);
ecdfa446 1896}
ecdfa446 1897
5e1ad18a 1898static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446 1899{
ecdfa446
GKH		 1900 struct r8192_priv* priv = ieee80211_priv(dev);
1901 struct ieee80211_device* ieee = priv->ieee80211;
1902
285f660c 1903 return ieee->bHalfWirelessN24GMode;
ecdfa446
GKH		 1904}
1905
1906short rtl8192_is_tx_queue_empty(struct net_device *dev)
1907{
1908 int i=0;
1909 struct r8192_priv *priv = ieee80211_priv(dev);
1910 for (i=0; i<=MGNT_QUEUE; i++)
1911 {
1912 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
1913 continue;
1914 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
1915 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
1916 return 0;
1917 }
1918 }
1919 return 1;
1920}
16d74da0 1921
5e1ad18a 1922static void rtl8192_hw_sleep_down(struct net_device *dev)
ecdfa446 1923{
65a43784 1924 struct r8192_priv *priv = ieee80211_priv(dev);
1925 unsigned long flags = 0;
1926
1927 spin_lock_irqsave(&priv->rf_ps_lock,flags);
1928 if (priv->RFChangeInProgress) {
1929 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
1930 RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n");
1931 printk("rtl8192_hw_sleep_down(): RF Change in progress!\n");
1932 return;
1933 }
1934 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
65a43784 1935
ecdfa446
GKH		 1936 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
1937}
16d74da0 1938
5e1ad18a 1939static void rtl8192_hw_sleep_wq (struct work_struct *work)
ecdfa446 1940{
ecdfa446
GKH		 1941 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1942 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
1943 struct net_device *dev = ieee->dev;
65a43784 1944
ecdfa446
GKH		 1945 rtl8192_hw_sleep_down(dev);
1946}
65a43784 1947
5e1ad18a 1948static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446 1949{
65a43784 1950 struct r8192_priv *priv = ieee80211_priv(dev);
1951 unsigned long flags = 0;
1952
1953 spin_lock_irqsave(&priv->rf_ps_lock,flags);
1954 if (priv->RFChangeInProgress) {
1955 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
1956 RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n");
1957 printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n");
1958 queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20
1959 return;
1960 }
1961 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
ecdfa446 1962
ecdfa446 1963 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
ecdfa446 1964}
65a43784 1965
ecdfa446
GKH		 1966void rtl8192_hw_wakeup_wq (struct work_struct *work)
1967{
ecdfa446
GKH		 1968 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1969 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
1970 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 1971 rtl8192_hw_wakeup(dev);
1972
1973}
1974
1975#define MIN_SLEEP_TIME 50
1976#define MAX_SLEEP_TIME 10000
5e1ad18a 1977static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446 1978{
ecdfa446
GKH		 1979 struct r8192_priv *priv = ieee80211_priv(dev);
1980
1981 u32 rb = jiffies;
1982 unsigned long flags;
1983
1984 spin_lock_irqsave(&priv->ps_lock,flags);
1985
65a43784 1986 // Writing HW register with 0 equals to disable
1987 // the timer, that is not really what we want
1988 //
1989 tl -= MSECS(8+16+7);
ecdfa446 1990
65a43784 1991 // If the interval in witch we are requested to sleep is too
1992 // short then give up and remain awake
1993 // when we sleep after send null frame, the timer will be too short to sleep.
1994 //
ecdfa446 1995 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
65a43784 1996 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
ecdfa446 1997 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 1998 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
ecdfa446
GKH		 1999 return;
2000 }
2001
ecdfa446 2002 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
65a43784 2003 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
2004 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
ecdfa446
GKH		 2005 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
2006 spin_unlock_irqrestore(&priv->ps_lock,flags);
2007 return;
2008 }
65a43784 2009 {
2010 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
2011 queue_delayed_work(priv->ieee80211->wq,
2012 &priv->ieee80211->hw_wakeup_wq,tmp);
2013 //PowerSave not supported when kernel version less 2.6.20
2014 }
2015 queue_delayed_work(priv->ieee80211->wq,
2016 (void *)&priv->ieee80211->hw_sleep_wq,0);
ecdfa446 2017 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 2018
ecdfa446 2019}
214985a6 2020
ecdfa446
GKH		 2021static void rtl8192_init_priv_variable(struct net_device* dev)
2022{
2023 struct r8192_priv *priv = ieee80211_priv(dev);
2024 u8 i;
65a43784 2025 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
2026
2027 // Default Halt the NIC if RF is OFF.
2028 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
2029 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
2030 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
2031 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
2032 pPSC->bLeisurePs = true;
2033 pPSC->RegMaxLPSAwakeIntvl = 5;
2034 priv->bHwRadioOff = false;
2035
ecdfa446 2036 priv->being_init_adapter = false;
ecdfa446 2037 priv->txringcount = 64;//32;
ecdfa446
GKH		 2038 priv->rxbuffersize = 9100;//2048;//1024;
2039 priv->rxringcount = MAX_RX_COUNT;//64;
2040 priv->irq_enabled=0;
ecdfa446
GKH		 2041 priv->rx_skb_complete = 1;
2042 priv->chan = 1; //set to channel 1
2043 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
2044 priv->RegChannelPlan = 0xf;
ecdfa446
GKH		 2045 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
2046 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2047 priv->ieee80211->ieee_up=0;
2048 priv->retry_rts = DEFAULT_RETRY_RTS;
2049 priv->retry_data = DEFAULT_RETRY_DATA;
2050 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
2051 priv->ieee80211->rate = 110; //11 mbps
2052 priv->ieee80211->short_slot = 1;
2053 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
2054 priv->bcck_in_ch14 = false;
ecdfa446
GKH		 2055 priv->CCKPresentAttentuation = 0;
2056 priv->rfa_txpowertrackingindex = 0;
2057 priv->rfc_txpowertrackingindex = 0;
2058 priv->CckPwEnl = 6;
ecdfa446
GKH		 2059 //added by amy for silent reset
2060 priv->ResetProgress = RESET_TYPE_NORESET;
2061 priv->bForcedSilentReset = 0;
2062 priv->bDisableNormalResetCheck = false;
2063 priv->force_reset = false;
2064 //added by amy for power save
ecdfa446
GKH		 2065 priv->ieee80211->RfOffReason = 0;
2066 priv->RFChangeInProgress = false;
2067 priv->bHwRfOffAction = 0;
2068 priv->SetRFPowerStateInProgress = false;
2069 priv->ieee80211->PowerSaveControl.bInactivePs = true;
2070 priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
ecdfa446
GKH		 2071
2072 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2073 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2074 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2075 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2076 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
2077 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
2078
2079 priv->ieee80211->active_scan = 1;
2080 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
2081 priv->ieee80211->host_encrypt = 1;
2082 priv->ieee80211->host_decrypt = 1;
2083 //priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
2084 //priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
2085 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
2086 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
2087 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
2088 priv->ieee80211->set_chan = rtl8192_set_chan;
2089 priv->ieee80211->link_change = rtl8192_link_change;
2090 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
2091 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
2092 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
2093 priv->ieee80211->init_wmmparam_flag = 0;
2094 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2095 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
2096 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2097 priv->ieee80211->qos_support = 1;
2098 priv->ieee80211->dot11PowerSaveMode = 0;
2099 //added by WB
2100// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
2101 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
2102 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
2103 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
2104
2105 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
2106// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
2107 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
2108 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
2109 //added by david
2110 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
2111 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
2112 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
2113
2114 //added by amy
2115 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
2116
65a43784 2117#ifdef ENABLE_IPS
2118 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
2119 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
2120#endif
2121#ifdef ENABLE_LPS
2122 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
16d74da0 2123#endif
65a43784 2124
2125 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
2126 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
2127
395aa640
MM		 2128 priv->ShortRetryLimit = 0x30;
2129 priv->LongRetryLimit = 0x30;
ecdfa446
GKH		 2130
2131 priv->ReceiveConfig = RCR_ADD3 |
2132 RCR_AMF | RCR_ADF | //accept management/data
2133 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
2134 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
2135 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2136 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2137
207b58fb
MM		 2138 priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
2139 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
2140 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
ecdfa446
GKH		 2141 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2142
5b84cc78 2143 priv->pFirmware = vzalloc(sizeof(rt_firmware));
ecdfa446
GKH		 2144
2145 /* rx related queue */
ecdfa446
GKH		 2146 skb_queue_head_init(&priv->skb_queue);
2147
2148 /* Tx related queue */
2149 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2150 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
2151 }
2152 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2153 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
2154 }
2155 priv->rf_set_chan = rtl8192_phy_SwChnl;
2156}
2157
ecdfa446
GKH		 2158static void rtl8192_init_priv_lock(struct r8192_priv* priv)
2159{
2160 spin_lock_init(&priv->tx_lock);
ecdfa446
GKH		 2161 spin_lock_init(&priv->irq_th_lock);
2162 spin_lock_init(&priv->rf_ps_lock);
2163 spin_lock_init(&priv->ps_lock);
ecdfa446
GKH		 2164 sema_init(&priv->wx_sem,1);
2165 sema_init(&priv->rf_sem,1);
ecdfa446 2166 mutex_init(&priv->mutex);
ecdfa446
GKH		 2167}
2168
214985a6 2169/* init tasklet and wait_queue here */
ecdfa446
GKH		 2170#define DRV_NAME "wlan0"
2171static void rtl8192_init_priv_task(struct net_device* dev)
2172{
2173 struct r8192_priv *priv = ieee80211_priv(dev);
2174
ecdfa446 2175 priv->priv_wq = create_workqueue(DRV_NAME);
ecdfa446 2176
65a43784 2177#ifdef ENABLE_IPS
80a4dead 2178 INIT_WORK(&priv->ieee80211->ips_leave_wq, IPSLeave_wq);
65a43784 2179#endif
2180
ecdfa446
GKH		 2181// INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart);
2182 INIT_WORK(&priv->reset_wq, rtl8192_restart);
2183// INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
2184 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2185 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2186 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2187 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
2188 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
2189 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
2190 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
80a4dead
MM		 2191 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, rtl8192_hw_wakeup_wq);
2192 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq, rtl8192_hw_sleep_wq);
ecdfa446 2193
80a4dead
MM		 2194 tasklet_init(&priv->irq_rx_tasklet, rtl8192_irq_rx_tasklet,
2195 (unsigned long) priv);
2196 tasklet_init(&priv->irq_tx_tasklet, rtl8192_irq_tx_tasklet,
2197 (unsigned long) priv);
2198 tasklet_init(&priv->irq_prepare_beacon_tasklet, rtl8192_prepare_beacon,
2199 (unsigned long) priv);
ecdfa446
GKH		 2200}
2201
2202static void rtl8192_get_eeprom_size(struct net_device* dev)
2203{
2204 u16 curCR = 0;
2205 struct r8192_priv *priv = ieee80211_priv(dev);
2206 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
3f9ab1ee 2207 curCR = read_nic_dword(priv, EPROM_CMD);
ecdfa446
GKH		 2208 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2209 //whether need I consider BIT5?
2210 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2211 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2212}
2213
ecdfa446 2214/*
214985a6
MM		 2215 * Adapter->EEPROMAddressSize should be set before this function call.
2216 * EEPROM address size can be got through GetEEPROMSize8185()
2217 */
3f9ab1ee 2218static void rtl8192_read_eeprom_info(struct r8192_priv *priv)
ecdfa446 2219{
3f9ab1ee 2220 struct net_device *dev = priv->ieee80211->dev;
ecdfa446 2221 u8 tempval;
ecdfa446 2222 u8 ICVer8192, ICVer8256;
ecdfa446
GKH		 2223 u16 i,usValue, IC_Version;
2224 u16 EEPROMId;
ecdfa446
GKH		 2225 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2226 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2227
2228
2229 // TODO: I don't know if we need to apply EF function to EEPROM read function
2230
2231 //2 Read EEPROM ID to make sure autoload is success
2232 EEPROMId = eprom_read(dev, 0);
2233 if( EEPROMId != RTL8190_EEPROM_ID )
2234 {
2235 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2236 priv->AutoloadFailFlag=true;
2237 }
2238 else
2239 {
2240 priv->AutoloadFailFlag=false;
2241 }
2242
2243 //
2244 // Assign Chip Version ID
2245 //
2246 // Read IC Version && Channel Plan
2247 if(!priv->AutoloadFailFlag)
2248 {
2249 // VID, PID
2250 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
2251 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
2252
2253 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2254 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2255 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
2256 priv->eeprom_ChannelPlan = usValue&0xff;
2257 IC_Version = ((usValue&0xff00)>>8);
2258
ecdfa446
GKH		 2259 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2260 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2261 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
2262 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
2263 if(ICVer8192 == 0x2) //B-cut
2264 {
2265 if(ICVer8256 == 0x5) //E-cut
2266 priv->card_8192_version= VERSION_8190_BE;
2267 }
4803ef77 2268
ecdfa446
GKH		 2269 switch(priv->card_8192_version)
2270 {
2271 case VERSION_8190_BD:
2272 case VERSION_8190_BE:
2273 break;
2274 default:
2275 priv->card_8192_version = VERSION_8190_BD;
2276 break;
2277 }
2278 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2279 }
2280 else
2281 {
2282 priv->card_8192_version = VERSION_8190_BD;
2283 priv->eeprom_vid = 0;
2284 priv->eeprom_did = 0;
2285 priv->eeprom_CustomerID = 0;
2286 priv->eeprom_ChannelPlan = 0;
2287 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
2288 }
2289
2290 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2291 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2292 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2293
2294 //2 Read Permanent MAC address
2295 if(!priv->AutoloadFailFlag)
2296 {
2297 for(i = 0; i < 6; i += 2)
2298 {
2299 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2300 *(u16*)(&dev->dev_addr[i]) = usValue;
2301 }
2302 } else {
2303 // when auto load failed, the last address byte set to be a random one.
2304 // added by david woo.2007/11/7
2305 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2306 }
2307
820793c3 2308 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
ecdfa446
GKH		 2309
2310 //2 TX Power Check EEPROM Fail or not
2311 if(priv->card_8192_version > VERSION_8190_BD) {
2312 priv->bTXPowerDataReadFromEEPORM = true;
2313 } else {
2314 priv->bTXPowerDataReadFromEEPORM = false;
2315 }
2316
bbc9a991 2317 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
ecdfa446
GKH		 2318 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2319
2320 if(priv->card_8192_version > VERSION_8190_BD)
2321 {
2322 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2323 if(!priv->AutoloadFailFlag)
2324 {
2325 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2326 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2327
2328 if (tempval&0x80) //RF-indication, bit[7]
2329 priv->rf_type = RF_1T2R;
2330 else
2331 priv->rf_type = RF_2T4R;
2332 }
2333 else
2334 {
2335 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2336 }
2337 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2338 priv->EEPROMLegacyHTTxPowerDiff);
2339
2340 // Read ThermalMeter from EEPROM
2341 if(!priv->AutoloadFailFlag)
2342 {
2343 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2344 }
2345 else
2346 {
2347 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2348 }
2349 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2350 //vivi, for tx power track
2351 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2352
2353 if(priv->epromtype == EPROM_93c46)
2354 {
2355 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2356 if(!priv->AutoloadFailFlag)
2357 {
2358 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
2359 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2360 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2361 }
2362 else
2363 {
2364 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2365 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2366 }
2367 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2368 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2369
2370 //
2371 // Get per-channel Tx Power Level
2372 //
2373 for(i=0; i<14; i+=2)
2374 {
2375 if(!priv->AutoloadFailFlag)
2376 {
2377 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2378 }
2379 else
2380 {
2381 usValue = EEPROM_Default_TxPower;
2382 }
2383 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2384 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2385 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2386 }
2387 for(i=0; i<14; i+=2)
2388 {
2389 if(!priv->AutoloadFailFlag)
2390 {
2391 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2392 }
2393 else
2394 {
2395 usValue = EEPROM_Default_TxPower;
2396 }
2397 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2398 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2399 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2400 }
2401 }
ecdfa446 2402
ecdfa446
GKH		 2403 //
2404 // Update HAL variables.
2405 //
2406 if(priv->epromtype == EPROM_93c46)
2407 {
2408 for(i=0; i<14; i++)
2409 {
2410 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2411 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2412 }
2413 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2414 // Antenna B gain offset to antenna A, bit0~3
2415 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2416 // Antenna C gain offset to antenna A, bit4~7
2417 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2418 // Antenna D gain offset to antenna A, bit8~11
2419 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2420 // CrystalCap, bit12~15
2421 priv->CrystalCap = priv->EEPROMCrystalCap;
2422 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2423 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2424 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2425 }
2426 else if(priv->epromtype == EPROM_93c56)
2427 {
2428 //char cck_pwr_diff_a=0, cck_pwr_diff_c=0;
2429
2430 //cck_pwr_diff_a = pHalData->EEPROMRfACCKChnl7TxPwLevel - pHalData->EEPROMRfAOfdmChnlTxPwLevel[1];
2431 //cck_pwr_diff_c = pHalData->EEPROMRfCCCKChnl7TxPwLevel - pHalData->EEPROMRfCOfdmChnlTxPwLevel[1];
2432 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2433 {
2434 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2435 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2436 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2437 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2438 }
2439 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2440 {
2441 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2442 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2443 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2444 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2445 }
2446 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2447 {
2448 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2449 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2450 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2451 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2452 }
2453 for(i=0; i<14; i++)
2454 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2455 for(i=0; i<14; i++)
2456 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2457 for(i=0; i<14; i++)
2458 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2459 for(i=0; i<14; i++)
2460 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2461 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2462 priv->AntennaTxPwDiff[0] = 0;
2463 priv->AntennaTxPwDiff[1] = 0;
2464 priv->AntennaTxPwDiff[2] = 0;
2465 priv->CrystalCap = priv->EEPROMCrystalCap;
2466 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2467 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2468 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2469 }
2470 }
2471
2472 if(priv->rf_type == RF_1T2R)
2473 {
2474 RT_TRACE(COMP_INIT, "\n1T2R config\n");
2475 }
2476 else if (priv->rf_type == RF_2T4R)
2477 {
2478 RT_TRACE(COMP_INIT, "\n2T4R config\n");
2479 }
2480
2481 // 2008/01/16 MH We can only know RF type in the function. So we have to init
2482 // DIG RATR table again.
2483 init_rate_adaptive(dev);
2484
2485 //1 Make a copy for following variables and we can change them if we want
2486
2487 priv->rf_chip= RF_8256;
2488
2489 if(priv->RegChannelPlan == 0xf)
2490 {
2491 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2492 }
2493 else
2494 {
2495 priv->ChannelPlan = priv->RegChannelPlan;
2496 }
2497
2498 //
2499 // Used PID and DID to Set CustomerID
2500 //
2501 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2502 {
2503 priv->CustomerID = RT_CID_DLINK;
2504 }
2505
2506 switch(priv->eeprom_CustomerID)
2507 {
2508 case EEPROM_CID_DEFAULT:
2509 priv->CustomerID = RT_CID_DEFAULT;
2510 break;
2511 case EEPROM_CID_CAMEO:
2512 priv->CustomerID = RT_CID_819x_CAMEO;
2513 break;
2514 case EEPROM_CID_RUNTOP:
2515 priv->CustomerID = RT_CID_819x_RUNTOP;
2516 break;
2517 case EEPROM_CID_NetCore:
2518 priv->CustomerID = RT_CID_819x_Netcore;
2519 break;
2520 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2521 priv->CustomerID = RT_CID_TOSHIBA;
2522 if(priv->eeprom_ChannelPlan&0x80)
2523 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2524 else
2525 priv->ChannelPlan = 0x0;
2526 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2527 priv->ChannelPlan);
2528 break;
2529 case EEPROM_CID_Nettronix:
ecdfa446
GKH		 2530 priv->CustomerID = RT_CID_Nettronix;
2531 break;
2532 case EEPROM_CID_Pronet:
2533 priv->CustomerID = RT_CID_PRONET;
2534 break;
2535 case EEPROM_CID_DLINK:
2536 priv->CustomerID = RT_CID_DLINK;
2537 break;
2538
2539 case EEPROM_CID_WHQL:
2540 //Adapter->bInHctTest = TRUE;//do not supported
2541
2542 //priv->bSupportTurboMode = FALSE;
2543 //priv->bAutoTurboBy8186 = FALSE;
2544
2545 //pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
2546 //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
2547 //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
2548
2549 break;
2550 default:
2551 // value from RegCustomerID
2552 break;
2553 }
2554
2555 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2556 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2557 priv->ChannelPlan = 0; //FCC
2558
2559 switch(priv->CustomerID)
2560 {
2561 case RT_CID_DEFAULT:
ecdfa446 2562 priv->LedStrategy = SW_LED_MODE1;
ecdfa446
GKH		 2563 break;
2564
2565 case RT_CID_819x_CAMEO:
2566 priv->LedStrategy = SW_LED_MODE2;
2567 break;
2568
2569 case RT_CID_819x_RUNTOP:
2570 priv->LedStrategy = SW_LED_MODE3;
2571 break;
2572
2573 case RT_CID_819x_Netcore:
2574 priv->LedStrategy = SW_LED_MODE4;
2575 break;
2576
2577 case RT_CID_Nettronix:
2578 priv->LedStrategy = SW_LED_MODE5;
2579 break;
2580
2581 case RT_CID_PRONET:
2582 priv->LedStrategy = SW_LED_MODE6;
2583 break;
2584
2585 case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
2586 // Do nothing.
2587 //break;
2588
2589 default:
ecdfa446 2590 priv->LedStrategy = SW_LED_MODE1;
ecdfa446
GKH		 2591 break;
2592 }
65a43784 2593
2594
ecdfa446 2595 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
65a43784 2596 priv->ieee80211->bSupportRemoteWakeUp = true;
ecdfa446 2597 else
65a43784 2598 priv->ieee80211->bSupportRemoteWakeUp = false;
2599
2600
ecdfa446
GKH		 2601 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
2602 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
2603 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
2604 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
2605
2606 return ;
2607}
2608
2609
5e1ad18a 2610static short rtl8192_get_channel_map(struct net_device * dev)
ecdfa446
GKH		 2611{
2612 struct r8192_priv *priv = ieee80211_priv(dev);
2613#ifdef ENABLE_DOT11D
2614 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2615 printk("rtl8180_init:Error channel plan! Set to default.\n");
2616 priv->ChannelPlan= 0;
2617 }
2618 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2619
2620 rtl819x_set_channel_map(priv->ChannelPlan, priv);
2621#else
2622 int ch,i;
2623 //Set Default Channel Plan
2624 if(!channels){
2625 DMESG("No channels, aborting");
2626 return -1;
2627 }
2628 ch=channels;
2629 priv->ChannelPlan= 0;//hikaru
2630 // set channels 1..14 allowed in given locale
2631 for (i=1; i<=14; i++) {
2632 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2633 ch >>= 1;
2634 }
2635#endif
2636 return 0;
2637}
5e1ad18a
GKH		 2638
2639static short rtl8192_init(struct net_device *dev)
ecdfa446
GKH		 2640{
2641 struct r8192_priv *priv = ieee80211_priv(dev);
2642 memset(&(priv->stats),0,sizeof(struct Stats));
2643 rtl8192_init_priv_variable(dev);
2644 rtl8192_init_priv_lock(priv);
2645 rtl8192_init_priv_task(dev);
2646 rtl8192_get_eeprom_size(dev);
3f9ab1ee 2647 rtl8192_read_eeprom_info(priv);
ecdfa446
GKH		 2648 rtl8192_get_channel_map(dev);
2649 init_hal_dm(dev);
2650 init_timer(&priv->watch_dog_timer);
2651 priv->watch_dog_timer.data = (unsigned long)dev;
2652 priv->watch_dog_timer.function = watch_dog_timer_callback;
7bb5e823 2653 if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED, dev->name, dev)) {
ecdfa446
GKH		 2654 printk("Error allocating IRQ %d",dev->irq);
2655 return -1;
2656 }else{
2657 priv->irq=dev->irq;
2658 printk("IRQ %d",dev->irq);
2659 }
2660 if(rtl8192_pci_initdescring(dev)!=0){
2661 printk("Endopoints initialization failed");
2662 return -1;
2663 }
2664
2665 //rtl8192_rx_enable(dev);
2666 //rtl8192_adapter_start(dev);
ecdfa446
GKH		 2667 return 0;
2668}
2669
214985a6
MM		 2670/*
2671 * Actually only set RRSR, RATR and BW_OPMODE registers
2672 * not to do all the hw config as its name says
2673 * This part need to modified according to the rate set we filtered
2674 */
5e1ad18a 2675static void rtl8192_hwconfig(struct net_device* dev)
ecdfa446
GKH		 2676{
2677 u32 regRATR = 0, regRRSR = 0;
2678 u8 regBwOpMode = 0, regTmp = 0;
2679 struct r8192_priv *priv = ieee80211_priv(dev);
2680
2681// Set RRSR, RATR, and BW_OPMODE registers
2682 //
2683 switch(priv->ieee80211->mode)
2684 {
2685 case WIRELESS_MODE_B:
2686 regBwOpMode = BW_OPMODE_20MHZ;
2687 regRATR = RATE_ALL_CCK;
2688 regRRSR = RATE_ALL_CCK;
2689 break;
2690 case WIRELESS_MODE_A:
2691 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
2692 regRATR = RATE_ALL_OFDM_AG;
2693 regRRSR = RATE_ALL_OFDM_AG;
2694 break;
2695 case WIRELESS_MODE_G:
2696 regBwOpMode = BW_OPMODE_20MHZ;
2697 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2698 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2699 break;
2700 case WIRELESS_MODE_AUTO:
2701 case WIRELESS_MODE_N_24G:
2702 // It support CCK rate by default.
2703 // CCK rate will be filtered out only when associated AP does not support it.
2704 regBwOpMode = BW_OPMODE_20MHZ;
2705 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2706 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2707 break;
2708 case WIRELESS_MODE_N_5G:
2709 regBwOpMode = BW_OPMODE_5G;
2710 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2711 regRRSR = RATE_ALL_OFDM_AG;
2712 break;
2713 }
2714
3f9ab1ee 2715 write_nic_byte(priv, BW_OPMODE, regBwOpMode);
ecdfa446
GKH		 2716 {
2717 u32 ratr_value = 0;
2718 ratr_value = regRATR;
2719 if (priv->rf_type == RF_1T2R)
2720 {
2721 ratr_value &= ~(RATE_ALL_OFDM_2SS);
2722 }
3f9ab1ee
MM		 2723 write_nic_dword(priv, RATR0, ratr_value);
2724 write_nic_byte(priv, UFWP, 1);
ecdfa446 2725 }
3f9ab1ee 2726 regTmp = read_nic_byte(priv, 0x313);
ecdfa446 2727 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3f9ab1ee 2728 write_nic_dword(priv, RRSR, regRRSR);
ecdfa446
GKH		 2729
2730 //
2731 // Set Retry Limit here
2732 //
3f9ab1ee 2733 write_nic_word(priv, RETRY_LIMIT,
207b58fb 2734 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
ecdfa446
GKH		 2735 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
2736 // Set Contention Window here
2737
2738 // Set Tx AGC
2739
2740 // Set Tx Antenna including Feedback control
2741
2742 // Set Auto Rate fallback control
2743
2744
2745}
2746
2747
5e1ad18a 2748static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
ecdfa446
GKH		 2749{
2750 struct r8192_priv *priv = ieee80211_priv(dev);
2751// struct ieee80211_device *ieee = priv->ieee80211;
2752 u32 ulRegRead;
2753 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
ecdfa446
GKH		 2754 //u8 eRFPath;
2755 u8 tmpvalue;
ecdfa446 2756 u8 ICVersion,SwitchingRegulatorOutput;
ecdfa446 2757 bool bfirmwareok = true;
ecdfa446
GKH		 2758 u32 tmpRegA, tmpRegC, TempCCk;
2759 int i =0;
ecdfa446
GKH		 2760
2761 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
2762 priv->being_init_adapter = true;
2763 rtl8192_pci_resetdescring(dev);
2764 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
2765 priv->Rf_Mode = RF_OP_By_SW_3wire;
4803ef77 2766
ecdfa446
GKH		 2767 //dPLL on
2768 if(priv->ResetProgress == RESET_TYPE_NORESET)
2769 {
3f9ab1ee 2770 write_nic_byte(priv, ANAPAR, 0x37);
ecdfa446
GKH		 2771 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
2772 // Joseph increae the time to prevent firmware download fail
2773 mdelay(500);
2774 }
4803ef77 2775
ecdfa446
GKH		 2776 //PlatformSleepUs(10000);
2777 // For any kind of InitializeAdapter process, we shall use system now!!
2778 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
2779
ecdfa446
GKH		 2780 //
2781 //3 //Config CPUReset Register
2782 //3//
2783 //3 Firmware Reset Or Not
3f9ab1ee 2784 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2785 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
2786 { //called from MPInitialized. do nothing
2787 ulRegRead |= CPU_GEN_SYSTEM_RESET;
2788 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
2789 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
2790 else
2791 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
2792
3f9ab1ee 2793 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446
GKH		 2794 //mdelay(100);
2795
ecdfa446
GKH		 2796 //3//
2797 //3 //Fix the issue of E-cut high temperature issue
2798 //3//
2799 // TODO: E cut only
3f9ab1ee 2800 ICVersion = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2801 if(ICVersion >= 0x4) //E-cut only
2802 {
2803 // HW SD suggest that we should not wirte this register too often, so driver
2804 // should readback this register. This register will be modified only when
2805 // power on reset
3f9ab1ee 2806 SwitchingRegulatorOutput = read_nic_byte(priv, SWREGULATOR);
ecdfa446
GKH		 2807 if(SwitchingRegulatorOutput != 0xb8)
2808 {
3f9ab1ee 2809 write_nic_byte(priv, SWREGULATOR, 0xa8);
ecdfa446 2810 mdelay(1);
3f9ab1ee 2811 write_nic_byte(priv, SWREGULATOR, 0xb8);
ecdfa446
GKH		 2812 }
2813 }
ecdfa446
GKH		 2814
2815 //3//
2816 //3// Initialize BB before MAC
2817 //3//
ecdfa446
GKH		 2818 RT_TRACE(COMP_INIT, "BB Config Start!\n");
2819 rtStatus = rtl8192_BBConfig(dev);
2820 if(rtStatus != RT_STATUS_SUCCESS)
2821 {
2822 RT_TRACE(COMP_ERR, "BB Config failed\n");
2823 return rtStatus;
2824 }
2825 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
2826
ecdfa446
GKH		 2827 //3//Set Loopback mode or Normal mode
2828 //3//
2829 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
2830 // because setting of System_Reset bit reset MAC to default transmission mode.
2831 //Loopback mode or not
2832 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
2833 //priv->LoopbackMode = RTL819X_MAC_LOOPBACK;
2834 if(priv->ResetProgress == RESET_TYPE_NORESET)
2835 {
3f9ab1ee 2836 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2837 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
2838 {
2839 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
2840 }
2841 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
2842 {
2843 ulRegRead |= CPU_CCK_LOOPBACK;
2844 }
2845 else
2846 {
2847 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
2848 }
2849
2850 //2008.06.03, for WOL
2851 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3f9ab1ee 2852 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446
GKH		 2853
2854 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
2855 udelay(500);
2856 }
2857 //3Set Hardware(Do nothing now)
2858 rtl8192_hwconfig(dev);
2859 //2=======================================================
2860 // Common Setting for all of the FPGA platform. (part 1)
2861 //2=======================================================
2862 // If there is changes, please make sure it applies to all of the FPGA version
2863 //3 Turn on Tx/Rx
3f9ab1ee 2864 write_nic_byte(priv, CMDR, CR_RE|CR_TE);
ecdfa446
GKH		 2865
2866 //2Set Tx dma burst
3f9ab1ee 2867 write_nic_byte(priv, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
ecdfa446 2868 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
4803ef77 2869
ecdfa446 2870 //set IDR0 here
3f9ab1ee
MM		 2871 write_nic_dword(priv, MAC0, ((u32*)dev->dev_addr)[0]);
2872 write_nic_word(priv, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
ecdfa446 2873 //set RCR
3f9ab1ee 2874 write_nic_dword(priv, RCR, priv->ReceiveConfig);
ecdfa446
GKH		 2875
2876 //3 Initialize Number of Reserved Pages in Firmware Queue
2877 #ifdef TO_DO_LIST
2878 if(priv->bInHctTest)
2879 {
207b58fb
MM		 2880 PlatformEFIOWrite4Byte(Adapter, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
2881 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
2882 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446
GKH		 2883 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
2884 PlatformEFIOWrite4Byte(Adapter, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
207b58fb
MM		 2885 PlatformEFIOWrite4Byte(Adapter, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
2886 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 2887 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
2888 }
2889 else
2890 #endif
2891 {
3f9ab1ee 2892 write_nic_dword(priv, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
207b58fb
MM		 2893 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
2894 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446 2895 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3f9ab1ee
MM		 2896 write_nic_dword(priv, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
2897 write_nic_dword(priv, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
207b58fb 2898 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 2899 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
2900 }
2901
2902 rtl8192_tx_enable(dev);
2903 rtl8192_rx_enable(dev);
2904 //3Set Response Rate Setting Register
2905 // CCK rate is supported by default.
2906 // CCK rate will be filtered out only when associated AP does not support it.
3f9ab1ee
MM		 2907 ulRegRead = (0xFFF00000 & read_nic_dword(priv, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
2908 write_nic_dword(priv, RRSR, ulRegRead);
2909 write_nic_dword(priv, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
ecdfa446
GKH		 2910
2911 //2Set AckTimeout
2912 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3f9ab1ee 2913 write_nic_byte(priv, ACK_TIMEOUT, 0x30);
ecdfa446
GKH		 2914
2915 //rtl8192_actset_wirelessmode(dev,priv->RegWirelessMode);
2916 if(priv->ResetProgress == RESET_TYPE_NORESET)
2917 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
2918 //-----------------------------------------------------------------------------
2919 // Set up security related. 070106, by rcnjko:
2920 // 1. Clear all H/W keys.
2921 // 2. Enable H/W encryption/decryption.
2922 //-----------------------------------------------------------------------------
2923 CamResetAllEntry(dev);
2924 {
2925 u8 SECR_value = 0x0;
2926 SECR_value |= SCR_TxEncEnable;
2927 SECR_value |= SCR_RxDecEnable;
2928 SECR_value |= SCR_NoSKMC;
3f9ab1ee 2929 write_nic_byte(priv, SECR, SECR_value);
ecdfa446
GKH		 2930 }
2931 //3Beacon related
3f9ab1ee
MM		 2932 write_nic_word(priv, ATIMWND, 2);
2933 write_nic_word(priv, BCN_INTERVAL, 100);
5e1ad18a 2934 for (i=0; i<QOS_QUEUE_NUM; i++)
3f9ab1ee 2935 write_nic_dword(priv, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 2936 //
2937 // Switching regulator controller: This is set temporarily.
2938 // It's not sure if this can be removed in the future.
2939 // PJ advised to leave it by default.
2940 //
3f9ab1ee 2941 write_nic_byte(priv, 0xbe, 0xc0);
ecdfa446
GKH		 2942
2943 //2=======================================================
2944 // Set PHY related configuration defined in MAC register bank
2945 //2=======================================================
2946 rtl8192_phy_configmac(dev);
2947
2948 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
2949 rtl8192_phy_getTxPower(dev);
2950 rtl8192_phy_setTxPower(dev, priv->chan);
2951 }
2952
2953 //if D or C cut
3f9ab1ee 2954 tmpvalue = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2955 priv->IC_Cut = tmpvalue;
2956 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
2957 if(priv->IC_Cut >= IC_VersionCut_D)
2958 {
2959 //pHalData->bDcut = TRUE;
2960 if(priv->IC_Cut == IC_VersionCut_D)
2961 RT_TRACE(COMP_INIT, "D-cut\n");
2962 if(priv->IC_Cut == IC_VersionCut_E)
2963 {
2964 RT_TRACE(COMP_INIT, "E-cut\n");
2965 // HW SD suggest that we should not wirte this register too often, so driver
2966 // should readback this register. This register will be modified only when
2967 // power on reset
2968 }
2969 }
2970 else
2971 {
2972 //pHalData->bDcut = FALSE;
2973 RT_TRACE(COMP_INIT, "Before C-cut\n");
2974 }
2975
ecdfa446
GKH		 2976 //Firmware download
2977 RT_TRACE(COMP_INIT, "Load Firmware!\n");
2978 bfirmwareok = init_firmware(dev);
2979 if(bfirmwareok != true) {
2980 rtStatus = RT_STATUS_FAILURE;
2981 return rtStatus;
2982 }
2983 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
11aacc28 2984
ecdfa446
GKH		 2985 //RF config
2986 if(priv->ResetProgress == RESET_TYPE_NORESET)
2987 {
2988 RT_TRACE(COMP_INIT, "RF Config Started!\n");
2989 rtStatus = rtl8192_phy_RFConfig(dev);
2990 if(rtStatus != RT_STATUS_SUCCESS)
2991 {
2992 RT_TRACE(COMP_ERR, "RF Config failed\n");
2993 return rtStatus;
2994 }
2995 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
2996 }
2997 rtl8192_phy_updateInitGain(dev);
2998
2999 /*---- Set CCK and OFDM Block "ON"----*/
3000 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
3001 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
3002
ecdfa446 3003 //Enable Led
3f9ab1ee 3004 write_nic_byte(priv, 0x87, 0x0);
ecdfa446
GKH		 3005
3006 //2=======================================================
3007 // RF Power Save
3008 //2=======================================================
3009#ifdef ENABLE_IPS
3010
3011{
0157a2b9 3012 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
ecdfa446
GKH		 3013 { // H/W or S/W RF OFF before sleep.
3014 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3015 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3016 }
3017 else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
3018 { // H/W or S/W RF OFF before sleep.
3019 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3020 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3021 }
3022 else
3023 {
3024 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
3025 priv->ieee80211->eRFPowerState = eRfOn;
3026 priv->ieee80211->RfOffReason = 0;
3027 //DrvIFIndicateCurrentPhyStatus(Adapter);
3028 // LED control
3029 //Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_ON);
3030
3031 //
3032 // If inactive power mode is enabled, disable rf while in disconnected state.
3033 // But we should still tell upper layer we are in rf on state.
3034 // 2007.07.16, by shien chang.
3035 //
3036 //if(!Adapter->bInHctTest)
3037 //IPSEnter(Adapter);
3038
3039 }
3040}
3041#endif
4803ef77
MM		 3042 // We can force firmware to do RF-R/W
3043 if(priv->ieee80211->FwRWRF)
3044 priv->Rf_Mode = RF_OP_By_FW;
3045 else
3046 priv->Rf_Mode = RF_OP_By_SW_3wire;
ecdfa446 3047
ecdfa446
GKH		 3048 if(priv->ResetProgress == RESET_TYPE_NORESET)
3049 {
3050 dm_initialize_txpower_tracking(dev);
3051
3052 if(priv->IC_Cut >= IC_VersionCut_D)
3053 {
3054 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3055 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3056 for(i = 0; i<TxBBGainTableLength; i++)
3057 {
3058 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3059 {
3060 priv->rfa_txpowertrackingindex= (u8)i;
3061 priv->rfa_txpowertrackingindex_real= (u8)i;
3062 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3063 break;
3064 }
3065 }
3066
3067 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3068
3069 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3070 {
3071 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3072 {
3073 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3074 break;
3075 }
3076 }
3077 priv->CCKPresentAttentuation_40Mdefault = 0;
3078 priv->CCKPresentAttentuation_difference = 0;
3079 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3080 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3081 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3082 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3083 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3084 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
3085 }
3086 }
4803ef77 3087
ecdfa446
GKH		 3088 rtl8192_irq_enable(dev);
3089 priv->being_init_adapter = false;
3090 return rtStatus;
3091
3092}
3093
80a4dead 3094static void rtl8192_prepare_beacon(unsigned long arg)
ecdfa446 3095{
80a4dead 3096 struct r8192_priv *priv = (struct r8192_priv*) arg;
ecdfa446
GKH		 3097 struct sk_buff *skb;
3098 //unsigned long flags;
3099 cb_desc *tcb_desc;
3100
3101 skb = ieee80211_get_beacon(priv->ieee80211);
3102 tcb_desc = (cb_desc *)(skb->cb + 8);
ecdfa446
GKH		 3103 //spin_lock_irqsave(&priv->tx_lock,flags);
3104 /* prepare misc info for the beacon xmit */
3105 tcb_desc->queue_index = BEACON_QUEUE;
bbc9a991 3106 /* IBSS does not support HT yet, use 1M defaultly */
ecdfa446
GKH		 3107 tcb_desc->data_rate = 2;
3108 tcb_desc->RATRIndex = 7;
3109 tcb_desc->bTxDisableRateFallBack = 1;
3110 tcb_desc->bTxUseDriverAssingedRate = 1;
3111
3112 skb_push(skb, priv->ieee80211->tx_headroom);
3113 if(skb){
3114 rtl8192_tx(priv->ieee80211->dev,skb);
3115 }
3116 //spin_unlock_irqrestore (&priv->tx_lock, flags);
3117}
3118
ecdfa446 3119
214985a6
MM		 3120/*
3121 * configure registers for beacon tx and enables it via
ecdfa446
GKH		 3122 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
3123 * be used to stop beacon transmission
3124 */
559fba5e 3125static void rtl8192_start_beacon(struct net_device *dev)
ecdfa446
GKH		 3126{
3127 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3128 struct ieee80211_network *net = &priv->ieee80211->current_network;
3129 u16 BcnTimeCfg = 0;
3130 u16 BcnCW = 6;
3131 u16 BcnIFS = 0xf;
3132
3133 DMESG("Enabling beacon TX");
ecdfa446
GKH		 3134 rtl8192_irq_disable(dev);
3135 //rtl8192_beacon_tx_enable(dev);
3136
3137 /* ATIM window */
3f9ab1ee 3138 write_nic_word(priv, ATIMWND, 2);
ecdfa446
GKH		 3139
3140 /* Beacon interval (in unit of TU) */
3f9ab1ee 3141 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
ecdfa446
GKH		 3142
3143 /*
3144 * DrvErlyInt (in unit of TU).
3145 * (Time to send interrupt to notify driver to c
3146 * hange beacon content)
3147 * */
3f9ab1ee 3148 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
ecdfa446
GKH		 3149
3150 /*
3151 * BcnDMATIM(in unit of us).
3152 * Indicates the time before TBTT to perform beacon queue DMA
3153 * */
3f9ab1ee 3154 write_nic_word(priv, BCN_DMATIME, 256);
ecdfa446
GKH		 3155
3156 /*
3157 * Force beacon frame transmission even after receiving
3158 * beacon frame from other ad hoc STA
3159 * */
3f9ab1ee 3160 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 3161
3162 /* Set CW and IFS */
3163 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
3164 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 3165 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446
GKH		 3166
3167
3168 /* enable the interrupt for ad-hoc process */
3169 rtl8192_irq_enable(dev);
3170}
ecdfa446 3171
5e1ad18a 3172static bool HalTxCheckStuck8190Pci(struct net_device *dev)
ecdfa446 3173{
ecdfa446 3174 struct r8192_priv *priv = ieee80211_priv(dev);
3f9ab1ee 3175 u16 RegTxCounter = read_nic_word(priv, 0x128);
ecdfa446
GKH		 3176 bool bStuck = FALSE;
3177 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
3178 if(priv->TxCounter==RegTxCounter)
3179 bStuck = TRUE;
3180
3181 priv->TxCounter = RegTxCounter;
3182
3183 return bStuck;
3184}
3185
3186/*
214985a6
MM		 3187 * Assumption: RT_TX_SPINLOCK is acquired.
3188 */
5e1ad18a 3189static RESET_TYPE
ecdfa446
GKH		 3190TxCheckStuck(struct net_device *dev)
3191{
3192 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 3193 u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3194 bool bCheckFwTxCnt = false;
ecdfa446
GKH		 3195
3196 //
3197 // Decide Stuch threshold according to current power save mode
3198 //
ecdfa446
GKH		 3199 switch (priv->ieee80211->dot11PowerSaveMode)
3200 {
3201 // The threshold value may required to be adjusted .
3202 case eActive: // Active/Continuous access.
3203 ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
3204 break;
3205 case eMaxPs: // Max power save mode.
3206 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3207 break;
3208 case eFastPs: // Fast power save mode.
3209 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3210 break;
3211 }
3212
ecdfa446
GKH		 3213 if(bCheckFwTxCnt)
3214 {
3215 if(HalTxCheckStuck8190Pci(dev))
3216 {
3217 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
3218 return RESET_TYPE_SILENT;
3219 }
3220 }
11aacc28 3221
ecdfa446
GKH		 3222 return RESET_TYPE_NORESET;
3223}
3224
3225
5e1ad18a 3226static bool HalRxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3227{
3228 struct r8192_priv *priv = ieee80211_priv(dev);
3f9ab1ee 3229 u16 RegRxCounter = read_nic_word(priv, 0x130);
ecdfa446 3230 bool bStuck = FALSE;
935ce899 3231
ecdfa446
GKH		 3232 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
3233 // If rssi is small, we should check rx for long time because of bad rx.
3234 // or maybe it will continuous silent reset every 2 seconds.
935ce899 3235 priv->rx_chk_cnt++;
ecdfa446
GKH		 3236 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
3237 {
935ce899 3238 priv->rx_chk_cnt = 0; /* high rssi, check rx stuck right now. */
ecdfa446
GKH		 3239 }
3240 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
3241 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
3242 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
3243
3244 {
935ce899 3245 if(priv->rx_chk_cnt < 2)
ecdfa446
GKH		 3246 {
3247 return bStuck;
3248 }
3249 else
3250 {
935ce899 3251 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3252 }
3253 }
3254 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
3255 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
3256 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
3257 {
935ce899 3258 if(priv->rx_chk_cnt < 4)
ecdfa446 3259 {
ecdfa446
GKH		 3260 return bStuck;
3261 }
3262 else
3263 {
935ce899 3264 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3265 }
3266 }
3267 else
3268 {
935ce899 3269 if(priv->rx_chk_cnt < 8)
ecdfa446 3270 {
ecdfa446
GKH		 3271 return bStuck;
3272 }
3273 else
3274 {
935ce899 3275 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3276 }
3277 }
ecdfa446
GKH		 3278 if(priv->RxCounter==RegRxCounter)
3279 bStuck = TRUE;
3280
3281 priv->RxCounter = RegRxCounter;
3282
3283 return bStuck;
3284}
3285
5e1ad18a 3286static RESET_TYPE RxCheckStuck(struct net_device *dev)
ecdfa446
GKH		 3287{
3288
3289 if(HalRxCheckStuck8190Pci(dev))
3290 {
3291 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
3292 return RESET_TYPE_SILENT;
3293 }
3294
3295 return RESET_TYPE_NORESET;
3296}
3297
5e1ad18a 3298static RESET_TYPE
ecdfa446
GKH		 3299rtl819x_ifcheck_resetornot(struct net_device *dev)
3300{
3301 struct r8192_priv *priv = ieee80211_priv(dev);
3302 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
3303 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
3304 RT_RF_POWER_STATE rfState;
3305
3306 rfState = priv->ieee80211->eRFPowerState;
3307
3308 TxResetType = TxCheckStuck(dev);
11aacc28 3309
ecdfa446
GKH		 3310 if( rfState != eRfOff &&
3311 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
3312 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
3313 {
3314 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
3315 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
3316 // if driver is in firmware download failure status, driver should initialize RF in the following
3317 // silent reset procedure Emily, 2008.01.21
3318
3319 // Driver should not check RX stuck in IBSS mode because it is required to
3320 // set Check BSSID in order to send beacon, however, if check BSSID is
3321 // set, STA cannot hear any packet a all. Emily, 2008.04.12
3322 RxResetType = RxCheckStuck(dev);
3323 }
ecdfa446
GKH		 3324
3325 RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
3326 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
3327 return RESET_TYPE_NORMAL;
3328 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
3329 return RESET_TYPE_SILENT;
3330 else
3331 return RESET_TYPE_NORESET;
3332
3333}
3334
3335
5e1ad18a 3336static void CamRestoreAllEntry(struct net_device *dev)
ecdfa446
GKH		 3337{
3338 u8 EntryId = 0;
3339 struct r8192_priv *priv = ieee80211_priv(dev);
881a975b 3340 const u8* MacAddr = priv->ieee80211->current_network.bssid;
ecdfa446 3341
881a975b 3342 static const u8 CAM_CONST_ADDR[4][6] = {
ecdfa446
GKH		 3343 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
3344 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
3345 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
3346 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
881a975b 3347 static const u8 CAM_CONST_BROAD[] =
ecdfa446
GKH		 3348 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
3349
3350 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
3351
3352
3353 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
3354 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
3355 {
3356
3357 for(EntryId=0; EntryId<4; EntryId++)
3358 {
3359 {
3360 MacAddr = CAM_CONST_ADDR[EntryId];
3361 setKey(dev,
3362 EntryId ,
3363 EntryId,
3364 priv->ieee80211->pairwise_key_type,
3365 MacAddr,
3366 0,
3367 NULL);
3368 }
3369 }
3370
3371 }
3372 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
3373 {
3374
3375 {
3376 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3377 setKey(dev,
3378 4,
3379 0,
3380 priv->ieee80211->pairwise_key_type,
3381 (u8*)dev->dev_addr,
3382 0,
3383 NULL);
3384 else
3385 setKey(dev,
3386 4,
3387 0,
3388 priv->ieee80211->pairwise_key_type,
3389 MacAddr,
3390 0,
3391 NULL);
3392 }
3393 }
3394 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
3395 {
3396
3397 {
3398 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3399 setKey(dev,
3400 4,
3401 0,
3402 priv->ieee80211->pairwise_key_type,
3403 (u8*)dev->dev_addr,
3404 0,
3405 NULL);
3406 else
3407 setKey(dev,
3408 4,
3409 0,
3410 priv->ieee80211->pairwise_key_type,
3411 MacAddr,
3412 0,
3413 NULL);
3414 }
3415 }
3416
3417
3418
3419 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
3420 {
3421 MacAddr = CAM_CONST_BROAD;
3422 for(EntryId=1 ; EntryId<4 ; EntryId++)
3423 {
3424 {
3425 setKey(dev,
3426 EntryId,
3427 EntryId,
3428 priv->ieee80211->group_key_type,
3429 MacAddr,
3430 0,
3431 NULL);
3432 }
3433 }
3434 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3435 setKey(dev,
3436 0,
3437 0,
3438 priv->ieee80211->group_key_type,
3439 CAM_CONST_ADDR[0],
3440 0,
3441 NULL);
3442 }
3443 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
3444 {
3445 MacAddr = CAM_CONST_BROAD;
3446 for(EntryId=1; EntryId<4 ; EntryId++)
3447 {
3448 {
3449 setKey(dev,
3450 EntryId ,
3451 EntryId,
3452 priv->ieee80211->group_key_type,
3453 MacAddr,
3454 0,
3455 NULL);
3456 }
3457 }
3458
3459 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3460 setKey(dev,
3461 0 ,
3462 0,
3463 priv->ieee80211->group_key_type,
3464 CAM_CONST_ADDR[0],
3465 0,
3466 NULL);
3467 }
3468}
3469
ecdfa446
GKH		 3470/*
3471 * This function is used to fix Tx/Rx stop bug temporarily.
3472 * This function will do "system reset" to NIC when Tx or Rx is stuck.
3473 * The method checking Tx/Rx stuck of this function is supported by FW,
3474 * which reports Tx and Rx counter to register 0x128 and 0x130.
214985a6 3475 */
5e1ad18a 3476static void rtl819x_ifsilentreset(struct net_device *dev)
ecdfa446
GKH		 3477{
3478 struct r8192_priv *priv = ieee80211_priv(dev);
3479 u8 reset_times = 0;
3480 int reset_status = 0;
3481 struct ieee80211_device *ieee = priv->ieee80211;
3482
3483
65a43784 3484 return;
3485
ecdfa446
GKH		 3486 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
3487 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
3488
3489 if(priv->ResetProgress==RESET_TYPE_NORESET)
3490 {
3491RESET_START:
65a43784 3492#ifdef ENABLE_LPS
3493 //LZM for PS-Poll AID issue. 090429
3494 if(priv->ieee80211->state == IEEE80211_LINKED)
3495 LeisurePSLeave(dev);
3496#endif
ecdfa446
GKH		 3497
3498 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
3499
3500 // Set the variable for reset.
3501 priv->ResetProgress = RESET_TYPE_SILENT;
3502// rtl8192_close(dev);
11aacc28 3503
ecdfa446
GKH		 3504 down(&priv->wx_sem);
3505 if(priv->up == 0)
3506 {
3507 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
3508 up(&priv->wx_sem);
3509 return ;
3510 }
3511 priv->up = 0;
3512 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
3513 if(!netif_queue_stopped(dev))
3514 netif_stop_queue(dev);
3515
3516 dm_backup_dynamic_mechanism_state(dev);
3517
3518 rtl8192_irq_disable(dev);
3519 rtl8192_cancel_deferred_work(priv);
3520 deinit_hal_dm(dev);
3521 del_timer_sync(&priv->watch_dog_timer);
3522 ieee->sync_scan_hurryup = 1;
3523 if(ieee->state == IEEE80211_LINKED)
3524 {
3525 down(&ieee->wx_sem);
3526 printk("ieee->state is IEEE80211_LINKED\n");
3527 ieee80211_stop_send_beacons(priv->ieee80211);
3528 del_timer_sync(&ieee->associate_timer);
ecdfa446 3529 cancel_delayed_work(&ieee->associate_retry_wq);
ecdfa446 3530 ieee80211_stop_scan(ieee);
ecdfa446
GKH		 3531 up(&ieee->wx_sem);
3532 }
3533 else{
3534 printk("ieee->state is NOT LINKED\n");
65a43784 3535 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446 3536 }
65a43784 3537 rtl8192_halt_adapter(dev, true);
ecdfa446
GKH		 3538 up(&priv->wx_sem);
3539 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
3540 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
3541 reset_status = _rtl8192_up(dev);
3542
3543 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
3544 if(reset_status == -1)
3545 {
3546 if(reset_times < 3)
3547 {
3548 reset_times++;
3549 goto RESET_START;
3550 }
3551 else
3552 {
3553 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__FUNCTION__);
3554 }
3555 }
ecdfa446 3556 ieee->is_silent_reset = 1;
ecdfa446 3557 EnableHWSecurityConfig8192(dev);
ecdfa446
GKH		 3558 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
3559 {
3560 ieee->set_chan(ieee->dev, ieee->current_network.channel);
3561
ecdfa446 3562 queue_work(ieee->wq, &ieee->associate_complete_wq);
ecdfa446
GKH		 3563
3564 }
3565 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
3566 {
3567 ieee->set_chan(ieee->dev, ieee->current_network.channel);
3568 ieee->link_change(ieee->dev);
3569
3570 // notify_wx_assoc_event(ieee);
3571
3572 ieee80211_start_send_beacons(ieee);
3573
3574 if (ieee->data_hard_resume)
3575 ieee->data_hard_resume(ieee->dev);
3576 netif_carrier_on(ieee->dev);
3577 }
ecdfa446
GKH		 3578
3579 CamRestoreAllEntry(dev);
3580
3581 // Restore the previous setting for all dynamic mechanism
3582 dm_restore_dynamic_mechanism_state(dev);
3583
3584 priv->ResetProgress = RESET_TYPE_NORESET;
3585 priv->reset_count++;
3586
3587 priv->bForcedSilentReset =false;
3588 priv->bResetInProgress = false;
3589
3590 // For test --> force write UFWP.
3f9ab1ee 3591 write_nic_byte(priv, UFWP, 1);
ecdfa446 3592 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
ecdfa446
GKH		 3593 }
3594}
3595
3596#ifdef ENABLE_IPS
3597void InactivePsWorkItemCallback(struct net_device *dev)
3598{
3599 struct r8192_priv *priv = ieee80211_priv(dev);
3600 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
ecdfa446
GKH		 3601
3602 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n");
3603 //
3604 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
3605 // is really scheduled.
3606 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
3607 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
3608 // blocks the IPS procedure of switching RF.
3609 // By Bruce, 2007-12-25.
3610 //
3611 pPSC->bSwRfProcessing = TRUE;
3612
207b58fb 3613 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
ecdfa446
GKH		 3614 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
3615
3616
3617 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
3618
3619 //
3620 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
3621 //
ecdfa446
GKH		 3622 pPSC->bSwRfProcessing = FALSE;
3623 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n");
3624}
3625
65a43784 3626#ifdef ENABLE_LPS
214985a6 3627/* Change current and default preamble mode. */
65a43784 3628bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode)
3629{
3630 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 3631
3632 // Currently, we do not change power save mode on IBSS mode.
3633 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3634 {
3635 return false;
3636 }
3637
3638 //
3639 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
3640 // some AP will not response to our mgnt frames with PwrMgt bit set,
3641 // e.g. cannot associate the AP.
3642 // So I commented out it. 2005.02.16, by rcnjko.
3643 //
3644// // Change device's power save mode.
3645// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
3646
3647 // Update power save mode configured.
3648 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
3649 if(!priv->ps_force) {
3650 priv->ieee80211->ps = rtPsMode;
3651 }
3652
3653 // Awake immediately
3654 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
3655 {
3656 unsigned long flags;
3657
3658 //PlatformSetTimer(Adapter, &(pMgntInfo->AwakeTimer), 0);
3659 // Notify the AP we awke.
3660 rtl8192_hw_wakeup(dev);
3661 priv->ieee80211->sta_sleep = 0;
3662
3663 spin_lock_irqsave(&(priv->ieee80211->mgmt_tx_lock), flags);
3664 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
3665 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
3666 spin_unlock_irqrestore(&(priv->ieee80211->mgmt_tx_lock), flags);
3667 }
3668
3669 return true;
3670}
3671
214985a6 3672/* Enter the leisure power save mode. */
65a43784 3673void LeisurePSEnter(struct net_device *dev)
3674{
3675 struct r8192_priv *priv = ieee80211_priv(dev);
3676 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3677
3678 //RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
3679 //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
3680 // pPSC->bLeisurePs, priv->ieee80211->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD);
3681
3682 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
3683 (priv->ieee80211->state == IEEE80211_LINKED)) ||
3684 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
3685 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
3686 return;
3687
3688 if (pPSC->bLeisurePs)
3689 {
3690 // Idle for a while if we connect to AP a while ago.
3691 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
3692 {
3693
3694 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3695 {
3696
3697 //RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n");
3698 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
3699
3700 }
3701 }
3702 else
3703 pPSC->LpsIdleCount++;
3704 }
3705}
3706
3707
214985a6 3708/* Leave leisure power save mode. */
65a43784 3709void LeisurePSLeave(struct net_device *dev)
3710{
3711 struct r8192_priv *priv = ieee80211_priv(dev);
3712 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3713
65a43784 3714 if (pPSC->bLeisurePs)
3715 {
3716 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3717 {
3718 // move to lps_wakecomplete()
3719 //RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
3720 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED);
3721
3722 }
3723 }
3724}
3725#endif
3726
3727
214985a6 3728/* Enter the inactive power save mode. RF will be off */
ecdfa446
GKH		 3729void
3730IPSEnter(struct net_device *dev)
3731{
3732 struct r8192_priv *priv = ieee80211_priv(dev);
3733 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3734 RT_RF_POWER_STATE rtState;
3735
3736 if (pPSC->bInactivePs)
3737 {
3738 rtState = priv->ieee80211->eRFPowerState;
3739 //
3740 // Added by Bruce, 2007-12-25.
3741 // Do not enter IPS in the following conditions:
3742 // (1) RF is already OFF or Sleep
3743 // (2) bSwRfProcessing (indicates the IPS is still under going)
3744 // (3) Connectted (only disconnected can trigger IPS)
3745 // (4) IBSS (send Beacon)
3746 // (5) AP mode (send Beacon)
3747 //
3748 if (rtState == eRfOn && !pPSC->bSwRfProcessing
3749 && (priv->ieee80211->state != IEEE80211_LINKED) )
3750 {
3751 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
3752 pPSC->eInactivePowerState = eRfOff;
3753// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
3754 InactivePsWorkItemCallback(dev);
3755 }
3756 }
3757}
3758
3759//
3760// Description:
3761// Leave the inactive power save mode, RF will be on.
3762// 2007.08.17, by shien chang.
3763//
3764void
3765IPSLeave(struct net_device *dev)
3766{
3767 struct r8192_priv *priv = ieee80211_priv(dev);
3768 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3769 RT_RF_POWER_STATE rtState;
3770
3771 if (pPSC->bInactivePs)
3772 {
3773 rtState = priv->ieee80211->eRFPowerState;
3774 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
3775 {
3776 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
3777 pPSC->eInactivePowerState = eRfOn;
3778// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
3779 InactivePsWorkItemCallback(dev);
3780 }
3781 }
3782}
65a43784 3783
80a4dead 3784void IPSLeave_wq(struct work_struct *work)
65a43784 3785{
80a4dead 3786 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ips_leave_wq);
65a43784 3787 struct net_device *dev = ieee->dev;
3788
3789 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3790 down(&priv->ieee80211->ips_sem);
3791 IPSLeave(dev);
3792 up(&priv->ieee80211->ips_sem);
3793}
3794
3795void ieee80211_ips_leave_wq(struct net_device *dev)
3796{
3797 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3798 RT_RF_POWER_STATE rtState;
3799 rtState = priv->ieee80211->eRFPowerState;
3800
3801 if(priv->ieee80211->PowerSaveControl.bInactivePs){
3802 if(rtState == eRfOff){
3803 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
3804 {
3805 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
3806 return;
3807 }
3808 else{
3809 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
3810 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
3811 }
3812 }
3813 }
3814}
3815//added by amy 090331 end
3816void ieee80211_ips_leave(struct net_device *dev)
3817{
3818 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3819 down(&priv->ieee80211->ips_sem);
3820 IPSLeave(dev);
3821 up(&priv->ieee80211->ips_sem);
3822}
ecdfa446 3823#endif
ecdfa446 3824
5e1ad18a 3825static void rtl819x_update_rxcounts(
ecdfa446
GKH		 3826 struct r8192_priv *priv,
3827 u32* TotalRxBcnNum,
3828 u32* TotalRxDataNum
3829)
3830{
3831 u16 SlotIndex;
3832 u8 i;
3833
3834 *TotalRxBcnNum = 0;
3835 *TotalRxDataNum = 0;
3836
3837 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
3838 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
3839 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
3840 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
3841 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
3842 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
3843 }
3844}
3845
3846
559fba5e 3847static void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 3848{
3849 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3850 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
3851 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 3852 struct ieee80211_device* ieee = priv->ieee80211;
3853 RESET_TYPE ResetType = RESET_TYPE_NORESET;
ecdfa446
GKH		 3854 unsigned long flags;
3855 bool bBusyTraffic = false;
65a43784 3856 bool bEnterPS = false;
3857
f500e256 3858 if ((!priv->up) || priv->bHwRadioOff)
65a43784 3859 return;
3860
ecdfa446
GKH		 3861 if(!priv->up)
3862 return;
3863 hal_dm_watchdog(dev);
3864#ifdef ENABLE_IPS
ecdfa446 3865 if(ieee->actscanning == false){
207b58fb
MM		 3866 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
3867 (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&
65a43784 3868 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
ecdfa446 3869 if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
ecdfa446
GKH		 3870 IPSEnter(dev);
3871 //ieee80211_stop_scan(priv->ieee80211);
3872 }
3873 }
3874 }
3875#endif
3876 {//to get busy traffic condition
3877 if(ieee->state == IEEE80211_LINKED)
3878 {
65a43784 3879 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
3880 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
ecdfa446
GKH		 3881 bBusyTraffic = true;
3882 }
3883
65a43784 3884#ifdef ENABLE_LPS
3885 //added by amy for Leisure PS
3886 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
3887 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
3888 {
65a43784 3889 bEnterPS= false;
3890 }
3891 else
3892 {
3893 bEnterPS= true;
3894 }
3895
65a43784 3896 // LeisurePS only work in infra mode.
3897 if(bEnterPS)
3898 {
3899 LeisurePSEnter(dev);
3900 }
3901 else
3902 {
3903 LeisurePSLeave(dev);
3904 }
3905#endif
3906
3907 }
3908 else
3909 {
3910#ifdef ENABLE_LPS
3911 //RT_TRACE(COMP_LPS,"====>no link LPS leave\n");
3912 LeisurePSLeave(dev);
3913#endif
ecdfa446 3914 }
65a43784 3915
ecdfa446
GKH		 3916 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
3917 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
65a43784 3918 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
ecdfa446
GKH		 3919 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
3920 }
3921
3922
3923 //added by amy for AP roaming
3924 if (1)
3925 {
3926 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
3927 {
3928 u32 TotalRxBcnNum = 0;
3929 u32 TotalRxDataNum = 0;
3930
3931 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
3932 if((TotalRxBcnNum+TotalRxDataNum) == 0)
3933 {
3934 if( ieee->eRFPowerState == eRfOff)
3935 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
3936 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
65a43784 3937 // Dot11d_Reset(dev);
ecdfa446
GKH		 3938 ieee->state = IEEE80211_ASSOCIATING;
3939 notify_wx_assoc_event(priv->ieee80211);
65a43784 3940 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
ecdfa446
GKH		 3941 ieee->is_roaming = true;
3942 ieee->is_set_key = false;
65a43784 3943 ieee->link_change(dev);
3944 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 3945 }
3946 }
3947 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
3948 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
3949
3950 }
ecdfa446
GKH		 3951 //check if reset the driver
3952 spin_lock_irqsave(&priv->tx_lock,flags);
d5fdaa3a
MM		 3953 if (priv->watchdog_check_reset_cnt++ >= 3 && !ieee->is_roaming &&
3954 priv->watchdog_last_time != 1)
ecdfa446
GKH		 3955 {
3956 ResetType = rtl819x_ifcheck_resetornot(dev);
d5fdaa3a 3957 priv->watchdog_check_reset_cnt = 3;
ecdfa446
GKH		 3958 }
3959 spin_unlock_irqrestore(&priv->tx_lock,flags);
3960 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
3961 {
3962 priv->ResetProgress = RESET_TYPE_NORMAL;
3963 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
3964 return;
3965 }
3966 /* disable silent reset temply 2008.9.11*/
11aacc28 3967
ecdfa446
GKH		 3968 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
3969 {
d5fdaa3a 3970 priv->watchdog_last_time = 1;
ecdfa446
GKH		 3971 rtl819x_ifsilentreset(dev);
3972 }
3973 else
d5fdaa3a 3974 priv->watchdog_last_time = 0;
11aacc28 3975
ecdfa446
GKH		 3976 priv->force_reset = false;
3977 priv->bForcedSilentReset = false;
3978 priv->bResetInProgress = false;
3979 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
3980
3981}
3982
3983void watch_dog_timer_callback(unsigned long data)
3984{
3985 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
ecdfa446 3986 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 3987 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
3988
3989}
5b3b1a7b
MM		 3990
3991static int _rtl8192_up(struct net_device *dev)
ecdfa446
GKH		 3992{
3993 struct r8192_priv *priv = ieee80211_priv(dev);
3994 //int i;
3995 RT_STATUS init_status = RT_STATUS_SUCCESS;
3996 priv->up=1;
3997 priv->ieee80211->ieee_up=1;
65a43784 3998 priv->bdisable_nic = false; //YJ,add,091111
ecdfa446
GKH		 3999 RT_TRACE(COMP_INIT, "Bringing up iface");
4000
4001 init_status = rtl8192_adapter_start(dev);
4002 if(init_status != RT_STATUS_SUCCESS)
4003 {
4004 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
4005 return -1;
4006 }
4007 RT_TRACE(COMP_INIT, "start adapter finished\n");
4803ef77 4008
ecdfa446
GKH		 4009 if(priv->ieee80211->eRFPowerState!=eRfOn)
4010 MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
4803ef77 4011
ecdfa446
GKH		 4012 if(priv->ieee80211->state != IEEE80211_LINKED)
4013 ieee80211_softmac_start_protocol(priv->ieee80211);
4014 ieee80211_reset_queue(priv->ieee80211);
4015 watch_dog_timer_callback((unsigned long) dev);
4016 if(!netif_queue_stopped(dev))
4017 netif_start_queue(dev);
4018 else
4019 netif_wake_queue(dev);
4020
4021 return 0;
4022}
4023
4024
5e1ad18a 4025static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 4026{
4027 struct r8192_priv *priv = ieee80211_priv(dev);
4028 int ret;
4029
4030 down(&priv->wx_sem);
4031 ret = rtl8192_up(dev);
4032 up(&priv->wx_sem);
4033 return ret;
4034
4035}
4036
4037
4038int rtl8192_up(struct net_device *dev)
4039{
4040 struct r8192_priv *priv = ieee80211_priv(dev);
4041
4042 if (priv->up == 1) return -1;
4043
4044 return _rtl8192_up(dev);
4045}
4046
4047
5e1ad18a 4048static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 4049{
4050 struct r8192_priv *priv = ieee80211_priv(dev);
4051 int ret;
4052
4053 down(&priv->wx_sem);
4054
4055 ret = rtl8192_down(dev);
4056
4057 up(&priv->wx_sem);
4058
4059 return ret;
4060
4061}
4062
4063int rtl8192_down(struct net_device *dev)
4064{
4065 struct r8192_priv *priv = ieee80211_priv(dev);
16d74da0 4066
ecdfa446
GKH		 4067 if (priv->up == 0) return -1;
4068
65a43784 4069#ifdef ENABLE_LPS
4070 //LZM for PS-Poll AID issue. 090429
4071 if(priv->ieee80211->state == IEEE80211_LINKED)
4072 LeisurePSLeave(dev);
4073#endif
4074
ecdfa446
GKH		 4075 priv->up=0;
4076 priv->ieee80211->ieee_up = 0;
4077 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
4078/* FIXME */
4079 if (!netif_queue_stopped(dev))
4080 netif_stop_queue(dev);
4081
4082 rtl8192_irq_disable(dev);
ecdfa446
GKH		 4083 rtl8192_cancel_deferred_work(priv);
4084 deinit_hal_dm(dev);
4085 del_timer_sync(&priv->watch_dog_timer);
4086
65a43784 4087 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
4088
4089 rtl8192_halt_adapter(dev,false);
ecdfa446
GKH		 4090 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
4091
4092 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
4093
16d74da0 4094 return 0;
ecdfa446
GKH		 4095}
4096
4097
4098void rtl8192_commit(struct net_device *dev)
4099{
4100 struct r8192_priv *priv = ieee80211_priv(dev);
4101
4102 if (priv->up == 0) return ;
4103
4104
65a43784 4105 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446
GKH		 4106
4107 rtl8192_irq_disable(dev);
65a43784 4108 rtl8192_halt_adapter(dev,true);
ecdfa446
GKH		 4109 _rtl8192_up(dev);
4110}
4111
5b3b1a7b 4112static void rtl8192_restart(struct work_struct *work)
ecdfa446
GKH		 4113{
4114 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
4115 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4116
4117 down(&priv->wx_sem);
4118
4119 rtl8192_commit(dev);
4120
4121 up(&priv->wx_sem);
4122}
4123
4124static void r8192_set_multicast(struct net_device *dev)
4125{
4126 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 4127
109ded2b 4128 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
ecdfa446
GKH		 4129}
4130
4131
5e1ad18a 4132static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 4133{
4134 struct r8192_priv *priv = ieee80211_priv(dev);
4135 struct sockaddr *addr = mac;
4136
4137 down(&priv->wx_sem);
4138
4139 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
4140
ecdfa446 4141 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 4142 up(&priv->wx_sem);
4143
4144 return 0;
4145}
4146
4147/* based on ipw2200 driver */
5e1ad18a 4148static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 4149{
4150 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4151 struct iwreq *wrq = (struct iwreq *)rq;
4152 int ret=-1;
4153 struct ieee80211_device *ieee = priv->ieee80211;
4154 u32 key[4];
4155 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
4156 struct iw_point *p = &wrq->u.data;
4157 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
4158
4159 down(&priv->wx_sem);
4160
4161
4162 if (p->length < sizeof(struct ieee_param) || !p->pointer){
4163 ret = -EINVAL;
4164 goto out;
4165 }
4166
32414878 4167 ipw = kmalloc(p->length, GFP_KERNEL);
ecdfa446
GKH		 4168 if (ipw == NULL){
4169 ret = -ENOMEM;
4170 goto out;
4171 }
4172 if (copy_from_user(ipw, p->pointer, p->length)) {
4173 kfree(ipw);
4174 ret = -EFAULT;
4175 goto out;
4176 }
4177
4178 switch (cmd) {
4179 case RTL_IOCTL_WPA_SUPPLICANT:
4180 //parse here for HW security
4181 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
4182 {
4183 if (ipw->u.crypt.set_tx)
4184 {
4185 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4186 ieee->pairwise_key_type = KEY_TYPE_CCMP;
4187 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4188 ieee->pairwise_key_type = KEY_TYPE_TKIP;
4189 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4190 {
4191 if (ipw->u.crypt.key_len == 13)
4192 ieee->pairwise_key_type = KEY_TYPE_WEP104;
4193 else if (ipw->u.crypt.key_len == 5)
4194 ieee->pairwise_key_type = KEY_TYPE_WEP40;
4195 }
4196 else
4197 ieee->pairwise_key_type = KEY_TYPE_NA;
4198
4199 if (ieee->pairwise_key_type)
4200 {
4201 memcpy((u8*)key, ipw->u.crypt.key, 16);
4202 EnableHWSecurityConfig8192(dev);
4203 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
4204 //added by WB.
4205 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4206 if (ieee->auth_mode != 2) //LEAP WEP will never set this.
4207 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4208 }
4209 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
3f9ab1ee 4210 write_nic_byte(priv, 0x173, 1); //fix aes bug
ecdfa446
GKH		 4211 }
4212
4213 }
4214 else //if (ipw->u.crypt.idx) //group key use idx > 0
4215 {
4216 memcpy((u8*)key, ipw->u.crypt.key, 16);
4217 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4218 ieee->group_key_type= KEY_TYPE_CCMP;
4219 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4220 ieee->group_key_type = KEY_TYPE_TKIP;
4221 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4222 {
4223 if (ipw->u.crypt.key_len == 13)
4224 ieee->group_key_type = KEY_TYPE_WEP104;
4225 else if (ipw->u.crypt.key_len == 5)
4226 ieee->group_key_type = KEY_TYPE_WEP40;
4227 }
4228 else
4229 ieee->group_key_type = KEY_TYPE_NA;
4230
4231 if (ieee->group_key_type)
4232 {
4233 setKey( dev,
4234 ipw->u.crypt.idx,
4235 ipw->u.crypt.idx, //KeyIndex
4236 ieee->group_key_type, //KeyType
4237 broadcast_addr, //MacAddr
4238 0, //DefaultKey
4239 key); //KeyContent
4240 }
4241 }
4242 }
ecdfa446
GKH		 4243 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
4244 break;
4245
4246 default:
4247 ret = -EOPNOTSUPP;
4248 break;
4249 }
4250
4251 kfree(ipw);
4252out:
4253 up(&priv->wx_sem);
4254
4255 return ret;
4256}
4257
5e1ad18a 4258static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 4259{
4260 u8 ret_rate = 0x02;
4261
4262 if(!bIsHT) {
4263 switch(rate) {
4264 case DESC90_RATE1M: ret_rate = MGN_1M; break;
4265 case DESC90_RATE2M: ret_rate = MGN_2M; break;
4266 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
4267 case DESC90_RATE11M: ret_rate = MGN_11M; break;
4268 case DESC90_RATE6M: ret_rate = MGN_6M; break;
4269 case DESC90_RATE9M: ret_rate = MGN_9M; break;
4270 case DESC90_RATE12M: ret_rate = MGN_12M; break;
4271 case DESC90_RATE18M: ret_rate = MGN_18M; break;
4272 case DESC90_RATE24M: ret_rate = MGN_24M; break;
4273 case DESC90_RATE36M: ret_rate = MGN_36M; break;
4274 case DESC90_RATE48M: ret_rate = MGN_48M; break;
4275 case DESC90_RATE54M: ret_rate = MGN_54M; break;
4276
4277 default:
4278 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
4279 break;
4280 }
4281
4282 } else {
4283 switch(rate) {
4284 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
4285 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
4286 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
4287 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
4288 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
4289 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
4290 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
4291 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
4292 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
4293 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
4294 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
4295 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
4296 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
4297 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
4298 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
4299 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
4300 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
4301
4302 default:
4303 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
4304 break;
4305 }
4306 }
4307
4308 return ret_rate;
4309}
4310
214985a6 4311/* Record the TSF time stamp when receiving a packet */
5e1ad18a 4312static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
ecdfa446
GKH		 4313{
4314 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4315
4316 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
4317 stats->mac_time[0] = priv->LastRxDescTSFLow;
4318 stats->mac_time[1] = priv->LastRxDescTSFHigh;
4319 } else {
4320 priv->LastRxDescTSFLow = stats->mac_time[0];
4321 priv->LastRxDescTSFHigh = stats->mac_time[1];
4322 }
4323}
4324
5e1ad18a 4325static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 4326{
4327 long signal_power; // in dBm.
4328
4329 // Translate to dBm (x=0.5y-95).
4330 signal_power = (long)((signal_strength_index + 1) >> 1);
4331 signal_power -= 95;
4332
4333 return signal_power;
4334}
4335
ecdfa446
GKH		 4336/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
4337 be a local static. Otherwise, it may increase when we return from S3/S4. The
4338 value will be kept in memory or disk. We must delcare the value in adapter
4339 and it will be reinitialized when return from S3/S4. */
5e1ad18a 4340static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 4341{
4342 bool bcheck = false;
4343 u8 rfpath;
4344 u32 nspatial_stream, tmp_val;
4345 //u8 i;
4346 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
4347 static u32 slide_evm_index=0, slide_evm_statistics=0;
4348 static u32 last_rssi=0, last_evm=0;
4349 //cosa add for rx path selection
4350// static long slide_cck_adc_pwdb_index=0, slide_cck_adc_pwdb_statistics=0;
4351// static char last_cck_adc_pwdb[4]={0,0,0,0};
4352 //cosa add for beacon rssi smoothing
4353 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
4354 static u32 last_beacon_adc_pwdb=0;
4355
4356 struct ieee80211_hdr_3addr *hdr;
4357 u16 sc ;
4358 unsigned int frag,seq;
4359 hdr = (struct ieee80211_hdr_3addr *)buffer;
4360 sc = le16_to_cpu(hdr->seq_ctl);
4361 frag = WLAN_GET_SEQ_FRAG(sc);
4362 seq = WLAN_GET_SEQ_SEQ(sc);
4363 //cosa add 04292008 to record the sequence number
4364 pcurrent_stats->Seq_Num = seq;
4365 //
4366 // Check whether we should take the previous packet into accounting
4367 //
4368 if(!pprevious_stats->bIsAMPDU)
4369 {
4370 // if previous packet is not aggregated packet
4371 bcheck = true;
ecdfa446
GKH		 4372 }
4373
4374 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
4375 {
4376 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
4377 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
4378 priv->stats.slide_rssi_total -= last_rssi;
4379 }
4380 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
4381
4382 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
4383 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
4384 slide_rssi_index = 0;
4385
4386 // <1> Showed on UI for user, in dbm
4387 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
4388 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
4389 pcurrent_stats->rssi = priv->stats.signal_strength;
4390 //
4391 // If the previous packet does not match the criteria, neglect it
4392 //
4393 if(!pprevious_stats->bPacketMatchBSSID)
4394 {
4395 if(!pprevious_stats->bToSelfBA)
4396 return;
4397 }
4398
4399 if(!bcheck)
4400 return;
4401
ecdfa446
GKH		 4402 // <2> Showed on UI for engineering
4403 // hardware does not provide rssi information for each rf path in CCK
4404 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
4405 {
4406 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
4407 {
4408 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
4409 continue;
4410 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
4411 //Fixed by Jacken 2008-03-20
4412 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
4413 {
4414 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
ecdfa446
GKH		 4415 }
4416 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
4417 {
4418 priv->stats.rx_rssi_percentage[rfpath] =
4419 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
4420 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
4421 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
4422 }
4423 else
4424 {
4425 priv->stats.rx_rssi_percentage[rfpath] =
4426 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
4427 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
4428 }
4429 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
4430 }
4431 }
4432
4433
4434 //
4435 // Check PWDB.
4436 //
4437 //cosa add for beacon rssi smoothing by average.
4438 if(pprevious_stats->bPacketBeacon)
4439 {
4440 /* record the beacon pwdb to the sliding window. */
4441 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
4442 {
4443 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
4444 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
4445 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
ecdfa446
GKH		 4446 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
4447 }
4448 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
4449 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
ecdfa446
GKH		 4450 slide_beacon_adc_pwdb_index++;
4451 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
4452 slide_beacon_adc_pwdb_index = 0;
4453 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
4454 if(pprevious_stats->RxPWDBAll >= 3)
4455 pprevious_stats->RxPWDBAll -= 3;
4456 }
4457
4458 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
4459 pprevious_stats->bIsCCK? "CCK": "OFDM",
4460 pprevious_stats->RxPWDBAll);
4461
4462 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
4463 {
4464 if(priv->undecorated_smoothed_pwdb < 0) // initialize
4465 {
4466 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
ecdfa446 4467 }
11aacc28 4468
ecdfa446
GKH		 4469 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
4470 {
4471 priv->undecorated_smoothed_pwdb =
4472 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
4473 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
4474 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
4475 }
4476 else
4477 {
4478 priv->undecorated_smoothed_pwdb =
4479 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
4480 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
4481 }
ecdfa446
GKH		 4482 }
4483
4484 //
4485 // Check EVM
4486 //
4487 /* record the general EVM to the sliding window. */
4488 if(pprevious_stats->SignalQuality == 0)
4489 {
4490 }
4491 else
4492 {
4493 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
4494 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
4495 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
4496 last_evm = priv->stats.slide_evm[slide_evm_index];
4497 priv->stats.slide_evm_total -= last_evm;
4498 }
4499
4500 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
4501
4502 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
4503 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
4504 slide_evm_index = 0;
4505
4506 // <1> Showed on UI for user, in percentage.
4507 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
ecdfa446 4508 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
ecdfa446
GKH		 4509 }
4510
4511 // <2> Showed on UI for engineering
4512 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
4513 {
4514 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
4515 {
4516 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
4517 {
4518 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
4519 {
4520 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
4521 }
4522 priv->stats.rx_evm_percentage[nspatial_stream] =
4523 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
4524 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
4525 }
4526 }
4527 }
4528 }
4529
4530}
4531
ecdfa446
GKH		 4532static u8 rtl819x_query_rxpwrpercentage(
4533 char antpower
4534 )
4535{
4536 if ((antpower <= -100) || (antpower >= 20))
4537 {
4538 return 0;
4539 }
4540 else if (antpower >= 0)
4541 {
4542 return 100;
4543 }
4544 else
4545 {
4546 return (100+antpower);
4547 }
4548
d5abdf72 4549}
ecdfa446
GKH		 4550
4551static u8
4552rtl819x_evm_dbtopercentage(
4553 char value
4554 )
4555{
4556 char ret_val;
4557
4558 ret_val = value;
4559
4560 if(ret_val >= 0)
4561 ret_val = 0;
4562 if(ret_val <= -33)
4563 ret_val = -33;
4564 ret_val = 0 - ret_val;
4565 ret_val*=3;
4566 if(ret_val == 99)
4567 ret_val = 100;
c6eae677 4568 return ret_val;
ecdfa446
GKH		 4569}
4570
214985a6 4571/* We want good-looking for signal strength/quality */
5e1ad18a 4572static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 4573{
4574 long retsig;
4575
4576 // Step 1. Scale mapping.
4577 if(currsig >= 61 && currsig <= 100)
4578 {
4579 retsig = 90 + ((currsig - 60) / 4);
4580 }
4581 else if(currsig >= 41 && currsig <= 60)
4582 {
4583 retsig = 78 + ((currsig - 40) / 2);
4584 }
4585 else if(currsig >= 31 && currsig <= 40)
4586 {
4587 retsig = 66 + (currsig - 30);
4588 }
4589 else if(currsig >= 21 && currsig <= 30)
4590 {
4591 retsig = 54 + (currsig - 20);
4592 }
4593 else if(currsig >= 5 && currsig <= 20)
4594 {
4595 retsig = 42 + (((currsig - 5) * 2) / 3);
4596 }
4597 else if(currsig == 4)
4598 {
4599 retsig = 36;
4600 }
4601 else if(currsig == 3)
4602 {
4603 retsig = 27;
4604 }
4605 else if(currsig == 2)
4606 {
4607 retsig = 18;
4608 }
4609 else if(currsig == 1)
4610 {
4611 retsig = 9;
4612 }
4613 else
4614 {
4615 retsig = currsig;
4616 }
4617
4618 return retsig;
4619}
4620
4621static void rtl8192_query_rxphystatus(
4622 struct r8192_priv * priv,
4623 struct ieee80211_rx_stats * pstats,
4624 prx_desc_819x_pci pdesc,
4625 prx_fwinfo_819x_pci pdrvinfo,
4626 struct ieee80211_rx_stats * precord_stats,
4627 bool bpacket_match_bssid,
4628 bool bpacket_toself,
4629 bool bPacketBeacon,
4630 bool bToSelfBA
4631 )
4632{
4633 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
4634 phy_sts_ofdm_819xpci_t* pofdm_buf;
4635 phy_sts_cck_819xpci_t * pcck_buf;
4636 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
4637 u8 *prxpkt;
4638 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
4639 char rx_pwr[4], rx_pwr_all=0;
4640 //long rx_avg_pwr = 0;
4641 char rx_snrX, rx_evmX;
4642 u8 evm, pwdb_all;
4643 u32 RSSI, total_rssi=0;//, total_evm=0;
4644// long signal_strength_index = 0;
4645 u8 is_cck_rate=0;
4646 u8 rf_rx_num = 0;
4647
ecdfa446
GKH		 4648 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
4649
4650 // Record it for next packet processing
4651 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
4652 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
4653 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
4654 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
4655 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
4656 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
4657 /*2007.08.30 requested by SD3 Jerry */
d163f324 4658 if (priv->phy_check_reg824 == 0)
ecdfa446 4659 {
d163f324
MM		 4660 priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
4661 priv->phy_check_reg824 = 1;
ecdfa446
GKH		 4662 }
4663
4664
4665 prxpkt = (u8*)pdrvinfo;
4666
4667 /* Move pointer to the 16th bytes. Phy status start address. */
4668 prxpkt += sizeof(rx_fwinfo_819x_pci);
4669
4670 /* Initial the cck and ofdm buffer pointer */
4671 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
4672 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
4673
4674 pstats->RxMIMOSignalQuality[0] = -1;
4675 pstats->RxMIMOSignalQuality[1] = -1;
4676 precord_stats->RxMIMOSignalQuality[0] = -1;
4677 precord_stats->RxMIMOSignalQuality[1] = -1;
4678
4679 if(is_cck_rate)
4680 {
4681 //
4682 // (1)Hardware does not provide RSSI for CCK
4683 //
4684
4685 //
4686 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4687 //
4688 u8 report;//, cck_agc_rpt;
ecdfa446 4689
d163f324 4690 if (!priv->phy_reg824_bit9)
ecdfa446
GKH		 4691 {
4692 report = pcck_buf->cck_agc_rpt & 0xc0;
4693 report = report>>6;
4694 switch(report)
4695 {
4696 //Fixed by Jacken from Bryant 2008-03-20
4697 //Original value is -38 , -26 , -14 , -2
4698 //Fixed value is -35 , -23 , -11 , 6
4699 case 0x3:
4700 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
4701 break;
4702 case 0x2:
4703 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
4704 break;
4705 case 0x1:
4706 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
4707 break;
4708 case 0x0:
4709 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
4710 break;
4711 }
4712 }
4713 else
4714 {
4715 report = pcck_buf->cck_agc_rpt & 0x60;
4716 report = report>>5;
4717 switch(report)
4718 {
4719 case 0x3:
4720 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4721 break;
4722 case 0x2:
4723 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
4724 break;
4725 case 0x1:
4726 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4727 break;
4728 case 0x0:
4729 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4730 break;
4731 }
4732 }
4733
4734 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4735 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4736 pstats->RecvSignalPower = rx_pwr_all;
4737
4738 //
4739 // (3) Get Signal Quality (EVM)
4740 //
4741 if(bpacket_match_bssid)
4742 {
4743 u8 sq;
4744
4745 if(pstats->RxPWDBAll > 40)
4746 {
4747 sq = 100;
4748 }else
4749 {
4750 sq = pcck_buf->sq_rpt;
4751
4752 if(pcck_buf->sq_rpt > 64)
4753 sq = 0;
4754 else if (pcck_buf->sq_rpt < 20)
4755 sq = 100;
4756 else
4757 sq = ((64-sq) * 100) / 44;
4758 }
4759 pstats->SignalQuality = precord_stats->SignalQuality = sq;
4760 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
4761 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
4762 }
4763 }
4764 else
4765 {
ecdfa446
GKH		 4766 //
4767 // (1)Get RSSI for HT rate
4768 //
4769 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4770 {
4771 // 2008/01/30 MH we will judge RF RX path now.
4772 if (priv->brfpath_rxenable[i])
4773 rf_rx_num++;
4774 //else
4775 //continue;
4776
4777 //Fixed by Jacken from Bryant 2008-03-20
4778 //Original value is 106
ecdfa446 4779 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
ecdfa446
GKH		 4780
4781 //Get Rx snr value in DB
4782 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
4783 rx_snrX = (char)(tmp_rxsnr);
4784 rx_snrX /= 2;
ecdfa446
GKH		 4785
4786 /* Translate DBM to percentage. */
4787 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
4788 if (priv->brfpath_rxenable[i])
4789 total_rssi += RSSI;
4790
4791 /* Record Signal Strength for next packet */
4792 if(bpacket_match_bssid)
4793 {
4794 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
4795 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
4796 }
4797 }
4798
4799
4800 //
4801 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4802 //
4803 //Fixed by Jacken from Bryant 2008-03-20
4804 //Original value is 106
4805 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
4806 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4807
4808 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4809 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
4810 pstats->RecvSignalPower = rx_pwr_all;
4811 //
4812 // (3)EVM of HT rate
4813 //
4814 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
4815 pdrvinfo->RxRate<=DESC90_RATEMCS15)
4816 max_spatial_stream = 2; //both spatial stream make sense
4817 else
4818 max_spatial_stream = 1; //only spatial stream 1 makes sense
4819
4820 for(i=0; i<max_spatial_stream; i++)
4821 {
4822 tmp_rxevm = pofdm_buf->rxevm_X[i];
4823 rx_evmX = (char)(tmp_rxevm);
4824
4825 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
4826 // fill most significant bit to "zero" when doing shifting operation which may change a negative
4827 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
4828 rx_evmX /= 2; //dbm
4829
4830 evm = rtl819x_evm_dbtopercentage(rx_evmX);
ecdfa446
GKH		 4831 if(bpacket_match_bssid)
4832 {
4833 if(i==0) // Fill value in RFD, Get the first spatial stream only
4834 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
4835 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
4836 }
4837 }
4838
4839
4840 /* record rx statistics for debug */
4841 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
4842 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
ecdfa446
GKH		 4843 }
4844
4845 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
4846 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
4847 if(is_cck_rate)
4848 {
4849 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
4850
4851 }
4852 else
4853 {
4854 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
4855 // We can judge RX path number now.
4856 if (rf_rx_num != 0)
4857 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
4858 }
d5abdf72 4859}
ecdfa446 4860
5e1ad18a 4861static void
ecdfa446
GKH		 4862rtl8192_record_rxdesc_forlateruse(
4863 struct ieee80211_rx_stats * psrc_stats,
4864 struct ieee80211_rx_stats * ptarget_stats
4865)
4866{
4867 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
4868 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
4869 //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
4870}
4871
4872
4873
5e1ad18a 4874static void TranslateRxSignalStuff819xpci(struct net_device *dev,
ecdfa446
GKH		 4875 struct sk_buff *skb,
4876 struct ieee80211_rx_stats * pstats,
4877 prx_desc_819x_pci pdesc,
4878 prx_fwinfo_819x_pci pdrvinfo)
4879{
4880 // TODO: We must only check packet for current MAC address. Not finish
4881 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4882 bool bpacket_match_bssid, bpacket_toself;
4883 bool bPacketBeacon=false, bToSelfBA=false;
ecdfa446
GKH		 4884 struct ieee80211_hdr_3addr *hdr;
4885 u16 fc,type;
4886
4887 // Get Signal Quality for only RX data queue (but not command queue)
4888
4889 u8* tmp_buf;
4890 u8 *praddr;
4891
4892 /* Get MAC frame start address. */
4893 tmp_buf = skb->data;
4894
4895 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
4896 fc = le16_to_cpu(hdr->frame_ctl);
4897 type = WLAN_FC_GET_TYPE(fc);
4898 praddr = hdr->addr1;
4899
4900 /* Check if the received packet is acceptabe. */
4901 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
03996954 4902 (!compare_ether_addr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
ecdfa446 4903 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
03996954 4904 bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr));
11aacc28 4905
ecdfa446
GKH		 4906 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
4907 {
4908 bPacketBeacon = true;
ecdfa446
GKH		 4909 }
4910 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
4911 {
03996954 4912 if((!compare_ether_addr(praddr,dev->dev_addr)))
ecdfa446 4913 bToSelfBA = true;
ecdfa446
GKH		 4914 }
4915
ecdfa446
GKH		 4916 //
4917 // Process PHY information for previous packet (RSSI/PWDB/EVM)
4918 //
4919 // Because phy information is contained in the last packet of AMPDU only, so driver
4920 // should process phy information of previous packet
83184e69
MM		 4921 rtl8192_process_phyinfo(priv, tmp_buf, &priv->previous_stats, pstats);
4922 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &priv->previous_stats, bpacket_match_bssid,
ecdfa446 4923 bpacket_toself ,bPacketBeacon, bToSelfBA);
83184e69 4924 rtl8192_record_rxdesc_forlateruse(pstats, &priv->previous_stats);
ecdfa446
GKH		 4925
4926}
4927
4928
5e1ad18a 4929static void rtl8192_tx_resume(struct net_device *dev)
ecdfa446
GKH		 4930{
4931 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4932 struct ieee80211_device *ieee = priv->ieee80211;
4933 struct sk_buff *skb;
4934 int queue_index;
4935
4936 for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
4937 while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
4938 (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
4939 /* 1. dequeue the packet from the wait queue */
4940 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
4941 /* 2. tx the packet directly */
4942 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
ecdfa446
GKH		 4943 }
4944 }
4945}
4946
80a4dead 4947static void rtl8192_irq_tx_tasklet(unsigned long arg)
ecdfa446 4948{
80a4dead 4949 struct r8192_priv *priv = (struct r8192_priv*) arg;
1348dc08
MM		 4950 struct rtl8192_tx_ring *mgnt_ring = &priv->tx_ring[MGNT_QUEUE];
4951 struct net_device *dev = priv->ieee80211->dev;
4952 unsigned long flags;
4953
4954 /* check if we need to report that the management queue is drained */
4955 spin_lock_irqsave(&priv->irq_th_lock, flags);
4956
4957 if (!skb_queue_len(&mgnt_ring->queue) &&
4958 priv->ieee80211->ack_tx_to_ieee &&
4959 rtl8192_is_tx_queue_empty(dev)) {
4960 priv->ieee80211->ack_tx_to_ieee = 0;
4961 ieee80211_ps_tx_ack(priv->ieee80211, 1);
4962 }
4963
4964 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4965
4966 rtl8192_tx_resume(dev);
ecdfa446
GKH		 4967}
4968
214985a6 4969/* Record the received data rate */
5e1ad18a 4970static void UpdateReceivedRateHistogramStatistics8190(
ecdfa446
GKH		 4971 struct net_device *dev,
4972 struct ieee80211_rx_stats* pstats
4973 )
4974{
4975 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4976 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
4977 u32 rateIndex;
4978 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
4979
ecdfa446
GKH		 4980 if(pstats->bCRC)
4981 rcvType = 2;
4982 else if(pstats->bICV)
4983 rcvType = 3;
4984
4985 if(pstats->bShortPreamble)
4986 preamble_guardinterval = 1;// short
4987 else
4988 preamble_guardinterval = 0;// long
4989
4990 switch(pstats->rate)
4991 {
4992 //
4993 // CCK rate
4994 //
4995 case MGN_1M: rateIndex = 0; break;
4996 case MGN_2M: rateIndex = 1; break;
4997 case MGN_5_5M: rateIndex = 2; break;
4998 case MGN_11M: rateIndex = 3; break;
4999 //
5000 // Legacy OFDM rate
5001 //
5002 case MGN_6M: rateIndex = 4; break;
5003 case MGN_9M: rateIndex = 5; break;
5004 case MGN_12M: rateIndex = 6; break;
5005 case MGN_18M: rateIndex = 7; break;
5006 case MGN_24M: rateIndex = 8; break;
5007 case MGN_36M: rateIndex = 9; break;
5008 case MGN_48M: rateIndex = 10; break;
5009 case MGN_54M: rateIndex = 11; break;
5010 //
5011 // 11n High throughput rate
5012 //
5013 case MGN_MCS0: rateIndex = 12; break;
5014 case MGN_MCS1: rateIndex = 13; break;
5015 case MGN_MCS2: rateIndex = 14; break;
5016 case MGN_MCS3: rateIndex = 15; break;
5017 case MGN_MCS4: rateIndex = 16; break;
5018 case MGN_MCS5: rateIndex = 17; break;
5019 case MGN_MCS6: rateIndex = 18; break;
5020 case MGN_MCS7: rateIndex = 19; break;
5021 case MGN_MCS8: rateIndex = 20; break;
5022 case MGN_MCS9: rateIndex = 21; break;
5023 case MGN_MCS10: rateIndex = 22; break;
5024 case MGN_MCS11: rateIndex = 23; break;
5025 case MGN_MCS12: rateIndex = 24; break;
5026 case MGN_MCS13: rateIndex = 25; break;
5027 case MGN_MCS14: rateIndex = 26; break;
5028 case MGN_MCS15: rateIndex = 27; break;
5029 default: rateIndex = 28; break;
5030 }
ecdfa446
GKH		 5031 priv->stats.received_rate_histogram[0][rateIndex]++; //total
5032 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
5033}
5034
5e1ad18a 5035static void rtl8192_rx(struct net_device *dev)
ecdfa446
GKH		 5036{
5037 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5038 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
5039 bool unicast_packet = false;
5040 struct ieee80211_rx_stats stats = {
5041 .signal = 0,
5042 .noise = -98,
5043 .rate = 0,
5044 .freq = IEEE80211_24GHZ_BAND,
5045 };
5046 unsigned int count = priv->rxringcount;
79b03af6
MM		 5047 prx_fwinfo_819x_pci pDrvInfo = NULL;
5048 struct sk_buff *new_skb;
ecdfa446 5049
ecdfa446
GKH		 5050 while (count--) {
5051 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
5052 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
5053
79b03af6 5054 if (pdesc->OWN)
ecdfa446
GKH		 5055 /* wait data to be filled by hardware */
5056 return;
79b03af6 5057
ecdfa446
GKH		 5058 stats.bICV = pdesc->ICV;
5059 stats.bCRC = pdesc->CRC32;
5060 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
5061
5062 stats.Length = pdesc->Length;
5063 if(stats.Length < 24)
5064 stats.bHwError |= 1;
5065
5066 if(stats.bHwError) {
5067 stats.bShift = false;
ecdfa446 5068 goto done;
79b03af6
MM		 5069 }
5070 pDrvInfo = NULL;
5071 new_skb = dev_alloc_skb(priv->rxbuffersize);
ecdfa446 5072
79b03af6 5073 if (unlikely(!new_skb))
ecdfa446 5074 goto done;
ecdfa446
GKH		 5075
5076 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
5077 stats.RxBufShift = ((pdesc->Shift)&0x03);
5078 stats.Decrypted = !pdesc->SWDec;
5079
ecdfa446 5080 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 5081 *((dma_addr_t *)skb->cb),
5082 priv->rxbuffersize,
5083 PCI_DMA_FROMDEVICE);
5084 skb_put(skb, pdesc->Length);
5085 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
5086 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
5087
5088 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
5089 stats.bShortPreamble = pDrvInfo->SPLCP;
5090
5091 /* it is debug only. It should be disabled in released driver.
5092 * 2007.1.11 by Emily
5093 * */
5094 UpdateReceivedRateHistogramStatistics8190(dev, &stats);
5095
5096 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
5097 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
5098
5099 stats.TimeStampLow = pDrvInfo->TSFL;
3f9ab1ee 5100 stats.TimeStampHigh = read_nic_dword(priv, TSFR+4);
ecdfa446
GKH		 5101
5102 UpdateRxPktTimeStamp8190(dev, &stats);
5103
5104 //
5105 // Get Total offset of MPDU Frame Body
5106 //
5107 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
5108 stats.bShift = 1;
5109
5110 stats.RxIs40MHzPacket = pDrvInfo->BW;
5111
5112 /* ???? */
5113 TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
5114
5115 /* Rx A-MPDU */
5116 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
5117 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
5118 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
5119 skb_trim(skb, skb->len - 4/*sCrcLng*/);
5120 /* rx packets statistics */
5121 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
5122 unicast_packet = false;
5123
5124 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
5125 //TODO
5126 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
5127 //TODO
5128 }else {
5129 /* unicast packet */
5130 unicast_packet = true;
5131 }
5132
5133 stats.packetlength = stats.Length-4;
5134 stats.fraglength = stats.packetlength;
5135 stats.fragoffset = 0;
5136 stats.ntotalfrag = 1;
5137
fb5fe277 5138 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
ecdfa446
GKH		 5139 dev_kfree_skb_any(skb);
5140 } else {
5141 priv->stats.rxok++;
5142 if(unicast_packet) {
5143 priv->stats.rxbytesunicast += skb->len;
5144 }
5145 }
5146
43f88d53
DL		 5147 pci_unmap_single(priv->pdev, *((dma_addr_t *) skb->cb),
5148 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
5149
ecdfa446
GKH		 5150 skb = new_skb;
5151 priv->rx_buf[priv->rx_idx] = skb;
1c7ec2e8 5152 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
ecdfa446 5153
ecdfa446
GKH		 5154done:
5155 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
5156 pdesc->OWN = 1;
5157 pdesc->Length = priv->rxbuffersize;
5158 if (priv->rx_idx == priv->rxringcount-1)
5159 pdesc->EOR = 1;
5160 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
5161 }
5162
5163}
5164
80a4dead 5165static void rtl8192_irq_rx_tasklet(unsigned long arg)
ecdfa446 5166{
80a4dead 5167 struct r8192_priv *priv = (struct r8192_priv*) arg;
ecdfa446
GKH		 5168 rtl8192_rx(priv->ieee80211->dev);
5169 /* unmask RDU */
3f9ab1ee 5170 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) | IMR_RDU);
ecdfa446
GKH		 5171}
5172
5173static const struct net_device_ops rtl8192_netdev_ops = {
5174 .ndo_open = rtl8192_open,
5175 .ndo_stop = rtl8192_close,
ecdfa446
GKH		 5176 .ndo_tx_timeout = tx_timeout,
5177 .ndo_do_ioctl = rtl8192_ioctl,
5178 .ndo_set_multicast_list = r8192_set_multicast,
5179 .ndo_set_mac_address = r8192_set_mac_adr,
fb5fe277 5180 .ndo_start_xmit = ieee80211_rtl_xmit,
ecdfa446
GKH		 5181};
5182
ecdfa446
GKH		 5183static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
5184 const struct pci_device_id *id)
5185{
5186 unsigned long ioaddr = 0;
5187 struct net_device *dev = NULL;
5188 struct r8192_priv *priv= NULL;
5189 u8 unit = 0;
3a8f2d3c 5190 int ret = -ENODEV;
ecdfa446
GKH		 5191
5192#ifdef CONFIG_RTL8192_IO_MAP
5193 unsigned long pio_start, pio_len, pio_flags;
5194#else
5195 unsigned long pmem_start, pmem_len, pmem_flags;
5196#endif //end #ifdef RTL_IO_MAP
5197
5198 RT_TRACE(COMP_INIT,"Configuring chip resources");
5199
5200 if( pci_enable_device (pdev) ){
5201 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
5202 return -EIO;
5203 }
5204
5205 pci_set_master(pdev);
5206 //pci_set_wmi(pdev);
5207 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 5208 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446 5209 dev = alloc_ieee80211(sizeof(struct r8192_priv));
3a8f2d3c
KV		 5210 if (!dev) {
5211 ret = -ENOMEM;
5212 goto fail_free;
5213 }
ecdfa446 5214
ecdfa446 5215 pci_set_drvdata(pdev, dev);
ecdfa446 5216 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 5217 priv = ieee80211_priv(dev);
ecdfa446 5218 priv->ieee80211 = netdev_priv(dev);
ecdfa446 5219 priv->pdev=pdev;
ecdfa446
GKH		 5220 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
5221 priv->ieee80211->bSupportRemoteWakeUp = 1;
5222 } else
ecdfa446
GKH		 5223 {
5224 priv->ieee80211->bSupportRemoteWakeUp = 0;
5225 }
5226
5227#ifdef CONFIG_RTL8192_IO_MAP
5228
5229 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5230 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5231 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5232
5233 if (!(pio_flags & IORESOURCE_IO)) {
5234 RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
5235 goto fail;
5236 }
5237
5238 //DMESG("IO space @ 0x%08lx", pio_start );
5239 if( ! request_region( pio_start, pio_len, RTL819xE_MODULE_NAME ) ){
5240 RT_TRACE(COMP_ERR,"request_region failed!");
5241 goto fail;
5242 }
5243
5244 ioaddr = pio_start;
5245 dev->base_addr = ioaddr; // device I/O address
5246
5247#else
5248
5249 pmem_start = pci_resource_start(pdev, 1);
5250 pmem_len = pci_resource_len(pdev, 1);
5251 pmem_flags = pci_resource_flags (pdev, 1);
5252
5253 if (!(pmem_flags & IORESOURCE_MEM)) {
5254 RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
5255 goto fail;
5256 }
5257
5258 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5259 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
5260 RT_TRACE(COMP_ERR,"request_mem_region failed!");
5261 goto fail;
5262 }
5263
5264
5265 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5266 if( ioaddr == (unsigned long)NULL ){
5267 RT_TRACE(COMP_ERR,"ioremap failed!");
5268 // release_mem_region( pmem_start, pmem_len );
5269 goto fail1;
5270 }
5271
5272 dev->mem_start = ioaddr; // shared mem start
5273 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5274
5275#endif //end #ifdef RTL_IO_MAP
5276
5277 /* We disable the RETRY_TIMEOUT register (0x41) to keep
5278 * PCI Tx retries from interfering with C3 CPU state */
5279 pci_write_config_byte(pdev, 0x41, 0x00);
5280
5281
5282 pci_read_config_byte(pdev, 0x05, &unit);
5283 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5284
5285 dev->irq = pdev->irq;
5286 priv->irq = 0;
5287
5288 dev->netdev_ops = &rtl8192_netdev_ops;
ecdfa446 5289
890a6850 5290 dev->wireless_handlers = &r8192_wx_handlers_def;
ecdfa446
GKH		 5291 dev->type=ARPHRD_ETHER;
5292
890a6850 5293 dev->watchdog_timeo = HZ*3;
ecdfa446
GKH		 5294
5295 if (dev_alloc_name(dev, ifname) < 0){
5296 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
dca41306 5297 strcpy(ifname, "wlan%d");
ecdfa446
GKH		 5298 dev_alloc_name(dev, ifname);
5299 }
5300
5301 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
5302 if(rtl8192_init(dev)!=0){
5303 RT_TRACE(COMP_ERR, "Initialization failed");
5304 goto fail;
5305 }
5306
ecdfa446
GKH		 5307 register_netdev(dev);
5308 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
5309 rtl8192_proc_init_one(dev);
5310
5311
5312 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 5313 return 0;
ecdfa446
GKH		 5314
5315fail1:
5316
5317#ifdef CONFIG_RTL8180_IO_MAP
5318
5319 if( dev->base_addr != 0 ){
5320
5321 release_region(dev->base_addr,
5322 pci_resource_len(pdev, 0) );
5323 }
5324#else
5325 if( dev->mem_start != (unsigned long)NULL ){
5326 iounmap( (void *)dev->mem_start );
5327 release_mem_region( pci_resource_start(pdev, 1),
5328 pci_resource_len(pdev, 1) );
5329 }
5330#endif //end #ifdef RTL_IO_MAP
5331
5332fail:
5333 if(dev){
5334
5335 if (priv->irq) {
5336 free_irq(dev->irq, dev);
5337 dev->irq=0;
5338 }
5339 free_ieee80211(dev);
5340 }
5341
3a8f2d3c 5342fail_free:
ecdfa446
GKH		 5343 pci_disable_device(pdev);
5344
5345 DMESG("wlan driver load failed\n");
5346 pci_set_drvdata(pdev, NULL);
3a8f2d3c 5347 return ret;
ecdfa446
GKH		 5348
5349}
5350
5351/* detach all the work and timer structure declared or inititialized
5352 * in r8192_init function.
5353 * */
5b3b1a7b 5354static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
ecdfa446
GKH		 5355{
5356 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
5357 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
5358 * Otherwise call cancel_delayed_work is enough.
39cfb97b 5359 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
ecdfa446 5360 * */
ecdfa446
GKH		 5361 cancel_delayed_work(&priv->watch_dog_wq);
5362 cancel_delayed_work(&priv->update_beacon_wq);
5363 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5364 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
ecdfa446 5365 cancel_delayed_work(&priv->gpio_change_rf_wq);
ecdfa446
GKH		 5366 cancel_work_sync(&priv->reset_wq);
5367 cancel_work_sync(&priv->qos_activate);
5368 //cancel_work_sync(&priv->SetBWModeWorkItem);
5369 //cancel_work_sync(&priv->SwChnlWorkItem);
ecdfa446
GKH		 5370
5371}
5372
5373
5374static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
5375{
5376 struct net_device *dev = pci_get_drvdata(pdev);
5377 struct r8192_priv *priv ;
5378
5379 if(dev){
5380
5381 unregister_netdev(dev);
5382
5383 priv=ieee80211_priv(dev);
5384
5385 rtl8192_proc_remove_one(dev);
5386
5387 rtl8192_down(dev);
5388 if (priv->pFirmware)
5389 {
5390 vfree(priv->pFirmware);
5391 priv->pFirmware = NULL;
5392 }
5393 // priv->rf_close(dev);
5394 // rtl8192_usb_deleteendpoints(dev);
ecdfa446 5395 destroy_workqueue(priv->priv_wq);
ecdfa446
GKH		 5396 /* redundant with rtl8192_down */
5397 // rtl8192_irq_disable(dev);
5398 // rtl8192_reset(dev);
5399 // mdelay(10);
5400 {
5401 u32 i;
5402 /* free tx/rx rings */
5403 rtl8192_free_rx_ring(dev);
5404 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
5405 rtl8192_free_tx_ring(dev, i);
5406 }
5407 }
5408 if(priv->irq){
5409
5410 printk("Freeing irq %d\n",dev->irq);
5411 free_irq(dev->irq, dev);
5412 priv->irq=0;
5413
5414 }
5415
ecdfa446
GKH		 5416#ifdef CONFIG_RTL8180_IO_MAP
5417
5418 if( dev->base_addr != 0 ){
5419
5420 release_region(dev->base_addr,
5421 pci_resource_len(pdev, 0) );
5422 }
5423#else
5424 if( dev->mem_start != (unsigned long)NULL ){
5425 iounmap( (void *)dev->mem_start );
5426 release_mem_region( pci_resource_start(pdev, 1),
5427 pci_resource_len(pdev, 1) );
5428 }
5429#endif /*end #ifdef RTL_IO_MAP*/
5430 free_ieee80211(dev);
5431
5432 }
5433
5434 pci_disable_device(pdev);
5435 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
5436}
5437
fb5fe277
GK		 5438extern int ieee80211_rtl_init(void);
5439extern void ieee80211_rtl_exit(void);
ecdfa446
GKH		 5440
5441static int __init rtl8192_pci_module_init(void)
5442{
5443 int retval;
5444
fb5fe277 5445 retval = ieee80211_rtl_init();
ecdfa446
GKH		 5446 if (retval)
5447 return retval;
5448
5449 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
5450 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
5451 RT_TRACE(COMP_INIT, "Initializing module");
ecdfa446 5452 rtl8192_proc_module_init();
ecdfa446 5453 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 5454 {
5455 DMESG("No device found");
5456 /*pci_unregister_driver (&rtl8192_pci_driver);*/
5457 return -ENODEV;
5458 }
5459 return 0;
5460}
5461
5462
5463static void __exit rtl8192_pci_module_exit(void)
5464{
5465 pci_unregister_driver(&rtl8192_pci_driver);
5466
5467 RT_TRACE(COMP_DOWN, "Exiting");
5468 rtl8192_proc_module_remove();
fb5fe277 5469 ieee80211_rtl_exit();
ecdfa446
GKH		 5470}
5471
559fba5e 5472static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446 5473{
b2cf8d48
MM		 5474 struct net_device *dev = (struct net_device *) netdev;
5475 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5476 unsigned long flags;
5477 u32 inta;
f8129a95
MM		 5478 irqreturn_t ret = IRQ_HANDLED;
5479
5480 spin_lock_irqsave(&priv->irq_th_lock, flags);
ecdfa446 5481
b2cf8d48
MM		 5482 /* We should return IRQ_NONE, but for now let me keep this */
5483 if (priv->irq_enabled == 0)
f8129a95 5484 goto out_unlock;
ecdfa446 5485
b2cf8d48 5486 /* ISR: 4bytes */
ecdfa446 5487
3f9ab1ee
MM		 5488 inta = read_nic_dword(priv, ISR); /* & priv->IntrMask; */
5489 write_nic_dword(priv, ISR, inta); /* reset int situation */
ecdfa446 5490
b2cf8d48 5491 if (!inta) {
b2cf8d48
MM		 5492 /*
5493 * most probably we can safely return IRQ_NONE,
5494 * but for now is better to avoid problems
5495 */
f8129a95 5496 goto out_unlock;
b2cf8d48 5497 }
ecdfa446 5498
b2cf8d48
MM		 5499 if (inta == 0xffff) {
5500 /* HW disappared */
f8129a95 5501 goto out_unlock;
b2cf8d48
MM		 5502 }
5503
f8129a95
MM		 5504 if (!netif_running(dev))
5505 goto out_unlock;
ecdfa446 5506
b2cf8d48
MM		 5507 if (inta & IMR_TBDOK) {
5508 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
5509 rtl8192_tx_isr(dev, BEACON_QUEUE);
5510 priv->stats.txbeaconokint++;
5511 }
ecdfa446 5512
b2cf8d48
MM		 5513 if (inta & IMR_TBDER) {
5514 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
5515 rtl8192_tx_isr(dev, BEACON_QUEUE);
5516 priv->stats.txbeaconerr++;
5517 }
ecdfa446 5518
b2cf8d48
MM		 5519 if (inta & IMR_MGNTDOK ) {
5520 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
5521 priv->stats.txmanageokint++;
5522 rtl8192_tx_isr(dev,MGNT_QUEUE);
5523 }
ecdfa446 5524
b2cf8d48
MM		 5525 if (inta & IMR_COMDOK)
5526 {
5527 priv->stats.txcmdpktokint++;
5528 rtl8192_tx_isr(dev, TXCMD_QUEUE);
5529 }
ecdfa446 5530
b2cf8d48 5531 if (inta & IMR_ROK) {
b2cf8d48
MM		 5532 priv->stats.rxint++;
5533 tasklet_schedule(&priv->irq_rx_tasklet);
5534 }
ecdfa446 5535
b2cf8d48
MM		 5536 if (inta & IMR_BcnInt) {
5537 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
5538 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
5539 }
ecdfa446 5540
b2cf8d48
MM		 5541 if (inta & IMR_RDU) {
5542 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
5543 priv->stats.rxrdu++;
5544 /* reset int situation */
3f9ab1ee 5545 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) & ~IMR_RDU);
b2cf8d48
MM		 5546 tasklet_schedule(&priv->irq_rx_tasklet);
5547 }
ecdfa446 5548
b2cf8d48
MM		 5549 if (inta & IMR_RXFOVW) {
5550 RT_TRACE(COMP_INTR, "rx overflow !\n");
5551 priv->stats.rxoverflow++;
5552 tasklet_schedule(&priv->irq_rx_tasklet);
5553 }
ecdfa446 5554
b2cf8d48
MM		 5555 if (inta & IMR_TXFOVW)
5556 priv->stats.txoverflow++;
ecdfa446 5557
b2cf8d48
MM		 5558 if (inta & IMR_BKDOK) {
5559 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
5560 priv->stats.txbkokint++;
5561 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5562 rtl8192_tx_isr(dev, BK_QUEUE);
5563 }
ecdfa446 5564
b2cf8d48
MM		 5565 if (inta & IMR_BEDOK) {
5566 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
5567 priv->stats.txbeokint++;
5568 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5569 rtl8192_tx_isr(dev, BE_QUEUE);
5570 }
ecdfa446 5571
b2cf8d48
MM		 5572 if (inta & IMR_VIDOK) {
5573 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
5574 priv->stats.txviokint++;
5575 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5576 rtl8192_tx_isr(dev, VI_QUEUE);
5577 }
ecdfa446 5578
b2cf8d48
MM		 5579 if (inta & IMR_VODOK) {
5580 priv->stats.txvookint++;
5581 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5582 rtl8192_tx_isr(dev, VO_QUEUE);
5583 }
ecdfa446 5584
f8129a95 5585out_unlock:
b2cf8d48 5586 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
ecdfa446 5587
f8129a95 5588 return ret;
ecdfa446
GKH		 5589}
5590
ecdfa446
GKH		 5591void EnableHWSecurityConfig8192(struct net_device *dev)
5592{
5593 u8 SECR_value = 0x0;
ecdfa446 5594 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
16d74da0
MM		 5595 struct ieee80211_device* ieee = priv->ieee80211;
5596
ecdfa446 5597 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
11aacc28 5598
ecdfa446
GKH		 5599 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
5600 {
5601 SECR_value |= SCR_RxUseDK;
5602 SECR_value |= SCR_TxUseDK;
5603 }
5604 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
5605 {
5606 SECR_value |= SCR_RxUseDK;
5607 SECR_value |= SCR_TxUseDK;
5608 }
5609
ecdfa446
GKH		 5610 //add HWSec active enable here.
5611//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
5612 ieee->hwsec_active = 1;
5613
5614 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
5615 {
5616 ieee->hwsec_active = 0;
5617 SECR_value &= ~SCR_RxDecEnable;
5618 }
5619
207b58fb 5620 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
ecdfa446
GKH		 5621 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
5622 {
3f9ab1ee 5623 write_nic_byte(priv, SECR, SECR_value);//SECR_value | SCR_UseDK );
ecdfa446
GKH		 5624 }
5625
5626}
5627#define TOTAL_CAM_ENTRY 32
5628//#define CAM_CONTENT_COUNT 8
5629void setKey( struct net_device *dev,
5630 u8 EntryNo,
5631 u8 KeyIndex,
5632 u16 KeyType,
881a975b 5633 const u8 *MacAddr,
ecdfa446
GKH		 5634 u8 DefaultKey,
5635 u32 *KeyContent )
5636{
5637 u32 TargetCommand = 0;
5638 u32 TargetContent = 0;
5639 u16 usConfig = 0;
5640 u8 i;
5641#ifdef ENABLE_IPS
5642 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5643 RT_RF_POWER_STATE rtState;
5644 rtState = priv->ieee80211->eRFPowerState;
5645 if(priv->ieee80211->PowerSaveControl.bInactivePs){
5646 if(rtState == eRfOff){
5647 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
5648 {
5649 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
65a43784 5650 //up(&priv->wx_sem);
ecdfa446
GKH		 5651 return ;
5652 }
5653 else{
65a43784 5654 down(&priv->ieee80211->ips_sem);
ecdfa446 5655 IPSLeave(dev);
65a43784 5656 up(&priv->ieee80211->ips_sem);
ecdfa446
GKH		 5657 }
5658 }
5659 }
5660 priv->ieee80211->is_set_key = true;
5661#endif
5662 if (EntryNo >= TOTAL_CAM_ENTRY)
5663 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
5664
0ee9f67c 5665 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
ecdfa446
GKH		 5666
5667 if (DefaultKey)
5668 usConfig |= BIT15 | (KeyType<<2);
5669 else
5670 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
5671// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
5672
5673
5674 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
5675 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
5676 TargetCommand |= BIT31|BIT16;
5677
5678 if(i==0){//MAC|Config
5679 TargetContent = (u32)(*(MacAddr+0)) << 16|
5680 (u32)(*(MacAddr+1)) << 24|
5681 (u32)usConfig;
5682
3f9ab1ee
MM		 5683 write_nic_dword(priv, WCAMI, TargetContent);
5684 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5685 }
5686 else if(i==1){//MAC
5687 TargetContent = (u32)(*(MacAddr+2)) |
5688 (u32)(*(MacAddr+3)) << 8|
5689 (u32)(*(MacAddr+4)) << 16|
5690 (u32)(*(MacAddr+5)) << 24;
3f9ab1ee
MM		 5691 write_nic_dword(priv, WCAMI, TargetContent);
5692 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5693 }
5694 else { //Key Material
5695 if(KeyContent != NULL)
5696 {
3f9ab1ee
MM		 5697 write_nic_dword(priv, WCAMI, (u32)(*(KeyContent+i-2)) );
5698 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5699 }
5700 }
5701 }
5702 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446 5703}
ecdfa446 5704
65a43784 5705bool NicIFEnableNIC(struct net_device* dev)
5706{
5707 RT_STATUS init_status = RT_STATUS_SUCCESS;
5708 struct r8192_priv* priv = ieee80211_priv(dev);
5709 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
5710
5711 //YJ,add,091109
5712 if (priv->up == 0){
5713 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
5714 priv->bdisable_nic = false; //YJ,add,091111
5715 return false;
5716 }
5717 // <1> Reset memory: descriptor, buffer,..
5718 //NicIFResetMemory(Adapter);
5719
5720 // <2> Enable Adapter
65a43784 5721 //priv->bfirst_init = true;
5722 init_status = rtl8192_adapter_start(dev);
5723 if (init_status != RT_STATUS_SUCCESS) {
5724 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
5725 priv->bdisable_nic = false; //YJ,add,091111
5726 return -1;
5727 }
65a43784 5728 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
5729 //priv->bfirst_init = false;
5730
5731 // <3> Enable Interrupt
5732 rtl8192_irq_enable(dev);
5733 priv->bdisable_nic = false;
16d74da0 5734
c6eae677 5735 return (init_status == RT_STATUS_SUCCESS);
65a43784 5736}
214985a6 5737
65a43784 5738bool NicIFDisableNIC(struct net_device* dev)
5739{
5740 bool status = true;
5741 struct r8192_priv* priv = ieee80211_priv(dev);
5742 u8 tmp_state = 0;
5743 // <1> Disable Interrupt
16d74da0 5744
65a43784 5745 priv->bdisable_nic = true; //YJ,move,091109
5746 tmp_state = priv->ieee80211->state;
5747
5748 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
5749
5750 priv->ieee80211->state = tmp_state;
5751 rtl8192_cancel_deferred_work(priv);
5752 rtl8192_irq_disable(dev);
5753 // <2> Stop all timer
5754
5755 // <3> Disable Adapter
5756 rtl8192_halt_adapter(dev, false);
5757// priv->bdisable_nic = true;
65a43784 5758
5759 return status;
5760}
5761
ecdfa446
GKH		 5762module_init(rtl8192_pci_module_init);
5763module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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