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Staging: rtl8192e: Clean up rtl8192_qos_association_resp()
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8190P / RTL8192E
4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
ecdfa446 27
ecdfa446
GKH		 28#undef RX_DONT_PASS_UL
29#undef DEBUG_EPROM
30#undef DEBUG_RX_VERBOSE
31#undef DUMMY_RX
32#undef DEBUG_ZERO_RX
33#undef DEBUG_RX_SKB
34#undef DEBUG_TX_FRAG
35#undef DEBUG_RX_FRAG
36#undef DEBUG_TX_FILLDESC
37#undef DEBUG_TX
38#undef DEBUG_IRQ
39#undef DEBUG_RX
40#undef DEBUG_RXALLOC
41#undef DEBUG_REGISTERS
42#undef DEBUG_RING
43#undef DEBUG_IRQ_TASKLET
44#undef DEBUG_TX_ALLOC
45#undef DEBUG_TX_DESC
46
47//#define CONFIG_RTL8192_IO_MAP
3d14b518 48#include <linux/vmalloc.h>
5a0e3ad6 49#include <linux/slab.h>
ecdfa446
GKH		 50#include <asm/uaccess.h>
51#include "r8192E_hw.h"
52#include "r8192E.h"
53#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
54#include "r8180_93cx6.h" /* Card EEPROM */
55#include "r8192E_wx.h"
56#include "r819xE_phy.h" //added by WB 4.30.2008
57#include "r819xE_phyreg.h"
58#include "r819xE_cmdpkt.h"
59#include "r8192E_dm.h"
ecdfa446 60
bebdf809 61#ifdef CONFIG_PM
ecdfa446
GKH		 62#include "r8192_pm.h"
63#endif
64
65#ifdef ENABLE_DOT11D
65a43784 66#include "ieee80211/dot11d.h"
ecdfa446
GKH		 67#endif
68
69//set here to open your trace code. //WB
207b58fb 70u32 rt_global_debug_component =
ecdfa446
GKH		 71 // COMP_INIT |
72 // COMP_EPROM |
73 // COMP_PHY |
74 // COMP_RF |
65a43784 75// COMP_FIRMWARE |
ecdfa446
GKH		 76 // COMP_TRACE |
77 // COMP_DOWN |
78 // COMP_SWBW |
79 // COMP_SEC |
80// COMP_QOS |
81// COMP_RATE |
82 // COMP_RECV |
83 // COMP_SEND |
84 // COMP_POWER |
85 // COMP_EVENTS |
86 // COMP_RESET |
87 // COMP_CMDPKT |
88 // COMP_POWER_TRACKING |
89 // COMP_INTR |
90 COMP_ERR ; //always open err flags on
cf3d3d38 91
881a975b 92static const struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
ecdfa446
GKH		 93#ifdef RTL8190P
94 /* Realtek */
95 /* Dlink */
96 { PCI_DEVICE(0x10ec, 0x8190) },
97 /* Corega */
98 { PCI_DEVICE(0x07aa, 0x0045) },
99 { PCI_DEVICE(0x07aa, 0x0046) },
100#else
101 /* Realtek */
102 { PCI_DEVICE(0x10ec, 0x8192) },
103
104 /* Corega */
105 { PCI_DEVICE(0x07aa, 0x0044) },
106 { PCI_DEVICE(0x07aa, 0x0047) },
107#endif
108 {}
109};
110
dca41306 111static char ifname[IFNAMSIZ] = "wlan%d";
ecdfa446
GKH		 112static int hwwep = 1; //default use hw. set 0 to use software security
113static int channels = 0x3fff;
114
115MODULE_LICENSE("GPL");
ecdfa446 116MODULE_VERSION("V 1.1");
ecdfa446
GKH		 117MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
118//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
119MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
120
ecdfa446 121
dca41306 122module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
ecdfa446
GKH		 123module_param(hwwep,int, S_IRUGO|S_IWUSR);
124module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 125
126MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
ecdfa446
GKH		 127MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
128MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
129
130static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
131 const struct pci_device_id *id);
132static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
133
134static struct pci_driver rtl8192_pci_driver = {
135 .name = RTL819xE_MODULE_NAME, /* Driver name */
136 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
137 .probe = rtl8192_pci_probe, /* probe fn */
138 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
bebdf809 139#ifdef CONFIG_PM
ecdfa446
GKH		 140 .suspend = rtl8192E_suspend, /* PM suspend fn */
141 .resume = rtl8192E_resume, /* PM resume fn */
142#else
143 .suspend = NULL, /* PM suspend fn */
214985a6 144 .resume = NULL, /* PM resume fn */
ecdfa446 145#endif
ecdfa446
GKH		 146};
147
559fba5e
MM		 148static void rtl8192_start_beacon(struct net_device *dev);
149static void rtl8192_stop_beacon(struct net_device *dev);
150static void rtl819x_watchdog_wqcallback(struct work_struct *work);
151static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
152static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
153static void rtl8192_prepare_beacon(struct r8192_priv *priv);
154static irqreturn_t rtl8192_interrupt(int irq, void *netdev);
155static void rtl8192_try_wake_queue(struct net_device *dev, int pri);
881a975b 156static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb);
5b3b1a7b
MM		 157static void rtl8192_update_ratr_table(struct net_device* dev);
158static void rtl8192_restart(struct work_struct *work);
159static void watch_dog_timer_callback(unsigned long data);
160static int _rtl8192_up(struct net_device *dev);
161static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
559fba5e 162
ecdfa446
GKH		 163#ifdef ENABLE_DOT11D
164
165typedef struct _CHANNEL_LIST
166{
167 u8 Channel[32];
168 u8 Len;
169}CHANNEL_LIST, *PCHANNEL_LIST;
170
ab2161a0 171static const CHANNEL_LIST ChannelPlan[] = {
ecdfa446
GKH		 172 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
173 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
174 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
175 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
176 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
177 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
178 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
179 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
180 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
181 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
182 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
183};
184
185static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
186{
187 int i, max_chan=-1, min_chan=-1;
188 struct ieee80211_device* ieee = priv->ieee80211;
189 switch (channel_plan)
190 {
191 case COUNTRY_CODE_FCC:
192 case COUNTRY_CODE_IC:
193 case COUNTRY_CODE_ETSI:
194 case COUNTRY_CODE_SPAIN:
195 case COUNTRY_CODE_FRANCE:
196 case COUNTRY_CODE_MKK:
197 case COUNTRY_CODE_MKK1:
198 case COUNTRY_CODE_ISRAEL:
199 case COUNTRY_CODE_TELEC:
200 case COUNTRY_CODE_MIC:
201 {
202 Dot11d_Init(ieee);
203 ieee->bGlobalDomain = false;
204 //acturally 8225 & 8256 rf chip only support B,G,24N mode
205 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256))
206 {
207 min_chan = 1;
208 max_chan = 14;
209 }
210 else
211 {
212 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
213 }
214 if (ChannelPlan[channel_plan].Len != 0){
215 // Clear old channel map
216 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
217 // Set new channel map
218 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
219 {
220 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
221 break;
222 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
223 }
224 }
225 break;
226 }
227 case COUNTRY_CODE_GLOBAL_DOMAIN:
228 {
229 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
230 Dot11d_Reset(ieee);
231 ieee->bGlobalDomain = true;
232 break;
233 }
234 default:
235 break;
236 }
237}
238#endif
239
240
241#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
242/* 2007/07/25 MH Defien temp tx fw info. */
5e1ad18a 243static TX_FWINFO_T Tmp_TxFwInfo;
ecdfa446
GKH		 244
245
246#define rx_hal_is_cck_rate(_pdrvinfo)\
247 (_pdrvinfo->RxRate == DESC90_RATE1M ||\
248 _pdrvinfo->RxRate == DESC90_RATE2M ||\
249 _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
250 _pdrvinfo->RxRate == DESC90_RATE11M) &&\
251 !_pdrvinfo->RxHT\
252
253
254void CamResetAllEntry(struct net_device *dev)
255{
c325d980 256 write_nic_dword(dev, RWCAM, BIT31|BIT30);
ecdfa446
GKH		 257}
258
259
260void write_cam(struct net_device *dev, u8 addr, u32 data)
261{
262 write_nic_dword(dev, WCAMI, data);
263 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
264}
265u32 read_cam(struct net_device *dev, u8 addr)
266{
267 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
268 return read_nic_dword(dev, 0xa8);
269}
270
ecdfa446
GKH		 271#ifdef CONFIG_RTL8180_IO_MAP
272
273u8 read_nic_byte(struct net_device *dev, int x)
274{
275 return 0xff&inb(dev->base_addr +x);
276}
277
278u32 read_nic_dword(struct net_device *dev, int x)
279{
280 return inl(dev->base_addr +x);
281}
282
283u16 read_nic_word(struct net_device *dev, int x)
284{
285 return inw(dev->base_addr +x);
286}
287
288void write_nic_byte(struct net_device *dev, int x,u8 y)
289{
290 outb(y&0xff,dev->base_addr +x);
291}
292
293void write_nic_word(struct net_device *dev, int x,u16 y)
294{
295 outw(y,dev->base_addr +x);
296}
297
298void write_nic_dword(struct net_device *dev, int x,u32 y)
299{
300 outl(y,dev->base_addr +x);
301}
302
303#else /* RTL_IO_MAP */
304
305u8 read_nic_byte(struct net_device *dev, int x)
306{
307 return 0xff&readb((u8*)dev->mem_start +x);
308}
309
310u32 read_nic_dword(struct net_device *dev, int x)
311{
312 return readl((u8*)dev->mem_start +x);
313}
314
315u16 read_nic_word(struct net_device *dev, int x)
316{
317 return readw((u8*)dev->mem_start +x);
318}
319
320void write_nic_byte(struct net_device *dev, int x,u8 y)
321{
322 writeb(y,(u8*)dev->mem_start +x);
323 udelay(20);
324}
325
326void write_nic_dword(struct net_device *dev, int x,u32 y)
327{
328 writel(y,(u8*)dev->mem_start +x);
329 udelay(20);
330}
331
332void write_nic_word(struct net_device *dev, int x,u16 y)
333{
334 writew(y,(u8*)dev->mem_start +x);
335 udelay(20);
336}
337
338#endif /* RTL_IO_MAP */
339
65a43784 340u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
341{
4a533365
MM		 342 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
343 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 344 int wpa_ie_len= ieee->wpa_ie_len;
345 struct ieee80211_crypt_data* crypt;
346 int encrypt;
347
348 crypt = ieee->crypt[ieee->tx_keyidx];
349
207b58fb
MM		 350 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
351 (ieee->host_encrypt && crypt && crypt->ops &&
65a43784 352 (0 == strcmp(crypt->ops->name,"WEP")));
353
354 /* simply judge */
355 if(encrypt && (wpa_ie_len == 0)) {
356 // wep encryption, no N mode setting */
357 return SEC_ALG_WEP;
358 } else if((wpa_ie_len != 0)) {
359 // parse pairwise key type */
360 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
361 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
362 return SEC_ALG_CCMP;
363 else
364 return SEC_ALG_TKIP;
365 } else {
366 return SEC_ALG_NONE;
367 }
368}
369
370void
371rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
372{
373 struct r8192_priv* priv = ieee80211_priv(dev);
374
375 switch(variable)
376 {
377
378 case HW_VAR_BSSID:
379 write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]);
380 write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]);
381 break;
382
383 case HW_VAR_MEDIA_STATUS:
384 {
385 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
65a43784 386 u8 btMsr = read_nic_byte(dev, MSR);
387
388 btMsr &= 0xfc;
389
390 switch(OpMode)
391 {
392 case RT_OP_MODE_INFRASTRUCTURE:
393 btMsr |= MSR_INFRA;
65a43784 394 break;
395
396 case RT_OP_MODE_IBSS:
397 btMsr |= MSR_ADHOC;
65a43784 398 break;
399
400 case RT_OP_MODE_AP:
401 btMsr |= MSR_AP;
65a43784 402 break;
403
404 default:
405 btMsr |= MSR_NOLINK;
406 break;
407 }
408
409 write_nic_byte(dev, MSR, btMsr);
65a43784 410 }
411 break;
412
413 case HW_VAR_CECHK_BSSID:
414 {
415 u32 RegRCR, Type;
416
417 Type = ((u8*)(val))[0];
65a43784 418 RegRCR = read_nic_dword(dev,RCR);
419 priv->ReceiveConfig = RegRCR;
420
421 if (Type == true)
422 RegRCR |= (RCR_CBSSID);
423 else if (Type == false)
424 RegRCR &= (~RCR_CBSSID);
425
65a43784 426 write_nic_dword(dev, RCR,RegRCR);
427 priv->ReceiveConfig = RegRCR;
428
429 }
430 break;
431
432 case HW_VAR_SLOT_TIME:
433 {
65a43784 434 priv->slot_time = val[0];
435 write_nic_byte(dev, SLOT_TIME, val[0]);
436
437 }
438 break;
439
440 case HW_VAR_ACK_PREAMBLE:
441 {
442 u32 regTmp = 0;
443 priv->short_preamble = (bool)(*(u8*)val );
444 regTmp = priv->basic_rate;
445 if (priv->short_preamble)
446 regTmp |= BRSR_AckShortPmb;
447 write_nic_dword(dev, RRSR, regTmp);
448 }
449 break;
450
451 case HW_VAR_CPU_RST:
452 write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]);
453 break;
454
455 default:
456 break;
457 }
458
459}
460
ecdfa446
GKH		 461static struct proc_dir_entry *rtl8192_proc = NULL;
462
ecdfa446
GKH		 463static int proc_get_stats_ap(char *page, char **start,
464 off_t offset, int count,
465 int *eof, void *data)
466{
467 struct net_device *dev = data;
468 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
469 struct ieee80211_device *ieee = priv->ieee80211;
470 struct ieee80211_network *target;
ecdfa446
GKH		 471 int len = 0;
472
473 list_for_each_entry(target, &ieee->network_list, list) {
474
475 len += snprintf(page + len, count - len,
476 "%s ", target->ssid);
477
478 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
479 len += snprintf(page + len, count - len,
480 "WPA\n");
481 }
482 else{
483 len += snprintf(page + len, count - len,
484 "non_WPA\n");
485 }
486
487 }
488
489 *eof = 1;
490 return len;
491}
492
493static int proc_get_registers(char *page, char **start,
494 off_t offset, int count,
495 int *eof, void *data)
496{
497 struct net_device *dev = data;
ecdfa446
GKH		 498 int len = 0;
499 int i,n;
ecdfa446
GKH		 500 int max=0xff;
501
502 /* This dump the current register page */
503 len += snprintf(page + len, count - len,
504 "\n####################page 0##################\n ");
505
506 for(n=0;n<=max;)
507 {
ecdfa446
GKH		 508 len += snprintf(page + len, count - len,
509 "\nD: %2x > ",n);
510
511 for(i=0;i<16 && n<=max;i++,n++)
512 len += snprintf(page + len, count - len,
513 "%2x ",read_nic_byte(dev,n));
ecdfa446
GKH		 514 }
515 len += snprintf(page + len, count - len,"\n");
516 len += snprintf(page + len, count - len,
517 "\n####################page 1##################\n ");
518 for(n=0;n<=max;)
519 {
ecdfa446
GKH		 520 len += snprintf(page + len, count - len,
521 "\nD: %2x > ",n);
522
523 for(i=0;i<16 && n<=max;i++,n++)
524 len += snprintf(page + len, count - len,
525 "%2x ",read_nic_byte(dev,0x100|n));
ecdfa446
GKH		 526 }
527
528 len += snprintf(page + len, count - len,
529 "\n####################page 3##################\n ");
530 for(n=0;n<=max;)
531 {
ecdfa446
GKH		 532 len += snprintf(page + len, count - len,
533 "\nD: %2x > ",n);
534
535 for(i=0;i<16 && n<=max;i++,n++)
536 len += snprintf(page + len, count - len,
537 "%2x ",read_nic_byte(dev,0x300|n));
ecdfa446
GKH		 538 }
539
ecdfa446
GKH		 540 *eof = 1;
541 return len;
542
543}
544
ecdfa446
GKH		 545static int proc_get_stats_tx(char *page, char **start,
546 off_t offset, int count,
547 int *eof, void *data)
548{
549 struct net_device *dev = data;
550 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
551
552 int len = 0;
553
554 len += snprintf(page + len, count - len,
555 "TX VI priority ok int: %lu\n"
556// "TX VI priority error int: %lu\n"
557 "TX VO priority ok int: %lu\n"
558// "TX VO priority error int: %lu\n"
559 "TX BE priority ok int: %lu\n"
560// "TX BE priority error int: %lu\n"
561 "TX BK priority ok int: %lu\n"
562// "TX BK priority error int: %lu\n"
563 "TX MANAGE priority ok int: %lu\n"
564// "TX MANAGE priority error int: %lu\n"
565 "TX BEACON priority ok int: %lu\n"
566 "TX BEACON priority error int: %lu\n"
567 "TX CMDPKT priority ok int: %lu\n"
568// "TX high priority ok int: %lu\n"
569// "TX high priority failed error int: %lu\n"
570// "TX queue resume: %lu\n"
571 "TX queue stopped?: %d\n"
572 "TX fifo overflow: %lu\n"
573// "TX beacon: %lu\n"
574// "TX VI queue: %d\n"
575// "TX VO queue: %d\n"
576// "TX BE queue: %d\n"
577// "TX BK queue: %d\n"
578// "TX HW queue: %d\n"
579// "TX VI dropped: %lu\n"
580// "TX VO dropped: %lu\n"
581// "TX BE dropped: %lu\n"
582// "TX BK dropped: %lu\n"
583 "TX total data packets %lu\n"
584 "TX total data bytes :%lu\n",
585// "TX beacon aborted: %lu\n",
586 priv->stats.txviokint,
587// priv->stats.txvierr,
588 priv->stats.txvookint,
589// priv->stats.txvoerr,
590 priv->stats.txbeokint,
591// priv->stats.txbeerr,
592 priv->stats.txbkokint,
593// priv->stats.txbkerr,
594 priv->stats.txmanageokint,
595// priv->stats.txmanageerr,
596 priv->stats.txbeaconokint,
597 priv->stats.txbeaconerr,
598 priv->stats.txcmdpktokint,
599// priv->stats.txhpokint,
600// priv->stats.txhperr,
601// priv->stats.txresumed,
602 netif_queue_stopped(dev),
603 priv->stats.txoverflow,
604// priv->stats.txbeacon,
605// atomic_read(&(priv->tx_pending[VI_QUEUE])),
606// atomic_read(&(priv->tx_pending[VO_QUEUE])),
607// atomic_read(&(priv->tx_pending[BE_QUEUE])),
608// atomic_read(&(priv->tx_pending[BK_QUEUE])),
609// read_nic_byte(dev, TXFIFOCOUNT),
610// priv->stats.txvidrop,
611// priv->stats.txvodrop,
612 priv->ieee80211->stats.tx_packets,
613 priv->ieee80211->stats.tx_bytes
614
615
616// priv->stats.txbedrop,
617// priv->stats.txbkdrop
618 // priv->stats.txdatapkt
619// priv->stats.txbeaconerr
620 );
621
622 *eof = 1;
623 return len;
624}
625
626
627
628static int proc_get_stats_rx(char *page, char **start,
629 off_t offset, int count,
630 int *eof, void *data)
631{
632 struct net_device *dev = data;
633 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
634
635 int len = 0;
636
637 len += snprintf(page + len, count - len,
638 "RX packets: %lu\n"
639 "RX desc err: %lu\n"
640 "RX rx overflow error: %lu\n"
641 "RX invalid urb error: %lu\n",
642 priv->stats.rxint,
643 priv->stats.rxrdu,
644 priv->stats.rxoverflow,
645 priv->stats.rxurberr);
646
647 *eof = 1;
648 return len;
649}
650
5e1ad18a 651static void rtl8192_proc_module_init(void)
ecdfa446
GKH		 652{
653 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
ecdfa446 654 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 655}
656
657
5e1ad18a 658static void rtl8192_proc_module_remove(void)
ecdfa446 659{
ecdfa446 660 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 661}
662
663
5e1ad18a 664static void rtl8192_proc_remove_one(struct net_device *dev)
ecdfa446
GKH		 665{
666 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
667
668 printk("dev name=======> %s\n",dev->name);
669
670 if (priv->dir_dev) {
671 // remove_proc_entry("stats-hw", priv->dir_dev);
672 remove_proc_entry("stats-tx", priv->dir_dev);
673 remove_proc_entry("stats-rx", priv->dir_dev);
674 // remove_proc_entry("stats-ieee", priv->dir_dev);
675 remove_proc_entry("stats-ap", priv->dir_dev);
676 remove_proc_entry("registers", priv->dir_dev);
677 // remove_proc_entry("cck-registers",priv->dir_dev);
678 // remove_proc_entry("ofdm-registers",priv->dir_dev);
679 //remove_proc_entry(dev->name, rtl8192_proc);
680 remove_proc_entry("wlan0", rtl8192_proc);
681 priv->dir_dev = NULL;
682 }
683}
684
685
5e1ad18a 686static void rtl8192_proc_init_one(struct net_device *dev)
ecdfa446
GKH		 687{
688 struct proc_dir_entry *e;
689 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
690 priv->dir_dev = create_proc_entry(dev->name,
691 S_IFDIR | S_IRUGO | S_IXUGO,
692 rtl8192_proc);
693 if (!priv->dir_dev) {
694 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
695 dev->name);
696 return;
697 }
ecdfa446
GKH		 698 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
699 priv->dir_dev, proc_get_stats_rx, dev);
700
701 if (!e) {
702 RT_TRACE(COMP_ERR,"Unable to initialize "
703 "/proc/net/rtl8192/%s/stats-rx\n",
704 dev->name);
705 }
706
707
708 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
709 priv->dir_dev, proc_get_stats_tx, dev);
710
711 if (!e) {
712 RT_TRACE(COMP_ERR, "Unable to initialize "
713 "/proc/net/rtl8192/%s/stats-tx\n",
714 dev->name);
715 }
ecdfa446
GKH		 716
717 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
718 priv->dir_dev, proc_get_stats_ap, dev);
719
720 if (!e) {
721 RT_TRACE(COMP_ERR, "Unable to initialize "
722 "/proc/net/rtl8192/%s/stats-ap\n",
723 dev->name);
724 }
725
726 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
727 priv->dir_dev, proc_get_registers, dev);
728 if (!e) {
729 RT_TRACE(COMP_ERR, "Unable to initialize "
730 "/proc/net/rtl8192/%s/registers\n",
731 dev->name);
732 }
ecdfa446 733}
ecdfa446 734
ecdfa446
GKH		 735short check_nic_enough_desc(struct net_device *dev, int prio)
736{
737 struct r8192_priv *priv = ieee80211_priv(dev);
738 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
739
740 /* for now we reserve two free descriptor as a safety boundary
741 * between the tail and the head
742 */
285f660c 743 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
ecdfa446
GKH		 744}
745
5e1ad18a 746static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 747{
748 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 749
ecdfa446 750 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 751 printk("TXTIMEOUT");
752}
753
5e1ad18a 754static void rtl8192_irq_enable(struct net_device *dev)
ecdfa446
GKH		 755{
756 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
757 priv->irq_enabled = 1;
758 write_nic_dword(dev,INTA_MASK, priv->irq_mask);
759}
760
65a43784 761void rtl8192_irq_disable(struct net_device *dev)
ecdfa446
GKH		 762{
763 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
764
765 write_nic_dword(dev,INTA_MASK,0);
ecdfa446
GKH		 766 priv->irq_enabled = 0;
767}
768
ecdfa446
GKH		 769void rtl8192_update_msr(struct net_device *dev)
770{
771 struct r8192_priv *priv = ieee80211_priv(dev);
772 u8 msr;
773
774 msr = read_nic_byte(dev, MSR);
775 msr &= ~ MSR_LINK_MASK;
776
777 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
778 * msr must be updated if the state is ASSOCIATING.
779 * this is intentional and make sense for ad-hoc and
780 * master (see the create BSS/IBSS func)
781 */
782 if (priv->ieee80211->state == IEEE80211_LINKED){
783
784 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
785 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
786 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
787 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
788 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
789 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
790
791 }else
792 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
793
794 write_nic_byte(dev, MSR, msr);
795}
796
797void rtl8192_set_chan(struct net_device *dev,short ch)
798{
61d0e67a 799 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 800
61d0e67a 801 priv->chan = ch;
ecdfa446 802
61d0e67a 803 /* need to implement rf set channel here WB */
ecdfa446 804
61d0e67a
MM		 805 if (priv->rf_set_chan)
806 priv->rf_set_chan(dev, priv->chan);
ecdfa446
GKH		 807}
808
809void rtl8192_rx_enable(struct net_device *dev)
810{
7aed48d9
MM		 811 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
812
813 write_nic_dword(dev, RDQDA,priv->rx_ring_dma);
ecdfa446
GKH		 814}
815
816/* the TX_DESC_BASE setting is according to the following queue index
817 * BK_QUEUE ===> 0
818 * BE_QUEUE ===> 1
819 * VI_QUEUE ===> 2
820 * VO_QUEUE ===> 3
821 * HCCA_QUEUE ===> 4
822 * TXCMD_QUEUE ===> 5
823 * MGNT_QUEUE ===> 6
824 * HIGH_QUEUE ===> 7
825 * BEACON_QUEUE ===> 8
826 * */
881a975b 827static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
ecdfa446
GKH		 828void rtl8192_tx_enable(struct net_device *dev)
829{
7aed48d9
MM		 830 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
831 u32 i;
ecdfa446 832
7aed48d9
MM		 833 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
834 write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
835
836 ieee80211_reset_queue(priv->ieee80211);
ecdfa446
GKH		 837}
838
ecdfa446
GKH		 839
840static void rtl8192_free_rx_ring(struct net_device *dev)
841{
7aed48d9
MM		 842 struct r8192_priv *priv = ieee80211_priv(dev);
843 int i;
ecdfa446 844
7aed48d9
MM		 845 for (i = 0; i < priv->rxringcount; i++) {
846 struct sk_buff *skb = priv->rx_buf[i];
847 if (!skb)
848 continue;
ecdfa446 849
7aed48d9
MM		 850 pci_unmap_single(priv->pdev,
851 *((dma_addr_t *)skb->cb),
852 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
853 kfree_skb(skb);
854 }
ecdfa446 855
7aed48d9
MM		 856 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
857 priv->rx_ring, priv->rx_ring_dma);
858 priv->rx_ring = NULL;
ecdfa446
GKH		 859}
860
861static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
862{
7aed48d9
MM		 863 struct r8192_priv *priv = ieee80211_priv(dev);
864 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 865
7aed48d9
MM		 866 while (skb_queue_len(&ring->queue)) {
867 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
868 struct sk_buff *skb = __skb_dequeue(&ring->queue);
ecdfa446 869
7aed48d9
MM		 870 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
871 skb->len, PCI_DMA_TODEVICE);
872 kfree_skb(skb);
873 ring->idx = (ring->idx + 1) % ring->entries;
874 }
ecdfa446 875
7aed48d9
MM		 876 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
877 ring->desc, ring->dma);
878 ring->desc = NULL;
ecdfa446
GKH		 879}
880
16d74da0 881void PHY_SetRtl8192eRfOff(struct net_device* dev)
ecdfa446 882{
65a43784 883 //disable RF-Chip A/B
884 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
885 //analog to digital off, for power save
886 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
887 //digital to analog off, for power save
888 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
889 //rx antenna off
890 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
891 //rx antenna off
892 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
893 //analog to digital part2 off, for power save
894 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
895 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
896 // Analog parameter!!Change bias and Lbus control.
897 write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07);
898
899}
ecdfa446 900
65a43784 901void rtl8192_halt_adapter(struct net_device *dev, bool reset)
ecdfa446 902{
ecdfa446 903 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 904 int i;
905 u8 OpMode;
906 u8 u1bTmp;
907 u32 ulRegRead;
908
909 OpMode = RT_OP_MODE_NO_LINK;
910 priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
ecdfa446 911
65a43784 912 if(!priv->ieee80211->bSupportRemoteWakeUp)
913 {
914 u1bTmp = 0x0; // disable tx/rx. In 8185 we write 0x10 (Reset bit), but here we make reference to WMAC and wirte 0x0. 2006.11.21 Emily
915 //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_COMMAND, &u1bTmp ); // Using HW_VAR_COMMAND instead of writing CMDR directly. Rewrited by Annie, 2006-04-07.
916 write_nic_byte(dev, CMDR, u1bTmp);
917 }
ecdfa446 918
65a43784 919 mdelay(20);
ecdfa446 920
65a43784 921 if(!reset)
922 {
923 //PlatformStallExecution(150000);
924 mdelay(150);
925
926#ifdef RTL8192E
927 priv->bHwRfOffAction = 2;
928#endif
929
930 //
931 // Call MgntActSet_RF_State instead to prevent RF config race condition.
932 // By Bruce, 2008-01-17.
933 //
934 if(!priv->ieee80211->bSupportRemoteWakeUp)
935 {
936 //MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_INIT);
937 //MgntActSet_RF_State(Adapter, eRfOff, Adapter->MgntInfo.RfOffReason);
938 //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P)
939
940 PHY_SetRtl8192eRfOff(dev);
941
942 // 2006.11.30. System reset bit
943 //priv->ieee80211->GetHwRegHandler(dev, HW_VAR_CPU_RST, (u32*)(&ulRegRead) );
944 ulRegRead = read_nic_dword(dev,CPU_GEN);
945 ulRegRead|=CPU_GEN_SYSTEM_RESET;
946 //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_CPU_RST, &ulRegRead);
947 write_nic_dword(dev,CPU_GEN, ulRegRead);
948 }
949 else
950 {
951 //2008.06.03 for WOL
952 write_nic_dword(dev, WFCRC0, 0xffffffff);
953 write_nic_dword(dev, WFCRC1, 0xffffffff);
954 write_nic_dword(dev, WFCRC2, 0xffffffff);
955
956 //Write PMR register
957 write_nic_byte(dev, PMR, 0x5);
958 //Disable tx, enanble rx
959 write_nic_byte(dev, MacBlkCtrl, 0xa);
960 }
961 }
962
963 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
964 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
965 }
966 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
967 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
968 }
ecdfa446
GKH		 969
970 skb_queue_purge(&priv->skb_queue);
ecdfa446
GKH		 971}
972
881a975b 973static const u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
ecdfa446
GKH		 974inline u16 rtl8192_rate2rate(short rate)
975{
976 if (rate >11) return 0;
977 return rtl_rate[rate];
978}
979
5e1ad18a 980static void rtl8192_data_hard_stop(struct net_device *dev)
ecdfa446 981{
ecdfa446
GKH		 982}
983
5e1ad18a 984static void rtl8192_data_hard_resume(struct net_device *dev)
ecdfa446 985{
ecdfa446
GKH		 986}
987
214985a6
MM		 988/*
989 * this function TX data frames when the ieee80211 stack requires this.
ecdfa446
GKH		 990 * It checks also if we need to stop the ieee tx queue, eventually do it
991 */
5e1ad18a 992static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
ecdfa446
GKH		 993{
994 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
995 int ret;
ecdfa446
GKH		 996 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
997 u8 queue_index = tcb_desc->queue_index;
dcf663fb 998
ecdfa446
GKH		 999 /* shall not be referred by command packet */
1000 assert(queue_index != TXCMD_QUEUE);
1001
dcf663fb 1002 if (priv->bHwRadioOff || (!priv->up))
65a43784 1003 {
1004 kfree_skb(skb);
1005 return;
1006 }
1007
dcf663fb 1008 memcpy(skb->cb, &dev, sizeof(dev));
ecdfa446 1009
ecdfa446
GKH		 1010 skb_push(skb, priv->ieee80211->tx_headroom);
1011 ret = rtl8192_tx(dev, skb);
dcf663fb 1012 if (ret != 0) {
ecdfa446 1013 kfree_skb(skb);
ecdfa446
GKH		 1014 }
1015
dcf663fb
MM		 1016 if (queue_index != MGNT_QUEUE) {
1017 priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom);
1018 priv->ieee80211->stats.tx_packets++;
1019 }
ecdfa446
GKH		 1020}
1021
214985a6
MM		 1022/*
1023 * This is a rough attempt to TX a frame
ecdfa446
GKH		 1024 * This is called by the ieee 80211 stack to TX management frames.
1025 * If the ring is full packet are dropped (for data frame the queue
1026 * is stopped before this can happen).
1027 */
5e1ad18a 1028static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
ecdfa446
GKH		 1029{
1030 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 1031 int ret;
ecdfa446
GKH		 1032 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1033 u8 queue_index = tcb_desc->queue_index;
1034
162f535f
MM		 1035 if (queue_index != TXCMD_QUEUE) {
1036 if (priv->bHwRadioOff || (!priv->up))
65a43784 1037 {
162f535f
MM		 1038 kfree_skb(skb);
1039 return 0;
1040 }
65a43784 1041 }
ecdfa446 1042
162f535f
MM		 1043 memcpy(skb->cb, &dev, sizeof(dev));
1044 if (queue_index == TXCMD_QUEUE) {
ecdfa446
GKH		 1045 rtl819xE_tx_cmd(dev, skb);
1046 ret = 0;
ecdfa446
GKH		 1047 return ret;
1048 } else {
ecdfa446
GKH		 1049 tcb_desc->RATRIndex = 7;
1050 tcb_desc->bTxDisableRateFallBack = 1;
1051 tcb_desc->bTxUseDriverAssingedRate = 1;
1052 tcb_desc->bTxEnableFwCalcDur = 1;
1053 skb_push(skb, priv->ieee80211->tx_headroom);
1054 ret = rtl8192_tx(dev, skb);
162f535f 1055 if (ret != 0) {
ecdfa446 1056 kfree_skb(skb);
162f535f 1057 }
ecdfa446
GKH		 1058 }
1059
ecdfa446 1060 return ret;
ecdfa446
GKH		 1061}
1062
1063
5e1ad18a 1064static void rtl8192_tx_isr(struct net_device *dev, int prio)
ecdfa446
GKH		 1065{
1066 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1067
1068 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
1069
1070 while (skb_queue_len(&ring->queue)) {
1071 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1072 struct sk_buff *skb;
1073
bbc9a991 1074 /* beacon packet will only use the first descriptor defaultly,
ecdfa446
GKH		 1075 * and the OWN may not be cleared by the hardware
1076 * */
1077 if(prio != BEACON_QUEUE) {
1078 if(entry->OWN)
1079 return;
1080 ring->idx = (ring->idx + 1) % ring->entries;
1081 }
1082
1083 skb = __skb_dequeue(&ring->queue);
1084 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1085 skb->len, PCI_DMA_TODEVICE);
1086
1087 kfree_skb(skb);
1088 }
1089 if (prio == MGNT_QUEUE){
1090 if (priv->ieee80211->ack_tx_to_ieee){
1091 if (rtl8192_is_tx_queue_empty(dev)){
1092 priv->ieee80211->ack_tx_to_ieee = 0;
1093 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1094 }
1095 }
1096 }
1097
1098 if(prio != BEACON_QUEUE) {
1099 /* try to deal with the pending packets */
1100 tasklet_schedule(&priv->irq_tx_tasklet);
1101 }
1102
1103}
1104
5e1ad18a 1105static void rtl8192_stop_beacon(struct net_device *dev)
ecdfa446 1106{
ecdfa446
GKH		 1107}
1108
5e1ad18a 1109static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
ecdfa446
GKH		 1110{
1111 struct r8192_priv *priv = ieee80211_priv(dev);
1112 struct ieee80211_network *net;
1113 u8 i=0, basic_rate = 0;
1114 net = & priv->ieee80211->current_network;
1115
1116 for (i=0; i<net->rates_len; i++)
1117 {
1118 basic_rate = net->rates[i]&0x7f;
1119 switch(basic_rate)
1120 {
1121 case MGN_1M: *rate_config |= RRSR_1M; break;
1122 case MGN_2M: *rate_config |= RRSR_2M; break;
1123 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1124 case MGN_11M: *rate_config |= RRSR_11M; break;
1125 case MGN_6M: *rate_config |= RRSR_6M; break;
1126 case MGN_9M: *rate_config |= RRSR_9M; break;
1127 case MGN_12M: *rate_config |= RRSR_12M; break;
1128 case MGN_18M: *rate_config |= RRSR_18M; break;
1129 case MGN_24M: *rate_config |= RRSR_24M; break;
1130 case MGN_36M: *rate_config |= RRSR_36M; break;
1131 case MGN_48M: *rate_config |= RRSR_48M; break;
1132 case MGN_54M: *rate_config |= RRSR_54M; break;
1133 }
1134 }
1135 for (i=0; i<net->rates_ex_len; i++)
1136 {
1137 basic_rate = net->rates_ex[i]&0x7f;
1138 switch(basic_rate)
1139 {
1140 case MGN_1M: *rate_config |= RRSR_1M; break;
1141 case MGN_2M: *rate_config |= RRSR_2M; break;
1142 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1143 case MGN_11M: *rate_config |= RRSR_11M; break;
1144 case MGN_6M: *rate_config |= RRSR_6M; break;
1145 case MGN_9M: *rate_config |= RRSR_9M; break;
1146 case MGN_12M: *rate_config |= RRSR_12M; break;
1147 case MGN_18M: *rate_config |= RRSR_18M; break;
1148 case MGN_24M: *rate_config |= RRSR_24M; break;
1149 case MGN_36M: *rate_config |= RRSR_36M; break;
1150 case MGN_48M: *rate_config |= RRSR_48M; break;
1151 case MGN_54M: *rate_config |= RRSR_54M; break;
1152 }
1153 }
1154}
1155
1156
1157#define SHORT_SLOT_TIME 9
1158#define NON_SHORT_SLOT_TIME 20
1159
5e1ad18a 1160static void rtl8192_update_cap(struct net_device* dev, u16 cap)
ecdfa446
GKH		 1161{
1162 u32 tmp = 0;
1163 struct r8192_priv *priv = ieee80211_priv(dev);
1164 struct ieee80211_network *net = &priv->ieee80211->current_network;
1165 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1166 tmp = priv->basic_rate;
1167 if (priv->short_preamble)
1168 tmp |= BRSR_AckShortPmb;
1169 write_nic_dword(dev, RRSR, tmp);
1170
1171 if (net->mode & (IEEE_G|IEEE_N_24G))
1172 {
1173 u8 slot_time = 0;
1174 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1175 {//short slot time
1176 slot_time = SHORT_SLOT_TIME;
1177 }
1178 else //long slot time
1179 slot_time = NON_SHORT_SLOT_TIME;
1180 priv->slot_time = slot_time;
1181 write_nic_byte(dev, SLOT_TIME, slot_time);
1182 }
1183
1184}
5e1ad18a
GKH		 1185
1186static void rtl8192_net_update(struct net_device *dev)
ecdfa446 1187{
ecdfa446
GKH		 1188 struct r8192_priv *priv = ieee80211_priv(dev);
1189 struct ieee80211_network *net;
1190 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1191 u16 rate_config = 0;
1192 net = &priv->ieee80211->current_network;
eb40aeac
MM		 1193
1194 /* update Basic rate: RR, BRSR */
ecdfa446 1195 rtl8192_config_rate(dev, &rate_config);
ecdfa446 1196
eb40aeac
MM		 1197 /*
1198 * Select RRSR (in Legacy-OFDM and CCK)
1199 * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M,
1200 * 2M, and 1M from the Basic rate.
1201 * We do not use other rates.
1202 */
1203 priv->basic_rate = rate_config &= 0x15f;
1204
1205 /* BSSID */
1206 write_nic_dword(dev, BSSIDR, ((u32 *)net->bssid)[0]);
1207 write_nic_word(dev, BSSIDR+4, ((u16 *)net->bssid)[2]);
ecdfa446 1208
ecdfa446
GKH		 1209 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1210 {
1211 write_nic_word(dev, ATIMWND, 2);
1212 write_nic_word(dev, BCN_DMATIME, 256);
1213 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
eb40aeac
MM		 1214 /*
1215 * BIT15 of BCN_DRV_EARLY_INT will indicate
1216 * whether software beacon or hw beacon is applied.
1217 */
ecdfa446
GKH		 1218 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
1219 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1220
1221 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
eb40aeac
MM		 1222 /* TODO: BcnIFS may required to be changed on ASIC */
1223 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
ecdfa446
GKH		 1224 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1225 }
ecdfa446
GKH		 1226}
1227
ecdfa446
GKH		 1228void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1229{
1230 struct r8192_priv *priv = ieee80211_priv(dev);
1231 struct rtl8192_tx_ring *ring;
1232 tx_desc_819x_pci *entry;
1233 unsigned int idx;
1234 dma_addr_t mapping;
1235 cb_desc *tcb_desc;
1236 unsigned long flags;
1237
1238 ring = &priv->tx_ring[TXCMD_QUEUE];
1239 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1240
1241 spin_lock_irqsave(&priv->irq_th_lock,flags);
1242 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1243 entry = &ring->desc[idx];
1244
1245 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1246 memset(entry,0,12);
1247 entry->LINIP = tcb_desc->bLastIniPkt;
1248 entry->FirstSeg = 1;//first segment
1249 entry->LastSeg = 1; //last segment
1250 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1251 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1252 } else {
1253 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1254 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1255 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1256 entry->QueueSelect = QSLT_CMD;
1257 entry->TxFWInfoSize = 0x08;
1258 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1259 }
1260 entry->TxBufferSize = skb->len;
1261 entry->TxBuffAddr = cpu_to_le32(mapping);
1262 entry->OWN = 1;
1263
1264#ifdef JOHN_DUMP_TXDESC
1265 { int i;
1266 tx_desc_819x_pci *entry1 = &ring->desc[0];
1267 unsigned int *ptr= (unsigned int *)entry1;
1268 printk("<Tx descriptor>:\n");
1269 for (i = 0; i < 8; i++)
1270 printk("%8x ", ptr[i]);
1271 printk("\n");
1272 }
1273#endif
1274 __skb_queue_tail(&ring->queue, skb);
1275 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1276
1277 write_nic_byte(dev, TPPoll, TPPoll_CQ);
1278
1279 return;
1280}
1281
1282/*
1283 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1284 * in TxFwInfo data structure
214985a6 1285 */
5e1ad18a 1286static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446 1287{
f72b6a50 1288 u8 QueueSelect = 0;
ecdfa446 1289
f72b6a50
MM		 1290 switch (QueueID) {
1291 case BE_QUEUE:
1292 QueueSelect = QSLT_BE;
1293 break;
ecdfa446 1294
f72b6a50
MM		 1295 case BK_QUEUE:
1296 QueueSelect = QSLT_BK;
1297 break;
ecdfa446 1298
f72b6a50
MM		 1299 case VO_QUEUE:
1300 QueueSelect = QSLT_VO;
1301 break;
ecdfa446 1302
f72b6a50
MM		 1303 case VI_QUEUE:
1304 QueueSelect = QSLT_VI;
1305 break;
ecdfa446 1306
f72b6a50
MM		 1307 case MGNT_QUEUE:
1308 QueueSelect = QSLT_MGNT;
1309 break;
ecdfa446 1310
f72b6a50
MM		 1311 case BEACON_QUEUE:
1312 QueueSelect = QSLT_BEACON;
1313 break;
ecdfa446 1314
f72b6a50
MM		 1315 case TXCMD_QUEUE:
1316 QueueSelect = QSLT_CMD;
1317 break;
1318
1319 case HIGH_QUEUE:
1320 default:
1321 RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID);
1322 break;
ecdfa446
GKH		 1323 }
1324 return QueueSelect;
1325}
1326
5e1ad18a 1327static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1328{
1329 u8 ret = DESC90_RATE1M;
1330
1331 switch(rate) {
1332 case MGN_1M: ret = DESC90_RATE1M; break;
1333 case MGN_2M: ret = DESC90_RATE2M; break;
1334 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1335 case MGN_11M: ret = DESC90_RATE11M; break;
1336 case MGN_6M: ret = DESC90_RATE6M; break;
1337 case MGN_9M: ret = DESC90_RATE9M; break;
1338 case MGN_12M: ret = DESC90_RATE12M; break;
1339 case MGN_18M: ret = DESC90_RATE18M; break;
1340 case MGN_24M: ret = DESC90_RATE24M; break;
1341 case MGN_36M: ret = DESC90_RATE36M; break;
1342 case MGN_48M: ret = DESC90_RATE48M; break;
1343 case MGN_54M: ret = DESC90_RATE54M; break;
1344
1345 // HT rate since here
1346 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1347 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1348 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1349 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1350 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1351 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1352 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1353 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1354 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1355 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1356 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1357 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1358 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1359 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1360 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1361 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1362 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1363
1364 default: break;
1365 }
1366 return ret;
1367}
1368
1369
5e1ad18a 1370static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1371{
1372 u8 tmp_Short;
1373
1374 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1375
1376 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1377 tmp_Short = 0;
1378
1379 return tmp_Short;
1380}
1381
1382/*
1383 * The tx procedure is just as following,
1384 * skb->cb will contain all the following information,
1385 * priority, morefrag, rate, &dev.
214985a6 1386 */
ecdfa446
GKH		 1387short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
1388{
1389 struct r8192_priv *priv = ieee80211_priv(dev);
1390 struct rtl8192_tx_ring *ring;
1391 unsigned long flags;
1392 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1393 tx_desc_819x_pci *pdesc = NULL;
1394 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1395 dma_addr_t mapping;
1396 bool multi_addr=false,broad_addr=false,uni_addr=false;
1397 u8* pda_addr = NULL;
1398 int idx;
1399
65a43784 1400 if(priv->bdisable_nic){
1401 RT_TRACE(COMP_ERR,"%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n", __FUNCTION__, skb->len, tcb_desc->queue_index);
1402 return skb->len;
1403 }
1404
1405#ifdef ENABLE_LPS
1406 priv->ieee80211->bAwakePktSent = true;
1407#endif
1408
ecdfa446
GKH		 1409 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1410 /* collect the tx packets statitcs */
1411 pda_addr = ((u8*)skb->data) + sizeof(TX_FWINFO_8190PCI);
1412 if(is_multicast_ether_addr(pda_addr))
1413 multi_addr = true;
1414 else if(is_broadcast_ether_addr(pda_addr))
1415 broad_addr = true;
1416 else
1417 uni_addr = true;
1418
1419 if(uni_addr)
1420 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1421 else if(multi_addr)
1422 priv->stats.txbytesmulticast +=(u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1423 else
1424 priv->stats.txbytesbroadcast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1425
1426 /* fill tx firmware */
1427 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1428 memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
1429 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
1430 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1431 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1432 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1433
1434 /* Aggregation related */
1435 if(tcb_desc->bAMPDUEnable) {
1436 pTxFwInfo->AllowAggregation = 1;
1437 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1438 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1439 } else {
1440 pTxFwInfo->AllowAggregation = 0;
1441 pTxFwInfo->RxMF = 0;
1442 pTxFwInfo->RxAMD = 0;
1443 }
1444
1445 //
1446 // Protection mode related
1447 //
1448 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
1449 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
1450 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
1451 pTxFwInfo->RtsHT= (tcb_desc->rts_rate&0x80)?1:0;
1452 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1453 pTxFwInfo->RtsBandwidth = 0;
1454 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1455 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):(tcb_desc->bRTSUseShortGI?1:0);
1456 //
1457 // Set Bandwidth and sub-channel settings.
1458 //
1459 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
1460 {
1461 if(tcb_desc->bPacketBW)
1462 {
1463 pTxFwInfo->TxBandwidth = 1;
1464#ifdef RTL8190P
1465 pTxFwInfo->TxSubCarrier = 3;
1466#else
1467 pTxFwInfo->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode, cosa 04012008
1468#endif
1469 }
1470 else
1471 {
1472 pTxFwInfo->TxBandwidth = 0;
1473 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1474 }
1475 } else {
1476 pTxFwInfo->TxBandwidth = 0;
1477 pTxFwInfo->TxSubCarrier = 0;
1478 }
1479
1480 if (0)
1481 {
1482 /* 2007/07/25 MH Copy current TX FW info.*/
1483 memcpy((void*)(&Tmp_TxFwInfo), (void*)(pTxFwInfo), sizeof(TX_FWINFO_8190PCI));
1484 printk("&&&&&&&&&&&&&&&&&&&&&&====>print out fwinf\n");
1485 printk("===>enable fwcacl:%d\n", Tmp_TxFwInfo.EnableCPUDur);
1486 printk("===>RTS STBC:%d\n", Tmp_TxFwInfo.RtsSTBC);
1487 printk("===>RTS Subcarrier:%d\n", Tmp_TxFwInfo.RtsSubcarrier);
1488 printk("===>Allow Aggregation:%d\n", Tmp_TxFwInfo.AllowAggregation);
1489 printk("===>TX HT bit:%d\n", Tmp_TxFwInfo.TxHT);
1490 printk("===>Tx rate:%d\n", Tmp_TxFwInfo.TxRate);
1491 printk("===>Received AMPDU Density:%d\n", Tmp_TxFwInfo.RxAMD);
1492 printk("===>Received MPDU Factor:%d\n", Tmp_TxFwInfo.RxMF);
1493 printk("===>TxBandwidth:%d\n", Tmp_TxFwInfo.TxBandwidth);
1494 printk("===>TxSubCarrier:%d\n", Tmp_TxFwInfo.TxSubCarrier);
1495
1496 printk("<=====**********************out of print\n");
1497
1498 }
1499 spin_lock_irqsave(&priv->irq_th_lock,flags);
1500 ring = &priv->tx_ring[tcb_desc->queue_index];
1501 if (tcb_desc->queue_index != BEACON_QUEUE) {
1502 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1503 } else {
1504 idx = 0;
1505 }
1506
1507 pdesc = &ring->desc[idx];
1508 if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
207b58fb 1509 RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d,%x",
ecdfa446 1510 tcb_desc->queue_index,ring->idx, idx,skb->len);
65a43784 1511 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446
GKH		 1512 return skb->len;
1513 }
1514
1515 /* fill tx descriptor */
1516 memset((u8*)pdesc,0,12);
1517 /*DWORD 0*/
1518 pdesc->LINIP = 0;
1519 pdesc->CmdInit = 1;
1520 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; //We must add 8!! Emily
1521 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1522
1523 /*DWORD 1*/
1524 pdesc->SecCAMID= 0;
1525 pdesc->RATid = tcb_desc->RATRIndex;
1526
1527
1528 pdesc->NoEnc = 1;
1529 pdesc->SecType = 0x0;
1530 if (tcb_desc->bHwSec) {
ecdfa446
GKH		 1531 switch (priv->ieee80211->pairwise_key_type) {
1532 case KEY_TYPE_WEP40:
1533 case KEY_TYPE_WEP104:
1534 pdesc->SecType = 0x1;
1535 pdesc->NoEnc = 0;
1536 break;
1537 case KEY_TYPE_TKIP:
1538 pdesc->SecType = 0x2;
1539 pdesc->NoEnc = 0;
1540 break;
1541 case KEY_TYPE_CCMP:
1542 pdesc->SecType = 0x3;
1543 pdesc->NoEnc = 0;
1544 break;
1545 case KEY_TYPE_NA:
1546 pdesc->SecType = 0x0;
1547 pdesc->NoEnc = 1;
1548 break;
1549 }
1550 }
1551
1552 //
1553 // Set Packet ID
1554 //
1555 pdesc->PktId = 0x0;
1556
1557 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1558 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1559
1560 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1561 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
1562
1563 pdesc->FirstSeg =1;
1564 pdesc->LastSeg = 1;
1565 pdesc->TxBufferSize = skb->len;
1566
1567 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1568 __skb_queue_tail(&ring->queue, skb);
1569 pdesc->OWN = 1;
1570 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1571 dev->trans_start = jiffies;
1572 write_nic_word(dev,TPPoll,0x01<<tcb_desc->queue_index);
1573 return 0;
1574}
1575
5e1ad18a 1576static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
ecdfa446
GKH		 1577{
1578 struct r8192_priv *priv = ieee80211_priv(dev);
1579 rx_desc_819x_pci *entry = NULL;
1580 int i;
1581
1582 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1583 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1584
1585 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1586 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1587 return -ENOMEM;
1588 }
1589
1590 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1591 priv->rx_idx = 0;
1592
1593 for (i = 0; i < priv->rxringcount; i++) {
1594 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1595 dma_addr_t *mapping;
1596 entry = &priv->rx_ring[i];
1597 if (!skb)
1598 return 0;
1599 priv->rx_buf[i] = skb;
1600 mapping = (dma_addr_t *)skb->cb;
1c7ec2e8 1601 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
ecdfa446
GKH		 1602 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1603
1604 entry->BufferAddress = cpu_to_le32(*mapping);
1605
1606 entry->Length = priv->rxbuffersize;
1607 entry->OWN = 1;
1608 }
1609
1610 entry->EOR = 1;
1611 return 0;
1612}
1613
1614static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
1615 unsigned int prio, unsigned int entries)
1616{
1617 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1618 tx_desc_819x_pci *ring;
1619 dma_addr_t dma;
1620 int i;
1621
1622 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1623 if (!ring || (unsigned long)ring & 0xFF) {
1624 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1625 return -ENOMEM;
1626 }
1627
1628 memset(ring, 0, sizeof(*ring)*entries);
1629 priv->tx_ring[prio].desc = ring;
1630 priv->tx_ring[prio].dma = dma;
1631 priv->tx_ring[prio].idx = 0;
1632 priv->tx_ring[prio].entries = entries;
1633 skb_queue_head_init(&priv->tx_ring[prio].queue);
1634
1635 for (i = 0; i < entries; i++)
1636 ring[i].NextDescAddress =
1637 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1638
1639 return 0;
1640}
1641
1642
5e1ad18a 1643static short rtl8192_pci_initdescring(struct net_device *dev)
ecdfa446
GKH		 1644{
1645 u32 ret;
1646 int i;
1647 struct r8192_priv *priv = ieee80211_priv(dev);
1648
1649 ret = rtl8192_alloc_rx_desc_ring(dev);
1650 if (ret) {
1651 return ret;
1652 }
1653
1654
1655 /* general process for other queue */
1656 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
d6d42dfb
JP		 1657 ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount);
1658 if (ret)
ecdfa446
GKH		 1659 goto err_free_rings;
1660 }
1661
1662#if 0
1663 /* specific process for hardware beacon process */
d6d42dfb
JP		 1664 ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2);
1665 if (ret)
ecdfa446
GKH		 1666 goto err_free_rings;
1667#endif
1668
1669 return 0;
1670
1671err_free_rings:
1672 rtl8192_free_rx_ring(dev);
1673 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1674 if (priv->tx_ring[i].desc)
1675 rtl8192_free_tx_ring(dev, i);
1676 return 1;
1677}
1678
5e1ad18a 1679static void rtl8192_pci_resetdescring(struct net_device *dev)
ecdfa446
GKH		 1680{
1681 struct r8192_priv *priv = ieee80211_priv(dev);
1682 int i;
1683
1684 /* force the rx_idx to the first one */
1685 if(priv->rx_ring) {
1686 rx_desc_819x_pci *entry = NULL;
1687 for (i = 0; i < priv->rxringcount; i++) {
1688 entry = &priv->rx_ring[i];
1689 entry->OWN = 1;
1690 }
1691 priv->rx_idx = 0;
1692 }
1693
1694 /* after reset, release previous pending packet, and force the
1695 * tx idx to the first one */
1696 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1697 if (priv->tx_ring[i].desc) {
1698 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1699
1700 while (skb_queue_len(&ring->queue)) {
1701 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1702 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1703
1704 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1705 skb->len, PCI_DMA_TODEVICE);
1706 kfree_skb(skb);
1707 ring->idx = (ring->idx + 1) % ring->entries;
1708 }
1709 ring->idx = 0;
1710 }
1711 }
1712}
1713
5e1ad18a 1714static void rtl8192_link_change(struct net_device *dev)
ecdfa446 1715{
ecdfa446
GKH		 1716 struct r8192_priv *priv = ieee80211_priv(dev);
1717 struct ieee80211_device* ieee = priv->ieee80211;
1718 //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval);
1719 if (ieee->state == IEEE80211_LINKED)
1720 {
1721 rtl8192_net_update(dev);
1722 rtl8192_update_ratr_table(dev);
1723#if 1
1724 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1725 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1726 EnableHWSecurityConfig8192(dev);
1727#endif
1728 }
1729 else
1730 {
1731 write_nic_byte(dev, 0x173, 0);
1732 }
1733 /*update timing params*/
1734 //rtl8192_set_chan(dev, priv->chan);
1735 //MSR
1736 rtl8192_update_msr(dev);
1737
1738 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1739 // // To set CBSSID bit when link with any AP or STA.
1740 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1741 {
1742 u32 reg = 0;
1743 reg = read_nic_dword(dev, RCR);
1744 if (priv->ieee80211->state == IEEE80211_LINKED)
1745 priv->ReceiveConfig = reg |= RCR_CBSSID;
1746 else
1747 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1748 write_nic_dword(dev, RCR, reg);
1749 }
1750}
ecdfa446
GKH		 1751
1752
5b3b1a7b 1753static const struct ieee80211_qos_parameters def_qos_parameters = {
ecdfa446
GKH		 1754 {3,3,3,3},/* cw_min */
1755 {7,7,7,7},/* cw_max */
1756 {2,2,2,2},/* aifs */
1757 {0,0,0,0},/* flags */
1758 {0,0,0,0} /* tx_op_limit */
1759};
1760
5e1ad18a 1761static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1762{
1763 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1764 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1765 struct ieee80211_device* ieee = priv->ieee80211;
1766 struct ieee80211_network* net = &ieee->current_network;
1767
1768 if (ieee->pHTInfo->bCurrentHTSupport)
1769 HTUpdateSelfAndPeerSetting(ieee, net);
1770 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1771 rtl8192_update_cap(dev, net->capability);
1772}
214985a6 1773
ecdfa446
GKH		 1774/*
1775* background support to run QoS activate functionality
1776*/
881a975b 1777static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1778static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1779{
1780 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
1781 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1782 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1783 u8 mode = priv->ieee80211->current_network.mode;
ecdfa446
GKH		 1784 u8 u1bAIFS;
1785 u32 u4bAcParam;
1786 int i;
ecdfa446 1787
ecdfa446 1788 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1789 if(priv->ieee80211->state != IEEE80211_LINKED)
1790 goto success;
1791 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1792 /* It better set slot time at first */
1793 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1794 /* update the ac parameter to related registers */
1795 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1796 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1797 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1798 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1799 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1800 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1801 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
65a43784 1802 //printk("===>u4bAcParam:%x, ", u4bAcParam);
ecdfa446
GKH		 1803 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
1804 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
1805 }
1806
1807success:
ecdfa446 1808 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 1809}
1810
1811static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1812 int active_network,
1813 struct ieee80211_network *network)
1814{
1815 int ret = 0;
1816 u32 size = sizeof(struct ieee80211_qos_parameters);
1817
1818 if(priv->ieee80211->state !=IEEE80211_LINKED)
1819 return ret;
1820
1821 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1822 return ret;
1823
1824 if (network->flags & NETWORK_HAS_QOS_MASK) {
1825 if (active_network &&
1826 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1827 network->qos_data.active = network->qos_data.supported;
1828
1829 if ((network->qos_data.active == 1) && (active_network == 1) &&
1830 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1831 (network->qos_data.old_param_count !=
1832 network->qos_data.param_count)) {
1833 network->qos_data.old_param_count =
1834 network->qos_data.param_count;
ecdfa446 1835 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1836 RT_TRACE (COMP_QOS, "QoS parameters change call "
1837 "qos_activate\n");
1838 }
1839 } else {
207b58fb 1840 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1841 &def_qos_parameters, size);
1842
1843 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 1844 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1845 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
1846 }
1847 network->qos_data.active = 0;
1848 network->qos_data.supported = 0;
1849 }
1850
1851 return 0;
1852}
1853
1854/* handle manage frame frame beacon and probe response */
1855static int rtl8192_handle_beacon(struct net_device * dev,
1856 struct ieee80211_beacon * beacon,
1857 struct ieee80211_network * network)
1858{
1859 struct r8192_priv *priv = ieee80211_priv(dev);
1860
1861 rtl8192_qos_handle_probe_response(priv,1,network);
1862
ecdfa446 1863 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 1864 return 0;
1865
1866}
1867
1868/*
214985a6
MM		 1869 * handling the beaconing responses. if we get different QoS setting
1870 * off the network from the associated setting, adjust the QoS setting
1871 */
ecdfa446
GKH		 1872static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1873 struct ieee80211_network *network)
1874{
b72cb94f
MM		 1875 int ret = 0;
1876 unsigned long flags;
1877 u32 size = sizeof(struct ieee80211_qos_parameters);
1878 int set_qos_param = 0;
ecdfa446 1879
b72cb94f
MM		 1880 if ((priv == NULL) || (network == NULL))
1881 return ret;
ecdfa446 1882
b72cb94f
MM		 1883 if (priv->ieee80211->state != IEEE80211_LINKED)
1884 return ret;
ecdfa446 1885
b72cb94f
MM		 1886 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1887 return ret;
ecdfa446 1888
b72cb94f
MM		 1889 spin_lock_irqsave(&priv->ieee80211->lock, flags);
1890 if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
207b58fb
MM		 1891 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1892 &network->qos_data.parameters,
ecdfa446
GKH		 1893 sizeof(struct ieee80211_qos_parameters));
1894 priv->ieee80211->current_network.qos_data.active = 1;
b72cb94f
MM		 1895 set_qos_param = 1;
1896 /* update qos parameter for current network */
1897 priv->ieee80211->current_network.qos_data.old_param_count =
1898 priv->ieee80211->current_network.qos_data.param_count;
1899 priv->ieee80211->current_network.qos_data.param_count =
1900 network->qos_data.param_count;
1901
1902 } else {
207b58fb 1903 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1904 &def_qos_parameters, size);
1905 priv->ieee80211->current_network.qos_data.active = 0;
1906 priv->ieee80211->current_network.qos_data.supported = 0;
b72cb94f
MM		 1907 set_qos_param = 1;
1908 }
ecdfa446 1909
b72cb94f 1910 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
ecdfa446 1911
b72cb94f
MM		 1912 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
1913 network->flags, priv->ieee80211->current_network.qos_data.active);
ecdfa446 1914 if (set_qos_param == 1)
ecdfa446 1915 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446 1916
b72cb94f 1917 return ret;
ecdfa446
GKH		 1918}
1919
1920
1921static int rtl8192_handle_assoc_response(struct net_device *dev,
1922 struct ieee80211_assoc_response_frame *resp,
1923 struct ieee80211_network *network)
1924{
1925 struct r8192_priv *priv = ieee80211_priv(dev);
1926 rtl8192_qos_association_resp(priv, network);
1927 return 0;
1928}
1929
1930
214985a6 1931/* updateRATRTabel for MCS only. Basic rate is not implemented. */
5b3b1a7b 1932static void rtl8192_update_ratr_table(struct net_device* dev)
ecdfa446
GKH		 1933{
1934 struct r8192_priv* priv = ieee80211_priv(dev);
1935 struct ieee80211_device* ieee = priv->ieee80211;
1936 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
ecdfa446
GKH		 1937 u32 ratr_value = 0;
1938 u8 rate_index = 0;
1939
1940 rtl8192_config_rate(dev, (u16*)(&ratr_value));
1941 ratr_value |= (*(u16*)(pMcsRate)) << 12;
16d74da0 1942
ecdfa446
GKH		 1943 switch (ieee->mode)
1944 {
1945 case IEEE_A:
1946 ratr_value &= 0x00000FF0;
1947 break;
1948 case IEEE_B:
1949 ratr_value &= 0x0000000F;
1950 break;
1951 case IEEE_G:
1952 ratr_value &= 0x00000FF7;
1953 break;
1954 case IEEE_N_24G:
1955 case IEEE_N_5G:
1956 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1957 ratr_value &= 0x0007F007;
1958 else{
1959 if (priv->rf_type == RF_1T2R)
1960 ratr_value &= 0x000FF007;
1961 else
1962 ratr_value &= 0x0F81F007;
1963 }
1964 break;
1965 default:
1966 break;
1967 }
1968 ratr_value &= 0x0FFFFFFF;
1969 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1970 ratr_value |= 0x80000000;
1971 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1972 ratr_value |= 0x80000000;
1973 }
1974 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
1975 write_nic_byte(dev, UFWP, 1);
1976}
1977
5e1ad18a 1978static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446 1979{
65a43784 1980 struct r8192_priv *priv = ieee80211_priv(dev);
1981 struct ieee80211_device *ieee = priv->ieee80211;
ecdfa446 1982
f8acdc3d
MM		 1983 return !(ieee->rtllib_ap_sec_type &&
1984 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
ecdfa446
GKH		 1985}
1986
5e1ad18a 1987static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 1988{
1989 struct ieee80211_device* ieee = priv->ieee80211;
1990 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
1991 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
1992 {
1993 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
1994 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
1995 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
1996 }
1997 else
1998 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
ecdfa446
GKH		 1999}
2000
5e1ad18a 2001static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
ecdfa446
GKH		 2002{
2003 struct r8192_priv *priv = ieee80211_priv(dev);
2004 u8 ret = 0;
2005 switch(priv->rf_chip)
2006 {
2007 case RF_8225:
2008 case RF_8256:
2009 case RF_PSEUDO_11N:
2010 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2011 break;
2012 case RF_8258:
2013 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2014 break;
2015 default:
2016 ret = WIRELESS_MODE_B;
2017 break;
2018 }
2019 return ret;
2020}
5e1ad18a
GKH		 2021
2022static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 2023{
2024 struct r8192_priv *priv = ieee80211_priv(dev);
2025 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2026
2027#if 1
2028 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2029 {
2030 if(bSupportMode & WIRELESS_MODE_N_24G)
2031 {
2032 wireless_mode = WIRELESS_MODE_N_24G;
2033 }
2034 else if(bSupportMode & WIRELESS_MODE_N_5G)
2035 {
2036 wireless_mode = WIRELESS_MODE_N_5G;
2037 }
2038 else if((bSupportMode & WIRELESS_MODE_A))
2039 {
2040 wireless_mode = WIRELESS_MODE_A;
2041 }
2042 else if((bSupportMode & WIRELESS_MODE_G))
2043 {
2044 wireless_mode = WIRELESS_MODE_G;
2045 }
2046 else if((bSupportMode & WIRELESS_MODE_B))
2047 {
2048 wireless_mode = WIRELESS_MODE_B;
2049 }
2050 else{
2051 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2052 wireless_mode = WIRELESS_MODE_B;
2053 }
2054 }
39cfb97b 2055#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA
ecdfa446
GKH		 2056 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2057#endif
2058 priv->ieee80211->mode = wireless_mode;
2059
2060 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2061 priv->ieee80211->pHTInfo->bEnableHT = 1;
2062 else
2063 priv->ieee80211->pHTInfo->bEnableHT = 0;
2064 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2065 rtl8192_refresh_supportrate(priv);
2066#endif
2067
2068}
ecdfa446 2069
5e1ad18a 2070static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446 2071{
ecdfa446
GKH		 2072 struct r8192_priv* priv = ieee80211_priv(dev);
2073 struct ieee80211_device* ieee = priv->ieee80211;
2074
285f660c 2075 return ieee->bHalfWirelessN24GMode;
ecdfa446
GKH		 2076}
2077
2078short rtl8192_is_tx_queue_empty(struct net_device *dev)
2079{
2080 int i=0;
2081 struct r8192_priv *priv = ieee80211_priv(dev);
2082 for (i=0; i<=MGNT_QUEUE; i++)
2083 {
2084 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2085 continue;
2086 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
2087 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
2088 return 0;
2089 }
2090 }
2091 return 1;
2092}
16d74da0 2093
5e1ad18a 2094static void rtl8192_hw_sleep_down(struct net_device *dev)
ecdfa446 2095{
65a43784 2096 struct r8192_priv *priv = ieee80211_priv(dev);
2097 unsigned long flags = 0;
2098
2099 spin_lock_irqsave(&priv->rf_ps_lock,flags);
2100 if (priv->RFChangeInProgress) {
2101 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
2102 RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n");
2103 printk("rtl8192_hw_sleep_down(): RF Change in progress!\n");
2104 return;
2105 }
2106 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
65a43784 2107
ecdfa446
GKH		 2108 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
2109}
16d74da0 2110
5e1ad18a 2111static void rtl8192_hw_sleep_wq (struct work_struct *work)
ecdfa446 2112{
ecdfa446
GKH		 2113 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2114 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
2115 struct net_device *dev = ieee->dev;
65a43784 2116
ecdfa446
GKH		 2117 rtl8192_hw_sleep_down(dev);
2118}
65a43784 2119
5e1ad18a 2120static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446 2121{
65a43784 2122 struct r8192_priv *priv = ieee80211_priv(dev);
2123 unsigned long flags = 0;
2124
2125 spin_lock_irqsave(&priv->rf_ps_lock,flags);
2126 if (priv->RFChangeInProgress) {
2127 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
2128 RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n");
2129 printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n");
2130 queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20
2131 return;
2132 }
2133 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
ecdfa446 2134
ecdfa446 2135 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
ecdfa446 2136}
65a43784 2137
ecdfa446
GKH		 2138void rtl8192_hw_wakeup_wq (struct work_struct *work)
2139{
ecdfa446
GKH		 2140 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
2141 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
2142 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 2143 rtl8192_hw_wakeup(dev);
2144
2145}
2146
2147#define MIN_SLEEP_TIME 50
2148#define MAX_SLEEP_TIME 10000
5e1ad18a 2149static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446 2150{
ecdfa446
GKH		 2151 struct r8192_priv *priv = ieee80211_priv(dev);
2152
2153 u32 rb = jiffies;
2154 unsigned long flags;
2155
2156 spin_lock_irqsave(&priv->ps_lock,flags);
2157
65a43784 2158 // Writing HW register with 0 equals to disable
2159 // the timer, that is not really what we want
2160 //
2161 tl -= MSECS(8+16+7);
ecdfa446 2162
65a43784 2163 // If the interval in witch we are requested to sleep is too
2164 // short then give up and remain awake
2165 // when we sleep after send null frame, the timer will be too short to sleep.
2166 //
ecdfa446 2167 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
65a43784 2168 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
ecdfa446 2169 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 2170 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
ecdfa446
GKH		 2171 return;
2172 }
2173
ecdfa446 2174 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
65a43784 2175 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
2176 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
ecdfa446
GKH		 2177 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
2178 spin_unlock_irqrestore(&priv->ps_lock,flags);
2179 return;
2180 }
65a43784 2181 {
2182 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
2183 queue_delayed_work(priv->ieee80211->wq,
2184 &priv->ieee80211->hw_wakeup_wq,tmp);
2185 //PowerSave not supported when kernel version less 2.6.20
2186 }
2187 queue_delayed_work(priv->ieee80211->wq,
2188 (void *)&priv->ieee80211->hw_sleep_wq,0);
ecdfa446 2189 spin_unlock_irqrestore(&priv->ps_lock,flags);
65a43784 2190
ecdfa446 2191}
214985a6 2192
ecdfa446
GKH		 2193static void rtl8192_init_priv_variable(struct net_device* dev)
2194{
2195 struct r8192_priv *priv = ieee80211_priv(dev);
2196 u8 i;
65a43784 2197 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
2198
2199 // Default Halt the NIC if RF is OFF.
2200 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
2201 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
2202 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
2203 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
2204 pPSC->bLeisurePs = true;
2205 pPSC->RegMaxLPSAwakeIntvl = 5;
2206 priv->bHwRadioOff = false;
2207
ecdfa446
GKH		 2208 priv->being_init_adapter = false;
2209 priv->txbuffsize = 1600;//1024;
2210 priv->txfwbuffersize = 4096;
2211 priv->txringcount = 64;//32;
2212 //priv->txbeaconcount = priv->txringcount;
2213 priv->txbeaconcount = 2;
2214 priv->rxbuffersize = 9100;//2048;//1024;
2215 priv->rxringcount = MAX_RX_COUNT;//64;
2216 priv->irq_enabled=0;
2217 priv->card_8192 = NIC_8192E;
2218 priv->rx_skb_complete = 1;
2219 priv->chan = 1; //set to channel 1
2220 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
2221 priv->RegChannelPlan = 0xf;
2222 priv->nrxAMPDU_size = 0;
2223 priv->nrxAMPDU_aggr_num = 0;
2224 priv->last_rxdesc_tsf_high = 0;
2225 priv->last_rxdesc_tsf_low = 0;
2226 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
2227 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2228 priv->ieee80211->ieee_up=0;
2229 priv->retry_rts = DEFAULT_RETRY_RTS;
2230 priv->retry_data = DEFAULT_RETRY_DATA;
2231 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
2232 priv->ieee80211->rate = 110; //11 mbps
2233 priv->ieee80211->short_slot = 1;
2234 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
2235 priv->bcck_in_ch14 = false;
2236 priv->bfsync_processing = false;
2237 priv->CCKPresentAttentuation = 0;
2238 priv->rfa_txpowertrackingindex = 0;
2239 priv->rfc_txpowertrackingindex = 0;
2240 priv->CckPwEnl = 6;
2241 priv->ScanDelay = 50;//for Scan TODO
2242 //added by amy for silent reset
2243 priv->ResetProgress = RESET_TYPE_NORESET;
2244 priv->bForcedSilentReset = 0;
2245 priv->bDisableNormalResetCheck = false;
2246 priv->force_reset = false;
2247 //added by amy for power save
2248 priv->RegRfOff = 0;
2249 priv->ieee80211->RfOffReason = 0;
2250 priv->RFChangeInProgress = false;
2251 priv->bHwRfOffAction = 0;
2252 priv->SetRFPowerStateInProgress = false;
2253 priv->ieee80211->PowerSaveControl.bInactivePs = true;
2254 priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
2255 //just for debug
2256 priv->txpower_checkcnt = 0;
2257 priv->thermal_readback_index =0;
2258 priv->txpower_tracking_callback_cnt = 0;
2259 priv->ccktxpower_adjustcnt_ch14 = 0;
2260 priv->ccktxpower_adjustcnt_not_ch14 = 0;
2261
2262 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2263 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2264 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2265 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2266 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
2267 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
2268
2269 priv->ieee80211->active_scan = 1;
2270 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
2271 priv->ieee80211->host_encrypt = 1;
2272 priv->ieee80211->host_decrypt = 1;
2273 //priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
2274 //priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
2275 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
2276 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
2277 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
2278 priv->ieee80211->set_chan = rtl8192_set_chan;
2279 priv->ieee80211->link_change = rtl8192_link_change;
2280 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
2281 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
2282 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
2283 priv->ieee80211->init_wmmparam_flag = 0;
2284 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2285 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
2286 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2287 priv->ieee80211->qos_support = 1;
2288 priv->ieee80211->dot11PowerSaveMode = 0;
2289 //added by WB
2290// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
2291 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
2292 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
2293 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
2294
2295 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
2296// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
2297 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
2298 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
2299 //added by david
2300 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
2301 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
2302 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
2303
2304 //added by amy
2305 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
2306
65a43784 2307#ifdef ENABLE_IPS
2308 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
2309 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
2310#endif
2311#ifdef ENABLE_LPS
2312 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
16d74da0 2313#endif
65a43784 2314
2315 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
2316 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
2317
ecdfa446
GKH		 2318 priv->card_type = USB;
2319 {
2320 priv->ShortRetryLimit = 0x30;
2321 priv->LongRetryLimit = 0x30;
2322 }
2323 priv->EarlyRxThreshold = 7;
2324 priv->enable_gpio0 = 0;
2325
2326 priv->TransmitConfig = 0;
2327
2328 priv->ReceiveConfig = RCR_ADD3 |
2329 RCR_AMF | RCR_ADF | //accept management/data
2330 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
2331 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
2332 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2333 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2334
207b58fb
MM		 2335 priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
2336 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
2337 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
ecdfa446
GKH		 2338 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2339
2340 priv->AcmControl = 0;
2341 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
2342 if (priv->pFirmware)
2343 memset(priv->pFirmware, 0, sizeof(rt_firmware));
2344
2345 /* rx related queue */
2346 skb_queue_head_init(&priv->rx_queue);
2347 skb_queue_head_init(&priv->skb_queue);
2348
2349 /* Tx related queue */
2350 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2351 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
2352 }
2353 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2354 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
2355 }
2356 priv->rf_set_chan = rtl8192_phy_SwChnl;
2357}
2358
ecdfa446
GKH		 2359static void rtl8192_init_priv_lock(struct r8192_priv* priv)
2360{
2361 spin_lock_init(&priv->tx_lock);
2362 spin_lock_init(&priv->irq_lock);//added by thomas
2363 spin_lock_init(&priv->irq_th_lock);
2364 spin_lock_init(&priv->rf_ps_lock);
2365 spin_lock_init(&priv->ps_lock);
2366 //spin_lock_init(&priv->rf_lock);
2367 sema_init(&priv->wx_sem,1);
2368 sema_init(&priv->rf_sem,1);
ecdfa446 2369 mutex_init(&priv->mutex);
ecdfa446
GKH		 2370}
2371
214985a6 2372/* init tasklet and wait_queue here */
ecdfa446
GKH		 2373#define DRV_NAME "wlan0"
2374static void rtl8192_init_priv_task(struct net_device* dev)
2375{
2376 struct r8192_priv *priv = ieee80211_priv(dev);
2377
ecdfa446
GKH		 2378#ifdef PF_SYNCTHREAD
2379 priv->priv_wq = create_workqueue(DRV_NAME,0);
2380#else
2381 priv->priv_wq = create_workqueue(DRV_NAME);
2382#endif
ecdfa446 2383
65a43784 2384#ifdef ENABLE_IPS
2385 INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq);
2386#endif
2387
ecdfa446
GKH		 2388// INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart);
2389 INIT_WORK(&priv->reset_wq, rtl8192_restart);
2390// INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
2391 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2392 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2393 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2394 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
2395 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
2396 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
2397 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
2398 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
2399 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
2400
ecdfa446
GKH		 2401 tasklet_init(&priv->irq_rx_tasklet,
2402 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
2403 (unsigned long)priv);
2404 tasklet_init(&priv->irq_tx_tasklet,
2405 (void(*)(unsigned long))rtl8192_irq_tx_tasklet,
2406 (unsigned long)priv);
2407 tasklet_init(&priv->irq_prepare_beacon_tasklet,
2408 (void(*)(unsigned long))rtl8192_prepare_beacon,
2409 (unsigned long)priv);
2410}
2411
2412static void rtl8192_get_eeprom_size(struct net_device* dev)
2413{
2414 u16 curCR = 0;
2415 struct r8192_priv *priv = ieee80211_priv(dev);
2416 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
2417 curCR = read_nic_dword(dev, EPROM_CMD);
2418 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2419 //whether need I consider BIT5?
2420 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2421 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2422}
2423
214985a6
MM		 2424/*
2425 * used to swap endian. as ntohl & htonl are not
2426 * neccessary to swap endian, so use this instead.
2427 */
ecdfa446
GKH		 2428static inline u16 endian_swap(u16* data)
2429{
2430 u16 tmp = *data;
2431 *data = (tmp >> 8) | (tmp << 8);
2432 return *data;
2433}
2434
2435/*
214985a6
MM		 2436 * Adapter->EEPROMAddressSize should be set before this function call.
2437 * EEPROM address size can be got through GetEEPROMSize8185()
2438 */
ecdfa446
GKH		 2439static void rtl8192_read_eeprom_info(struct net_device* dev)
2440{
2441 struct r8192_priv *priv = ieee80211_priv(dev);
2442
2443 u8 tempval;
2444#ifdef RTL8192E
2445 u8 ICVer8192, ICVer8256;
2446#endif
2447 u16 i,usValue, IC_Version;
2448 u16 EEPROMId;
2449#ifdef RTL8190P
16d74da0 2450 u8 offset;
ecdfa446
GKH		 2451 u8 EepromTxPower[100];
2452#endif
2453 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2454 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2455
2456
2457 // TODO: I don't know if we need to apply EF function to EEPROM read function
2458
2459 //2 Read EEPROM ID to make sure autoload is success
2460 EEPROMId = eprom_read(dev, 0);
2461 if( EEPROMId != RTL8190_EEPROM_ID )
2462 {
2463 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2464 priv->AutoloadFailFlag=true;
2465 }
2466 else
2467 {
2468 priv->AutoloadFailFlag=false;
2469 }
2470
2471 //
2472 // Assign Chip Version ID
2473 //
2474 // Read IC Version && Channel Plan
2475 if(!priv->AutoloadFailFlag)
2476 {
2477 // VID, PID
2478 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
2479 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
2480
2481 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2482 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2483 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
2484 priv->eeprom_ChannelPlan = usValue&0xff;
2485 IC_Version = ((usValue&0xff00)>>8);
2486
2487#ifdef RTL8190P
2488 priv->card_8192_version = (VERSION_8190)(IC_Version);
2489#else
2490 #ifdef RTL8192E
2491 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2492 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2493 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
2494 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
2495 if(ICVer8192 == 0x2) //B-cut
2496 {
2497 if(ICVer8256 == 0x5) //E-cut
2498 priv->card_8192_version= VERSION_8190_BE;
2499 }
2500 #endif
2501#endif
2502 switch(priv->card_8192_version)
2503 {
2504 case VERSION_8190_BD:
2505 case VERSION_8190_BE:
2506 break;
2507 default:
2508 priv->card_8192_version = VERSION_8190_BD;
2509 break;
2510 }
2511 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2512 }
2513 else
2514 {
2515 priv->card_8192_version = VERSION_8190_BD;
2516 priv->eeprom_vid = 0;
2517 priv->eeprom_did = 0;
2518 priv->eeprom_CustomerID = 0;
2519 priv->eeprom_ChannelPlan = 0;
2520 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
2521 }
2522
2523 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2524 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2525 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2526
2527 //2 Read Permanent MAC address
2528 if(!priv->AutoloadFailFlag)
2529 {
2530 for(i = 0; i < 6; i += 2)
2531 {
2532 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2533 *(u16*)(&dev->dev_addr[i]) = usValue;
2534 }
2535 } else {
2536 // when auto load failed, the last address byte set to be a random one.
2537 // added by david woo.2007/11/7
2538 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2539 }
2540
820793c3 2541 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
ecdfa446
GKH		 2542
2543 //2 TX Power Check EEPROM Fail or not
2544 if(priv->card_8192_version > VERSION_8190_BD) {
2545 priv->bTXPowerDataReadFromEEPORM = true;
2546 } else {
2547 priv->bTXPowerDataReadFromEEPORM = false;
2548 }
2549
bbc9a991 2550 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
ecdfa446
GKH		 2551 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2552
2553 if(priv->card_8192_version > VERSION_8190_BD)
2554 {
2555 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2556 if(!priv->AutoloadFailFlag)
2557 {
2558 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2559 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2560
2561 if (tempval&0x80) //RF-indication, bit[7]
2562 priv->rf_type = RF_1T2R;
2563 else
2564 priv->rf_type = RF_2T4R;
2565 }
2566 else
2567 {
2568 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2569 }
2570 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2571 priv->EEPROMLegacyHTTxPowerDiff);
2572
2573 // Read ThermalMeter from EEPROM
2574 if(!priv->AutoloadFailFlag)
2575 {
2576 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2577 }
2578 else
2579 {
2580 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2581 }
2582 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2583 //vivi, for tx power track
2584 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2585
2586 if(priv->epromtype == EPROM_93c46)
2587 {
2588 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2589 if(!priv->AutoloadFailFlag)
2590 {
2591 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
2592 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2593 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2594 }
2595 else
2596 {
2597 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2598 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2599 }
2600 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2601 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2602
2603 //
2604 // Get per-channel Tx Power Level
2605 //
2606 for(i=0; i<14; i+=2)
2607 {
2608 if(!priv->AutoloadFailFlag)
2609 {
2610 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2611 }
2612 else
2613 {
2614 usValue = EEPROM_Default_TxPower;
2615 }
2616 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2617 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2618 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2619 }
2620 for(i=0; i<14; i+=2)
2621 {
2622 if(!priv->AutoloadFailFlag)
2623 {
2624 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2625 }
2626 else
2627 {
2628 usValue = EEPROM_Default_TxPower;
2629 }
2630 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2631 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2632 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2633 }
2634 }
2635 else if(priv->epromtype== EPROM_93c56)
2636 {
2637 #ifdef RTL8190P
2638 // Read CrystalCap from EEPROM
2639 if(!priv->AutoloadFailFlag)
2640 {
2641 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2642 priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12);
2643 }
2644 else
2645 {
2646 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2647 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2648 }
2649 RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2650 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2651
2652 // Get Tx Power Level by Channel
2653 if(!priv->AutoloadFailFlag)
2654 {
2655 // Read Tx power of Channel 1 ~ 14 from EEPROM.
2656 for(i = 0; i < 12; i+=2)
2657 {
2658 if (i <6)
2659 offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i;
2660 else
2661 offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6;
2662 usValue = eprom_read(dev, (offset>>1));
2663 *((u16*)(&EepromTxPower[i])) = usValue;
2664 }
2665
2666 for(i = 0; i < 12; i++)
2667 {
2668 if (i <= 2)
2669 priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i];
2670 else if ((i >=3 )&&(i <= 5))
2671 priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i];
2672 else if ((i >=6 )&&(i <= 8))
2673 priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i];
2674 else
2675 priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i];
2676 }
2677 }
2678 else
2679 {
2680 priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2681 priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2682 priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2683
2684 priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2685 priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2686 priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2687
2688 priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2689 priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2690 priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2691
2692 priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
2693 priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
2694 priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
2695 }
2696 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]);
2697 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]);
2698 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]);
2699 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]);
2700 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]);
2701 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]);
2702 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]);
2703 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]);
2704 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]);
2705 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]);
2706 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]);
2707 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]);
2708#endif
2709
2710 }
2711 //
2712 // Update HAL variables.
2713 //
2714 if(priv->epromtype == EPROM_93c46)
2715 {
2716 for(i=0; i<14; i++)
2717 {
2718 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2719 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2720 }
2721 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2722 // Antenna B gain offset to antenna A, bit0~3
2723 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2724 // Antenna C gain offset to antenna A, bit4~7
2725 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2726 // Antenna D gain offset to antenna A, bit8~11
2727 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2728 // CrystalCap, bit12~15
2729 priv->CrystalCap = priv->EEPROMCrystalCap;
2730 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2731 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2732 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2733 }
2734 else if(priv->epromtype == EPROM_93c56)
2735 {
2736 //char cck_pwr_diff_a=0, cck_pwr_diff_c=0;
2737
2738 //cck_pwr_diff_a = pHalData->EEPROMRfACCKChnl7TxPwLevel - pHalData->EEPROMRfAOfdmChnlTxPwLevel[1];
2739 //cck_pwr_diff_c = pHalData->EEPROMRfCCCKChnl7TxPwLevel - pHalData->EEPROMRfCOfdmChnlTxPwLevel[1];
2740 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2741 {
2742 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2743 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2744 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2745 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2746 }
2747 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2748 {
2749 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2750 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2751 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2752 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2753 }
2754 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2755 {
2756 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2757 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2758 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2759 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2760 }
2761 for(i=0; i<14; i++)
2762 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2763 for(i=0; i<14; i++)
2764 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2765 for(i=0; i<14; i++)
2766 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2767 for(i=0; i<14; i++)
2768 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2769 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2770 priv->AntennaTxPwDiff[0] = 0;
2771 priv->AntennaTxPwDiff[1] = 0;
2772 priv->AntennaTxPwDiff[2] = 0;
2773 priv->CrystalCap = priv->EEPROMCrystalCap;
2774 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2775 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2776 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2777 }
2778 }
2779
2780 if(priv->rf_type == RF_1T2R)
2781 {
2782 RT_TRACE(COMP_INIT, "\n1T2R config\n");
2783 }
2784 else if (priv->rf_type == RF_2T4R)
2785 {
2786 RT_TRACE(COMP_INIT, "\n2T4R config\n");
2787 }
2788
2789 // 2008/01/16 MH We can only know RF type in the function. So we have to init
2790 // DIG RATR table again.
2791 init_rate_adaptive(dev);
2792
2793 //1 Make a copy for following variables and we can change them if we want
2794
2795 priv->rf_chip= RF_8256;
2796
2797 if(priv->RegChannelPlan == 0xf)
2798 {
2799 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2800 }
2801 else
2802 {
2803 priv->ChannelPlan = priv->RegChannelPlan;
2804 }
2805
2806 //
2807 // Used PID and DID to Set CustomerID
2808 //
2809 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2810 {
2811 priv->CustomerID = RT_CID_DLINK;
2812 }
2813
2814 switch(priv->eeprom_CustomerID)
2815 {
2816 case EEPROM_CID_DEFAULT:
2817 priv->CustomerID = RT_CID_DEFAULT;
2818 break;
2819 case EEPROM_CID_CAMEO:
2820 priv->CustomerID = RT_CID_819x_CAMEO;
2821 break;
2822 case EEPROM_CID_RUNTOP:
2823 priv->CustomerID = RT_CID_819x_RUNTOP;
2824 break;
2825 case EEPROM_CID_NetCore:
2826 priv->CustomerID = RT_CID_819x_Netcore;
2827 break;
2828 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2829 priv->CustomerID = RT_CID_TOSHIBA;
2830 if(priv->eeprom_ChannelPlan&0x80)
2831 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2832 else
2833 priv->ChannelPlan = 0x0;
2834 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2835 priv->ChannelPlan);
2836 break;
2837 case EEPROM_CID_Nettronix:
2838 priv->ScanDelay = 100; //cosa add for scan
2839 priv->CustomerID = RT_CID_Nettronix;
2840 break;
2841 case EEPROM_CID_Pronet:
2842 priv->CustomerID = RT_CID_PRONET;
2843 break;
2844 case EEPROM_CID_DLINK:
2845 priv->CustomerID = RT_CID_DLINK;
2846 break;
2847
2848 case EEPROM_CID_WHQL:
2849 //Adapter->bInHctTest = TRUE;//do not supported
2850
2851 //priv->bSupportTurboMode = FALSE;
2852 //priv->bAutoTurboBy8186 = FALSE;
2853
2854 //pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
2855 //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
2856 //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
2857
2858 break;
2859 default:
2860 // value from RegCustomerID
2861 break;
2862 }
2863
2864 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2865 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2866 priv->ChannelPlan = 0; //FCC
2867
2868 switch(priv->CustomerID)
2869 {
2870 case RT_CID_DEFAULT:
2871 #ifdef RTL8190P
2872 priv->LedStrategy = HW_LED;
2873 #else
2874 #ifdef RTL8192E
2875 priv->LedStrategy = SW_LED_MODE1;
2876 #endif
2877 #endif
2878 break;
2879
2880 case RT_CID_819x_CAMEO:
2881 priv->LedStrategy = SW_LED_MODE2;
2882 break;
2883
2884 case RT_CID_819x_RUNTOP:
2885 priv->LedStrategy = SW_LED_MODE3;
2886 break;
2887
2888 case RT_CID_819x_Netcore:
2889 priv->LedStrategy = SW_LED_MODE4;
2890 break;
2891
2892 case RT_CID_Nettronix:
2893 priv->LedStrategy = SW_LED_MODE5;
2894 break;
2895
2896 case RT_CID_PRONET:
2897 priv->LedStrategy = SW_LED_MODE6;
2898 break;
2899
2900 case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
2901 // Do nothing.
2902 //break;
2903
2904 default:
2905 #ifdef RTL8190P
2906 priv->LedStrategy = HW_LED;
2907 #else
2908 #ifdef RTL8192E
2909 priv->LedStrategy = SW_LED_MODE1;
2910 #endif
2911 #endif
2912 break;
2913 }
65a43784 2914
2915
ecdfa446 2916 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
65a43784 2917 priv->ieee80211->bSupportRemoteWakeUp = true;
ecdfa446 2918 else
65a43784 2919 priv->ieee80211->bSupportRemoteWakeUp = false;
2920
2921
ecdfa446
GKH		 2922 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
2923 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
2924 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
2925 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
2926
2927 return ;
2928}
2929
2930
5e1ad18a 2931static short rtl8192_get_channel_map(struct net_device * dev)
ecdfa446
GKH		 2932{
2933 struct r8192_priv *priv = ieee80211_priv(dev);
2934#ifdef ENABLE_DOT11D
2935 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2936 printk("rtl8180_init:Error channel plan! Set to default.\n");
2937 priv->ChannelPlan= 0;
2938 }
2939 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2940
2941 rtl819x_set_channel_map(priv->ChannelPlan, priv);
2942#else
2943 int ch,i;
2944 //Set Default Channel Plan
2945 if(!channels){
2946 DMESG("No channels, aborting");
2947 return -1;
2948 }
2949 ch=channels;
2950 priv->ChannelPlan= 0;//hikaru
2951 // set channels 1..14 allowed in given locale
2952 for (i=1; i<=14; i++) {
2953 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2954 ch >>= 1;
2955 }
2956#endif
2957 return 0;
2958}
5e1ad18a
GKH		 2959
2960static short rtl8192_init(struct net_device *dev)
ecdfa446
GKH		 2961{
2962 struct r8192_priv *priv = ieee80211_priv(dev);
2963 memset(&(priv->stats),0,sizeof(struct Stats));
2964 rtl8192_init_priv_variable(dev);
2965 rtl8192_init_priv_lock(priv);
2966 rtl8192_init_priv_task(dev);
2967 rtl8192_get_eeprom_size(dev);
2968 rtl8192_read_eeprom_info(dev);
2969 rtl8192_get_channel_map(dev);
2970 init_hal_dm(dev);
2971 init_timer(&priv->watch_dog_timer);
2972 priv->watch_dog_timer.data = (unsigned long)dev;
2973 priv->watch_dog_timer.function = watch_dog_timer_callback;
2974#if defined(IRQF_SHARED)
2975 if(request_irq(dev->irq, (void*)rtl8192_interrupt, IRQF_SHARED, dev->name, dev)){
2976#else
2977 if(request_irq(dev->irq, (void *)rtl8192_interrupt, SA_SHIRQ, dev->name, dev)){
2978#endif
2979 printk("Error allocating IRQ %d",dev->irq);
2980 return -1;
2981 }else{
2982 priv->irq=dev->irq;
2983 printk("IRQ %d",dev->irq);
2984 }
2985 if(rtl8192_pci_initdescring(dev)!=0){
2986 printk("Endopoints initialization failed");
2987 return -1;
2988 }
2989
2990 //rtl8192_rx_enable(dev);
2991 //rtl8192_adapter_start(dev);
ecdfa446
GKH		 2992 return 0;
2993}
2994
214985a6
MM		 2995/*
2996 * Actually only set RRSR, RATR and BW_OPMODE registers
2997 * not to do all the hw config as its name says
2998 * This part need to modified according to the rate set we filtered
2999 */
5e1ad18a 3000static void rtl8192_hwconfig(struct net_device* dev)
ecdfa446
GKH		 3001{
3002 u32 regRATR = 0, regRRSR = 0;
3003 u8 regBwOpMode = 0, regTmp = 0;
3004 struct r8192_priv *priv = ieee80211_priv(dev);
3005
3006// Set RRSR, RATR, and BW_OPMODE registers
3007 //
3008 switch(priv->ieee80211->mode)
3009 {
3010 case WIRELESS_MODE_B:
3011 regBwOpMode = BW_OPMODE_20MHZ;
3012 regRATR = RATE_ALL_CCK;
3013 regRRSR = RATE_ALL_CCK;
3014 break;
3015 case WIRELESS_MODE_A:
3016 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
3017 regRATR = RATE_ALL_OFDM_AG;
3018 regRRSR = RATE_ALL_OFDM_AG;
3019 break;
3020 case WIRELESS_MODE_G:
3021 regBwOpMode = BW_OPMODE_20MHZ;
3022 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3023 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3024 break;
3025 case WIRELESS_MODE_AUTO:
3026 case WIRELESS_MODE_N_24G:
3027 // It support CCK rate by default.
3028 // CCK rate will be filtered out only when associated AP does not support it.
3029 regBwOpMode = BW_OPMODE_20MHZ;
3030 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3031 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
3032 break;
3033 case WIRELESS_MODE_N_5G:
3034 regBwOpMode = BW_OPMODE_5G;
3035 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
3036 regRRSR = RATE_ALL_OFDM_AG;
3037 break;
3038 }
3039
3040 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
3041 {
3042 u32 ratr_value = 0;
3043 ratr_value = regRATR;
3044 if (priv->rf_type == RF_1T2R)
3045 {
3046 ratr_value &= ~(RATE_ALL_OFDM_2SS);
3047 }
3048 write_nic_dword(dev, RATR0, ratr_value);
3049 write_nic_byte(dev, UFWP, 1);
3050 }
3051 regTmp = read_nic_byte(dev, 0x313);
3052 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3053 write_nic_dword(dev, RRSR, regRRSR);
3054
3055 //
3056 // Set Retry Limit here
3057 //
3058 write_nic_word(dev, RETRY_LIMIT,
207b58fb 3059 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
ecdfa446
GKH		 3060 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
3061 // Set Contention Window here
3062
3063 // Set Tx AGC
3064
3065 // Set Tx Antenna including Feedback control
3066
3067 // Set Auto Rate fallback control
3068
3069
3070}
3071
3072
5e1ad18a 3073static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
ecdfa446
GKH		 3074{
3075 struct r8192_priv *priv = ieee80211_priv(dev);
3076// struct ieee80211_device *ieee = priv->ieee80211;
3077 u32 ulRegRead;
3078 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
ecdfa446
GKH		 3079 //u8 eRFPath;
3080 u8 tmpvalue;
3081#ifdef RTL8192E
3082 u8 ICVersion,SwitchingRegulatorOutput;
3083#endif
3084 bool bfirmwareok = true;
3085#ifdef RTL8190P
3086 u8 ucRegRead;
3087#endif
3088 u32 tmpRegA, tmpRegC, TempCCk;
3089 int i =0;
ecdfa446
GKH		 3090
3091 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
3092 priv->being_init_adapter = true;
3093 rtl8192_pci_resetdescring(dev);
3094 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
3095 priv->Rf_Mode = RF_OP_By_SW_3wire;
3096#ifdef RTL8192E
3097 //dPLL on
3098 if(priv->ResetProgress == RESET_TYPE_NORESET)
3099 {
3100 write_nic_byte(dev, ANAPAR, 0x37);
3101 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
3102 // Joseph increae the time to prevent firmware download fail
3103 mdelay(500);
3104 }
3105#endif
3106 //PlatformSleepUs(10000);
3107 // For any kind of InitializeAdapter process, we shall use system now!!
3108 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
3109
3110 // Set to eRfoff in order not to count receive count.
3111 if(priv->RegRfOff == TRUE)
3112 priv->ieee80211->eRFPowerState = eRfOff;
3113
3114 //
3115 //3 //Config CPUReset Register
3116 //3//
3117 //3 Firmware Reset Or Not
3118 ulRegRead = read_nic_dword(dev, CPU_GEN);
3119 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
3120 { //called from MPInitialized. do nothing
3121 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3122 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
3123 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
3124 else
3125 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
3126
3127#ifdef RTL8190P
3128 //2008.06.03, for WOL 90 hw bug
3129 ulRegRead &= (~(CPU_GEN_GPIO_UART));
3130#endif
3131
3132 write_nic_dword(dev, CPU_GEN, ulRegRead);
3133 //mdelay(100);
3134
3135#ifdef RTL8192E
3136
3137 //3//
3138 //3 //Fix the issue of E-cut high temperature issue
3139 //3//
3140 // TODO: E cut only
3141 ICVersion = read_nic_byte(dev, IC_VERRSION);
3142 if(ICVersion >= 0x4) //E-cut only
3143 {
3144 // HW SD suggest that we should not wirte this register too often, so driver
3145 // should readback this register. This register will be modified only when
3146 // power on reset
3147 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
3148 if(SwitchingRegulatorOutput != 0xb8)
3149 {
3150 write_nic_byte(dev, SWREGULATOR, 0xa8);
3151 mdelay(1);
3152 write_nic_byte(dev, SWREGULATOR, 0xb8);
3153 }
3154 }
3155#endif
3156
3157
3158 //3//
3159 //3// Initialize BB before MAC
3160 //3//
ecdfa446
GKH		 3161 RT_TRACE(COMP_INIT, "BB Config Start!\n");
3162 rtStatus = rtl8192_BBConfig(dev);
3163 if(rtStatus != RT_STATUS_SUCCESS)
3164 {
3165 RT_TRACE(COMP_ERR, "BB Config failed\n");
3166 return rtStatus;
3167 }
3168 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
3169
ecdfa446
GKH		 3170 //3//Set Loopback mode or Normal mode
3171 //3//
3172 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
3173 // because setting of System_Reset bit reset MAC to default transmission mode.
3174 //Loopback mode or not
3175 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
3176 //priv->LoopbackMode = RTL819X_MAC_LOOPBACK;
3177 if(priv->ResetProgress == RESET_TYPE_NORESET)
3178 {
3179 ulRegRead = read_nic_dword(dev, CPU_GEN);
3180 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
3181 {
3182 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
3183 }
3184 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
3185 {
3186 ulRegRead |= CPU_CCK_LOOPBACK;
3187 }
3188 else
3189 {
3190 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
3191 }
3192
3193 //2008.06.03, for WOL
3194 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3195 write_nic_dword(dev, CPU_GEN, ulRegRead);
3196
3197 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
3198 udelay(500);
3199 }
3200 //3Set Hardware(Do nothing now)
3201 rtl8192_hwconfig(dev);
3202 //2=======================================================
3203 // Common Setting for all of the FPGA platform. (part 1)
3204 //2=======================================================
3205 // If there is changes, please make sure it applies to all of the FPGA version
3206 //3 Turn on Tx/Rx
3207 write_nic_byte(dev, CMDR, CR_RE|CR_TE);
3208
3209 //2Set Tx dma burst
3210#ifdef RTL8190P
207b58fb
MM		 3211 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
3212 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) |
3213 (1<<MULRW_SHIFT)));
ecdfa446
GKH		 3214#else
3215 #ifdef RTL8192E
207b58fb 3216 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
ecdfa446
GKH		 3217 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
3218 #endif
3219#endif
3220 //set IDR0 here
3221 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
3222 write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
3223 //set RCR
3224 write_nic_dword(dev, RCR, priv->ReceiveConfig);
3225
3226 //3 Initialize Number of Reserved Pages in Firmware Queue
3227 #ifdef TO_DO_LIST
3228 if(priv->bInHctTest)
3229 {
207b58fb
MM		 3230 PlatformEFIOWrite4Byte(Adapter, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
3231 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
3232 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446
GKH		 3233 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3234 PlatformEFIOWrite4Byte(Adapter, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
207b58fb
MM		 3235 PlatformEFIOWrite4Byte(Adapter, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
3236 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 3237 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3238 }
3239 else
3240 #endif
3241 {
207b58fb
MM		 3242 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
3243 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
3244 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446
GKH		 3245 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3246 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
207b58fb
MM		 3247 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
3248 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446
GKH		 3249 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
3250 }
3251
3252 rtl8192_tx_enable(dev);
3253 rtl8192_rx_enable(dev);
3254 //3Set Response Rate Setting Register
3255 // CCK rate is supported by default.
3256 // CCK rate will be filtered out only when associated AP does not support it.
3257 ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
3258 write_nic_dword(dev, RRSR, ulRegRead);
3259 write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
3260
3261 //2Set AckTimeout
3262 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3263 write_nic_byte(dev, ACK_TIMEOUT, 0x30);
3264
3265 //rtl8192_actset_wirelessmode(dev,priv->RegWirelessMode);
3266 if(priv->ResetProgress == RESET_TYPE_NORESET)
3267 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
3268 //-----------------------------------------------------------------------------
3269 // Set up security related. 070106, by rcnjko:
3270 // 1. Clear all H/W keys.
3271 // 2. Enable H/W encryption/decryption.
3272 //-----------------------------------------------------------------------------
3273 CamResetAllEntry(dev);
3274 {
3275 u8 SECR_value = 0x0;
3276 SECR_value |= SCR_TxEncEnable;
3277 SECR_value |= SCR_RxDecEnable;
3278 SECR_value |= SCR_NoSKMC;
3279 write_nic_byte(dev, SECR, SECR_value);
3280 }
3281 //3Beacon related
3282 write_nic_word(dev, ATIMWND, 2);
3283 write_nic_word(dev, BCN_INTERVAL, 100);
5e1ad18a 3284 for (i=0; i<QOS_QUEUE_NUM; i++)
ecdfa446 3285 write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 3286 //
3287 // Switching regulator controller: This is set temporarily.
3288 // It's not sure if this can be removed in the future.
3289 // PJ advised to leave it by default.
3290 //
3291 write_nic_byte(dev, 0xbe, 0xc0);
3292
3293 //2=======================================================
3294 // Set PHY related configuration defined in MAC register bank
3295 //2=======================================================
3296 rtl8192_phy_configmac(dev);
3297
3298 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
3299 rtl8192_phy_getTxPower(dev);
3300 rtl8192_phy_setTxPower(dev, priv->chan);
3301 }
3302
3303 //if D or C cut
3304 tmpvalue = read_nic_byte(dev, IC_VERRSION);
3305 priv->IC_Cut = tmpvalue;
3306 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
3307 if(priv->IC_Cut >= IC_VersionCut_D)
3308 {
3309 //pHalData->bDcut = TRUE;
3310 if(priv->IC_Cut == IC_VersionCut_D)
3311 RT_TRACE(COMP_INIT, "D-cut\n");
3312 if(priv->IC_Cut == IC_VersionCut_E)
3313 {
3314 RT_TRACE(COMP_INIT, "E-cut\n");
3315 // HW SD suggest that we should not wirte this register too often, so driver
3316 // should readback this register. This register will be modified only when
3317 // power on reset
3318 }
3319 }
3320 else
3321 {
3322 //pHalData->bDcut = FALSE;
3323 RT_TRACE(COMP_INIT, "Before C-cut\n");
3324 }
3325
3326#if 1
3327 //Firmware download
3328 RT_TRACE(COMP_INIT, "Load Firmware!\n");
3329 bfirmwareok = init_firmware(dev);
3330 if(bfirmwareok != true) {
3331 rtStatus = RT_STATUS_FAILURE;
3332 return rtStatus;
3333 }
3334 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
3335#endif
3336 //RF config
3337 if(priv->ResetProgress == RESET_TYPE_NORESET)
3338 {
3339 RT_TRACE(COMP_INIT, "RF Config Started!\n");
3340 rtStatus = rtl8192_phy_RFConfig(dev);
3341 if(rtStatus != RT_STATUS_SUCCESS)
3342 {
3343 RT_TRACE(COMP_ERR, "RF Config failed\n");
3344 return rtStatus;
3345 }
3346 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
3347 }
3348 rtl8192_phy_updateInitGain(dev);
3349
3350 /*---- Set CCK and OFDM Block "ON"----*/
3351 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
3352 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
3353
3354#ifdef RTL8192E
3355 //Enable Led
3356 write_nic_byte(dev, 0x87, 0x0);
3357#endif
3358#ifdef RTL8190P
3359 //2008.06.03, for WOL
3360 ucRegRead = read_nic_byte(dev, GPE);
3361 ucRegRead |= BIT0;
3362 write_nic_byte(dev, GPE, ucRegRead);
3363
3364 ucRegRead = read_nic_byte(dev, GPO);
3365 ucRegRead &= ~BIT0;
3366 write_nic_byte(dev, GPO, ucRegRead);
3367#endif
3368
3369 //2=======================================================
3370 // RF Power Save
3371 //2=======================================================
3372#ifdef ENABLE_IPS
3373
3374{
3375 if(priv->RegRfOff == TRUE)
3376 { // User disable RF via registry.
3377 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__FUNCTION__);
3378 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
3379#if 0//cosa, ask SD3 willis and he doesn't know what is this for
3380 // Those action will be discard in MgntActSet_RF_State because off the same state
3381 for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
3382 PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
3383#endif
3384 }
3385 else if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
3386 { // H/W or S/W RF OFF before sleep.
3387 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3388 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3389 }
3390 else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
3391 { // H/W or S/W RF OFF before sleep.
3392 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
3393 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
3394 }
3395 else
3396 {
3397 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
3398 priv->ieee80211->eRFPowerState = eRfOn;
3399 priv->ieee80211->RfOffReason = 0;
3400 //DrvIFIndicateCurrentPhyStatus(Adapter);
3401 // LED control
3402 //Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_ON);
3403
3404 //
3405 // If inactive power mode is enabled, disable rf while in disconnected state.
3406 // But we should still tell upper layer we are in rf on state.
3407 // 2007.07.16, by shien chang.
3408 //
3409 //if(!Adapter->bInHctTest)
3410 //IPSEnter(Adapter);
3411
3412 }
3413}
3414#endif
3415 if(1){
3416#ifdef RTL8192E
3417 // We can force firmware to do RF-R/W
3418 if(priv->ieee80211->FwRWRF)
3419 priv->Rf_Mode = RF_OP_By_FW;
3420 else
3421 priv->Rf_Mode = RF_OP_By_SW_3wire;
3422#else
3423 priv->Rf_Mode = RF_OP_By_SW_3wire;
3424#endif
3425 }
3426#ifdef RTL8190P
3427 if(priv->ResetProgress == RESET_TYPE_NORESET)
3428 {
3429 dm_initialize_txpower_tracking(dev);
3430
3431 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3432 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3433
3434 if(priv->rf_type == RF_2T4R){
3435 for(i = 0; i<TxBBGainTableLength; i++)
3436 {
3437 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3438 {
3439 priv->rfa_txpowertrackingindex= (u8)i;
3440 priv->rfa_txpowertrackingindex_real= (u8)i;
3441 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3442 break;
3443 }
3444 }
3445 }
3446 for(i = 0; i<TxBBGainTableLength; i++)
3447 {
3448 if(tmpRegC == priv->txbbgain_table[i].txbbgain_value)
3449 {
3450 priv->rfc_txpowertrackingindex= (u8)i;
3451 priv->rfc_txpowertrackingindex_real= (u8)i;
3452 priv->rfc_txpowertracking_default = priv->rfc_txpowertrackingindex;
3453 break;
3454 }
3455 }
3456 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3457
3458 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3459 {
3460 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3461 {
3462 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3463 break;
3464 }
3465 }
3466 priv->CCKPresentAttentuation_40Mdefault = 0;
3467 priv->CCKPresentAttentuation_difference = 0;
3468 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3469 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3470 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3471 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_initial = %d\n", priv->rfc_txpowertrackingindex);
3472 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real_initial = %d\n", priv->rfc_txpowertrackingindex_real);
3473 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3474 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3475 }
3476#else
3477 #ifdef RTL8192E
3478 if(priv->ResetProgress == RESET_TYPE_NORESET)
3479 {
3480 dm_initialize_txpower_tracking(dev);
3481
3482 if(priv->IC_Cut >= IC_VersionCut_D)
3483 {
3484 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3485 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
3486 for(i = 0; i<TxBBGainTableLength; i++)
3487 {
3488 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
3489 {
3490 priv->rfa_txpowertrackingindex= (u8)i;
3491 priv->rfa_txpowertrackingindex_real= (u8)i;
3492 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
3493 break;
3494 }
3495 }
3496
3497 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
3498
3499 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
3500 {
3501 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
3502 {
3503 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
3504 break;
3505 }
3506 }
3507 priv->CCKPresentAttentuation_40Mdefault = 0;
3508 priv->CCKPresentAttentuation_difference = 0;
3509 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
3510 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
3511 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
3512 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
3513 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
3514 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
3515 }
3516 }
3517 #endif
3518#endif
3519 rtl8192_irq_enable(dev);
3520 priv->being_init_adapter = false;
3521 return rtStatus;
3522
3523}
3524
559fba5e 3525static void rtl8192_prepare_beacon(struct r8192_priv *priv)
ecdfa446
GKH		 3526{
3527 struct sk_buff *skb;
3528 //unsigned long flags;
3529 cb_desc *tcb_desc;
3530
3531 skb = ieee80211_get_beacon(priv->ieee80211);
3532 tcb_desc = (cb_desc *)(skb->cb + 8);
ecdfa446
GKH		 3533 //spin_lock_irqsave(&priv->tx_lock,flags);
3534 /* prepare misc info for the beacon xmit */
3535 tcb_desc->queue_index = BEACON_QUEUE;
bbc9a991 3536 /* IBSS does not support HT yet, use 1M defaultly */
ecdfa446
GKH		 3537 tcb_desc->data_rate = 2;
3538 tcb_desc->RATRIndex = 7;
3539 tcb_desc->bTxDisableRateFallBack = 1;
3540 tcb_desc->bTxUseDriverAssingedRate = 1;
3541
3542 skb_push(skb, priv->ieee80211->tx_headroom);
3543 if(skb){
3544 rtl8192_tx(priv->ieee80211->dev,skb);
3545 }
3546 //spin_unlock_irqrestore (&priv->tx_lock, flags);
3547}
3548
ecdfa446 3549
214985a6
MM		 3550/*
3551 * configure registers for beacon tx and enables it via
ecdfa446
GKH		 3552 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
3553 * be used to stop beacon transmission
3554 */
559fba5e 3555static void rtl8192_start_beacon(struct net_device *dev)
ecdfa446
GKH		 3556{
3557 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3558 struct ieee80211_network *net = &priv->ieee80211->current_network;
3559 u16 BcnTimeCfg = 0;
3560 u16 BcnCW = 6;
3561 u16 BcnIFS = 0xf;
3562
3563 DMESG("Enabling beacon TX");
3564 //rtl8192_prepare_beacon(dev);
3565 rtl8192_irq_disable(dev);
3566 //rtl8192_beacon_tx_enable(dev);
3567
3568 /* ATIM window */
3569 write_nic_word(dev, ATIMWND, 2);
3570
3571 /* Beacon interval (in unit of TU) */
3572 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
3573
3574 /*
3575 * DrvErlyInt (in unit of TU).
3576 * (Time to send interrupt to notify driver to c
3577 * hange beacon content)
3578 * */
3579 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
3580
3581 /*
3582 * BcnDMATIM(in unit of us).
3583 * Indicates the time before TBTT to perform beacon queue DMA
3584 * */
3585 write_nic_word(dev, BCN_DMATIME, 256);
3586
3587 /*
3588 * Force beacon frame transmission even after receiving
3589 * beacon frame from other ad hoc STA
3590 * */
3591 write_nic_byte(dev, BCN_ERR_THRESH, 100);
3592
3593 /* Set CW and IFS */
3594 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
3595 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3596 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
3597
3598
3599 /* enable the interrupt for ad-hoc process */
3600 rtl8192_irq_enable(dev);
3601}
ecdfa446 3602
5e1ad18a 3603static bool HalTxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3604{
3605 u16 RegTxCounter = read_nic_word(dev, 0x128);
3606 struct r8192_priv *priv = ieee80211_priv(dev);
3607 bool bStuck = FALSE;
3608 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
3609 if(priv->TxCounter==RegTxCounter)
3610 bStuck = TRUE;
3611
3612 priv->TxCounter = RegTxCounter;
3613
3614 return bStuck;
3615}
3616
3617/*
214985a6
MM		 3618 * Assumption: RT_TX_SPINLOCK is acquired.
3619 */
5e1ad18a 3620static RESET_TYPE
ecdfa446
GKH		 3621TxCheckStuck(struct net_device *dev)
3622{
3623 struct r8192_priv *priv = ieee80211_priv(dev);
3624 u8 QueueID;
3625 ptx_ring head=NULL,tail=NULL,txring = NULL;
3626 u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3627 bool bCheckFwTxCnt = false;
ecdfa446
GKH		 3628
3629 //
3630 // Decide Stuch threshold according to current power save mode
3631 //
ecdfa446
GKH		 3632 switch (priv->ieee80211->dot11PowerSaveMode)
3633 {
3634 // The threshold value may required to be adjusted .
3635 case eActive: // Active/Continuous access.
3636 ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
3637 break;
3638 case eMaxPs: // Max power save mode.
3639 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3640 break;
3641 case eFastPs: // Fast power save mode.
3642 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
3643 break;
3644 }
3645
3646 //
3647 // Check whether specific tcb has been queued for a specific time
3648 //
3649 for(QueueID = 0; QueueID < MAX_TX_QUEUE; QueueID++)
3650 {
3651
3652
3653 if(QueueID == TXCMD_QUEUE)
3654 continue;
3655
3656 switch(QueueID) {
3657 case MGNT_QUEUE:
3658 tail=priv->txmapringtail;
3659 head=priv->txmapringhead;
3660 break;
3661
3662 case BK_QUEUE:
3663 tail=priv->txbkpringtail;
3664 head=priv->txbkpringhead;
3665 break;
3666
3667 case BE_QUEUE:
3668 tail=priv->txbepringtail;
3669 head=priv->txbepringhead;
3670 break;
3671
3672 case VI_QUEUE:
3673 tail=priv->txvipringtail;
3674 head=priv->txvipringhead;
3675 break;
3676
3677 case VO_QUEUE:
3678 tail=priv->txvopringtail;
3679 head=priv->txvopringhead;
3680 break;
3681
3682 default:
3683 tail=head=NULL;
3684 break;
3685 }
3686
3687 if(tail == head)
3688 continue;
3689 else
3690 {
3691 txring = head;
3692 if(txring == NULL)
3693 {
3694 RT_TRACE(COMP_ERR,"%s():txring is NULL , BUG!\n",__FUNCTION__);
3695 continue;
3696 }
3697 txring->nStuckCount++;
ecdfa446
GKH		 3698 bCheckFwTxCnt = TRUE;
3699 }
3700 }
3701#if 1
3702 if(bCheckFwTxCnt)
3703 {
3704 if(HalTxCheckStuck8190Pci(dev))
3705 {
3706 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
3707 return RESET_TYPE_SILENT;
3708 }
3709 }
3710#endif
3711 return RESET_TYPE_NORESET;
3712}
3713
3714
5e1ad18a 3715static bool HalRxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3716{
3717 struct r8192_priv *priv = ieee80211_priv(dev);
3718 u16 RegRxCounter = read_nic_word(dev, 0x130);
3719 bool bStuck = FALSE;
3720 static u8 rx_chk_cnt = 0;
3721 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
3722 // If rssi is small, we should check rx for long time because of bad rx.
3723 // or maybe it will continuous silent reset every 2 seconds.
3724 rx_chk_cnt++;
3725 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
3726 {
3727 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
3728 }
3729 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
3730 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
3731 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
3732
3733 {
3734 if(rx_chk_cnt < 2)
3735 {
3736 return bStuck;
3737 }
3738 else
3739 {
3740 rx_chk_cnt = 0;
3741 }
3742 }
3743 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
3744 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
3745 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
3746 {
3747 if(rx_chk_cnt < 4)
3748 {
3749 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
3750 return bStuck;
3751 }
3752 else
3753 {
3754 rx_chk_cnt = 0;
3755 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
3756 }
3757 }
3758 else
3759 {
3760 if(rx_chk_cnt < 8)
3761 {
3762 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
3763 return bStuck;
3764 }
3765 else
3766 {
3767 rx_chk_cnt = 0;
3768 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
3769 }
3770 }
ecdfa446
GKH		 3771 if(priv->RxCounter==RegRxCounter)
3772 bStuck = TRUE;
3773
3774 priv->RxCounter = RegRxCounter;
3775
3776 return bStuck;
3777}
3778
5e1ad18a 3779static RESET_TYPE RxCheckStuck(struct net_device *dev)
ecdfa446
GKH		 3780{
3781
3782 if(HalRxCheckStuck8190Pci(dev))
3783 {
3784 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
3785 return RESET_TYPE_SILENT;
3786 }
3787
3788 return RESET_TYPE_NORESET;
3789}
3790
5e1ad18a 3791static RESET_TYPE
ecdfa446
GKH		 3792rtl819x_ifcheck_resetornot(struct net_device *dev)
3793{
3794 struct r8192_priv *priv = ieee80211_priv(dev);
3795 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
3796 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
3797 RT_RF_POWER_STATE rfState;
3798
3799 rfState = priv->ieee80211->eRFPowerState;
3800
3801 TxResetType = TxCheckStuck(dev);
3802#if 1
3803 if( rfState != eRfOff &&
3804 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
3805 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
3806 {
3807 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
3808 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
3809 // if driver is in firmware download failure status, driver should initialize RF in the following
3810 // silent reset procedure Emily, 2008.01.21
3811
3812 // Driver should not check RX stuck in IBSS mode because it is required to
3813 // set Check BSSID in order to send beacon, however, if check BSSID is
3814 // set, STA cannot hear any packet a all. Emily, 2008.04.12
3815 RxResetType = RxCheckStuck(dev);
3816 }
3817#endif
3818
3819 RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
3820 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
3821 return RESET_TYPE_NORMAL;
3822 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
3823 return RESET_TYPE_SILENT;
3824 else
3825 return RESET_TYPE_NORESET;
3826
3827}
3828
3829
5e1ad18a 3830static void CamRestoreAllEntry(struct net_device *dev)
ecdfa446
GKH		 3831{
3832 u8 EntryId = 0;
3833 struct r8192_priv *priv = ieee80211_priv(dev);
881a975b 3834 const u8* MacAddr = priv->ieee80211->current_network.bssid;
ecdfa446 3835
881a975b 3836 static const u8 CAM_CONST_ADDR[4][6] = {
ecdfa446
GKH		 3837 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
3838 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
3839 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
3840 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
881a975b 3841 static const u8 CAM_CONST_BROAD[] =
ecdfa446
GKH		 3842 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
3843
3844 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
3845
3846
3847 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
3848 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
3849 {
3850
3851 for(EntryId=0; EntryId<4; EntryId++)
3852 {
3853 {
3854 MacAddr = CAM_CONST_ADDR[EntryId];
3855 setKey(dev,
3856 EntryId ,
3857 EntryId,
3858 priv->ieee80211->pairwise_key_type,
3859 MacAddr,
3860 0,
3861 NULL);
3862 }
3863 }
3864
3865 }
3866 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
3867 {
3868
3869 {
3870 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3871 setKey(dev,
3872 4,
3873 0,
3874 priv->ieee80211->pairwise_key_type,
3875 (u8*)dev->dev_addr,
3876 0,
3877 NULL);
3878 else
3879 setKey(dev,
3880 4,
3881 0,
3882 priv->ieee80211->pairwise_key_type,
3883 MacAddr,
3884 0,
3885 NULL);
3886 }
3887 }
3888 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
3889 {
3890
3891 {
3892 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3893 setKey(dev,
3894 4,
3895 0,
3896 priv->ieee80211->pairwise_key_type,
3897 (u8*)dev->dev_addr,
3898 0,
3899 NULL);
3900 else
3901 setKey(dev,
3902 4,
3903 0,
3904 priv->ieee80211->pairwise_key_type,
3905 MacAddr,
3906 0,
3907 NULL);
3908 }
3909 }
3910
3911
3912
3913 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
3914 {
3915 MacAddr = CAM_CONST_BROAD;
3916 for(EntryId=1 ; EntryId<4 ; EntryId++)
3917 {
3918 {
3919 setKey(dev,
3920 EntryId,
3921 EntryId,
3922 priv->ieee80211->group_key_type,
3923 MacAddr,
3924 0,
3925 NULL);
3926 }
3927 }
3928 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3929 setKey(dev,
3930 0,
3931 0,
3932 priv->ieee80211->group_key_type,
3933 CAM_CONST_ADDR[0],
3934 0,
3935 NULL);
3936 }
3937 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
3938 {
3939 MacAddr = CAM_CONST_BROAD;
3940 for(EntryId=1; EntryId<4 ; EntryId++)
3941 {
3942 {
3943 setKey(dev,
3944 EntryId ,
3945 EntryId,
3946 priv->ieee80211->group_key_type,
3947 MacAddr,
3948 0,
3949 NULL);
3950 }
3951 }
3952
3953 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3954 setKey(dev,
3955 0 ,
3956 0,
3957 priv->ieee80211->group_key_type,
3958 CAM_CONST_ADDR[0],
3959 0,
3960 NULL);
3961 }
3962}
3963
ecdfa446
GKH		 3964/*
3965 * This function is used to fix Tx/Rx stop bug temporarily.
3966 * This function will do "system reset" to NIC when Tx or Rx is stuck.
3967 * The method checking Tx/Rx stuck of this function is supported by FW,
3968 * which reports Tx and Rx counter to register 0x128 and 0x130.
214985a6 3969 */
5e1ad18a 3970static void rtl819x_ifsilentreset(struct net_device *dev)
ecdfa446
GKH		 3971{
3972 struct r8192_priv *priv = ieee80211_priv(dev);
3973 u8 reset_times = 0;
3974 int reset_status = 0;
3975 struct ieee80211_device *ieee = priv->ieee80211;
3976
3977
65a43784 3978 return;
3979
ecdfa446
GKH		 3980 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
3981 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
3982
3983 if(priv->ResetProgress==RESET_TYPE_NORESET)
3984 {
3985RESET_START:
65a43784 3986#ifdef ENABLE_LPS
3987 //LZM for PS-Poll AID issue. 090429
3988 if(priv->ieee80211->state == IEEE80211_LINKED)
3989 LeisurePSLeave(dev);
3990#endif
ecdfa446
GKH		 3991
3992 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
3993
3994 // Set the variable for reset.
3995 priv->ResetProgress = RESET_TYPE_SILENT;
3996// rtl8192_close(dev);
3997#if 1
3998 down(&priv->wx_sem);
3999 if(priv->up == 0)
4000 {
4001 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
4002 up(&priv->wx_sem);
4003 return ;
4004 }
4005 priv->up = 0;
4006 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
4007 if(!netif_queue_stopped(dev))
4008 netif_stop_queue(dev);
4009
4010 dm_backup_dynamic_mechanism_state(dev);
4011
4012 rtl8192_irq_disable(dev);
4013 rtl8192_cancel_deferred_work(priv);
4014 deinit_hal_dm(dev);
4015 del_timer_sync(&priv->watch_dog_timer);
4016 ieee->sync_scan_hurryup = 1;
4017 if(ieee->state == IEEE80211_LINKED)
4018 {
4019 down(&ieee->wx_sem);
4020 printk("ieee->state is IEEE80211_LINKED\n");
4021 ieee80211_stop_send_beacons(priv->ieee80211);
4022 del_timer_sync(&ieee->associate_timer);
ecdfa446 4023 cancel_delayed_work(&ieee->associate_retry_wq);
ecdfa446 4024 ieee80211_stop_scan(ieee);
ecdfa446
GKH		 4025 up(&ieee->wx_sem);
4026 }
4027 else{
4028 printk("ieee->state is NOT LINKED\n");
65a43784 4029 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446 4030 }
65a43784 4031 rtl8192_halt_adapter(dev, true);
ecdfa446
GKH		 4032 up(&priv->wx_sem);
4033 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
4034 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
4035 reset_status = _rtl8192_up(dev);
4036
4037 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
4038 if(reset_status == -1)
4039 {
4040 if(reset_times < 3)
4041 {
4042 reset_times++;
4043 goto RESET_START;
4044 }
4045 else
4046 {
4047 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__FUNCTION__);
4048 }
4049 }
4050#endif
4051 ieee->is_silent_reset = 1;
4052#if 1
4053 EnableHWSecurityConfig8192(dev);
4054#if 1
4055 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4056 {
4057 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4058
4059#if 1
ecdfa446 4060 queue_work(ieee->wq, &ieee->associate_complete_wq);
ecdfa446
GKH		 4061#endif
4062
4063 }
4064 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
4065 {
4066 ieee->set_chan(ieee->dev, ieee->current_network.channel);
4067 ieee->link_change(ieee->dev);
4068
4069 // notify_wx_assoc_event(ieee);
4070
4071 ieee80211_start_send_beacons(ieee);
4072
4073 if (ieee->data_hard_resume)
4074 ieee->data_hard_resume(ieee->dev);
4075 netif_carrier_on(ieee->dev);
4076 }
4077#endif
4078
4079 CamRestoreAllEntry(dev);
4080
4081 // Restore the previous setting for all dynamic mechanism
4082 dm_restore_dynamic_mechanism_state(dev);
4083
4084 priv->ResetProgress = RESET_TYPE_NORESET;
4085 priv->reset_count++;
4086
4087 priv->bForcedSilentReset =false;
4088 priv->bResetInProgress = false;
4089
4090 // For test --> force write UFWP.
4091 write_nic_byte(dev, UFWP, 1);
4092 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
4093#endif
4094 }
4095}
4096
4097#ifdef ENABLE_IPS
4098void InactivePsWorkItemCallback(struct net_device *dev)
4099{
4100 struct r8192_priv *priv = ieee80211_priv(dev);
4101 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
ecdfa446
GKH		 4102
4103 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n");
4104 //
4105 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
4106 // is really scheduled.
4107 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
4108 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
4109 // blocks the IPS procedure of switching RF.
4110 // By Bruce, 2007-12-25.
4111 //
4112 pPSC->bSwRfProcessing = TRUE;
4113
207b58fb 4114 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
ecdfa446
GKH		 4115 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
4116
4117
4118 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
4119
4120 //
4121 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
4122 //
ecdfa446
GKH		 4123 pPSC->bSwRfProcessing = FALSE;
4124 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n");
4125}
4126
65a43784 4127#ifdef ENABLE_LPS
214985a6 4128/* Change current and default preamble mode. */
65a43784 4129bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode)
4130{
4131 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 4132
4133 // Currently, we do not change power save mode on IBSS mode.
4134 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4135 {
4136 return false;
4137 }
4138
4139 //
4140 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
4141 // some AP will not response to our mgnt frames with PwrMgt bit set,
4142 // e.g. cannot associate the AP.
4143 // So I commented out it. 2005.02.16, by rcnjko.
4144 //
4145// // Change device's power save mode.
4146// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
4147
4148 // Update power save mode configured.
4149 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
4150 if(!priv->ps_force) {
4151 priv->ieee80211->ps = rtPsMode;
4152 }
4153
4154 // Awake immediately
4155 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
4156 {
4157 unsigned long flags;
4158
4159 //PlatformSetTimer(Adapter, &(pMgntInfo->AwakeTimer), 0);
4160 // Notify the AP we awke.
4161 rtl8192_hw_wakeup(dev);
4162 priv->ieee80211->sta_sleep = 0;
4163
4164 spin_lock_irqsave(&(priv->ieee80211->mgmt_tx_lock), flags);
4165 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
4166 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
4167 spin_unlock_irqrestore(&(priv->ieee80211->mgmt_tx_lock), flags);
4168 }
4169
4170 return true;
4171}
4172
214985a6 4173/* Enter the leisure power save mode. */
65a43784 4174void LeisurePSEnter(struct net_device *dev)
4175{
4176 struct r8192_priv *priv = ieee80211_priv(dev);
4177 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4178
4179 //RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
4180 //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
4181 // pPSC->bLeisurePs, priv->ieee80211->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD);
4182
4183 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
4184 (priv->ieee80211->state == IEEE80211_LINKED)) ||
4185 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
4186 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
4187 return;
4188
4189 if (pPSC->bLeisurePs)
4190 {
4191 // Idle for a while if we connect to AP a while ago.
4192 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
4193 {
4194
4195 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
4196 {
4197
4198 //RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n");
4199 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
4200
4201 }
4202 }
4203 else
4204 pPSC->LpsIdleCount++;
4205 }
4206}
4207
4208
214985a6 4209/* Leave leisure power save mode. */
65a43784 4210void LeisurePSLeave(struct net_device *dev)
4211{
4212 struct r8192_priv *priv = ieee80211_priv(dev);
4213 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4214
65a43784 4215 if (pPSC->bLeisurePs)
4216 {
4217 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
4218 {
4219 // move to lps_wakecomplete()
4220 //RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
4221 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED);
4222
4223 }
4224 }
4225}
4226#endif
4227
4228
214985a6 4229/* Enter the inactive power save mode. RF will be off */
ecdfa446
GKH		 4230void
4231IPSEnter(struct net_device *dev)
4232{
4233 struct r8192_priv *priv = ieee80211_priv(dev);
4234 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4235 RT_RF_POWER_STATE rtState;
4236
4237 if (pPSC->bInactivePs)
4238 {
4239 rtState = priv->ieee80211->eRFPowerState;
4240 //
4241 // Added by Bruce, 2007-12-25.
4242 // Do not enter IPS in the following conditions:
4243 // (1) RF is already OFF or Sleep
4244 // (2) bSwRfProcessing (indicates the IPS is still under going)
4245 // (3) Connectted (only disconnected can trigger IPS)
4246 // (4) IBSS (send Beacon)
4247 // (5) AP mode (send Beacon)
4248 //
4249 if (rtState == eRfOn && !pPSC->bSwRfProcessing
4250 && (priv->ieee80211->state != IEEE80211_LINKED) )
4251 {
4252 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
65a43784 4253 //printk("IPSEnter(): Turn off RF.\n");
ecdfa446
GKH		 4254 pPSC->eInactivePowerState = eRfOff;
4255// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4256 InactivePsWorkItemCallback(dev);
4257 }
4258 }
4259}
4260
4261//
4262// Description:
4263// Leave the inactive power save mode, RF will be on.
4264// 2007.08.17, by shien chang.
4265//
4266void
4267IPSLeave(struct net_device *dev)
4268{
4269 struct r8192_priv *priv = ieee80211_priv(dev);
4270 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
4271 RT_RF_POWER_STATE rtState;
4272
4273 if (pPSC->bInactivePs)
4274 {
4275 rtState = priv->ieee80211->eRFPowerState;
4276 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
4277 {
4278 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
65a43784 4279 //printk("IPSLeave(): Turn on RF.\n");
ecdfa446
GKH		 4280 pPSC->eInactivePowerState = eRfOn;
4281// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
4282 InactivePsWorkItemCallback(dev);
4283 }
4284 }
4285}
65a43784 4286
4287void IPSLeave_wq(void *data)
4288{
4289 struct ieee80211_device *ieee = container_of(data,struct ieee80211_device,ips_leave_wq);
4290 struct net_device *dev = ieee->dev;
4291
4292 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4293 down(&priv->ieee80211->ips_sem);
4294 IPSLeave(dev);
4295 up(&priv->ieee80211->ips_sem);
4296}
4297
4298void ieee80211_ips_leave_wq(struct net_device *dev)
4299{
4300 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4301 RT_RF_POWER_STATE rtState;
4302 rtState = priv->ieee80211->eRFPowerState;
4303
4304 if(priv->ieee80211->PowerSaveControl.bInactivePs){
4305 if(rtState == eRfOff){
4306 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
4307 {
4308 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
4309 return;
4310 }
4311 else{
4312 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
4313 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
4314 }
4315 }
4316 }
4317}
4318//added by amy 090331 end
4319void ieee80211_ips_leave(struct net_device *dev)
4320{
4321 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4322 down(&priv->ieee80211->ips_sem);
4323 IPSLeave(dev);
4324 up(&priv->ieee80211->ips_sem);
4325}
ecdfa446 4326#endif
ecdfa446 4327
5e1ad18a 4328static void rtl819x_update_rxcounts(
ecdfa446
GKH		 4329 struct r8192_priv *priv,
4330 u32* TotalRxBcnNum,
4331 u32* TotalRxDataNum
4332)
4333{
4334 u16 SlotIndex;
4335 u8 i;
4336
4337 *TotalRxBcnNum = 0;
4338 *TotalRxDataNum = 0;
4339
4340 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
4341 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
4342 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
4343 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
4344 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
4345 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
4346 }
4347}
4348
4349
559fba5e 4350static void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 4351{
4352 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
4353 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
4354 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4355 struct ieee80211_device* ieee = priv->ieee80211;
4356 RESET_TYPE ResetType = RESET_TYPE_NORESET;
4357 static u8 check_reset_cnt=0;
4358 unsigned long flags;
4359 bool bBusyTraffic = false;
4360 static u8 last_time = 0;
65a43784 4361 bool bEnterPS = false;
4362
f500e256 4363 if ((!priv->up) || priv->bHwRadioOff)
65a43784 4364 return;
4365
ecdfa446
GKH		 4366 if(!priv->up)
4367 return;
4368 hal_dm_watchdog(dev);
4369#ifdef ENABLE_IPS
4370// printk("watch_dog ENABLE_IPS\n");
4371 if(ieee->actscanning == false){
65a43784 4372 //printk("%d,%d,%d,%d\n", ieee->eRFPowerState, ieee->is_set_key, ieee->proto_stoppping, ieee->wx_set_enc);
207b58fb
MM		 4373 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
4374 (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&
65a43784 4375 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
ecdfa446 4376 if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
65a43784 4377 //printk("====================>haha:IPSEnter()\n");
ecdfa446
GKH		 4378 IPSEnter(dev);
4379 //ieee80211_stop_scan(priv->ieee80211);
4380 }
4381 }
4382 }
4383#endif
4384 {//to get busy traffic condition
4385 if(ieee->state == IEEE80211_LINKED)
4386 {
65a43784 4387 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
4388 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
ecdfa446
GKH		 4389 bBusyTraffic = true;
4390 }
4391
65a43784 4392#ifdef ENABLE_LPS
4393 //added by amy for Leisure PS
4394 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
4395 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
4396 {
4397 //printk("ieee->LinkDetectInfo.NumRxUnicastOkInPeriod is %d,ieee->LinkDetectInfo.NumTxOkInPeriod is %d\n",
4398 // ieee->LinkDetectInfo.NumRxUnicastOkInPeriod,ieee->LinkDetectInfo.NumTxOkInPeriod);
4399 bEnterPS= false;
4400 }
4401 else
4402 {
4403 bEnterPS= true;
4404 }
4405
4406 //printk("***bEnterPS = %d\n", bEnterPS);
4407 // LeisurePS only work in infra mode.
4408 if(bEnterPS)
4409 {
4410 LeisurePSEnter(dev);
4411 }
4412 else
4413 {
4414 LeisurePSLeave(dev);
4415 }
4416#endif
4417
4418 }
4419 else
4420 {
4421#ifdef ENABLE_LPS
4422 //RT_TRACE(COMP_LPS,"====>no link LPS leave\n");
4423 LeisurePSLeave(dev);
4424#endif
ecdfa446 4425 }
65a43784 4426
ecdfa446
GKH		 4427 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
4428 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
65a43784 4429 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
ecdfa446
GKH		 4430 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
4431 }
4432
4433
4434 //added by amy for AP roaming
4435 if (1)
4436 {
4437 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
4438 {
4439 u32 TotalRxBcnNum = 0;
4440 u32 TotalRxDataNum = 0;
4441
4442 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
4443 if((TotalRxBcnNum+TotalRxDataNum) == 0)
4444 {
4445 if( ieee->eRFPowerState == eRfOff)
4446 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
4447 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
65a43784 4448 // Dot11d_Reset(dev);
ecdfa446
GKH		 4449 ieee->state = IEEE80211_ASSOCIATING;
4450 notify_wx_assoc_event(priv->ieee80211);
65a43784 4451 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
ecdfa446
GKH		 4452 ieee->is_roaming = true;
4453 ieee->is_set_key = false;
65a43784 4454 ieee->link_change(dev);
4455 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 4456 }
4457 }
4458 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
4459 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
4460
4461 }
ecdfa446
GKH		 4462 //check if reset the driver
4463 spin_lock_irqsave(&priv->tx_lock,flags);
4464 if(check_reset_cnt++ >= 3 && !ieee->is_roaming && (last_time != 1))
4465 {
4466 ResetType = rtl819x_ifcheck_resetornot(dev);
4467 check_reset_cnt = 3;
4468 //DbgPrint("Start to check silent reset\n");
4469 }
4470 spin_unlock_irqrestore(&priv->tx_lock,flags);
4471 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
4472 {
4473 priv->ResetProgress = RESET_TYPE_NORMAL;
4474 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
4475 return;
4476 }
4477 /* disable silent reset temply 2008.9.11*/
4478#if 1
4479 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
4480 {
4481 last_time = 1;
4482 rtl819x_ifsilentreset(dev);
4483 }
4484 else
4485 last_time = 0;
4486#endif
4487 priv->force_reset = false;
4488 priv->bForcedSilentReset = false;
4489 priv->bResetInProgress = false;
4490 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
4491
4492}
4493
4494void watch_dog_timer_callback(unsigned long data)
4495{
4496 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
ecdfa446 4497 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 4498 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
4499
4500}
5b3b1a7b
MM		 4501
4502static int _rtl8192_up(struct net_device *dev)
ecdfa446
GKH		 4503{
4504 struct r8192_priv *priv = ieee80211_priv(dev);
4505 //int i;
4506 RT_STATUS init_status = RT_STATUS_SUCCESS;
4507 priv->up=1;
4508 priv->ieee80211->ieee_up=1;
65a43784 4509 priv->bdisable_nic = false; //YJ,add,091111
ecdfa446
GKH		 4510 RT_TRACE(COMP_INIT, "Bringing up iface");
4511
4512 init_status = rtl8192_adapter_start(dev);
4513 if(init_status != RT_STATUS_SUCCESS)
4514 {
4515 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
4516 return -1;
4517 }
4518 RT_TRACE(COMP_INIT, "start adapter finished\n");
4519#ifdef RTL8192E
4520 if(priv->ieee80211->eRFPowerState!=eRfOn)
4521 MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
4522#endif
4523 if(priv->ieee80211->state != IEEE80211_LINKED)
4524 ieee80211_softmac_start_protocol(priv->ieee80211);
4525 ieee80211_reset_queue(priv->ieee80211);
4526 watch_dog_timer_callback((unsigned long) dev);
4527 if(!netif_queue_stopped(dev))
4528 netif_start_queue(dev);
4529 else
4530 netif_wake_queue(dev);
4531
4532 return 0;
4533}
4534
4535
5e1ad18a 4536static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 4537{
4538 struct r8192_priv *priv = ieee80211_priv(dev);
4539 int ret;
4540
4541 down(&priv->wx_sem);
4542 ret = rtl8192_up(dev);
4543 up(&priv->wx_sem);
4544 return ret;
4545
4546}
4547
4548
4549int rtl8192_up(struct net_device *dev)
4550{
4551 struct r8192_priv *priv = ieee80211_priv(dev);
4552
4553 if (priv->up == 1) return -1;
4554
4555 return _rtl8192_up(dev);
4556}
4557
4558
5e1ad18a 4559static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 4560{
4561 struct r8192_priv *priv = ieee80211_priv(dev);
4562 int ret;
4563
4564 down(&priv->wx_sem);
4565
4566 ret = rtl8192_down(dev);
4567
4568 up(&priv->wx_sem);
4569
4570 return ret;
4571
4572}
4573
4574int rtl8192_down(struct net_device *dev)
4575{
4576 struct r8192_priv *priv = ieee80211_priv(dev);
16d74da0 4577
ecdfa446
GKH		 4578 if (priv->up == 0) return -1;
4579
65a43784 4580#ifdef ENABLE_LPS
4581 //LZM for PS-Poll AID issue. 090429
4582 if(priv->ieee80211->state == IEEE80211_LINKED)
4583 LeisurePSLeave(dev);
4584#endif
4585
ecdfa446
GKH		 4586 priv->up=0;
4587 priv->ieee80211->ieee_up = 0;
4588 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
4589/* FIXME */
4590 if (!netif_queue_stopped(dev))
4591 netif_stop_queue(dev);
4592
4593 rtl8192_irq_disable(dev);
ecdfa446
GKH		 4594 rtl8192_cancel_deferred_work(priv);
4595 deinit_hal_dm(dev);
4596 del_timer_sync(&priv->watch_dog_timer);
4597
65a43784 4598 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
4599
4600 rtl8192_halt_adapter(dev,false);
ecdfa446
GKH		 4601 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
4602
4603 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
4604
16d74da0 4605 return 0;
ecdfa446
GKH		 4606}
4607
4608
4609void rtl8192_commit(struct net_device *dev)
4610{
4611 struct r8192_priv *priv = ieee80211_priv(dev);
4612
4613 if (priv->up == 0) return ;
4614
4615
65a43784 4616 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446
GKH		 4617
4618 rtl8192_irq_disable(dev);
65a43784 4619 rtl8192_halt_adapter(dev,true);
ecdfa446
GKH		 4620 _rtl8192_up(dev);
4621}
4622
5b3b1a7b 4623static void rtl8192_restart(struct work_struct *work)
ecdfa446
GKH		 4624{
4625 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
4626 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 4627
4628 down(&priv->wx_sem);
4629
4630 rtl8192_commit(dev);
4631
4632 up(&priv->wx_sem);
4633}
4634
4635static void r8192_set_multicast(struct net_device *dev)
4636{
4637 struct r8192_priv *priv = ieee80211_priv(dev);
4638 short promisc;
4639
4640 //down(&priv->wx_sem);
4641
4642 /* FIXME FIXME */
4643
4644 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4645
4646 if (promisc != priv->promisc) {
4647 ;
4648 // rtl8192_commit(dev);
4649 }
4650
4651 priv->promisc = promisc;
4652
4653 //schedule_work(&priv->reset_wq);
4654 //up(&priv->wx_sem);
4655}
4656
4657
5e1ad18a 4658static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 4659{
4660 struct r8192_priv *priv = ieee80211_priv(dev);
4661 struct sockaddr *addr = mac;
4662
4663 down(&priv->wx_sem);
4664
4665 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
4666
ecdfa446 4667 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 4668 up(&priv->wx_sem);
4669
4670 return 0;
4671}
4672
4673/* based on ipw2200 driver */
5e1ad18a 4674static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 4675{
4676 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4677 struct iwreq *wrq = (struct iwreq *)rq;
4678 int ret=-1;
4679 struct ieee80211_device *ieee = priv->ieee80211;
4680 u32 key[4];
4681 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
4682 struct iw_point *p = &wrq->u.data;
4683 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
4684
4685 down(&priv->wx_sem);
4686
4687
4688 if (p->length < sizeof(struct ieee_param) || !p->pointer){
4689 ret = -EINVAL;
4690 goto out;
4691 }
4692
32414878 4693 ipw = kmalloc(p->length, GFP_KERNEL);
ecdfa446
GKH		 4694 if (ipw == NULL){
4695 ret = -ENOMEM;
4696 goto out;
4697 }
4698 if (copy_from_user(ipw, p->pointer, p->length)) {
4699 kfree(ipw);
4700 ret = -EFAULT;
4701 goto out;
4702 }
4703
4704 switch (cmd) {
4705 case RTL_IOCTL_WPA_SUPPLICANT:
4706 //parse here for HW security
4707 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
4708 {
4709 if (ipw->u.crypt.set_tx)
4710 {
4711 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4712 ieee->pairwise_key_type = KEY_TYPE_CCMP;
4713 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4714 ieee->pairwise_key_type = KEY_TYPE_TKIP;
4715 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4716 {
4717 if (ipw->u.crypt.key_len == 13)
4718 ieee->pairwise_key_type = KEY_TYPE_WEP104;
4719 else if (ipw->u.crypt.key_len == 5)
4720 ieee->pairwise_key_type = KEY_TYPE_WEP40;
4721 }
4722 else
4723 ieee->pairwise_key_type = KEY_TYPE_NA;
4724
4725 if (ieee->pairwise_key_type)
4726 {
4727 memcpy((u8*)key, ipw->u.crypt.key, 16);
4728 EnableHWSecurityConfig8192(dev);
4729 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
4730 //added by WB.
4731 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4732 if (ieee->auth_mode != 2) //LEAP WEP will never set this.
4733 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
4734 }
4735 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
4736 write_nic_byte(dev, 0x173, 1); //fix aes bug
4737 }
4738
4739 }
4740 else //if (ipw->u.crypt.idx) //group key use idx > 0
4741 {
4742 memcpy((u8*)key, ipw->u.crypt.key, 16);
4743 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
4744 ieee->group_key_type= KEY_TYPE_CCMP;
4745 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
4746 ieee->group_key_type = KEY_TYPE_TKIP;
4747 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
4748 {
4749 if (ipw->u.crypt.key_len == 13)
4750 ieee->group_key_type = KEY_TYPE_WEP104;
4751 else if (ipw->u.crypt.key_len == 5)
4752 ieee->group_key_type = KEY_TYPE_WEP40;
4753 }
4754 else
4755 ieee->group_key_type = KEY_TYPE_NA;
4756
4757 if (ieee->group_key_type)
4758 {
4759 setKey( dev,
4760 ipw->u.crypt.idx,
4761 ipw->u.crypt.idx, //KeyIndex
4762 ieee->group_key_type, //KeyType
4763 broadcast_addr, //MacAddr
4764 0, //DefaultKey
4765 key); //KeyContent
4766 }
4767 }
4768 }
4769#ifdef JOHN_DEBUG
4770 //john's test 0711
4771 {
4772 int i;
4773 printk("@@ wrq->u pointer = ");
4774 for(i=0;i<wrq->u.data.length;i++){
4775 if(i%10==0) printk("\n");
4776 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
4777 }
4778 printk("\n");
4779 }
4780#endif /*JOHN_DEBUG*/
4781 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
4782 break;
4783
4784 default:
4785 ret = -EOPNOTSUPP;
4786 break;
4787 }
4788
4789 kfree(ipw);
4790out:
4791 up(&priv->wx_sem);
4792
4793 return ret;
4794}
4795
5e1ad18a 4796static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 4797{
4798 u8 ret_rate = 0x02;
4799
4800 if(!bIsHT) {
4801 switch(rate) {
4802 case DESC90_RATE1M: ret_rate = MGN_1M; break;
4803 case DESC90_RATE2M: ret_rate = MGN_2M; break;
4804 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
4805 case DESC90_RATE11M: ret_rate = MGN_11M; break;
4806 case DESC90_RATE6M: ret_rate = MGN_6M; break;
4807 case DESC90_RATE9M: ret_rate = MGN_9M; break;
4808 case DESC90_RATE12M: ret_rate = MGN_12M; break;
4809 case DESC90_RATE18M: ret_rate = MGN_18M; break;
4810 case DESC90_RATE24M: ret_rate = MGN_24M; break;
4811 case DESC90_RATE36M: ret_rate = MGN_36M; break;
4812 case DESC90_RATE48M: ret_rate = MGN_48M; break;
4813 case DESC90_RATE54M: ret_rate = MGN_54M; break;
4814
4815 default:
4816 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
4817 break;
4818 }
4819
4820 } else {
4821 switch(rate) {
4822 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
4823 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
4824 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
4825 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
4826 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
4827 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
4828 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
4829 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
4830 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
4831 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
4832 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
4833 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
4834 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
4835 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
4836 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
4837 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
4838 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
4839
4840 default:
4841 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
4842 break;
4843 }
4844 }
4845
4846 return ret_rate;
4847}
4848
214985a6 4849/* Record the TSF time stamp when receiving a packet */
5e1ad18a 4850static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
ecdfa446
GKH		 4851{
4852 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4853
4854 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
4855 stats->mac_time[0] = priv->LastRxDescTSFLow;
4856 stats->mac_time[1] = priv->LastRxDescTSFHigh;
4857 } else {
4858 priv->LastRxDescTSFLow = stats->mac_time[0];
4859 priv->LastRxDescTSFHigh = stats->mac_time[1];
4860 }
4861}
4862
5e1ad18a 4863static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 4864{
4865 long signal_power; // in dBm.
4866
4867 // Translate to dBm (x=0.5y-95).
4868 signal_power = (long)((signal_strength_index + 1) >> 1);
4869 signal_power -= 95;
4870
4871 return signal_power;
4872}
4873
214985a6
MM		 4874/*
4875 * Update Rx signal related information in the packet reeived
4876 * to RxStats. User application can query RxStats to realize
4877 * current Rx signal status.
4878 *
4879 * In normal operation, user only care about the information of the BSS
4880 * and we shall invoke this function if the packet received is from the BSS.
4881 */
5e1ad18a 4882static void
ecdfa446
GKH		 4883rtl819x_update_rxsignalstatistics8190pci(
4884 struct r8192_priv * priv,
4885 struct ieee80211_rx_stats * pprevious_stats
4886 )
4887{
4888 int weighting = 0;
4889
4890 //2 <ToDo> Update Rx Statistics (such as signal strength and signal quality).
4891
4892 // Initila state
4893 if(priv->stats.recv_signal_power == 0)
4894 priv->stats.recv_signal_power = pprevious_stats->RecvSignalPower;
4895
4896 // To avoid the past result restricting the statistics sensitivity, weight the current power (5/6) to speed up the
4897 // reaction of smoothed Signal Power.
4898 if(pprevious_stats->RecvSignalPower > priv->stats.recv_signal_power)
4899 weighting = 5;
4900 else if(pprevious_stats->RecvSignalPower < priv->stats.recv_signal_power)
4901 weighting = (-5);
4902 //
4903 // We need more correct power of received packets and the "SignalStrength" of RxStats have been beautified or translated,
4904 // so we record the correct power in Dbm here. By Bruce, 2008-03-07.
4905 //
4906 priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pprevious_stats->RecvSignalPower + weighting) / 6;
4907}
4908
5e1ad18a 4909static void
ecdfa446
GKH		 4910rtl8190_process_cck_rxpathsel(
4911 struct r8192_priv * priv,
4912 struct ieee80211_rx_stats * pprevious_stats
4913 )
4914{
4915#ifdef RTL8190P //Only 90P 2T4R need to check
4916 char last_cck_adc_pwdb[4]={0,0,0,0};
4917 u8 i;
4918//cosa add for Rx path selection
4919 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
4920 {
4921 if(pprevious_stats->bIsCCK &&
4922 (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
4923 {
4924 /* record the cck adc_pwdb to the sliding window. */
4925 if(priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
4926 {
4927 priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
4928 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4929 {
4930 last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
4931 priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
4932 }
4933 }
4934 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4935 {
4936 priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
4937 priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
4938 }
4939 priv->stats.cck_adc_pwdb.index++;
4940 if(priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
4941 priv->stats.cck_adc_pwdb.index = 0;
4942
4943 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4944 {
4945 DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
4946 }
4947
4948 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4949 {
4950 if(pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
4951 {
4952 priv->undecorated_smoothed_cck_adc_pwdb[i] =
4953 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
4954 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
4955 priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
4956 }
4957 else
4958 {
4959 priv->undecorated_smoothed_cck_adc_pwdb[i] =
4960 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
4961 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
4962 }
4963 }
4964 }
4965 }
4966#endif
4967}
4968
4969
4970/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
4971 be a local static. Otherwise, it may increase when we return from S3/S4. The
4972 value will be kept in memory or disk. We must delcare the value in adapter
4973 and it will be reinitialized when return from S3/S4. */
5e1ad18a 4974static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 4975{
4976 bool bcheck = false;
4977 u8 rfpath;
4978 u32 nspatial_stream, tmp_val;
4979 //u8 i;
4980 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
4981 static u32 slide_evm_index=0, slide_evm_statistics=0;
4982 static u32 last_rssi=0, last_evm=0;
4983 //cosa add for rx path selection
4984// static long slide_cck_adc_pwdb_index=0, slide_cck_adc_pwdb_statistics=0;
4985// static char last_cck_adc_pwdb[4]={0,0,0,0};
4986 //cosa add for beacon rssi smoothing
4987 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
4988 static u32 last_beacon_adc_pwdb=0;
4989
4990 struct ieee80211_hdr_3addr *hdr;
4991 u16 sc ;
4992 unsigned int frag,seq;
4993 hdr = (struct ieee80211_hdr_3addr *)buffer;
4994 sc = le16_to_cpu(hdr->seq_ctl);
4995 frag = WLAN_GET_SEQ_FRAG(sc);
4996 seq = WLAN_GET_SEQ_SEQ(sc);
4997 //cosa add 04292008 to record the sequence number
4998 pcurrent_stats->Seq_Num = seq;
4999 //
5000 // Check whether we should take the previous packet into accounting
5001 //
5002 if(!pprevious_stats->bIsAMPDU)
5003 {
5004 // if previous packet is not aggregated packet
5005 bcheck = true;
5006 }else
5007 {
5008//remve for that we don't use AMPDU to calculate PWDB,because the reported PWDB of some AP is fault.
5009#if 0
5010 // if previous packet is aggregated packet, and current packet
5011 // (1) is not AMPDU
5012 // (2) is the first packet of one AMPDU
5013 // that means the previous packet is the last one aggregated packet
5014 if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
5015 bcheck = true;
5016#endif
5017 }
5018
5019 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
5020 {
5021 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
5022 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
5023 priv->stats.slide_rssi_total -= last_rssi;
5024 }
5025 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
5026
5027 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
5028 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
5029 slide_rssi_index = 0;
5030
5031 // <1> Showed on UI for user, in dbm
5032 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
5033 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
5034 pcurrent_stats->rssi = priv->stats.signal_strength;
5035 //
5036 // If the previous packet does not match the criteria, neglect it
5037 //
5038 if(!pprevious_stats->bPacketMatchBSSID)
5039 {
5040 if(!pprevious_stats->bToSelfBA)
5041 return;
5042 }
5043
5044 if(!bcheck)
5045 return;
5046
5047 rtl8190_process_cck_rxpathsel(priv,pprevious_stats);
5048
5049 //
5050 // Check RSSI
5051 //
5052 priv->stats.num_process_phyinfo++;
5053#if 0
5054 /* record the general signal strength to the sliding window. */
5055 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
5056 {
5057 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
5058 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
5059 priv->stats.slide_rssi_total -= last_rssi;
5060 }
5061 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
5062
5063 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
5064 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
5065 slide_rssi_index = 0;
5066
5067 // <1> Showed on UI for user, in dbm
5068 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
5069 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
5070
5071#endif
5072 // <2> Showed on UI for engineering
5073 // hardware does not provide rssi information for each rf path in CCK
5074 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
5075 {
5076 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
5077 {
5078 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
5079 continue;
5080 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
5081 //Fixed by Jacken 2008-03-20
5082 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
5083 {
5084 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
5085 //DbgPrint("MIMO RSSI initialize \n");
5086 }
5087 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
5088 {
5089 priv->stats.rx_rssi_percentage[rfpath] =
5090 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
5091 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
5092 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
5093 }
5094 else
5095 {
5096 priv->stats.rx_rssi_percentage[rfpath] =
5097 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
5098 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
5099 }
5100 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
5101 }
5102 }
5103
5104
5105 //
5106 // Check PWDB.
5107 //
5108 //cosa add for beacon rssi smoothing by average.
5109 if(pprevious_stats->bPacketBeacon)
5110 {
5111 /* record the beacon pwdb to the sliding window. */
5112 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
5113 {
5114 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
5115 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
5116 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
5117 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
5118 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
5119 }
5120 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
5121 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
5122 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
5123 slide_beacon_adc_pwdb_index++;
5124 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
5125 slide_beacon_adc_pwdb_index = 0;
5126 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
5127 if(pprevious_stats->RxPWDBAll >= 3)
5128 pprevious_stats->RxPWDBAll -= 3;
5129 }
5130
5131 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
5132 pprevious_stats->bIsCCK? "CCK": "OFDM",
5133 pprevious_stats->RxPWDBAll);
5134
5135 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5136 {
5137 if(priv->undecorated_smoothed_pwdb < 0) // initialize
5138 {
5139 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
5140 //DbgPrint("First pwdb initialize \n");
5141 }
5142#if 1
5143 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
5144 {
5145 priv->undecorated_smoothed_pwdb =
5146 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5147 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5148 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
5149 }
5150 else
5151 {
5152 priv->undecorated_smoothed_pwdb =
5153 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
5154 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
5155 }
5156#else
5157 //Fixed by Jacken 2008-03-20
5158 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
5159 {
5160 pHalData->UndecoratedSmoothedPWDB =
5161 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5162 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
5163 }
5164 else
5165 {
5166 pHalData->UndecoratedSmoothedPWDB =
5167 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
5168 }
5169#endif
5170 rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
5171 }
5172
5173 //
5174 // Check EVM
5175 //
5176 /* record the general EVM to the sliding window. */
5177 if(pprevious_stats->SignalQuality == 0)
5178 {
5179 }
5180 else
5181 {
5182 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
5183 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
5184 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
5185 last_evm = priv->stats.slide_evm[slide_evm_index];
5186 priv->stats.slide_evm_total -= last_evm;
5187 }
5188
5189 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
5190
5191 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
5192 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
5193 slide_evm_index = 0;
5194
5195 // <1> Showed on UI for user, in percentage.
5196 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
5197 priv->stats.signal_quality = tmp_val;
5198 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
5199 priv->stats.last_signal_strength_inpercent = tmp_val;
5200 }
5201
5202 // <2> Showed on UI for engineering
5203 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
5204 {
5205 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
5206 {
5207 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
5208 {
5209 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
5210 {
5211 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
5212 }
5213 priv->stats.rx_evm_percentage[nspatial_stream] =
5214 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
5215 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
5216 }
5217 }
5218 }
5219 }
5220
5221}
5222
ecdfa446
GKH		 5223static u8 rtl819x_query_rxpwrpercentage(
5224 char antpower
5225 )
5226{
5227 if ((antpower <= -100) || (antpower >= 20))
5228 {
5229 return 0;
5230 }
5231 else if (antpower >= 0)
5232 {
5233 return 100;
5234 }
5235 else
5236 {
5237 return (100+antpower);
5238 }
5239
d5abdf72 5240}
ecdfa446
GKH		 5241
5242static u8
5243rtl819x_evm_dbtopercentage(
5244 char value
5245 )
5246{
5247 char ret_val;
5248
5249 ret_val = value;
5250
5251 if(ret_val >= 0)
5252 ret_val = 0;
5253 if(ret_val <= -33)
5254 ret_val = -33;
5255 ret_val = 0 - ret_val;
5256 ret_val*=3;
5257 if(ret_val == 99)
5258 ret_val = 100;
c6eae677 5259 return ret_val;
ecdfa446
GKH		 5260}
5261
214985a6 5262/* We want good-looking for signal strength/quality */
5e1ad18a 5263static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 5264{
5265 long retsig;
5266
5267 // Step 1. Scale mapping.
5268 if(currsig >= 61 && currsig <= 100)
5269 {
5270 retsig = 90 + ((currsig - 60) / 4);
5271 }
5272 else if(currsig >= 41 && currsig <= 60)
5273 {
5274 retsig = 78 + ((currsig - 40) / 2);
5275 }
5276 else if(currsig >= 31 && currsig <= 40)
5277 {
5278 retsig = 66 + (currsig - 30);
5279 }
5280 else if(currsig >= 21 && currsig <= 30)
5281 {
5282 retsig = 54 + (currsig - 20);
5283 }
5284 else if(currsig >= 5 && currsig <= 20)
5285 {
5286 retsig = 42 + (((currsig - 5) * 2) / 3);
5287 }
5288 else if(currsig == 4)
5289 {
5290 retsig = 36;
5291 }
5292 else if(currsig == 3)
5293 {
5294 retsig = 27;
5295 }
5296 else if(currsig == 2)
5297 {
5298 retsig = 18;
5299 }
5300 else if(currsig == 1)
5301 {
5302 retsig = 9;
5303 }
5304 else
5305 {
5306 retsig = currsig;
5307 }
5308
5309 return retsig;
5310}
5311
5312static void rtl8192_query_rxphystatus(
5313 struct r8192_priv * priv,
5314 struct ieee80211_rx_stats * pstats,
5315 prx_desc_819x_pci pdesc,
5316 prx_fwinfo_819x_pci pdrvinfo,
5317 struct ieee80211_rx_stats * precord_stats,
5318 bool bpacket_match_bssid,
5319 bool bpacket_toself,
5320 bool bPacketBeacon,
5321 bool bToSelfBA
5322 )
5323{
5324 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
5325 phy_sts_ofdm_819xpci_t* pofdm_buf;
5326 phy_sts_cck_819xpci_t * pcck_buf;
5327 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
5328 u8 *prxpkt;
5329 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
5330 char rx_pwr[4], rx_pwr_all=0;
5331 //long rx_avg_pwr = 0;
5332 char rx_snrX, rx_evmX;
5333 u8 evm, pwdb_all;
5334 u32 RSSI, total_rssi=0;//, total_evm=0;
5335// long signal_strength_index = 0;
5336 u8 is_cck_rate=0;
5337 u8 rf_rx_num = 0;
5338
5339 /* 2007/07/04 MH For OFDM RSSI. For high power or not. */
5340 static u8 check_reg824 = 0;
5341 static u32 reg824_bit9 = 0;
5342
5343 priv->stats.numqry_phystatus++;
5344
5345 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
5346
5347 // Record it for next packet processing
5348 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
5349 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
5350 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
5351 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
5352 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
5353 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
5354 /*2007.08.30 requested by SD3 Jerry */
5355 if(check_reg824 == 0)
5356 {
5357 reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
5358 check_reg824 = 1;
5359 }
5360
5361
5362 prxpkt = (u8*)pdrvinfo;
5363
5364 /* Move pointer to the 16th bytes. Phy status start address. */
5365 prxpkt += sizeof(rx_fwinfo_819x_pci);
5366
5367 /* Initial the cck and ofdm buffer pointer */
5368 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
5369 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
5370
5371 pstats->RxMIMOSignalQuality[0] = -1;
5372 pstats->RxMIMOSignalQuality[1] = -1;
5373 precord_stats->RxMIMOSignalQuality[0] = -1;
5374 precord_stats->RxMIMOSignalQuality[1] = -1;
5375
5376 if(is_cck_rate)
5377 {
5378 //
5379 // (1)Hardware does not provide RSSI for CCK
5380 //
5381
5382 //
5383 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5384 //
5385 u8 report;//, cck_agc_rpt;
5386#ifdef RTL8190P
5387 u8 tmp_pwdb;
5388 char cck_adc_pwdb[4];
5389#endif
5390 priv->stats.numqry_phystatusCCK++;
5391
5392#ifdef RTL8190P //Only 90P 2T4R need to check
5393 if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid)
5394 {
5395 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5396 {
5397 tmp_pwdb = pcck_buf->adc_pwdb_X[i];
5398 cck_adc_pwdb[i] = (char)tmp_pwdb;
5399 cck_adc_pwdb[i] /= 2;
5400 pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i];
5401 //DbgPrint("RF-%d tmp_pwdb = 0x%x, cck_adc_pwdb = %d", i, tmp_pwdb, cck_adc_pwdb[i]);
5402 }
5403 }
5404#endif
5405
5406 if(!reg824_bit9)
5407 {
5408 report = pcck_buf->cck_agc_rpt & 0xc0;
5409 report = report>>6;
5410 switch(report)
5411 {
5412 //Fixed by Jacken from Bryant 2008-03-20
5413 //Original value is -38 , -26 , -14 , -2
5414 //Fixed value is -35 , -23 , -11 , 6
5415 case 0x3:
5416 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
5417 break;
5418 case 0x2:
5419 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
5420 break;
5421 case 0x1:
5422 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
5423 break;
5424 case 0x0:
5425 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
5426 break;
5427 }
5428 }
5429 else
5430 {
5431 report = pcck_buf->cck_agc_rpt & 0x60;
5432 report = report>>5;
5433 switch(report)
5434 {
5435 case 0x3:
5436 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5437 break;
5438 case 0x2:
5439 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
5440 break;
5441 case 0x1:
5442 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5443 break;
5444 case 0x0:
5445 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
5446 break;
5447 }
5448 }
5449
5450 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5451 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5452 pstats->RecvSignalPower = rx_pwr_all;
5453
5454 //
5455 // (3) Get Signal Quality (EVM)
5456 //
5457 if(bpacket_match_bssid)
5458 {
5459 u8 sq;
5460
5461 if(pstats->RxPWDBAll > 40)
5462 {
5463 sq = 100;
5464 }else
5465 {
5466 sq = pcck_buf->sq_rpt;
5467
5468 if(pcck_buf->sq_rpt > 64)
5469 sq = 0;
5470 else if (pcck_buf->sq_rpt < 20)
5471 sq = 100;
5472 else
5473 sq = ((64-sq) * 100) / 44;
5474 }
5475 pstats->SignalQuality = precord_stats->SignalQuality = sq;
5476 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
5477 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
5478 }
5479 }
5480 else
5481 {
5482 priv->stats.numqry_phystatusHT++;
5483 //
5484 // (1)Get RSSI for HT rate
5485 //
5486 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
5487 {
5488 // 2008/01/30 MH we will judge RF RX path now.
5489 if (priv->brfpath_rxenable[i])
5490 rf_rx_num++;
5491 //else
5492 //continue;
5493
5494 //Fixed by Jacken from Bryant 2008-03-20
5495 //Original value is 106
5496#ifdef RTL8190P //Modify by Jacken 2008/03/31
5497 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
5498#else
5499 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
5500#endif
5501
5502 //Get Rx snr value in DB
5503 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
5504 rx_snrX = (char)(tmp_rxsnr);
5505 rx_snrX /= 2;
5506 priv->stats.rxSNRdB[i] = (long)rx_snrX;
5507
5508 /* Translate DBM to percentage. */
5509 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
5510 if (priv->brfpath_rxenable[i])
5511 total_rssi += RSSI;
5512
5513 /* Record Signal Strength for next packet */
5514 if(bpacket_match_bssid)
5515 {
5516 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
5517 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
5518 }
5519 }
5520
5521
5522 //
5523 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
5524 //
5525 //Fixed by Jacken from Bryant 2008-03-20
5526 //Original value is 106
5527 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
5528 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
5529
5530 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
5531 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
5532 pstats->RecvSignalPower = rx_pwr_all;
5533 //
5534 // (3)EVM of HT rate
5535 //
5536 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
5537 pdrvinfo->RxRate<=DESC90_RATEMCS15)
5538 max_spatial_stream = 2; //both spatial stream make sense
5539 else
5540 max_spatial_stream = 1; //only spatial stream 1 makes sense
5541
5542 for(i=0; i<max_spatial_stream; i++)
5543 {
5544 tmp_rxevm = pofdm_buf->rxevm_X[i];
5545 rx_evmX = (char)(tmp_rxevm);
5546
5547 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
5548 // fill most significant bit to "zero" when doing shifting operation which may change a negative
5549 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
5550 rx_evmX /= 2; //dbm
5551
5552 evm = rtl819x_evm_dbtopercentage(rx_evmX);
5553#if 0
5554 EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100
5555#endif
5556 if(bpacket_match_bssid)
5557 {
5558 if(i==0) // Fill value in RFD, Get the first spatial stream only
5559 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
5560 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
5561 }
5562 }
5563
5564
5565 /* record rx statistics for debug */
5566 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
5567 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
5568 if(pdrvinfo->BW) //40M channel
5569 priv->stats.received_bwtype[1+prxsc->rxsc]++;
5570 else //20M channel
5571 priv->stats.received_bwtype[0]++;
5572 }
5573
5574 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
5575 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
5576 if(is_cck_rate)
5577 {
5578 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
5579
5580 }
5581 else
5582 {
5583 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
5584 // We can judge RX path number now.
5585 if (rf_rx_num != 0)
5586 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
5587 }
d5abdf72 5588}
ecdfa446 5589
5e1ad18a 5590static void
ecdfa446
GKH		 5591rtl8192_record_rxdesc_forlateruse(
5592 struct ieee80211_rx_stats * psrc_stats,
5593 struct ieee80211_rx_stats * ptarget_stats
5594)
5595{
5596 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
5597 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
5598 //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
5599}
5600
5601
5602
5e1ad18a 5603static void TranslateRxSignalStuff819xpci(struct net_device *dev,
ecdfa446
GKH		 5604 struct sk_buff *skb,
5605 struct ieee80211_rx_stats * pstats,
5606 prx_desc_819x_pci pdesc,
5607 prx_fwinfo_819x_pci pdrvinfo)
5608{
5609 // TODO: We must only check packet for current MAC address. Not finish
5610 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5611 bool bpacket_match_bssid, bpacket_toself;
5612 bool bPacketBeacon=false, bToSelfBA=false;
5613 static struct ieee80211_rx_stats previous_stats;
5614 struct ieee80211_hdr_3addr *hdr;
5615 u16 fc,type;
5616
5617 // Get Signal Quality for only RX data queue (but not command queue)
5618
5619 u8* tmp_buf;
5620 u8 *praddr;
5621
5622 /* Get MAC frame start address. */
5623 tmp_buf = skb->data;
5624
5625 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
5626 fc = le16_to_cpu(hdr->frame_ctl);
5627 type = WLAN_FC_GET_TYPE(fc);
5628 praddr = hdr->addr1;
5629
5630 /* Check if the received packet is acceptabe. */
5631 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
5632 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
5633 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
5634 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5635#if 1//cosa
5636 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
5637 {
5638 bPacketBeacon = true;
5639 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
5640 }
5641 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
5642 {
5643 if((eqMacAddr(praddr,dev->dev_addr)))
5644 bToSelfBA = true;
5645 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
5646 }
5647
5648#endif
5649 if(bpacket_match_bssid)
5650 {
5651 priv->stats.numpacket_matchbssid++;
5652 }
5653 if(bpacket_toself){
5654 priv->stats.numpacket_toself++;
5655 }
5656 //
5657 // Process PHY information for previous packet (RSSI/PWDB/EVM)
5658 //
5659 // Because phy information is contained in the last packet of AMPDU only, so driver
5660 // should process phy information of previous packet
5661 rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
5662 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
5663 bpacket_toself ,bPacketBeacon, bToSelfBA);
5664 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
5665
5666}
5667
5668
5e1ad18a 5669static void rtl8192_tx_resume(struct net_device *dev)
ecdfa446
GKH		 5670{
5671 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5672 struct ieee80211_device *ieee = priv->ieee80211;
5673 struct sk_buff *skb;
5674 int queue_index;
5675
5676 for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
5677 while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
5678 (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
5679 /* 1. dequeue the packet from the wait queue */
5680 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
5681 /* 2. tx the packet directly */
5682 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
5683 #if 0
5684 if(queue_index!=MGNT_QUEUE) {
5685 ieee->stats.tx_packets++;
5686 ieee->stats.tx_bytes += skb->len;
5687 }
5688 #endif
5689 }
5690 }
5691}
5692
559fba5e 5693static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv)
ecdfa446
GKH		 5694{
5695 rtl8192_tx_resume(priv->ieee80211->dev);
5696}
5697
214985a6 5698/* Record the received data rate */
5e1ad18a 5699static void UpdateReceivedRateHistogramStatistics8190(
ecdfa446
GKH		 5700 struct net_device *dev,
5701 struct ieee80211_rx_stats* pstats
5702 )
5703{
5704 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5705 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
5706 u32 rateIndex;
5707 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
5708
ecdfa446
GKH		 5709 if(pstats->bCRC)
5710 rcvType = 2;
5711 else if(pstats->bICV)
5712 rcvType = 3;
5713
5714 if(pstats->bShortPreamble)
5715 preamble_guardinterval = 1;// short
5716 else
5717 preamble_guardinterval = 0;// long
5718
5719 switch(pstats->rate)
5720 {
5721 //
5722 // CCK rate
5723 //
5724 case MGN_1M: rateIndex = 0; break;
5725 case MGN_2M: rateIndex = 1; break;
5726 case MGN_5_5M: rateIndex = 2; break;
5727 case MGN_11M: rateIndex = 3; break;
5728 //
5729 // Legacy OFDM rate
5730 //
5731 case MGN_6M: rateIndex = 4; break;
5732 case MGN_9M: rateIndex = 5; break;
5733 case MGN_12M: rateIndex = 6; break;
5734 case MGN_18M: rateIndex = 7; break;
5735 case MGN_24M: rateIndex = 8; break;
5736 case MGN_36M: rateIndex = 9; break;
5737 case MGN_48M: rateIndex = 10; break;
5738 case MGN_54M: rateIndex = 11; break;
5739 //
5740 // 11n High throughput rate
5741 //
5742 case MGN_MCS0: rateIndex = 12; break;
5743 case MGN_MCS1: rateIndex = 13; break;
5744 case MGN_MCS2: rateIndex = 14; break;
5745 case MGN_MCS3: rateIndex = 15; break;
5746 case MGN_MCS4: rateIndex = 16; break;
5747 case MGN_MCS5: rateIndex = 17; break;
5748 case MGN_MCS6: rateIndex = 18; break;
5749 case MGN_MCS7: rateIndex = 19; break;
5750 case MGN_MCS8: rateIndex = 20; break;
5751 case MGN_MCS9: rateIndex = 21; break;
5752 case MGN_MCS10: rateIndex = 22; break;
5753 case MGN_MCS11: rateIndex = 23; break;
5754 case MGN_MCS12: rateIndex = 24; break;
5755 case MGN_MCS13: rateIndex = 25; break;
5756 case MGN_MCS14: rateIndex = 26; break;
5757 case MGN_MCS15: rateIndex = 27; break;
5758 default: rateIndex = 28; break;
5759 }
5760 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
5761 priv->stats.received_rate_histogram[0][rateIndex]++; //total
5762 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
5763}
5764
5e1ad18a 5765static void rtl8192_rx(struct net_device *dev)
ecdfa446
GKH		 5766{
5767 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5768 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
5769 bool unicast_packet = false;
5770 struct ieee80211_rx_stats stats = {
5771 .signal = 0,
5772 .noise = -98,
5773 .rate = 0,
5774 .freq = IEEE80211_24GHZ_BAND,
5775 };
5776 unsigned int count = priv->rxringcount;
5777
5778 stats.nic_type = NIC_8192E;
5779
5780 while (count--) {
5781 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
5782 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
5783
5784 if (pdesc->OWN){
5785 /* wait data to be filled by hardware */
5786 return;
5787 } else {
5788 stats.bICV = pdesc->ICV;
5789 stats.bCRC = pdesc->CRC32;
5790 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
5791
5792 stats.Length = pdesc->Length;
5793 if(stats.Length < 24)
5794 stats.bHwError |= 1;
5795
5796 if(stats.bHwError) {
5797 stats.bShift = false;
5798
5799 if(pdesc->CRC32) {
5800 if (pdesc->Length <500)
5801 priv->stats.rxcrcerrmin++;
5802 else if (pdesc->Length >1000)
5803 priv->stats.rxcrcerrmax++;
5804 else
5805 priv->stats.rxcrcerrmid++;
5806 }
5807 goto done;
5808 } else {
5809 prx_fwinfo_819x_pci pDrvInfo = NULL;
5810 struct sk_buff *new_skb = dev_alloc_skb(priv->rxbuffersize);
5811
5812 if (unlikely(!new_skb)) {
5813 goto done;
5814 }
5815
5816 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
5817 stats.RxBufShift = ((pdesc->Shift)&0x03);
5818 stats.Decrypted = !pdesc->SWDec;
5819
ecdfa446 5820 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 5821 *((dma_addr_t *)skb->cb),
5822 priv->rxbuffersize,
5823 PCI_DMA_FROMDEVICE);
5824 skb_put(skb, pdesc->Length);
5825 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
5826 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
5827
5828 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
5829 stats.bShortPreamble = pDrvInfo->SPLCP;
5830
5831 /* it is debug only. It should be disabled in released driver.
5832 * 2007.1.11 by Emily
5833 * */
5834 UpdateReceivedRateHistogramStatistics8190(dev, &stats);
5835
5836 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
5837 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
5838
5839 stats.TimeStampLow = pDrvInfo->TSFL;
5840 stats.TimeStampHigh = read_nic_dword(dev, TSFR+4);
5841
5842 UpdateRxPktTimeStamp8190(dev, &stats);
5843
5844 //
5845 // Get Total offset of MPDU Frame Body
5846 //
5847 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
5848 stats.bShift = 1;
5849
5850 stats.RxIs40MHzPacket = pDrvInfo->BW;
5851
5852 /* ???? */
5853 TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
5854
5855 /* Rx A-MPDU */
5856 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
5857 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
5858 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
5859 skb_trim(skb, skb->len - 4/*sCrcLng*/);
5860 /* rx packets statistics */
5861 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
5862 unicast_packet = false;
5863
5864 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
5865 //TODO
5866 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
5867 //TODO
5868 }else {
5869 /* unicast packet */
5870 unicast_packet = true;
5871 }
5872
5873 stats.packetlength = stats.Length-4;
5874 stats.fraglength = stats.packetlength;
5875 stats.fragoffset = 0;
5876 stats.ntotalfrag = 1;
5877
fb5fe277 5878 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
ecdfa446
GKH		 5879 dev_kfree_skb_any(skb);
5880 } else {
5881 priv->stats.rxok++;
5882 if(unicast_packet) {
5883 priv->stats.rxbytesunicast += skb->len;
5884 }
5885 }
5886
5887 skb = new_skb;
5888 priv->rx_buf[priv->rx_idx] = skb;
1c7ec2e8 5889 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
ecdfa446
GKH		 5890 }
5891
5892 }
5893done:
5894 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
5895 pdesc->OWN = 1;
5896 pdesc->Length = priv->rxbuffersize;
5897 if (priv->rx_idx == priv->rxringcount-1)
5898 pdesc->EOR = 1;
5899 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
5900 }
5901
5902}
5903
559fba5e 5904static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
ecdfa446
GKH		 5905{
5906 rtl8192_rx(priv->ieee80211->dev);
5907 /* unmask RDU */
5908 write_nic_dword(priv->ieee80211->dev, INTA_MASK,read_nic_dword(priv->ieee80211->dev, INTA_MASK) | IMR_RDU);
5909}
5910
5911static const struct net_device_ops rtl8192_netdev_ops = {
5912 .ndo_open = rtl8192_open,
5913 .ndo_stop = rtl8192_close,
ecdfa446
GKH		 5914 .ndo_tx_timeout = tx_timeout,
5915 .ndo_do_ioctl = rtl8192_ioctl,
5916 .ndo_set_multicast_list = r8192_set_multicast,
5917 .ndo_set_mac_address = r8192_set_mac_adr,
fb5fe277 5918 .ndo_start_xmit = ieee80211_rtl_xmit,
ecdfa446
GKH		 5919};
5920
ecdfa446
GKH		 5921static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
5922 const struct pci_device_id *id)
5923{
5924 unsigned long ioaddr = 0;
5925 struct net_device *dev = NULL;
5926 struct r8192_priv *priv= NULL;
5927 u8 unit = 0;
3a8f2d3c 5928 int ret = -ENODEV;
ecdfa446
GKH		 5929
5930#ifdef CONFIG_RTL8192_IO_MAP
5931 unsigned long pio_start, pio_len, pio_flags;
5932#else
5933 unsigned long pmem_start, pmem_len, pmem_flags;
5934#endif //end #ifdef RTL_IO_MAP
5935
5936 RT_TRACE(COMP_INIT,"Configuring chip resources");
5937
5938 if( pci_enable_device (pdev) ){
5939 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
5940 return -EIO;
5941 }
5942
5943 pci_set_master(pdev);
5944 //pci_set_wmi(pdev);
5945 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 5946 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446 5947 dev = alloc_ieee80211(sizeof(struct r8192_priv));
3a8f2d3c
KV		 5948 if (!dev) {
5949 ret = -ENOMEM;
5950 goto fail_free;
5951 }
ecdfa446 5952
ecdfa446 5953 pci_set_drvdata(pdev, dev);
ecdfa446 5954 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 5955 priv = ieee80211_priv(dev);
ecdfa446 5956 priv->ieee80211 = netdev_priv(dev);
ecdfa446 5957 priv->pdev=pdev;
ecdfa446
GKH		 5958 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
5959 priv->ieee80211->bSupportRemoteWakeUp = 1;
5960 } else
ecdfa446
GKH		 5961 {
5962 priv->ieee80211->bSupportRemoteWakeUp = 0;
5963 }
5964
5965#ifdef CONFIG_RTL8192_IO_MAP
5966
5967 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5968 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5969 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5970
5971 if (!(pio_flags & IORESOURCE_IO)) {
5972 RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
5973 goto fail;
5974 }
5975
5976 //DMESG("IO space @ 0x%08lx", pio_start );
5977 if( ! request_region( pio_start, pio_len, RTL819xE_MODULE_NAME ) ){
5978 RT_TRACE(COMP_ERR,"request_region failed!");
5979 goto fail;
5980 }
5981
5982 ioaddr = pio_start;
5983 dev->base_addr = ioaddr; // device I/O address
5984
5985#else
5986
5987 pmem_start = pci_resource_start(pdev, 1);
5988 pmem_len = pci_resource_len(pdev, 1);
5989 pmem_flags = pci_resource_flags (pdev, 1);
5990
5991 if (!(pmem_flags & IORESOURCE_MEM)) {
5992 RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
5993 goto fail;
5994 }
5995
5996 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5997 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
5998 RT_TRACE(COMP_ERR,"request_mem_region failed!");
5999 goto fail;
6000 }
6001
6002
6003 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
6004 if( ioaddr == (unsigned long)NULL ){
6005 RT_TRACE(COMP_ERR,"ioremap failed!");
6006 // release_mem_region( pmem_start, pmem_len );
6007 goto fail1;
6008 }
6009
6010 dev->mem_start = ioaddr; // shared mem start
6011 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
6012
6013#endif //end #ifdef RTL_IO_MAP
6014
6015 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6016 * PCI Tx retries from interfering with C3 CPU state */
6017 pci_write_config_byte(pdev, 0x41, 0x00);
6018
6019
6020 pci_read_config_byte(pdev, 0x05, &unit);
6021 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
6022
6023 dev->irq = pdev->irq;
6024 priv->irq = 0;
6025
6026 dev->netdev_ops = &rtl8192_netdev_ops;
6027#if 0
6028 dev->open = rtl8192_open;
6029 dev->stop = rtl8192_close;
6030 //dev->hard_start_xmit = rtl8192_8023_hard_start_xmit;
6031 dev->tx_timeout = tx_timeout;
6032 //dev->wireless_handlers = &r8192_wx_handlers_def;
6033 dev->do_ioctl = rtl8192_ioctl;
6034 dev->set_multicast_list = r8192_set_multicast;
6035 dev->set_mac_address = r8192_set_mac_adr;
6036#endif
6037
6038 //DMESG("Oops: i'm coming\n");
6039#if WIRELESS_EXT >= 12
6040#if WIRELESS_EXT < 17
6041 dev->get_wireless_stats = r8192_get_wireless_stats;
6042#endif
6043 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
6044#endif
6045 //dev->get_wireless_stats = r8192_get_wireless_stats;
6046 dev->type=ARPHRD_ETHER;
6047
6048 dev->watchdog_timeo = HZ*3; //modified by john, 0805
6049
6050 if (dev_alloc_name(dev, ifname) < 0){
6051 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
dca41306 6052 strcpy(ifname, "wlan%d");
ecdfa446
GKH		 6053 dev_alloc_name(dev, ifname);
6054 }
6055
6056 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
6057 if(rtl8192_init(dev)!=0){
6058 RT_TRACE(COMP_ERR, "Initialization failed");
6059 goto fail;
6060 }
6061
6062 netif_carrier_off(dev);
6063 netif_stop_queue(dev);
6064
6065 register_netdev(dev);
6066 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
6067 rtl8192_proc_init_one(dev);
6068
6069
6070 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 6071 return 0;
ecdfa446
GKH		 6072
6073fail1:
6074
6075#ifdef CONFIG_RTL8180_IO_MAP
6076
6077 if( dev->base_addr != 0 ){
6078
6079 release_region(dev->base_addr,
6080 pci_resource_len(pdev, 0) );
6081 }
6082#else
6083 if( dev->mem_start != (unsigned long)NULL ){
6084 iounmap( (void *)dev->mem_start );
6085 release_mem_region( pci_resource_start(pdev, 1),
6086 pci_resource_len(pdev, 1) );
6087 }
6088#endif //end #ifdef RTL_IO_MAP
6089
6090fail:
6091 if(dev){
6092
6093 if (priv->irq) {
6094 free_irq(dev->irq, dev);
6095 dev->irq=0;
6096 }
6097 free_ieee80211(dev);
6098 }
6099
3a8f2d3c 6100fail_free:
ecdfa446
GKH		 6101 pci_disable_device(pdev);
6102
6103 DMESG("wlan driver load failed\n");
6104 pci_set_drvdata(pdev, NULL);
3a8f2d3c 6105 return ret;
ecdfa446
GKH		 6106
6107}
6108
6109/* detach all the work and timer structure declared or inititialized
6110 * in r8192_init function.
6111 * */
5b3b1a7b 6112static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
ecdfa446
GKH		 6113{
6114 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
6115 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
6116 * Otherwise call cancel_delayed_work is enough.
39cfb97b 6117 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
ecdfa446 6118 * */
ecdfa446
GKH		 6119 cancel_delayed_work(&priv->watch_dog_wq);
6120 cancel_delayed_work(&priv->update_beacon_wq);
6121 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
6122 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
6123#ifdef RTL8192E
6124 cancel_delayed_work(&priv->gpio_change_rf_wq);
6125#endif
ecdfa446
GKH		 6126 cancel_work_sync(&priv->reset_wq);
6127 cancel_work_sync(&priv->qos_activate);
6128 //cancel_work_sync(&priv->SetBWModeWorkItem);
6129 //cancel_work_sync(&priv->SwChnlWorkItem);
ecdfa446
GKH		 6130
6131}
6132
6133
6134static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
6135{
6136 struct net_device *dev = pci_get_drvdata(pdev);
6137 struct r8192_priv *priv ;
6138
6139 if(dev){
6140
6141 unregister_netdev(dev);
6142
6143 priv=ieee80211_priv(dev);
6144
6145 rtl8192_proc_remove_one(dev);
6146
6147 rtl8192_down(dev);
6148 if (priv->pFirmware)
6149 {
6150 vfree(priv->pFirmware);
6151 priv->pFirmware = NULL;
6152 }
6153 // priv->rf_close(dev);
6154 // rtl8192_usb_deleteendpoints(dev);
ecdfa446 6155 destroy_workqueue(priv->priv_wq);
ecdfa446
GKH		 6156 /* redundant with rtl8192_down */
6157 // rtl8192_irq_disable(dev);
6158 // rtl8192_reset(dev);
6159 // mdelay(10);
6160 {
6161 u32 i;
6162 /* free tx/rx rings */
6163 rtl8192_free_rx_ring(dev);
6164 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
6165 rtl8192_free_tx_ring(dev, i);
6166 }
6167 }
6168 if(priv->irq){
6169
6170 printk("Freeing irq %d\n",dev->irq);
6171 free_irq(dev->irq, dev);
6172 priv->irq=0;
6173
6174 }
6175
6176
6177
6178 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6179
6180#ifdef CONFIG_RTL8180_IO_MAP
6181
6182 if( dev->base_addr != 0 ){
6183
6184 release_region(dev->base_addr,
6185 pci_resource_len(pdev, 0) );
6186 }
6187#else
6188 if( dev->mem_start != (unsigned long)NULL ){
6189 iounmap( (void *)dev->mem_start );
6190 release_mem_region( pci_resource_start(pdev, 1),
6191 pci_resource_len(pdev, 1) );
6192 }
6193#endif /*end #ifdef RTL_IO_MAP*/
6194 free_ieee80211(dev);
6195
6196 }
6197
6198 pci_disable_device(pdev);
6199 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
6200}
6201
fb5fe277
GK		 6202extern int ieee80211_rtl_init(void);
6203extern void ieee80211_rtl_exit(void);
ecdfa446
GKH		 6204
6205static int __init rtl8192_pci_module_init(void)
6206{
6207 int retval;
6208
fb5fe277 6209 retval = ieee80211_rtl_init();
ecdfa446
GKH		 6210 if (retval)
6211 return retval;
6212
6213 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
6214 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
6215 RT_TRACE(COMP_INIT, "Initializing module");
6216 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
6217 rtl8192_proc_module_init();
ecdfa446 6218 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 6219 {
6220 DMESG("No device found");
6221 /*pci_unregister_driver (&rtl8192_pci_driver);*/
6222 return -ENODEV;
6223 }
6224 return 0;
6225}
6226
6227
6228static void __exit rtl8192_pci_module_exit(void)
6229{
6230 pci_unregister_driver(&rtl8192_pci_driver);
6231
6232 RT_TRACE(COMP_DOWN, "Exiting");
6233 rtl8192_proc_module_remove();
fb5fe277 6234 ieee80211_rtl_exit();
ecdfa446
GKH		 6235}
6236
6237//warning message WB
559fba5e 6238static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446
GKH		 6239{
6240 struct net_device *dev = (struct net_device *) netdev;
6241 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6242 unsigned long flags;
6243 u32 inta;
6244 /* We should return IRQ_NONE, but for now let me keep this */
6245 if(priv->irq_enabled == 0){
ecdfa446 6246 return IRQ_HANDLED;
ecdfa446
GKH		 6247 }
6248
6249 spin_lock_irqsave(&priv->irq_th_lock,flags);
6250
6251 //ISR: 4bytes
6252
6253 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6254 write_nic_dword(dev,ISR,inta); // reset int situation
6255
6256 priv->stats.shints++;
6257 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6258 if(!inta){
6259 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6260 return IRQ_HANDLED;
ecdfa446
GKH		 6261 /*
6262 most probably we can safely return IRQ_NONE,
6263 but for now is better to avoid problems
6264 */
6265 }
6266
6267 if(inta == 0xffff){
6268 /* HW disappared */
6269 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6270 return IRQ_HANDLED;
ecdfa446
GKH		 6271 }
6272
6273 priv->stats.ints++;
6274#ifdef DEBUG_IRQ
6275 DMESG("NIC irq %x",inta);
6276#endif
6277 //priv->irqpending = inta;
6278
6279
6280 if(!netif_running(dev)) {
6281 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
ecdfa446 6282 return IRQ_HANDLED;
ecdfa446
GKH		 6283 }
6284
6285 if(inta & IMR_TIMEOUT0){
6286 // write_nic_dword(dev, TimerInt, 0);
6287 //DMESG("=================>waking up");
6288 // rtl8180_hw_wakeup(dev);
6289 }
6290
6291 if(inta & IMR_TBDOK){
6292 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6293 rtl8192_tx_isr(dev, BEACON_QUEUE);
6294 priv->stats.txbeaconokint++;
6295 }
6296
6297 if(inta & IMR_TBDER){
6298 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
6299 rtl8192_tx_isr(dev, BEACON_QUEUE);
6300 priv->stats.txbeaconerr++;
6301 }
6302
6303 if(inta & IMR_MGNTDOK ) {
6304 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
6305 priv->stats.txmanageokint++;
6306 rtl8192_tx_isr(dev,MGNT_QUEUE);
6307
6308 }
6309
6310 if(inta & IMR_COMDOK)
6311 {
6312 priv->stats.txcmdpktokint++;
6313 rtl8192_tx_isr(dev,TXCMD_QUEUE);
6314 }
6315
6316 if(inta & IMR_ROK){
6317#ifdef DEBUG_RX
6318 DMESG("Frame arrived !");
6319#endif
6320 priv->stats.rxint++;
6321 tasklet_schedule(&priv->irq_rx_tasklet);
6322 }
6323
6324 if(inta & IMR_BcnInt) {
6325 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
6326 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
6327 }
6328
6329 if(inta & IMR_RDU){
6330 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
6331 priv->stats.rxrdu++;
6332 /* reset int situation */
6333 write_nic_dword(dev,INTA_MASK,read_nic_dword(dev, INTA_MASK) & ~IMR_RDU);
6334 tasklet_schedule(&priv->irq_rx_tasklet);
6335 }
6336
6337 if(inta & IMR_RXFOVW){
6338 RT_TRACE(COMP_INTR, "rx overflow !\n");
6339 priv->stats.rxoverflow++;
6340 tasklet_schedule(&priv->irq_rx_tasklet);
6341 }
6342
6343 if(inta & IMR_TXFOVW) priv->stats.txoverflow++;
6344
6345 if(inta & IMR_BKDOK){
6346 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
6347 priv->stats.txbkokint++;
6348 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6349 rtl8192_tx_isr(dev,BK_QUEUE);
6350 rtl8192_try_wake_queue(dev, BK_QUEUE);
6351 }
6352
6353 if(inta & IMR_BEDOK){
6354 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
6355 priv->stats.txbeokint++;
6356 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6357 rtl8192_tx_isr(dev,BE_QUEUE);
6358 rtl8192_try_wake_queue(dev, BE_QUEUE);
6359 }
6360
6361 if(inta & IMR_VIDOK){
6362 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
6363 priv->stats.txviokint++;
6364 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6365 rtl8192_tx_isr(dev,VI_QUEUE);
6366 rtl8192_try_wake_queue(dev, VI_QUEUE);
6367 }
6368
6369 if(inta & IMR_VODOK){
6370 priv->stats.txvookint++;
6371 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
6372 rtl8192_tx_isr(dev,VO_QUEUE);
6373 rtl8192_try_wake_queue(dev, VO_QUEUE);
6374 }
6375
ecdfa446
GKH		 6376 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6377
ecdfa446 6378 return IRQ_HANDLED;
ecdfa446
GKH		 6379}
6380
559fba5e 6381static void rtl8192_try_wake_queue(struct net_device *dev, int pri)
ecdfa446 6382{
ecdfa446
GKH		 6383}
6384
6385
6386void EnableHWSecurityConfig8192(struct net_device *dev)
6387{
6388 u8 SECR_value = 0x0;
ecdfa446 6389 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
16d74da0
MM		 6390 struct ieee80211_device* ieee = priv->ieee80211;
6391
ecdfa446
GKH		 6392 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
6393#if 1
6394 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
6395 {
6396 SECR_value |= SCR_RxUseDK;
6397 SECR_value |= SCR_TxUseDK;
6398 }
6399 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
6400 {
6401 SECR_value |= SCR_RxUseDK;
6402 SECR_value |= SCR_TxUseDK;
6403 }
6404
6405#endif
6406
6407 //add HWSec active enable here.
6408//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
6409 ieee->hwsec_active = 1;
6410
6411 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
6412 {
6413 ieee->hwsec_active = 0;
6414 SECR_value &= ~SCR_RxDecEnable;
6415 }
6416
207b58fb 6417 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
ecdfa446
GKH		 6418 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
6419 {
6420 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
6421 }
6422
6423}
6424#define TOTAL_CAM_ENTRY 32
6425//#define CAM_CONTENT_COUNT 8
6426void setKey( struct net_device *dev,
6427 u8 EntryNo,
6428 u8 KeyIndex,
6429 u16 KeyType,
881a975b 6430 const u8 *MacAddr,
ecdfa446
GKH		 6431 u8 DefaultKey,
6432 u32 *KeyContent )
6433{
6434 u32 TargetCommand = 0;
6435 u32 TargetContent = 0;
6436 u16 usConfig = 0;
6437 u8 i;
6438#ifdef ENABLE_IPS
6439 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6440 RT_RF_POWER_STATE rtState;
6441 rtState = priv->ieee80211->eRFPowerState;
6442 if(priv->ieee80211->PowerSaveControl.bInactivePs){
6443 if(rtState == eRfOff){
6444 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
6445 {
6446 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
65a43784 6447 //up(&priv->wx_sem);
ecdfa446
GKH		 6448 return ;
6449 }
6450 else{
65a43784 6451 down(&priv->ieee80211->ips_sem);
ecdfa446 6452 IPSLeave(dev);
65a43784 6453 up(&priv->ieee80211->ips_sem);
ecdfa446
GKH		 6454 }
6455 }
6456 }
6457 priv->ieee80211->is_set_key = true;
6458#endif
6459 if (EntryNo >= TOTAL_CAM_ENTRY)
6460 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
6461
0ee9f67c 6462 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
ecdfa446
GKH		 6463
6464 if (DefaultKey)
6465 usConfig |= BIT15 | (KeyType<<2);
6466 else
6467 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
6468// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
6469
6470
6471 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
6472 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
6473 TargetCommand |= BIT31|BIT16;
6474
6475 if(i==0){//MAC|Config
6476 TargetContent = (u32)(*(MacAddr+0)) << 16|
6477 (u32)(*(MacAddr+1)) << 24|
6478 (u32)usConfig;
6479
6480 write_nic_dword(dev, WCAMI, TargetContent);
6481 write_nic_dword(dev, RWCAM, TargetCommand);
6482 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
6483 }
6484 else if(i==1){//MAC
6485 TargetContent = (u32)(*(MacAddr+2)) |
6486 (u32)(*(MacAddr+3)) << 8|
6487 (u32)(*(MacAddr+4)) << 16|
6488 (u32)(*(MacAddr+5)) << 24;
6489 write_nic_dword(dev, WCAMI, TargetContent);
6490 write_nic_dword(dev, RWCAM, TargetCommand);
6491 }
6492 else { //Key Material
6493 if(KeyContent != NULL)
6494 {
6495 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
6496 write_nic_dword(dev, RWCAM, TargetCommand);
6497 }
6498 }
6499 }
6500 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446 6501}
ecdfa446 6502
65a43784 6503bool NicIFEnableNIC(struct net_device* dev)
6504{
6505 RT_STATUS init_status = RT_STATUS_SUCCESS;
6506 struct r8192_priv* priv = ieee80211_priv(dev);
6507 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
6508
6509 //YJ,add,091109
6510 if (priv->up == 0){
6511 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
6512 priv->bdisable_nic = false; //YJ,add,091111
6513 return false;
6514 }
6515 // <1> Reset memory: descriptor, buffer,..
6516 //NicIFResetMemory(Adapter);
6517
6518 // <2> Enable Adapter
65a43784 6519 //priv->bfirst_init = true;
6520 init_status = rtl8192_adapter_start(dev);
6521 if (init_status != RT_STATUS_SUCCESS) {
6522 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
6523 priv->bdisable_nic = false; //YJ,add,091111
6524 return -1;
6525 }
6526 //printk("start adapter finished\n");
6527 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
6528 //priv->bfirst_init = false;
6529
6530 // <3> Enable Interrupt
6531 rtl8192_irq_enable(dev);
6532 priv->bdisable_nic = false;
16d74da0 6533
c6eae677 6534 return (init_status == RT_STATUS_SUCCESS);
65a43784 6535}
214985a6 6536
65a43784 6537bool NicIFDisableNIC(struct net_device* dev)
6538{
6539 bool status = true;
6540 struct r8192_priv* priv = ieee80211_priv(dev);
6541 u8 tmp_state = 0;
6542 // <1> Disable Interrupt
16d74da0 6543
65a43784 6544 priv->bdisable_nic = true; //YJ,move,091109
6545 tmp_state = priv->ieee80211->state;
6546
6547 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
6548
6549 priv->ieee80211->state = tmp_state;
6550 rtl8192_cancel_deferred_work(priv);
6551 rtl8192_irq_disable(dev);
6552 // <2> Stop all timer
6553
6554 // <3> Disable Adapter
6555 rtl8192_halt_adapter(dev, false);
6556// priv->bdisable_nic = true;
65a43784 6557
6558 return status;
6559}
6560
ecdfa446
GKH		 6561module_init(rtl8192_pci_module_init);
6562module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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