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staging: rtl8821ae: Fix typo in rtl8821ae/btcoexist
[deliverable/linux.git] / drivers / staging / rtl8821ae / btcoexist / habtc8723a1ant.c
CommitLineData
3c05bedb
GKH		 1//============================================================
2// Description:
3//
4// This file is for RTL8723A Co-exist mechanism
5//
6// History
7// 2012/08/22 Cosa first check in.
8// 2012/11/14 Cosa Revise for 8723A 1Ant out sourcing.
9//
10//============================================================
11
12//============================================================
13// include files
14//============================================================
15#include "Mp_Precomp.h"
16#if(BT_30_SUPPORT == 1)
17//============================================================
18// Global variables, these are static variables
19//============================================================
20static COEX_DM_8723A_1ANT GLCoexDm8723a1Ant;
21static PCOEX_DM_8723A_1ANT pCoexDm=&GLCoexDm8723a1Ant;
22static COEX_STA_8723A_1ANT GLCoexSta8723a1Ant;
23static PCOEX_STA_8723A_1ANT pCoexSta=&GLCoexSta8723a1Ant;
24
25const char *const GLBtInfoSrc8723a1Ant[]={
26 "BT Info[wifi fw]",
27 "BT Info[bt rsp]",
28 "BT Info[bt auto report]",
29};
30
31//============================================================
32// local function proto type if needed
33//============================================================
34//============================================================
35// local function start with halbtc8723a1ant_
36//============================================================
37VOID
38halbtc8723a1ant_Reg0x550Bit3(
39 IN PBTC_COEXIST pBtCoexist,
40 IN BOOLEAN bSet
41 )
42{
43 u1Byte u1tmp=0;
44
45 u1tmp = pBtCoexist->btc_read_1byte(pBtCoexist, 0x550);
46 if(bSet)
47 {
48 u1tmp |= BIT3;
49 }
50 else
51 {
52 u1tmp &= ~BIT3;
53 }
54 pBtCoexist->btc_write_1byte(pBtCoexist, 0x550, u1tmp);
55 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], set 0x550[3]=%d\n", (bSet? 1:0)));
56}
57
58VOID
59halbtc8723a1ant_NotifyFwScan(
60 IN PBTC_COEXIST pBtCoexist,
61 IN u1Byte scanType
62 )
63{
64 u1Byte H2C_Parameter[1] ={0};
65
66 if(BTC_SCAN_START == scanType)
67 H2C_Parameter[0] = 0x1;
68
69 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Notify FW for wifi scan, write 0x3b=0x%x\n",
70 H2C_Parameter[0]));
71
72 pBtCoexist->btc_fill_h2c(pBtCoexist, 0x3b, 1, H2C_Parameter);
73}
74
75VOID
76halbtc8723a1ant_QueryBtInfo(
77 IN PBTC_COEXIST pBtCoexist
78 )
79{
80 u1Byte H2C_Parameter[1] ={0};
81
82 pCoexSta->bC2hBtInfoReqSent = true;
83
84 H2C_Parameter[0] |= BIT0; // trigger
85
86 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x38=0x%x\n",
87 H2C_Parameter[0]));
88
89 pBtCoexist->btc_fill_h2c(pBtCoexist, 0x38, 1, H2C_Parameter);
90}
91
92VOID
93halbtc8723a1ant_SetSwRfRxLpfCorner(
94 IN PBTC_COEXIST pBtCoexist,
95 IN BOOLEAN bRxRfShrinkOn
96 )
97{
98 if(bRxRfShrinkOn)
99 {
100 //Shrink RF Rx LPF corner
101 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
102 pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7);
103 }
104 else
105 {
106 //Resume RF Rx LPF corner
107 // After initialized, we can use pCoexDm->btRf0x1eBackup
108 if(pBtCoexist->initilized)
109 {
110 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
111 pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
112 }
113 }
114}
115
116VOID
117halbtc8723a1ant_RfShrink(
118 IN PBTC_COEXIST pBtCoexist,
119 IN BOOLEAN bForceExec,
120 IN BOOLEAN bRxRfShrinkOn
121 )
122{
123 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
124 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
125 pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
126
127 if(!bForceExec)
128 {
129 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n",
130 pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink));
131
132 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
133 return;
134 }
135 halbtc8723a1ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
136
137 pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
138}
139
140VOID
141halbtc8723a1ant_SetSwPenaltyTxRateAdaptive(
142 IN PBTC_COEXIST pBtCoexist,
143 IN BOOLEAN bLowPenaltyRa
144 )
145{
146 u1Byte tmpU1;
147
148 tmpU1 = pBtCoexist->btc_read_1byte(pBtCoexist, 0x4fd);
149 tmpU1 |= BIT0;
150 if(bLowPenaltyRa)
151 {
152 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Tx rate adaptive, set low penalty!!\n"));
153 tmpU1 &= ~BIT2;
154 }
155 else
156 {
157 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Tx rate adaptive, set normal!!\n"));
158 tmpU1 |= BIT2;
159 }
160
161 pBtCoexist->btc_write_1byte(pBtCoexist, 0x4fd, tmpU1);
162}
163
164VOID
165halbtc8723a1ant_LowPenaltyRa(
166 IN PBTC_COEXIST pBtCoexist,
167 IN BOOLEAN bForceExec,
168 IN BOOLEAN bLowPenaltyRa
169 )
170{
171 return;
172 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
173 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
174 pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
175
176 if(!bForceExec)
177 {
178 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n",
179 pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa));
180
181 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
182 return;
183 }
184 halbtc8723a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
185
186 pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
187}
188
189VOID
190halbtc8723a1ant_SetCoexTable(
191 IN PBTC_COEXIST pBtCoexist,
192 IN u4Byte val0x6c0,
193 IN u4Byte val0x6c8,
194 IN u1Byte val0x6cc
195 )
196{
197 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0));
198 pBtCoexist->btc_write_4byte(pBtCoexist, 0x6c0, val0x6c0);
199
200 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
201 pBtCoexist->btc_write_4byte(pBtCoexist, 0x6c8, val0x6c8);
202
203 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
204 pBtCoexist->btc_write_1byte(pBtCoexist, 0x6cc, val0x6cc);
205}
206
207VOID
208halbtc8723a1ant_CoexTable(
209 IN PBTC_COEXIST pBtCoexist,
210 IN BOOLEAN bForceExec,
211 IN u4Byte val0x6c0,
212 IN u4Byte val0x6c8,
213 IN u1Byte val0x6cc
214 )
215{
216 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
217 (bForceExec? "force to":""), val0x6c0, val0x6c8, val0x6cc));
218 pCoexDm->curVal0x6c0 = val0x6c0;
219 pCoexDm->curVal0x6c8 = val0x6c8;
220 pCoexDm->curVal0x6cc = val0x6cc;
221
222 if(!bForceExec)
223 {
224 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n",
225 pCoexDm->preVal0x6c0, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc));
226 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n",
227 pCoexDm->curVal0x6c0, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc));
228
229 if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
230 (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
231 (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
232 return;
233 }
234 halbtc8723a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c8, val0x6cc);
235
236 pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
237 pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
238 pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
239}
240
241VOID
242halbtc8723a1ant_SetFwIgnoreWlanAct(
243 IN PBTC_COEXIST pBtCoexist,
244 IN BOOLEAN bEnable
245 )
246{
247 u1Byte H2C_Parameter[1] ={0};
248
249 if(bEnable)
250 {
251 H2C_Parameter[0] |= BIT0; // function enable
252 }
253
254 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x25=0x%x\n",
255 H2C_Parameter[0]));
256
257 pBtCoexist->btc_fill_h2c(pBtCoexist, 0x25, 1, H2C_Parameter);
258}
259
260VOID
261halbtc8723a1ant_IgnoreWlanAct(
262 IN PBTC_COEXIST pBtCoexist,
263 IN BOOLEAN bForceExec,
264 IN BOOLEAN bEnable
265 )
266{
267 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn Ignore WlanAct %s\n",
268 (bForceExec? "force to":""), (bEnable? "ON":"OFF")));
269 pCoexDm->bCurIgnoreWlanAct = bEnable;
270
271 if(!bForceExec)
272 {
273 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n",
274 pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct));
275
276 if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
277 return;
278 }
279 halbtc8723a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
280
281 pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
282}
283
284VOID
285halbtc8723a1ant_SetFwPstdma(
286 IN PBTC_COEXIST pBtCoexist,
287 IN u1Byte type,
288 IN u1Byte byte1,
289 IN u1Byte byte2,
290 IN u1Byte byte3,
291 IN u1Byte byte4,
292 IN u1Byte byte5
293 )
294{
295 u1Byte H2C_Parameter[5] ={0};
296 u1Byte realByte1=byte1, realByte5=byte5;
297 BOOLEAN bApEnable=FALSE;
298
299 pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable);
300
301 // byte1[1:0] != 0 means enable pstdma
302 // for 2Ant bt coexist, if byte1 != 0 means enable pstdma
303 if(byte1)
304 {
305 if(bApEnable)
306 {
307 if(type != 5 && type != 12)
308 {
309 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], FW for 1Ant AP mode\n"));
310 realByte1 &= ~BIT4;
311 realByte1 |= BIT5;
312
313 realByte5 |= BIT5;
314 realByte5 &= ~BIT6;
315 }
316 }
317 }
318 H2C_Parameter[0] = realByte1;
319 H2C_Parameter[1] = byte2;
320 H2C_Parameter[2] = byte3;
321 H2C_Parameter[3] = byte4;
322 H2C_Parameter[4] = realByte5;
323
324 pCoexDm->psTdmaPara[0] = realByte1;
325 pCoexDm->psTdmaPara[1] = byte2;
326 pCoexDm->psTdmaPara[2] = byte3;
327 pCoexDm->psTdmaPara[3] = byte4;
328 pCoexDm->psTdmaPara[4] = realByte5;
329
330 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n",
331 H2C_Parameter[0],
332 H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4]));
333
334 pBtCoexist->btc_fill_h2c(pBtCoexist, 0x3a, 5, H2C_Parameter);
335}
336
337VOID
338halbtc8723a1ant_PsTdma(
339 IN PBTC_COEXIST pBtCoexist,
340 IN BOOLEAN bForceExec,
341 IN BOOLEAN bTurnOn,
342 IN u1Byte type
343 )
344{
345 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn %s PS TDMA, type=%d\n",
346 (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type));
347 pCoexDm->bCurPsTdmaOn = bTurnOn;
348 pCoexDm->curPsTdma = type;
349
350 if(!bForceExec)
351 {
352 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
353 pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn));
354 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
355 pCoexDm->prePsTdma, pCoexDm->curPsTdma));
356
357 if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
358 (pCoexDm->prePsTdma == pCoexDm->curPsTdma) )
359 return;
360 }
361 if(pCoexDm->bCurPsTdmaOn)
362 {
363 switch(pCoexDm->curPsTdma)
364 {
365 case 1:
366 default:
367 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x0, 0x40);
368 break;
369 case 2:
370 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x0, 0x40);
371 break;
372 case 3:
373 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x3f, 0x3, 0x10, 0x40);
374 break;
375 case 4:
376 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x15, 0x3, 0x10, 0x0);
377 break;
378 case 5:
379 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0x15, 0x3, 0x35, 0xc0);
380 break;
381
382 case 8:
383 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0);
384 break;
385 case 9:
386 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40);
387 break;
388 case 10:
389 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40);
390 break;
391 case 11:
392 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x0, 0x40);
393 break;
394 case 12:
395 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0xa, 0x3, 0x15, 0xc0);
396 break;
397
398 case 18:
399 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0);
400 break;
401
402 case 20:
403 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x2a, 0x2a, 0x0, 0x0);
404 break;
405 case 21:
406 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x20, 0x3, 0x10, 0x40);
407 break;
408 case 22:
409 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x2, 0x40);
410 break;
411 case 23:
412 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x2, 0x40);
413 break;
414 case 24:
415 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x2, 0x40);
416 break;
417 case 25:
418 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40);
419 break;
420 case 26:
421 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0);
422 break;
423 case 27:
424 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40);
425 break;
426 case 28:
427 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x3, 0x2f, 0x2f, 0x0, 0x0);
428 break;
429
430 }
431 }
432 else
433 {
434 // disable PS tdma
435 switch(pCoexDm->curPsTdma)
436 {
437 case 8:
438 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x8, 0x0, 0x0, 0x0, 0x0);
439 break;
440 case 0:
441 default:
442 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0);
443 pBtCoexist->btc_write_2byte(pBtCoexist, 0x860, 0x210);
444 break;
445 case 9:
446 halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0);
447 pBtCoexist->btc_write_2byte(pBtCoexist, 0x860, 0x110);
448 break;
449
450 }
451 }
452
453 // update pre state
454 pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
455 pCoexDm->prePsTdma = pCoexDm->curPsTdma;
456}
457
458
459VOID
460halbtc8723a1ant_CoexAllOff(
461 IN PBTC_COEXIST pBtCoexist
462 )
463{
464 // fw all off
465 halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE);
466 halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0);
467
468 // sw all off
469 halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE);
470 halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE);
471
472 // hw all off
473 halbtc8723a1ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3);
474}
475
476VOID
477halbtc8723a1ant_InitCoexDm(
478 IN PBTC_COEXIST pBtCoexist
479 )
480{
481 // force to reset coex mechanism
482 halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE);
483}
484
485VOID
486halbtc8723a1ant_BtEnableAction(
487 IN PBTC_COEXIST pBtCoexist
488 )
489{
490 halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE);
491}
492
493VOID
494halbtc8723a1ant_MonitorBtCtr(
495 IN PBTC_COEXIST pBtCoexist
496 )
497{
498 u4Byte regHPTxRx, regLPTxRx, u4Tmp;
499 u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0;
500 u1Byte u1Tmp;
501
502 regHPTxRx = 0x770;
503 regLPTxRx = 0x774;
504
505 u4Tmp = pBtCoexist->btc_read_4byte(pBtCoexist, regHPTxRx);
506 regHPTx = u4Tmp & MASKLWORD;
507 regHPRx = (u4Tmp & MASKHWORD)>>16;
508
509 u4Tmp = pBtCoexist->btc_read_4byte(pBtCoexist, regLPTxRx);
510 regLPTx = u4Tmp & MASKLWORD;
511 regLPRx = (u4Tmp & MASKHWORD)>>16;
512
513 pCoexSta->highPriorityTx = regHPTx;
514 pCoexSta->highPriorityRx = regHPRx;
515 pCoexSta->lowPriorityTx = regLPTx;
516 pCoexSta->lowPriorityRx = regLPRx;
517
518 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
519 regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx));
520 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
521 regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx));
522
523 // reset counter
524 pBtCoexist->btc_write_1byte(pBtCoexist, 0x76e, 0xc);
525}
526
527VOID
528halbtc8723a1ant_MonitorBtEnableDisable(
529 IN PBTC_COEXIST pBtCoexist
530 )
531{
532 static BOOLEAN bPreBtDisabled=FALSE;
533 static u4Byte btDisableCnt=0;
534 BOOLEAN bBtActive=true, bBtDisabled=FALSE;
535
536 // This function check if bt is disabled
537
538 if( pCoexSta->highPriorityTx == 0 &&
539 pCoexSta->highPriorityRx == 0 &&
540 pCoexSta->lowPriorityTx == 0 &&
541 pCoexSta->lowPriorityRx == 0)
542 {
543 bBtActive = FALSE;
544 }
545 if( pCoexSta->highPriorityTx == 0xffff &&
546 pCoexSta->highPriorityRx == 0xffff &&
547 pCoexSta->lowPriorityTx == 0xffff &&
548 pCoexSta->lowPriorityRx == 0xffff)
549 {
550 bBtActive = FALSE;
551 }
552 if(bBtActive)
553 {
554 btDisableCnt = 0;
555 bBtDisabled = FALSE;
556 pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
557 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is enabled !!\n"));
558 }
559 else
560 {
561 btDisableCnt++;
562 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], bt all counters=0, %d times!!\n",
563 btDisableCnt));
564 if(btDisableCnt >= 2)
565 {
566 bBtDisabled = true;
567 pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
568 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is disabled !!\n"));
569 }
570 }
571 if(bPreBtDisabled != bBtDisabled)
572 {
573 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is from %s to %s!!\n",
574 (bPreBtDisabled ? "disabled":"enabled"),
575 (bBtDisabled ? "disabled":"enabled")));
576 bPreBtDisabled = bBtDisabled;
577 if(!bBtDisabled)
578 {
579 halbtc8723a1ant_BtEnableAction(pBtCoexist);
580 }
581 else
582 {
583 pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
584 }
585 }
586}
587
588VOID
589halbtc8723a1ant_TdmaDurationAdjust(
590 IN PBTC_COEXIST pBtCoexist
591 )
592{
593 static s4Byte up,dn,m,n,WaitCount;
594 s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration
595 u1Byte retryCount=0;
596 u1Byte btState;
597 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
598 u4Byte wifiBw;
599
600 pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
601 btState = pCoexDm->btStatus;
602
603 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], TdmaDurationAdjust()\n"));
604 if(pCoexDm->psTdmaGlobalCnt != pCoexDm->psTdmaMonitorCnt)
605 {
606 pCoexDm->psTdmaMonitorCnt = 0;
607 pCoexDm->psTdmaGlobalCnt = 0;
608 }
609 if(pCoexDm->psTdmaMonitorCnt == 0)
610 {
611 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], first run BT A2DP + WiFi busy state!!\n"));
612 if(btState == BT_STATE_8723A_1ANT_ACL_ONLY_BUSY)
613 {
614 halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 1);
615 pCoexDm->psTdmaDuAdjType = 1;
616 }
617 else
618 {
619 halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 22);
620 pCoexDm->psTdmaDuAdjType = 22;
621 }
622 //============
623 up = 0;
624 dn = 0;
625 m = 1;
626 n= 3;
627 result = 0;
628 WaitCount = 0;
629 }
630 else
631 {
fc4d82c0 632 //acquire the BT TRx retry count from BT_Info byte2
3c05bedb
GKH		 633 retryCount = pCoexSta->btRetryCnt;
634 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], retryCount = %d\n", retryCount));
635 result = 0;
636 WaitCount++;
637
638 if(retryCount == 0) // no retry in the last 2-second duration
639 {
640 up++;
641 dn--;
642
643 if (dn <= 0)
644 dn = 0;
645