77d89b08 |
1 | /* Driver for Realtek PCI-Express card reader |
2 | * |
3 | * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved. |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the |
7 | * Free Software Foundation; either version 2, or (at your option) any |
8 | * later version. |
9 | * |
10 | * This program is distributed in the hope that it will be useful, but |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
13 | * General Public License for more details. |
14 | * |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
17 | * |
18 | * Author: |
19 | * wwang (wei_wang@realsil.com.cn) |
20 | * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China |
21 | */ |
22 | |
23 | #include <linux/blkdev.h> |
24 | #include <linux/kthread.h> |
25 | #include <linux/sched.h> |
c6cdaded |
26 | #include <linux/vmalloc.h> |
77d89b08 |
27 | |
28 | #include "rtsx.h" |
29 | #include "rtsx_transport.h" |
30 | #include "rtsx_scsi.h" |
31 | #include "rtsx_card.h" |
32 | #include "ms.h" |
33 | |
34 | static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code) |
35 | { |
36 | struct ms_info *ms_card = &(chip->ms_card); |
37 | |
38 | ms_card->err_code = err_code; |
39 | } |
40 | |
41 | static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code) |
42 | { |
43 | struct ms_info *ms_card = &(chip->ms_card); |
44 | |
45 | return (ms_card->err_code == err_code); |
46 | } |
47 | |
48 | static int ms_parse_err_code(struct rtsx_chip *chip) |
49 | { |
50 | TRACE_RET(chip, STATUS_FAIL); |
51 | } |
52 | |
53 | static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u8 cnt, u8 cfg) |
54 | { |
55 | struct ms_info *ms_card = &(chip->ms_card); |
56 | int retval; |
57 | u8 *ptr; |
58 | |
59 | RTSX_DEBUGP("ms_transfer_tpc: tpc = 0x%x\n", tpc); |
60 | |
61 | rtsx_init_cmd(chip); |
62 | |
63 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); |
64 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); |
65 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); |
66 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); |
67 | |
68 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode); |
69 | rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); |
70 | |
71 | rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0); |
72 | |
73 | retval = rtsx_send_cmd(chip, MS_CARD, 5000); |
74 | if (retval < 0) { |
75 | rtsx_clear_ms_error(chip); |
76 | ms_set_err_code(chip, MS_TO_ERROR); |
77 | TRACE_RET(chip, ms_parse_err_code(chip)); |
78 | } |
79 | |
80 | ptr = rtsx_get_cmd_data(chip) + 1; |
81 | |
82 | if (!(tpc & 0x08)) { /* Read Packet */ |
83 | if (*ptr & MS_CRC16_ERR) { |
84 | ms_set_err_code(chip, MS_CRC16_ERROR); |
85 | TRACE_RET(chip, ms_parse_err_code(chip)); |
86 | } |
87 | } else { /* Write Packet */ |
88 | if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) { |
89 | if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) { |
90 | ms_set_err_code(chip, MS_CMD_NK); |
91 | TRACE_RET(chip, ms_parse_err_code(chip)); |
92 | } |
93 | } |
94 | } |
95 | |
96 | if (*ptr & MS_RDY_TIMEOUT) { |
97 | rtsx_clear_ms_error(chip); |
98 | ms_set_err_code(chip, MS_TO_ERROR); |
99 | TRACE_RET(chip, ms_parse_err_code(chip)); |
100 | } |
101 | |
102 | return STATUS_SUCCESS; |
103 | } |
104 | |
105 | static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u16 sec_cnt, |
106 | u8 cfg, int mode_2k, int use_sg, void *buf, int buf_len) |
107 | { |
108 | int retval; |
109 | u8 val, err_code = 0; |
110 | enum dma_data_direction dir; |
111 | |
112 | if (!buf || !buf_len) { |
113 | TRACE_RET(chip, STATUS_FAIL); |
114 | } |
115 | |
116 | if (trans_mode == MS_TM_AUTO_READ) { |
117 | dir = DMA_FROM_DEVICE; |
118 | err_code = MS_FLASH_READ_ERROR; |
119 | } else if (trans_mode == MS_TM_AUTO_WRITE) { |
120 | dir = DMA_TO_DEVICE; |
121 | err_code = MS_FLASH_WRITE_ERROR; |
122 | } else { |
123 | TRACE_RET(chip, STATUS_FAIL); |
124 | } |
125 | |
126 | rtsx_init_cmd(chip); |
127 | |
128 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); |
129 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
130 | MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8)); |
131 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt); |
132 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); |
133 | |
134 | if (mode_2k) { |
135 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
136 | MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE); |
137 | } else { |
138 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0); |
139 | } |
140 | |
141 | trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512); |
142 | |
143 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
144 | MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode); |
145 | rtsx_add_cmd(chip, CHECK_REG_CMD, |
146 | MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); |
147 | |
148 | rtsx_send_cmd_no_wait(chip); |
149 | |
150 | retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len, |
151 | use_sg, dir, chip->mspro_timeout); |
152 | if (retval < 0) { |
153 | ms_set_err_code(chip, err_code); |
154 | if (retval == -ETIMEDOUT) { |
155 | retval = STATUS_TIMEDOUT; |
156 | } else { |
157 | retval = STATUS_FAIL; |
158 | } |
159 | TRACE_RET(chip, retval); |
160 | } |
161 | |
162 | RTSX_READ_REG(chip, MS_TRANS_CFG, &val); |
163 | if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) { |
164 | TRACE_RET(chip, STATUS_FAIL); |
165 | } |
166 | |
167 | return STATUS_SUCCESS; |
168 | } |
169 | |
170 | static int ms_write_bytes(struct rtsx_chip *chip, |
171 | u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len) |
172 | { |
173 | struct ms_info *ms_card = &(chip->ms_card); |
174 | int retval, i; |
175 | |
176 | if (!data || (data_len < cnt)) { |
177 | TRACE_RET(chip, STATUS_ERROR); |
178 | } |
179 | |
180 | rtsx_init_cmd(chip); |
181 | |
182 | for (i = 0; i < cnt; i++) { |
183 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
184 | PPBUF_BASE2 + i, 0xFF, data[i]); |
185 | } |
186 | if (cnt % 2) { |
187 | rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF); |
188 | } |
189 | |
190 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); |
191 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); |
192 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); |
193 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); |
194 | |
195 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
196 | MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES); |
197 | rtsx_add_cmd(chip, CHECK_REG_CMD, |
198 | MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); |
199 | |
200 | retval = rtsx_send_cmd(chip, MS_CARD, 5000); |
201 | if (retval < 0) { |
202 | u8 val = 0; |
203 | |
204 | rtsx_read_register(chip, MS_TRANS_CFG, &val); |
205 | RTSX_DEBUGP("MS_TRANS_CFG: 0x%02x\n", val); |
206 | |
207 | rtsx_clear_ms_error(chip); |
208 | |
209 | if (!(tpc & 0x08)) { |
210 | if (val & MS_CRC16_ERR) { |
211 | ms_set_err_code(chip, MS_CRC16_ERROR); |
212 | TRACE_RET(chip, ms_parse_err_code(chip)); |
213 | } |
214 | } else { |
215 | if (CHK_MSPRO(ms_card) && !(val & 0x80)) { |
216 | if (val & (MS_INT_ERR | MS_INT_CMDNK)) { |
217 | ms_set_err_code(chip, MS_CMD_NK); |
218 | TRACE_RET(chip, ms_parse_err_code(chip)); |
219 | } |
220 | } |
221 | } |
222 | |
223 | if (val & MS_RDY_TIMEOUT) { |
224 | ms_set_err_code(chip, MS_TO_ERROR); |
225 | TRACE_RET(chip, ms_parse_err_code(chip)); |
226 | } |
227 | |
228 | ms_set_err_code(chip, MS_TO_ERROR); |
229 | TRACE_RET(chip, ms_parse_err_code(chip)); |
230 | } |
231 | |
232 | return STATUS_SUCCESS; |
233 | } |
234 | |
235 | static int ms_read_bytes(struct rtsx_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len) |
236 | { |
237 | struct ms_info *ms_card = &(chip->ms_card); |
238 | int retval, i; |
239 | u8 *ptr; |
240 | |
241 | if (!data) { |
242 | TRACE_RET(chip, STATUS_ERROR); |
243 | } |
244 | |
245 | rtsx_init_cmd(chip); |
246 | |
247 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); |
248 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); |
249 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); |
250 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); |
251 | |
252 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES); |
253 | rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); |
254 | |
255 | for (i = 0; i < data_len - 1; i++) { |
256 | rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0); |
257 | } |
258 | if (data_len % 2) { |
259 | rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0); |
260 | } else { |
261 | rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, 0, 0); |
262 | } |
263 | |
264 | retval = rtsx_send_cmd(chip, MS_CARD, 5000); |
265 | if (retval < 0) { |
266 | u8 val = 0; |
267 | |
268 | rtsx_read_register(chip, MS_TRANS_CFG, &val); |
269 | rtsx_clear_ms_error(chip); |
270 | |
271 | if (!(tpc & 0x08)) { |
272 | if (val & MS_CRC16_ERR) { |
273 | ms_set_err_code(chip, MS_CRC16_ERROR); |
274 | TRACE_RET(chip, ms_parse_err_code(chip)); |
275 | } |
276 | } else { |
277 | if (CHK_MSPRO(ms_card) && !(val & 0x80)) { |
278 | if (val & (MS_INT_ERR | MS_INT_CMDNK)) { |
279 | ms_set_err_code(chip, MS_CMD_NK); |
280 | TRACE_RET(chip, ms_parse_err_code(chip)); |
281 | } |
282 | } |
283 | } |
284 | |
285 | if (val & MS_RDY_TIMEOUT) { |
286 | ms_set_err_code(chip, MS_TO_ERROR); |
287 | TRACE_RET(chip, ms_parse_err_code(chip)); |
288 | } |
289 | |
290 | ms_set_err_code(chip, MS_TO_ERROR); |
291 | TRACE_RET(chip, ms_parse_err_code(chip)); |
292 | } |
293 | |
294 | ptr = rtsx_get_cmd_data(chip) + 1; |
295 | |
296 | for (i = 0; i < data_len; i++) { |
297 | data[i] = ptr[i]; |
298 | } |
299 | |
300 | if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) { |
301 | RTSX_DEBUGP("Read format progress:\n"); |
302 | RTSX_DUMP(ptr, cnt); |
303 | } |
304 | |
305 | return STATUS_SUCCESS; |
306 | } |
307 | |
308 | static int ms_set_rw_reg_addr(struct rtsx_chip *chip, |
309 | u8 read_start, u8 read_cnt, u8 write_start, u8 write_cnt) |
310 | { |
311 | int retval, i; |
312 | u8 data[4]; |
313 | |
314 | data[0] = read_start; |
315 | data[1] = read_cnt; |
316 | data[2] = write_start; |
317 | data[3] = write_cnt; |
318 | |
319 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
320 | retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4, |
321 | NO_WAIT_INT, data, 4); |
322 | if (retval == STATUS_SUCCESS) |
323 | return STATUS_SUCCESS; |
324 | rtsx_clear_ms_error(chip); |
325 | } |
326 | |
327 | TRACE_RET(chip, STATUS_FAIL); |
328 | } |
329 | |
330 | static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg) |
331 | { |
332 | u8 data[2]; |
333 | |
334 | data[0] = cmd; |
335 | data[1] = 0; |
336 | |
337 | return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1); |
338 | } |
339 | |
340 | static int ms_set_init_para(struct rtsx_chip *chip) |
341 | { |
342 | struct ms_info *ms_card = &(chip->ms_card); |
343 | int retval; |
344 | |
345 | if (CHK_HG8BIT(ms_card)) { |
346 | if (chip->asic_code) { |
347 | ms_card->ms_clock = chip->asic_ms_hg_clk; |
348 | } else { |
349 | ms_card->ms_clock = chip->fpga_ms_hg_clk; |
350 | } |
351 | } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) { |
352 | if (chip->asic_code) { |
353 | ms_card->ms_clock = chip->asic_ms_4bit_clk; |
354 | } else { |
355 | ms_card->ms_clock = chip->fpga_ms_4bit_clk; |
356 | } |
357 | } else { |
358 | if (chip->asic_code) { |
359 | ms_card->ms_clock = chip->asic_ms_1bit_clk; |
360 | } else { |
361 | ms_card->ms_clock = chip->fpga_ms_1bit_clk; |
362 | } |
363 | } |
364 | |
365 | retval = switch_clock(chip, ms_card->ms_clock); |
366 | if (retval != STATUS_SUCCESS) { |
367 | TRACE_RET(chip, STATUS_FAIL); |
368 | } |
369 | |
370 | retval = select_card(chip, MS_CARD); |
371 | if (retval != STATUS_SUCCESS) { |
372 | TRACE_RET(chip, STATUS_FAIL); |
373 | } |
374 | |
375 | return STATUS_SUCCESS; |
376 | } |
377 | |
378 | static int ms_switch_clock(struct rtsx_chip *chip) |
379 | { |
380 | struct ms_info *ms_card = &(chip->ms_card); |
381 | int retval; |
382 | |
383 | retval = select_card(chip, MS_CARD); |
384 | if (retval != STATUS_SUCCESS) { |
385 | TRACE_RET(chip, STATUS_FAIL); |
386 | } |
387 | |
388 | retval = switch_clock(chip, ms_card->ms_clock); |
389 | if (retval != STATUS_SUCCESS) { |
390 | TRACE_RET(chip, STATUS_FAIL); |
391 | } |
392 | |
393 | return STATUS_SUCCESS; |
394 | } |
395 | |
396 | static int ms_pull_ctl_disable(struct rtsx_chip *chip) |
397 | { |
398 | if (CHECK_PID(chip, 0x5209)) { |
399 | RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x55); |
400 | RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF, 0x55); |
401 | RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, 0x15); |
402 | } else if (CHECK_PID(chip, 0x5208)) { |
403 | RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, |
404 | MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD); |
405 | RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, |
406 | MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD); |
407 | RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, |
408 | MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU); |
409 | RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, |
410 | XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD); |
411 | RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF, |
412 | MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD); |
413 | RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, |
414 | MS_D5_PD | MS_D4_PD); |
415 | } else if (CHECK_PID(chip, 0x5288)) { |
416 | if (CHECK_BARO_PKG(chip, QFN)) { |
417 | RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55); |
418 | RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55); |
419 | RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B); |
420 | RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69); |
421 | } |
422 | } |
423 | |
424 | return STATUS_SUCCESS; |
425 | } |
426 | |
427 | static int ms_pull_ctl_enable(struct rtsx_chip *chip) |
428 | { |
429 | int retval; |
430 | |
431 | rtsx_init_cmd(chip); |
432 | |
433 | if (CHECK_PID(chip, 0x5209)) { |
434 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); |
435 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55); |
436 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x15); |
437 | } else if (CHECK_PID(chip, 0x5208)) { |
438 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, |
439 | MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD); |
440 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, |
441 | MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD); |
442 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, |
443 | MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU); |
444 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, |
445 | XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD); |
446 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, |
447 | MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD); |
448 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, |
449 | MS_D5_PD | MS_D4_PD); |
450 | } else if (CHECK_PID(chip, 0x5288)) { |
451 | if (CHECK_BARO_PKG(chip, QFN)) { |
452 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
453 | CARD_PULL_CTL1, 0xFF, 0x55); |
454 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
455 | CARD_PULL_CTL2, 0xFF, 0x45); |
456 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
457 | CARD_PULL_CTL3, 0xFF, 0x4B); |
458 | rtsx_add_cmd(chip, WRITE_REG_CMD, |
459 | CARD_PULL_CTL4, 0xFF, 0x29); |
460 | } |
461 | } |
462 | |
463 | retval = rtsx_send_cmd(chip, MS_CARD, 100); |
464 | if (retval < 0) { |
465 | TRACE_RET(chip, STATUS_FAIL); |
466 | } |
467 | |
468 | return STATUS_SUCCESS; |
469 | } |
470 | |
471 | static int ms_prepare_reset(struct rtsx_chip *chip) |
472 | { |
473 | struct ms_info *ms_card = &(chip->ms_card); |
474 | int retval; |
475 | u8 oc_mask = 0; |
476 | |
477 | ms_card->ms_type = 0; |
478 | ms_card->check_ms_flow = 0; |
479 | ms_card->switch_8bit_fail = 0; |
480 | ms_card->delay_write.delay_write_flag = 0; |
481 | |
482 | ms_card->pro_under_formatting = 0; |
483 | |
484 | retval = ms_power_off_card3v3(chip); |
485 | if (retval != STATUS_SUCCESS) { |
486 | TRACE_RET(chip, STATUS_FAIL); |
487 | } |
488 | |
489 | if (!chip->ft2_fast_mode) |
490 | wait_timeout(250); |
491 | |
492 | retval = enable_card_clock(chip, MS_CARD); |
493 | if (retval != STATUS_SUCCESS) { |
494 | TRACE_RET(chip, STATUS_FAIL); |
495 | } |
496 | |
497 | if (chip->asic_code) { |
498 | retval = ms_pull_ctl_enable(chip); |
499 | if (retval != STATUS_SUCCESS) { |
500 | TRACE_RET(chip, STATUS_FAIL); |
501 | } |
502 | } else { |
503 | RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, 0); |
504 | } |
505 | |
506 | if (!chip->ft2_fast_mode) { |
507 | retval = card_power_on(chip, MS_CARD); |
508 | if (retval != STATUS_SUCCESS) { |
509 | TRACE_RET(chip, STATUS_FAIL); |
510 | } |
511 | wait_timeout(150); |
512 | |
513 | #ifdef SUPPORT_OCP |
514 | if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { |
515 | oc_mask = MS_OC_NOW | MS_OC_EVER; |
516 | } else { |
517 | oc_mask = SD_OC_NOW | SD_OC_EVER; |
518 | } |
519 | if (chip->ocp_stat & oc_mask) { |
520 | RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n", |
521 | chip->ocp_stat); |
522 | TRACE_RET(chip, STATUS_FAIL); |
523 | } |
524 | #endif |
525 | } |
526 | |
527 | RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN); |
528 | |
529 | if (chip->asic_code) { |
530 | RTSX_WRITE_REG(chip, MS_CFG, 0xFF, |
531 | SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT | |
532 | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1); |
533 | } else { |
534 | RTSX_WRITE_REG(chip, MS_CFG, 0xFF, |
535 | SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT | |
536 | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1); |
537 | } |
538 | RTSX_WRITE_REG(chip, MS_TRANS_CFG, 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG); |
539 | RTSX_WRITE_REG(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR); |
540 | |
541 | retval = ms_set_init_para(chip); |
542 | if (retval != STATUS_SUCCESS) { |
543 | TRACE_RET(chip, STATUS_FAIL); |
544 | } |
545 | |
546 | return STATUS_SUCCESS; |
547 | } |
548 | |
549 | static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) |
550 | { |
551 | struct ms_info *ms_card = &(chip->ms_card); |
552 | int retval, i; |
553 | u8 val; |
554 | |
555 | retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1); |
556 | if (retval != STATUS_SUCCESS) { |
557 | TRACE_RET(chip, STATUS_FAIL); |
558 | } |
559 | |
560 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
561 | retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, 6, NO_WAIT_INT); |
562 | if (retval == STATUS_SUCCESS) { |
563 | break; |
564 | } |
565 | } |
566 | if (i == MS_MAX_RETRY_COUNT) { |
567 | TRACE_RET(chip, STATUS_FAIL); |
568 | } |
569 | |
570 | RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val); |
571 | RTSX_DEBUGP("Type register: 0x%x\n", val); |
572 | if (val != 0x01) { |
573 | if (val != 0x02) { |
574 | ms_card->check_ms_flow = 1; |
575 | } |
576 | TRACE_RET(chip, STATUS_FAIL); |
577 | } |
578 | |
579 | RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val); |
580 | RTSX_DEBUGP("Category register: 0x%x\n", val); |
581 | if (val != 0) { |
582 | ms_card->check_ms_flow = 1; |
583 | TRACE_RET(chip, STATUS_FAIL); |
584 | } |
585 | |
586 | RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val); |
587 | RTSX_DEBUGP("Class register: 0x%x\n", val); |
588 | if (val == 0) { |
589 | RTSX_READ_REG(chip, PPBUF_BASE2, &val); |
590 | if (val & WRT_PRTCT) { |
591 | chip->card_wp |= MS_CARD; |
592 | } else { |
593 | chip->card_wp &= ~MS_CARD; |
594 | } |
595 | } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) { |
596 | chip->card_wp |= MS_CARD; |
597 | } else { |
598 | ms_card->check_ms_flow = 1; |
599 | TRACE_RET(chip, STATUS_FAIL); |
600 | } |
601 | |
602 | ms_card->ms_type |= TYPE_MSPRO; |
603 | |
604 | RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val); |
605 | RTSX_DEBUGP("IF Mode register: 0x%x\n", val); |
606 | if (val == 0) { |
607 | ms_card->ms_type &= 0x0F; |
608 | } else if (val == 7) { |
609 | if (switch_8bit_bus) { |
610 | ms_card->ms_type |= MS_HG; |
611 | } else { |
612 | ms_card->ms_type &= 0x0F; |
613 | } |
614 | } else { |
615 | TRACE_RET(chip, STATUS_FAIL); |
616 | } |
617 | |
618 | return STATUS_SUCCESS; |
619 | } |
620 | |
621 | static int ms_confirm_cpu_startup(struct rtsx_chip *chip) |
622 | { |
623 | int retval, i, k; |
624 | u8 val; |
625 | |
626 | /* Confirm CPU StartUp */ |
627 | k = 0; |
628 | do { |
629 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
630 | ms_set_err_code(chip, MS_NO_CARD); |
631 | TRACE_RET(chip, STATUS_FAIL); |
632 | } |
633 | |
634 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
635 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
636 | if (retval == STATUS_SUCCESS) { |
637 | break; |
638 | } |
639 | } |
640 | if (i == MS_MAX_RETRY_COUNT) { |
641 | TRACE_RET(chip, STATUS_FAIL); |
642 | } |
643 | |
644 | if (k > 100) { |
645 | TRACE_RET(chip, STATUS_FAIL); |
646 | } |
647 | k++; |
648 | wait_timeout(100); |
649 | } while (!(val & INT_REG_CED)); |
650 | |
651 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
652 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
653 | if (retval == STATUS_SUCCESS) |
654 | break; |
655 | } |
656 | if (i == MS_MAX_RETRY_COUNT) { |
657 | TRACE_RET(chip, STATUS_FAIL); |
658 | } |
659 | |
660 | if (val & INT_REG_ERR) { |
661 | if (val & INT_REG_CMDNK) { |
662 | chip->card_wp |= (MS_CARD); |
663 | } else { |
664 | TRACE_RET(chip, STATUS_FAIL); |
665 | } |
666 | } |
667 | /* -- end confirm CPU startup */ |
668 | |
669 | return STATUS_SUCCESS; |
670 | } |
671 | |
672 | static int ms_switch_parallel_bus(struct rtsx_chip *chip) |
673 | { |
674 | int retval, i; |
675 | u8 data[2]; |
676 | |
677 | data[0] = PARALLEL_4BIT_IF; |
678 | data[1] = 0; |
679 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
680 | retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2); |
681 | if (retval == STATUS_SUCCESS) |
682 | break; |
683 | } |
684 | if (retval != STATUS_SUCCESS) { |
685 | TRACE_RET(chip, STATUS_FAIL); |
686 | } |
687 | |
688 | return STATUS_SUCCESS; |
689 | } |
690 | |
691 | static int ms_switch_8bit_bus(struct rtsx_chip *chip) |
692 | { |
693 | struct ms_info *ms_card = &(chip->ms_card); |
694 | int retval, i; |
695 | u8 data[2]; |
696 | |
697 | data[0] = PARALLEL_8BIT_IF; |
698 | data[1] = 0; |
699 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
700 | retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2); |
701 | if (retval == STATUS_SUCCESS) { |
702 | break; |
703 | } |
704 | } |
705 | if (retval != STATUS_SUCCESS) { |
706 | TRACE_RET(chip, STATUS_FAIL); |
707 | } |
708 | |
709 | RTSX_WRITE_REG(chip, MS_CFG, 0x98, MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING); |
710 | ms_card->ms_type |= MS_8BIT; |
711 | retval = ms_set_init_para(chip); |
712 | if (retval != STATUS_SUCCESS) { |
713 | TRACE_RET(chip, STATUS_FAIL); |
714 | } |
715 | |
716 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
717 | retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT); |
718 | if (retval != STATUS_SUCCESS) { |
719 | TRACE_RET(chip, STATUS_FAIL); |
720 | } |
721 | } |
722 | |
723 | return STATUS_SUCCESS; |
724 | } |
725 | |
726 | static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus) |
727 | { |
728 | struct ms_info *ms_card = &(chip->ms_card); |
729 | int retval, i; |
730 | |
731 | for (i = 0; i < 3; i++) { |
732 | retval = ms_prepare_reset(chip); |
733 | if (retval != STATUS_SUCCESS) { |
734 | TRACE_RET(chip, STATUS_FAIL); |
735 | } |
736 | |
737 | retval = ms_identify_media_type(chip, switch_8bit_bus); |
738 | if (retval != STATUS_SUCCESS) { |
739 | TRACE_RET(chip, STATUS_FAIL); |
740 | } |
741 | |
742 | retval = ms_confirm_cpu_startup(chip); |
743 | if (retval != STATUS_SUCCESS) { |
744 | TRACE_RET(chip, STATUS_FAIL); |
745 | } |
746 | |
747 | retval = ms_switch_parallel_bus(chip); |
748 | if (retval != STATUS_SUCCESS) { |
749 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
750 | ms_set_err_code(chip, MS_NO_CARD); |
751 | TRACE_RET(chip, STATUS_FAIL); |
752 | } |
753 | continue; |
754 | } else { |
755 | break; |
756 | } |
757 | } |
758 | |
759 | if (retval != STATUS_SUCCESS) { |
760 | TRACE_RET(chip, STATUS_FAIL); |
761 | } |
762 | |
763 | /* Switch MS-PRO into Parallel mode */ |
764 | RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4); |
765 | RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD); |
766 | |
767 | retval = ms_set_init_para(chip); |
768 | if (retval != STATUS_SUCCESS) { |
769 | TRACE_RET(chip, STATUS_FAIL); |
770 | } |
771 | |
772 | /* If MSPro HG Card, We shall try to switch to 8-bit bus */ |
773 | if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) { |
774 | retval = ms_switch_8bit_bus(chip); |
775 | if (retval != STATUS_SUCCESS) { |
776 | ms_card->switch_8bit_fail = 1; |
777 | TRACE_RET(chip, STATUS_FAIL); |
778 | } |
779 | } |
780 | |
781 | return STATUS_SUCCESS; |
782 | } |
783 | |
784 | #ifdef XC_POWERCLASS |
785 | static int msxc_change_power(struct rtsx_chip *chip, u8 mode) |
786 | { |
787 | int retval; |
788 | u8 buf[6]; |
789 | |
790 | ms_cleanup_work(chip); |
791 | |
792 | retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); |
793 | if (retval != STATUS_SUCCESS) { |
794 | TRACE_RET(chip, STATUS_FAIL); |
795 | } |
796 | |
797 | buf[0] = 0; |
798 | buf[1] = mode; |
799 | buf[2] = 0; |
800 | buf[3] = 0; |
801 | buf[4] = 0; |
802 | buf[5] = 0; |
803 | |
804 | retval = ms_write_bytes(chip, PRO_WRITE_REG , 6, NO_WAIT_INT, buf, 6); |
805 | if (retval != STATUS_SUCCESS) { |
806 | TRACE_RET(chip, STATUS_FAIL); |
807 | } |
808 | |
809 | retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT); |
810 | if (retval != STATUS_SUCCESS) { |
811 | TRACE_RET(chip, STATUS_FAIL); |
812 | } |
813 | |
814 | RTSX_READ_REG(chip, MS_TRANS_CFG, buf); |
815 | if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) { |
816 | TRACE_RET(chip, STATUS_FAIL); |
817 | } |
818 | |
819 | return STATUS_SUCCESS; |
820 | } |
821 | #endif |
822 | |
823 | static int ms_read_attribute_info(struct rtsx_chip *chip) |
824 | { |
825 | struct ms_info *ms_card = &(chip->ms_card); |
826 | int retval, i; |
827 | u8 val, *buf, class_code, device_type, sub_class, data[16]; |
828 | u16 total_blk = 0, blk_size = 0; |
829 | #ifdef SUPPORT_MSXC |
830 | u32 xc_total_blk = 0, xc_blk_size = 0; |
831 | #endif |
832 | u32 sys_info_addr = 0, sys_info_size; |
833 | #ifdef SUPPORT_PCGL_1P18 |
834 | u32 model_name_addr = 0, model_name_size; |
835 | int found_sys_info = 0, found_model_name = 0; |
836 | #endif |
837 | |
838 | retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7); |
839 | if (retval != STATUS_SUCCESS) { |
840 | TRACE_RET(chip, STATUS_FAIL); |
841 | } |
842 | |
843 | if (CHK_MS8BIT(ms_card)) { |
844 | data[0] = PARALLEL_8BIT_IF; |
845 | } else { |
846 | data[0] = PARALLEL_4BIT_IF; |
847 | } |
848 | data[1] = 0; |
849 | |
850 | data[2] = 0x40; |
851 | data[3] = 0; |
852 | data[4] = 0; |
853 | data[5] = 0; |
854 | data[6] = 0; |
855 | data[7] = 0; |
856 | |
857 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
858 | retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT, data, 8); |
859 | if (retval == STATUS_SUCCESS) { |
860 | break; |
861 | } |
862 | } |
863 | if (retval != STATUS_SUCCESS) { |
864 | TRACE_RET(chip, STATUS_FAIL); |
865 | } |
866 | |
389fe985 |
867 | buf = kmalloc(64 * 512, GFP_KERNEL); |
77d89b08 |
868 | if (buf == NULL) { |
869 | TRACE_RET(chip, STATUS_ERROR); |
870 | } |
871 | |
872 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
873 | retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT); |
874 | if (retval != STATUS_SUCCESS) { |
875 | continue; |
876 | } |
877 | retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); |
878 | if (retval != STATUS_SUCCESS) { |
f7468e29 |
879 | kfree(buf); |
77d89b08 |
880 | TRACE_RET(chip, STATUS_FAIL); |
881 | } |
882 | if (!(val & MS_INT_BREQ)) { |
f7468e29 |
883 | kfree(buf); |
77d89b08 |
884 | TRACE_RET(chip, STATUS_FAIL); |
885 | } |
886 | retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, |
887 | 0x40, WAIT_INT, 0, 0, buf, 64 * 512); |
888 | if (retval == STATUS_SUCCESS) { |
889 | break; |
890 | } else { |
891 | rtsx_clear_ms_error(chip); |
892 | } |
893 | } |
894 | if (retval != STATUS_SUCCESS) { |
f7468e29 |
895 | kfree(buf); |
77d89b08 |
896 | TRACE_RET(chip, STATUS_FAIL); |
897 | } |
898 | |
899 | i = 0; |
900 | do { |
901 | retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); |
902 | if (retval != STATUS_SUCCESS) { |
f7468e29 |
903 | kfree(buf); |
77d89b08 |
904 | TRACE_RET(chip, STATUS_FAIL); |
905 | } |
906 | |
907 | if ((val & MS_INT_CED) || !(val & MS_INT_BREQ)) |
908 | break; |
909 | |
910 | retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, PRO_READ_LONG_DATA, 0, WAIT_INT); |
911 | if (retval != STATUS_SUCCESS) { |
f7468e29 |
912 | kfree(buf); |
77d89b08 |
913 | TRACE_RET(chip, STATUS_FAIL); |
914 | } |
915 | |
916 | i++; |
917 | } while (i < 1024); |
918 | |
919 | if (retval != STATUS_SUCCESS) { |
f7468e29 |
920 | kfree(buf); |
77d89b08 |
921 | TRACE_RET(chip, STATUS_FAIL); |
922 | } |
923 | |
924 | if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) { |
925 | /* Signature code is wrong */ |
f7468e29 |
926 | kfree(buf); |
77d89b08 |
927 | TRACE_RET(chip, STATUS_FAIL); |
928 | } |
929 | |
930 | if ((buf[4] < 1) || (buf[4] > 12)) { |
f7468e29 |
931 | kfree(buf); |
77d89b08 |
932 | TRACE_RET(chip, STATUS_FAIL); |
933 | } |
934 | |
935 | for (i = 0; i < buf[4]; i++) { |
936 | int cur_addr_off = 16 + i * 12; |
937 | |
938 | #ifdef SUPPORT_MSXC |
939 | if ((buf[cur_addr_off + 8] == 0x10) || (buf[cur_addr_off + 8] == 0x13)) |
940 | #else |
941 | if (buf[cur_addr_off + 8] == 0x10) |
942 | #endif |
943 | { |
944 | sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) | |
945 | ((u32)buf[cur_addr_off + 1] << 16) | |
946 | ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3]; |
947 | sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) | |
948 | ((u32)buf[cur_addr_off + 5] << 16) | |
949 | ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7]; |
950 | RTSX_DEBUGP("sys_info_addr = 0x%x, sys_info_size = 0x%x\n", |
951 | sys_info_addr, sys_info_size); |
952 | if (sys_info_size != 96) { |
f7468e29 |
953 | kfree(buf); |
77d89b08 |
954 | TRACE_RET(chip, STATUS_FAIL); |
955 | } |
956 | if (sys_info_addr < 0x1A0) { |
f7468e29 |
957 | kfree(buf); |
77d89b08 |
958 | TRACE_RET(chip, STATUS_FAIL); |
959 | } |
960 | if ((sys_info_size + sys_info_addr) > 0x8000) { |
f7468e29 |
961 | kfree(buf); |
77d89b08 |
962 | TRACE_RET(chip, STATUS_FAIL); |
963 | } |
964 | |
965 | #ifdef SUPPORT_MSXC |
966 | if (buf[cur_addr_off + 8] == 0x13) { |
967 | ms_card->ms_type |= MS_XC; |
968 | } |
969 | #endif |
970 | #ifdef SUPPORT_PCGL_1P18 |
971 | found_sys_info = 1; |
972 | #else |
973 | break; |
974 | #endif |
975 | } |
976 | #ifdef SUPPORT_PCGL_1P18 |
977 | if (buf[cur_addr_off + 8] == 0x15) { |
978 | model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) | |
979 | ((u32)buf[cur_addr_off + 1] << 16) | |
980 | ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3]; |
981 | model_name_size = ((u32)buf[cur_addr_off + 4] << 24) | |
982 | ((u32)buf[cur_addr_off + 5] << 16) | |
983 | ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7]; |
984 | RTSX_DEBUGP("model_name_addr = 0x%x, model_name_size = 0x%x\n", |
985 | model_name_addr, model_name_size); |
986 | if (model_name_size != 48) { |
f7468e29 |
987 | kfree(buf); |
77d89b08 |
988 | TRACE_RET(chip, STATUS_FAIL); |
989 | } |
990 | if (model_name_addr < 0x1A0) { |
f7468e29 |
991 | kfree(buf); |
77d89b08 |
992 | TRACE_RET(chip, STATUS_FAIL); |
993 | } |
994 | if ((model_name_size + model_name_addr) > 0x8000) { |
f7468e29 |
995 | kfree(buf); |
77d89b08 |
996 | TRACE_RET(chip, STATUS_FAIL); |
997 | } |
998 | |
999 | found_model_name = 1; |
1000 | } |
1001 | |
1002 | if (found_sys_info && found_model_name) |
1003 | break; |
1004 | #endif |
1005 | } |
1006 | |
1007 | if (i == buf[4]) { |
f7468e29 |
1008 | kfree(buf); |
77d89b08 |
1009 | TRACE_RET(chip, STATUS_FAIL); |
1010 | } |
1011 | |
1012 | class_code = buf[sys_info_addr + 0]; |
1013 | device_type = buf[sys_info_addr + 56]; |
1014 | sub_class = buf[sys_info_addr + 46]; |
1015 | #ifdef SUPPORT_MSXC |
1016 | if (CHK_MSXC(ms_card)) { |
1017 | xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) | |
1018 | ((u32)buf[sys_info_addr + 7] << 16) | |
1019 | ((u32)buf[sys_info_addr + 8] << 8) | |
1020 | buf[sys_info_addr + 9]; |
1021 | xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) | |
1022 | ((u32)buf[sys_info_addr + 33] << 16) | |
1023 | ((u32)buf[sys_info_addr + 34] << 8) | |
1024 | buf[sys_info_addr + 35]; |
1025 | RTSX_DEBUGP("xc_total_blk = 0x%x, xc_blk_size = 0x%x\n", xc_total_blk, xc_blk_size); |
1026 | } else { |
1027 | total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7]; |
1028 | blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3]; |
1029 | RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size); |
1030 | } |
1031 | #else |
1032 | total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7]; |
1033 | blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3]; |
1034 | RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size); |
1035 | #endif |
1036 | |
1037 | RTSX_DEBUGP("class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n", |
1038 | class_code, device_type, sub_class); |
1039 | |
1040 | memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96); |
1041 | #ifdef SUPPORT_PCGL_1P18 |
1042 | memcpy(ms_card->raw_model_name, buf + model_name_addr, 48); |
1043 | #endif |
1044 | |
f7468e29 |
1045 | kfree(buf); |
77d89b08 |
1046 | |
1047 | #ifdef SUPPORT_MSXC |
1048 | if (CHK_MSXC(ms_card)) { |
1049 | if (class_code != 0x03) { |
1050 | TRACE_RET(chip, STATUS_FAIL); |
1051 | } |
1052 | } else { |
1053 | if (class_code != 0x02) { |
1054 | TRACE_RET(chip, STATUS_FAIL); |
1055 | } |
1056 | } |
1057 | #else |
1058 | if (class_code != 0x02) { |
1059 | TRACE_RET(chip, STATUS_FAIL); |
1060 | } |
1061 | #endif |
1062 | |
1063 | if (device_type != 0x00) { |
1064 | if ((device_type == 0x01) || (device_type == 0x02) || |
1065 | (device_type == 0x03)) { |
1066 | chip->card_wp |= MS_CARD; |
1067 | } else { |
1068 | TRACE_RET(chip, STATUS_FAIL); |
1069 | } |
1070 | } |
1071 | |
1072 | if (sub_class & 0xC0) { |
1073 | TRACE_RET(chip, STATUS_FAIL); |
1074 | } |
1075 | |
1076 | RTSX_DEBUGP("class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n", |
1077 | class_code, device_type, sub_class); |
1078 | |
1079 | #ifdef SUPPORT_MSXC |
1080 | if (CHK_MSXC(ms_card)) { |
1081 | chip->capacity[chip->card2lun[MS_CARD]] = |
1082 | ms_card->capacity = xc_total_blk * xc_blk_size; |
1083 | } else { |
1084 | chip->capacity[chip->card2lun[MS_CARD]] = |
1085 | ms_card->capacity = total_blk * blk_size; |
1086 | } |
1087 | #else |
1088 | chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity = total_blk * blk_size; |
1089 | #endif |
1090 | |
1091 | return STATUS_SUCCESS; |
1092 | } |
1093 | |
1094 | #ifdef SUPPORT_MAGIC_GATE |
1095 | static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num); |
1096 | #endif |
1097 | |
1098 | static int reset_ms_pro(struct rtsx_chip *chip) |
1099 | { |
1100 | struct ms_info *ms_card = &(chip->ms_card); |
1101 | int retval; |
1102 | #ifdef XC_POWERCLASS |
9fe341e8 |
1103 | u8 change_power_class; |
1104 | |
1105 | if (chip->ms_power_class_en & 0x02) |
1106 | change_power_class = 2; |
1107 | else if (chip->ms_power_class_en & 0x01) |
1108 | change_power_class = 1; |
1109 | else |
1110 | change_power_class = 0; |
77d89b08 |
1111 | #endif |
1112 | |
1113 | #ifdef XC_POWERCLASS |
1114 | Retry: |
1115 | #endif |
1116 | retval = ms_pro_reset_flow(chip, 1); |
1117 | if (retval != STATUS_SUCCESS) { |
1118 | if (ms_card->switch_8bit_fail) { |
1119 | retval = ms_pro_reset_flow(chip, 0); |
1120 | if (retval != STATUS_SUCCESS) { |
1121 | TRACE_RET(chip, STATUS_FAIL); |
1122 | } |
1123 | } else { |
1124 | TRACE_RET(chip, STATUS_FAIL); |
1125 | } |
1126 | } |
1127 | |
1128 | retval = ms_read_attribute_info(chip); |
1129 | if (retval != STATUS_SUCCESS) { |
1130 | TRACE_RET(chip, STATUS_FAIL); |
1131 | } |
1132 | |
1133 | #ifdef XC_POWERCLASS |
1134 | if (CHK_HG8BIT(ms_card)) { |
1135 | change_power_class = 0; |
1136 | } |
1137 | |
1138 | if (change_power_class && CHK_MSXC(ms_card)) { |
9fe341e8 |
1139 | u8 power_class_en = chip->ms_power_class_en; |
77d89b08 |
1140 | |
1141 | RTSX_DEBUGP("power_class_en = 0x%x\n", power_class_en); |
1142 | RTSX_DEBUGP("change_power_class = %d\n", change_power_class); |
1143 | |
1144 | if (change_power_class) { |
1145 | power_class_en &= (1 << (change_power_class - 1)); |
1146 | } else { |
1147 | power_class_en = 0; |
1148 | } |
1149 | |
1150 | if (power_class_en) { |
1151 | u8 power_class_mode = (ms_card->raw_sys_info[46] & 0x18) >> 3; |
1152 | RTSX_DEBUGP("power_class_mode = 0x%x", power_class_mode); |
1153 | if (change_power_class > power_class_mode) |
1154 | change_power_class = power_class_mode; |
1155 | if (change_power_class) { |
1156 | retval = msxc_change_power(chip, change_power_class); |
1157 | if (retval != STATUS_SUCCESS) { |
1158 | change_power_class--; |
1159 | goto Retry; |
1160 | } |
1161 | } |
1162 | } |
1163 | } |
1164 | #endif |
1165 | |
1166 | #ifdef SUPPORT_MAGIC_GATE |
1167 | retval = mg_set_tpc_para_sub(chip, 0, 0); |
1168 | if (retval != STATUS_SUCCESS) { |
1169 | TRACE_RET(chip, STATUS_FAIL); |
1170 | } |
1171 | #endif |
1172 | |
1173 | if (CHK_HG8BIT(ms_card)) { |
1174 | chip->card_bus_width[chip->card2lun[MS_CARD]] = 8; |
1175 | } else { |
1176 | chip->card_bus_width[chip->card2lun[MS_CARD]] = 4; |
1177 | } |
1178 | |
1179 | return STATUS_SUCCESS; |
1180 | } |
1181 | |
1182 | static int ms_read_status_reg(struct rtsx_chip *chip) |
1183 | { |
1184 | int retval; |
1185 | u8 val[2]; |
1186 | |
1187 | retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0); |
1188 | if (retval != STATUS_SUCCESS) { |
1189 | TRACE_RET(chip, STATUS_FAIL); |
1190 | } |
1191 | |
1192 | retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2); |
1193 | if (retval != STATUS_SUCCESS) { |
1194 | TRACE_RET(chip, STATUS_FAIL); |
1195 | } |
1196 | |
1197 | if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) { |
1198 | ms_set_err_code(chip, MS_FLASH_READ_ERROR); |
1199 | TRACE_RET(chip, STATUS_FAIL); |
1200 | } |
1201 | |
1202 | return STATUS_SUCCESS; |
1203 | } |
1204 | |
1205 | |
1206 | static int ms_read_extra_data(struct rtsx_chip *chip, |
1207 | u16 block_addr, u8 page_num, u8 *buf, int buf_len) |
1208 | { |
1209 | struct ms_info *ms_card = &(chip->ms_card); |
1210 | int retval, i; |
1211 | u8 val, data[10]; |
1212 | |
1213 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); |
1214 | if (retval != STATUS_SUCCESS) { |
1215 | TRACE_RET(chip, STATUS_FAIL); |
1216 | } |
1217 | |
1218 | if (CHK_MS4BIT(ms_card)) { |
1219 | /* Parallel interface */ |
1220 | data[0] = 0x88; |
1221 | } else { |
1222 | /* Serial interface */ |
1223 | data[0] = 0x80; |
1224 | } |
1225 | data[1] = 0; |
1226 | data[2] = (u8)(block_addr >> 8); |
1227 | data[3] = (u8)block_addr; |
1228 | data[4] = 0x40; |
1229 | data[5] = page_num; |
1230 | |
1231 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
1232 | retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); |
1233 | if (retval == STATUS_SUCCESS) |
1234 | break; |
1235 | } |
1236 | if (i == MS_MAX_RETRY_COUNT) { |
1237 | TRACE_RET(chip, STATUS_FAIL); |
1238 | } |
1239 | |
1240 | ms_set_err_code(chip, MS_NO_ERROR); |
1241 | |
1242 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
1243 | retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); |
1244 | if (retval == STATUS_SUCCESS) |
1245 | break; |
1246 | } |
1247 | if (i == MS_MAX_RETRY_COUNT) { |
1248 | TRACE_RET(chip, STATUS_FAIL); |
1249 | } |
1250 | |
1251 | ms_set_err_code(chip, MS_NO_ERROR); |
1252 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1253 | if (retval != STATUS_SUCCESS) { |
1254 | TRACE_RET(chip, STATUS_FAIL); |
1255 | } |
1256 | if (val & INT_REG_CMDNK) { |
1257 | ms_set_err_code(chip, MS_CMD_NK); |
1258 | TRACE_RET(chip, STATUS_FAIL); |
1259 | } |
1260 | if (val & INT_REG_CED) { |
1261 | if (val & INT_REG_ERR) { |
1262 | retval = ms_read_status_reg(chip); |
1263 | if (retval != STATUS_SUCCESS) { |
1264 | TRACE_RET(chip, STATUS_FAIL); |
1265 | } |
1266 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); |
1267 | if (retval != STATUS_SUCCESS) { |
1268 | TRACE_RET(chip, STATUS_FAIL); |
1269 | } |
1270 | } |
1271 | } |
1272 | |
1273 | retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, data, MS_EXTRA_SIZE); |
1274 | if (retval != STATUS_SUCCESS) { |
1275 | TRACE_RET(chip, STATUS_FAIL); |
1276 | } |
1277 | |
1278 | if (buf && buf_len) { |
1279 | if (buf_len > MS_EXTRA_SIZE) |
1280 | buf_len = MS_EXTRA_SIZE; |
1281 | memcpy(buf, data, buf_len); |
1282 | } |
1283 | |
1284 | return STATUS_SUCCESS; |
1285 | } |
1286 | |
1287 | static int ms_write_extra_data(struct rtsx_chip *chip, |
1288 | u16 block_addr, u8 page_num, u8 *buf, int buf_len) |
1289 | { |
1290 | struct ms_info *ms_card = &(chip->ms_card); |
1291 | int retval, i; |
1292 | u8 val, data[16]; |
1293 | |
1294 | if (!buf || (buf_len < MS_EXTRA_SIZE)) { |
1295 | TRACE_RET(chip, STATUS_FAIL); |
1296 | } |
1297 | |
1298 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6 + MS_EXTRA_SIZE); |
1299 | if (retval != STATUS_SUCCESS) { |
1300 | TRACE_RET(chip, STATUS_FAIL); |
1301 | } |
1302 | |
1303 | if (CHK_MS4BIT(ms_card)) { |
1304 | data[0] = 0x88; |
1305 | } else { |
1306 | data[0] = 0x80; |
1307 | } |
1308 | data[1] = 0; |
1309 | data[2] = (u8)(block_addr >> 8); |
1310 | data[3] = (u8)block_addr; |
1311 | data[4] = 0x40; |
1312 | data[5] = page_num; |
1313 | |
1314 | for (i = 6; i < MS_EXTRA_SIZE + 6; i++) { |
1315 | data[i] = buf[i - 6]; |
1316 | } |
1317 | |
1318 | retval = ms_write_bytes(chip, WRITE_REG , (6+MS_EXTRA_SIZE), NO_WAIT_INT, data, 16); |
1319 | if (retval != STATUS_SUCCESS) { |
1320 | TRACE_RET(chip, STATUS_FAIL); |
1321 | } |
1322 | |
1323 | retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); |
1324 | if (retval != STATUS_SUCCESS) { |
1325 | TRACE_RET(chip, STATUS_FAIL); |
1326 | } |
1327 | |
1328 | ms_set_err_code(chip, MS_NO_ERROR); |
1329 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1330 | if (retval != STATUS_SUCCESS) { |
1331 | TRACE_RET(chip, STATUS_FAIL); |
1332 | } |
1333 | if (val & INT_REG_CMDNK) { |
1334 | ms_set_err_code(chip, MS_CMD_NK); |
1335 | TRACE_RET(chip, STATUS_FAIL); |
1336 | } |
1337 | if (val & INT_REG_CED) { |
1338 | if (val & INT_REG_ERR) { |
1339 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
1340 | TRACE_RET(chip, STATUS_FAIL); |
1341 | } |
1342 | } |
1343 | |
1344 | return STATUS_SUCCESS; |
1345 | } |
1346 | |
1347 | |
1348 | static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) |
1349 | { |
1350 | struct ms_info *ms_card = &(chip->ms_card); |
1351 | int retval; |
1352 | u8 val, data[6]; |
1353 | |
1354 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); |
1355 | if (retval != STATUS_SUCCESS) { |
1356 | TRACE_RET(chip, STATUS_FAIL); |
1357 | } |
1358 | |
1359 | if (CHK_MS4BIT(ms_card)) { |
1360 | data[0] = 0x88; |
1361 | } else { |
1362 | data[0] = 0x80; |
1363 | } |
1364 | data[1] = 0; |
1365 | data[2] = (u8)(block_addr >> 8); |
1366 | data[3] = (u8)block_addr; |
1367 | data[4] = 0x20; |
1368 | data[5] = page_num; |
1369 | |
1370 | retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6); |
1371 | if (retval != STATUS_SUCCESS) { |
1372 | TRACE_RET(chip, STATUS_FAIL); |
1373 | } |
1374 | |
1375 | retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); |
1376 | if (retval != STATUS_SUCCESS) { |
1377 | TRACE_RET(chip, STATUS_FAIL); |
1378 | } |
1379 | |
1380 | ms_set_err_code(chip, MS_NO_ERROR); |
1381 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1382 | if (retval != STATUS_SUCCESS) { |
1383 | TRACE_RET(chip, STATUS_FAIL); |
1384 | } |
1385 | if (val & INT_REG_CMDNK) { |
1386 | ms_set_err_code(chip, MS_CMD_NK); |
1387 | TRACE_RET(chip, STATUS_FAIL); |
1388 | } |
1389 | |
1390 | if (val & INT_REG_CED) { |
1391 | if (val & INT_REG_ERR) { |
1392 | if (!(val & INT_REG_BREQ)) { |
1393 | ms_set_err_code(chip, MS_FLASH_READ_ERROR); |
1394 | TRACE_RET(chip, STATUS_FAIL); |
1395 | } |
1396 | retval = ms_read_status_reg(chip); |
1397 | if (retval != STATUS_SUCCESS) { |
1398 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
1399 | } |
1400 | } else { |
1401 | if (!(val & INT_REG_BREQ)) { |
1402 | ms_set_err_code(chip, MS_BREQ_ERROR); |
1403 | TRACE_RET(chip, STATUS_FAIL); |
1404 | } |
1405 | } |
1406 | } |
1407 | |
1408 | retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT); |
1409 | if (retval != STATUS_SUCCESS) { |
1410 | TRACE_RET(chip, STATUS_FAIL); |
1411 | } |
1412 | |
1413 | if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) { |
1414 | TRACE_RET(chip, STATUS_FAIL); |
1415 | } |
1416 | |
1417 | return STATUS_SUCCESS; |
1418 | } |
1419 | |
1420 | |
1421 | static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk) |
1422 | { |
1423 | struct ms_info *ms_card = &(chip->ms_card); |
1424 | int retval; |
1425 | u8 val, data[8], extra[MS_EXTRA_SIZE]; |
1426 | |
1427 | retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE); |
1428 | if (retval != STATUS_SUCCESS) { |
1429 | TRACE_RET(chip, STATUS_FAIL); |
1430 | } |
1431 | |
1432 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); |
1433 | if (retval != STATUS_SUCCESS) { |
1434 | TRACE_RET(chip, STATUS_FAIL); |
1435 | } |
1436 | |
1437 | ms_set_err_code(chip, MS_NO_ERROR); |
1438 | |
1439 | if (CHK_MS4BIT(ms_card)) { |
1440 | data[0] = 0x88; |
1441 | } else { |
1442 | data[0] = 0x80; |
1443 | } |
1444 | data[1] = 0; |
1445 | data[2] = (u8)(phy_blk >> 8); |
1446 | data[3] = (u8)phy_blk; |
1447 | data[4] = 0x80; |
1448 | data[5] = 0; |
1449 | data[6] = extra[0] & 0x7F; |
1450 | data[7] = 0xFF; |
1451 | |
1452 | retval = ms_write_bytes(chip, WRITE_REG , 7, NO_WAIT_INT, data, 7); |
1453 | if (retval != STATUS_SUCCESS) { |
1454 | TRACE_RET(chip, STATUS_FAIL); |
1455 | } |
1456 | |
1457 | retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); |
1458 | if (retval != STATUS_SUCCESS) { |
1459 | TRACE_RET(chip, STATUS_FAIL); |
1460 | } |
1461 | |
1462 | ms_set_err_code(chip, MS_NO_ERROR); |
1463 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1464 | if (retval != STATUS_SUCCESS) { |
1465 | TRACE_RET(chip, STATUS_FAIL); |
1466 | } |
1467 | |
1468 | if (val & INT_REG_CMDNK) { |
1469 | ms_set_err_code(chip, MS_CMD_NK); |
1470 | TRACE_RET(chip, STATUS_FAIL); |
1471 | } |
1472 | |
1473 | if (val & INT_REG_CED) { |
1474 | if (val & INT_REG_ERR) { |
1475 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
1476 | TRACE_RET(chip, STATUS_FAIL); |
1477 | } |
1478 | } |
1479 | |
1480 | return STATUS_SUCCESS; |
1481 | } |
1482 | |
1483 | |
1484 | static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk) |
1485 | { |
1486 | struct ms_info *ms_card = &(chip->ms_card); |
1487 | int retval, i = 0; |
1488 | u8 val, data[6]; |
1489 | |
1490 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); |
1491 | if (retval != STATUS_SUCCESS) { |
1492 | TRACE_RET(chip, STATUS_FAIL); |
1493 | } |
1494 | |
1495 | ms_set_err_code(chip, MS_NO_ERROR); |
1496 | |
1497 | if (CHK_MS4BIT(ms_card)) { |
1498 | data[0] = 0x88; |
1499 | } else { |
1500 | data[0] = 0x80; |
1501 | } |
1502 | data[1] = 0; |
1503 | data[2] = (u8)(phy_blk >> 8); |
1504 | data[3] = (u8)phy_blk; |
1505 | data[4] = 0; |
1506 | data[5] = 0; |
1507 | |
1508 | retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); |
1509 | if (retval != STATUS_SUCCESS) { |
1510 | TRACE_RET(chip, STATUS_FAIL); |
1511 | } |
1512 | |
1513 | ERASE_RTY: |
1514 | retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT); |
1515 | if (retval != STATUS_SUCCESS) { |
1516 | TRACE_RET(chip, STATUS_FAIL); |
1517 | } |
1518 | |
1519 | ms_set_err_code(chip, MS_NO_ERROR); |
1520 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1521 | if (retval != STATUS_SUCCESS) { |
1522 | TRACE_RET(chip, STATUS_FAIL); |
1523 | } |
1524 | |
1525 | if (val & INT_REG_CMDNK) { |
1526 | if (i < 3) { |
1527 | i++; |
1528 | goto ERASE_RTY; |
1529 | } |
1530 | |
1531 | ms_set_err_code(chip, MS_CMD_NK); |
1532 | ms_set_bad_block(chip, phy_blk); |
1533 | TRACE_RET(chip, STATUS_FAIL); |
1534 | } |
1535 | |
1536 | if (val & INT_REG_CED) { |
1537 | if (val & INT_REG_ERR) { |
1538 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
1539 | TRACE_RET(chip, STATUS_FAIL); |
1540 | } |
1541 | } |
1542 | |
1543 | return STATUS_SUCCESS; |
1544 | } |
1545 | |
1546 | |
1547 | static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len) |
1548 | { |
1549 | if (!extra || (extra_len < MS_EXTRA_SIZE)) { |
1550 | return; |
1551 | } |
1552 | |
1553 | memset(extra, 0xFF, MS_EXTRA_SIZE); |
1554 | |
1555 | if (type == setPS_NG) { |
1556 | /* set page status as 1:NG,and block status keep 1:OK */ |
1557 | extra[0] = 0xB8; |
1558 | } else { |
1559 | /* set page status as 0:Data Error,and block status keep 1:OK */ |
1560 | extra[0] = 0x98; |
1561 | } |
1562 | |
1563 | extra[2] = (u8)(log_blk >> 8); |
1564 | extra[3] = (u8)log_blk; |
1565 | } |
1566 | |
1567 | static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, u8 start_page, u8 end_page) |
1568 | { |
1569 | int retval; |
1570 | u8 extra[MS_EXTRA_SIZE], i; |
1571 | |
1572 | memset(extra, 0xff, MS_EXTRA_SIZE); |
1573 | |
1574 | extra[0] = 0xf8; /* Block, page OK, data erased */ |
1575 | extra[1] = 0xff; |
1576 | extra[2] = (u8)(log_blk >> 8); |
1577 | extra[3] = (u8)log_blk; |
1578 | |
1579 | for (i = start_page; i < end_page; i++) { |
1580 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
1581 | ms_set_err_code(chip, MS_NO_CARD); |
1582 | TRACE_RET(chip, STATUS_FAIL); |
1583 | } |
1584 | |
1585 | retval = ms_write_extra_data(chip, phy_blk, i, extra, MS_EXTRA_SIZE); |
1586 | if (retval != STATUS_SUCCESS) { |
1587 | TRACE_RET(chip, STATUS_FAIL); |
1588 | } |
1589 | } |
1590 | |
1591 | return STATUS_SUCCESS; |
1592 | } |
1593 | |
1594 | static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, |
1595 | u16 log_blk, u8 start_page, u8 end_page) |
1596 | { |
1597 | struct ms_info *ms_card = &(chip->ms_card); |
1598 | int retval, rty_cnt, uncorrect_flag = 0; |
1599 | u8 extra[MS_EXTRA_SIZE], val, i, j, data[16]; |
1600 | |
1601 | RTSX_DEBUGP("Copy page from 0x%x to 0x%x, logical block is 0x%x\n", |
1602 | old_blk, new_blk, log_blk); |
1603 | RTSX_DEBUGP("start_page = %d, end_page = %d\n", start_page, end_page); |
1604 | |
1605 | retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE); |
1606 | if (retval != STATUS_SUCCESS) { |
1607 | TRACE_RET(chip, STATUS_FAIL); |
1608 | } |
1609 | |
1610 | retval = ms_read_status_reg(chip); |
1611 | if (retval != STATUS_SUCCESS) { |
1612 | TRACE_RET(chip, STATUS_FAIL); |
1613 | } |
1614 | |
1615 | RTSX_READ_REG(chip, PPBUF_BASE2, &val); |
1616 | |
1617 | if (val & BUF_FULL) { |
1618 | retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT); |
1619 | if (retval != STATUS_SUCCESS) { |
1620 | TRACE_RET(chip, STATUS_FAIL); |
1621 | } |
1622 | |
1623 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1624 | if (retval != STATUS_SUCCESS) { |
1625 | TRACE_RET(chip, STATUS_FAIL); |
1626 | } |
1627 | |
1628 | if (!(val & INT_REG_CED)) { |
1629 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
1630 | TRACE_RET(chip, STATUS_FAIL); |
1631 | } |
1632 | } |
1633 | |
1634 | for (i = start_page; i < end_page; i++) { |
1635 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
1636 | ms_set_err_code(chip, MS_NO_CARD); |
1637 | TRACE_RET(chip, STATUS_FAIL); |
1638 | } |
1639 | |
1640 | ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE); |
1641 | |
1642 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); |
1643 | if (retval != STATUS_SUCCESS) { |
1644 | TRACE_RET(chip, STATUS_FAIL); |
1645 | } |
1646 | |
1647 | ms_set_err_code(chip, MS_NO_ERROR); |
1648 | |
1649 | if (CHK_MS4BIT(ms_card)) { |
1650 | data[0] = 0x88; |
1651 | } else { |
1652 | data[0] = 0x80; |
1653 | } |
1654 | data[1] = 0; |
1655 | data[2] = (u8)(old_blk >> 8); |
1656 | data[3] = (u8)old_blk; |
1657 | data[4] = 0x20; |
1658 | data[5] = i; |
1659 | |
1660 | retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6); |
1661 | if (retval != STATUS_SUCCESS) { |
1662 | TRACE_RET(chip, STATUS_FAIL); |
1663 | } |
1664 | |
1665 | retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); |
1666 | if (retval != STATUS_SUCCESS) { |
1667 | TRACE_RET(chip, STATUS_FAIL); |
1668 | } |
1669 | |
1670 | ms_set_err_code(chip, MS_NO_ERROR); |
1671 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1672 | if (retval != STATUS_SUCCESS) { |
1673 | TRACE_RET(chip, STATUS_FAIL); |
1674 | } |
1675 | |
1676 | if (val & INT_REG_CMDNK) { |
1677 | ms_set_err_code(chip, MS_CMD_NK); |
1678 | TRACE_RET(chip, STATUS_FAIL); |
1679 | } |
1680 | |
1681 | if (val & INT_REG_CED) { |
1682 | if (val & INT_REG_ERR) { |
1683 | retval = ms_read_status_reg(chip); |
1684 | if (retval != STATUS_SUCCESS) { |
1685 | uncorrect_flag = 1; |
1686 | RTSX_DEBUGP("Uncorrectable error\n"); |
1687 | } else { |
1688 | uncorrect_flag = 0; |
1689 | } |
1690 | |
1691 | retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT); |
1692 | if (retval != STATUS_SUCCESS) { |
1693 | TRACE_RET(chip, STATUS_FAIL); |
1694 | } |
1695 | |
1696 | if (uncorrect_flag) { |
1697 | ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE); |
1698 | if (i == 0) { |
1699 | extra[0] &= 0xEF; |
1700 | } |
1701 | ms_write_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE); |
1702 | RTSX_DEBUGP("page %d : extra[0] = 0x%x\n", i, extra[0]); |
1703 | MS_SET_BAD_BLOCK_FLG(ms_card); |
1704 | |
1705 | ms_set_page_status(log_blk, setPS_Error, extra, MS_EXTRA_SIZE); |
1706 | ms_write_extra_data(chip, new_blk, i, extra, MS_EXTRA_SIZE); |
1707 | continue; |
1708 | } |
1709 | |
1710 | for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT; rty_cnt++) { |
1711 | retval = ms_transfer_tpc(chip, MS_TM_NORMAL_WRITE, |
1712 | WRITE_PAGE_DATA, 0, NO_WAIT_INT); |
1713 | if (retval == STATUS_SUCCESS) { |
1714 | break; |
1715 | } |
1716 | } |
1717 | if (rty_cnt == MS_MAX_RETRY_COUNT) { |
1718 | TRACE_RET(chip, STATUS_FAIL); |
1719 | } |
1720 | } |
1721 | |
1722 | if (!(val & INT_REG_BREQ)) { |
1723 | ms_set_err_code(chip, MS_BREQ_ERROR); |
1724 | TRACE_RET(chip, STATUS_FAIL); |
1725 | } |
1726 | } |
1727 | |
1728 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, |
1729 | MS_EXTRA_SIZE, SystemParm, (6+MS_EXTRA_SIZE)); |
1730 | |
1731 | ms_set_err_code(chip, MS_NO_ERROR); |
1732 | |
1733 | if (CHK_MS4BIT(ms_card)) { |
1734 | data[0] = 0x88; |
1735 | } else { |
1736 | data[0] = 0x80; |
1737 | } |
1738 | data[1] = 0; |
1739 | data[2] = (u8)(new_blk >> 8); |
1740 | data[3] = (u8)new_blk; |
1741 | data[4] = 0x20; |
1742 | data[5] = i; |
1743 | |
1744 | if ((extra[0] & 0x60) != 0x60) { |
1745 | data[6] = extra[0]; |
1746 | } else { |
1747 | data[6] = 0xF8; |
1748 | } |
1749 | data[6 + 1] = 0xFF; |
1750 | data[6 + 2] = (u8)(log_blk >> 8); |
1751 | data[6 + 3] = (u8)log_blk; |
1752 | |
1753 | for (j = 4; j <= MS_EXTRA_SIZE; j++) { |
1754 | data[6 + j] = 0xFF; |
1755 | } |
1756 | |
1757 | retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), NO_WAIT_INT, data, 16); |
1758 | if (retval != STATUS_SUCCESS) { |
1759 | TRACE_RET(chip, STATUS_FAIL); |
1760 | } |
1761 | |
1762 | retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); |
1763 | if (retval != STATUS_SUCCESS) { |
1764 | TRACE_RET(chip, STATUS_FAIL); |
1765 | } |
1766 | |
1767 | ms_set_err_code(chip, MS_NO_ERROR); |
1768 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1769 | if (retval != STATUS_SUCCESS) { |
1770 | TRACE_RET(chip, STATUS_FAIL); |
1771 | } |
1772 | |
1773 | if (val & INT_REG_CMDNK) { |
1774 | ms_set_err_code(chip, MS_CMD_NK); |
1775 | TRACE_RET(chip, STATUS_FAIL); |
1776 | } |
1777 | |
1778 | if (val & INT_REG_CED) { |
1779 | if (val & INT_REG_ERR) { |
1780 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
1781 | TRACE_RET(chip, STATUS_FAIL); |
1782 | } |
1783 | } |
1784 | |
1785 | if (i == 0) { |
1786 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); |
1787 | if (retval != STATUS_SUCCESS) { |
1788 | TRACE_RET(chip, STATUS_FAIL); |
1789 | } |
1790 | |
1791 | ms_set_err_code(chip, MS_NO_ERROR); |
1792 | |
1793 | if (CHK_MS4BIT(ms_card)) { |
1794 | data[0] = 0x88; |
1795 | } else { |
1796 | data[0] = 0x80; |
1797 | } |
1798 | data[1] = 0; |
1799 | data[2] = (u8)(old_blk >> 8); |
1800 | data[3] = (u8)old_blk; |
1801 | data[4] = 0x80; |
1802 | data[5] = 0; |
1803 | data[6] = 0xEF; |
1804 | data[7] = 0xFF; |
1805 | |
1806 | retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8); |
1807 | if (retval != STATUS_SUCCESS) { |
1808 | TRACE_RET(chip, STATUS_FAIL); |
1809 | } |
1810 | |
1811 | retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); |
1812 | if (retval != STATUS_SUCCESS) { |
1813 | TRACE_RET(chip, STATUS_FAIL); |
1814 | } |
1815 | |
1816 | ms_set_err_code(chip, MS_NO_ERROR); |
1817 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
1818 | if (retval != STATUS_SUCCESS) { |
1819 | TRACE_RET(chip, STATUS_FAIL); |
1820 | } |
1821 | |
1822 | if (val & INT_REG_CMDNK) { |
1823 | ms_set_err_code(chip, MS_CMD_NK); |
1824 | TRACE_RET(chip, STATUS_FAIL); |
1825 | } |
1826 | |
1827 | if (val & INT_REG_CED) { |
1828 | if (val & INT_REG_ERR) { |
1829 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
1830 | TRACE_RET(chip, STATUS_FAIL); |
1831 | } |
1832 | } |
1833 | } |
1834 | } |
1835 | |
1836 | return STATUS_SUCCESS; |
1837 | } |
1838 | |
1839 | |
1840 | static int reset_ms(struct rtsx_chip *chip) |
1841 | { |
1842 | struct ms_info *ms_card = &(chip->ms_card); |
1843 | int retval; |
1844 | u16 i, reg_addr, block_size; |
1845 | u8 val, extra[MS_EXTRA_SIZE], j, *ptr; |
1846 | #ifndef SUPPORT_MAGIC_GATE |
1847 | u16 eblock_cnt; |
1848 | #endif |
1849 | |
1850 | retval = ms_prepare_reset(chip); |
1851 | if (retval != STATUS_SUCCESS) { |
1852 | TRACE_RET(chip, STATUS_FAIL); |
1853 | } |
1854 | |
1855 | ms_card->ms_type |= TYPE_MS; |
1856 | |
1857 | retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT); |
1858 | if (retval != STATUS_SUCCESS) { |
1859 | TRACE_RET(chip, STATUS_FAIL); |
1860 | } |
1861 | |
1862 | retval = ms_read_status_reg(chip); |
1863 | if (retval != STATUS_SUCCESS) { |
1864 | TRACE_RET(chip, STATUS_FAIL); |
1865 | } |
1866 | |
1867 | RTSX_READ_REG(chip, PPBUF_BASE2, &val); |
1868 | if (val & WRT_PRTCT) { |
1869 | chip->card_wp |= MS_CARD; |
1870 | } else { |
1871 | chip->card_wp &= ~MS_CARD; |
1872 | } |
1873 | |
1874 | i = 0; |
1875 | |
1876 | RE_SEARCH: |
1877 | /* Search Boot Block */ |
1878 | while (i < (MAX_DEFECTIVE_BLOCK + 2)) { |
1879 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
1880 | ms_set_err_code(chip, MS_NO_CARD); |
1881 | TRACE_RET(chip, STATUS_FAIL); |
1882 | } |
1883 | |
1884 | retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE); |
1885 | if (retval != STATUS_SUCCESS) { |
1886 | i++; |
1887 | continue; |
1888 | } |
1889 | |
1890 | if (extra[0] & BLOCK_OK) { |
1891 | if (!(extra[1] & NOT_BOOT_BLOCK)) { |
1892 | ms_card->boot_block = i; |
1893 | break; |
1894 | } |
1895 | } |
1896 | i++; |
1897 | } |
1898 | |
1899 | if (i == (MAX_DEFECTIVE_BLOCK + 2)) { |
1900 | RTSX_DEBUGP("No boot block found!"); |
1901 | TRACE_RET(chip, STATUS_FAIL); |
1902 | } |
1903 | |
1904 | for (j = 0; j < 3; j++) { |
1905 | retval = ms_read_page(chip, ms_card->boot_block, j); |
1906 | if (retval != STATUS_SUCCESS) { |
1907 | if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) { |
1908 | i = ms_card->boot_block + 1; |
1909 | ms_set_err_code(chip, MS_NO_ERROR); |
1910 | goto RE_SEARCH; |
1911 | } |
1912 | } |
1913 | } |
1914 | |
1915 | retval = ms_read_page(chip, ms_card->boot_block, 0); |
1916 | if (retval != STATUS_SUCCESS) { |
1917 | TRACE_RET(chip, STATUS_FAIL); |
1918 | } |
1919 | |
1920 | /* Read MS system information as sys_info */ |
1921 | rtsx_init_cmd(chip); |
1922 | |
1923 | for (i = 0; i < 96; i++) { |
1924 | rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0); |
1925 | } |
1926 | |
1927 | retval = rtsx_send_cmd(chip, MS_CARD, 100); |
1928 | if (retval < 0) { |
1929 | TRACE_RET(chip, STATUS_FAIL); |
1930 | } |
1931 | |
1932 | ptr = rtsx_get_cmd_data(chip); |
1933 | memcpy(ms_card->raw_sys_info, ptr, 96); |
1934 | |
1935 | /* Read useful block contents */ |
1936 | rtsx_init_cmd(chip); |
1937 | |
1938 | rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0); |
1939 | rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0); |
1940 | |
1941 | for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr++) { |
1942 | rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); |
1943 | } |
1944 | |
1945 | for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++) { |
1946 | rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); |
1947 | } |
1948 | |
1949 | rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0); |
1950 | rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0); |
1951 | |
1952 | retval = rtsx_send_cmd(chip, MS_CARD, 100); |
1953 | if (retval < 0) { |
1954 | TRACE_RET(chip, STATUS_FAIL); |
1955 | } |
1956 | |
1957 | ptr = rtsx_get_cmd_data(chip); |
1958 | |
1959 | RTSX_DEBUGP("Boot block data:\n"); |
1960 | RTSX_DUMP(ptr, 16); |
1961 | |
1962 | /* Block ID error |
1963 | * HEADER_ID0, HEADER_ID1 |
1964 | */ |
1965 | if (ptr[0] != 0x00 || ptr[1] != 0x01) { |
1966 | i = ms_card->boot_block + 1; |
1967 | goto RE_SEARCH; |
1968 | } |
1969 | |
1970 | /* Page size error |
1971 | * PAGE_SIZE_0, PAGE_SIZE_1 |
1972 | */ |
1973 | if (ptr[12] != 0x02 || ptr[13] != 0x00) { |
1974 | i = ms_card->boot_block + 1; |
1975 | goto RE_SEARCH; |
1976 | } |
1977 | |
1978 | if ((ptr[14] == 1) || (ptr[14] == 3)) { |
1979 | chip->card_wp |= MS_CARD; |
1980 | } |
1981 | |
1982 | /* BLOCK_SIZE_0, BLOCK_SIZE_1 */ |
1983 | block_size = ((u16)ptr[6] << 8) | ptr[7]; |
1984 | if (block_size == 0x0010) { |
1985 | /* Block size 16KB */ |
1986 | ms_card->block_shift = 5; |
1987 | ms_card->page_off = 0x1F; |
1988 | } else if (block_size == 0x0008) { |
1989 | /* Block size 8KB */ |
1990 | ms_card->block_shift = 4; |
1991 | ms_card->page_off = 0x0F; |
1992 | } |
1993 | |
1994 | /* BLOCK_COUNT_0, BLOCK_COUNT_1 */ |
1995 | ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9]; |
1996 | |
1997 | #ifdef SUPPORT_MAGIC_GATE |
1998 | j = ptr[10]; |
1999 | |
2000 | if (ms_card->block_shift == 4) { /* 4MB or 8MB */ |
2001 | if (j < 2) { /* Effective block for 4MB: 0x1F0 */ |
2002 | ms_card->capacity = 0x1EE0; |
2003 | } else { /* Effective block for 8MB: 0x3E0 */ |
2004 | ms_card->capacity = 0x3DE0; |
2005 | } |
2006 | } else { /* 16MB, 32MB, 64MB or 128MB */ |
2007 | if (j < 5) { /* Effective block for 16MB: 0x3E0 */ |
2008 | ms_card->capacity = 0x7BC0; |
2009 | } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */ |
2010 | ms_card->capacity = 0xF7C0; |
2011 | } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */ |
2012 | ms_card->capacity = 0x1EF80; |
2013 | } else { /* Effective block for 128MB: 0x1F00 */ |
2014 | ms_card->capacity = 0x3DF00; |
2015 | } |
2016 | } |
2017 | #else |
2018 | /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */ |
2019 | eblock_cnt = ((u16)ptr[10] << 8) | ptr[11]; |
2020 | |
2021 | ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift; |
2022 | #endif |
2023 | |
2024 | chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity; |
2025 | |
2026 | /* Switch I/F Mode */ |
2027 | if (ptr[15]) { |
2028 | retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1); |
2029 | if (retval != STATUS_SUCCESS) { |
2030 | TRACE_RET(chip, STATUS_FAIL); |
2031 | } |
2032 | |
2033 | RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88); |
2034 | RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0); |
2035 | |
2036 | retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG , 1, NO_WAIT_INT); |
2037 | if (retval != STATUS_SUCCESS) { |
2038 | TRACE_RET(chip, STATUS_FAIL); |
2039 | } |
2040 | |
2041 | RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT, |
2042 | MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT); |
2043 | |
2044 | ms_card->ms_type |= MS_4BIT; |
2045 | } |
2046 | |
2047 | if (CHK_MS4BIT(ms_card)) { |
2048 | chip->card_bus_width[chip->card2lun[MS_CARD]] = 4; |
2049 | } else { |
2050 | chip->card_bus_width[chip->card2lun[MS_CARD]] = 1; |
2051 | } |
2052 | |
2053 | return STATUS_SUCCESS; |
2054 | } |
2055 | |
2056 | static int ms_init_l2p_tbl(struct rtsx_chip *chip) |
2057 | { |
2058 | struct ms_info *ms_card = &(chip->ms_card); |
2059 | int size, i, seg_no, retval; |
2060 | u16 defect_block, reg_addr; |
2061 | u8 val1, val2; |
2062 | |
2063 | ms_card->segment_cnt = ms_card->total_block >> 9; |
2064 | RTSX_DEBUGP("ms_card->segment_cnt = %d\n", ms_card->segment_cnt); |
2065 | |
2066 | size = ms_card->segment_cnt * sizeof(struct zone_entry); |
fcfd8ac0 |
2067 | ms_card->segment = vzalloc(size); |
77d89b08 |
2068 | if (ms_card->segment == NULL) { |
2069 | TRACE_RET(chip, STATUS_FAIL); |
2070 | } |
77d89b08 |
2071 | |
2072 | retval = ms_read_page(chip, ms_card->boot_block, 1); |
2073 | if (retval != STATUS_SUCCESS) { |
2074 | TRACE_GOTO(chip, INIT_FAIL); |
2075 | } |
2076 | |
2077 | reg_addr = PPBUF_BASE2; |
2078 | for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) { |
2079 | retval = rtsx_read_register(chip, reg_addr++, &val1); |
2080 | if (retval != STATUS_SUCCESS) { |
2081 | TRACE_GOTO(chip, INIT_FAIL); |
2082 | } |
2083 | retval = rtsx_read_register(chip, reg_addr++, &val2); |
2084 | if (retval != STATUS_SUCCESS) { |
2085 | TRACE_GOTO(chip, INIT_FAIL); |
2086 | } |
2087 | |
2088 | defect_block = ((u16)val1 << 8) | val2; |
2089 | if (defect_block == 0xFFFF) { |
2090 | break; |
2091 | } |
2092 | seg_no = defect_block / 512; |
2093 | ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block; |
2094 | } |
2095 | |
2096 | for (i = 0; i < ms_card->segment_cnt; i++) { |
2097 | ms_card->segment[i].build_flag = 0; |
2098 | ms_card->segment[i].l2p_table = NULL; |
2099 | ms_card->segment[i].free_table = NULL; |
2100 | ms_card->segment[i].get_index = 0; |
2101 | ms_card->segment[i].set_index = 0; |
2102 | ms_card->segment[i].unused_blk_cnt = 0; |
2103 | |
2104 | RTSX_DEBUGP("defective block count of segment %d is %d\n", |
2105 | i, ms_card->segment[i].disable_count); |
2106 | } |
2107 | |
2108 | return STATUS_SUCCESS; |
2109 | |
2110 | INIT_FAIL: |
2111 | if (ms_card->segment) { |
2112 | vfree(ms_card->segment); |
2113 | ms_card->segment = NULL; |
2114 | } |
2115 | |
2116 | return STATUS_FAIL; |
2117 | } |
2118 | |
2119 | static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off) |
2120 | { |
2121 | struct ms_info *ms_card = &(chip->ms_card); |
2122 | struct zone_entry *segment; |
2123 | |
2124 | if (ms_card->segment == NULL) |
2125 | return 0xFFFF; |
2126 | |
2127 | segment = &(ms_card->segment[seg_no]); |
2128 | |
2129 | if (segment->l2p_table) |
2130 | return segment->l2p_table[log_off]; |
2131 | |
2132 | return 0xFFFF; |
2133 | } |
2134 | |
2135 | static void ms_set_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off, u16 phy_blk) |
2136 | { |
2137 | struct ms_info *ms_card = &(chip->ms_card); |
2138 | struct zone_entry *segment; |
2139 | |
2140 | if (ms_card->segment == NULL) |
2141 | return; |
2142 | |
2143 | segment = &(ms_card->segment[seg_no]); |
2144 | if (segment->l2p_table) { |
2145 | segment->l2p_table[log_off] = phy_blk; |
2146 | } |
2147 | } |
2148 | |
2149 | static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk) |
2150 | { |
2151 | struct ms_info *ms_card = &(chip->ms_card); |
2152 | struct zone_entry *segment; |
2153 | int seg_no; |
2154 | |
2155 | seg_no = (int)phy_blk >> 9; |
2156 | segment = &(ms_card->segment[seg_no]); |
2157 | |
2158 | segment->free_table[segment->set_index++] = phy_blk; |
2159 | if (segment->set_index >= MS_FREE_TABLE_CNT) { |
2160 | segment->set_index = 0; |
2161 | } |
2162 | segment->unused_blk_cnt++; |
2163 | } |
2164 | |
2165 | static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no) |
2166 | { |
2167 | struct ms_info *ms_card = &(chip->ms_card); |
2168 | struct zone_entry *segment; |
2169 | u16 phy_blk; |
2170 | |
2171 | segment = &(ms_card->segment[seg_no]); |
2172 | |
2173 | if (segment->unused_blk_cnt <= 0) |
2174 | return 0xFFFF; |
2175 | |
2176 | phy_blk = segment->free_table[segment->get_index]; |
2177 | segment->free_table[segment->get_index++] = 0xFFFF; |
2178 | if (segment->get_index >= MS_FREE_TABLE_CNT) { |
2179 | segment->get_index = 0; |
2180 | } |
2181 | segment->unused_blk_cnt--; |
2182 | |
2183 | return phy_blk; |
2184 | } |
2185 | |
2186 | static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478, 2974, 3470, |
2187 | 3966, 4462, 4958, 5454, 5950, 6446, 6942, 7438, 7934}; |
2188 | |
2189 | static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk, u16 log_off, u8 us1, u8 us2) |
2190 | { |
2191 | struct ms_info *ms_card = &(chip->ms_card); |
2192 | struct zone_entry *segment; |
2193 | int seg_no; |
2194 | u16 tmp_blk; |
2195 | |
2196 | seg_no = (int)phy_blk >> 9; |
2197 | segment = &(ms_card->segment[seg_no]); |
2198 | tmp_blk = segment->l2p_table[log_off]; |
2199 | |
2200 | if (us1 != us2) { |
2201 | if (us1 == 0) { |
2202 | if (!(chip->card_wp & MS_CARD)) { |
2203 | ms_erase_block(chip, tmp_blk); |
2204 | } |
2205 | ms_set_unused_block(chip, tmp_blk); |
2206 | segment->l2p_table[log_off] = phy_blk; |
2207 | } else { |
2208 | if (!(chip->card_wp & MS_CARD)) { |
2209 | ms_erase_block(chip, phy_blk); |
2210 | } |
2211 | ms_set_unused_block(chip, phy_blk); |
2212 | } |
2213 | } else { |
2214 | if (phy_blk < tmp_blk) { |
2215 | if (!(chip->card_wp & MS_CARD)) { |
2216 | ms_erase_block(chip, phy_blk); |
2217 | } |
2218 | ms_set_unused_block(chip, phy_blk); |
2219 | } else { |
2220 | if (!(chip->card_wp & MS_CARD)) { |
2221 | ms_erase_block(chip, tmp_blk); |
2222 | } |
2223 | ms_set_unused_block(chip, tmp_blk); |
2224 | segment->l2p_table[log_off] = phy_blk; |
2225 | } |
2226 | } |
2227 | |
2228 | return STATUS_SUCCESS; |
2229 | } |
2230 | |
2231 | static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) |
2232 | { |
2233 | struct ms_info *ms_card = &(chip->ms_card); |
2234 | struct zone_entry *segment; |
2235 | int retval, table_size, disable_cnt, defect_flag, i; |
2236 | u16 start, end, phy_blk, log_blk, tmp_blk; |
2237 | u8 extra[MS_EXTRA_SIZE], us1, us2; |
2238 | |
2239 | RTSX_DEBUGP("ms_build_l2p_tbl: %d\n", seg_no); |
2240 | |
2241 | if (ms_card->segment == NULL) { |
2242 | retval = ms_init_l2p_tbl(chip); |
2243 | if (retval != STATUS_SUCCESS) { |
2244 | TRACE_RET(chip, retval); |
2245 | } |
2246 | } |
2247 | |
2248 | if (ms_card->segment[seg_no].build_flag) { |
2249 | RTSX_DEBUGP("l2p table of segment %d has been built\n", seg_no); |
2250 | return STATUS_SUCCESS; |
2251 | } |
2252 | |
2253 | if (seg_no == 0) { |
2254 | table_size = 494; |
2255 | } else { |
2256 | table_size = 496; |
2257 | } |
2258 | |
2259 | segment = &(ms_card->segment[seg_no]); |
2260 | |
2261 | if (segment->l2p_table == NULL) { |
2262 | segment->l2p_table = (u16 *)vmalloc(table_size * 2); |
2263 | if (segment->l2p_table == NULL) { |
2264 | TRACE_GOTO(chip, BUILD_FAIL); |
2265 | } |
2266 | } |
2267 | memset((u8 *)(segment->l2p_table), 0xff, table_size * 2); |
2268 | |
2269 | if (segment->free_table == NULL) { |
2270 | segment->free_table = (u16 *)vmalloc(MS_FREE_TABLE_CNT * 2); |
2271 | if (segment->free_table == NULL) { |
2272 | TRACE_GOTO(chip, BUILD_FAIL); |
2273 | } |
2274 | } |
2275 | memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2); |
2276 | |
2277 | start = (u16)seg_no << 9; |
2278 | end = (u16)(seg_no + 1) << 9; |
2279 | |
2280 | disable_cnt = segment->disable_count; |
2281 | |
2282 | segment->get_index = segment->set_index = 0; |
2283 | segment->unused_blk_cnt = 0; |
2284 | |
2285 | for (phy_blk = start; phy_blk < end; phy_blk++) { |
2286 | if (disable_cnt) { |
2287 | defect_flag = 0; |
2288 | for (i = 0; i < segment->disable_count; i++) { |
2289 | if (phy_blk == segment->defect_list[i]) { |
2290 | defect_flag = 1; |
2291 | break; |
2292 | } |
2293 | } |
2294 | if (defect_flag) { |
2295 | disable_cnt--; |
2296 | continue; |
2297 | } |
2298 | } |
2299 | |
2300 | retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE); |
2301 | if (retval != STATUS_SUCCESS) { |
2302 | RTSX_DEBUGP("read extra data fail\n"); |
2303 | ms_set_bad_block(chip, phy_blk); |
2304 | continue; |
2305 | } |
2306 | |
2307 | if (seg_no == ms_card->segment_cnt - 1) { |
2308 | if (!(extra[1] & NOT_TRANSLATION_TABLE)) { |
2309 | if (!(chip->card_wp & MS_CARD)) { |
2310 | retval = ms_erase_block(chip, phy_blk); |
2311 | if (retval != STATUS_SUCCESS) |
2312 | continue; |
2313 | extra[2] = 0xff; |
2314 | extra[3] = 0xff; |
2315 | } |
2316 | } |
2317 | } |
2318 | |
2319 | if (!(extra[0] & BLOCK_OK)) |
2320 | continue; |
2321 | if (!(extra[1] & NOT_BOOT_BLOCK)) |
2322 | continue; |
2323 | if ((extra[0] & PAGE_OK) != PAGE_OK) |
2324 | continue; |
2325 | |
2326 | log_blk = ((u16)extra[2] << 8) | extra[3]; |
2327 | |
2328 | if (log_blk == 0xFFFF) { |
2329 | if (!(chip->card_wp & MS_CARD)) { |
2330 | retval = ms_erase_block(chip, phy_blk); |
2331 | if (retval != STATUS_SUCCESS) |
2332 | continue; |
2333 | } |
2334 | ms_set_unused_block(chip, phy_blk); |
2335 | continue; |
2336 | } |
2337 | |
2338 | if ((log_blk < ms_start_idx[seg_no]) || |
2339 | (log_blk >= ms_start_idx[seg_no+1])) { |
2340 | if (!(chip->card_wp & MS_CARD)) { |
2341 | retval = ms_erase_block(chip, phy_blk); |
2342 | if (retval != STATUS_SUCCESS) |
2343 | continue; |
2344 | } |
2345 | ms_set_unused_block(chip, phy_blk); |
2346 | continue; |
2347 | } |
2348 | |
2349 | if (segment->l2p_table[log_blk - ms_start_idx[seg_no]] == 0xFFFF) { |
2350 | segment->l2p_table[log_blk - ms_start_idx[seg_no]] = phy_blk; |
2351 | continue; |
2352 | } |
2353 | |
2354 | us1 = extra[0] & 0x10; |
2355 | tmp_blk = segment->l2p_table[log_blk - ms_start_idx[seg_no]]; |
2356 | retval = ms_read_extra_data(chip, tmp_blk, 0, extra, MS_EXTRA_SIZE); |
2357 | if (retval != STATUS_SUCCESS) |
2358 | continue; |
2359 | us2 = extra[0] & 0x10; |
2360 | |
2361 | (void)ms_arbitrate_l2p(chip, phy_blk, log_blk-ms_start_idx[seg_no], us1, us2); |
2362 | continue; |
2363 | } |
2364 | |
2365 | segment->build_flag = 1; |
2366 | |
2367 | RTSX_DEBUGP("unused block count: %d\n", segment->unused_blk_cnt); |
2368 | |
2369 | /* Logical Address Confirmation Process */ |
2370 | if (seg_no == ms_card->segment_cnt - 1) { |
2371 | if (segment->unused_blk_cnt < 2) { |
2372 | chip->card_wp |= MS_CARD; |
2373 | } |
2374 | } else { |
2375 | if (segment->unused_blk_cnt < 1) { |
2376 | chip->card_wp |= MS_CARD; |
2377 | } |
2378 | } |
2379 | |
2380 | if (chip->card_wp & MS_CARD) |
2381 | return STATUS_SUCCESS; |
2382 | |
2383 | for (log_blk = ms_start_idx[seg_no]; log_blk < ms_start_idx[seg_no + 1]; log_blk++) { |
2384 | if (segment->l2p_table[log_blk-ms_start_idx[seg_no]] == 0xFFFF) { |
2385 | phy_blk = ms_get_unused_block(chip, seg_no); |
2386 | if (phy_blk == 0xFFFF) { |
2387 | chip->card_wp |= MS_CARD; |
2388 | return STATUS_SUCCESS; |
2389 | } |
2390 | retval = ms_init_page(chip, phy_blk, log_blk, 0, 1); |
2391 | if (retval != STATUS_SUCCESS) { |
2392 | TRACE_GOTO(chip, BUILD_FAIL); |
2393 | } |
2394 | segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk; |
2395 | if (seg_no == ms_card->segment_cnt - 1) { |
2396 | if (segment->unused_blk_cnt < 2) { |
2397 | chip->card_wp |= MS_CARD; |
2398 | return STATUS_SUCCESS; |
2399 | } |
2400 | } else { |
2401 | if (segment->unused_blk_cnt < 1) { |
2402 | chip->card_wp |= MS_CARD; |
2403 | return STATUS_SUCCESS; |
2404 | } |
2405 | } |
2406 | } |
2407 | } |
2408 | |
2409 | /* Make boot block be the first normal block */ |
2410 | if (seg_no == 0) { |
2411 | for (log_blk = 0; log_blk < 494; log_blk++) { |
2412 | tmp_blk = segment->l2p_table[log_blk]; |
2413 | if (tmp_blk < ms_card->boot_block) { |
2414 | RTSX_DEBUGP("Boot block is not the first normal block.\n"); |
2415 | |
2416 | if (chip->card_wp & MS_CARD) |
2417 | break; |
2418 | |
2419 | phy_blk = ms_get_unused_block(chip, 0); |
2420 | retval = ms_copy_page(chip, tmp_blk, phy_blk, |
2421 | log_blk, 0, ms_card->page_off + 1); |
2422 | if (retval != STATUS_SUCCESS) { |
2423 | TRACE_RET(chip, STATUS_FAIL); |
2424 | } |
2425 | |
2426 | segment->l2p_table[log_blk] = phy_blk; |
2427 | |
2428 | retval = ms_set_bad_block(chip, tmp_blk); |
2429 | if (retval != STATUS_SUCCESS) { |
2430 | TRACE_RET(chip, STATUS_FAIL); |
2431 | } |
2432 | } |
2433 | } |
2434 | } |
2435 | |
2436 | return STATUS_SUCCESS; |
2437 | |
2438 | BUILD_FAIL: |
2439 | segment->build_flag = 0; |
2440 | if (segment->l2p_table) { |
2441 | vfree(segment->l2p_table); |
2442 | segment->l2p_table = NULL; |
2443 | } |
2444 | if (segment->free_table) { |
2445 | vfree(segment->free_table); |
2446 | segment->free_table = NULL; |
2447 | } |
2448 | |
2449 | return STATUS_FAIL; |
2450 | } |
2451 | |
2452 | |
2453 | int reset_ms_card(struct rtsx_chip *chip) |
2454 | { |
2455 | struct ms_info *ms_card = &(chip->ms_card); |
2456 | int retval; |
2457 | |
2458 | memset(ms_card, 0, sizeof(struct ms_info)); |
2459 | |
2460 | retval = enable_card_clock(chip, MS_CARD); |
2461 | if (retval != STATUS_SUCCESS) { |
2462 | TRACE_RET(chip, STATUS_FAIL); |
2463 | } |
2464 | |
2465 | retval = select_card(chip, MS_CARD); |
2466 | if (retval != STATUS_SUCCESS) { |
2467 | TRACE_RET(chip, STATUS_FAIL); |
2468 | } |
2469 | |
2470 | ms_card->ms_type = 0; |
2471 | |
2472 | retval = reset_ms_pro(chip); |
2473 | if (retval != STATUS_SUCCESS) { |
2474 | if (ms_card->check_ms_flow) { |
2475 | retval = reset_ms(chip); |
2476 | if (retval != STATUS_SUCCESS) { |
2477 | TRACE_RET(chip, STATUS_FAIL); |
2478 | } |
2479 | } else { |
2480 | TRACE_RET(chip, STATUS_FAIL); |
2481 | } |
2482 | } |
2483 | |
2484 | retval = ms_set_init_para(chip); |
2485 | if (retval != STATUS_SUCCESS) { |
2486 | TRACE_RET(chip, STATUS_FAIL); |
2487 | } |
2488 | |
2489 | if (!CHK_MSPRO(ms_card)) { |
2490 | /* Build table for the last segment, |
2491 | * to check if L2P talbe block exist,erasing it |
2492 | */ |
2493 | retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1); |
2494 | if (retval != STATUS_SUCCESS) { |
2495 | TRACE_RET(chip, STATUS_FAIL); |
2496 | } |
2497 | } |
2498 | |
2499 | RTSX_DEBUGP("ms_card->ms_type = 0x%x\n", ms_card->ms_type); |
2500 | |
2501 | return STATUS_SUCCESS; |
2502 | } |
2503 | |
2504 | static int mspro_set_rw_cmd(struct rtsx_chip *chip, u32 start_sec, u16 sec_cnt, u8 cmd) |
2505 | { |
2506 | int retval, i; |
2507 | u8 data[8]; |
2508 | |
2509 | data[0] = cmd; |
2510 | data[1] = (u8)(sec_cnt >> 8); |
2511 | data[2] = (u8)sec_cnt; |
2512 | data[3] = (u8)(start_sec >> 24); |
2513 | data[4] = (u8)(start_sec >> 16); |
2514 | data[5] = (u8)(start_sec >> 8); |
2515 | data[6] = (u8)start_sec; |
2516 | data[7] = 0; |
2517 | |
2518 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
2519 | retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8); |
2520 | if (retval == STATUS_SUCCESS) |
2521 | break; |
2522 | } |
2523 | if (i == MS_MAX_RETRY_COUNT) { |
2524 | TRACE_RET(chip, STATUS_FAIL); |
2525 | } |
2526 | |
2527 | return STATUS_SUCCESS; |
2528 | } |
2529 | |
2530 | |
2531 | void mspro_stop_seq_mode(struct rtsx_chip *chip) |
2532 | { |
2533 | struct ms_info *ms_card = &(chip->ms_card); |
2534 | int retval; |
2535 | |
2536 | RTSX_DEBUGP("--%s--\n", __func__); |
2537 | |
2538 | if (ms_card->seq_mode) { |
2539 | retval = ms_switch_clock(chip); |
2540 | if (retval != STATUS_SUCCESS) |
2541 | return; |
2542 | |
2543 | ms_card->seq_mode = 0; |
2544 | ms_card->total_sec_cnt = 0; |
2545 | ms_send_cmd(chip, PRO_STOP, WAIT_INT); |
2546 | |
2547 | rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); |
2548 | } |
2549 | } |
2550 | |
2551 | static inline int ms_auto_tune_clock(struct rtsx_chip *chip) |
2552 | { |
2553 | struct ms_info *ms_card = &(chip->ms_card); |
2554 | int retval; |
2555 | |
2556 | RTSX_DEBUGP("--%s--\n", __func__); |
2557 | |
2558 | if (chip->asic_code) { |
2559 | if (ms_card->ms_clock > 30) { |
2560 | ms_card->ms_clock -= 20; |
2561 | } |
2562 | } else { |
2563 | if (ms_card->ms_clock == CLK_80) { |
2564 | ms_card->ms_clock = CLK_60; |
2565 | } else if (ms_card->ms_clock == CLK_60) { |
2566 | ms_card->ms_clock = CLK_40; |
2567 | } |
2568 | } |
2569 | |
2570 | retval = ms_switch_clock(chip); |
2571 | if (retval != STATUS_SUCCESS) { |
2572 | TRACE_RET(chip, STATUS_FAIL); |
2573 | } |
2574 | |
2575 | return STATUS_SUCCESS; |
2576 | } |
2577 | |
2578 | static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt) |
2579 | { |
2580 | struct ms_info *ms_card = &(chip->ms_card); |
2581 | int retval, mode_2k = 0; |
2582 | u16 count; |
2583 | u8 val, trans_mode, rw_tpc, rw_cmd; |
2584 | |
2585 | ms_set_err_code(chip, MS_NO_ERROR); |
2586 | |
2587 | ms_card->cleanup_counter = 0; |
2588 | |
2589 | if (CHK_MSHG(ms_card)) { |
2590 | if ((start_sector % 4) || (sector_cnt % 4)) { |
2591 | if (srb->sc_data_direction == DMA_FROM_DEVICE) { |
2592 | rw_tpc = PRO_READ_LONG_DATA; |
2593 | rw_cmd = PRO_READ_DATA; |
2594 | } else { |
2595 | rw_tpc = PRO_WRITE_LONG_DATA; |
2596 | rw_cmd = PRO_WRITE_DATA; |
2597 | } |
2598 | } else { |
2599 | if (srb->sc_data_direction == DMA_FROM_DEVICE) { |
2600 | rw_tpc = PRO_READ_QUAD_DATA; |
2601 | rw_cmd = PRO_READ_2K_DATA; |
2602 | } else { |
2603 | rw_tpc = PRO_WRITE_QUAD_DATA; |
2604 | rw_cmd = PRO_WRITE_2K_DATA; |
2605 | } |
2606 | mode_2k = 1; |
2607 | } |
2608 | } else { |
2609 | if (srb->sc_data_direction == DMA_FROM_DEVICE) { |
2610 | rw_tpc = PRO_READ_LONG_DATA; |
2611 | rw_cmd = PRO_READ_DATA; |
2612 | } else { |
2613 | rw_tpc = PRO_WRITE_LONG_DATA; |
2614 | rw_cmd = PRO_WRITE_DATA; |
2615 | } |
2616 | } |
2617 | |
2618 | retval = ms_switch_clock(chip); |
2619 | if (retval != STATUS_SUCCESS) { |
2620 | TRACE_RET(chip, STATUS_FAIL); |
2621 | } |
2622 | |
2623 | if (srb->sc_data_direction == DMA_FROM_DEVICE) { |
2624 | trans_mode = MS_TM_AUTO_READ; |
2625 | } else { |
2626 | trans_mode = MS_TM_AUTO_WRITE; |
2627 | } |
2628 | |
2629 | RTSX_READ_REG(chip, MS_TRANS_CFG, &val); |
2630 | |
2631 | if (ms_card->seq_mode) { |
2632 | if ((ms_card->pre_dir != srb->sc_data_direction) |
2633 | || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector) |
2634 | || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) |
2635 | || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) |
2636 | || !(val & MS_INT_BREQ) |
2637 | || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) { |
2638 | ms_card->seq_mode = 0; |
2639 | ms_card->total_sec_cnt = 0; |
2640 | if (val & MS_INT_BREQ) { |
2641 | retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT); |
2642 | if (retval != STATUS_SUCCESS) { |
2643 | TRACE_RET(chip, STATUS_FAIL); |
2644 | } |
2645 | |
2646 | rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); |
2647 | } |
2648 | } |
2649 | } |
2650 | |
2651 | if (!ms_card->seq_mode) { |
2652 | ms_card->total_sec_cnt = 0; |
2653 | if (sector_cnt >= SEQ_START_CRITERIA) { |
2654 | if ((ms_card->capacity - start_sector) > 0xFE00) { |
2655 | count = 0xFE00; |
2656 | } else { |
2657 | count = (u16)(ms_card->capacity - start_sector); |
2658 | } |
2659 | if (count > sector_cnt) { |
2660 | if (mode_2k) { |
2661 | ms_card->seq_mode |= MODE_2K_SEQ; |
2662 | } else { |
2663 | ms_card->seq_mode |= MODE_512_SEQ; |
2664 | } |
2665 | } |
2666 | } else { |
2667 | count = sector_cnt; |
2668 | } |
2669 | retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd); |
2670 | if (retval != STATUS_SUCCESS) { |
2671 | ms_card->seq_mode = 0; |
2672 | TRACE_RET(chip, STATUS_FAIL); |
2673 | } |
2674 | } |
2675 | |
2676 | retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt, WAIT_INT, mode_2k, |
2677 | scsi_sg_count(srb), scsi_sglist(srb), scsi_bufflen(srb)); |
2678 | if (retval != STATUS_SUCCESS) { |
2679 | ms_card->seq_mode = 0; |
2680 | rtsx_read_register(chip, MS_TRANS_CFG, &val); |
2681 | rtsx_clear_ms_error(chip); |
2682 | |
2683 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
2684 | chip->rw_need_retry = 0; |
2685 | RTSX_DEBUGP("No card exist, exit mspro_rw_multi_sector\n"); |
2686 | TRACE_RET(chip, STATUS_FAIL); |
2687 | } |
2688 | |
2689 | if (val & MS_INT_BREQ) { |
2690 | ms_send_cmd(chip, PRO_STOP, WAIT_INT); |
2691 | } |
2692 | if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) { |
2693 | RTSX_DEBUGP("MSPro CRC error, tune clock!\n"); |
2694 | chip->rw_need_retry = 1; |
2695 | ms_auto_tune_clock(chip); |
2696 | } |
2697 | |
2698 | TRACE_RET(chip, retval); |
2699 | } |
2700 | |
2701 | if (ms_card->seq_mode) { |
2702 | ms_card->pre_sec_addr = start_sector; |
2703 | ms_card->pre_sec_cnt = sector_cnt; |
2704 | ms_card->pre_dir = srb->sc_data_direction; |
2705 | ms_card->total_sec_cnt += sector_cnt; |
2706 | } |
2707 | |
2708 | return STATUS_SUCCESS; |
2709 | } |
2710 | |
2711 | static int mspro_read_format_progress(struct rtsx_chip *chip, const int short_data_len) |
2712 | { |
2713 | struct ms_info *ms_card = &(chip->ms_card); |
2714 | int retval, i; |
2715 | u32 total_progress, cur_progress; |
2716 | u8 cnt, tmp; |
2717 | u8 data[8]; |
2718 | |
2719 | RTSX_DEBUGP("mspro_read_format_progress, short_data_len = %d\n", short_data_len); |
2720 | |
2721 | retval = ms_switch_clock(chip); |
2722 | if (retval != STATUS_SUCCESS) { |
2723 | ms_card->format_status = FORMAT_FAIL; |
2724 | TRACE_RET(chip, STATUS_FAIL); |
2725 | } |
2726 | |
2727 | retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp); |
2728 | if (retval != STATUS_SUCCESS) { |
2729 | ms_card->format_status = FORMAT_FAIL; |
2730 | TRACE_RET(chip, STATUS_FAIL); |
2731 | } |
2732 | |
2733 | if (!(tmp & MS_INT_BREQ)) { |
2734 | if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) { |
2735 | ms_card->format_status = FORMAT_SUCCESS; |
2736 | return STATUS_SUCCESS; |
2737 | } |
2738 | ms_card->format_status = FORMAT_FAIL; |
2739 | TRACE_RET(chip, STATUS_FAIL); |
2740 | } |
2741 | |
2742 | if (short_data_len >= 256) { |
2743 | cnt = 0; |
2744 | } else { |
2745 | cnt = (u8)short_data_len; |
2746 | } |
2747 | |
2748 | retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, MS_NO_CHECK_INT); |
2749 | if (retval != STATUS_SUCCESS) { |
2750 | ms_card->format_status = FORMAT_FAIL; |
2751 | TRACE_RET(chip, STATUS_FAIL); |
2752 | } |
2753 | |
2754 | retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT, data, 8); |
2755 | if (retval != STATUS_SUCCESS) { |
2756 | ms_card->format_status = FORMAT_FAIL; |
2757 | TRACE_RET(chip, STATUS_FAIL); |
2758 | } |
2759 | |
2760 | total_progress = (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]; |
2761 | cur_progress = (data[4] << 24) | (data[5] << 16) | (data[6] << 8) | data[7]; |
2762 | |
2763 | RTSX_DEBUGP("total_progress = %d, cur_progress = %d\n", |
2764 | total_progress, cur_progress); |
2765 | |
2766 | if (total_progress == 0) { |
2767 | ms_card->progress = 0; |
2768 | } else { |
2769 | u64 ulltmp = (u64)cur_progress * (u64)65535; |
2770 | do_div(ulltmp, total_progress); |
2771 | ms_card->progress = (u16)ulltmp; |
2772 | } |
2773 | RTSX_DEBUGP("progress = %d\n", ms_card->progress); |
2774 | |
2775 | for (i = 0; i < 5000; i++) { |
2776 | retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp); |
2777 | if (retval != STATUS_SUCCESS) { |
2778 | ms_card->format_status = FORMAT_FAIL; |
2779 | TRACE_RET(chip, STATUS_FAIL); |
2780 | } |
2781 | if (tmp & (MS_INT_CED | MS_INT_CMDNK | MS_INT_BREQ | MS_INT_ERR)) { |
2782 | break; |
2783 | } |
2784 | |
2785 | wait_timeout(1); |
2786 | } |
2787 | |
2788 | retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0); |
2789 | if (retval != STATUS_SUCCESS) { |
2790 | ms_card->format_status = FORMAT_FAIL; |
2791 | TRACE_RET(chip, STATUS_FAIL); |
2792 | } |
2793 | |
2794 | if (i == 5000) { |
2795 | ms_card->format_status = FORMAT_FAIL; |
2796 | TRACE_RET(chip, STATUS_FAIL); |
2797 | } |
2798 | |
2799 | if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) { |
2800 | ms_card->format_status = FORMAT_FAIL; |
2801 | TRACE_RET(chip, STATUS_FAIL); |
2802 | } |
2803 | |
2804 | if (tmp & MS_INT_CED) { |
2805 | ms_card->format_status = FORMAT_SUCCESS; |
2806 | ms_card->pro_under_formatting = 0; |
2807 | } else if (tmp & MS_INT_BREQ) { |
2808 | ms_card->format_status = FORMAT_IN_PROGRESS; |
2809 | } else { |
2810 | ms_card->format_status = FORMAT_FAIL; |
2811 | ms_card->pro_under_formatting = 0; |
2812 | TRACE_RET(chip, STATUS_FAIL); |
2813 | } |
2814 | |
2815 | return STATUS_SUCCESS; |
2816 | } |
2817 | |
2818 | void mspro_polling_format_status(struct rtsx_chip *chip) |
2819 | { |
2820 | struct ms_info *ms_card = &(chip->ms_card); |
2821 | int i; |
2822 | |
2823 | if (ms_card->pro_under_formatting && (rtsx_get_stat(chip) != RTSX_STAT_SS)) { |
2824 | rtsx_set_stat(chip, RTSX_STAT_RUN); |
2825 | |
2826 | for (i = 0; i < 65535; i++) { |
2827 | mspro_read_format_progress(chip, MS_SHORT_DATA_LEN); |
2828 | if (ms_card->format_status != FORMAT_IN_PROGRESS) |
2829 | break; |
2830 | } |
2831 | } |
2832 | |
2833 | return; |
2834 | } |
2835 | |
2836 | int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_len, int quick_format) |
2837 | { |
2838 | struct ms_info *ms_card = &(chip->ms_card); |
2839 | int retval, i; |
2840 | u8 buf[8], tmp; |
2841 | u16 para; |
2842 | |
2843 | RTSX_DEBUGP("--%s--\n", __func__); |
2844 | |
2845 | retval = ms_switch_clock(chip); |
2846 | if (retval != STATUS_SUCCESS) { |
2847 | TRACE_RET(chip, STATUS_FAIL); |
2848 | } |
2849 | |
2850 | retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01); |
2851 | if (retval != STATUS_SUCCESS) { |
2852 | TRACE_RET(chip, STATUS_FAIL); |
2853 | } |
2854 | |
2855 | memset(buf, 0, 2); |
2856 | switch (short_data_len) { |
2857 | case 32: |
2858 | buf[0] = 0; |
2859 | break; |
2860 | case 64: |
2861 | buf[0] = 1; |
2862 | break; |
2863 | case 128: |
2864 | buf[0] = 2; |
2865 | break; |
2866 | case 256: |
2867 | default: |
2868 | buf[0] = 3; |
2869 | break; |
2870 | } |
2871 | |
2872 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
2873 | retval = ms_write_bytes(chip, PRO_WRITE_REG, 1, NO_WAIT_INT, buf, 2); |
2874 | if (retval == STATUS_SUCCESS) |
2875 | break; |
2876 | } |
2877 | if (i == MS_MAX_RETRY_COUNT) { |
2878 | TRACE_RET(chip, STATUS_FAIL); |
2879 | } |
2880 | |
2881 | if (quick_format) { |
2882 | para = 0x0000; |
2883 | } else { |
2884 | para = 0x0001; |
2885 | } |
2886 | retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT); |
2887 | if (retval != STATUS_SUCCESS) { |
2888 | TRACE_RET(chip, STATUS_FAIL); |
2889 | } |
2890 | |
2891 | RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp); |
2892 | |
2893 | if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) { |
2894 | TRACE_RET(chip, STATUS_FAIL); |
2895 | } |
2896 | |
2897 | if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) { |
2898 | ms_card->pro_under_formatting = 1; |
2899 | ms_card->progress = 0; |
2900 | ms_card->format_status = FORMAT_IN_PROGRESS; |
2901 | return STATUS_SUCCESS; |
2902 | } |
2903 | |
2904 | if (tmp & MS_INT_CED) { |
2905 | ms_card->pro_under_formatting = 0; |
2906 | ms_card->progress = 0; |
2907 | ms_card->format_status = FORMAT_SUCCESS; |
2908 | set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE); |
2909 | return STATUS_SUCCESS; |
2910 | } |
2911 | |
2912 | TRACE_RET(chip, STATUS_FAIL); |
2913 | } |
2914 | |
2915 | |
2916 | static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, |
2917 | u8 start_page, u8 end_page, u8 *buf, unsigned int *index, unsigned int *offset) |
2918 | { |
2919 | struct ms_info *ms_card = &(chip->ms_card); |
2920 | int retval, i; |
2921 | u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6]; |
2922 | u8 *ptr; |
2923 | |
2924 | retval = ms_read_extra_data(chip, phy_blk, start_page, extra, MS_EXTRA_SIZE); |
2925 | if (retval == STATUS_SUCCESS) { |
2926 | if ((extra[1] & 0x30) != 0x30) { |
2927 | ms_set_err_code(chip, MS_FLASH_READ_ERROR); |
2928 | TRACE_RET(chip, STATUS_FAIL); |
2929 | } |
2930 | } |
2931 | |
2932 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); |
2933 | if (retval != STATUS_SUCCESS) { |
2934 | TRACE_RET(chip, STATUS_FAIL); |
2935 | } |
2936 | |
2937 | if (CHK_MS4BIT(ms_card)) { |
2938 | data[0] = 0x88; |
2939 | } else { |
2940 | data[0] = 0x80; |
2941 | } |
2942 | data[1] = 0; |
2943 | data[2] = (u8)(phy_blk >> 8); |
2944 | data[3] = (u8)phy_blk; |
2945 | data[4] = 0; |
2946 | data[5] = start_page; |
2947 | |
2948 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
2949 | retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); |
2950 | if (retval == STATUS_SUCCESS) |
2951 | break; |
2952 | } |
2953 | if (i == MS_MAX_RETRY_COUNT) { |
2954 | TRACE_RET(chip, STATUS_FAIL); |
2955 | } |
2956 | |
2957 | ms_set_err_code(chip, MS_NO_ERROR); |
2958 | |
2959 | retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); |
2960 | if (retval != STATUS_SUCCESS) { |
2961 | TRACE_RET(chip, STATUS_FAIL); |
2962 | } |
2963 | |
2964 | ptr = buf; |
2965 | |
2966 | for (page_addr = start_page; page_addr < end_page; page_addr++) { |
2967 | ms_set_err_code(chip, MS_NO_ERROR); |
2968 | |
2969 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
2970 | ms_set_err_code(chip, MS_NO_CARD); |
2971 | TRACE_RET(chip, STATUS_FAIL); |
2972 | } |
2973 | |
2974 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
2975 | if (retval != STATUS_SUCCESS) { |
2976 | TRACE_RET(chip, STATUS_FAIL); |
2977 | } |
2978 | if (val & INT_REG_CMDNK) { |
2979 | ms_set_err_code(chip, MS_CMD_NK); |
2980 | TRACE_RET(chip, STATUS_FAIL); |
2981 | } |
2982 | if (val & INT_REG_ERR) { |
2983 | if (val & INT_REG_BREQ) { |
2984 | retval = ms_read_status_reg(chip); |
2985 | if (retval != STATUS_SUCCESS) { |
2986 | if (!(chip->card_wp & MS_CARD)) { |
2987 | reset_ms(chip); |
2988 | ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE); |
2989 | ms_write_extra_data(chip, phy_blk, |
2990 | page_addr, extra, MS_EXTRA_SIZE); |
2991 | } |
2992 | ms_set_err_code(chip, MS_FLASH_READ_ERROR); |
2993 | TRACE_RET(chip, STATUS_FAIL); |
2994 | } |
2995 | } else { |
2996 | ms_set_err_code(chip, MS_FLASH_READ_ERROR); |
2997 | TRACE_RET(chip, STATUS_FAIL); |
2998 | } |
2999 | } else { |
3000 | if (!(val & INT_REG_BREQ)) { |
3001 | ms_set_err_code(chip, MS_BREQ_ERROR); |
3002 | TRACE_RET(chip, STATUS_FAIL); |
3003 | } |
3004 | } |
3005 | |
3006 | if (page_addr == (end_page - 1)) { |
3007 | if (!(val & INT_REG_CED)) { |
3008 | retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT); |
3009 | if (retval != STATUS_SUCCESS) { |
3010 | TRACE_RET(chip, STATUS_FAIL); |
3011 | } |
3012 | } |
3013 | |
3014 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
3015 | if (retval != STATUS_SUCCESS) { |
3016 | TRACE_RET(chip, STATUS_FAIL); |
3017 | } |
3018 | if (!(val & INT_REG_CED)) { |
3019 | ms_set_err_code(chip, MS_FLASH_READ_ERROR); |
3020 | TRACE_RET(chip, STATUS_FAIL); |
3021 | } |
3022 | |
3023 | trans_cfg = NO_WAIT_INT; |
3024 | } else { |
3025 | trans_cfg = WAIT_INT; |
3026 | } |
3027 | |
3028 | rtsx_init_cmd(chip); |
3029 | |
3030 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA); |
3031 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, trans_cfg); |
3032 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); |
3033 | |
3034 | trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512); |
3035 | |
3036 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, |
3037 | MS_TRANSFER_START | MS_TM_NORMAL_READ); |
3038 | rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); |
3039 | |
3040 | rtsx_send_cmd_no_wait(chip); |
3041 | |
3042 | retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb), |
3043 | index, offset, DMA_FROM_DEVICE, chip->ms_timeout); |
3044 | if (retval < 0) { |
3045 | if (retval == -ETIMEDOUT) { |
3046 | ms_set_err_code(chip, MS_TO_ERROR); |
3047 | rtsx_clear_ms_error(chip); |
3048 | TRACE_RET(chip, STATUS_TIMEDOUT); |
3049 | } |
3050 | |
3051 | retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); |
3052 | if (retval != STATUS_SUCCESS) { |
3053 | ms_set_err_code(chip, MS_TO_ERROR); |
3054 | rtsx_clear_ms_error(chip); |
3055 | TRACE_RET(chip, STATUS_TIMEDOUT); |
3056 | } |
3057 | if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) { |
3058 | ms_set_err_code(chip, MS_CRC16_ERROR); |
3059 | rtsx_clear_ms_error(chip); |
3060 | TRACE_RET(chip, STATUS_FAIL); |
3061 | } |
3062 | } |
3063 | |
3064 | if (scsi_sg_count(chip->srb) == 0) |
3065 | ptr += 512; |
3066 | } |
3067 | |
3068 | return STATUS_SUCCESS; |
3069 | } |
3070 | |
3071 | static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, |
3072 | u16 log_blk, u8 start_page, u8 end_page, u8 *buf, |
3073 | unsigned int *index, unsigned int *offset) |
3074 | { |
3075 | struct ms_info *ms_card = &(chip->ms_card); |
3076 | int retval, i; |
3077 | u8 page_addr, val, data[16]; |
3078 | u8 *ptr; |
3079 | |
3080 | if (!start_page) { |
3081 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); |
3082 | if (retval != STATUS_SUCCESS) { |
3083 | TRACE_RET(chip, STATUS_FAIL); |
3084 | } |
3085 | |
3086 | if (CHK_MS4BIT(ms_card)) { |
3087 | data[0] = 0x88; |
3088 | } else { |
3089 | data[0] = 0x80; |
3090 | } |
3091 | data[1] = 0; |
3092 | data[2] = (u8)(old_blk >> 8); |
3093 | data[3] = (u8)old_blk; |
3094 | data[4] = 0x80; |
3095 | data[5] = 0; |
3096 | data[6] = 0xEF; |
3097 | data[7] = 0xFF; |
3098 | |
3099 | retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8); |
3100 | if (retval != STATUS_SUCCESS) { |
3101 | TRACE_RET(chip, STATUS_FAIL); |
3102 | } |
3103 | |
3104 | retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); |
3105 | if (retval != STATUS_SUCCESS) { |
3106 | TRACE_RET(chip, STATUS_FAIL); |
3107 | } |
3108 | |
3109 | ms_set_err_code(chip, MS_NO_ERROR); |
3110 | retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT); |
3111 | if (retval != STATUS_SUCCESS) { |
3112 | TRACE_RET(chip, STATUS_FAIL); |
3113 | } |
3114 | } |
3115 | |
3116 | retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE)); |
3117 | if (retval != STATUS_SUCCESS) { |
3118 | TRACE_RET(chip, STATUS_FAIL); |
3119 | } |
3120 | |
3121 | ms_set_err_code(chip, MS_NO_ERROR); |
3122 | |
3123 | if (CHK_MS4BIT(ms_card)) { |
3124 | data[0] = 0x88; |
3125 | } else { |
3126 | data[0] = 0x80; |
3127 | } |
3128 | data[1] = 0; |
3129 | data[2] = (u8)(new_blk >> 8); |
3130 | data[3] = (u8)new_blk; |
3131 | if ((end_page - start_page) == 1) { |
3132 | data[4] = 0x20; |
3133 | } else { |
3134 | data[4] = 0; |
3135 | } |
3136 | data[5] = start_page; |
3137 | data[6] = 0xF8; |
3138 | data[7] = 0xFF; |
3139 | data[8] = (u8)(log_blk >> 8); |
3140 | data[9] = (u8)log_blk; |
3141 | |
3142 | for (i = 0x0A; i < 0x10; i++) { |
3143 | data[i] = 0xFF; |
3144 | } |
3145 | |
3146 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
3147 | retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE, NO_WAIT_INT, data, 16); |
3148 | if (retval == STATUS_SUCCESS) |
3149 | break; |
3150 | } |
3151 | if (i == MS_MAX_RETRY_COUNT) { |
3152 | TRACE_RET(chip, STATUS_FAIL); |
3153 | } |
3154 | |
3155 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
3156 | retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); |
3157 | if (retval == STATUS_SUCCESS) |
3158 | break; |
3159 | } |
3160 | if (i == MS_MAX_RETRY_COUNT) { |
3161 | TRACE_RET(chip, STATUS_FAIL); |
3162 | } |
3163 | |
3164 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
3165 | if (retval != STATUS_SUCCESS) { |
3166 | TRACE_RET(chip, STATUS_FAIL); |
3167 | } |
3168 | |
3169 | ptr = buf; |
3170 | for (page_addr = start_page; page_addr < end_page; page_addr++) { |
3171 | ms_set_err_code(chip, MS_NO_ERROR); |
3172 | |
3173 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
3174 | ms_set_err_code(chip, MS_NO_CARD); |
3175 | TRACE_RET(chip, STATUS_FAIL); |
3176 | } |
3177 | |
3178 | if (val & INT_REG_CMDNK) { |
3179 | ms_set_err_code(chip, MS_CMD_NK); |
3180 | TRACE_RET(chip, STATUS_FAIL); |
3181 | } |
3182 | if (val & INT_REG_ERR) { |
3183 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
3184 | TRACE_RET(chip, STATUS_FAIL); |
3185 | } |
3186 | if (!(val & INT_REG_BREQ)) { |
3187 | ms_set_err_code(chip, MS_BREQ_ERROR); |
3188 | TRACE_RET(chip, STATUS_FAIL); |
3189 | } |
3190 | |
3191 | udelay(30); |
3192 | |
3193 | rtsx_init_cmd(chip); |
3194 | |
3195 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, WRITE_PAGE_DATA); |
3196 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT); |
3197 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); |
3198 | |
3199 | trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512); |
3200 | |
3201 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, |
3202 | MS_TRANSFER_START | MS_TM_NORMAL_WRITE); |
3203 | rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); |
3204 | |
3205 | rtsx_send_cmd_no_wait(chip); |
3206 | |
3207 | retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb), |
3208 | index, offset, DMA_TO_DEVICE, chip->ms_timeout); |
3209 | if (retval < 0) { |
3210 | ms_set_err_code(chip, MS_TO_ERROR); |
3211 | rtsx_clear_ms_error(chip); |
3212 | |
3213 | if (retval == -ETIMEDOUT) { |
3214 | TRACE_RET(chip, STATUS_TIMEDOUT); |
3215 | } else { |
3216 | TRACE_RET(chip, STATUS_FAIL); |
3217 | } |
3218 | } |
3219 | |
3220 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
3221 | if (retval != STATUS_SUCCESS) { |
3222 | TRACE_RET(chip, STATUS_FAIL); |
3223 | } |
3224 | |
3225 | if ((end_page - start_page) == 1) { |
3226 | if (!(val & INT_REG_CED)) { |
3227 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
3228 | TRACE_RET(chip, STATUS_FAIL); |
3229 | } |
3230 | } else { |
3231 | if (page_addr == (end_page - 1)) { |
3232 | if (!(val & INT_REG_CED)) { |
3233 | retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT); |
3234 | if (retval != STATUS_SUCCESS) { |
3235 | TRACE_RET(chip, STATUS_FAIL); |
3236 | } |
3237 | } |
3238 | |
3239 | retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); |
3240 | if (retval != STATUS_SUCCESS) { |
3241 | TRACE_RET(chip, STATUS_FAIL); |
3242 | } |
3243 | } |
3244 | |
3245 | if ((page_addr == (end_page - 1)) || (page_addr == ms_card->page_off)) { |
3246 | if (!(val & INT_REG_CED)) { |
3247 | ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); |
3248 | TRACE_RET(chip, STATUS_FAIL); |
3249 | } |
3250 | } |
3251 | } |
3252 | |
3253 | if (scsi_sg_count(chip->srb) == 0) |
3254 | ptr += 512; |
3255 | } |
3256 | |
3257 | return STATUS_SUCCESS; |
3258 | } |
3259 | |
3260 | |
3261 | static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, |
3262 | u16 log_blk, u8 page_off) |
3263 | { |
3264 | struct ms_info *ms_card = &(chip->ms_card); |
3265 | int retval, seg_no; |
3266 | |
3267 | retval = ms_copy_page(chip, old_blk, new_blk, log_blk, |
3268 | page_off, ms_card->page_off + 1); |
3269 | if (retval != STATUS_SUCCESS) { |
3270 | TRACE_RET(chip, STATUS_FAIL); |
3271 | } |
3272 | |
3273 | seg_no = old_blk >> 9; |
3274 | |
3275 | if (MS_TST_BAD_BLOCK_FLG(ms_card)) { |
3276 | MS_CLR_BAD_BLOCK_FLG(ms_card); |
3277 | ms_set_bad_block(chip, old_blk); |
3278 | } else { |
3279 | retval = ms_erase_block(chip, old_blk); |
3280 | if (retval == STATUS_SUCCESS) { |
3281 | ms_set_unused_block(chip, old_blk); |
3282 | } |
3283 | } |
3284 | |
3285 | ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk); |
3286 | |
3287 | return STATUS_SUCCESS; |
3288 | } |
3289 | |
3290 | static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, |
3291 | u16 log_blk, u8 start_page) |
3292 | { |
3293 | int retval; |
3294 | |
3295 | if (start_page) { |
3296 | retval = ms_copy_page(chip, old_blk, new_blk, log_blk, 0, start_page); |
3297 | if (retval != STATUS_SUCCESS) { |
3298 | TRACE_RET(chip, STATUS_FAIL); |
3299 | } |
3300 | } |
3301 | |
3302 | return STATUS_SUCCESS; |
3303 | } |
3304 | |
3305 | #ifdef MS_DELAY_WRITE |
3306 | int ms_delay_write(struct rtsx_chip *chip) |
3307 | { |
3308 | struct ms_info *ms_card = &(chip->ms_card); |
3309 | struct ms_delay_write_tag *delay_write = &(ms_card->delay_write); |
3310 | int retval; |
3311 | |
3312 | if (delay_write->delay_write_flag) { |
3313 | retval = ms_set_init_para(chip); |
3314 | if (retval != STATUS_SUCCESS) { |
3315 | TRACE_RET(chip, STATUS_FAIL); |
3316 | } |
3317 | |
3318 | delay_write->delay_write_flag = 0; |
3319 | retval = ms_finish_write(chip, |
3320 | delay_write->old_phyblock, delay_write->new_phyblock, |
3321 | delay_write->logblock, delay_write->pageoff); |
3322 | if (retval != STATUS_SUCCESS) { |
3323 | TRACE_RET(chip, STATUS_FAIL); |
3324 | } |
3325 | } |
3326 | |
3327 | return STATUS_SUCCESS; |
3328 | } |
3329 | #endif |
3330 | |
3331 | static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
3332 | { |
3333 | if (srb->sc_data_direction == DMA_FROM_DEVICE) { |
3334 | set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); |
3335 | } else { |
3336 | set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); |
3337 | } |
3338 | } |
3339 | |
3340 | static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt) |
3341 | { |
3342 | struct ms_info *ms_card = &(chip->ms_card); |
3343 | unsigned int lun = SCSI_LUN(srb); |
3344 | int retval, seg_no; |
3345 | unsigned int index = 0, offset = 0; |
3346 | u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt; |
3347 | u8 start_page, end_page = 0, page_cnt; |
3348 | u8 *ptr; |
3349 | #ifdef MS_DELAY_WRITE |
3350 | struct ms_delay_write_tag *delay_write = &(ms_card->delay_write); |
3351 | #endif |
3352 | |
3353 | ms_set_err_code(chip, MS_NO_ERROR); |
3354 | |
3355 | ms_card->cleanup_counter = 0; |
3356 | |
3357 | ptr = (u8 *)scsi_sglist(srb); |
3358 | |
3359 | retval = ms_switch_clock(chip); |
3360 | if (retval != STATUS_SUCCESS) { |
3361 | ms_rw_fail(srb, chip); |
3362 | TRACE_RET(chip, STATUS_FAIL); |
3363 | } |
3364 | |
3365 | log_blk = (u16)(start_sector >> ms_card->block_shift); |
3366 | start_page = (u8)(start_sector & ms_card->page_off); |
3367 | |
7e79f78b |
3368 | for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) { |
77d89b08 |
3369 | if (log_blk < ms_start_idx[seg_no+1]) |
3370 | break; |
3371 | } |
3372 | |
3373 | if (ms_card->segment[seg_no].build_flag == 0) { |
3374 | retval = ms_build_l2p_tbl(chip, seg_no); |
3375 | if (retval != STATUS_SUCCESS) { |
3376 | chip->card_fail |= MS_CARD; |
3377 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); |
3378 | TRACE_RET(chip, STATUS_FAIL); |
3379 | } |
3380 | } |
3381 | |
3382 | if (srb->sc_data_direction == DMA_TO_DEVICE) { |
3383 | #ifdef MS_DELAY_WRITE |
3384 | if (delay_write->delay_write_flag && |
3385 | (delay_write->logblock == log_blk) && |
3386 | (start_page > delay_write->pageoff)) { |
3387 | delay_write->delay_write_flag = 0; |
3388 | retval = ms_copy_page(chip, |
3389 | delay_write->old_phyblock, |
3390 | delay_write->new_phyblock, log_blk, |
3391 | delay_write->pageoff, start_page); |
3392 | if (retval != STATUS_SUCCESS) { |
3393 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); |
3394 | TRACE_RET(chip, STATUS_FAIL); |
3395 | } |
3396 | old_blk = delay_write->old_phyblock; |
3397 | new_blk = delay_write->new_phyblock; |
3398 | } else if (delay_write->delay_write_flag && |
3399 | (delay_write->logblock == log_blk) && |
3400 | (start_page == delay_write->pageoff)) { |
3401 | delay_write->delay_write_flag = 0; |
3402 | old_blk = delay_write->old_phyblock; |
3403 | new_blk = delay_write->new_phyblock; |
3404 | } else { |
3405 | retval = ms_delay_write(chip); |
3406 | if (retval != STATUS_SUCCESS) { |
3407 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); |
3408 | TRACE_RET(chip, STATUS_FAIL); |
3409 | } |
3410 | #endif |
3411 | old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]); |
3412 | new_blk = ms_get_unused_block(chip, seg_no); |
3413 | if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) { |
3414 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); |
3415 | TRACE_RET(chip, STATUS_FAIL); |
3416 | } |
3417 | |
3418 | retval = ms_prepare_write(chip, old_blk, new_blk, log_blk, start_page); |
3419 | if (retval != STATUS_SUCCESS) { |
3420 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
3421 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); |
3422 | TRACE_RET(chip, STATUS_FAIL); |
3423 | } |
3424 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); |
3425 | TRACE_RET(chip, STATUS_FAIL); |
3426 | } |
3427 | #ifdef MS_DELAY_WRITE |
3428 | } |
3429 | #endif |
3430 | } else { |
3431 | #ifdef MS_DELAY_WRITE |
3432 | retval = ms_delay_write(chip); |
3433 | if (retval != STATUS_SUCCESS) { |
3434 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
3435 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); |
3436 | TRACE_RET(chip, STATUS_FAIL); |
3437 | } |
3438 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); |
3439 | TRACE_RET(chip, STATUS_FAIL); |
3440 | } |
3441 | #endif |
3442 | old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]); |
3443 | if (old_blk == 0xFFFF) { |
3444 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); |
3445 | TRACE_RET(chip, STATUS_FAIL); |
3446 | } |
3447 | } |
3448 | |
3449 | RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk); |
3450 | |
3451 | while (total_sec_cnt) { |
3452 | if ((start_page + total_sec_cnt) > (ms_card->page_off + 1)) { |
3453 | end_page = ms_card->page_off + 1; |
3454 | } else { |
3455 | end_page = start_page + (u8)total_sec_cnt; |
3456 | } |
3457 | page_cnt = end_page - start_page; |
3458 | |
3459 | RTSX_DEBUGP("start_page = %d, end_page = %d, page_cnt = %d\n", |
3460 | start_page, end_page, page_cnt); |
3461 | |
3462 | if (srb->sc_data_direction == DMA_FROM_DEVICE) { |
3463 | retval = ms_read_multiple_pages(chip, |
3464 | old_blk, log_blk, start_page, end_page, |
3465 | ptr, &index, &offset); |
3466 | } else { |
3467 | retval = ms_write_multiple_pages(chip, old_blk, |
3468 | new_blk, log_blk, start_page, end_page, |
3469 | ptr, &index, &offset); |
3470 | } |
3471 | |
3472 | if (retval != STATUS_SUCCESS) { |
3473 | toggle_gpio(chip, 1); |
3474 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
3475 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); |
3476 | TRACE_RET(chip, STATUS_FAIL); |
3477 | } |
3478 | ms_rw_fail(srb, chip); |
3479 | TRACE_RET(chip, STATUS_FAIL); |
3480 | } |
3481 | |
3482 | if (srb->sc_data_direction == DMA_TO_DEVICE) { |
3483 | if (end_page == (ms_card->page_off + 1)) { |
3484 | retval = ms_erase_block(chip, old_blk); |
3485 | if (retval == STATUS_SUCCESS) { |
3486 | ms_set_unused_block(chip, old_blk); |
3487 | } |
3488 | ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk); |
3489 | } |
3490 | } |
3491 | |
3492 | total_sec_cnt -= page_cnt; |
3493 | if (scsi_sg_count(srb) == 0) |
3494 | ptr += page_cnt * 512; |
3495 | |
3496 | if (total_sec_cnt == 0) |
3497 | break; |
3498 | |
3499 | log_blk++; |
3500 | |
3501 | for (seg_no = 0; seg_no < sizeof(ms_start_idx)/2; seg_no++) { |
3502 | if (log_blk < ms_start_idx[seg_no+1]) |
3503 | break; |
3504 | } |
3505 | |
3506 | if (ms_card->segment[seg_no].build_flag == 0) { |
3507 | retval = ms_build_l2p_tbl(chip, seg_no); |
3508 | if (retval != STATUS_SUCCESS) { |
3509 | chip->card_fail |= MS_CARD; |
3510 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); |
3511 | TRACE_RET(chip, STATUS_FAIL); |
3512 | } |
3513 | } |
3514 | |
3515 | old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]); |
3516 | if (old_blk == 0xFFFF) { |
3517 | ms_rw_fail(srb, chip); |
3518 | TRACE_RET(chip, STATUS_FAIL); |
3519 | } |
3520 | |
3521 | if (srb->sc_data_direction == DMA_TO_DEVICE) { |
3522 | new_blk = ms_get_unused_block(chip, seg_no); |
3523 | if (new_blk == 0xFFFF) { |
3524 | ms_rw_fail(srb, chip); |
3525 | TRACE_RET(chip, STATUS_FAIL); |
3526 | } |
3527 | } |
3528 | |
3529 | RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk); |
3530 | |
3531 | start_page = 0; |
3532 | } |
3533 | |
3534 | if (srb->sc_data_direction == DMA_TO_DEVICE) { |
3535 | if (end_page < (ms_card->page_off + 1)) { |
3536 | #ifdef MS_DELAY_WRITE |
3537 | delay_write->delay_write_flag = 1; |
3538 | delay_write->old_phyblock = old_blk; |
3539 | delay_write->new_phyblock = new_blk; |
3540 | delay_write->logblock = log_blk; |
3541 | delay_write->pageoff = end_page; |
3542 | #else |
3543 | retval = ms_finish_write(chip, old_blk, new_blk, log_blk, end_page); |
3544 | if (retval != STATUS_SUCCESS) { |
3545 | if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { |
3546 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); |
3547 | TRACE_RET(chip, STATUS_FAIL); |
3548 | } |
3549 | |
3550 | ms_rw_fail(srb, chip); |
3551 | TRACE_RET(chip, STATUS_FAIL); |
3552 | } |
3553 | #endif |
3554 | } |
3555 | } |
3556 | |
3557 | scsi_set_resid(srb, 0); |
3558 | |
3559 | return STATUS_SUCCESS; |
3560 | } |
3561 | |
3562 | int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt) |
3563 | { |
3564 | struct ms_info *ms_card = &(chip->ms_card); |
3565 | int retval; |
3566 | |
3567 | if (CHK_MSPRO(ms_card)) { |
3568 | retval = mspro_rw_multi_sector(srb, chip, start_sector, sector_cnt); |
3569 | } else { |
3570 | retval = ms_rw_multi_sector(srb, chip, start_sector, sector_cnt); |
3571 | } |
3572 | |
3573 | return retval; |
3574 | } |
3575 | |
3576 | |
3577 | void ms_free_l2p_tbl(struct rtsx_chip *chip) |
3578 | { |
3579 | struct ms_info *ms_card = &(chip->ms_card); |
3580 | int i = 0; |
3581 | |
3582 | if (ms_card->segment != NULL) { |
3583 | for (i = 0; i < ms_card->segment_cnt; i++) { |
3584 | if (ms_card->segment[i].l2p_table != NULL) { |
3585 | vfree(ms_card->segment[i].l2p_table); |
3586 | ms_card->segment[i].l2p_table = NULL; |
3587 | } |
3588 | if (ms_card->segment[i].free_table != NULL) { |
3589 | vfree(ms_card->segment[i].free_table); |
3590 | ms_card->segment[i].free_table = NULL; |
3591 | } |
3592 | } |
3593 | vfree(ms_card->segment); |
3594 | ms_card->segment = NULL; |
3595 | } |
3596 | } |
3597 | |
3598 | #ifdef SUPPORT_MAGIC_GATE |
3599 | |
3600 | #ifdef READ_BYTES_WAIT_INT |
6680d2ca |
3601 | static int ms_poll_int(struct rtsx_chip *chip) |
77d89b08 |
3602 | { |
3603 | int retval; |
3604 | u8 val; |
3605 | |
3606 | rtsx_init_cmd(chip); |
3607 | |
3608 | rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED); |
3609 | |
3610 | retval = rtsx_send_cmd(chip, MS_CARD, 5000); |
3611 | if (retval != STATUS_SUCCESS) { |
3612 | TRACE_RET(chip, STATUS_FAIL); |
3613 | } |
3614 | |
3615 | val = *rtsx_get_cmd_data(chip); |
3616 | if (val & MS_INT_ERR) { |
3617 | TRACE_RET(chip, STATUS_FAIL); |
3618 | } |
3619 | |
3620 | return STATUS_SUCCESS; |
3621 | } |
3622 | #endif |
3623 | |
3624 | #ifdef MS_SAMPLE_INT_ERR |
3625 | static int check_ms_err(struct rtsx_chip *chip) |
3626 | { |
3627 | int retval; |
3628 | u8 val; |
3629 | |
3630 | retval = rtsx_read_register(chip, MS_TRANSFER, &val); |
3631 | if (retval != STATUS_SUCCESS) |
3632 | return 1; |
3633 | if (val & MS_TRANSFER_ERR) |
3634 | return 1; |
3635 | |
3636 | retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); |
3637 | if (retval != STATUS_SUCCESS) |
3638 | return 1; |
3639 | |
3640 | if (val & (MS_INT_ERR | MS_INT_CMDNK)) |
3641 | return 1; |
3642 | |
3643 | return 0; |
3644 | } |
3645 | #else |
3646 | static int check_ms_err(struct rtsx_chip *chip) |
3647 | { |
3648 | int retval; |
3649 | u8 val; |
3650 | |
3651 | retval = rtsx_read_register(chip, MS_TRANSFER, &val); |
3652 | if (retval != STATUS_SUCCESS) |
3653 | return 1; |
3654 | if (val & MS_TRANSFER_ERR) |
3655 | return 1; |
3656 | |
3657 | return 0; |
3658 | } |
3659 | #endif |
3660 | |
3661 | static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num) |
3662 | { |
3663 | int retval, i; |
3664 | u8 data[8]; |
3665 | |
3666 | data[0] = cmd; |
3667 | data[1] = 0; |
3668 | data[2] = 0; |
3669 | data[3] = 0; |
3670 | data[4] = 0; |
3671 | data[5] = 0; |
3672 | data[6] = entry_num; |
3673 | data[7] = 0; |
3674 | |
3675 | for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { |
3676 | retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8); |
3677 | if (retval == STATUS_SUCCESS) |
3678 | break; |
3679 | } |
3680 | if (i == MS_MAX_RETRY_COUNT) { |
3681 | TRACE_RET(chip, STATUS_FAIL); |
3682 | } |
3683 | |
3684 | if (check_ms_err(chip)) { |
3685 | rtsx_clear_ms_error(chip); |
3686 | TRACE_RET(chip, STATUS_FAIL); |
3687 | } |
3688 | |
3689 | return STATUS_SUCCESS; |
3690 | } |
3691 | |
3692 | static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num) |
3693 | { |
3694 | int retval; |
3695 | u8 buf[6]; |
3696 | |
3697 | RTSX_DEBUGP("--%s--\n", __func__); |
3698 | |
3699 | if (type == 0) { |
3700 | retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1); |
3701 | } else { |
3702 | retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); |
3703 | } |
3704 | if (retval != STATUS_SUCCESS) { |
3705 | TRACE_RET(chip, STATUS_FAIL); |
3706 | } |
3707 | |
3708 | buf[0] = 0; |
3709 | buf[1] = 0; |
3710 | if (type == 1) { |
3711 | buf[2] = 0; |
3712 | buf[3] = 0; |
3713 | buf[4] = 0; |
3714 | buf[5] = mg_entry_num; |
3715 | } |
3716 | retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6, NO_WAIT_INT, buf, 6); |
3717 | if (retval != STATUS_SUCCESS) { |
3718 | TRACE_RET(chip, STATUS_FAIL); |
3719 | } |
3720 | |
3721 | return STATUS_SUCCESS; |
3722 | } |
3723 | |
3724 | int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
3725 | { |
3726 | int retval; |
3727 | int i; |
3728 | unsigned int lun = SCSI_LUN(srb); |
3729 | u8 buf1[32], buf2[12]; |
3730 | |
3731 | RTSX_DEBUGP("--%s--\n", __func__); |
3732 | |
3733 | if (scsi_bufflen(srb) < 12) { |
3734 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); |
3735 | TRACE_RET(chip, STATUS_FAIL); |
3736 | } |
3737 | |
3738 | ms_cleanup_work(chip); |
3739 | |
3740 | retval = ms_switch_clock(chip); |
3741 | if (retval != STATUS_SUCCESS) { |
3742 | TRACE_RET(chip, STATUS_FAIL); |
3743 | } |
3744 | |
3745 | retval = mg_send_ex_cmd(chip, MG_SET_LID, 0); |
3746 | if (retval != STATUS_SUCCESS) { |
3747 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); |
3748 | TRACE_RET(chip, STATUS_FAIL); |
3749 | } |
3750 | |
3751 | memset(buf1, 0, 32); |
3752 | rtsx_stor_get_xfer_buf(buf2, min(12, (int)scsi_bufflen(srb)), srb); |
3753 | for (i = 0; i < 8; i++) { |
3754 | buf1[8+i] = buf2[4+i]; |
3755 | } |
3756 | retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf1, 32); |
3757 | if (retval != STATUS_SUCCESS) { |
3758 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); |
3759 | TRACE_RET(chip, STATUS_FAIL); |
3760 | } |
3761 | if (check_ms_err(chip)) { |
3762 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); |
3763 | rtsx_clear_ms_error(chip); |
3764 | TRACE_RET(chip, STATUS_FAIL); |
3765 | } |
3766 | |
3767 | return STATUS_SUCCESS; |
3768 | } |
3769 | |
3770 | int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
3771 | { |
3772 | int retval = STATUS_FAIL; |
3773 | int bufflen; |
3774 | unsigned int lun = SCSI_LUN(srb); |
3775 | u8 *buf = NULL; |
3776 | |
3777 | RTSX_DEBUGP("--%s--\n", __func__); |
3778 | |
3779 | ms_cleanup_work(chip); |
3780 | |
3781 | retval = ms_switch_clock(chip); |
3782 | if (retval != STATUS_SUCCESS) { |
3783 | TRACE_RET(chip, STATUS_FAIL); |
3784 | } |
3785 | |
389fe985 |
3786 | buf = kmalloc(1540, GFP_KERNEL); |
77d89b08 |
3787 | if (!buf) { |
3788 | TRACE_RET(chip, STATUS_ERROR); |
3789 | } |
3790 | |
3791 | buf[0] = 0x04; |
3792 | buf[1] = 0x1A; |
3793 | buf[2] = 0x00; |
3794 | buf[3] = 0x00; |
3795 | |
3796 | retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0); |
3797 | if (retval != STATUS_SUCCESS) { |
3798 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3799 | TRACE_GOTO(chip, GetEKBFinish); |
3800 | } |
3801 | |
3802 | retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, |
3803 | 3, WAIT_INT, 0, 0, buf + 4, 1536); |
3804 | if (retval != STATUS_SUCCESS) { |
3805 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3806 | rtsx_clear_ms_error(chip); |
3807 | TRACE_GOTO(chip, GetEKBFinish); |
3808 | } |
3809 | if (check_ms_err(chip)) { |
3810 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3811 | rtsx_clear_ms_error(chip); |
3812 | TRACE_RET(chip, STATUS_FAIL); |
3813 | } |
3814 | |
3815 | bufflen = min(1052, (int)scsi_bufflen(srb)); |
3816 | rtsx_stor_set_xfer_buf(buf, bufflen, srb); |
3817 | |
3818 | GetEKBFinish: |
cc614b69 |
3819 | kfree(buf); |
77d89b08 |
3820 | return retval; |
3821 | } |
3822 | |
3823 | int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
3824 | { |
3825 | struct ms_info *ms_card = &(chip->ms_card); |
3826 | int retval; |
3827 | int bufflen; |
3828 | int i; |
3829 | unsigned int lun = SCSI_LUN(srb); |
3830 | u8 buf[32]; |
3831 | |
3832 | RTSX_DEBUGP("--%s--\n", __func__); |
3833 | |
3834 | ms_cleanup_work(chip); |
3835 | |
3836 | retval = ms_switch_clock(chip); |
3837 | if (retval != STATUS_SUCCESS) { |
3838 | TRACE_RET(chip, STATUS_FAIL); |
3839 | } |
3840 | |
3841 | retval = mg_send_ex_cmd(chip, MG_GET_ID, 0); |
3842 | if (retval != STATUS_SUCCESS) { |
3843 | set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); |
3844 | TRACE_RET(chip, STATUS_FAIL); |
3845 | } |
3846 | |
3847 | retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf, 32); |
3848 | if (retval != STATUS_SUCCESS) { |
3849 | set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); |
3850 | TRACE_RET(chip, STATUS_FAIL); |
3851 | } |
3852 | if (check_ms_err(chip)) { |
3853 | set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); |
3854 | rtsx_clear_ms_error(chip); |
3855 | TRACE_RET(chip, STATUS_FAIL); |
3856 | } |
3857 | |
3858 | memcpy(ms_card->magic_gate_id, buf, 16); |
3859 | |
3860 | #ifdef READ_BYTES_WAIT_INT |
3861 | retval = ms_poll_int(chip); |
3862 | if (retval != STATUS_SUCCESS) { |
3863 | set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); |
3864 | TRACE_RET(chip, STATUS_FAIL); |
3865 | } |
3866 | #endif |
3867 | |
3868 | retval = mg_send_ex_cmd(chip, MG_SET_RD, 0); |
3869 | if (retval != STATUS_SUCCESS) { |
3870 | set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); |
3871 | TRACE_RET(chip, STATUS_FAIL); |
3872 | } |
3873 | |
3874 | bufflen = min(12, (int)scsi_bufflen(srb)); |
3875 | rtsx_stor_get_xfer_buf(buf, bufflen, srb); |
3876 | |
3877 | for (i = 0; i < 8; i++) { |
3878 | buf[i] = buf[4+i]; |
3879 | } |
3880 | for (i = 0; i < 24; i++) { |
3881 | buf[8+i] = 0; |
3882 | } |
3883 | retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, |
3884 | 32, WAIT_INT, buf, 32); |
3885 | if (retval != STATUS_SUCCESS) { |
3886 | set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); |
3887 | TRACE_RET(chip, STATUS_FAIL); |
3888 | } |
3889 | if (check_ms_err(chip)) { |
3890 | set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); |
3891 | rtsx_clear_ms_error(chip); |
3892 | TRACE_RET(chip, STATUS_FAIL); |
3893 | } |
3894 | |
3895 | ms_card->mg_auth = 0; |
3896 | |
3897 | return STATUS_SUCCESS; |
3898 | } |
3899 | |
3900 | int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
3901 | { |
3902 | struct ms_info *ms_card = &(chip->ms_card); |
3903 | int retval; |
3904 | int bufflen; |
3905 | unsigned int lun = SCSI_LUN(srb); |
3906 | u8 buf1[32], buf2[36]; |
3907 | |
3908 | RTSX_DEBUGP("--%s--\n", __func__); |
3909 | |
3910 | ms_cleanup_work(chip); |
3911 | |
3912 | retval = ms_switch_clock(chip); |
3913 | if (retval != STATUS_SUCCESS) { |
3914 | TRACE_RET(chip, STATUS_FAIL); |
3915 | } |
3916 | |
3917 | retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0); |
3918 | if (retval != STATUS_SUCCESS) { |
3919 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3920 | TRACE_RET(chip, STATUS_FAIL); |
3921 | } |
3922 | |
3923 | retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf1, 32); |
3924 | if (retval != STATUS_SUCCESS) { |
3925 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3926 | TRACE_RET(chip, STATUS_FAIL); |
3927 | } |
3928 | if (check_ms_err(chip)) { |
3929 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3930 | rtsx_clear_ms_error(chip); |
3931 | TRACE_RET(chip, STATUS_FAIL); |
3932 | } |
3933 | |
3934 | buf2[0] = 0x00; |
3935 | buf2[1] = 0x22; |
3936 | buf2[2] = 0x00; |
3937 | buf2[3] = 0x00; |
3938 | |
3939 | memcpy(buf2 + 4, ms_card->magic_gate_id, 16); |
3940 | memcpy(buf2 + 20, buf1, 16); |
3941 | |
3942 | bufflen = min(36, (int)scsi_bufflen(srb)); |
3943 | rtsx_stor_set_xfer_buf(buf2, bufflen, srb); |
3944 | |
3945 | #ifdef READ_BYTES_WAIT_INT |
3946 | retval = ms_poll_int(chip); |
3947 | if (retval != STATUS_SUCCESS) { |
3948 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3949 | TRACE_RET(chip, STATUS_FAIL); |
3950 | } |
3951 | #endif |
3952 | |
3953 | return STATUS_SUCCESS; |
3954 | } |
3955 | |
3956 | int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
3957 | { |
3958 | struct ms_info *ms_card = &(chip->ms_card); |
3959 | int retval; |
3960 | int i; |
3961 | int bufflen; |
3962 | unsigned int lun = SCSI_LUN(srb); |
3963 | u8 buf[32]; |
3964 | |
3965 | RTSX_DEBUGP("--%s--\n", __func__); |
3966 | |
3967 | ms_cleanup_work(chip); |
3968 | |
3969 | retval = ms_switch_clock(chip); |
3970 | if (retval != STATUS_SUCCESS) { |
3971 | TRACE_RET(chip, STATUS_FAIL); |
3972 | } |
3973 | |
3974 | retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0); |
3975 | if (retval != STATUS_SUCCESS) { |
3976 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3977 | TRACE_RET(chip, STATUS_FAIL); |
3978 | } |
3979 | |
3980 | bufflen = min(12, (int)scsi_bufflen(srb)); |
3981 | rtsx_stor_get_xfer_buf(buf, bufflen, srb); |
3982 | |
3983 | for (i = 0; i < 8; i++) { |
3984 | buf[i] = buf[4+i]; |
3985 | } |
3986 | for (i = 0; i < 24; i++) { |
3987 | buf[8+i] = 0; |
3988 | } |
3989 | retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32); |
3990 | if (retval != STATUS_SUCCESS) { |
3991 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3992 | TRACE_RET(chip, STATUS_FAIL); |
3993 | } |
3994 | if (check_ms_err(chip)) { |
3995 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); |
3996 | rtsx_clear_ms_error(chip); |
3997 | TRACE_RET(chip, STATUS_FAIL); |
3998 | } |
3999 | |
4000 | ms_card->mg_auth = 1; |
4001 | |
4002 | return STATUS_SUCCESS; |
4003 | } |
4004 | |
4005 | int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
4006 | { |
4007 | struct ms_info *ms_card = &(chip->ms_card); |
4008 | int retval; |
4009 | int bufflen; |
4010 | unsigned int lun = SCSI_LUN(srb); |
4011 | u8 *buf = NULL; |
4012 | |
4013 | RTSX_DEBUGP("--%s--\n", __func__); |
4014 | |
4015 | ms_cleanup_work(chip); |
4016 | |
4017 | retval = ms_switch_clock(chip); |
4018 | if (retval != STATUS_SUCCESS) { |
4019 | TRACE_RET(chip, STATUS_FAIL); |
4020 | } |
4021 | |
389fe985 |
4022 | buf = kmalloc(1028, GFP_KERNEL); |
77d89b08 |
4023 | if (!buf) { |
4024 | TRACE_RET(chip, STATUS_ERROR); |
4025 | } |
4026 | |
4027 | buf[0] = 0x04; |
4028 | buf[1] = 0x02; |
4029 | buf[2] = 0x00; |
4030 | buf[3] = 0x00; |
4031 | |
4032 | retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num); |
4033 | if (retval != STATUS_SUCCESS) { |
4034 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); |
4035 | TRACE_GOTO(chip, GetICVFinish); |
4036 | } |
4037 | |
4038 | retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, |
4039 | 2, WAIT_INT, 0, 0, buf + 4, 1024); |
4040 | if (retval != STATUS_SUCCESS) { |
4041 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); |
4042 | rtsx_clear_ms_error(chip); |
4043 | TRACE_GOTO(chip, GetICVFinish); |
4044 | } |
4045 | if (check_ms_err(chip)) { |
4046 | set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); |
4047 | rtsx_clear_ms_error(chip); |
4048 | TRACE_RET(chip, STATUS_FAIL); |
4049 | } |
4050 | |
4051 | bufflen = min(1028, (int)scsi_bufflen(srb)); |
4052 | rtsx_stor_set_xfer_buf(buf, bufflen, srb); |
4053 | |
4054 | GetICVFinish: |
cc614b69 |
4055 | kfree(buf); |
77d89b08 |
4056 | return retval; |
4057 | } |
4058 | |
4059 | int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) |
4060 | { |
4061 | struct ms_info *ms_card = &(chip->ms_card); |
4062 | int retval; |
4063 | int bufflen; |
4064 | #ifdef MG_SET_ICV_SLOW |
4065 | int i; |
4066 | #endif |
4067 | unsigned int lun = SCSI_LUN(srb); |
4068 | u8 *buf = NULL; |
4069 | |
4070 | RTSX_DEBUGP("--%s--\n", __func__); |
4071 | |
4072 | ms_cleanup_work(chip); |
4073 | |
4074 | retval = ms_switch_clock(chip); |
4075 | if (retval != STATUS_SUCCESS) { |
4076 | TRACE_RET(chip, STATUS_FAIL); |
4077 | } |
4078 | |
389fe985 |
4079 | buf = kmalloc(1028, GFP_KERNEL); |
77d89b08 |
4080 | if (!buf) { |
4081 | TRACE_RET(chip, STATUS_ERROR); |
4082 | } |
4083 | |
4084 | bufflen = min(1028, (int)scsi_bufflen(srb)); |
4085 | rtsx_stor_get_xfer_buf(buf, bufflen, srb); |
4086 | |
4087 | retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num); |
4088 | if (retval != STATUS_SUCCESS) { |
4089 | if (ms_card->mg_auth == 0) { |
4090 | if ((buf[5] & 0xC0) != 0) { |
4091 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); |
4092 | } else { |
4093 | set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); |
4094 | } |
4095 | } else { |
4096 | set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); |
4097 | } |
4098 | TRACE_GOTO(chip, SetICVFinish); |
4099 | } |
4100 | |
4101 | #ifdef MG_SET_ICV_SLOW |
4102 | for (i = 0; i < 2; i++) { |
4103 | udelay(50); |
4104 | |
4105 | rtsx_init_cmd(chip); |
4106 | |
4107 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, PRO_WRITE_LONG_DATA); |
4108 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT); |
4109 | rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); |
4110 | |
4111 | trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512); |
4112 | |
4113 | rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, |
4114 | MS_TRANSFER_START | MS_TM_NORMAL_WRITE); |
4115 | rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); |
4116 | |
4117 | rtsx_send_cmd_no_wait(chip); |
4118 | |
4119 | retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512, 512, 0, DMA_TO_DEVICE, 3000); |
4120 | if ((retval < 0) || check_ms_err(chip)) { |
4121 | rtsx_clear_ms_error(chip); |
4122 | if (ms_card->mg_auth == 0) { |
4123 | if ((buf[5] & 0xC0) != 0) { |
4124 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); |
4125 | } else { |
4126 | set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); |
4127 | } |
4128 | } else { |
4129 | set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); |
4130 | } |
4131 | retval = STATUS_FAIL; |
4132 | TRACE_GOTO(chip, SetICVFinish); |
4133 | } |
4134 | } |
4135 | #else |
4136 | retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA, |
4137 | 2, WAIT_INT, 0, 0, buf + 4, 1024); |
4138 | if ((retval != STATUS_SUCCESS) || check_ms_err(chip) { |
4139 | rtsx_clear_ms_error(chip); |
4140 | if (ms_card->mg_auth == 0) { |
4141 | if ((buf[5] & 0xC0) != 0) { |
4142 | set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); |
4143 | } else { |
4144 | set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); |
4145 | } |
4146 | } else { |
4147 | set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); |
4148 | } |
4149 | TRACE_GOTO(chip, SetICVFinish); |
4150 | } |
4151 | #endif |
4152 | |
4153 | SetICVFinish: |
cc614b69 |
4154 | kfree(buf); |
77d89b08 |
4155 | return retval; |
4156 | } |
4157 | |
4158 | #endif /* SUPPORT_MAGIC_GATE */ |
4159 | |
4160 | void ms_cleanup_work(struct rtsx_chip *chip) |
4161 | { |
4162 | struct ms_info *ms_card = &(chip->ms_card); |
4163 | |
4164 | if (CHK_MSPRO(ms_card)) { |
4165 | if (ms_card->seq_mode) { |
4166 | RTSX_DEBUGP("MS Pro: stop transmission\n"); |
4167 | mspro_stop_seq_mode(chip); |
4168 | ms_card->cleanup_counter = 0; |
4169 | } |
4170 | if (CHK_MSHG(ms_card)) { |
4171 | rtsx_write_register(chip, MS_CFG, |
4172 | MS_2K_SECTOR_MODE, 0x00); |
4173 | } |
4174 | } |
4175 | #ifdef MS_DELAY_WRITE |
4176 | else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) { |
4177 | RTSX_DEBUGP("MS: delay write\n"); |
4178 | ms_delay_write(chip); |
4179 | ms_card->cleanup_counter = 0; |
4180 | } |
4181 | #endif |
4182 | } |
4183 | |
4184 | int ms_power_off_card3v3(struct rtsx_chip *chip) |
4185 | { |
4186 | int retval; |
4187 | |
4188 | retval = disable_card_clock(chip, MS_CARD); |
4189 | if (retval != STATUS_SUCCESS) { |
4190 | TRACE_RET(chip, STATUS_FAIL); |
4191 | } |
4192 | if (chip->asic_code) { |
4193 | retval = ms_pull_ctl_disable(chip); |
4194 | if (retval != STATUS_SUCCESS) { |
4195 | TRACE_RET(chip, STATUS_FAIL); |
4196 | } |
4197 | } else { |
4198 | RTSX_WRITE_REG(chip, FPGA_PULL_CTL, |
4199 | FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT); |
4200 | } |
4201 | RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0); |
4202 | if (!chip->ft2_fast_mode) { |
4203 | retval = card_power_off(chip, MS_CARD); |
4204 | if (retval != STATUS_SUCCESS) { |
4205 | TRACE_RET(chip, STATUS_FAIL); |
4206 | } |
4207 | } |
4208 | |
4209 | return STATUS_SUCCESS; |
4210 | } |
4211 | |
4212 | int release_ms_card(struct rtsx_chip *chip) |
4213 | { |
4214 | struct ms_info *ms_card = &(chip->ms_card); |
4215 | int retval; |
4216 | |
4217 | RTSX_DEBUGP("release_ms_card\n"); |
4218 | |
4219 | #ifdef MS_DELAY_WRITE |
4220 | ms_card->delay_write.delay_write_flag = 0; |
4221 | #endif |
4222 | ms_card->pro_under_formatting = 0; |
4223 | |
4224 | chip->card_ready &= ~MS_CARD; |
4225 | chip->card_fail &= ~MS_CARD; |
4226 | chip->card_wp &= ~MS_CARD; |
4227 | |
4228 | ms_free_l2p_tbl(chip); |
4229 | |
4230 | memset(ms_card->raw_sys_info, 0, 96); |
4231 | #ifdef SUPPORT_PCGL_1P18 |
4232 | memset(ms_card->raw_model_name, 0, 48); |
4233 | #endif |
4234 | |
4235 | retval = ms_power_off_card3v3(chip); |
4236 | if (retval != STATUS_SUCCESS) { |
4237 | TRACE_RET(chip, STATUS_FAIL); |
4238 | } |
4239 | |
4240 | return STATUS_SUCCESS; |
4241 | } |
4242 | |